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authorbnewbold <bnewbold@robocracy.org>2015-03-02 23:57:13 -0800
committerbnewbold <bnewbold@robocracy.org>2015-03-03 00:15:30 -0800
commit9ffadc10ab4afe50833915e9c2df0c87a4ceb718 (patch)
treeac80a21a8367dcb124e55cfa7bd8dea5294c67b6 /libmaple/stm32f2-f4
parentc5d73925fcc06ec03fe21b290e2783e3e07ba9f1 (diff)
downloadlibrambutan-9ffadc10ab4afe50833915e9c2df0c87a4ceb718.tar.gz
librambutan-9ffadc10ab4afe50833915e9c2df0c87a4ceb718.zip
stm32f4: don't try to build FSMC and Timers that hardware doesn't support
Diffstat (limited to 'libmaple/stm32f2-f4')
-rw-r--r--libmaple/stm32f2-f4/fsmc.c6
-rw-r--r--libmaple/stm32f2-f4/timer.c23
2 files changed, 29 insertions, 0 deletions
diff --git a/libmaple/stm32f2-f4/fsmc.c b/libmaple/stm32f2-f4/fsmc.c
index ec41720..4ee23fa 100644
--- a/libmaple/stm32f2-f4/fsmc.c
+++ b/libmaple/stm32f2-f4/fsmc.c
@@ -30,6 +30,10 @@
* @brief STM32F2 FSMC support.
*/
+#include <libmaple/stm32.h>
+
+#if STM32_HAVE_FSMC /* Don't try building the rest for MCUs without FSMC */
+
#include <libmaple/fsmc.h>
#include <libmaple/gpio.h>
@@ -88,3 +92,5 @@ void fsmc_sram_init_gpios(void) {
CONFIG_GPIO(GPIOE, 0);
CONFIG_GPIO(GPIOE, 1);
}
+
+#endif /* STM32_HAVE_FSMC */
diff --git a/libmaple/stm32f2-f4/timer.c b/libmaple/stm32f2-f4/timer.c
index a85bea0..4ef466a 100644
--- a/libmaple/stm32f2-f4/timer.c
+++ b/libmaple/stm32f2-f4/timer.c
@@ -31,6 +31,7 @@
*/
#include <libmaple/timer.h>
+#include <libmaple/stm32.h>
#include "timer_private.h"
/*
@@ -85,17 +86,23 @@ gpio_af timer_get_af(timer_dev *dev) {
void __irq_tim1_brk_tim9(void) {
dispatch_adv_brk(TIMER1);
+#if STM32_HAVE_TIMER(9)
dispatch_tim_9_12(TIMER9);
+#endif
}
void __irq_tim1_up_tim10(void) {
dispatch_adv_up(TIMER1);
+#if STM32_HAVE_TIMER(10)
dispatch_tim_10_11_13_14(TIMER10);
+#endif
}
void __irq_tim1_trg_com_tim11(void) {
dispatch_adv_trg_com(TIMER1);
+#if STM32_HAVE_TIMER(11)
dispatch_tim_10_11_13_14(TIMER11);
+#endif
}
void __irq_tim1_cc(void) {
@@ -125,24 +132,40 @@ void __irq_tim6(void) {
}
void __irq_tim7(void) {
+#if STM32_HAVE_TIMER(7)
dispatch_basic(TIMER7);
+#endif
}
void __irq_tim8_brk_tim12(void) {
+#if STM32_HAVE_TIMER(8)
dispatch_adv_brk(TIMER8);
+#endif
+#if STM32_HAVE_TIMER(12)
dispatch_tim_9_12(TIMER12);
+#endif
}
void __irq_tim8_up_tim13(void) {
+#if STM32_HAVE_TIMER(8)
dispatch_adv_up(TIMER8);
+#endif
+#if STM32_HAVE_TIMER(13)
dispatch_tim_10_11_13_14(TIMER13);
+#endif
}
void __irq_tim8_trg_com_tim14(void) {
+#if STM32_HAVE_TIMER(8)
dispatch_adv_trg_com(TIMER8);
+#endif
+#if STM32_HAVE_TIMER(14)
dispatch_tim_10_11_13_14(TIMER14);
+#endif
}
void __irq_tim8_cc(void) {
+#if STM32_HAVE_TIMER(8)
dispatch_adv_cc(TIMER8);
+#endif
}