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author | Marti Bolivar <mbolivar@leaflabs.com> | 2012-02-02 07:01:41 -0500 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2012-04-11 16:56:54 -0400 |
commit | c122d16c71d2aa04baa8b4b5a5df7faed93240fb (patch) | |
tree | 0a3966772ec4f927fdbb653bafdb40d033e6900c /libmaple/stm32f1 | |
parent | fd03ab16e37437d99c76b0335305e0205fa5efbb (diff) | |
download | librambutan-c122d16c71d2aa04baa8b4b5a5df7faed93240fb.tar.gz librambutan-c122d16c71d2aa04baa8b4b5a5df7faed93240fb.zip |
RCC: Add new mechanism for configuring the main PLL.
The new style for configuring the PLL is to initialize
a (series-specific) struct rcc_pll_cfg, and pass a pointer to it to
rcc_configure_pll(). After that's done, you can use
rcc_turn_on_clk(RCC_CLK_PLL) to turn on the main PLL, and busy-wait
until rcc_is_clk_ready(RCC_CLK_PLL) is true to make sure the new
configuration took effect.
- libmaple/rcc.h:
-- Add struct rcc_pll_cfg, which specifies a PLL configuration. This
specifies a PLL source and a void pointer to series-specific PLL
configuration data.
-- Add rcc_configure_pll(), which takes a pointer to struct
rcc_pll_cfg, and configures the main PLL. It's up to each series
to define this function.
- stm32f1/rcc.h: Add struct stm32f1_rcc_pll_data, to store F1-specific
PLL configuration state.
- stm32f1/rcc.c: Add an implementation for rcc_configure_pll().
- stm32f2/rcc.h: Add struct stm32f2_rcc_pll_data, to store F2-specific
PLL configuration data.
- stm32f2/rcc.c: Add an implementation for rcc_configure_pll().
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/stm32f1')
-rw-r--r-- | libmaple/stm32f1/include/series/rcc.h | 11 | ||||
-rw-r--r-- | libmaple/stm32f1/rcc.c | 19 |
2 files changed, 30 insertions, 0 deletions
diff --git a/libmaple/stm32f1/include/series/rcc.h b/libmaple/stm32f1/include/series/rcc.h index 68a79d4..b72c5cf 100644 --- a/libmaple/stm32f1/include/series/rcc.h +++ b/libmaple/stm32f1/include/series/rcc.h @@ -576,6 +576,17 @@ void rcc_clk_init(rcc_sysclk_src sysclk_src, rcc_pllsrc pll_src, rcc_pll_multiplier pll_mul); +/** + * @brief STM32F1-specific PLL configuration values. + * + * Use this as the "data" field in a struct rcc_pll_cfg. + * + * @see struct rcc_pll_cfg. + */ +typedef struct stm32f1_rcc_pll_data { + rcc_pll_multiplier pll_mul; /**< PLL multiplication factor. */ +} stm32f1_rcc_pll_data; + #ifdef __cplusplus } #endif diff --git a/libmaple/stm32f1/rcc.c b/libmaple/stm32f1/rcc.c index 2d31482..a9c9c3a 100644 --- a/libmaple/stm32f1/rcc.c +++ b/libmaple/stm32f1/rcc.c @@ -127,6 +127,25 @@ void rcc_clk_init(rcc_sysclk_src sysclk_src, } /** + * @brief Configure the main PLL. + * + * You may only call this function while the PLL is disabled. + * + * @param pll_cfg Desired PLL configuration. The data field must point + * to a valid struct stm32f1_rcc_pll_data. + */ +void rcc_configure_pll(rcc_pll_cfg *pll_cfg) { + stm32f1_rcc_pll_data *data = pll_cfg->data; + rcc_pll_multiplier pll_mul = data->pll_mul; + uint32 cfgr; + + cfgr = RCC_BASE->CFGR; + cfgr &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL); + cfgr |= pll_cfg->pllsrc | pll_mul; + RCC_BASE->CFGR = cfgr; +} + +/** * @brief Turn on the clock line on a peripheral * @param id Clock ID of the peripheral to turn on. */ |