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author | Marti Bolivar <mbolivar@leaflabs.com> | 2011-11-15 03:10:04 -0500 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2012-04-11 16:52:17 -0400 |
commit | 4b245f8744ae7abc8d77a9b90f273106eee3541f (patch) | |
tree | 9c8f1b239d4baf80349071ef7e3d9c777f163035 /libmaple/stm32f1/vector_table_performance.S | |
parent | 19fbeddca7111d751a22740ed5016ba50ad6dc95 (diff) | |
download | librambutan-4b245f8744ae7abc8d77a9b90f273106eee3541f.tar.gz librambutan-4b245f8744ae7abc8d77a9b90f273106eee3541f.zip |
Remove CS3-style initialization.
Remove libcs3-related bits from support/ld. Break them out into
libmaple proper and Wirish as appropriate: vector table definition and
ISR declarations go into libmaple proper, and startup code goes into
Wirish. Vector table symbols are included into common.inc from an
STM32 family-specific directory under support/ld/stm32.
This is a combination of 5 commits. Individual commit messages follow:
libcs3_stm32_src: Don't depend on cs3.h.
So we can use the existing toolchain.
Move ISR decls/vector table into libmaple proper.
This allows us to configure the vector table on a per-family basis.
- Move
support/ld/libcs3_stm32_src/stm32_isrs.S
stm32_vector_table.S
to
libmaple/stm32f1/isrs_performance.S
vector_table_performance.S,
respectively.
The directory libmaple/stm32f1/ is intended to hold all
STM32F1-specific code within libmaple. Obviously, there's a lot of
work to do before this becomes true.
- support/ld/libcs3_stm32_src/Makefile: Don't try to compile
stm32_isrs.S and stm32_vector_table.S anymore.
- Add libmaple/stm32f1/rules.mk to include these new files in the
standard libmaple build.
- support/make/target-config.mk: Add LIBMAPLE_MODULE_FAMILY, which
selects a directory to use as a family-specific libmaple
submodule.
- Makefile: Add LIBMAPLE_MODULE_FAMILY to LIBMAPLE_MODULES.
Remove support/ld/libcs3_stm32_src and derived object files.
From support/ld/libcs3_stm32_src, move start.S and start_c.c into
Wirish. Modify wirish/rules.mk accordingly.
Delete support/ld/libcs3_stm32_*_density.a. These are no longer
necessary, as the relevant objects are included in the standard Wirish
build. Remove the GROUP statements from the board linker scripts
accordingly.
Remove SEARCH_DIR(.) from common.inc; it's no longer necessary. Also
fix up some comments that are now out of date.
wirish/start_c.c: Don't use CS3-style memory initialization.
Switch memory initialization to a simpler style of initializing .data
if necessary, then zeroing .bss. Initializing .data is only necessary
during Flash builds, since during RAM builds, LOADADDR(.data) ==
ADDR(.data).
This makes libmaple completely incompatible with the CS3 startup
sequence. Subsequent commits will clean up the namespace to reflect
that fact.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/stm32f1/vector_table_performance.S')
-rw-r--r-- | libmaple/stm32f1/vector_table_performance.S | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/libmaple/stm32f1/vector_table_performance.S b/libmaple/stm32f1/vector_table_performance.S new file mode 100644 index 0000000..7067d95 --- /dev/null +++ b/libmaple/stm32f1/vector_table_performance.S @@ -0,0 +1,90 @@ +/* STM32 vector table */ + + .section ".stm32.interrupt_vector" + + .globl __cs3_stm32_vector_table + .type __cs3_stm32_vector_table, %object + +__cs3_stm32_vector_table: +/* CM3 core interrupts */ + .long __cs3_stack + .long __cs3_reset + .long __exc_nmi + .long __exc_hardfault + .long __exc_memmanage + .long __exc_busfault + .long __exc_usagefault + .long __stm32reservedexception7 + .long __stm32reservedexception8 + .long __stm32reservedexception9 + .long __stm32reservedexception10 + .long __exc_svc + .long __exc_debug_monitor + .long __stm32reservedexception13 + .long __exc_pendsv + .long __exc_systick +/* Peripheral interrupts */ + .long __irq_wwdg + .long __irq_pvd + .long __irq_tamper + .long __irq_rtc + .long __irq_flash + .long __irq_rcc + .long __irq_exti0 + .long __irq_exti1 + .long __irq_exti2 + .long __irq_exti3 + .long __irq_exti4 + .long __irq_dma1_channel1 + .long __irq_dma1_channel2 + .long __irq_dma1_channel3 + .long __irq_dma1_channel4 + .long __irq_dma1_channel5 + .long __irq_dma1_channel6 + .long __irq_dma1_channel7 + .long __irq_adc + .long __irq_usb_hp_can_tx + .long __irq_usb_lp_can_rx0 + .long __irq_can_rx1 + .long __irq_can_sce + .long __irq_exti9_5 + .long __irq_tim1_brk + .long __irq_tim1_up + .long __irq_tim1_trg_com + .long __irq_tim1_cc + .long __irq_tim2 + .long __irq_tim3 + .long __irq_tim4 + .long __irq_i2c1_ev + .long __irq_i2c1_er + .long __irq_i2c2_ev + .long __irq_i2c2_er + .long __irq_spi1 + .long __irq_spi2 + .long __irq_usart1 + .long __irq_usart2 + .long __irq_usart3 + .long __irq_exti15_10 + .long __irq_rtcalarm + .long __irq_usbwakeup +#if defined (STM32_HIGH_DENSITY) + .long __irq_tim8_brk + .long __irq_tim8_up + .long __irq_tim8_trg_com + .long __irq_tim8_cc + .long __irq_adc3 + .long __irq_fsmc + .long __irq_sdio + .long __irq_tim5 + .long __irq_spi3 + .long __irq_uart4 + .long __irq_uart5 + .long __irq_tim6 + .long __irq_tim7 + .long __irq_dma2_channel1 + .long __irq_dma2_channel2 + .long __irq_dma2_channel3 + .long __irq_dma2_channel4_5 +#endif /* STM32_HIGH_DENSITY */ + + .size __cs3_stm32_vector_table, . - __cs3_stm32_vector_table |