STM32F1: Add support for timers 9 through 14.

This applies to XL-density STM32F1 devices.

In stm32f1/timer.c, add timer_dev's for the new timers, using the
timer_private API. These definitions are conditionally compiled based
on the target density to avoid wasting space on smaller MCUs. Also add
calls to the appropriate timer_private.h dispatch routines within the
IRQ handlers for these timers. We need to change the IRQ handler names
to reflect this eventually, but put that off for now, as it could
break backwards compatibility in some exotic situations where the user
refers to the libmaple IRQ handlers directly.

In stm32f1/timer.h, add register map base pointers and device
declarations for the new timers. timer_dev* declarations are compiled
in only when the target MCU supports them, in keeping with the above
stm32f1/timer.c changes.

In libmaple/timer.c, update the (static) IRQ enable routines to
account for the additional timers. This adds some code that's
unnecessary on smaller STM32F1s, but it's minimal (40 extra bytes on
my machine), so portability and readability win out.

Size change, using GCC version "(Sourcery G++ Lite 2011.03-42) 4.5.2":

Before:

   text	   data	    bss	    dec	    hex	filename
    615	      0	      0	    615	    267	build/home/mbolivar/leaf/libmaple/libmaple/timer.o

After:

   text	   data	    bss	    dec	    hex	filename
    655	      0	      0	    655	    28f	build/home/mbolivar/leaf/libmaple/libmaple/timer.o

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>

1 files changed, 37 insertions, 5 deletions

diff --git a/libmaple/stm32f1/include/series/timer.h b/libmaple/stm32f1/include/series/timer.h
index 9bd273e..2551f70 100644
--- a/libmaple/stm32f1/include/series/timer.h
+++ b/libmaple/stm32f1/include/series/timer.h
@@ -33,11 +33,10 @@
 #ifndef _LIBMAPLE_STM32F1_TIMER_H_
 #define _LIBMAPLE_STM32F1_TIMER_H_
 
-#include <libmaple/libmaple.h>
-#include <series/timer.h>
+#include <libmaple/libmaple_types.h>
 
 /*
- * Register maps and devices
+ * Register maps and base pointers
  */
 
 /** STM32F1 general purpose timer register map type */
@@ -64,6 +63,10 @@ typedef struct timer_gen_reg_map {
     __io uint32 DMAR;           /**< DMA address for full transfer */
 } timer_gen_reg_map;
 
+struct timer_adv_reg_map;
+struct timer_gen_reg_map;
+struct timer_bas_reg_map;
+
 /** Timer 1 register map base pointer */
 #define TIMER1_BASE                     ((struct timer_adv_reg_map*)0x40012C00)
 /** Timer 2 register map base pointer */
@@ -72,7 +75,6 @@ typedef struct timer_gen_reg_map {
 #define TIMER3_BASE                     ((struct timer_gen_reg_map*)0x40000400)
 /** Timer 4 register map base pointer */
 #define TIMER4_BASE                     ((struct timer_gen_reg_map*)0x40000800)
-#if defined(STM32_HIGH_DENSITY) || defined(STM32_XL_DENSITY)
 /** Timer 5 register map base pointer */
 #define TIMER5_BASE                     ((struct timer_gen_reg_map*)0x40000C00)
 /** Timer 6 register map base pointer */
@@ -81,7 +83,29 @@ typedef struct timer_gen_reg_map {
 #define TIMER7_BASE                     ((struct timer_bas_reg_map*)0x40001400)
 /** Timer 8 register map base pointer */
 #define TIMER8_BASE                     ((struct timer_adv_reg_map*)0x40013400)
-#endif
+/** Timer 9 register map base pointer */
+#define TIMER9_BASE                     ((struct timer_gen_reg_map*)0x40014C00)
+/** Timer 10 register map base pointer */
+#define TIMER10_BASE                    ((struct timer_gen_reg_map*)0x40015000)
+/** Timer 11 register map base pointer */
+#define TIMER11_BASE                    ((struct timer_gen_reg_map*)0x40015400)
+/** Timer 12 register map base pointer */
+#define TIMER12_BASE                    ((struct timer_gen_reg_map*)0x40001800)
+/** Timer 13 register map base pointer */
+#define TIMER13_BASE                    ((struct timer_gen_reg_map*)0x40001C00)
+/** Timer 14 register map base pointer */
+#define TIMER14_BASE                    ((struct timer_gen_reg_map*)0x40002000)
+
+/*
+ * Device pointers
+ *
+ * We only declare device pointers to timers which actually exist on
+ * the target MCU. This helps when porting programs to STM32F1 (or
+ * within F1 to a lower density MCU), as attempts to use nonexistent
+ * timers cause build errors instead of undefined behavior.
+ */
+
+struct timer_dev;
 
 extern struct timer_dev *TIMER1;
 extern struct timer_dev *TIMER2;
@@ -93,5 +117,13 @@ extern struct timer_dev *TIMER6;
 extern struct timer_dev *TIMER7;
 extern struct timer_dev *TIMER8;
 #endif
+#ifdef STM32_XL_DENSITY
+extern struct timer_dev *TIMER9;
+extern struct timer_dev *TIMER10;
+extern struct timer_dev *TIMER11;
+extern struct timer_dev *TIMER12;
+extern struct timer_dev *TIMER13;
+extern struct timer_dev *TIMER14;
+#endif
 
 #endif