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authorMichael Hope <michaelh@juju.net.nz>2011-08-31 20:45:44 +1200
committerMichael Hope <michaelh@juju.net.nz>2011-09-13 19:35:12 +1200
commit3f03c0c1edc74b3fb95f178a45a111a2d3381719 (patch)
tree0cd9a785f0491a823d38b3a6fb01fa48edbdfcfd /libmaple/nvic.h
parentcfede8b93422fa48f6240d53380934b4cbcc3d63 (diff)
downloadlibrambutan-3f03c0c1edc74b3fb95f178a45a111a2d3381719.tar.gz
librambutan-3f03c0c1edc74b3fb95f178a45a111a2d3381719.zip
Added more doxygen file level headers. Documented a few more functions.
Signed-off-by: Michael Hope <michaelh@juju.net.nz>
Diffstat (limited to 'libmaple/nvic.h')
-rw-r--r--libmaple/nvic.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/libmaple/nvic.h b/libmaple/nvic.h
index 1630bc1..e3b052d 100644
--- a/libmaple/nvic.h
+++ b/libmaple/nvic.h
@@ -27,6 +27,20 @@
/**
* @file nvic.h
* @brief Nested vector interrupt controller support.
+ *
+ * Basic usage:
+ *
+ * @code
+ * // Initialise the interrupt controller and point to the vector
+ * // table at the start of flash.
+ * nvic_init(0x08000000, 0);
+ * // Bind in a timer interrupt handler
+ * timer_attach_interrupt(TIMER_CC1_INTERRUPT, handler);
+ * // Optionally set the priority
+ * nvic_irq_set_priority(NVIC_TIMER1_CC, 5);
+ * // All done, enable all interrupts
+ * nvic_globalirq_enable();
+ * @endcode
*/
#ifndef _NVIC_H_
@@ -146,8 +160,22 @@ typedef enum nvic_irq_num {
#endif
} nvic_irq_num;
+/*
+ * Initialises the interrupt controller and sets all interrupts to the
+ * lowest priority.
+ *
+ * For stand-alone products, the base address is normally the start of
+ * flash (0x08000000).
+ *
+ * @param vector_table_address base address of the vector table
+ */
void nvic_init(uint32 vector_table_address, uint32 offset);
+
+/**
+ * Sets the base address of the vector table.
+ */
void nvic_set_vector_table(uint32 address, uint32 offset);
+
void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority);
/**