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author | Marti Bolivar <mbolivar@leaflabs.com> | 2012-06-26 18:24:49 -0400 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2012-06-26 18:32:57 -0400 |
commit | f005bd3a5c087e3d5559f2858a1e7898a4f92a8d (patch) | |
tree | 0701628a68056f7b5f92d5a5af5f281f58e6a71e /libmaple/nvic.c | |
parent | 761e059962e8f53f3cceef61d65bf2bf3025319a (diff) | |
parent | c6073e4886da4606679bc3e9d770c9cff9390597 (diff) | |
download | librambutan-f005bd3a5c087e3d5559f2858a1e7898a4f92a8d.tar.gz librambutan-f005bd3a5c087e3d5559f2858a1e7898a4f92a8d.zip |
Merge branch 'wip-family-support'
Merge the long-lived (too long; future changes like these will need to
proceed more incrementally) development branch of libmaple, containing
experimental STM32F2 and STM32F1 value line support, into master.
This required many changes to the structure of the library. The most
important structural reorganizations occurred in:
- 954f9e5: moves public headers to include directories
- 3efa313: uses "series" instead of "family"
- c0d60e3: adds board files to the build system, to make it easier to
add new boards
- 096d86c: adds build logic for targeting different STM32 series
(e.g. STM32F1, STM32F2)
This last commit in particular (096d86c) is the basis for the
repartitioning of libmaple into portable sections, which work on all
supported MCUs, and nonportable sections, which are segregated into
separate directories and contain all series-specific code. Moving
existing STM32F1-only code into libmaple/stm32f1 and wirish/stm32f1,
along with adding equivalents under .../stm32f2 directories, was the
principal project of this branch.
Important API changes occur in several places. Existing code is still
expected to work on STM32F1 targets, but there have been many
deprecations. A detailed changelog explaining the situation needs to
be prepared.
F2 and F1 value line support is not complete; the merge is proceeding
prematurely in this respect. We've been getting more libmaple patches
from the community lately, and I'm worried that the merge conflicts
with the old tree structure will become painful to manage.
Conflicts:
Makefile
Resolved Makefile conflicts manually; this required propagating
-Xlinker usage into support/make/target-config.mk.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/nvic.c')
-rw-r--r-- | libmaple/nvic.c | 34 |
1 files changed, 19 insertions, 15 deletions
diff --git a/libmaple/nvic.c b/libmaple/nvic.c index 345c850..fe7c7bc 100644 --- a/libmaple/nvic.c +++ b/libmaple/nvic.c @@ -25,13 +25,13 @@ *****************************************************************************/ /** - * @file nvic.c + * @file libmaple/nvic.c * @brief Nested vector interrupt controller support. */ -#include "nvic.h" -#include "scb.h" -#include "stm32.h" +#include <libmaple/nvic.h> +#include <libmaple/scb.h> +#include <libmaple/stm32.h> /** * @brief Set interrupt priority for an interrupt line @@ -46,7 +46,7 @@ */ void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority) { if (irqn < 0) { - /* This interrupt is in the system handler block */ + /* This interrupt is in the system handler block */ SCB_BASE->SHP[((uint32)irqn & 0xF) - 4] = (priority & 0xF) << 4; } else { NVIC_BASE->IP[irqn] = (priority & 0xF) << 4; @@ -54,16 +54,12 @@ void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority) { } /** - * @brief Initialize the NVIC - * @param vector_table_address Vector table base address. - * @param offset Offset from vector_table_address. Some restrictions - * apply to the use of nonzero offsets; see ST RM0008 - * and the ARM Cortex M3 Technical Reference Manual. + * @brief Initialize the NVIC, setting interrupts to a default priority. */ -void nvic_init(uint32 vector_table_address, uint32 offset) { +void nvic_init(uint32 address, uint32 offset) { uint32 i; - nvic_set_vector_table(vector_table_address, offset); + nvic_set_vector_table(address, offset); /* * Lower priority level for all peripheral interrupts to lowest @@ -78,10 +74,18 @@ void nvic_init(uint32 vector_table_address, uint32 offset) { } /** - * Reset the vector table address. + * @brief Set the vector table base address. + * + * For stand-alone products, the vector table base address is normally + * the start of Flash (0x08000000). + * + * @param address Vector table base address. + * @param offset Offset from address. Some restrictions apply to the + * use of nonzero offsets; see the ARM Cortex M3 + * Technical Reference Manual. */ -void nvic_set_vector_table(uint32 addr, uint32 offset) { - SCB_BASE->VTOR = addr | (offset & 0x1FFFFF80); +void nvic_set_vector_table(uint32 address, uint32 offset) { + SCB_BASE->VTOR = address | (offset & 0x1FFFFF80); } /** |