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author | bnewbold <bnewbold@robocracy.org> | 2010-08-31 17:39:46 -0400 |
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committer | bnewbold <bnewbold@robocracy.org> | 2010-08-31 17:39:46 -0400 |
commit | 02d7b08f0497096f21e41922e0efb54c4ef33bab (patch) | |
tree | a7e04293efcba70f37cffcd03c0fcc4c0be7858a /libmaple/nvic.c | |
parent | b2dd49c3141d8a21a4e7c7ef51dee7329f847c30 (diff) | |
parent | e03d58f4dab4176514924baa3a1ff430bf5819b8 (diff) | |
download | librambutan-02d7b08f0497096f21e41922e0efb54c4ef33bab.tar.gz librambutan-02d7b08f0497096f21e41922e0efb54c4ef33bab.zip |
Merge maple-native changes into portable
This compiles for both maple and maple_native but is untested.
Diffstat (limited to 'libmaple/nvic.c')
-rw-r--r-- | libmaple/nvic.c | 34 |
1 files changed, 10 insertions, 24 deletions
diff --git a/libmaple/nvic.c b/libmaple/nvic.c index d8745a4..7aef26d 100644 --- a/libmaple/nvic.c +++ b/libmaple/nvic.c @@ -32,16 +32,6 @@ #include "nvic.h" #include "systick.h" -void nvic_disable_interrupts(void) { - /* Turn off all interrupts */ - REG_SET(NVIC_ICER0, 0xFFFFFFFF); - REG_SET(NVIC_ICER1, 0xFFFFFFFF); - - /* Turn off systick exception */ - REG_CLEAR_BIT(SYSTICK_CSR, 0); -} - - void nvic_set_vector_table(uint32 addr, uint32 offset) { __write(SCB_VTOR, (uint32)addr | (offset & 0x1FFFFF80)); } @@ -49,33 +39,29 @@ void nvic_set_vector_table(uint32 addr, uint32 offset) { /** * @brief turn on interrupt number n - * @param[in] n interrupt number + * @param n interrupt number */ -void nvic_enable_interrupt(uint32 n) { - if (n >= NVIC_NR_INTERRUPTS) { - return; - } - +void nvic_irq_enable(uint32 n) { if (n < 32) { REG_SET_BIT(NVIC_ISER0, n); - } else { + } else if(n < 64) { REG_SET_BIT(NVIC_ISER1, n - 32); + } else { + REG_SET_BIT(NVIC_ISER2, n - 64); } } /** * @brief turn off interrupt number n - * @param[in] n interrupt number + * @param n interrupt number */ -void nvic_disable_interrupt(uint32 n) { - if (n >= NVIC_NR_INTERRUPTS) { - return; - } - +void nvic_irq_disable(uint32 n) { if (n < 32) { REG_SET_BIT(NVIC_ICER0, n); - } else { + } else if(n < 64) { REG_SET_BIT(NVIC_ICER1, n - 32); + } else { + REG_SET_BIT(NVIC_ICER2, n - 64); } } |