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authorMarti Bolivar <mbolivar@leaflabs.com>2011-11-16 13:51:55 -0500
committerMarti Bolivar <mbolivar@leaflabs.com>2012-04-11 16:56:51 -0400
commitfa7a177a0cb6c1201912d9fcdfe6d86edffb9d79 (patch)
treedfab78b0830c83c8353db151247160cd6691ce5d /libmaple/include
parentb6290890b64d5188f75527b979c5c7912547be9b (diff)
downloadlibrambutan-fa7a177a0cb6c1201912d9fcdfe6d86edffb9d79.tar.gz
librambutan-fa7a177a0cb6c1201912d9fcdfe6d86edffb9d79.zip
Move Flash support for STM32F1 to libmaple/stm32f1/.
This is a backwards-compatible change. The Flash registers on the STM32F2 line are different than on STM32F1. Therefore, move the register map and bit definitions to new libmaple/stm32f1/include/family/flash.h. Move flash_enable_prefetch() from libmaple/flash.c to new libmaple/stm32f1/flash.c. The remaining pieces of libmaple/flash.c use a common subset of the Flash registers, so they're's portable to F2, and that's all we're currently interested in. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple/include')
-rw-r--r--libmaple/include/libmaple/flash.h84
1 files changed, 1 insertions, 83 deletions
diff --git a/libmaple/include/libmaple/flash.h b/libmaple/include/libmaple/flash.h
index e28ea28..bbe516d 100644
--- a/libmaple/include/libmaple/flash.h
+++ b/libmaple/include/libmaple/flash.h
@@ -37,91 +37,9 @@
extern "C"{
#endif
+#include <family/flash.h>
#include <libmaple/libmaple_types.h>
-/** Flash register map type */
-typedef struct flash_reg_map {
- __io uint32 ACR; /**< Access control register */
- __io uint32 KEYR; /**< Key register */
- __io uint32 OPTKEYR; /**< OPTKEY register */
- __io uint32 SR; /**< Status register */
- __io uint32 CR; /**< Control register */
- __io uint32 AR; /**< Address register */
- __io uint32 OBR; /**< Option byte register */
- __io uint32 WRPR; /**< Write protection register */
-} flash_reg_map;
-
-/** Flash register map base pointer */
-#define FLASH_BASE ((struct flash_reg_map*)0x40022000)
-
-/*
- * Register bit definitions
- */
-
-/* Access control register */
-
-#define FLASH_ACR_PRFTBS_BIT 5
-#define FLASH_ACR_PRFTBE_BIT 4
-#define FLASH_ACR_HLFCYA_BIT 3
-
-#define FLASH_ACR_PRFTBS BIT(FLASH_ACR_PRFTBS_BIT)
-#define FLASH_ACR_PRFTBE BIT(FLASH_ACR_PRFTBE_BIT)
-#define FLASH_ACR_HLFCYA BIT(FLASH_ACR_HLFCYA_BIT)
-#define FLASH_ACR_LATENCY 0x7
-
-/* Status register */
-
-#define FLASH_SR_EOP_BIT 5
-#define FLASH_SR_WRPRTERR_BIT 4
-#define FLASH_SR_PGERR_BIT 2
-#define FLASH_SR_BSY_BIT 0
-
-#define FLASH_SR_EOP BIT(FLASH_SR_EOP_BIT)
-#define FLASH_SR_WRPRTERR BIT(FLASH_SR_WRPRTERR_BIT)
-#define FLASH_SR_PGERR BIT(FLASH_SR_PGERR_BIT)
-#define FLASH_SR_BSY BIT(FLASH_SR_BSY_BIT)
-
-/* Control register */
-
-#define FLASH_CR_EOPIE_BIT 12
-#define FLASH_CR_ERRIE_BIT 10
-#define FLASH_CR_OPTWRE_BIT 9
-#define FLASH_CR_LOCK_BIT 7
-#define FLASH_CR_STRT_BIT 6
-#define FLASH_CR_OPTER_BIT 5
-#define FLASH_CR_OPTPG_BIT 4
-#define FLASH_CR_MER_BIT 2
-#define FLASH_CR_PER_BIT 1
-#define FLASH_CR_PG_BIT 0
-
-#define FLASH_CR_EOPIE BIT(FLASH_CR_EOPIE_BIT)
-#define FLASH_CR_ERRIE BIT(FLASH_CR_ERRIE_BIT)
-#define FLASH_CR_OPTWRE BIT(FLASH_CR_OPTWRE_BIT)
-#define FLASH_CR_LOCK BIT(FLASH_CR_LOCK_BIT)
-#define FLASH_CR_STRT BIT(FLASH_CR_STRT_BIT)
-#define FLASH_CR_OPTER BIT(FLASH_CR_OPTER_BIT)
-#define FLASH_CR_OPTPG BIT(FLASH_CR_OPTPG_BIT)
-#define FLASH_CR_MER BIT(FLASH_CR_MER_BIT)
-#define FLASH_CR_PER BIT(FLASH_CR_PER_BIT)
-#define FLASH_CR_PG BIT(FLASH_CR_PG_BIT)
-
-/* Option byte register */
-
-#define FLASH_OBR_nRST_STDBY_BIT 4
-#define FLASH_OBR_nRST_STOP_BIT 3
-#define FLASH_OBR_WDG_SW_BIT 2
-#define FLASH_OBR_RDPRT_BIT 1
-#define FLASH_OBR_OPTERR_BIT 0
-
-#define FLASH_OBR_DATA1 (0xFF << 18)
-#define FLASH_OBR_DATA0 (0xFF << 10)
-#define FLASH_OBR_USER 0x3FF
-#define FLASH_OBR_nRST_STDBY BIT(FLASH_OBR_nRST_STDBY_BIT)
-#define FLASH_OBR_nRST_STOP BIT(FLASH_OBR_nRST_STOP_BIT)
-#define FLASH_OBR_WDG_SW BIT(FLASH_OBR_WDG_SW_BIT)
-#define FLASH_OBR_RDPRT BIT(FLASH_OBR_RDPRT_BIT)
-#define FLASH_OBR_OPTERR BIT(FLASH_OBR_OPTERR_BIT)
-
/*
* Setup routines
*/