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authorMarti Bolivar <mbolivar@leaflabs.com>2011-03-08 12:54:33 -0500
committerMarti Bolivar <mbolivar@leaflabs.com>2011-03-08 12:54:33 -0500
commit8241a4c640d036faa148350219ad3deea72a23c2 (patch)
tree33aa97b03a2cb91925b33a800eb6e5638e691b49 /libmaple/fsmc.c
parent33a10e4f938f99f71ddeb65d71fe59efef1ae8b0 (diff)
downloadlibrambutan-8241a4c640d036faa148350219ad3deea72a23c2.tar.gz
librambutan-8241a4c640d036faa148350219ad3deea72a23c2.zip
Separated GPIO config to a separate FSMC routine.
Diffstat (limited to 'libmaple/fsmc.c')
-rw-r--r--libmaple/fsmc.c20
1 files changed, 12 insertions, 8 deletions
diff --git a/libmaple/fsmc.c b/libmaple/fsmc.c
index 42e0eb1..db77ff1 100644
--- a/libmaple/fsmc.c
+++ b/libmaple/fsmc.c
@@ -31,14 +31,7 @@
#include "gpio.h"
#include "fsmc.h"
-/* Sets up the FSMC peripheral to use the SRAM chip on the maple
- * native as an external segment of system memory space. This
- * implementation is for the IS62WV51216BLL 8mbit chip (55ns
- * timing) */
-void fsmc_native_sram_init(void) {
- FSMC_Bank *bank;
-
- /* First we setup all the GPIO pins. */
+void fsmc_init_gpios(void) {
/* Data lines... */
gpio_set_mode(GPIOD_BASE, 0, MODE_AF_OUTPUT_PP); /* D2 */
gpio_set_mode(GPIOD_BASE, 1, MODE_AF_OUTPUT_PP); /* D3 */
@@ -89,6 +82,17 @@ void fsmc_native_sram_init(void) {
gpio_set_mode(GPIOE_BASE, 0, MODE_AF_OUTPUT_PP); /* NBL0 */
gpio_set_mode(GPIOE_BASE, 1, MODE_AF_OUTPUT_PP); /* NBL1 */
+}
+
+/* Sets up the FSMC peripheral to use the SRAM chip on the maple
+ * native as an external segment of system memory space. This
+ * implementation is for the IS62WV51216BLL 8mbit chip (55ns
+ * timing) */
+void fsmc_native_sram_init(void) {
+ FSMC_Bank *bank;
+
+ /* First set up the GPIO pins */
+ fsmc_init_gpios();
/* Next enable the clock */
rcc_clk_enable(RCC_FSMC);