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authorPerry Hung <iperry@alum.mit.edu>2010-03-30 22:50:18 -0400
committerPerry Hung <iperry@alum.mit.edu>2010-03-30 22:51:28 -0400
commit869ed39e4c28ebb9813a8b28192d4ca92f72bf22 (patch)
tree6293c34e1dc96ae3f7c0bfdd926a714c03062ae2 /libmaple/flash.c
parent2c33d55bae8f9e0e009634072ab05302fc734a65 (diff)
downloadlibrambutan-869ed39e4c28ebb9813a8b28192d4ca92f72bf22.tar.gz
librambutan-869ed39e4c28ebb9813a8b28192d4ca92f72bf22.zip
Removed STM32 flash code, replaced with barebones hacks for now.
At this point, there shouldn't be any STM code being compiled and linked against. There are still a bunch of STM header includes, though.
Diffstat (limited to 'libmaple/flash.c')
-rw-r--r--libmaple/flash.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/libmaple/flash.c b/libmaple/flash.c
new file mode 100644
index 0000000..a3ee26b
--- /dev/null
+++ b/libmaple/flash.c
@@ -0,0 +1,29 @@
+#include "libmaple.h"
+#include "flash.h"
+
+#define ACR_PRFTBE ((uint32)0xFFFFFFEF)
+#define ACR_PRFTBE_ENABLE ((uint32)0x00000010) /* FLASH Prefetch Buffer Enable */
+#define ACR_PRFTBE_DISABLE ((uint32)0x00000000) /* FLASH Prefetch Buffer Disable */
+
+#define ACR_LATENCY ((uint32)0x00000038)
+#define ACR_LATENCY_0 ((uint32)0x00000000) /* FLASH Zero Latency cycle */
+#define ACR_LATENCY_1 ((uint32)0x00000001) /* FLASH One Latency cycle */
+#define ACR_LATENCY_2 ((uint32)0x00000002) /* FLASH Two Latency cycles */
+
+void flash_enable_prefetch(void) {
+ uint32 acr = __read(FLASH_ACR);
+
+ acr &= ACR_PRFTBE;
+ acr |= ACR_PRFTBE_ENABLE;
+
+ __write(FLASH_ACR, acr);
+}
+
+void flash_set_latency(void) {
+ uint32 acr = __read(FLASH_ACR);
+
+ acr &= ACR_LATENCY;
+ acr |= ACR_LATENCY_2;
+
+ __write(FLASH_ACR, acr);
+}