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author | Marti Bolivar <mbolivar@leaflabs.com> | 2012-04-09 13:56:03 -0400 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2012-04-11 16:56:56 -0400 |
commit | 702d6495985451c7d37a7a46c639e694887a84c1 (patch) | |
tree | 9f97257c5bfba1e4a7288760047f484b2b0a0423 | |
parent | fbd55a2647f4412ba51f1a54c1af49508f863cba (diff) | |
download | librambutan-702d6495985451c7d37a7a46c639e694887a84c1.tar.gz librambutan-702d6495985451c7d37a7a46c639e694887a84c1.zip |
stm32f2/rcc: Fix timer rcc_clk_id enumerators.
The timer enumerators are different tokens on F2 than they are on F1.
This is wrong (breaks portability), so fix it, and update the F2
rcc_dev_info table to match.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
-rw-r--r-- | libmaple/stm32f2/include/series/rcc.h | 28 | ||||
-rw-r--r-- | libmaple/stm32f2/rcc.c | 72 |
2 files changed, 50 insertions, 50 deletions
diff --git a/libmaple/stm32f2/include/series/rcc.h b/libmaple/stm32f2/include/series/rcc.h index 79bdf73..540eb66 100644 --- a/libmaple/stm32f2/include/series/rcc.h +++ b/libmaple/stm32f2/include/series/rcc.h @@ -807,18 +807,18 @@ typedef enum rcc_clk_id { RCC_SPI3, RCC_SPI2, RCC_WWDG, - RCC_TIM14, - RCC_TIM13, - RCC_TIM12, - RCC_TIM7, - RCC_TIM6, - RCC_TIM5, - RCC_TIM4, - RCC_TIM3, - RCC_TIM2, - RCC_TIM11, - RCC_TIM10, - RCC_TIM9, + RCC_TIMER14, + RCC_TIMER13, + RCC_TIMER12, + RCC_TIMER7, + RCC_TIMER6, + RCC_TIMER5, + RCC_TIMER4, + RCC_TIMER3, + RCC_TIMER2, + RCC_TIMER11, + RCC_TIMER10, + RCC_TIMER9, RCC_SYSCFG, RCC_SPI1, RCC_SDIO, @@ -827,8 +827,8 @@ typedef enum rcc_clk_id { RCC_ADC1, RCC_USART6, RCC_USART1, - RCC_TIM8, - RCC_TIM1, + RCC_TIMER8, + RCC_TIMER1, } rcc_clk_id; /** diff --git a/libmaple/stm32f2/rcc.c b/libmaple/stm32f2/rcc.c index 46e6565..8a91f30 100644 --- a/libmaple/stm32f2/rcc.c +++ b/libmaple/stm32f2/rcc.c @@ -70,44 +70,44 @@ const struct rcc_dev_info rcc_dev_table[] = { [RCC_FSMC] = DEV_ENTRY(AHB3, FSMC), /* APB1 */ - [RCC_DAC] = DEV_ENTRY(APB1, DAC), - [RCC_PWR] = DEV_ENTRY(APB1, PWR), - [RCC_CAN2] = DEV_ENTRY(APB1, CAN2), - [RCC_CAN1] = DEV_ENTRY(APB1, CAN1), - [RCC_I2C3] = DEV_ENTRY(APB1, I2C3), - [RCC_I2C2] = DEV_ENTRY(APB1, I2C2), - [RCC_I2C1] = DEV_ENTRY(APB1, I2C1), - [RCC_UART5] = DEV_ENTRY(APB1, UART5), - [RCC_UART4] = DEV_ENTRY(APB1, UART4), - [RCC_USART3] = DEV_ENTRY(APB1, USART3), - [RCC_USART2] = DEV_ENTRY(APB1, USART2), - [RCC_SPI3] = DEV_ENTRY(APB1, SPI3), - [RCC_SPI2] = DEV_ENTRY(APB1, SPI2), - [RCC_WWDG] = DEV_ENTRY(APB1, WWDG), - [RCC_TIM14] = DEV_ENTRY(APB1, TIM14), - [RCC_TIM13] = DEV_ENTRY(APB1, TIM13), - [RCC_TIM12] = DEV_ENTRY(APB1, TIM12), - [RCC_TIM7] = DEV_ENTRY(APB1, TIM7), - [RCC_TIM6] = DEV_ENTRY(APB1, TIM6), - [RCC_TIM5] = DEV_ENTRY(APB1, TIM5), - [RCC_TIM4] = DEV_ENTRY(APB1, TIM4), - [RCC_TIM3] = DEV_ENTRY(APB1, TIM3), - [RCC_TIM2] = DEV_ENTRY(APB1, TIM2), + [RCC_DAC] = DEV_ENTRY(APB1, DAC), + [RCC_PWR] = DEV_ENTRY(APB1, PWR), + [RCC_CAN2] = DEV_ENTRY(APB1, CAN2), + [RCC_CAN1] = DEV_ENTRY(APB1, CAN1), + [RCC_I2C3] = DEV_ENTRY(APB1, I2C3), + [RCC_I2C2] = DEV_ENTRY(APB1, I2C2), + [RCC_I2C1] = DEV_ENTRY(APB1, I2C1), + [RCC_UART5] = DEV_ENTRY(APB1, UART5), + [RCC_UART4] = DEV_ENTRY(APB1, UART4), + [RCC_USART3] = DEV_ENTRY(APB1, USART3), + [RCC_USART2] = DEV_ENTRY(APB1, USART2), + [RCC_SPI3] = DEV_ENTRY(APB1, SPI3), + [RCC_SPI2] = DEV_ENTRY(APB1, SPI2), + [RCC_WWDG] = DEV_ENTRY(APB1, WWDG), + [RCC_TIMER14] = DEV_ENTRY(APB1, TIM14), + [RCC_TIMER13] = DEV_ENTRY(APB1, TIM13), + [RCC_TIMER12] = DEV_ENTRY(APB1, TIM12), + [RCC_TIMER7] = DEV_ENTRY(APB1, TIM7), + [RCC_TIMER6] = DEV_ENTRY(APB1, TIM6), + [RCC_TIMER5] = DEV_ENTRY(APB1, TIM5), + [RCC_TIMER4] = DEV_ENTRY(APB1, TIM4), + [RCC_TIMER3] = DEV_ENTRY(APB1, TIM3), + [RCC_TIMER2] = DEV_ENTRY(APB1, TIM2), /* APB2 */ - [RCC_TIM11] = DEV_ENTRY(APB2, TIM11), - [RCC_TIM10] = DEV_ENTRY(APB2, TIM10), - [RCC_TIM9] = DEV_ENTRY(APB2, TIM9), - [RCC_SYSCFG] = DEV_ENTRY(APB2, SYSCFG), - [RCC_SPI1] = DEV_ENTRY(APB2, SPI1), - [RCC_SDIO] = DEV_ENTRY(APB2, SDIO), - [RCC_ADC3] = DEV_ENTRY(APB2, ADC3), - [RCC_ADC2] = DEV_ENTRY(APB2, ADC2), - [RCC_ADC1] = DEV_ENTRY(APB2, ADC1), - [RCC_USART6] = DEV_ENTRY(APB2, USART6), - [RCC_USART1] = DEV_ENTRY(APB2, USART1), - [RCC_TIM8] = DEV_ENTRY(APB2, TIM8), - [RCC_TIM1] = DEV_ENTRY(APB2, TIM1), + [RCC_TIMER11] = DEV_ENTRY(APB2, TIM11), + [RCC_TIMER10] = DEV_ENTRY(APB2, TIM10), + [RCC_TIMER9] = DEV_ENTRY(APB2, TIM9), + [RCC_SYSCFG] = DEV_ENTRY(APB2, SYSCFG), + [RCC_SPI1] = DEV_ENTRY(APB2, SPI1), + [RCC_SDIO] = DEV_ENTRY(APB2, SDIO), + [RCC_ADC3] = DEV_ENTRY(APB2, ADC3), + [RCC_ADC2] = DEV_ENTRY(APB2, ADC2), + [RCC_ADC1] = DEV_ENTRY(APB2, ADC1), + [RCC_USART6] = DEV_ENTRY(APB2, USART6), + [RCC_USART1] = DEV_ENTRY(APB2, USART1), + [RCC_TIMER8] = DEV_ENTRY(APB2, TIM8), + [RCC_TIMER1] = DEV_ENTRY(APB2, TIM1), }; /** |