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authorPerry Hung <iperry@alum.mit.edu>2010-03-26 01:03:58 -0400
committerPerry Hung <iperry@alum.mit.edu>2010-03-26 01:03:58 -0400
commit61cc63c1c172d6cf255aaa0f73c827224c600997 (patch)
treedac9ed1e5bf8fcd0d06ed68df858fb4e3f2993d4
parent35811da8ab196dea7b4590c56a91195eccd2f834 (diff)
downloadlibrambutan-61cc63c1c172d6cf255aaa0f73c827224c600997.tar.gz
librambutan-61cc63c1c172d6cf255aaa0f73c827224c600997.zip
Silly indent issue. 4 space tabs to 3 space tabs.
-rw-r--r--src/lib/rcc.c136
-rw-r--r--src/wiring/wiring.c8
2 files changed, 72 insertions, 72 deletions
diff --git a/src/lib/rcc.c b/src/lib/rcc.c
index 577f6e4..9cefcea 100644
--- a/src/lib/rcc.c
+++ b/src/lib/rcc.c
@@ -35,74 +35,74 @@
static void set_ahb_prescaler(uint32_t divider) {
- uint32_t tmp = __read(RCC_CFGR);
-
- switch (divider) {
- case SYSCLK_DIV_1:
- tmp &= ~HPRE;
- tmp |= SYSCLK_DIV_1;
- break;
- default:
- ASSERT(0);
- }
-
- __write(RCC_CFGR, tmp);
+ uint32_t tmp = __read(RCC_CFGR);
+
+ switch (divider) {
+ case SYSCLK_DIV_1:
+ tmp &= ~HPRE;
+ tmp |= SYSCLK_DIV_1;
+ break;
+ default:
+ ASSERT(0);
+ }
+
+ __write(RCC_CFGR, tmp);
}
static void set_apb1_prescaler(uint32_t divider) {
- uint32_t tmp = __read(RCC_CFGR);
-
- switch (divider) {
- case HCLK_DIV_2:
- tmp &= ~PPRE;
- tmp |= HCLK_DIV_2;
- break;
- default:
- ASSERT(0);
- }
-
- __write(RCC_CFGR, tmp);
+ uint32_t tmp = __read(RCC_CFGR);
+
+ switch (divider) {
+ case HCLK_DIV_2:
+ tmp &= ~PPRE;
+ tmp |= HCLK_DIV_2;
+ break;
+ default:
+ ASSERT(0);
+ }
+
+ __write(RCC_CFGR, tmp);
}
static void set_apb2_prescaler(uint32_t divider) {
- uint32_t tmp = __read(RCC_CFGR);
-
- switch (divider) {
- case HCLK_DIV_1:
- break;
- default:
- ASSERT(0);
- }
+ uint32_t tmp = __read(RCC_CFGR);
+
+ switch (divider) {
+ case HCLK_DIV_1:
+ break;
+ default:
+ ASSERT(0);
+ }
}
static void pll_init(void) {
- uint32_t tmp;
+ uint32_t tmp;
- /* set pll multiplier to 9 */
- tmp = __read(RCC_CFGR);
- tmp &= ~PLLMUL;
- tmp |= PLL_MUL_9;
+ /* set pll multiplier to 9 */
+ tmp = __read(RCC_CFGR);
+ tmp &= ~PLLMUL;
+ tmp |= PLL_MUL_9;
- /* set pll clock to be hse */
- tmp |= PLL_INPUT_CLK_HSE;
- __write(RCC_CFGR, tmp);
+ /* set pll clock to be hse */
+ tmp |= PLL_INPUT_CLK_HSE;
+ __write(RCC_CFGR, tmp);
- /* turn on the pll */
- __set_bits(RCC_CR, PLLON);
+ /* turn on the pll */
+ __set_bits(RCC_CR, PLLON);
- while(!__get_bits(RCC_CR, PLLRDY)) {
- asm volatile("nop");
- }
+ while(!__get_bits(RCC_CR, PLLRDY)) {
+ asm volatile("nop");
+ }
- /* select pll for system clock source */
- tmp = __read(RCC_CFGR);
- tmp &= ~0x3;
- tmp |= 0x2;
- __write(RCC_CFGR, tmp);
+ /* select pll for system clock source */
+ tmp = __read(RCC_CFGR);
+ tmp &= ~0x3;
+ tmp |= 0x2;
+ __write(RCC_CFGR, tmp);
- while (__get_bits(RCC_CFGR, 0x00000008) != 0x8) {
- asm volatile("nop");
- }
+ while (__get_bits(RCC_CFGR, 0x00000008) != 0x8) {
+ asm volatile("nop");
+ }
}
@@ -112,26 +112,26 @@ void rcc_enable(uint32 p) {
void rcc_init(void) {
-__set_bits(RCC_CR, HSEON);
+ __set_bits(RCC_CR, HSEON);
- while (!HSERDY) {
- asm volatile("nop");
- }
+ while (!HSERDY) {
+ asm volatile("nop");
+ }
- /* Enable Prefetch Buffer */
- FLASH_PrefetchBufferCmd( (u32)FLASH_PrefetchBuffer_Enable);
+ /* Enable Prefetch Buffer */
+ FLASH_PrefetchBufferCmd( (u32)FLASH_PrefetchBuffer_Enable);
- /* Flash 2 wait state */
- FLASH_SetLatency(FLASH_Latency_2);
+ /* Flash 2 wait state */
+ FLASH_SetLatency(FLASH_Latency_2);
- set_ahb_prescaler(SYSCLK_DIV_1);
- set_apb1_prescaler(HCLK_DIV_2);
- set_apb2_prescaler(HCLK_DIV_1);
+ set_ahb_prescaler(SYSCLK_DIV_1);
+ set_apb1_prescaler(HCLK_DIV_2);
+ set_apb2_prescaler(HCLK_DIV_1);
pll_init();
- __set_bits(RCC_APB2ENR, BIT(2));
- __set_bits(RCC_APB2ENR, BIT(3));
- __set_bits(RCC_APB2ENR, BIT(4));
- __set_bits(RCC_APB2ENR, BIT(5));
+ __set_bits(RCC_APB2ENR, BIT(2));
+ __set_bits(RCC_APB2ENR, BIT(3));
+ __set_bits(RCC_APB2ENR, BIT(4));
+ __set_bits(RCC_APB2ENR, BIT(5));
}
diff --git a/src/wiring/wiring.c b/src/wiring/wiring.c
index 6ef1968..367a22a 100644
--- a/src/wiring/wiring.c
+++ b/src/wiring/wiring.c
@@ -35,7 +35,7 @@ void RCC_Configuration(void);
void NVIC_Configuration(void);
void init(void) {
- rcc_init();
+ rcc_init();
NVIC_Configuration();
systick_init();
@@ -52,14 +52,14 @@ void init(void) {
void NVIC_Configuration(void) {
#ifdef VECT_TAB_ROM
- NVIC_SetVectorTable(USER_ADDR_ROM, 0x0);
+ NVIC_SetVectorTable(USER_ADDR_ROM, 0x0);
#warning writing to ROM
#elif defined VECT_TAB_RAM
- NVIC_SetVectorTable(USER_ADDR_RAM, 0x0);
+ NVIC_SetVectorTable(USER_ADDR_RAM, 0x0);
#warning writing to RAM
#else // VECT_TAB_BASE
/* Set the Vector Table base location at 0x08000000 */
- NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
+ NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
#endif
}