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authorbnewbold <bnewbold@robocracy.org>2015-03-02 23:59:10 -0800
committerbnewbold <bnewbold@robocracy.org>2015-03-03 00:15:30 -0800
commit0b0b759e9f0105d37b3c01846b83631d32c8d15f (patch)
treec820afb4ea50dd56eece9d4d391309325d07fb08
parent9ffadc10ab4afe50833915e9c2df0c87a4ceb718 (diff)
downloadlibrambutan-0b0b759e9f0105d37b3c01846b83631d32c8d15f.tar.gz
librambutan-0b0b759e9f0105d37b3c01846b83631d32c8d15f.zip
stm32f4: begin filling out F4 suport in headers
-rw-r--r--libmaple/stm32f2-f4/include/series/flash.h4
-rw-r--r--libmaple/stm32f2-f4/include/series/rcc.h6
-rw-r--r--libmaple/stm32f2-f4/include/series/stm32.h28
3 files changed, 36 insertions, 2 deletions
diff --git a/libmaple/stm32f2-f4/include/series/flash.h b/libmaple/stm32f2-f4/include/series/flash.h
index a3c3933..1da55cd 100644
--- a/libmaple/stm32f2-f4/include/series/flash.h
+++ b/libmaple/stm32f2-f4/include/series/flash.h
@@ -186,7 +186,11 @@ typedef struct flash_reg_map {
*/
/* Note that this value depends on a 2.7V--3.6V supply voltage */
+#if STM32_MCU_SERIES == STM32_SERIES_F4
+#define FLASH_SAFE_WAIT_STATES FLASH_WAIT_STATE_2
+#else
#define FLASH_SAFE_WAIT_STATES FLASH_WAIT_STATE_3
+#endif
/* Flash memory features available via ACR. */
enum {
diff --git a/libmaple/stm32f2-f4/include/series/rcc.h b/libmaple/stm32f2-f4/include/series/rcc.h
index 441a5a8..7cb7df1 100644
--- a/libmaple/stm32f2-f4/include/series/rcc.h
+++ b/libmaple/stm32f2-f4/include/series/rcc.h
@@ -128,7 +128,11 @@ typedef struct rcc_reg_map {
#define RCC_PLLCFGR_PLLSRC_HSE (0x1 << RCC_PLLCFGR_PLLSRC_BIT)
#define RCC_PLLCFGR_PLLP (0x3 << 16)
#define RCC_PLLCFGR_PLLN (0x1FF << 6)
-#define RCC_PLLCFGR_PLLM 0x1F
+#if STM32_MCU_SERIES == STM32_SERIES_F4
+# define RCC_PLLCFGR_PLLM 0x3F
+#else
+# define RCC_PLLCFGR_PLLM 0x1F
+#endif
/* Clock configuration register */
diff --git a/libmaple/stm32f2-f4/include/series/stm32.h b/libmaple/stm32f2-f4/include/series/stm32.h
index 9549b62..c2ad2f2 100644
--- a/libmaple/stm32f2-f4/include/series/stm32.h
+++ b/libmaple/stm32f2-f4/include/series/stm32.h
@@ -45,6 +45,17 @@ extern "C" {
# define STM32_NR_GPIO_PORTS 9
# define STM32_TIMER_MASK 0x7FFE /* TIMER1-TIMER14. */
# define STM32_SRAM_END ((void*)0x20020000)
+#elif defined(MCU_STM32F401VC)
+# define STM32_MCU_SERIES STM32_SERIES_F4
+# define STM32_NR_GPIO_PORTS 5
+# define STM32_TIMER_MASK 0x3E
+/* TODO: This value for STM32_SRAM_END is very generous */
+# define STM32_SRAM_END ((void*)0x20020000)
+#elif defined(MCU_STM32F401CC)
+# define STM32_MCU_SERIES STM32_SERIES_F4
+# define STM32_NR_GPIO_PORTS 3
+# define STM32_TIMER_MASK 0x3E
+# define STM32_SRAM_END ((void*)0x20010000)
#else
#warning "Unsupported or unspecified STM32F2 MCU."
#endif
@@ -71,7 +82,22 @@ extern "C" {
# define STM32_DELAY_US_MULT 20 /* FIXME: dummy value. */
# endif
#elif STM32_MCU_SERIES == STM32_SERIES_F4
-# error "STM32F4 support is unimplemented"
+# define STM32_NR_INTERRUPTS 84
+# define STM32_HAVE_FSMC 0
+# define STM32_HAVE_USB 0
+# define STM32_HAVE_DAC 0
+
+#ifndef STM32_PCLK1
+#define STM32_PCLK1 42000000U
+#endif
+
+#ifndef STM32_PCLK2
+#define STM32_PCLK2 84000000U
+#endif
+
+#ifndef STM32_DELAY_US_MULT
+#define STM32_DELAY_US_MULT 28 /* CYCLES_PER_MICROSECOND/3 */
+#endif
#else
# error "Invalid STM32 series for this header"
#endif