Made Native prototype B definitions in libmaple.h and boards.h; added

notes/native-pin-definitions.txt (copied from ST datasheet).

5 files changed, 441 insertions, 128 deletions

diff --git a/TODO b/TODO
index 3829be2..af8ef80 100644
--- a/TODO
+++ b/TODO
@@ -2,10 +2,11 @@ Quick TODO --------------------------------------------------------------------
 
 - write language unit test
 - more maple-specific example programs
+- maple mini serial bootloader HOWTO
+- maple and mini jtag HOWTO
 
 Peripherals -------------------------------------------------------------------
 
-- complete timers and interrupt stuff
 - I2C wrap up
 - SPI wrap up
 
@@ -16,9 +17,6 @@ EEPROM:
         uint8 read(int)
         void write(int, uint8)
 
-Servo:
-    modify timer code, "banks" of pins corresponding to a timer
-
 Firmata:
     edit Firmata.h for capabilities
 
diff --git a/libmaple/libmaple.h b/libmaple/libmaple.h
index 2a915b1..225d7c4 100644
--- a/libmaple/libmaple.h
+++ b/libmaple/libmaple.h
@@ -102,9 +102,9 @@
     /* e.g., LeafLabs Maple Native */
 
     #define NR_GPIO_PORTS             7
-    #define NR_GPIO_PINS             63
+    #define NR_GPIO_PINS            100
     #define NR_TIMERS                 8
-    #define NR_USART                  3
+    #define NR_USART                  5 /* NB: 4 and 5 are UART only */
     #define NR_FSMC                   1
     #define NR_DAC_PINS               2
 
diff --git a/notes/native-pin-definitions.txt b/notes/native-pin-definitions.txt
new file mode 100644
index 0000000..b871f89
--- /dev/null
+++ b/notes/native-pin-definitions.txt
@@ -0,0 +1,201 @@
+Maple Native (STM32F103ZE) pin definitions, by GPIO bank.
+
+Source: ST DOC ID 14611, Datasheet for STM32F103xC, STM32F103xD,
+STM32F103xE, Table 5, pp. 30--35.
+
+Some peripherals and extra functionality with less/no libmaple
+relevance (at time of writing) are given in "Other" following each
+bank's main table.  Non-default alternate functions are not listed. If
+wirish will/does remap the pin's main function after reset, the main
+function is listed under "Other".
+
+This document was prepared carefully and is believed to be complete
+and correct, but the final arbiter of truth is the ST datasheet.
+
+*** NB: UART 4 and 5 are NOT USART (columns are labeled appropriately).
+
+---------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     USART   SPI     DAC     5v?
+---------------------------------------------------------------------------
+PA0     123in0  2ch1etr -       -       -       2cts    -       -       -
+                5ch1
+                8etr
+PA1     123in1  5ch2    -       -       -       2rts    -       -       -
+                2ch2
+PA2     123in2  5ch3    -       -       -       2tx     -       -       -
+                2ch3
+PA3     123in3  5ch4    -       -       -       2rx     -       -       -
+                2ch4
+PA4     12in4   -       -       -       -       2ck     1nss    out1    -
+PA5     12in5   -       -       -       -       -       1sck    out2    -
+PA6     12in6   8bkin   -       -       -       -       1miso   -       -
+                3ch1
+PA7     12in7   8ch1n   -       -       -       -       1mosi   -       -
+                3ch2
+PA8     -       1ch1    -       -       -       1ck     -       -       Y
+PA9     -       1ch2    -       -       -       1tx     -       -       Y
+PA10    -       1ch3    -       -       -       1rx     -       -       Y
+PA11    -       1ch4    -       -       -       1cts    -       -       Y
+PA12    -       1etr    -       -       -       1rts    -       -       Y
+PA13    -       -       -       -       -       -       -       -       Y
+PA14    -       -       -       -       -       -       -       -       Y
+PA15    -       -       -       3ws     -       -       3nss    -       Y
+
+Other:
+
+PA0: WKUP
+PA8: MCO
+PA11: USBDM, CAN_RX
+PA12: USBDP, CAN_TX
+PA13: JTMS-SWDIO (default)
+PA14: JTCK-SWCLK (default)
+PA15: JTDI (default)
+
+-------------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     USART   SPI     DAC    5v? SDIO
+-------------------------------------------------------------------------------
+PB0     12in8   3ch3    -       -       -       -       -       -      -   -
+                8ch2n
+PB1     12in9   3ch4    -       -       -       -       -       -      -   -
+                8ch3n
+PB2     -       -       -       -       -       -       -       -      Y   -
+PB3     -       -       -       3ck     -       -       3sck    -      Y   -
+PB4     -       -       -       -       -       -       3miso   -      Y   -
+PB5     -       -       -       3sd     1smba   -       3mosi   -      -   -
+PB6     -       4ch1    -       -       1scl    -       -       -      Y   -
+PB7     -       4ch2    NADV    -       1sda    -       -       -      Y   -
+PB8     -       4ch3    -       -       -       -       -       -      Y   D4
+PB9     -       4ch4    -       -       -       -       -       -      Y   D5
+PB10    -       -       -       -       2scl    3tx     -       -      Y   -
+PB11    -       -       -       -       2sda    3rx     -       -      Y   -
+PB12    -       1bkin   -       2ws     2smba   3ck     2nss    -      Y   -
+PB13    -       1ch1n   -       2ck     -       3cts    2sck    -      Y   -
+PB14    -       1ch2n   -       -       -       3rts    2miso   -      Y   -
+PB15    -       1ch3n   -       2sd     -       -       2mosi   -      Y   -
+
+Other:
+
+PB2: BOOT1
+PB3: JTDO (default)
+PB4: NJTRST (default)
+
+-------------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     UART    SPI     DAC    5v? SDIO
+-------------------------------------------------------------------------------
+PC0     123in10 -       -       -       -       -       -       -      -   -
+PC1     123in11 -       -       -       -       -       -       -      -   -
+PC2     123in12 -       -       -       -       -       -       -      -   -
+PC3     123in13 -       -       -       -       -       -       -      -   -
+PC4     12in14  -       -       -       -       -       -       -      -   -
+PC5     12in15  -       -       -       -       -       -       -      -   -
+PC6     -       8ch1    -       2mck    -       -       -       -      Y   D6
+PC7     -       8ch2    -       3mck    -       -       -       -      Y   D7
+PC8     -       8ch3    -       -       -       -       -       -      Y   D0
+PC9     -       8ch4    -       -       -       -       -       -      Y   D1
+PC10    -       -       -       -       -       4tx     -       -      Y   D2
+PC11    -       -       -       -       -       4rx     -       -      Y   D3
+PC12    -       -       -       -       -       5tx     -       -      Y   CK
+PC13    -       -       -       -       -       -       -       -      -   -
+PC14    -       -       -       -       -       -       -       -      -   -
+PC15    -       -       -       -       -       -       -       -      -   -
+
+Other:
+
+PC13: TAMPER_RTC
+PC14: OSC32_IN
+PC15: OSC32_OUT
+
+-------------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     UART    SPI     DAC    5v? SDIO
+-------------------------------------------------------------------------------
+PD0     -       -       D2      -       -       -       -       -      Y   -
+PD1     -       -       D3      -       -       -       -       -      Y   -
+PD2     -       3etr    -       -       -       5rx     -       -      Y   CMD
+PD3     -       -       CLK     -       -       -       -       -      Y   -
+PD4     -       -       NOE     -       -       -       -       -      Y   -
+PD5     -       -       NWE     -       -       -       -       -      Y   -
+PD6     -       -       NWAIT   -       -       -       -       -      Y   -
+PD7     -       -       NE1     -       -       -       -       -      Y   -
+                        NCE2
+PD8     -       -       D13     -       -       -       -       -      Y   -
+PD9     -       -       D14     -       -       -       -       -      Y   -
+PD10    -       -       D15     -       -       -       -       -      Y   -
+PD11    -       -       A16     -       -       -       -       -      Y   -
+PD12    -       -       A17     -       -       -       -       -      Y   -
+PD13    -       -       A18     -       -       -       -       -      Y   -
+PD14    -       -       D0      -       -       -       -       -      Y   -
+PD15    -       -       D1      -       -       -       -       -      Y   -
+
+Other:
+
+PD0: OSC_IN (default)
+PD1: OSC_OUT (default)
+
+---------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     USART   SPI     DAC     5v?
+---------------------------------------------------------------------------
+PE0     -       4etr    NBL0    -       -       -       -       -       Y
+PE1     -       -       NBL1    -       -       -       -       -       Y
+PE2     -       -       A23     -       -       -       -       -       Y
+PE3     -       -       A19     -       -       -       -       -       Y
+PE4     -       -       A20     -       -       -       -       -       Y
+PE5     -       -       A21     -       -       -       -       -       Y
+PE6     -       -       A22     -       -       -       -       -       Y
+PE7     -       -       D4      -       -       -       -       -       Y
+PE8     -       -       D5      -       -       -       -       -       Y
+PE9     -       -       D6      -       -       -       -       -       Y
+PE10    -       -       D7      -       -       -       -       -       Y
+PE11    -       -       D8      -       -       -       -       -       Y
+PE12    -       -       D9      -       -       -       -       -       Y
+PE13    -       -       D10     -       -       -       -       -       Y
+PE14    -       -       D11     -       -       -       -       -       Y
+PE15    -       -       D12     -       -       -       -       -       Y
+
+Other:
+PE2: TRACECK
+PE3: TRACED0
+PE4: TRACED1
+PE5: TRACED2
+PE6: TRACED3
+
+---------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     USART   SPI     DAC     5v?
+---------------------------------------------------------------------------
+PF0     -       -       A0      -       -       -       -       -       Y
+PF1     -       -       A1      -       -       -       -       -       Y
+PF2     -       -       A2      -       -       -       -       -       Y
+PF3     -       -       A3      -       -       -       -       -       Y
+PF4     -       -       A4      -       -       -       -       -       Y
+PF5     -       -       A5      -       -       -       -       -       Y
+PF6     3in4    -       NIORD   -       -       -       -       -       -
+PF7     3in5    -       NREG    -       -       -       -       -       -
+PF8     3in6    -       NIOWR   -       -       -       -       -       -
+PF9     3in7    -       CD      -       -       -       -       -       -
+PF10    3in8    -       INTR    -       -       -       -       -       -
+PF11    -       -       NIOS16  -       -       -       -       -       Y
+PF12    -       -       A6      -       -       -       -       -       Y
+PF13    -       -       A7      -       -       -       -       -       Y
+PF14    -       -       A8      -       -       -       -       -       Y
+PF15    -       -       A9      -       -       -       -       -       Y
+
+---------------------------------------------------------------------------
+STM32   ADC     Timer   FSMC    I2S     I2C     USART   SPI     DAC     5v?
+---------------------------------------------------------------------------
+PG0     -       -       A10     -       -       -       -       -       Y
+PG1     -       -       A11     -       -       -       -       -       Y
+PG2     -       -       A12     -       -       -       -       -       Y
+PG3     -       -       A13     -       -       -       -       -       Y
+PG4     -       -       A14     -       -       -       -       -       Y
+PG5     -       -       A15     -       -       -       -       -       Y
+PG6     -       -       INT2    -       -       -       -       -       Y
+PG7     -       -       INT3    -       -       -       -       -       Y
+PG8     -       -       -       -       -       -       -       -       Y
+PG9     -       -       NE2     -       -       -       -       -       Y
+                        NCE3
+PG10    -       -       NCE4_1  -       -       -       -       -       Y
+                        NE3
+PG11    -       -       NCE4_2  -       -       -       -       -       Y
+PG12    -       -       NE4     -       -       -       -       -       Y
+PG13    -       -       A24     -       -       -       -       -       Y
+PG14    -       -       A25     -       -       -       -       -       Y
+PG15    -       -       -       -       -       -       -       -       Y
diff --git a/notes/pin-mapping.txt b/notes/pin-mapping.txt
index 6bf8cb6..24402ed 100644
--- a/notes/pin-mapping.txt
+++ b/notes/pin-mapping.txt
@@ -21,8 +21,12 @@ PC12                   DISC
 PD0                    OSC_IN
 PD1                    OSC_OUT
 
+Alternate function remaps:
+
+None?
+
 -------------------------------------------------------------------------------
-Pin    STM32 PIN   ADC    Timer          I2C        UART        SPI         F/T
+Pin    STM32 PIN   ADC    Timer          I2C        UART        SPI         5v?
 -------------------------------------------------------------------------------
 D0     PA3         ADC3   TIM2_CH4       -          USART2_RX   -           -
 D1     PA2         ADC2   TIM2_CH3       -          USART2_TX   -           -
@@ -90,7 +94,7 @@ PB9          DISC
 PD0          OSC_IN
 PD1          OSC_OUT
 
-Alternate function remaps (in ../wirish/boards.h BOARD_INIT):
+Alternate function remaps:
 
 Pin    Default   Remap
 ---    -------   -----
@@ -101,7 +105,7 @@ PA14   JTCK      GPIO
 PA13   JTMS      GPIO
 
 -------------------------------------------------------------------------------
-Pin    STM32 PIN   ADC    Timer          I2C        USART       SPI         F/T
+Pin    STM32 PIN   ADC    Timer          I2C        USART       SPI         5v?
 -------------------------------------------------------------------------------
 D0     PB11        -      -              I2C2_SDA   USART3_RX   -           Y
 D1     PB10        -      -              I2C2_SCL   USART3_TX   -           Y
@@ -126,9 +130,6 @@ D19    PB3         -      -              -          -           -           Y
 D20    PA15        -      -              -          -           -           Y
 D21    PA14        -      -              -          -           -           Y
 D22    PA13        -      -              -          -           -           Y
--------------------------------------------------------------------------------
-Pin    STM32 PIN   ADC    Timer          I2C        USART       SPI         F/T
--------------------------------------------------------------------------------
 # D23 is USBDP, but supports:  
        PA12        -      -              -          -           -           Y
 # D24 is USBDM, but supports:
@@ -145,3 +146,18 @@ D33    PB1         ADC9   TIM3_CH4       -          -           -           -
 
 TODO:
 - [?] JTAG pins for GPIO
+
+============
+Maple Native
+============
+
+Reserved pins:
+
+TODO
+
+Alternate function remaps:
+
+TODO
+
+The pin map on Maple Native is in flux.  However, the bank/port pin
+definitions are available in notes/native-pin-definitions.txt.
diff --git a/wirish/boards.h b/wirish/boards.h
index c4c4f25..f8505ab 100644
--- a/wirish/boards.h
+++ b/wirish/boards.h
@@ -161,7 +161,7 @@ typedef struct PinMapping {
         {GPIOC_BASE,  7, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
         /* D37/PC8 */
         {GPIOC_BASE,  8, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
-        /* PC9 (BUT) */
+        /* D38/PC9 (BUT) */
         {GPIOC_BASE,  9, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID}
     };
 
@@ -175,125 +175,223 @@ typedef struct PinMapping {
     #define CYCLES_PER_MICROSECOND  72
     #define SYSTICK_RELOAD_VAL      71999 /* takes a cycle to reload */
 
-    // TODO:
-    static __attribute__ ((unused)) PinMapping PIN_MAP[NR_GPIO_PINS] = {
-        /* D0/PA3 */
-        {GPIOA_BASE,  3,        ADC3, TIMER2_CH4_CCR},
-        /* D1/PA2 */
-        {GPIOA_BASE,  2,        ADC2, TIMER2_CH3_CCR},
-        /* D2/PA0 */
-        {GPIOA_BASE,  0,        ADC0, TIMER2_CH1_CCR},
-        /* D3/PA1 */
-        {GPIOA_BASE,  1,        ADC1, TIMER2_CH2_CCR},
-        /* D4/PB5 */
-        {GPIOB_BASE,  5, ADC_INVALID,  TIMER_INVALID},
-        /* D5/PB6 */
-        {GPIOB_BASE,  6, ADC_INVALID, TIMER4_CH1_CCR},
-        /* D6/PA8 */
-        {GPIOA_BASE,  8, ADC_INVALID, TIMER1_CH1_CCR},
-        /* D7/PA9 */
-        {GPIOA_BASE,  9, ADC_INVALID, TIMER1_CH2_CCR},
-        /* D8/PA10 */
-        {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR},
-        /* D9/PB7 */
-        {GPIOB_BASE,  7, ADC_INVALID, TIMER4_CH2_CCR},
-        /* D10/PA4 */
-        {GPIOA_BASE,  4,        ADC4,  TIMER_INVALID},
-        /* D11/PA7 */
-        {GPIOA_BASE,  7,        ADC7, TIMER3_CH2_CCR},
-        /* D12/PA6 */
-        {GPIOA_BASE,  6,        ADC6, TIMER3_CH1_CCR},
-        /* D13/PA5 */
-        {GPIOA_BASE,  5,        ADC5,  TIMER_INVALID},
-        /* D14/PB8 */
-        {GPIOB_BASE,  8, ADC_INVALID, TIMER4_CH3_CCR},
-
-        /* Little header  */
+    #define BOARD_LED_PIN           D21
+    #define BOARD_BUTTON_PIN        D18
 
-        /* D15/PC0 */
-        {GPIOC_BASE,  0,       ADC10,  TIMER_INVALID},
-        /* D16/PC1 */
-        {GPIOC_BASE,  1,       ADC11,  TIMER_INVALID},
-        /* D17/PC2 */
-        {GPIOC_BASE,  2,       ADC12,  TIMER_INVALID},
-        /* D18/PC3 */
-        {GPIOC_BASE,  3,       ADC13,  TIMER_INVALID},
-        /* D19/PC4 */
-        {GPIOC_BASE,  4,       ADC14,  TIMER_INVALID},
-        /* D20/PC5 */
-        {GPIOC_BASE,  5,       ADC15,  TIMER_INVALID},
-
-        /* External header  */
+    static __attribute__ ((unused)) PinMapping PIN_MAP[NR_GPIO_PINS] = {
+        /* Top header */
 
-        /* D21/PC13 */
-        {GPIOC_BASE, 13, ADC_INVALID,  TIMER_INVALID},
-        /* D22/PC14 */
-        {GPIOC_BASE, 14, ADC_INVALID,  TIMER_INVALID},
-        /* D23/PC15 */
-        {GPIOC_BASE, 15, ADC_INVALID,  TIMER_INVALID},
-        /* D24/PB9 */
-        {GPIOB_BASE,  9, ADC_INVALID, TIMER4_CH4_CCR},
-        /* D25/PD2 */
-        {GPIOD_BASE,  2, ADC_INVALID,  TIMER_INVALID},
-        /* D26/PC10 */
-        {GPIOC_BASE, 10, ADC_INVALID,  TIMER_INVALID},
-        /* D27/PB0 */
-        {GPIOB_BASE,  0,        ADC8,  TIMER3_CH3_CCR},
-        /* D28/PB1 */
-        {GPIOB_BASE,  1,        ADC9,  TIMER3_CH4_CCR},
-        /* D29/PB10 */
-        {GPIOB_BASE, 10, ADC_INVALID,  TIMER_INVALID},
-        /* D30/PB11 */
-        {GPIOB_BASE, 11, ADC_INVALID,  TIMER_INVALID},
-        /* D31/PB12 */
-        {GPIOB_BASE, 12, ADC_INVALID,  TIMER_INVALID},
-        /* D32/PB13 */
-        {GPIOB_BASE, 13, ADC_INVALID,  TIMER_INVALID},
-        /* D33/PB14 */
-        {GPIOB_BASE, 14, ADC_INVALID,  TIMER_INVALID},
-        /* D34/PB15 */
-        {GPIOB_BASE, 15, ADC_INVALID,  TIMER_INVALID},
-        /* D35/PC6 */
-        {GPIOC_BASE,  6, ADC_INVALID,  TIMER_INVALID},
-        /* D36/PC7 */
-        {GPIOC_BASE,  7, ADC_INVALID,  TIMER_INVALID},
-        /* D37/PC8 */
-        {GPIOC_BASE,  8, ADC_INVALID,  TIMER_INVALID},
-        /* PC9 (BUT) */
-        {GPIOC_BASE,  9, ADC_INVALID,  TIMER_INVALID}
+        /* D0/PB10 */
+        {GPIOB_BASE, 10, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D1/PB2 */
+        {GPIOB_BASE,  2, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D2/PB12 */
+        {GPIOB_BASE, 12, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D3/PB13 */
+        {GPIOB_BASE, 13, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D4/PB14 */
+        {GPIOB_BASE, 14, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D5/PB15 */
+        {GPIOB_BASE, 15, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D6/PC0 */
+        {GPIOC_BASE,  0,       ADC10,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D7/PC1 */
+        {GPIOC_BASE,  1,       ADC11,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D8/PC2 */
+        {GPIOC_BASE,  2,       ADC12,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D9/PC3 */
+        {GPIOC_BASE,  3,       ADC13,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D10/PC4 */
+        {GPIOC_BASE,  4,       ADC14,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D11/PC5 */
+        {GPIOC_BASE,  5,       ADC15,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D12/PC6 */
+        {GPIOC_BASE,  6, ADC_INVALID, TIMER8_CH1_CCR,  EXTI_CONFIG_PORTC,        TIMER8, 1},
+        /* D13/PC7 */
+        {GPIOC_BASE,  7, ADC_INVALID, TIMER8_CH2_CCR,  EXTI_CONFIG_PORTC,        TIMER8, 2},
+        /* D14/PC8 */
+        {GPIOC_BASE,  8, ADC_INVALID, TIMER8_CH3_CCR,  EXTI_CONFIG_PORTC,        TIMER8, 3},
+        /* D15/PC9 */
+        {GPIOC_BASE,  9, ADC_INVALID, TIMER8_CH4_CCR,  EXTI_CONFIG_PORTC,        TIMER8, 4},
+        /* D16/PC10 */
+        {GPIOC_BASE, 10, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D17/PC11 */
+        {GPIOC_BASE, 11, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D18/PC12 */
+        {GPIOC_BASE, 12, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D19/PC13 */
+        {GPIOC_BASE, 13, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D20/PC14 */
+        {GPIOC_BASE, 14, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D21/PC15 */
+        {GPIOC_BASE, 15, ADC_INVALID,              0,  EXTI_CONFIG_PORTC, TIMER_INVALID, TIMER_INVALID},
+        /* D22/PA8 */
+        {GPIOA_BASE,  8, ADC_INVALID, TIMER1_CH1_CCR,  EXTI_CONFIG_PORTA,        TIMER1, 1},
+        /* D23/PA9 */
+        {GPIOA_BASE,  9, ADC_INVALID, TIMER1_CH2_CCR,  EXTI_CONFIG_PORTA,        TIMER1, 2},
+        /* D24/PA10 */
+        {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR,  EXTI_CONFIG_PORTA,        TIMER1, 3},
+        /* D25/PB9 */
+        {GPIOB_BASE,  9, ADC_INVALID, TIMER4_CH4_CCR,  EXTI_CONFIG_PORTB,        TIMER4, 4},
+
+        /* Bottom header */
+
+        /* D26/PD2 */
+        {GPIOD_BASE,  2, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D27/PD3 */
+        {GPIOD_BASE,  3, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D28/PD6 */
+        {GPIOD_BASE,  6, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D29/PG11 */
+        {GPIOG_BASE, 11, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D30/PG12 */
+        {GPIOG_BASE, 12, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D31/PG13 */
+        {GPIOG_BASE, 13, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D32/PG14 */
+        {GPIOG_BASE, 14, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D33/PG8 */
+        {GPIOG_BASE,  8, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D34/PG7 */
+        {GPIOG_BASE,  7, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D35/PG6 */
+        {GPIOG_BASE,  6, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D36/PB5 */
+        {GPIOB_BASE,  5, ADC_INVALID,              0,  EXTI_CONFIG_PORTB, TIMER_INVALID, TIMER_INVALID},
+        /* D37/PB6 */
+        {GPIOB_BASE,  6, ADC_INVALID, TIMER4_CH1_CCR,  EXTI_CONFIG_PORTB,        TIMER4, 1},
+        /* D38/PB7 */
+        {GPIOB_BASE,  7, ADC_INVALID, TIMER4_CH2_CCR,  EXTI_CONFIG_PORTB,        TIMER4, 2},
+        /* D39/PF6 */
+        {GPIOF_BASE,  6,        ADC4,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D40/PF7 */
+        {GPIOF_BASE,  7,        ADC5,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D41/PF8 */
+        {GPIOF_BASE,  8,        ADC6,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D42/PF9 */
+        {GPIOF_BASE,  9,        ADC7,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D43/PF10 */
+        {GPIOF_BASE, 10,        ADC8,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D44/PF11 */
+        {GPIOF_BASE, 11, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D45/PB1 */
+        {GPIOB_BASE,  1,        ADC9, TIMER3_CH4_CCR,  EXTI_CONFIG_PORTB,        TIMER3, 4},
+        /* D46/PB0 */
+        {GPIOB_BASE,  0,        ADC8, TIMER3_CH3_CCR,  EXTI_CONFIG_PORTB,        TIMER3, 3},
+        /* D47/PA0 */
+        {GPIOA_BASE,  0,        ADC0, TIMER5_CH1_CCR,  EXTI_CONFIG_PORTA,        TIMER5, 1},
+        /* D48/PA1 */
+        {GPIOA_BASE,  1,        ADC1, TIMER5_CH2_CCR,  EXTI_CONFIG_PORTA,        TIMER5, 2}, /* FIXME (?) what to do about D48--D50
+                                                                                                also being TIMER2_CH[2,3,4]? */
+        /* D49/PA2 */
+        {GPIOA_BASE,  2,        ADC2, TIMER5_CH3_CCR,  EXTI_CONFIG_PORTA,        TIMER5, 3},
+        /* D50/PA3 */
+        {GPIOA_BASE,  3,        ADC3, TIMER5_CH4_CCR,  EXTI_CONFIG_PORTA,        TIMER5, 4},
+        /* D51/PA4 */
+        {GPIOA_BASE,  4,        ADC4,              0,  EXTI_CONFIG_PORTA, TIMER_INVALID, TIMER_INVALID},
+        /* D52/PA5 */
+        {GPIOA_BASE,  5,        ADC5,              0,  EXTI_CONFIG_PORTA, TIMER_INVALID, TIMER_INVALID},
+        /* D53/PA6 */
+        {GPIOA_BASE,  6,        ADC6, TIMER3_CH1_CCR,  EXTI_CONFIG_PORTA,        TIMER3, 1},
+        /* D54/PA7 */
+        {GPIOA_BASE,  7,        ADC7, TIMER3_CH2_CCR,  EXTI_CONFIG_PORTA,        TIMER3, 2},
+
+        /* Right (triple) header */
+
+        /* D55/PF0 */
+        {GPIOF_BASE,  0, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D56/PD11 */
+        {GPIOD_BASE, 11, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D57/PD14 */
+        {GPIOD_BASE, 14, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D58/PF1 */
+        {GPIOF_BASE,  1, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D59/PD12 */
+        {GPIOD_BASE, 12, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D60/PD15 */
+        {GPIOD_BASE, 15, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D61/PF2 */
+        {GPIOF_BASE,  2, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D62/PD13 */
+        {GPIOD_BASE, 13, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D63/PD0 */
+        {GPIOD_BASE,  0, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D64/PF3 */
+        {GPIOF_BASE,  3, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D65/PE3 */
+        {GPIOE_BASE,  3, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D66/PD1 */
+        {GPIOD_BASE,  1, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D67/PF4 */
+        {GPIOF_BASE,  4, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D68/PE4 */
+        {GPIOE_BASE,  4, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D69/PE7 */
+        {GPIOE_BASE,  7, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D70/PF5 */
+        {GPIOF_BASE,  5, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D71/PE5 */
+        {GPIOE_BASE,  5, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D72/PE8 */
+        {GPIOE_BASE,  8, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D73/PF12 */
+        {GPIOF_BASE, 12, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D74/PE6 */
+        {GPIOE_BASE,  6, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D75/PE9 */
+        {GPIOE_BASE,  9, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D76/PF13 */
+        {GPIOF_BASE, 13, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D77/PE10 */
+        {GPIOE_BASE, 10, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D78/PF14 */
+        {GPIOF_BASE, 14, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D79/PG9 */
+        {GPIOG_BASE,  9, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D80/PE11 */
+        {GPIOE_BASE, 11, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D81/PF15 */
+        {GPIOF_BASE, 15, ADC_INVALID,              0,  EXTI_CONFIG_PORTF, TIMER_INVALID, TIMER_INVALID},
+        /* D82/PG10 */
+        {GPIOG_BASE, 10, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D83/PE12 */
+        {GPIOE_BASE, 12, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D84/PG0 */
+        {GPIOG_BASE,  0, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D85/PD5 */
+        {GPIOD_BASE,  5, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D86/PE13 */
+        {GPIOE_BASE, 13, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D87/PG1 */
+        {GPIOG_BASE,  1, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D88/PD4 */
+        {GPIOD_BASE,  4, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D89/PE14 */
+        {GPIOE_BASE, 14, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D90/PG2 */
+        {GPIOG_BASE,  2, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D91/PE1 */
+        {GPIOE_BASE,  1, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D92/PE15 */
+        {GPIOE_BASE, 15, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D93/PG3 */
+        {GPIOG_BASE,  3, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D94/PE0 */
+        {GPIOE_BASE,  0, ADC_INVALID,              0,  EXTI_CONFIG_PORTE, TIMER_INVALID, TIMER_INVALID},
+        /* D95/PD8 */
+        {GPIOD_BASE,  8, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D96/PG4 */
+        {GPIOG_BASE,  4, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D97/PD9 */
+        {GPIOD_BASE,  9, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID},
+        /* D98/PG5 */
+        {GPIOG_BASE,  5, ADC_INVALID,              0,  EXTI_CONFIG_PORTG, TIMER_INVALID, TIMER_INVALID},
+        /* D99/PD10 */
+        {GPIOD_BASE, 10, ADC_INVALID,              0,  EXTI_CONFIG_PORTD, TIMER_INVALID, TIMER_INVALID}
     };
 
-    static __attribute__((unused)) ExtiInfo PIN_TO_EXTI_CHANNEL[NR_GPIO_PINS] =
-    {
-        /* D0/PA3 */
-        {EXTI3,  EXTI_CONFIG_PORTA},
-        /* D1/PA2 */
-        {EXTI2,  EXTI_CONFIG_PORTA},
-        /* D2/PA0 */
-        {EXTI0,  EXTI_CONFIG_PORTA},
-        /* D3/PA1 */
-        {EXTI1,  EXTI_CONFIG_PORTA},
-        /* D4/PB5 */
-        {EXTI5,  EXTI_CONFIG_PORTB},
-        /* D5/PB6 */
-        {EXTI6,  EXTI_CONFIG_PORTB},
-        /* D6/PA8 */
-        {EXTI8,  EXTI_CONFIG_PORTA},
-        /* D7/PA9 */
-        {EXTI9,  EXTI_CONFIG_PORTA},
-        /* D8/PA10 */
-        {EXTI10, EXTI_CONFIG_PORTA},
-        /* D9/PB7 */
-        {EXTI7,  EXTI_CONFIG_PORTB},
-        /* D10/PA4 */
-        {EXTI4,  EXTI_CONFIG_PORTA},
-        /* D11/PA7 */
-        {EXTI7,  EXTI_CONFIG_PORTA},
-        /* D12/PA6 */
-        {EXTI6,  EXTI_CONFIG_PORTA},
-        /* D13/PA5 */
-        {EXTI5,  EXTI_CONFIG_PORTA},
-    };
+    #define BOARD_INIT do {                           \
+        } while(0)
 
 #elif defined(BOARD_maple_mini)