From 2341d4d2fcc016a61e1c7fbd51cdca33a9bb22bb Mon Sep 17 00:00:00 2001 From: "\"Steven J. Hill\"" Date: Tue, 30 Aug 2005 03:39:43 +0000 Subject: This patch (and the one that got checked in for gdb-snapshot) hack the opcodes such that the MIPS32r2 instruction 'rdhwr' actually appears in the list of MIPS I instructions. This allows us to get disassembly for non-MIPS32r2 binaries. --- .../2.16.1/400-mips32r2-rdhwr-disassemble-hack.patch | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 toolchain/binutils/2.16.1/400-mips32r2-rdhwr-disassemble-hack.patch (limited to 'toolchain/binutils') diff --git a/toolchain/binutils/2.16.1/400-mips32r2-rdhwr-disassemble-hack.patch b/toolchain/binutils/2.16.1/400-mips32r2-rdhwr-disassemble-hack.patch new file mode 100644 index 000000000..94fc9b27f --- /dev/null +++ b/toolchain/binutils/2.16.1/400-mips32r2-rdhwr-disassemble-hack.patch @@ -0,0 +1,12 @@ +diff -ur binutils-2.16.1/opcodes/mips-opc.c binutils-2.16.1-patched/opcodes/mips-opc.c +--- binutils-2.16.1/opcodes/mips-opc.c 2005-03-03 05:49:50.000000000 -0600 ++++ binutils-2.16.1-patched/opcodes/mips-opc.c 2005-08-29 18:17:40.000000000 -0500 +@@ -923,7 +923,7 @@ + {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I1 }, + {"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, 0, I1 }, + {"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, 0, I1 }, +-{"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_t, 0, I33 }, ++{"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_t, 0, I33|I1 }, + {"rdpgpr", "d,w", 0x41400000, 0xffe007ff, WR_d, 0, I33 }, + {"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1|T3 }, + {"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_D|RD_T|FP_D, RD_MACC, MX }, -- cgit v1.2.3