From 14f48861b5cf5c45d81e4dd1130267e8ec86e5f3 Mon Sep 17 00:00:00 2001 From: Mischa Jonker Date: Thu, 2 May 2013 09:51:23 +0000 Subject: arc: Add ARC and ARC BE architecture Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs that can be used from deeply embedded to high performance host applications. Signed-off-by: Mischa Jonker Signed-off-by: Peter Korsgaard --- arch/Config.in | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch/Config.in') diff --git a/arch/Config.in b/arch/Config.in index 795f24f46..2006f1e0d 100644 --- a/arch/Config.in +++ b/arch/Config.in @@ -7,6 +7,20 @@ choice help Select the target architecture family to build for. +config BR2_arcle + bool "ARC (little endian)" + help + Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs + that can be used from deeply embedded to high performance host + applications. Little endian. + +config BR2_arceb + bool "ARC (big endian)" + help + Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs + that can be used from deeply embedded to high performance host + applications. Big endian. + config BR2_arm bool "ARM (little endian)" help @@ -175,6 +189,10 @@ config BR2_GCC_TARGET_ABI config BR2_GCC_TARGET_CPU string +if BR2_arcle || BR2_arceb +source "arch/Config.in.arc" +endif + if BR2_arm || BR2_armeb source "arch/Config.in.arm" endif -- cgit v1.2.3