169 files changed, 227558 insertions, 25782 deletions

diff --git a/target/device/Atmel/Config.in.at91 b/target/device/Atmel/AT91_Config.in
index 3d96f6f25..7838ad693 100644
--- a/target/device/Atmel/Config.in.at91
+++ b/target/device/Atmel/AT91_Config.in
@@ -112,12 +112,6 @@ config BR2_TARGET_AT91SAM9260EK
 	help
 	  The Atmel AT91SAM9260 Development Board
 
-config BR2_TARGET_AT91SAM9260PF
-	bool "Atmel AT91SAM9260 running from parallel flash"
-	depends BR2_TARGET_AT91SAM9260 || BR2_TARGET_AT91SAM9260A || BR2_TARGET_AT91SAM9XE
-	help
-	  Generic support for the Atmel AT91SAM9260 running from parallel flash
-
 config BR2_TARGET_AT91SAM9261EK
 	bool "Atmel AT91SAM9261EK"
 	depends BR2_TARGET_AT91SAM9261 || BR2_TARGET_AT91SAM9261S
diff --git a/target/device/Atmel/Config.in.avr32 b/target/device/Atmel/AVR32_Config.in
index 944f87693..6bbb02142 100644
--- a/target/device/Atmel/Config.in.avr32
+++ b/target/device/Atmel/AVR32_Config.in
@@ -35,28 +35,42 @@ config BR2_TARGET_AT32AP7002
 
 endchoice
 
-comment "Development Board support"
+comment "Development board support"
 	depends BR2_TARGET_AVR32
 
 choice
-	prompt "Development Board support"
+	prompt "Development board support"
 	depends BR2_TARGET_AVR32
-	default BR2_TARGET_AVR32_ATSTK1002
+	default BR2_TARGET_AVR32_ATSTK1000
 	help
 	  Select the specific AVR32 development board you wish to use.
 
 config BR2_TARGET_AVR32_ATSTK1002
-	bool "Atmel ATSTK1000/2 AVR32 Development Board Support"
+	bool "Atmel ATSTK1000/2 AVR32 development board support"
 	depends BR2_TARGET_AT32AP7000
 	select BR2_PACKAGE_LINUX
 	help
-	  The Atmel ATSTK1000 AVR32 Development Board
+	  The Atmel ATSTK1000 AVR32 Development Board.
 
 config BR2_TARGET_AVR32_ATNGW100
-	bool "Atmel AVR32 Network Gateway Board Support"
+	bool "Atmel AVR32 network gateway board support"
 	depends BR2_TARGET_AT32AP7000
 	select BR2_PACKAGE_LINUX
 	help
-	  The Atmel AVR32 Network Gateway Board
+	  The Atmel AVR32 Network Gateway Board.
+
+config BR2_TARGET_AVR32_ATNGW100_BASE
+	bool "Atmel AVR32 basic network gateway board support"
+	depends BR2_TARGET_AT32AP7000
+	select BR2_PACKAGE_LINUX
+	help
+	  Very simple configuration for the Atmel AVR32 Network Gateway Board.
+
+config BR2_TARGET_AVR32_ATNGW100_EXPANDED
+	bool "Atmel AVR32 expanded network gateway board support"
+	depends BR2_TARGET_AT32AP7000
+	select BR2_PACKAGE_LINUX
+	help
+	  The Atmel AVR32 Network Gateway Board expanded to include audio, video, and PS/2.
 
 endchoice
diff --git a/target/device/Atmel/Config.in b/target/device/Atmel/Config.in
index 2b1b466b8..1e016c1e6 100644
--- a/target/device/Atmel/Config.in
+++ b/target/device/Atmel/Config.in
@@ -5,24 +5,25 @@ menuconfig BR2_TARGET_ATMEL
 
 if BR2_TARGET_ATMEL
 
-source "target/device/Atmel/Config.in.at91"
-source "target/device/Atmel/Config.in.avr32"
+source "target/device/Atmel/AT91_Config.in"
+source "target/device/Atmel/AVR32_Config.in"
 
 config BR2_BOARD_NAME
 	string
-	default	"at91rm9200df"		if BR2_TARGET_AT91RM9200DF
-	default	"at91rm9200se"		if BR2_TARGET_AT91RM9200SE
-	default	"at91rm9200ek"		if BR2_TARGET_AT91RM9200EK
-	default	"at91rm9200dk"		if BR2_TARGET_AT91RM9200DK
-	default	"at91sam9260ek"		if BR2_TARGET_AT91SAM9260EK
-	default	"at91sam9260dfc"	if BR2_TARGET_AT91SAM9260DFC
-	default	"at91sam9260pf"		if BR2_TARGET_AT91SAM9260PF
-	default	"at91sam9261ek"		if BR2_TARGET_AT91SAM9261EK
-	default	"at91sam9262ek"		if BR2_TARGET_AT91SAM9262EK
-	default	"at91sam9263ek"		if BR2_TARGET_AT91SAM9263EK
-	default	"at91sam9xeek"		if BR2_TARGET_AT91SAM9XEEK
-	default	"atstk1002"		if BR2_TARGET_AVR32_ATSTK1002
-	default	"atngw100"		if BR2_TARGET_AVR32_ATNGW100
+	default	"at91rm9200df"		if	BR2_TARGET_AT91RM9200DF
+	default	"at91rm9200se"		if	BR2_TARGET_AT91RM9200SE
+	default	"at91rm9200ek"		if	BR2_TARGET_AT91RM9200EK
+	default	"at91rm9200dk"		if	BR2_TARGET_AT91RM9200DK
+	default	"at91sam9260ek"		if	BR2_TARGET_AT91SAM9260EK
+	default	"at91sam9260dfc"	if	BR2_TARGET_AT91SAM9260DFC
+	default	"at91sam9261ek"		if	BR2_TARGET_AT91SAM9261EK
+	default	"at91sam9262ek"		if	BR2_TARGET_AT91SAM9262EK
+	default	"at91sam9263ek"		if	BR2_TARGET_AT91SAM9263EK
+	default	"at91sam9xeek"		if	BR2_TARGET_AT91SAM9XEEK
+	default	"atstk1002"		if	BR2_TARGET_AVR32_ATSTK1002
+	default	"atngw100"		if	BR2_TARGET_AVR32_ATNGW100
+	default "atngw100-base"		if	BR2_TARGET_AVR32_ATNGW100_BASE
+	default "atngw100-expanded"	if  BR2_TARGET_AVR32_ATNGW100_EXPANDED
 
 config BR2_TARGET_AT91_ADVANCED_INFO
 	bool "Remove work in progress"
@@ -42,7 +43,7 @@ config BR2_AT91_LINUXPATCH_SITE
 	depends on BR2_TARGET_AT91
 	default "http://maxim.org.za/AT91RM9200/2.6"
 	help
-	  Main download location for AT91 Linux stuff
+	    Main download location for AT91 Linux stuff
 
 config BR2_TARGET_ATMEL_COPYTO
 	string "also copy the image to..."
@@ -60,7 +61,6 @@ config BR2_BOARD_PATH
 
 endmenu
 
-source "target/device/Atmel/u-boot/Config.in"
 
 source "target/device/Atmel/DataFlashBoot/Config.in"
 
diff --git a/target/device/Atmel/DataFlashBoot/DataflashBoot.mk b/target/device/Atmel/DataFlashBoot/DataflashBoot.mk
index 31da0821b..b0c5fff6e 100644
--- a/target/device/Atmel/DataFlashBoot/DataflashBoot.mk
+++ b/target/device/Atmel/DataFlashBoot/DataflashBoot.mk
@@ -5,9 +5,8 @@
 #############################################################
 DATAFLASHBOOT_VERSION:=1.05
 DATAFLASHBOOT_NAME:=DataflashBoot-$(DATAFLASHBOOT_VERSION)
-ATMEL_MIRROR:=$(strip $(subst ",, $(BR2_ATMEL_MIRROR)))
-#"))
-DATAFLASHBOOT_SITE:=$(ATMEL_MIRROR)
+ATMEL_MIRROR:=$(strip  $(subst ",, $(BR2_ATMEL_MIRROR)))
+DATAFLASHBOOT_SITE:=$(ATMEL_MIRROR)/Source
 DATAFLASHBOOT_SOURCE:=$(DATAFLASHBOOT_NAME).tar.bz2
 DATAFLASHBOOT_DIR:=$(PROJECT_BUILD_DIR)/$(DATAFLASHBOOT_NAME)
 DATAFLASHBOOT_BINARY:=$(DATAFLASHBOOT_NAME).bin
@@ -31,11 +30,11 @@ DataflashBoot-clean:
 DataflashBoot-dirclean:
 	rm -rf $(DATAFLASHBOOT_DIR)
 
-dataflash: $(DATAFLASHBOOT_DIR)/$(DATAFLASHBOOT_BINARY)
+dataflash:	 $(DATAFLASHBOOT_DIR)/$(DATAFLASHBOOT_BINARY)
 	mkdir -p $(BINARIES_DIR)
-	cp $(DATAFLASHBOOT_DIR)/$(DATAFLASHBOOT_BINARY) $(BINARIES_DIR)/$(BOARD_NAME)-$(DATAFLASHBOOT_BINARY)
-ifneq ($(TARGET_ATMEL_COPYTO),)
-	cp $(DATAFLASHBOOT_DIR)/$(DATAFLASHBOOT_BINARY) /tftpboot/$(BOARD_NAME)-$(DATAFLASHBOOT_BINARY)
+	cp $(DATAFLASHBOOT_DIR)/$(DATAFLASHBOOT_BINARY)	$(BINARIES_DIR)/$(BOARD_NAME)-$(DATAFLASHBOOT_BINARY)
+ifneq	($(TARGET_ATMEL_COPYTO),)
+	cp $(DATAFLASHBOOT_DIR)/$(DATAFLASHBOOT_BINARY)	/tftpboot/$(BOARD_NAME)-$(DATAFLASHBOOT_BINARY)
 endif
 
 #############################################################
diff --git a/target/device/Atmel/Linux/kernel-patches-2.6.20.4/linux-2.6.20.4-atmel.patch b/target/device/Atmel/Linux/kernel-patches-2.6.20.4/linux-2.6.20.4-atmel.patch
new file mode 100644
index 000000000..9cd333429
--- /dev/null
+++ b/target/device/Atmel/Linux/kernel-patches-2.6.20.4/linux-2.6.20.4-atmel.patch
@@ -0,0 +1,26777 @@
+diff -urN linux-2.6.20.4-0rig/arch/arm/configs/at91sam9263ek_defconfig linux-2.6.20.4-atmel/arch/arm/configs/at91sam9263ek_defconfig
+--- linux-2.6.20.4-0rig/arch/arm/configs/at91sam9263ek_defconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/configs/at91sam9263ek_defconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,1184 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.20-rc1
++# Mon Jan  8 16:06:54 2007
++#
++CONFIG_ARM=y
++# CONFIG_GENERIC_TIME is not set
++CONFIG_MMU=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# Code maturity level options
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++
++#
++# General setup
++#
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SWAP is not set
++CONFIG_SYSVIPC=y
++# CONFIG_IPC_NS is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_UTS_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SHMEM=y
++CONFIG_SLAB=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++# CONFIG_SLOB is not set
++
++#
++# Loadable module support
++#
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++
++#
++# Block layer
++#
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_DEFAULT_AS=y
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="anticipatory"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++CONFIG_ARCH_AT91=y
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_OMAP is not set
++
++#
++# Atmel AT91 System-on-Chip
++#
++# CONFIG_ARCH_AT91RM9200 is not set
++# CONFIG_ARCH_AT91SAM9260 is not set
++# CONFIG_ARCH_AT91SAM9261 is not set
++CONFIG_ARCH_AT91SAM9263=y
++
++#
++# AT91SAM9263 Board Type
++#
++CONFIG_MACH_AT91SAM9263EK=y
++
++#
++# AT91 Board Options
++#
++CONFIG_MTD_AT91_DATAFLASH_CARD=y
++# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
++
++#
++# AT91 Feature Selections
++#
++# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM926T=y
++CONFIG_CPU_32v5=y
++CONFIG_CPU_ABRT_EV5TJ=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++# CONFIG_ARM_THUMB is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
++
++#
++# Bus support
++#
++
++#
++# PCCARD (PCMCIA/CardBus) support
++#
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_PREEMPT is not set
++# CONFIG_NO_IDLE_HZ is not set
++CONFIG_HZ=100
++# CONFIG_AEABI is not set
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++# CONFIG_LEDS is not set
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
++# CONFIG_XIP_KERNEL is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++# CONFIG_VFP is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++# CONFIG_ARTHUR is not set
++
++#
++# Power management options
++#
++# CONFIG_PM is not set
++# CONFIG_APM is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++# CONFIG_NETDEBUG is not set
++CONFIG_PACKET=y
++# CONFIG_PACKET_MMAP is not set
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++# CONFIG_IP_PNP_DHCP is not set
++CONFIG_IP_PNP_BOOTP=y
++CONFIG_IP_PNP_RARP=y
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++
++#
++# DCCP Configuration (EXPERIMENTAL)
++#
++# CONFIG_IP_DCCP is not set
++
++#
++# SCTP Configuration (EXPERIMENTAL)
++#
++# CONFIG_IP_SCTP is not set
++
++#
++# TIPC Configuration (EXPERIMENTAL)
++#
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++
++#
++# QoS and/or fair queueing
++#
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_IEEE80211 is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++
++#
++# Connector - unified userspace <-> kernelspace linker
++#
++# CONFIG_CONNECTOR is not set
++
++#
++# Memory Technology Devices (MTD)
++#
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++# CONFIG_MTD_OBSOLETE_CHIPS is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=y
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++
++#
++# NAND Flash Device Drivers
++#
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++CONFIG_MTD_NAND_AT91=y
++# CONFIG_MTD_NAND_NANDSIM is not set
++
++#
++# OneNAND Flash Device Drivers
++#
++# CONFIG_MTD_ONENAND is not set
++
++#
++# Parallel port support
++#
++# CONFIG_PARPORT is not set
++
++#
++# Plug and Play support
++#
++
++#
++# Block devices
++#
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=8192
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++CONFIG_BLK_DEV_INITRD=y
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++
++#
++# SCSI low-level drivers
++#
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++
++#
++# Serial ATA (prod) and Parallel ATA (experimental) drivers
++#
++# CONFIG_ATA is not set
++
++#
++# Multi-device support (RAID and LVM)
++#
++# CONFIG_MD is not set
++
++#
++# Fusion MPT device support
++#
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# I2O device support
++#
++
++#
++# Network device support
++#
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++
++#
++# PHY device support
++#
++# CONFIG_PHYLIB is not set
++
++#
++# Ethernet (10 or 100Mbit)
++#
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++
++#
++# Ethernet (1000 Mbit)
++#
++
++#
++# Ethernet (10000 Mbit)
++#
++
++#
++# Token Ring devices
++#
++
++#
++# Wireless LAN (non-hamradio)
++#
++# CONFIG_NET_RADIO is not set
++
++#
++# Wan interfaces
++#
++# CONFIG_WAN is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++
++#
++# ISDN subsystem
++#
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_TSDEV=y
++CONFIG_INPUT_TSDEV_SCREEN_X=240
++CONFIG_INPUT_TSDEV_SCREEN_Y=320
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=y
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=256
++
++#
++# IPMI
++#
++# CONFIG_IPMI_HANDLER is not set
++
++#
++# Watchdog Cards
++#
++CONFIG_WATCHDOG=y
++CONFIG_WATCHDOG_NOWAYOUT=y
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_NVRAM is not set
++# CONFIG_DTLK is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++
++#
++# TPM devices
++#
++# CONFIG_TCG_TPM is not set
++
++#
++# I2C support
++#
++CONFIG_I2C=y
++CONFIG_I2C_CHARDEV=y
++
++#
++# I2C Algorithms
++#
++# CONFIG_I2C_ALGOBIT is not set
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_AT91=y
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_PCA is not set
++# CONFIG_I2C_PCA_ISA is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++
++#
++# Dallas's 1-wire bus
++#
++# CONFIG_W1 is not set
++
++#
++# Hardware Monitoring support
++#
++# CONFIG_HWMON is not set
++# CONFIG_HWMON_VID is not set
++
++#
++# Misc devices
++#
++# CONFIG_TIFM_CORE is not set
++
++#
++# LED devices
++#
++# CONFIG_NEW_LEDS is not set
++
++#
++# LED drivers
++#
++
++#
++# LED Triggers
++#
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++
++#
++# Digital Video Broadcasting Devices
++#
++# CONFIG_DVB is not set
++# CONFIG_USB_DABUSB is not set
++
++#
++# Graphics support
++#
++# CONFIG_FIRMWARE_EDID is not set
++CONFIG_FB=y
++# CONFIG_FB_CFB_FILLRECT is not set
++# CONFIG_FB_CFB_COPYAREA is not set
++# CONFIG_FB_CFB_IMAGEBLIT is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_VIRTUAL is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++
++#
++# Logo configuration
++#
++# CONFIG_LOGO is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++
++#
++# HID Devices
++#
++CONFIG_HID=y
++
++#
++# USB support
++#
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++# CONFIG_USB_BANDWIDTH is not set
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_MULTITHREAD_PROBE is not set
++# CONFIG_USB_OTG is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_ISP116X_HCD is not set
++CONFIG_USB_OHCI_HCD=y
++# CONFIG_USB_OHCI_BIG_ENDIAN is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++# CONFIG_USB_SL811_HCD is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_PRINTER is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_DPCM is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Input Devices
++#
++# CONFIG_USB_HID is not set
++
++#
++# USB HID Boot Protocol drivers
++#
++# CONFIG_USB_KBD is not set
++# CONFIG_USB_MOUSE is not set
++# CONFIG_USB_AIPTEK is not set
++# CONFIG_USB_WACOM is not set
++# CONFIG_USB_ACECAD is not set
++# CONFIG_USB_KBTAB is not set
++# CONFIG_USB_POWERMATE is not set
++# CONFIG_USB_TOUCHSCREEN is not set
++# CONFIG_USB_YEALINK is not set
++# CONFIG_USB_XPAD is not set
++# CONFIG_USB_ATI_REMOTE is not set
++# CONFIG_USB_ATI_REMOTE2 is not set
++# CONFIG_USB_KEYSPAN_REMOTE is not set
++# CONFIG_USB_APPLETOUCH is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET_MII is not set
++# CONFIG_USB_USBNET is not set
++CONFIG_USB_MON=y
++
++#
++# USB port drivers
++#
++
++#
++# USB Serial Converter support
++#
++# CONFIG_USB_SERIAL is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_AUERSWALD is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_TEST is not set
++
++#
++# USB DSL modem support
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++CONFIG_USB_GADGET_AT91=y
++CONFIG_USB_AT91=y
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++# CONFIG_USB_GADGET_DUALSPEED is not set
++CONFIG_USB_ZERO=m
++# CONFIG_USB_ETH is not set
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++
++#
++# MMC/SD Card support
++#
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_AT91=m
++# CONFIG_MMC_TIFM_SD is not set
++
++#
++# Real Time Clock
++#
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_CLASS is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4DEV_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++# CONFIG_MSDOS_FS is not set
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_RAMFS=y
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++
++#
++# Network File Systems
++#
++CONFIG_NFS_FS=y
++# CONFIG_NFS_V3 is not set
++# CONFIG_NFS_V4 is not set
++# CONFIG_NFS_DIRECTIO is not set
++# CONFIG_NFSD is not set
++CONFIG_ROOT_NFS=y
++CONFIG_LOCKD=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_RPCSEC_GSS_KRB5 is not set
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++# CONFIG_9P_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++
++#
++# Native Language Support
++#
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=y
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++# CONFIG_NLS_UTF8 is not set
++
++#
++# Distributed Lock Manager
++#
++# CONFIG_DLM is not set
++
++#
++# Profiling support
++#
++# CONFIG_PROFILING is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_MUST_CHECK=y
++# CONFIG_MAGIC_SYSRQ is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++CONFIG_LOG_BUF_SHIFT=14
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_RWSEMS is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_RCU_TORTURE_TEST is not set
++CONFIG_DEBUG_USER=y
++# CONFIG_DEBUG_ERRORS is not set
++CONFIG_DEBUG_LL=y
++# CONFIG_DEBUG_ICEDCC is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++
++#
++# Cryptographic options
++#
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++CONFIG_CRC32=y
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_PLIST=y
++CONFIG_IOMAP_COPY=y
+diff -urN linux-2.6.20.4-0rig/arch/arm/configs/csb337_defconfig linux-2.6.20.4-atmel/arch/arm/configs/csb337_defconfig
+--- linux-2.6.20.4-0rig/arch/arm/configs/csb337_defconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/configs/csb337_defconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -355,10 +355,12 @@
+ # Mapping drivers for chip access
+ #
+ # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+-# CONFIG_MTD_PHYSMAP is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0
++CONFIG_MTD_PHYSMAP_LEN=0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=0
+ # CONFIG_MTD_ARM_INTEGRATOR is not set
+ # CONFIG_MTD_PLATRAM is not set
+-CONFIG_MTD_CSB337=y
+ 
+ #
+ # Self-contained MTD device drivers
+diff -urN linux-2.6.20.4-0rig/arch/arm/configs/csb637_defconfig linux-2.6.20.4-atmel/arch/arm/configs/csb637_defconfig
+--- linux-2.6.20.4-0rig/arch/arm/configs/csb637_defconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/configs/csb637_defconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -355,10 +355,12 @@
+ # Mapping drivers for chip access
+ #
+ # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+-# CONFIG_MTD_PHYSMAP is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0
++CONFIG_MTD_PHYSMAP_LEN=0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=0
+ # CONFIG_MTD_ARM_INTEGRATOR is not set
+ # CONFIG_MTD_PLATRAM is not set
+-CONFIG_MTD_CSB637=y
+ 
+ #
+ # Self-contained MTD device drivers
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91rm9200.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91rm9200.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91rm9200.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91rm9200.c	2007-03-24 16:39:15.000000000 +0100
+@@ -117,6 +117,36 @@
+ 	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk tc0_clk = {
++	.name		= "tc0_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_TC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc1_clk = {
++	.name		= "tc1_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_TC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc2_clk = {
++	.name		= "tc2_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_TC2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc3_clk = {
++	.name		= "tc3_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_TC3,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc4_clk = {
++	.name		= "tc4_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_TC4,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc5_clk = {
++	.name		= "tc5_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_TC5,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ 
+ static struct clk *periph_clocks[] __initdata = {
+ 	&pioA_clk,
+@@ -132,7 +162,12 @@
+ 	&twi_clk,
+ 	&spi_clk,
+ 	// ssc 0 .. ssc2
+-	// tc0 .. tc5
++	&tc0_clk,
++	&tc1_clk,
++	&tc2_clk,
++	&tc3_clk,
++	&tc4_clk,
++	&tc5_clk,
+ 	&ohci_clk,
+ 	&ether_clk,
+ 	// irq0 .. irq6
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91rm9200_devices.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91rm9200_devices.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91rm9200_devices.c	2007-03-24 16:39:15.000000000 +0100
+@@ -315,7 +315,7 @@
+ 	.num_resources	= ARRAY_SIZE(mmc_resources),
+ };
+ 
+-void __init at91_add_device_mmc(struct at91_mmc_data *data)
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
+ {
+ 	if (!data)
+ 		return;
+@@ -361,7 +361,7 @@
+ 	platform_device_register(&at91rm9200_mmc_device);
+ }
+ #else
+-void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
+ #endif
+ 
+ 
+@@ -480,7 +480,18 @@
+  *  SPI
+  * -------------------------------------------------------------------- */
+ 
+-#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
++#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)		/* legacy SPI driver */
++#define SPI_DEVNAME	"at91_spi"
++
++#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE)	/* SPI bitbanging driver */
++#define SPI_DEVNAME	"at91_spi"
++
++#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)	/* new SPI driver */
++#define SPI_DEVNAME	"atmel_spi"
++
++#endif
++
++#ifdef SPI_DEVNAME
+ static u64 spi_dmamask = 0xffffffffUL;
+ 
+ static struct resource spi_resources[] = {
+@@ -497,7 +508,7 @@
+ };
+ 
+ static struct platform_device at91rm9200_spi_device = {
+-	.name		= "at91_spi",
++	.name		= SPI_DEVNAME,
+ 	.id		= 0,
+ 	.dev		= {
+ 				.dma_mask		= &spi_dmamask,
+@@ -594,6 +605,10 @@
+ 
+ void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+ {
++	/* Enable GPIO to access the LEDs */
++	at91_set_gpio_output(cpu_led, 1);
++	at91_set_gpio_output(timer_led, 1);
++
+ 	at91_leds_cpu	= cpu_led;
+ 	at91_leds_timer	= timer_led;
+ }
+@@ -602,6 +617,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91rm9200_time.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91rm9200_time.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91rm9200_time.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91rm9200_time.c	2007-03-24 16:39:15.000000000 +0100
+@@ -38,7 +38,8 @@
+  * The ST_CRTR is updated asynchronously to the master clock.  It is therefore
+  *  necessary to read it twice (with the same value) to ensure accuracy.
+  */
+-static inline unsigned long read_CRTR(void) {
++static inline unsigned long read_CRTR(void)
++{
+ 	unsigned long x1, x2;
+ 
+ 	do {
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9260.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9260.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9260.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9260.c	2007-03-24 16:39:15.000000000 +0100
+@@ -14,6 +14,7 @@
+ 
+ #include <asm/mach/arch.h>
+ #include <asm/mach/map.h>
++#include <asm/arch/cpu.h>
+ #include <asm/arch/at91sam9260.h>
+ #include <asm/arch/at91_pmc.h>
+ #include <asm/arch/at91_rstc.h>
+@@ -27,7 +28,11 @@
+ 		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
+ 		.length		= SZ_16K,
+ 		.type		= MT_DEVICE,
+-	}, {
++	}
++};
++
++static struct map_desc at91sam9260_sram_desc[] __initdata = {
++	{
+ 		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
+ 		.pfn		= __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
+ 		.length		= AT91SAM9260_SRAM0_SIZE,
+@@ -37,7 +42,14 @@
+ 		.pfn		= __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
+ 		.length		= AT91SAM9260_SRAM1_SIZE,
+ 		.type		= MT_DEVICE,
+-	},
++	}
++};
++
++static struct map_desc at91sam9xe_sram_desc[] __initdata = {
++	{
++		.pfn		= __phys_to_pfn(AT91SAM9XE_SRAM_BASE),
++		.type		= MT_DEVICE,
++	}
+ };
+ 
+ /* --------------------------------------------------------------------
+@@ -107,13 +119,28 @@
+ 	.pmc_mask	= 1 << AT91SAM9260_ID_SPI1,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk tc0_clk = {
++	.name		= "tc0_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_TC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc1_clk = {
++	.name		= "tc1_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_TC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc2_clk = {
++	.name		= "tc2_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_TC2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk ohci_clk = {
+ 	.name		= "ohci_clk",
+ 	.pmc_mask	= 1 << AT91SAM9260_ID_UHP,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
+-static struct clk ether_clk = {
+-	.name		= "ether_clk",
++static struct clk macb_clk = {
++	.name		= "macb_clk",
+ 	.pmc_mask	= 1 << AT91SAM9260_ID_EMAC,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
+@@ -137,6 +164,21 @@
+ 	.pmc_mask	= 1 << AT91SAM9260_ID_US5,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk tc3_clk = {
++	.name		= "tc3_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_TC3,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc4_clk = {
++	.name		= "tc4_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_TC4,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc5_clk = {
++	.name		= "tc5_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_TC5,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ 
+ static struct clk *periph_clocks[] __initdata = {
+ 	&pioA_clk,
+@@ -152,14 +194,18 @@
+ 	&spi0_clk,
+ 	&spi1_clk,
+ 	// ssc
+-	// tc0 .. tc2
++	&tc0_clk,
++	&tc1_clk,
++	&tc2_clk,
+ 	&ohci_clk,
+-	&ether_clk,
++	&macb_clk,
+ 	&isi_clk,
+ 	&usart3_clk,
+ 	&usart4_clk,
+ 	&usart5_clk,
+-	// tc3 .. tc5
++	&tc3_clk,
++	&tc4_clk,
++	&tc5_clk,
+ 	// irq0 .. irq2
+ };
+ 
+@@ -213,7 +259,7 @@
+ 
+ static void at91sam9260_reset(void)
+ {
+-	at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
++	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
+ }
+ 
+ 
+@@ -221,10 +267,36 @@
+  *  AT91SAM9260 processor initialization
+  * -------------------------------------------------------------------- */
+ 
++static void __init at91sam9xe_initialize(void)
++{
++	unsigned long cidr, sram_size;
++
++	cidr = at91_sys_read(AT91_DBGU_CIDR);
++
++	switch (cidr & AT91_CIDR_SRAMSIZ) {
++		case AT91_CIDR_SRAMSIZ_32K:
++			sram_size = 2 * SZ_16K;
++			break;
++		case AT91_CIDR_SRAMSIZ_16K:
++		default:
++			sram_size = SZ_16K;
++	}
++
++	at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
++	at91sam9xe_sram_desc->length = sram_size;
++
++	iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc));
++}
++
+ void __init at91sam9260_initialize(unsigned long main_clock)
+ {
+ 	/* Map peripherals */
+ 	iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
++	
++	if (cpu_is_at91sam9xe())
++		at91sam9xe_initialize();
++	else
++		iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));	
+ 
+ 	at91_arch_reset = at91sam9260_reset;
+ 	at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9260_devices.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9260_devices.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9260_devices.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9260_devices.c	2007-03-24 16:39:15.000000000 +0100
+@@ -128,7 +128,7 @@
+ 
+ #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
+ static u64 eth_dmamask = 0xffffffffUL;
+-static struct eth_platform_data eth_data;
++static struct at91_eth_data eth_data;
+ 
+ static struct resource eth_resources[] = {
+ 	[0] = {
+@@ -155,7 +155,7 @@
+ 	.num_resources	= ARRAY_SIZE(eth_resources),
+ };
+ 
+-void __init at91_add_device_eth(struct eth_platform_data *data)
++void __init at91_add_device_eth(struct at91_eth_data *data)
+ {
+ 	if (!data)
+ 		return;
+@@ -192,7 +192,7 @@
+ 	platform_device_register(&at91sam9260_eth_device);
+ }
+ #else
+-void __init at91_add_device_eth(struct eth_platform_data *data) {}
++void __init at91_add_device_eth(struct at91_eth_data *data) {}
+ #endif
+ 
+ 
+@@ -229,7 +229,7 @@
+ 	.num_resources	= ARRAY_SIZE(mmc_resources),
+ };
+ 
+-void __init at91_add_device_mmc(struct at91_mmc_data *data)
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
+ {
+ 	if (!data)
+ 		return;
+@@ -275,7 +275,7 @@
+ 	platform_device_register(&at91sam9260_mmc_device);
+ }
+ #else
+-void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
+ #endif
+ 
+ 
+@@ -515,6 +515,10 @@
+ 
+ void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+ {
++	/* Enable GPIO to access the LEDs */
++	at91_set_gpio_output(cpu_led, 1);
++	at91_set_gpio_output(timer_led, 1);
++
+ 	at91_leds_cpu	= cpu_led;
+ 	at91_leds_timer	= timer_led;
+ }
+@@ -523,6 +527,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9261.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9261.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9261.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9261.c	2007-03-24 16:39:15.000000000 +0100
+@@ -97,6 +97,21 @@
+ 	.pmc_mask	= 1 << AT91SAM9261_ID_SPI1,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk tc0_clk = {
++	.name		= "tc0_clk",
++	.pmc_mask	= 1 << AT91SAM9261_ID_TC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc1_clk = {
++	.name		= "tc1_clk",
++	.pmc_mask	= 1 << AT91SAM9261_ID_TC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc2_clk = {
++	.name		= "tc2_clk",
++	.pmc_mask	= 1 << AT91SAM9261_ID_TC2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk ohci_clk = {
+ 	.name		= "ohci_clk",
+ 	.pmc_mask	= 1 << AT91SAM9261_ID_UHP,
+@@ -121,7 +136,9 @@
+ 	&spi0_clk,
+ 	&spi1_clk,
+ 	// ssc 0 .. ssc2
+-	// tc0 .. tc2
++	&tc0_clk,
++	&tc1_clk,
++	&tc2_clk,
+ 	&ohci_clk,
+ 	&lcdc_clk,
+ 	// irq0 .. irq2
+@@ -208,7 +225,7 @@
+ 
+ static void at91sam9261_reset(void)
+ {
+-	at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
++	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
+ }
+ 
+ 
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9261_devices.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9261_devices.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9261_devices.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9261_devices.c	2007-03-24 16:39:15.000000000 +0100
+@@ -14,6 +14,9 @@
+ #include <asm/mach/map.h>
+ 
+ #include <linux/platform_device.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/arch/board.h>
+ #include <asm/arch/gpio.h>
+@@ -159,7 +162,7 @@
+ 	.num_resources	= ARRAY_SIZE(mmc_resources),
+ };
+ 
+-void __init at91_add_device_mmc(struct at91_mmc_data *data)
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
+ {
+ 	if (!data)
+ 		return;
+@@ -192,7 +195,7 @@
+ 	platform_device_register(&at91sam9261_mmc_device);
+ }
+ #else
+-void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
+ #endif
+ 
+ 
+@@ -345,7 +348,7 @@
+ 	.num_resources	= ARRAY_SIZE(spi0_resources),
+ };
+ 
+-static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
++static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA28, AT91_PIN_PA6 };
+ 
+ static struct resource spi1_resources[] = {
+ 	[0] = {
+@@ -430,9 +433,9 @@
+  *  LCD Controller
+  * -------------------------------------------------------------------- */
+ 
+-#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+ static u64 lcdc_dmamask = 0xffffffffUL;
+-static struct at91fb_info lcdc_data;
++static struct atmel_lcdfb_info lcdc_data;
+ 
+ static struct resource lcdc_resources[] = {
+ 	[0] = {
+@@ -455,18 +458,18 @@
+ };
+ 
+ static struct platform_device at91_lcdc_device = {
+-	.name		= "at91-fb",
+-	.id		= 0,
+-	.dev		= {
+-				.dma_mask		= &lcdc_dmamask,
+-				.coherent_dma_mask	= 0xffffffff,
+-				.platform_data		= &lcdc_data,
++	.name           = "atmel_lcdfb",
++	.id             = 0,
++	.dev            = {
++				.dma_mask          = &lcdc_dmamask,
++				.coherent_dma_mask = 0xffffffff,
++				.platform_data     = &lcdc_data,
+ 	},
+ 	.resource	= lcdc_resources,
+ 	.num_resources	= ARRAY_SIZE(lcdc_resources),
+ };
+ 
+-void __init at91_add_device_lcdc(struct at91fb_info *data)
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
+ {
+ 	if (!data) {
+ 		return;
+@@ -499,7 +502,7 @@
+ 	platform_device_register(&at91_lcdc_device);
+ }
+ #else
+-void __init at91_add_device_lcdc(struct at91fb_info *data) {}
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
+ #endif
+ 
+ 
+@@ -513,6 +516,10 @@
+ 
+ void __init at91_init_leds(u8 cpu_led, u8 timer_led)
+ {
++	/* Enable GPIO to access the LEDs */
++	at91_set_gpio_output(cpu_led, 1);
++	at91_set_gpio_output(timer_led, 1);
++
+ 	at91_leds_cpu	= cpu_led;
+ 	at91_leds_timer	= timer_led;
+ }
+@@ -521,6 +528,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9263.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9263.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9263.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9263.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,313 @@
++/*
++ * arch/arm/mach-at91rm9200/at91sam9263.c
++ *
++ *  Copyright (C) 2007 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#include <linux/module.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/arch/at91sam9263.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++
++#include "generic.h"
++#include "clock.h"
++
++static struct map_desc at91sam9263_io_desc[] __initdata = {
++	{
++		.virtual	= AT91_VA_BASE_SYS,
++		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
++		.length		= SZ_16K,
++		.type		= MT_DEVICE,
++	}, {
++		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE,
++		.pfn		= __phys_to_pfn(AT91SAM9263_SRAM0_BASE),
++		.length		= AT91SAM9263_SRAM0_SIZE,
++		.type		= MT_DEVICE,
++	}, {
++		.virtual	= AT91_IO_VIRT_BASE - AT91SAM9263_SRAM0_SIZE - AT91SAM9263_SRAM1_SIZE,
++		.pfn		= __phys_to_pfn(AT91SAM9263_SRAM1_BASE),
++		.length		= AT91SAM9263_SRAM1_SIZE,
++		.type		= MT_DEVICE,
++	},
++};
++
++/* --------------------------------------------------------------------
++ *  Clocks
++ * -------------------------------------------------------------------- */
++
++/*
++ * The peripheral clocks.
++ */
++static struct clk pioA_clk = {
++	.name		= "pioA_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_PIOA,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk pioB_clk = {
++	.name		= "pioB_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_PIOB,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk pioCDE_clk = {
++	.name		= "pioCDE_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_PIOCDE,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart0_clk = {
++	.name		= "usart0_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_US0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart1_clk = {
++	.name		= "usart1_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_US1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart2_clk = {
++	.name		= "usart2_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_US2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk mmc0_clk = {
++	.name		= "mci0_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_MCI0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk mmc1_clk = {
++	.name		= "mci1_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_MCI1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk twi_clk = {
++	.name		= "twi_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_TWI,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk spi0_clk = {
++	.name		= "spi0_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_SPI0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk spi1_clk = {
++	.name		= "spi1_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_SPI1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tcb_clk = {
++	.name		= "tcb_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_TCB,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk macb_clk = {
++	.name		= "macb_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_EMAC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk udc_clk = {
++	.name		= "udc_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_UDP,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk isi_clk = {
++	.name		= "isi_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_ISI,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk lcdc_clk = {
++	.name		= "lcdc_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_LCDC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ohci_clk = {
++	.name		= "ohci_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_UHP,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++
++static struct clk *periph_clocks[] __initdata = {
++	&pioA_clk,
++	&pioB_clk,
++	&pioCDE_clk,
++	&usart0_clk,
++	&usart1_clk,
++	&usart2_clk,
++	&mmc0_clk,
++	&mmc1_clk,
++	// can
++	&twi_clk,
++	&spi0_clk,
++	&spi1_clk,
++	// ssc0 .. ssc1
++	// ac97
++	&tcb_clk,
++	// pwmc
++	&macb_clk,
++	// 2dge
++	&udc_clk,
++	&isi_clk,
++	&lcdc_clk,
++	// dma
++	&ohci_clk,
++	// irq0 .. irq1
++};
++
++/*
++ * The four programmable clocks.
++ * You must configure pin multiplexing to bring these signals out.
++ */
++static struct clk pck0 = {
++	.name		= "pck0",
++	.pmc_mask	= AT91_PMC_PCK0,
++	.type		= CLK_TYPE_PROGRAMMABLE,
++	.id		= 0,
++};
++static struct clk pck1 = {
++	.name		= "pck1",
++	.pmc_mask	= AT91_PMC_PCK1,
++	.type		= CLK_TYPE_PROGRAMMABLE,
++	.id		= 1,
++};
++static struct clk pck2 = {
++	.name		= "pck2",
++	.pmc_mask	= AT91_PMC_PCK2,
++	.type		= CLK_TYPE_PROGRAMMABLE,
++	.id		= 2,
++};
++static struct clk pck3 = {
++	.name		= "pck3",
++	.pmc_mask	= AT91_PMC_PCK3,
++	.type		= CLK_TYPE_PROGRAMMABLE,
++	.id		= 3,
++};
++
++static void __init at91sam9263_register_clocks(void)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
++		clk_register(periph_clocks[i]);
++
++	clk_register(&pck0);
++	clk_register(&pck1);
++	clk_register(&pck2);
++	clk_register(&pck3);
++}
++
++/* --------------------------------------------------------------------
++ *  GPIO
++ * -------------------------------------------------------------------- */
++
++static struct at91_gpio_bank at91sam9263_gpio[] = {
++	{
++		.id		= AT91SAM9263_ID_PIOA,
++		.offset		= AT91_PIOA,
++		.clock		= &pioA_clk,
++	}, {
++		.id		= AT91SAM9263_ID_PIOB,
++		.offset		= AT91_PIOB,
++		.clock		= &pioB_clk,
++	}, {
++		.id		= AT91SAM9263_ID_PIOCDE,
++		.offset		= AT91_PIOC,
++		.clock		= &pioCDE_clk,
++	}, {
++		.id		= AT91SAM9263_ID_PIOCDE,
++		.offset		= AT91_PIOD,
++		.clock		= &pioCDE_clk,
++	}, {
++		.id		= AT91SAM9263_ID_PIOCDE,
++		.offset		= AT91_PIOE,
++		.clock		= &pioCDE_clk,
++	}
++};
++
++static void at91sam9263_reset(void)
++{
++	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
++}
++
++
++/* --------------------------------------------------------------------
++ *  AT91SAM9263 processor initialization
++ * -------------------------------------------------------------------- */
++
++void __init at91sam9263_initialize(unsigned long main_clock)
++{
++	/* Map peripherals */
++	iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
++
++	at91_arch_reset = at91sam9263_reset;
++	at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
++
++	/* Init clock subsystem */
++	at91_clock_init(main_clock);
++
++	/* Register the processor-specific clocks */
++	at91sam9263_register_clocks();
++
++	/* Register GPIO subsystem */
++	at91_gpio_init(at91sam9263_gpio, 5);
++}
++
++/* --------------------------------------------------------------------
++ *  Interrupt initialization
++ * -------------------------------------------------------------------- */
++
++/*
++ * The default interrupt priority levels (0 = lowest, 7 = highest).
++ */
++static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
++	7,	/* Advanced Interrupt Controller (FIQ) */
++	7,	/* System Peripherals */
++	0,	/* Parallel IO Controller A */
++	0,	/* Parallel IO Controller B */
++	0,	/* Parallel IO Controller C, D and E */
++	0,
++	0,
++	6,	/* USART 0 */
++	6,	/* USART 1 */
++	6,	/* USART 2 */
++	0,	/* Multimedia Card Interface 0 */
++	0,	/* Multimedia Card Interface 1 */
++	4,	/* CAN */
++	0,	/* Two-Wire Interface */
++	6,	/* Serial Peripheral Interface 0 */
++	6,	/* Serial Peripheral Interface 1 */
++	5,	/* Serial Synchronous Controller 0 */
++	5,	/* Serial Synchronous Controller 1 */
++	6,	/* AC97 Controller */
++	0,	/* Timer Counter 0, 1 and 2 */
++	0,	/* Pulse Width Modulation Controller */
++	3,	/* Ethernet */
++	0,
++	0,	/* 2D Graphic Engine */
++	3,	/* USB Device Port */
++	0,	/* Image Sensor Interface */
++	3,	/* LDC Controller */
++	0,	/* DMA Controller */
++	0,
++	3,	/* USB Host port */
++	0,	/* Advanced Interrupt Controller (IRQ0) */
++	0,	/* Advanced Interrupt Controller (IRQ1) */
++};
++
++void __init at91sam9263_init_interrupts(unsigned int priority[NR_AIC_IRQS])
++{
++	if (!priority)
++		priority = at91sam9263_default_irq_priority;
++
++	/* Initialize the AIC interrupt controller */
++	at91_aic_init(priority);
++
++	/* Enable GPIO interrupts */
++	at91_gpio_irq_setup();
++}
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9263_devices.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9263_devices.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam9263_devices.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam9263_devices.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,918 @@
++/*
++ * arch/arm/mach-at91rm9200/at91sam9263_devices.c
++ *
++ *  Copyright (C) 2007 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++
++#include <linux/platform_device.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91sam9263.h>
++#include <asm/arch/at91sam926x_mc.h>
++#include <asm/arch/at91sam9263_matrix.h>
++
++#include "generic.h"
++
++#define SZ_512	0x00000200
++#define SZ_256	0x00000100
++#define SZ_16	0x00000010
++
++/* --------------------------------------------------------------------
++ *  USB Host
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
++static u64 ohci_dmamask = 0xffffffffUL;
++static struct at91_usbh_data usbh_data;
++
++static struct resource usbh_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_UHP_BASE,
++		.end	= AT91SAM9263_UHP_BASE + SZ_1M - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_UHP,
++		.end	= AT91SAM9263_ID_UHP,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91_usbh_device = {
++	.name		= "at91_ohci",
++	.id		= -1,
++	.dev		= {
++				.dma_mask		= &ohci_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &usbh_data,
++	},
++	.resource	= usbh_resources,
++	.num_resources	= ARRAY_SIZE(usbh_resources),
++};
++
++void __init at91_add_device_usbh(struct at91_usbh_data *data)
++{
++	int i;
++
++	if (!data)
++		return;
++
++	/* Enable VBus control for UHP ports */
++	for (i = 0; i < data->ports; i++) {
++		if (data->vbus_pin[i])
++			at91_set_gpio_output(data->vbus_pin[i], 0);
++	}
++
++	usbh_data = *data;
++	platform_device_register(&at91_usbh_device);
++}
++#else
++void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  USB Device (Gadget)
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_USB_GADGET_AT91
++static struct at91_udc_data udc_data;
++
++static struct resource udc_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_UDP,
++		.end	= AT91SAM9263_BASE_UDP + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_UDP,
++		.end	= AT91SAM9263_ID_UDP,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91_udc_device = {
++	.name		= "at91_udc",
++	.id		= -1,
++	.dev		= {
++				.platform_data		= &udc_data,
++	},
++	.resource	= udc_resources,
++	.num_resources	= ARRAY_SIZE(udc_resources),
++};
++
++void __init at91_add_device_udc(struct at91_udc_data *data)
++{
++	if (!data)
++		return;
++
++	if (data->vbus_pin) {
++		at91_set_gpio_input(data->vbus_pin, 0);
++		at91_set_deglitch(data->vbus_pin, 1);
++	}
++
++	/* Pullup pin is handled internally by USB device peripheral */
++
++	udc_data = *data;
++	platform_device_register(&at91_udc_device);
++}
++#else
++void __init at91_add_device_udc(struct at91_udc_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
++static u64 eth_dmamask = 0xffffffffUL;
++static struct at91_eth_data eth_data;
++
++static struct resource eth_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_EMAC,
++		.end	= AT91SAM9263_BASE_EMAC + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_EMAC,
++		.end	= AT91SAM9263_ID_EMAC,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_eth_device = {
++	.name		= "macb",
++	.id		= -1,
++	.dev		= {
++				.dma_mask		= &eth_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &eth_data,
++	},
++	.resource	= eth_resources,
++	.num_resources	= ARRAY_SIZE(eth_resources),
++};
++
++void __init at91_add_device_eth(struct at91_eth_data *data)
++{
++	if (!data)
++		return;
++
++	if (data->phy_irq_pin) {
++		at91_set_gpio_input(data->phy_irq_pin, 0);
++		at91_set_deglitch(data->phy_irq_pin, 1);
++	}
++
++	/* Pins used for MII and RMII */
++	at91_set_A_periph(AT91_PIN_PE21, 0);	/* ETXCK_EREFCK */
++	at91_set_B_periph(AT91_PIN_PC25, 0);	/* ERXDV */
++	at91_set_A_periph(AT91_PIN_PE25, 0);	/* ERX0 */
++	at91_set_A_periph(AT91_PIN_PE26, 0);	/* ERX1 */
++	at91_set_A_periph(AT91_PIN_PE27, 0);	/* ERXER */
++	at91_set_A_periph(AT91_PIN_PE28, 0);	/* ETXEN */
++	at91_set_A_periph(AT91_PIN_PE23, 0);	/* ETX0 */
++	at91_set_A_periph(AT91_PIN_PE24, 0);	/* ETX1 */
++	at91_set_A_periph(AT91_PIN_PE30, 0);	/* EMDIO */
++	at91_set_A_periph(AT91_PIN_PE29, 0);	/* EMDC */
++
++	if (!data->is_rmii) {
++		at91_set_A_periph(AT91_PIN_PE22, 0);	/* ECRS */
++		at91_set_B_periph(AT91_PIN_PC26, 0);	/* ECOL */
++		at91_set_B_periph(AT91_PIN_PC22, 0);	/* ERX2 */
++		at91_set_B_periph(AT91_PIN_PC23, 0);	/* ERX3 */
++		at91_set_B_periph(AT91_PIN_PC27, 0);	/* ERXCK */
++		at91_set_B_periph(AT91_PIN_PC20, 0);	/* ETX2 */
++		at91_set_B_periph(AT91_PIN_PC21, 0);	/* ETX3 */
++		at91_set_B_periph(AT91_PIN_PC24, 0);	/* ETXER */
++	}
++
++	eth_data = *data;
++	platform_device_register(&at91sam9263_eth_device);
++}
++#else
++void __init at91_add_device_eth(struct at91_eth_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  MMC / SD
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
++static u64 mmc_dmamask = 0xffffffffUL;
++static struct at91_mmc_data mmc0_data, mmc1_data;
++
++static struct resource mmc0_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_MCI0,
++		.end	= AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_MCI0,
++		.end	= AT91SAM9263_ID_MCI0,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_mmc0_device = {
++	.name		= "at91_mci",
++	.id		= 0,
++	.dev		= {
++				.dma_mask		= &mmc_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &mmc0_data,
++	},
++	.resource	= mmc0_resources,
++	.num_resources	= ARRAY_SIZE(mmc0_resources),
++};
++
++static struct resource mmc1_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_MCI1,
++		.end	= AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_MCI1,
++		.end	= AT91SAM9263_ID_MCI1,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_mmc1_device = {
++	.name		= "at91_mci",
++	.id		= 1,
++	.dev		= {
++				.dma_mask		= &mmc_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &mmc1_data,
++	},
++	.resource	= mmc1_resources,
++	.num_resources	= ARRAY_SIZE(mmc1_resources),
++};
++
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
++{
++	if (!data)
++		return;
++
++	/* input/irq */
++	if (data->det_pin) {
++		at91_set_gpio_input(data->det_pin, 1);
++		at91_set_deglitch(data->det_pin, 1);
++	}
++	if (data->wp_pin)
++		at91_set_gpio_input(data->wp_pin, 1);
++	if (data->vcc_pin)
++		at91_set_gpio_output(data->vcc_pin, 0);
++
++	if (mmc_id == 0) {		/* MCI0 */
++		/* CLK */
++		at91_set_A_periph(AT91_PIN_PA12, 0);
++
++		if (data->slot_b) {
++			/* CMD */
++			at91_set_A_periph(AT91_PIN_PA16, 1);
++
++			/* DAT0, maybe DAT1..DAT3 */
++			at91_set_A_periph(AT91_PIN_PA17, 1);
++			if (data->wire4) {
++				at91_set_A_periph(AT91_PIN_PA18, 1);
++				at91_set_A_periph(AT91_PIN_PA19, 1);
++				at91_set_A_periph(AT91_PIN_PA20, 1);
++			}
++		} else {
++			/* CMD */
++			at91_set_A_periph(AT91_PIN_PA1, 1);
++
++			/* DAT0, maybe DAT1..DAT3 */
++			at91_set_A_periph(AT91_PIN_PA0, 1);
++			if (data->wire4) {
++				at91_set_A_periph(AT91_PIN_PA3, 1);
++				at91_set_A_periph(AT91_PIN_PA4, 1);
++				at91_set_A_periph(AT91_PIN_PA5, 1);
++			}
++		}
++
++		mmc0_data = *data;
++		at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
++		platform_device_register(&at91sam9263_mmc0_device);
++	} else {			/* MCI1 */
++		/* CLK */
++		at91_set_A_periph(AT91_PIN_PA6, 0);
++
++		if (data->slot_b) {
++			/* CMD */
++			at91_set_A_periph(AT91_PIN_PA21, 1);
++
++			/* DAT0, maybe DAT1..DAT3 */
++			at91_set_A_periph(AT91_PIN_PA22, 1);
++			if (data->wire4) {
++				at91_set_A_periph(AT91_PIN_PA23, 1);
++				at91_set_A_periph(AT91_PIN_PA24, 1);
++				at91_set_A_periph(AT91_PIN_PA25, 1);
++			}
++		} else {
++			/* CMD */
++			at91_set_A_periph(AT91_PIN_PA7, 1);
++
++			/* DAT0, maybe DAT1..DAT3 */
++			at91_set_A_periph(AT91_PIN_PA8, 1);
++			if (data->wire4) {
++				at91_set_A_periph(AT91_PIN_PA9, 1);
++				at91_set_A_periph(AT91_PIN_PA10, 1);
++				at91_set_A_periph(AT91_PIN_PA11, 1);
++			}
++		}
++
++		mmc1_data = *data;
++		at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
++		platform_device_register(&at91sam9263_mmc1_device);
++	}
++}
++#else
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  NAND / SmartMedia
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
++static struct at91_nand_data nand_data;
++
++#define NAND_BASE	AT91_CHIPSELECT_3
++
++static struct resource nand_resources[] = {
++	{
++		.start	= NAND_BASE,
++		.end	= NAND_BASE + SZ_256M - 1,
++		.flags	= IORESOURCE_MEM,
++	}
++};
++
++static struct platform_device at91sam9263_nand_device = {
++	.name		= "at91_nand",
++	.id		= -1,
++	.dev		= {
++				.platform_data	= &nand_data,
++	},
++	.resource	= nand_resources,
++	.num_resources	= ARRAY_SIZE(nand_resources),
++};
++
++void __init at91_add_device_nand(struct at91_nand_data *data)
++{
++	unsigned long csa, mode;
++
++	if (!data)
++		return;
++
++	csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
++	at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC);
++
++	/* set the bus interface characteristics */
++	at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
++			| AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
++
++	at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
++			| AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
++
++	at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
++
++	if (data->bus_width_16)
++		mode = AT91_SMC_DBW_16;
++	else
++		mode = AT91_SMC_DBW_8;
++	at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
++
++	/* enable pin */
++	if (data->enable_pin)
++		at91_set_gpio_output(data->enable_pin, 1);
++
++	/* ready/busy pin */
++	if (data->rdy_pin)
++		at91_set_gpio_input(data->rdy_pin, 1);
++
++	/* card detect pin */
++	if (data->det_pin)
++		at91_set_gpio_input(data->det_pin, 1);
++
++	nand_data = *data;
++	platform_device_register(&at91sam9263_nand_device);
++}
++#else
++void __init at91_add_device_nand(struct at91_nand_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  TWI (i2c)
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
++
++static struct resource twi_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_TWI,
++		.end	= AT91SAM9263_BASE_TWI + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_TWI,
++		.end	= AT91SAM9263_ID_TWI,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_twi_device = {
++	.name		= "at91_i2c",
++	.id		= -1,
++	.resource	= twi_resources,
++	.num_resources	= ARRAY_SIZE(twi_resources),
++};
++
++void __init at91_add_device_i2c(void)
++{
++	/* pins used for TWI interface */
++	at91_set_A_periph(AT91_PIN_PB4, 0);		/* TWD */
++	at91_set_multi_drive(AT91_PIN_PB4, 1);
++
++	at91_set_A_periph(AT91_PIN_PB5, 0);		/* TWCK */
++	at91_set_multi_drive(AT91_PIN_PB5, 1);
++
++	platform_device_register(&at91sam9263_twi_device);
++}
++#else
++void __init at91_add_device_i2c(void) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
++static u64 spi_dmamask = 0xffffffffUL;
++
++static struct resource spi0_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_SPI0,
++		.end	= AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_SPI0,
++		.end	= AT91SAM9263_ID_SPI0,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_spi0_device = {
++	.name		= "atmel_spi",
++	.id		= 0,
++	.dev		= {
++				.dma_mask		= &spi_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++	},
++	.resource	= spi0_resources,
++	.num_resources	= ARRAY_SIZE(spi0_resources),
++};
++
++static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
++
++static struct resource spi1_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_SPI1,
++		.end	= AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_SPI1,
++		.end	= AT91SAM9263_ID_SPI1,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_spi1_device = {
++	.name		= "atmel_spi",
++	.id		= 1,
++	.dev		= {
++				.dma_mask		= &spi_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++	},
++	.resource	= spi1_resources,
++	.num_resources	= ARRAY_SIZE(spi1_resources),
++};
++
++static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
++
++void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
++{
++	int i;
++	unsigned long cs_pin;
++	short enable_spi0 = 0;
++	short enable_spi1 = 0;
++
++	/* Choose SPI chip-selects */
++	for (i = 0; i < nr_devices; i++) {
++		if (devices[i].controller_data)
++			cs_pin = (unsigned long) devices[i].controller_data;
++		else if (devices[i].bus_num == 0)
++			cs_pin = spi0_standard_cs[devices[i].chip_select];
++		else
++			cs_pin = spi1_standard_cs[devices[i].chip_select];
++
++		if (devices[i].bus_num == 0)
++			enable_spi0 = 1;
++		else
++			enable_spi1 = 1;
++
++		/* enable chip-select pin */
++		at91_set_gpio_output(cs_pin, 1);
++
++		/* pass chip-select pin to driver */
++		devices[i].controller_data = (void *) cs_pin;
++	}
++
++	spi_register_board_info(devices, nr_devices);
++
++	/* Configure SPI bus(es) */
++	if (enable_spi0) {
++		at91_set_B_periph(AT91_PIN_PA0, 0);	/* SPI0_MISO */
++		at91_set_B_periph(AT91_PIN_PA1, 0);	/* SPI0_MOSI */
++		at91_set_B_periph(AT91_PIN_PA2, 0);	/* SPI0_SPCK */
++
++		at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
++		platform_device_register(&at91sam9263_spi0_device);
++	}
++	if (enable_spi1) {
++		at91_set_A_periph(AT91_PIN_PB12, 0);	/* SPI1_MISO */
++		at91_set_A_periph(AT91_PIN_PB13, 0);	/* SPI1_MOSI */
++		at91_set_A_periph(AT91_PIN_PB14, 0);	/* SPI1_SPCK */
++
++		at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
++		platform_device_register(&at91sam9263_spi1_device);
++	}
++}
++#else
++void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  LCD Controller
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static u64 lcdc_dmamask = 0xffffffffUL;
++static struct atmel_lcdfb_info lcdc_data;
++
++static struct resource lcdc_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_LCDC_BASE,
++		.end	= AT91SAM9263_LCDC_BASE + SZ_4K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_LCDC,
++		.end	= AT91SAM9263_ID_LCDC,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91_lcdc_device = {
++	.name           = "atmel_lcdfb",
++	.id             = 0,
++	.dev            = {
++				.dma_mask          = &lcdc_dmamask,
++				.coherent_dma_mask = 0xffffffff,
++				.platform_data     = &lcdc_data,
++	},
++	.resource       = lcdc_resources,
++	.num_resources  = ARRAY_SIZE(lcdc_resources),
++};
++
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
++{
++	if (!data) {
++		return;
++	}
++
++	/* configure PIO for LCDC */
++        at91_set_A_periph(AT91_PIN_PC1, 0);	/* LCDHSYNC */
++        at91_set_A_periph(AT91_PIN_PC2, 0);	/* LCDDOTCK */
++        at91_set_A_periph(AT91_PIN_PC3, 0);	/* LCDDEN */
++        at91_set_B_periph(AT91_PIN_PB9, 0);	/* LCDCC */
++        at91_set_A_periph(AT91_PIN_PC6, 0);	/* LCDD2 */
++        at91_set_A_periph(AT91_PIN_PC7, 0);	/* LCDD3 */
++        at91_set_A_periph(AT91_PIN_PC8, 0);	/* LCDD4 */
++        at91_set_A_periph(AT91_PIN_PC9, 0);	/* LCDD5 */
++        at91_set_A_periph(AT91_PIN_PC10, 0);	/* LCDD6 */
++        at91_set_A_periph(AT91_PIN_PC11, 0);	/* LCDD7 */
++        at91_set_A_periph(AT91_PIN_PC14, 0);	/* LCDD10 */
++        at91_set_A_periph(AT91_PIN_PC15, 0);	/* LCDD11 */
++        at91_set_A_periph(AT91_PIN_PC16, 0);	/* LCDD12 */
++        at91_set_B_periph(AT91_PIN_PC12, 0);	/* LCDD13 */
++        at91_set_A_periph(AT91_PIN_PC18, 0);	/* LCDD14 */
++        at91_set_A_periph(AT91_PIN_PC19, 0);	/* LCDD15 */
++        at91_set_A_periph(AT91_PIN_PC22, 0);	/* LCDD18 */
++        at91_set_A_periph(AT91_PIN_PC23, 0);	/* LCDD19 */
++        at91_set_A_periph(AT91_PIN_PC24, 0);	/* LCDD20 */
++        at91_set_B_periph(AT91_PIN_PC17, 0);	/* LCDD21 */
++        at91_set_A_periph(AT91_PIN_PC26, 0);	/* LCDD22 */
++        at91_set_A_periph(AT91_PIN_PC27, 0);	/* LCDD23 */
++
++	lcdc_data = *data;
++	platform_device_register(&at91_lcdc_device);
++}
++#else
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  LEDs
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_LEDS)
++u8 at91_leds_cpu;
++u8 at91_leds_timer;
++
++void __init at91_init_leds(u8 cpu_led, u8 timer_led)
++{
++	/* Enable GPIO to access the LEDs */
++	at91_set_gpio_output(cpu_led, 1);
++	at91_set_gpio_output(timer_led, 1);
++
++	at91_leds_cpu	= cpu_led;
++	at91_leds_timer	= timer_led;
++}
++#else
++void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
++#endif
++
++
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  UART
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_SERIAL_ATMEL)
++
++static struct resource dbgu_resources[] = {
++	[0] = {
++		.start	= AT91_VA_BASE_SYS + AT91_DBGU,
++		.end	= AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91_ID_SYS,
++		.end	= AT91_ID_SYS,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data dbgu_data = {
++	.use_dma_tx	= 0,
++	.use_dma_rx	= 0,		/* DBGU not capable of receive DMA */
++	.regs		= (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
++};
++
++static struct platform_device at91sam9263_dbgu_device = {
++	.name		= "atmel_usart",
++	.id		= 0,
++	.dev		= {
++				.platform_data	= &dbgu_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= dbgu_resources,
++	.num_resources	= ARRAY_SIZE(dbgu_resources),
++};
++
++static inline void configure_dbgu_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PC30, 0);		/* DRXD */
++	at91_set_A_periph(AT91_PIN_PC31, 1);		/* DTXD */
++}
++
++static struct resource uart0_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_US0,
++		.end	= AT91SAM9263_BASE_US0 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_US0,
++		.end	= AT91SAM9263_ID_US0,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9263_uart0_device = {
++	.name		= "atmel_usart",
++	.id		= 1,
++	.dev		= {
++				.platform_data	= &uart0_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart0_resources,
++	.num_resources	= ARRAY_SIZE(uart0_resources),
++};
++
++static inline void configure_usart0_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PA26, 1);		/* TXD0 */
++	at91_set_A_periph(AT91_PIN_PA27, 0);		/* RXD0 */
++	at91_set_A_periph(AT91_PIN_PA28, 0);		/* RTS0 */
++	at91_set_A_periph(AT91_PIN_PA29, 0);		/* CTS0 */
++}
++
++static struct resource uart1_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_US1,
++		.end	= AT91SAM9263_BASE_US1 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_US1,
++		.end	= AT91SAM9263_ID_US1,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9263_uart1_device = {
++	.name		= "atmel_usart",
++	.id		= 2,
++	.dev		= {
++				.platform_data	= &uart1_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart1_resources,
++	.num_resources	= ARRAY_SIZE(uart1_resources),
++};
++
++static inline void configure_usart1_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PD0, 1);		/* TXD1 */
++	at91_set_A_periph(AT91_PIN_PD1, 0);		/* RXD1 */
++	at91_set_B_periph(AT91_PIN_PD7, 0);		/* RTS1 */
++	at91_set_B_periph(AT91_PIN_PD8, 0);		/* CTS1 */
++}
++
++static struct resource uart2_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_US2,
++		.end	= AT91SAM9263_BASE_US2 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_US2,
++		.end	= AT91SAM9263_ID_US2,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9263_uart2_device = {
++	.name		= "atmel_usart",
++	.id		= 3,
++	.dev		= {
++				.platform_data	= &uart2_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart2_resources,
++	.num_resources	= ARRAY_SIZE(uart2_resources),
++};
++
++static inline void configure_usart2_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PD2, 1);		/* TXD2 */
++	at91_set_A_periph(AT91_PIN_PD3, 0);		/* RXD2 */
++	at91_set_B_periph(AT91_PIN_PD5, 0);		/* RTS2 */
++	at91_set_B_periph(AT91_PIN_PD6, 0);		/* CTS2 */
++}
++
++struct platform_device *at91_uarts[ATMEL_MAX_UART];	/* the UARTs to use */
++struct platform_device *atmel_default_console_device;	/* the serial console device */
++
++void __init at91_init_serial(struct at91_uart_config *config)
++{
++	int i;
++
++	/* Fill in list of supported UARTs */
++	for (i = 0; i < config->nr_tty; i++) {
++		switch (config->tty_map[i]) {
++			case 0:
++				configure_usart0_pins();
++				at91_uarts[i] = &at91sam9263_uart0_device;
++				at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
++				break;
++			case 1:
++				configure_usart1_pins();
++				at91_uarts[i] = &at91sam9263_uart1_device;
++				at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
++				break;
++			case 2:
++				configure_usart2_pins();
++				at91_uarts[i] = &at91sam9263_uart2_device;
++				at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
++				break;
++			case 3:
++				configure_dbgu_pins();
++				at91_uarts[i] = &at91sam9263_dbgu_device;
++				at91_clock_associate("mck", &at91sam9263_dbgu_device.dev, "usart");
++				break;
++			default:
++				continue;
++		}
++		at91_uarts[i]->id = i;		/* update ID number to mapped ID */
++	}
++
++	/* Set serial console device */
++	if (config->console_tty < ATMEL_MAX_UART)
++		atmel_default_console_device = at91_uarts[config->console_tty];
++	if (!atmel_default_console_device)
++		printk(KERN_INFO "AT91: No default serial console defined.\n");
++}
++
++void __init at91_add_device_serial(void)
++{
++	int i;
++
++	for (i = 0; i < ATMEL_MAX_UART; i++) {
++		if (at91_uarts[i])
++			platform_device_register(at91_uarts[i]);
++	}
++}
++#else
++void __init at91_init_serial(struct at91_uart_config *config) {}
++void __init at91_add_device_serial(void) {}
++#endif
++
++
++/* -------------------------------------------------------------------- */
++/*
++ * These devices are always present and don't need any board-specific
++ * setup.
++ */
++static int __init at91_add_standard_devices(void)
++{
++	return 0;
++}
++
++arch_initcall(at91_add_standard_devices);
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam926x_time.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam926x_time.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/at91sam926x_time.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/at91sam926x_time.c	2007-03-24 16:39:15.000000000 +0100
+@@ -30,7 +30,6 @@
+  * Returns number of microseconds since last timer interrupt.  Note that interrupts
+  * will have been disabled by do_gettimeofday()
+  *  'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+- *  'tick' is usecs per jiffy (linux/timex.h).
+  */
+ static unsigned long at91sam926x_gettimeoffset(void)
+ {
+@@ -39,7 +38,7 @@
+ 
+ 	elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t);		/* hardware clock cycles */
+ 
+-	return (unsigned long)(elapsed * 1000000) / LATCH;
++	return (unsigned long)(elapsed * jiffies_to_usecs(1)) / LATCH;
+ }
+ 
+ /*
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-carmeva.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-carmeva.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-carmeva.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-carmeva.c	2007-03-24 16:39:15.000000000 +0100
+@@ -134,7 +134,7 @@
+ 	/* Compact Flash */
+ //	at91_add_device_cf(&carmeva_cf_data);
+ 	/* MMC */
+-	at91_add_device_mmc(&carmeva_mmc_data);
++	at91_add_device_mmc(0, &carmeva_mmc_data);
+ }
+ 
+ MACHINE_START(CARMEVA, "Carmeva")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-csb337.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-csb337.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-csb337.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-csb337.c	2007-03-24 16:39:15.000000000 +0100
+@@ -24,6 +24,8 @@
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/spi/spi.h>
++#include <linux/interrupt.h>
++#include <linux/mtd/physmap.h>
+ 
+ #include <asm/hardware.h>
+ #include <asm/setup.h>
+@@ -58,6 +60,7 @@
+ 
+ 	/* Setup the LEDs */
+ 	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
++	at91_set_gpio_output(AT91_PIN_PB2, 1);		/* third (unused) LED */
+ 
+ 	/* Setup the serial ports and console */
+ 	at91_init_serial(&csb337_uart_config);
+@@ -112,6 +115,91 @@
+ 	},
+ };
+ 
++#define CSB_FLASH_BASE	AT91_CHIPSELECT_0
++#define CSB_FLASH_SIZE	0x800000
++
++static struct mtd_partition csb_flash_partitions[] = {
++	{
++		.name		= "uMON flash",
++		.offset		= 0,
++		.size		= MTDPART_SIZ_FULL,
++		.mask_flags	= MTD_WRITEABLE,	/* read only */
++	}
++};
++
++static struct physmap_flash_data csb_flash_data = {
++	.width		= 2,
++	.parts		= csb_flash_partitions,
++	.nr_parts	= ARRAY_SIZE(csb_flash_partitions),
++};
++
++static struct resource csb_flash_resources[] = {
++	{
++		.start	= CSB_FLASH_BASE,
++		.end	= CSB_FLASH_BASE + CSB_FLASH_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	}
++};
++
++static struct platform_device csb_flash = {
++	.name		= "physmap-flash",
++	.id		= 0,
++	.dev		= {
++				.platform_data = &csb_flash_data,
++			},
++	.resource	= csb_flash_resources,
++	.num_resources	= ARRAY_SIZE(csb_flash_resources),
++};
++
++static struct at91_gpio_led csb337_leds[] = {
++	{
++		.name		= "led0",
++		.gpio		= AT91_PIN_PB0,
++		.trigger	= "heartbeat",
++	},
++	{
++		.name		= "led1",
++		.gpio		= AT91_PIN_PB1,
++		.trigger	= "timer",
++	},
++	{
++		.name		= "led2",
++		.gpio		= AT91_PIN_PB2,
++	}
++};
++
++#if defined(CONFIG_CSB300_WAKE_SW0) || defined(CONFIG_CSB300_WAKE_SW1)
++static irqreturn_t switch_irq_handler(int irq, void *context)
++{
++	return IRQ_HANDLED;
++}
++
++static inline void __init switch_irq_setup(int irq, char *name, unsigned long mode)
++{
++	int res;
++
++	res = request_irq(irq, switch_irq_handler, IRQF_SAMPLE_RANDOM | mode, name, NULL);
++	if (res == 0)
++		enable_irq_wake(irq);
++}
++
++static void __init csb300_switches(void)
++{
++#ifdef CONFIG_CSB300_WAKE_SW0
++	at91_set_A_periph(AT91_PIN_PB29, 1);		/* IRQ0 */
++	switch_irq_setup(AT91RM9200_ID_IRQ0, "csb300_sw0", IRQF_TRIGGER_FALLING);
++#endif
++#ifdef CONFIG_CSB300_WAKE_SW1
++	at91_set_gpio_input(AT91_PIN_PB28, 1);
++	at91_set_deglitch(AT91_PIN_PB28, 1);
++	switch_irq_setup(AT91_PIN_PB28, "csb300_sw1", IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING);
++#endif
++	/* there's also SW2 at PA21, GPIO or TIOA2 */
++}
++#else
++static void __init csb300_switches(void) {}
++#endif
++
+ static void __init csb337_board_init(void)
+ {
+ 	/* Serial */
+@@ -130,7 +218,13 @@
+ 	/* SPI */
+ 	at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
+ 	/* MMC */
+-	at91_add_device_mmc(&csb337_mmc_data);
++	at91_add_device_mmc(0, &csb337_mmc_data);
++	/* LEDS */
++	at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds));
++	/* NOR flash */
++	platform_device_register(&csb_flash);
++	/* Switches on CSB300 */
++	csb300_switches();
+ }
+ 
+ MACHINE_START(CSB337, "Cogent CSB337")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-csb637.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-csb637.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-csb637.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-csb637.c	2007-03-24 16:39:15.000000000 +0100
+@@ -23,6 +23,7 @@
+ #include <linux/mm.h>
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
++#include <linux/mtd/physmap.h>
+ 
+ #include <asm/hardware.h>
+ #include <asm/setup.h>
+@@ -81,6 +82,42 @@
+ 	.pullup_pin   = AT91_PIN_PB1,
+ };
+ 
++#define CSB_FLASH_BASE	AT91_CHIPSELECT_0
++#define CSB_FLASH_SIZE	0x1000000
++
++static struct mtd_partition csb_flash_partitions[] = {
++	{
++		.name		= "uMON flash",
++		.offset		= 0,
++		.size		= MTDPART_SIZ_FULL,
++		.mask_flags	= MTD_WRITEABLE,	/* read only */
++	}
++};
++
++static struct physmap_flash_data csb_flash_data = {
++	.width		= 2,
++	.parts		= csb_flash_partitions,
++	.nr_parts	= ARRAY_SIZE(csb_flash_partitions),
++};
++
++static struct resource csb_flash_resources[] = {
++	{
++		.start	= CSB_FLASH_BASE,
++		.end	= CSB_FLASH_BASE + CSB_FLASH_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	}
++};
++
++static struct platform_device csb_flash = {
++	.name		= "physmap-flash",
++	.id		= 0,
++	.dev		= {
++				.platform_data = &csb_flash_data,
++			},
++	.resource	= csb_flash_resources,
++	.num_resources	= ARRAY_SIZE(csb_flash_resources),
++};
++
+ static void __init csb637_board_init(void)
+ {
+ 	/* Serial */
+@@ -95,6 +132,8 @@
+ 	at91_add_device_i2c();
+ 	/* SPI */
+ 	at91_add_device_spi(NULL, 0);
++	/* NOR flash */
++	platform_device_register(&csb_flash);
+ }
+ 
+ MACHINE_START(CSB637, "Cogent CSB637")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-dk.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-dk.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-dk.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-dk.c	2007-03-24 16:39:15.000000000 +0100
+@@ -73,6 +73,185 @@
+ 	at91rm9200_init_interrupts(NULL);
+ }
+ 
++#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
++#include <video/s1d13xxxfb.h>
++#include <asm/arch/ics1523.h>
++
++/* EPSON S1D13806 FB */
++#define AT91_FB_REG_BASE	0x30000000L
++#define AT91_FB_REG_SIZE	0x200
++#define AT91_FB_VMEM_BASE	0x30200000L
++#define AT91_FB_VMEM_SIZE	0x140000L
++
++static void __init dk_init_video(void)
++{
++	/* NWAIT Signal */
++	at91_set_A_periph(AT91_PIN_PC6, 0);
++
++	/* Initialization of the Static Memory Controller for Chip Select 2 */
++	at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16			/* 16 bit */
++				| AT91_SMC_WSEN | AT91_SMC_NWS_(4)	/* wait states */
++				| AT91_SMC_TDF_(1)			/* float time */
++	);
++
++	at91_ics1523_init();
++}
++
++/* CRT:    (active)   640x480 60Hz (PCLK=CLKI=25.175MHz)
++   Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
++static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
++	{S1DREG_MISC,			0x00},	/* Enable Memory/Register select bit */
++	{S1DREG_COM_DISP_MODE,		0x00},	/* disable display output */
++	{S1DREG_GPIO_CNF0,		0x00},
++	{S1DREG_GPIO_CNF1,		0x00},
++	{S1DREG_GPIO_CTL0,		0x08},
++	{S1DREG_GPIO_CTL1,		0x00},
++	{S1DREG_CLK_CNF,		0x01},	/* no divide, MCLK source is CLKI3 0x02*/
++	{S1DREG_LCD_CLK_CNF,		0x00},
++	{S1DREG_CRT_CLK_CNF,		0x00},
++	{S1DREG_MPLUG_CLK_CNF,		0x00},
++	{S1DREG_CPU2MEM_WST_SEL,	0x01},	/* 2*period(MCLK) - 4ns > period(BCLK) */
++	{S1DREG_SDRAM_REF_RATE,		0x03},	/* 32768 <= MCLK <= 50000 (MHz) */
++	{S1DREG_SDRAM_TC0,		0x00},	/* MCLK source freq (MHz): */
++	{S1DREG_SDRAM_TC1,		0x01},	/* 42 <= MCLK <= 50 */
++	{S1DREG_MEM_CNF,		0x80},	/* SDRAM Initialization - needed before mem access */
++	{S1DREG_PANEL_TYPE,		0x25},	/* std TFT 16bit, 8bit SCP format 2, single passive LCD */
++	{S1DREG_MOD_RATE,		0x00},	/* toggle every FPFRAME */
++	{S1DREG_LCD_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_LCD_NDISP_HPER,		0x12},	/* 152 pix */
++	{S1DREG_TFT_FPLINE_START,	0x01},	/* 13 pix */
++	{S1DREG_TFT_FPLINE_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_LCD_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_LCD_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_LCD_NDISP_VPER,		0x2C},	/* 44 lines */
++	{S1DREG_TFT_FPFRAME_START,	0x0A},	/* 10 lines */
++	{S1DREG_TFT_FPFRAME_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_LCD_DISP_MODE,		0x05},  /* 16 bpp */
++	{S1DREG_LCD_MISC,		0x00},	/* dithering enabled, dual panel buffer enabled */
++	{S1DREG_LCD_DISP_START0,	0x00},
++	{S1DREG_LCD_DISP_START1,	0xC8},
++	{S1DREG_LCD_DISP_START2,	0x00},
++	{S1DREG_LCD_MEM_OFF0,		0x80},
++	{S1DREG_LCD_MEM_OFF1,		0x02},
++	{S1DREG_LCD_PIX_PAN,		0x00},
++	{S1DREG_LCD_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_LCD_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_CRT_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_CRT_NDISP_HPER,		0x13},	/* 160 pix */
++	{S1DREG_CRT_HRTC_START,		0x01},	/* 13 pix */
++	{S1DREG_CRT_HRTC_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_CRT_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_CRT_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_CRT_NDISP_VPER,		0x2B},	/* 44 lines */
++	{S1DREG_CRT_VRTC_START,		0x09},	/* 10 lines */
++	{S1DREG_CRT_VRTC_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_TV_OUT_CTL,		0x10},
++	{S1DREG_CRT_DISP_MODE,		0x05},	/* 16 bpp */
++	{S1DREG_CRT_DISP_START0,	0x00},
++	{S1DREG_CRT_DISP_START1,	0x00},
++	{S1DREG_CRT_DISP_START2,	0x00},
++	{S1DREG_CRT_MEM_OFF0,		0x80},
++	{S1DREG_CRT_MEM_OFF1,		0x02},
++	{S1DREG_CRT_PIX_PAN,		0x00},
++	{S1DREG_CRT_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_CRT_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_LCD_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_LCD_CUR_START,		0x01},
++	{S1DREG_LCD_CUR_XPOS0,		0x00},
++	{S1DREG_LCD_CUR_XPOS1,		0x00},
++	{S1DREG_LCD_CUR_YPOS0,		0x00},
++	{S1DREG_LCD_CUR_YPOS1,		0x00},
++	{S1DREG_LCD_CUR_BCTL0,		0x00},
++	{S1DREG_LCD_CUR_GCTL0,		0x00},
++	{S1DREG_LCD_CUR_RCTL0,		0x00},
++	{S1DREG_LCD_CUR_BCTL1,		0x1F},
++	{S1DREG_LCD_CUR_GCTL1,		0x3F},
++	{S1DREG_LCD_CUR_RCTL1,		0x1F},
++	{S1DREG_LCD_CUR_FIFO_HTC,	0x00},
++	{S1DREG_CRT_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_CRT_CUR_START,		0x01},
++	{S1DREG_CRT_CUR_XPOS0,		0x00},
++	{S1DREG_CRT_CUR_XPOS1,		0x00},
++	{S1DREG_CRT_CUR_YPOS0,		0x00},
++	{S1DREG_CRT_CUR_YPOS1,		0x00},
++	{S1DREG_CRT_CUR_BCTL0,		0x00},
++	{S1DREG_CRT_CUR_GCTL0,		0x00},
++	{S1DREG_CRT_CUR_RCTL0,		0x00},
++	{S1DREG_CRT_CUR_BCTL1,		0x1F},
++	{S1DREG_CRT_CUR_GCTL1,		0x3F},
++	{S1DREG_CRT_CUR_RCTL1,		0x1F},
++	{S1DREG_CRT_CUR_FIFO_HTC,	0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CC_EXP,		0x00},
++	{S1DREG_BBLT_OP,		0x00},
++	{S1DREG_BBLT_SRC_START0,	0x00},
++	{S1DREG_BBLT_SRC_START1,	0x00},
++	{S1DREG_BBLT_SRC_START2,	0x00},
++	{S1DREG_BBLT_DST_START0,	0x00},
++	{S1DREG_BBLT_DST_START1,	0x00},
++	{S1DREG_BBLT_DST_START2,	0x00},
++	{S1DREG_BBLT_MEM_OFF0,		0x00},
++	{S1DREG_BBLT_MEM_OFF1,		0x00},
++	{S1DREG_BBLT_WIDTH0,		0x00},
++	{S1DREG_BBLT_WIDTH1,		0x00},
++	{S1DREG_BBLT_HEIGHT0,		0x00},
++	{S1DREG_BBLT_HEIGHT1,		0x00},
++	{S1DREG_BBLT_BGC0,		0x00},
++	{S1DREG_BBLT_BGC1,		0x00},
++	{S1DREG_BBLT_FGC0,		0x00},
++	{S1DREG_BBLT_FGC1,		0x00},
++	{S1DREG_LKUP_MODE,		0x00},	/* LCD LUT r | LCD and CRT/TV LUT w */
++	{S1DREG_LKUP_ADDR,		0x00},
++	{S1DREG_PS_CNF,			0x00},	/* Power Save disable */
++	{S1DREG_PS_STATUS,		0x02},	/* LCD Panel down, mem up */
++	{S1DREG_CPU2MEM_WDOGT,		0x00},
++	{S1DREG_COM_DISP_MODE,		0x02},	/* enable CRT display output */
++};
++
++static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
++	.initregs		= dk_s1dfb_initregs,
++	.initregssize		= ARRAY_SIZE(dk_s1dfb_initregs),
++	.platform_init_video	= dk_init_video,
++};
++
++static u64 s1dfb_dmamask = 0xffffffffUL;
++
++static struct resource dk_s1dfb_resource[] = {
++	[0] = {	/* video mem */
++		.name   = "s1d13806 memory",
++		.start  = AT91_FB_VMEM_BASE,
++		.end    = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++	[1] = {	/* video registers */
++		.name   = "s1d13806 registers",
++		.start  = AT91_FB_REG_BASE,
++		.end    = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++};
++
++static struct platform_device dk_s1dfb_device = {
++	.name		= "s1d13806fb",
++	.id		= -1,
++	.dev		= {
++			.dma_mask		= &s1dfb_dmamask,
++			.coherent_dma_mask	= 0xffffffff,
++			.platform_data		= &dk_s1dfb_pdata,
++	},
++	.resource	= dk_s1dfb_resource,
++	.num_resources	= ARRAY_SIZE(dk_s1dfb_resource),
++};
++
++static void __init dk_add_device_video(void)
++{
++	platform_device_register(&dk_s1dfb_device);
++}
++#else
++static void __init dk_add_device_video(void) {}
++#endif
++
+ static struct at91_eth_data __initdata dk_eth_data = {
+ 	.phy_irq_pin	= AT91_PIN_PC4,
+ 	.is_rmii	= 1,
+@@ -151,7 +330,7 @@
+ #define DK_FLASH_SIZE	0x200000
+ 
+ static struct physmap_flash_data dk_flash_data = {
+-	.width	= 2,
++	.width		= 2,
+ };
+ 
+ static struct resource dk_flash_resource = {
+@@ -170,6 +349,13 @@
+ 	.num_resources	= 1,
+ };
+ 
++static struct at91_gpio_led dk_leds[] = {
++	{
++		.name		= "led0",
++		.gpio		= AT91_PIN_PB2,
++		.trigger	= "timer",
++	}
++};
+ 
+ static void __init dk_board_init(void)
+ {
+@@ -194,14 +380,16 @@
+ #else
+ 	/* MMC */
+ 	at91_set_gpio_output(AT91_PIN_PB7, 1);	/* this MMC card slot can optionally use SPI signaling (CS3). */
+-	at91_add_device_mmc(&dk_mmc_data);
++	at91_add_device_mmc(0, &dk_mmc_data);
+ #endif
+ 	/* NAND */
+ 	at91_add_device_nand(&dk_nand_data);
+ 	/* NOR Flash */
+ 	platform_device_register(&dk_flash);
++	/* LEDs */
++	at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
+ 	/* VGA */
+-//	dk_add_device_video();
++	dk_add_device_video();
+ }
+ 
+ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-eb9200.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-eb9200.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-eb9200.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-eb9200.c	2007-03-24 16:39:15.000000000 +0100
+@@ -109,7 +109,7 @@
+ 	at91_add_device_spi(NULL, 0);
+ 	/* MMC */
+ 	/* only supports 1 or 4 bit interface, not wired through to SPI */
+-	at91_add_device_mmc(&eb9200_mmc_data);
++	at91_add_device_mmc(0, &eb9200_mmc_data);
+ }
+ 
+ MACHINE_START(ATEB9200, "Embest ATEB9200")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-ek.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-ek.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-ek.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-ek.c	2007-03-24 16:39:15.000000000 +0100
+@@ -73,6 +73,187 @@
+ 	at91rm9200_init_interrupts(NULL);
+ }
+ 
++#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
++#include <video/s1d13xxxfb.h>
++#include <asm/arch/ics1523.h>
++
++/* EPSON S1D13806 FB */
++#define AT91_FB_REG_BASE	0x40000000L
++#define	AT91_FB_REG_SIZE	0x200
++#define AT91_FB_VMEM_BASE	0x40200000L
++#define AT91_FB_VMEM_SIZE	0x140000L
++
++static void __init ek_init_video(void)
++{
++	/* NWAIT Signal */
++	at91_set_A_periph(AT91_PIN_PC6, 0);
++
++	/* Initialization of the Static Memory Controller for Chip Select 3 */
++	at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16			/* 16 bit */
++				| AT91_SMC_WSEN | AT91_SMC_NWS_(5)	/* wait states */
++				| AT91_SMC_TDF_(1)			/* float time */
++	);
++
++	at91_ics1523_init();
++}
++
++/* CRT:    (active)   640x480 60Hz (PCLK=CLKI=25.175MHz)
++   Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
++static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
++	{S1DREG_MISC,			0x00},	/* Enable Memory/Register select bit */
++	{S1DREG_COM_DISP_MODE,		0x00},	/* disable display output */
++	{S1DREG_GPIO_CNF0,		0xFF},	// 0x00
++	{S1DREG_GPIO_CNF1,		0x1F},	// 0x08
++	{S1DREG_GPIO_CTL0,		0x00},
++	{S1DREG_GPIO_CTL1,		0x00},
++	{S1DREG_CLK_CNF,		0x01},	/* no divide, MCLK source is CLKI3 0x02*/
++	{S1DREG_LCD_CLK_CNF,		0x00},
++	{S1DREG_CRT_CLK_CNF,		0x00},
++	{S1DREG_MPLUG_CLK_CNF,		0x00},
++	{S1DREG_CPU2MEM_WST_SEL,	0x01},	/* 2*period(MCLK) - 4ns > period(BCLK) */
++	{S1DREG_SDRAM_REF_RATE,		0x03},	/* 32768 <= MCLK <= 50000 (MHz) */
++	{S1DREG_SDRAM_TC0,		0x00},	/* MCLK source freq (MHz): */
++	{S1DREG_SDRAM_TC1,		0x01},	/* 42 <= MCLK <= 50 */
++	{S1DREG_MEM_CNF,		0x80},	/* SDRAM Initialization - needed before mem access */
++	{S1DREG_PANEL_TYPE,		0x25},	/* std TFT 16bit, 8bit SCP format 2, single passive LCD */
++	{S1DREG_MOD_RATE,		0x00},	/* toggle every FPFRAME */
++	{S1DREG_LCD_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_LCD_NDISP_HPER,		0x12},	/* 152 pix */
++	{S1DREG_TFT_FPLINE_START,	0x01},	/* 13 pix */
++	{S1DREG_TFT_FPLINE_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_LCD_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_LCD_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_LCD_NDISP_VPER,		0x2C},	/* 44 lines */
++	{S1DREG_TFT_FPFRAME_START,	0x0A},	/* 10 lines */
++	{S1DREG_TFT_FPFRAME_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_LCD_DISP_MODE,		0x05},  /* 16 bpp */
++	{S1DREG_LCD_MISC,		0x00},	/* dithering enabled, dual panel buffer enabled */
++	{S1DREG_LCD_DISP_START0,	0x00},
++	{S1DREG_LCD_DISP_START1,	0xC8},
++	{S1DREG_LCD_DISP_START2,	0x00},
++	{S1DREG_LCD_MEM_OFF0,		0x80},
++	{S1DREG_LCD_MEM_OFF1,		0x02},
++	{S1DREG_LCD_PIX_PAN,		0x00},
++	{S1DREG_LCD_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_LCD_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_CRT_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_CRT_NDISP_HPER,		0x13},	/* 160 pix */
++	{S1DREG_CRT_HRTC_START,		0x01},	/* 13 pix */
++	{S1DREG_CRT_HRTC_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_CRT_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_CRT_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_CRT_NDISP_VPER,		0x2B},	/* 44 lines */
++	{S1DREG_CRT_VRTC_START,		0x09},	/* 10 lines */
++	{S1DREG_CRT_VRTC_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_TV_OUT_CTL,		0x10},
++	{0x005E,			0x9F},
++	{0x005F,			0x00},
++	{S1DREG_CRT_DISP_MODE,		0x05},	/* 16 bpp */
++	{S1DREG_CRT_DISP_START0,	0x00},
++	{S1DREG_CRT_DISP_START1,	0x00},
++	{S1DREG_CRT_DISP_START2,	0x00},
++	{S1DREG_CRT_MEM_OFF0,		0x80},
++	{S1DREG_CRT_MEM_OFF1,		0x02},
++	{S1DREG_CRT_PIX_PAN,		0x00},
++	{S1DREG_CRT_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_CRT_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_LCD_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_LCD_CUR_START,		0x01},
++	{S1DREG_LCD_CUR_XPOS0,		0x00},
++	{S1DREG_LCD_CUR_XPOS1,		0x00},
++	{S1DREG_LCD_CUR_YPOS0,		0x00},
++	{S1DREG_LCD_CUR_YPOS1,		0x00},
++	{S1DREG_LCD_CUR_BCTL0,		0x00},
++	{S1DREG_LCD_CUR_GCTL0,		0x00},
++	{S1DREG_LCD_CUR_RCTL0,		0x00},
++	{S1DREG_LCD_CUR_BCTL1,		0x1F},
++	{S1DREG_LCD_CUR_GCTL1,		0x3F},
++	{S1DREG_LCD_CUR_RCTL1,		0x1F},
++	{S1DREG_LCD_CUR_FIFO_HTC,	0x00},
++	{S1DREG_CRT_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_CRT_CUR_START,		0x01},
++	{S1DREG_CRT_CUR_XPOS0,		0x00},
++	{S1DREG_CRT_CUR_XPOS1,		0x00},
++	{S1DREG_CRT_CUR_YPOS0,		0x00},
++	{S1DREG_CRT_CUR_YPOS1,		0x00},
++	{S1DREG_CRT_CUR_BCTL0,		0x00},
++	{S1DREG_CRT_CUR_GCTL0,		0x00},
++	{S1DREG_CRT_CUR_RCTL0,		0x00},
++	{S1DREG_CRT_CUR_BCTL1,		0x1F},
++	{S1DREG_CRT_CUR_GCTL1,		0x3F},
++	{S1DREG_CRT_CUR_RCTL1,		0x1F},
++	{S1DREG_CRT_CUR_FIFO_HTC,	0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CC_EXP,		0x00},
++	{S1DREG_BBLT_OP,		0x00},
++	{S1DREG_BBLT_SRC_START0,	0x00},
++	{S1DREG_BBLT_SRC_START1,	0x00},
++	{S1DREG_BBLT_SRC_START2,	0x00},
++	{S1DREG_BBLT_DST_START0,	0x00},
++	{S1DREG_BBLT_DST_START1,	0x00},
++	{S1DREG_BBLT_DST_START2,	0x00},
++	{S1DREG_BBLT_MEM_OFF0,		0x00},
++	{S1DREG_BBLT_MEM_OFF1,		0x00},
++	{S1DREG_BBLT_WIDTH0,		0x00},
++	{S1DREG_BBLT_WIDTH1,		0x00},
++	{S1DREG_BBLT_HEIGHT0,		0x00},
++	{S1DREG_BBLT_HEIGHT1,		0x00},
++	{S1DREG_BBLT_BGC0,		0x00},
++	{S1DREG_BBLT_BGC1,		0x00},
++	{S1DREG_BBLT_FGC0,		0x00},
++	{S1DREG_BBLT_FGC1,		0x00},
++	{S1DREG_LKUP_MODE,		0x00},	/* LCD LUT r | LCD and CRT/TV LUT w */
++	{S1DREG_LKUP_ADDR,		0x00},
++	{S1DREG_PS_CNF,			0x10},	/* Power Save disable */
++	{S1DREG_PS_STATUS,		0x02},	/* LCD Panel down, mem up */
++	{S1DREG_CPU2MEM_WDOGT,		0x00},
++	{S1DREG_COM_DISP_MODE,		0x02},	/* enable CRT display output */
++};
++
++static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
++	.initregs		= ek_s1dfb_initregs,
++	.initregssize		= ARRAY_SIZE(ek_s1dfb_initregs),
++	.platform_init_video	= ek_init_video,
++};
++
++static u64 s1dfb_dmamask = 0xffffffffUL;
++
++static struct resource ek_s1dfb_resource[] = {
++	[0] = {	/* video mem */
++		.name   = "s1d13806 memory",
++		.start  = AT91_FB_VMEM_BASE,
++		.end    = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++	[1] = {	/* video registers */
++		.name   = "s1d13806 registers",
++		.start  = AT91_FB_REG_BASE,
++		.end    = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++};
++
++static struct platform_device ek_s1dfb_device = {
++	.name		= "s1d13806fb",
++	.id		= -1,
++	.dev		= {
++			.dma_mask		= &s1dfb_dmamask,
++			.coherent_dma_mask	= 0xffffffff,
++			.platform_data		= &ek_s1dfb_pdata,
++	},
++	.resource	= ek_s1dfb_resource,
++	.num_resources	= ARRAY_SIZE(ek_s1dfb_resource),
++};
++
++static void __init ek_add_device_video(void)
++{
++	platform_device_register(&ek_s1dfb_device);
++}
++#else
++static void __init ek_add_device_video(void) {}
++#endif
++
+ static struct at91_eth_data __initdata ek_eth_data = {
+ 	.phy_irq_pin	= AT91_PIN_PC4,
+ 	.is_rmii	= 1,
+@@ -113,7 +294,7 @@
+ #define EK_FLASH_SIZE	0x200000
+ 
+ static struct physmap_flash_data ek_flash_data = {
+-	.width	= 2,
++	.width		= 2,
+ };
+ 
+ static struct resource ek_flash_resource = {
+@@ -132,6 +313,18 @@
+ 	.num_resources	= 1,
+ };
+ 
++static struct at91_gpio_led ek_leds[] = {
++	{
++		.name		= "led0",
++		.gpio		= AT91_PIN_PB1,
++		.trigger	= "heartbeat",
++	},
++	{
++		.name		= "led1",
++		.gpio		= AT91_PIN_PB2,
++		.trigger	= "timer",
++	}
++};
+ 
+ static void __init ek_board_init(void)
+ {
+@@ -154,12 +347,14 @@
+ #else
+ 	/* MMC */
+ 	at91_set_gpio_output(AT91_PIN_PB22, 1);	/* this MMC card slot can optionally use SPI signaling (CS3). */
+-	at91_add_device_mmc(&ek_mmc_data);
++	at91_add_device_mmc(0, &ek_mmc_data);
+ #endif
+ 	/* NOR Flash */
+ 	platform_device_register(&ek_flash);
++	/* LEDs */
++	at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+ 	/* VGA */
+-//	ek_add_device_video();
++	ek_add_device_video();
+ }
+ 
+ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-kb9202.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-kb9202.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-kb9202.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-kb9202.c	2007-03-24 16:39:15.000000000 +0100
+@@ -122,7 +122,7 @@
+ 	/* USB Device */
+ 	at91_add_device_udc(&kb9202_udc_data);
+ 	/* MMC */
+-	at91_add_device_mmc(&kb9202_mmc_data);
++	at91_add_device_mmc(0, &kb9202_mmc_data);
+ 	/* I2C */
+ 	at91_add_device_i2c();
+ 	/* SPI */
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-sam9260ek.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-sam9260ek.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-sam9260ek.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-sam9260ek.c	2007-03-24 16:39:15.000000000 +0100
+@@ -1,5 +1,5 @@
+ /*
+- * linux/arch/arm/mach-at91rm9200/board-ek.c
++ * linux/arch/arm/mach-at91rm9200/board-sam9260ek.c
+  *
+  *  Copyright (C) 2005 SAN People
+  *  Copyright (C) 2006 Atmel
+@@ -118,7 +118,7 @@
+ /*
+  * MACB Ethernet device
+  */
+-static struct __initdata eth_platform_data ek_macb_data = {
++static struct __initdata at91_eth_data ek_macb_data = {
+ 	.phy_irq_pin	= AT91_PIN_PA7,
+ 	.is_rmii	= 1,
+ };
+@@ -187,7 +187,7 @@
+ 	/* Ethernet */
+ 	at91_add_device_eth(&ek_macb_data);
+ 	/* MMC */
+-	at91_add_device_mmc(&ek_mmc_data);
++	at91_add_device_mmc(0, &ek_mmc_data);
+ }
+ 
+ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-sam9261ek.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-sam9261ek.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-sam9261ek.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-sam9261ek.c	2007-03-24 16:39:15.000000000 +0100
+@@ -1,5 +1,5 @@
+ /*
+- * linux/arch/arm/mach-at91rm9200/board-ek.c
++ * linux/arch/arm/mach-at91rm9200/board-sam9261ek.c
+  *
+  *  Copyright (C) 2005 SAN People
+  *  Copyright (C) 2006 Atmel
+@@ -26,6 +26,11 @@
+ #include <linux/platform_device.h>
+ #include <linux/spi/spi.h>
+ #include <linux/dm9000.h>
++#include <linux/spi/ads7846.h>
++#include <linux/fb.h>
++#include <linux/clk.h>
++
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/hardware.h>
+ #include <asm/setup.h>
+@@ -148,6 +153,42 @@
+ 
+ 
+ /*
++ * Touchscreen ads7843
++ */
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++
++int ads7843_pendown_state(void)
++{
++	return !at91_get_gpio_value(AT91_PIN_PC2);
++}
++
++static struct ads7846_platform_data ads_info = {
++	.model			= 7843,
++	.x_min	= 150,	.x_max	= 3830,
++	.y_min	= 190,	.y_max	= 3830,
++	.vref_delay_usecs	= 100,
++	.x_plate_ohms		= 450,
++	.y_plate_ohms		= 250,
++	.pressure_max		= 15000,
++	.debounce_max		= 1,
++	.debounce_rep		= 0,
++	.debounce_tol		= (~0),
++	.get_pendown_state	= ads7843_pendown_state,
++};
++
++void __init at91_add_device_ts(void)
++{
++	/* Configure Interrupt 1 as external IRQ, with pullup */
++	at91_set_B_periph(AT91_PIN_PC2, 1);		/* IRQ0 */
++	/* ts busy */
++	at91_set_gpio_input(AT91_PIN_PA11, 1);
++}
++#else
++void __init at91_add_device_ts(void) {}
++#endif
++
++
++/*
+  * MCI (SD/MMC)
+  */
+ static struct at91_mmc_data __initdata ek_mmc_data = {
+@@ -204,6 +245,17 @@
+ 		.max_speed_hz	= 15 * 1000 * 1000,
+ 		.bus_num	= 0,
+ 	},
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++	{
++		.modalias	= "ads7846",
++		.chip_select	= 2,
++		.max_speed_hz	= 125000	/* max sample rate at 3V */
++					* 26,	/* command + data + overhead */
++		.bus_num	= 0,
++		.platform_data	= &ads_info,
++		.irq		= AT91SAM9261_ID_IRQ0,
++	},
++#endif
+ #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+ 	{	/* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
+ 		.modalias	= "mtd_dataflash",
+@@ -222,6 +274,64 @@
+ };
+ 
+ 
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++	{
++	        .name           = "TX09D50VM1CCA @ 60",
++		.refresh	= 60,
++		.xres		= 240,		.yres		= 320,
++		.pixclock	= KHZ2PICOS(4965),
++
++		.left_margin	= 1,		.right_margin	= 33,
++		.upper_margin	= 1,		.lower_margin	= 0,
++		.hsync_len	= 5,		.vsync_len	= 1,
++
++		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++	.manufacturer	= "HIT",
++	.monitor        = "TX09D50VM1CCA",
++
++        .modedb		= at91_tft_vga_modes,
++	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
++	.hfmin		= 15000,
++	.hfmax		= 64000,
++	.vfmin		= 50,
++	.vfmax		= 150,
++};
++
++/* Driver defaults */
++#define AT91SAM9261_DEFAULT_LCDCON2 	(ATMEL_LCDC_MEMOR_LITTLE \
++					| ATMEL_LCDC_DISTYPE_TFT    \
++					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++#define AT91SAM9261_DEFAULT_FB_FLAGS	(FBINFO_DEFAULT \
++					| FBINFO_PARTIAL_PAN_OK \
++					| FBINFO_HWACCEL_XPAN \
++					| FBINFO_HWACCEL_YPAN)
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++	.default_bpp = 16,
++	.default_dmacon = ATMEL_LCDC_DMAEN,
++	.default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2,
++	.default_monspecs = &at91fb_default_monspecs,
++	.default_flags = AT91SAM9261_DEFAULT_FB_FLAGS,
++	.power_control_pin = AT91_PIN_PA12,
++	.guard_time = 1,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
+ static void __init ek_board_init(void)
+ {
+ 	/* Serial */
+@@ -243,8 +353,12 @@
+ 	at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
+ #else
+ 	/* MMC */
+-	at91_add_device_mmc(&ek_mmc_data);
++	at91_add_device_mmc(0, &ek_mmc_data);
+ #endif
++	/* LCD Controller */
++	at91_add_device_lcdc(&ek_lcdc_data);
++	/* Touchscreen */
++	at91_add_device_ts();
+ }
+ 
+ MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-sam9263ek.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-sam9263ek.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/board-sam9263ek.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/board-sam9263ek.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,297 @@
++/*
++ * linux/arch/arm/mach-at91rm9200/board-sam9263ek.c
++ *
++ *  Copyright (C) 2005 SAN People
++ *  Copyright (C) 2007 Atmel Corporation.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/ads7846.h>
++#include <linux/fb.h>
++#include <linux/clk.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/hardware.h>
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91sam926x_mc.h>
++
++#include "generic.h"
++
++
++/*
++ * Serial port configuration.
++ *    0 .. 2 = USART0 .. USART2
++ *    3      = DBGU
++ */
++static struct at91_uart_config __initdata ek_uart_config = {
++	.console_tty	= 0,				/* ttyS0 */
++	.nr_tty		= 2,
++	.tty_map	= { 3, 0, -1, -1, }		/* ttyS0, ..., ttyS3 */
++};
++
++static void __init ek_map_io(void)
++{
++	/* Initialize processor: 16.367 MHz crystal */
++	at91sam9263_initialize(16367660);
++
++	/* Setup the serial ports and console */
++	at91_init_serial(&ek_uart_config);
++}
++
++static void __init ek_init_irq(void)
++{
++	at91sam9263_init_interrupts(NULL);
++}
++
++
++/*
++ * USB Host port
++ */
++static struct at91_usbh_data __initdata ek_usbh_data = {
++	.ports		= 2,
++	.vbus_pin	= { AT91_PIN_PA24, AT91_PIN_PA21 },
++};
++
++/*
++ * USB Device port
++ */
++static struct at91_udc_data __initdata ek_udc_data = {
++	.vbus_pin	= AT91_PIN_PA25,
++	.pullup_pin	= 0,		/* pull-up driven by UDC */
++};
++
++/*
++ * Touchscreen ads7843
++ */
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++
++int ads7843_pendown_state(void)
++{
++	return !at91_get_gpio_value(AT91_PIN_PA15);
++}
++
++static struct ads7846_platform_data ads_info = {
++	.model			= 7843,
++	.x_min	= 150,	.x_max	= 3830,
++	.y_min	= 190,	.y_max	= 3830,
++	.vref_delay_usecs	= 100,
++	.x_plate_ohms		= 450,
++	.y_plate_ohms		= 250,
++	.pressure_max		= 15000,
++	.debounce_max		= 1,
++	.debounce_rep		= 0,
++	.debounce_tol		= (~0),
++	.get_pendown_state	= ads7843_pendown_state,
++};
++
++void __init at91_add_device_ts(void)
++{
++	/* Configure Interrupt 1 as external IRQ, with pullup */
++	at91_set_B_periph(AT91_PIN_PA15, 1);		/* IRQ1 */
++	/* ts busy */
++	at91_set_gpio_input(AT91_PIN_PA31, 1);
++}
++#else
++void __init at91_add_device_ts(void) {}
++#endif
++
++/*
++ * SPI devices.
++ */
++static struct spi_board_info ek_spi_devices[] = {
++#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
++	{	/* DataFlash card */
++		.modalias	= "mtd_dataflash",
++		.chip_select	= 0,
++		.max_speed_hz	= 15 * 1000 * 1000,
++		.bus_num	= 0,
++	},
++#endif
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++	{
++		.modalias	= "ads7846",
++		.chip_select	= 3,
++		.max_speed_hz	= 125000	/* max sample rate at 3V */
++					* 26,	/* command + data + overhead */
++		.bus_num	= 0,
++		.platform_data	= &ads_info,
++		.irq		= AT91SAM9263_ID_IRQ1,
++	},
++#endif
++};
++
++/*
++ * MACB device
++ */
++static struct  __initdata  at91_eth_data ek_macb_data = {
++	.is_rmii = 1,
++};
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct at91_mmc_data __initdata ek_mmc_data = {
++	.wire4		= 1,
++	.det_pin	= AT91_PIN_PE18,
++	.wp_pin		= AT91_PIN_PE19,
++//	.vcc_pin	= ... not connected
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++	{
++		.name	= "Partition 1",
++		.offset	= 0,
++		.size	= 64 * 1024 * 1024,
++	},
++	{
++		.name	= "Partition 2",
++		.offset	= 64 * 1024 * 1024,
++		.size	= MTDPART_SIZ_FULL,
++	},
++};
++
++static struct mtd_partition *nand_partitions(int size, int *num_partitions)
++{
++	*num_partitions = ARRAY_SIZE(ek_nand_partition);
++	return ek_nand_partition;
++}
++
++static struct at91_nand_data __initdata ek_nand_data = {
++	.ale		= 21,
++	.cle		= 22,
++//	.det_pin	= ... not connected
++	.rdy_pin	= AT91_PIN_PA22,
++	.enable_pin	= AT91_PIN_PD15,
++	.partition_info	= nand_partitions,
++#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
++	.bus_width_16	= 1,
++#else
++	.bus_width_16	= 0,
++#endif
++};
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++	{
++	        .name           = "TX09D50VM1CCA @ 60",
++		.refresh	= 60,
++		.xres		= 240,		.yres		= 320,
++		.pixclock	= KHZ2PICOS(4965),
++
++		.left_margin	= 1,		.right_margin	= 33,
++		.upper_margin	= 1,		.lower_margin	= 0,
++		.hsync_len	= 5,		.vsync_len	= 1,
++
++		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++	.manufacturer	= "HIT",
++	.monitor        = "TX09D70VM1CCA",
++
++        .modedb		= at91_tft_vga_modes,
++	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
++	.hfmin		= 15000,
++	.hfmax		= 64000,
++	.vfmin		= 50,
++	.vfmax		= 150,
++};
++
++/* Driver defaults */
++#define AT91SAM9261_DEFAULT_LCDCON2 	(ATMEL_LCDC_MEMOR_LITTLE \
++					| ATMEL_LCDC_DISTYPE_TFT    \
++					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++#define AT91SAM9261_DEFAULT_FB_FLAGS	(FBINFO_DEFAULT \
++					| FBINFO_PARTIAL_PAN_OK \
++					| FBINFO_HWACCEL_XPAN \
++					| FBINFO_HWACCEL_YPAN)
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++	.default_bpp = 16,
++	.default_dmacon = ATMEL_LCDC_DMAEN,
++	.default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2,
++	.default_monspecs = &at91fb_default_monspecs,
++	.default_flags = AT91SAM9261_DEFAULT_FB_FLAGS,
++	.power_control_pin = AT91_PIN_PD12,
++	.guard_time = 1,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
++static void __init ek_board_init(void)
++{
++	/* Serial */
++	at91_add_device_serial();
++	/* USB Host */
++	at91_add_device_usbh(&ek_usbh_data);
++	/* USB Device */
++	at91_add_device_udc(&ek_udc_data);
++	/* select SPI clk for Dataflash card slot */
++	at91_set_gpio_output(AT91_PIN_PE20, 1);
++	/* SPI */
++	at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++	/* MMC */
++	at91_add_device_mmc(1, &ek_mmc_data);
++	/* MACB */
++	at91_add_device_eth(&ek_macb_data);
++	/* NAND */
++	at91_add_device_nand(&ek_nand_data);
++	/* LCD Controller */
++	at91_add_device_lcdc(&ek_lcdc_data);
++	/* Touchscreen */
++	at91_add_device_ts();
++}
++
++MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
++	/* Maintainer: Atmel */
++	.phys_io	= AT91_BASE_SYS,
++	.io_pg_offst	= (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++	.boot_params	= AT91_SDRAM_BASE + 0x100,
++	.timer		= &at91sam926x_timer,
++	.map_io		= ek_map_io,
++	.init_irq	= ek_init_irq,
++	.init_machine	= ek_board_init,
++MACHINE_END
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/clock.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/clock.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/clock.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/clock.c	2007-03-24 16:39:15.000000000 +0100
+@@ -375,6 +375,7 @@
+ 	seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
+ 
+ 	seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
++#warning "Hard-coded PCK"
+ 	for (i = 0; i < 4; i++)
+ 		seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
+ 	seq_printf(s, "SR   = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
+@@ -525,27 +526,6 @@
+ 	return 0;
+ }
+ 
+-/*
+- * Several unused clocks may be active.  Turn them off.
+- */
+-static void __init at91_periphclk_reset(void)
+-{
+-	unsigned long reg;
+-	struct clk *clk;
+-
+-	reg = at91_sys_read(AT91_PMC_PCSR);
+-
+-	list_for_each_entry(clk, &clocks, node) {
+-		if (clk->mode != pmc_periph_mode)
+-			continue;
+-
+-		if (clk->users > 0)
+-			reg &= ~clk->pmc_mask;
+-	}
+-
+-	at91_sys_write(AT91_PMC_PCDR, reg);
+-}
+-
+ static struct clk *const standard_pmc_clocks[] __initdata = {
+ 	/* four primary clocks */
+ 	&clk32k,
+@@ -586,7 +566,7 @@
+ 		pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla.rate_hz / 1000000);
+ 
+ 	/*
+-	 * USB clock init:  choose 48 MHz PLLB value, turn all clocks off,
++	 * USB clock init:  choose 48 MHz PLLB value,
+ 	 * disable 48MHz clock during usb peripheral suspend.
+ 	 *
+ 	 * REVISIT:  assumes MCK doesn't derive from PLLB!
+@@ -596,16 +576,10 @@
+ 	if (cpu_is_at91rm9200()) {
+ 		uhpck.pmc_mask = AT91RM9200_PMC_UHP;
+ 		udpck.pmc_mask = AT91RM9200_PMC_UDP;
+-		at91_sys_write(AT91_PMC_SCDR, AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP);
+ 		at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP);
+-	} else if (cpu_is_at91sam9260()) {
++	} else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) {
+ 		uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
+ 		udpck.pmc_mask = AT91SAM926x_PMC_UDP;
+-		at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP);
+-	} else if (cpu_is_at91sam9261()) {
+-		uhpck.pmc_mask = (AT91SAM926x_PMC_UHP | AT91_PMC_HCK0);
+-		udpck.pmc_mask = AT91SAM926x_PMC_UDP;
+-		at91_sys_write(AT91_PMC_SCDR, AT91SAM926x_PMC_UHP | AT91_PMC_HCK0 | AT91SAM926x_PMC_UDP);
+ 	}
+ 	at91_sys_write(AT91_CKGR_PLLBR, 0);
+ 
+@@ -634,11 +608,34 @@
+ 		(unsigned) main_clock / 1000000,
+ 		((unsigned) main_clock % 1000000) / 1000);
+ 
+-	/* disable all programmable clocks */
+-	at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK0 | AT91_PMC_PCK1 | AT91_PMC_PCK2 | AT91_PMC_PCK3);
++	return 0;
++}
++
++/*
++ * Several unused clocks may be active.  Turn them off.
++ */
++static int __init at91_clock_reset(void)
++{
++	unsigned long pcdr = 0;
++	unsigned long scdr = 0;
++	struct clk *clk;
++
++	list_for_each_entry(clk, &clocks, node) {
++		if (clk->users > 0)
++			continue;
++
++		if (clk->mode == pmc_periph_mode)
++			pcdr |= clk->pmc_mask;
++
++		if (clk->mode == pmc_sys_mode)
++			scdr |= clk->pmc_mask;
++
++		pr_debug("Clocks: disable unused %s\n", clk->name);
++	}
+ 
+-	/* disable all other unused peripheral clocks */
+-	at91_periphclk_reset();
++	at91_sys_write(AT91_PMC_PCDR, pcdr);
++	at91_sys_write(AT91_PMC_SCDR, scdr);
+ 
+ 	return 0;
+ }
++late_initcall(at91_clock_reset);
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/generic.h linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/generic.h
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/generic.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/generic.h	2007-03-24 16:39:15.000000000 +0100
+@@ -12,11 +12,13 @@
+ extern void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks);
+ extern void __init at91sam9260_initialize(unsigned long main_clock);
+ extern void __init at91sam9261_initialize(unsigned long main_clock);
++extern void __init at91sam9263_initialize(unsigned long main_clock);
+ 
+  /* Interrupts */
+ extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
+ extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
+ extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
++extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
+ extern void __init at91_aic_init(unsigned int priority[]);
+ 
+  /* Timer */
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/ics1523.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/ics1523.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/ics1523.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/ics1523.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,207 @@
++/*
++ * arch/arm/mach-at91rm9200/ics1523.c
++ *
++ *  Copyright (C) 2003 ATMEL Rousset
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <asm/hardware.h>
++#include <asm/io.h>
++
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/init.h>
++
++#include <asm/arch/ics1523.h>
++#include <asm/arch/at91_twi.h>
++#include <asm/arch/gpio.h>
++
++/* TWI Errors */
++#define	AT91_TWI_ERROR	(AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
++
++
++static void __iomem *twi_base;
++
++#define at91_twi_read(reg)		__raw_readl(twi_base + (reg))
++#define at91_twi_write(reg, val)	__raw_writel((val), twi_base + (reg))
++
++
++/* -----------------------------------------------------------------------------
++ * Initialization of TWI CLOCK
++ * ----------------------------------------------------------------------------- */
++
++static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
++{
++	int sclock;
++
++	/* Here, CKDIV = 1 and CHDIV = CLDIV  ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
++	sclock = (10*mck_khz / ICS_TRANSFER_RATE);
++	if (sclock % 10 >= 5)
++		sclock = (sclock /10) - 5;
++	else
++		sclock = (sclock /10)- 6;
++	sclock = (sclock + (4 - sclock %4)) >> 2;	/* div 4 */
++
++	at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
++}
++
++/* -----------------------------------------------------------------------------
++ * Read a byte with TWI Interface from the Clock Generator ICS1523
++ * ----------------------------------------------------------------------------- */
++
++static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
++{
++	int Status, nb_trial;
++
++	at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
++	at91_twi_write(AT91_TWI_IADR, reg_address);
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
++
++	/* Program temporizing period (300us) */
++	udelay(300);
++
++	/* Wait TXcomplete ... */
++	nb_trial = 0;
++	Status = at91_twi_read(AT91_TWI_SR);
++	while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
++		nb_trial++;
++		Status = at91_twi_read(AT91_TWI_SR);
++	}
++
++	if (Status & AT91_TWI_TXCOMP) {
++		*data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
++		return ICS1523_ACCESS_OK;
++	}
++	else
++		return ICS1523_ACCESS_ERROR;
++}
++
++/* -----------------------------------------------------------------------------
++ * Write a byte with TWI Interface to the Clock Generator ICS1523
++ * ----------------------------------------------------------------------------- */
++
++static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
++{
++	int Status, nb_trial;
++
++	at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
++	at91_twi_write(AT91_TWI_IADR, reg_address);
++	at91_twi_write(AT91_TWI_THR, data_out);
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
++
++	/* Program temporizing period (300us) */
++	udelay(300);
++
++	nb_trial = 0;
++	Status = at91_twi_read(AT91_TWI_SR);
++	while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
++		nb_trial++;
++		if (Status & AT91_TWI_ERROR) {
++			/* If Underrun OR NACK - Start again */
++			at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
++
++			/*  Program temporizing period (300us) */
++			udelay(300);
++		}
++		Status = at91_twi_read(AT91_TWI_SR);
++	};
++
++	if (Status & AT91_TWI_TXCOMP)
++		return ICS1523_ACCESS_OK;
++	else
++		return ICS1523_ACCESS_ERROR;
++}
++
++/* -----------------------------------------------------------------------------
++ * Initialization of the Clock Generator ICS1523
++ * ----------------------------------------------------------------------------- */
++
++int at91_ics1523_init(void)
++{
++	int		nb_trial;
++	int		ack = ICS1523_ACCESS_OK;
++	unsigned int	status = 0xffffffff;
++	struct clk	*twi_clk;
++
++	/* Map in TWI peripheral */
++	twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
++	if (!twi_base)
++		return -ENOMEM;
++
++	/* pins used for TWI interface */
++	at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
++	at91_set_multi_drive(AT91_PIN_PA25, 1);
++	at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
++	at91_set_multi_drive(AT91_PIN_PA26, 1);
++
++	/* Enable the TWI clock */
++	twi_clk = clk_get(NULL, "twi_clk");
++	if (IS_ERR(twi_clk))
++		return ICS1523_ACCESS_ERROR;
++	clk_enable(twi_clk);
++
++	/* Disable interrupts */
++	at91_twi_write(AT91_TWI_IDR, -1);
++
++	/* Reset peripheral */
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
++
++	/* Set Master mode */
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
++
++	/* Set TWI Clock Waveform Generator Register */
++	at91_ics1523_SetTwiClock(60000);     /* MCK in KHz = 60000 KHz */
++
++	/* ICS1523 Initialisation */
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
++
++	nb_trial = 0;
++	do {
++		nb_trial++;
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
++
++		/* Program 1ms temporizing period */
++		mdelay(1);
++
++		at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
++	} while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
++
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
++
++	/* Program 1ms temporizing period */
++	mdelay(1);
++
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
++
++	/* Program 1ms temporizing period */
++	mdelay(1);
++	
++	/* All done - cleanup */
++	iounmap(twi_base);
++	clk_disable(twi_clk);
++	clk_put(twi_clk);
++
++	return ack;
++}
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/Kconfig linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/Kconfig
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/Kconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -9,11 +9,14 @@
+ 	bool "AT91RM9200"
+ 
+ config ARCH_AT91SAM9260
+-	bool "AT91SAM9260"
++	bool "AT91SAM9260 or AT91SAM9XE"
+ 
+ config ARCH_AT91SAM9261
+ 	bool "AT91SAM9261"
+ 
++config ARCH_AT91SAM9263
++	bool "AT91SAM9263"
++
+ endchoice
+ 
+ # ----------------------------------------------------------
+@@ -90,13 +93,22 @@
+ 
+ if ARCH_AT91SAM9260
+ 
+-comment "AT91SAM9260 Board Type"
++comment "AT91SAM9260 Variants"
++
++config ARCH_AT91SAM9260_SAM9XE
++	bool "AT91SAM9XE"
++	depends on ARCH_AT91SAM9260
++	help
++	  Select this if you are using Atmel's AT91SAM9XE System-on-Chip.
++	  They are basicaly AT91SAM9260s with various sizes of embedded Flash.
++
++comment "AT91SAM9260 / AT91SAM9XE Board Type"
+ 
+ config MACH_AT91SAM9260EK
+-	bool "Atmel AT91SAM9260-EK Evaluation Kit"
++	bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
+ 	depends on ARCH_AT91SAM9260
+ 	help
+-	  Select this if you are using Atmel's AT91SAM9260-EK Evaluation Kit.
++	  Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
+ 	  <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
+ 
+ endif
+@@ -118,21 +130,50 @@
+ 
+ # ----------------------------------------------------------
+ 
++if ARCH_AT91SAM9263
++
++comment "AT91SAM9263 Board Type"
++
++config MACH_AT91SAM9263EK
++	bool "Atmel AT91SAM9263-EK Evaluation Kit"
++	depends on ARCH_AT91SAM9263
++	help
++	  Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
++	  <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
++
++endif
++
++# ----------------------------------------------------------
++
+ comment "AT91 Board Options"
+ 
+ config MTD_AT91_DATAFLASH_CARD
+ 	bool "Enable DataFlash Card support"
+-	depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK)
++	depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK)
+ 	help
+ 	  Enable support for the DataFlash card.
+ 
+ config MTD_NAND_AT91_BUSWIDTH_16
+ 	bool "Enable 16-bit data bus interface to NAND flash"
+-	depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK)
++	depends on (MACH_AT91SAM9261EK || MACH_AT91SAM9260EK || MACH_AT91SAM9263EK)
+ 	help
+ 	  On AT91SAM926x boards both types of NAND flash can be present
+ 	  (8 and 16 bit data bus width).
+ 
++config CSB300_WAKE_SW0
++	bool "CSB300 SW0 irq0 wakeup"
++	depends on MACH_CSB337 && PM
++	help
++	  If you have a CSB300 connected to your CSB337, this lets
++	  SW0 serve as a wakeup button.  It uses IRQ0.
++
++config CSB300_WAKE_SW1
++	bool "CSB300 SW1 gpio wakeup"
++	depends on MACH_CSB337 && PM
++	help
++	  If you have a CSB300 connected to your CSB337, this lets
++	  SW1 serve as a wakeup button.  It uses GPIO.
++
+ # ----------------------------------------------------------
+ 
+ comment "AT91 Feature Selections"
+@@ -143,6 +184,13 @@
+ 	  Select this if you need to program one or more of the PCK0..PCK3
+ 	  programmable clock outputs.
+ 
++config AT91_SLOW_CLOCK
++	bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)"
++	depends on PM && EXPERIMENTAL
++	help
++	  Select this if you wish to put the CPU into slow clock mode
++	  while in the "Suspend to RAM" state, to save more power.
++
+ endmenu
+ 
+ endif
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/leds.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/leds.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/leds.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/leds.c	2007-03-24 16:39:15.000000000 +0100
+@@ -86,10 +86,6 @@
+ 	if (!at91_leds_timer || !at91_leds_cpu)
+ 		return -ENODEV;
+ 
+-	/* Enable PIO to access the LEDs */
+-	at91_set_gpio_output(at91_leds_timer, 1);
+-	at91_set_gpio_output(at91_leds_cpu, 1);
+-
+ 	leds_event = at91_leds_event;
+ 
+ 	leds_event(led_start);
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/Makefile linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/Makefile
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/Makefile	2007-03-24 16:39:15.000000000 +0100
+@@ -8,11 +8,13 @@
+ obj-		:=
+ 
+ obj-$(CONFIG_PM)		+= pm.o
++obj-$(CONFIG_AT91_SLOW_CLOCK)	+= pm_slowclock.o
+ 
+ # CPU-specific support
+ obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
+ obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
+ obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
++obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
+ 
+ # AT91RM9200 board-specific support
+ obj-$(CONFIG_MACH_ONEARM)	+= board-1arm.o
+@@ -31,6 +33,9 @@
+ # AT91SAM9261 board-specific support
+ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
+ 
++# AT91SAM9263 board-specific support
++obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
++
+ # LEDs support
+ led-$(CONFIG_ARCH_AT91RM9200DK)	+= leds.o
+ led-$(CONFIG_MACH_AT91RM9200EK)	+= leds.o
+@@ -41,7 +46,7 @@
+ obj-$(CONFIG_LEDS) += $(led-y)
+ 
+ # VGA support
+-#obj-$(CONFIG_FB_S1D13XXX)	+= ics1523.o
++obj-$(CONFIG_FB_S1D13XXX)	+= ics1523.o
+ 
+ 
+ ifeq ($(CONFIG_PM_DEBUG),y)
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/pm.c linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/pm.c
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/pm.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/pm.c	2007-03-24 16:39:15.000000000 +0100
+@@ -63,6 +63,7 @@
+  * Verify that all the clocks are correct before entering
+  * slow-clock mode.
+  */
++#warning "SAM9260 only has 3 programmable clocks."
+ static int at91_pm_verify_clocks(void)
+ {
+ 	unsigned long scsr;
+@@ -80,6 +81,8 @@
+ #warning "Check SAM9260 USB clocks"
+ 	} else if (cpu_is_at91sam9261()) {
+ #warning "Check SAM9261 USB clocks"
++	} else if (cpu_is_at91sam9263()) {
++#warning "Check SAM9263 USB clocks"
+ 	}
+ 
+ #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
+@@ -205,16 +208,23 @@
+ 	.enter		= at91_pm_enter,
+ };
+ 
++#ifdef CONFIG_AT91_SLOW_CLOCK
++extern void at91rm9200_slow_clock(void);
++extern u32 at91rm9200_slow_clock_sz;
++#endif
++
+ static int __init at91_pm_init(void)
+ {
+-	printk("AT91: Power Management\n");
+-
+-#ifdef CONFIG_AT91_PM_SLOW_CLOCK
+-	/* REVISIT allocations of SRAM should be dynamically managed.
++#ifdef CONFIG_AT91_SLOW_CLOCK
++	/*
++	 * REVISIT allocations of SRAM should be dynamically managed.
+ 	 * FIQ handlers and other components will want SRAM/TCM too...
+ 	 */
+-	slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
++	slow_clock = (void *) (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE + (3 * SZ_4K));
+ 	memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
++	printk("AT91: Power Management (with slow clock mode)\n");
++#else
++	printk("AT91: Power Management\n");
+ #endif
+ 
+ 	/* Disable SDRAM low-power mode.  Cannot be used with self-refresh. */
+diff -urN linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/pm_slowclock.S linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/pm_slowclock.S
+--- linux-2.6.20.4-0rig/arch/arm/mach-at91rm9200/pm_slowclock.S	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mach-at91rm9200/pm_slowclock.S	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,172 @@
++/*
++ * arch/arm/mach-at91rm9200/pm_slow_clock.S
++ *
++ *  Copyright (C) 2006 Savin Zlobec
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/linkage.h>
++#include <asm/hardware.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91rm9200_mc.h>
++
++#define MCKRDY_TIMEOUT		1000
++#define MOSCRDY_TIMEOUT 	1000
++#define PLLALOCK_TIMEOUT	1000
++
++	.macro wait_mckrdy
++	mov	r2, #MCKRDY_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_MCKRDY
++	beq	1b
++2:
++	.endm
++
++	.macro wait_moscrdy
++	mov	r2, #MOSCRDY_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_MOSCS
++	beq	1b
++2:
++	.endm
++
++	.macro wait_pllalock
++	mov	r2, #PLLALOCK_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_LOCKA
++	beq	1b
++2:
++	.endm
++
++	.macro wait_plladis
++	mov	r2, #PLLALOCK_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_LOCKA
++	bne	1b
++2:
++	.endm
++
++	.text
++
++ENTRY(at91rm9200_slow_clock)
++
++	ldr	r1, .at91_va_base_sys
++
++	/* Put SDRAM in self refresh mode */
++
++	b	1f
++	.align	5
++1:	mcr	p15, 0, r0, c7, c10, 4
++	mov	r2, #1
++	str	r2, [r1, #AT91_SDRAMC_SRR]
++
++	/* Save Master clock setting */
++
++	ldr	r2, [r1, #AT91_PMC_MCKR]
++	str	r2, .saved_mckr
++
++	/*
++	 * Set the Master clock source to slow clock
++	 *
++	 * First set the CSS field, wait for MCKRDY
++	 * and than set the PRES and MDIV fields.
++	 *
++	 * See eratta #2[78] for details.
++	 */
++
++	bic	r2, r2, #3
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	wait_mckrdy
++
++	mov	r2, #0
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	/* Save PLLA setting and disable it */
++
++	ldr	r2, [r1, #AT91_CKGR_PLLAR]
++	str	r2, .saved_pllar
++
++	mov	r2, #0
++	str	r2, [r1, #AT91_CKGR_PLLAR]
++
++	wait_plladis
++
++	/* Turn off the main oscillator */
++
++	ldr	r2, [r1, #AT91_CKGR_MOR]
++	bic	r2, r2, #AT91_PMC_MOSCEN
++	str	r2, [r1, #AT91_CKGR_MOR]
++
++	/* Wait for interrupt */
++
++	mcr	p15, 0, r0, c7, c0, 4
++
++	/* Turn on the main oscillator */
++
++	ldr	r2, [r1, #AT91_CKGR_MOR]
++	orr	r2, r2, #AT91_PMC_MOSCEN
++	str	r2, [r1, #AT91_CKGR_MOR]
++
++	wait_moscrdy
++
++	/* Restore PLLA setting */
++
++	ldr	r2, .saved_pllar
++	str	r2, [r1, #AT91_CKGR_PLLAR]
++
++	wait_pllalock
++
++	/*
++	 * Restore master clock setting
++	 *
++	 * First set PRES if it was not 0,
++	 * than set CSS and MDIV fields.
++	 * After every change wait for
++	 * MCKRDY.
++	 *
++	 * See eratta #2[78] for details.
++	 */
++
++	ldr	r2, .saved_mckr
++	tst	r2, #0x1C
++	beq	2f
++	and	r2, r2, #0x1C
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	wait_mckrdy
++
++2:	ldr	r2, .saved_mckr
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	wait_mckrdy
++
++	mov	pc, lr
++
++.saved_mckr:
++	.word 0
++
++.saved_pllar:
++	.word 0
++
++.at91_va_base_sys:
++	.word AT91_VA_BASE_SYS
++
++ENTRY(at91rm9200_slow_clock_sz)
++	.word .-at91rm9200_slow_clock
+diff -urN linux-2.6.20.4-0rig/arch/arm/mm/Kconfig linux-2.6.20.4-atmel/arch/arm/mm/Kconfig
+--- linux-2.6.20.4-0rig/arch/arm/mm/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/arm/mm/Kconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -171,8 +171,8 @@
+ # ARM926T
+ config CPU_ARM926T
+ 	bool "Support ARM926T processor"
+-	depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261
+-	default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261
++	depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263
++	default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263
+ 	select CPU_32v5
+ 	select CPU_ABRT_EV5TJ
+ 	select CPU_CACHE_VIVT
+diff -urN linux-2.6.20.4-0rig/arch/avr32/boards/atstk1000/atstk1002.c linux-2.6.20.4-atmel/arch/avr32/boards/atstk1000/atstk1002.c
+--- linux-2.6.20.4-0rig/arch/avr32/boards/atstk1000/atstk1002.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/boards/atstk1000/atstk1002.c	2007-03-24 16:42:29.000000000 +0100
+@@ -14,11 +14,17 @@
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
++#include <linux/spi/spi.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
++#include <asm/arch/at32ap7000.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++
++#define	SW2_DEFAULT		/* MMCI and UART_A available */
+ 
+ struct eth_addr {
+ 	u8 addr[6];
+@@ -29,6 +35,20 @@
+ static struct eth_platform_data __initdata eth_data[2];
+ extern struct lcdc_platform_data atstk1000_fb0_data;
+ 
++static struct spi_board_info spi0_board_info[] __initdata = {
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++	},
++};
++
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_NONE,
++	.wp_pin		= GPIO_PIN_NONE,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -86,25 +106,58 @@
+ 
+ void __init setup_board(void)
+ {
+-	at32_map_usart(1, 0);	/* /dev/ttyS0 */
+-	at32_map_usart(2, 1);	/* /dev/ttyS1 */
+-	at32_map_usart(3, 2);	/* /dev/ttyS2 */
++#ifdef	SW2_DEFAULT
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#else
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
+ 
+ 	at32_setup_serial_console(0);
+ }
+ 
+ static int __init atstk1002_init(void)
+ {
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
+ 	at32_add_system_devices();
+ 
++#ifdef	SW2_DEFAULT
+ 	at32_add_device_usart(0);
++#else
+ 	at32_add_device_usart(1);
++#endif
+ 	at32_add_device_usart(2);
+ 
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ 
+-	at32_add_device_spi(0);
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_twi(0);
++	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_lcdc(0, &atstk1000_fb0_data);
++	at32_add_device_usba(0);
++	at32_add_device_abdac(0);
+ 
+ 	return 0;
+ }
+diff -urN linux-2.6.20.4-0rig/arch/avr32/boards/atstk1000/Makefile linux-2.6.20.4-atmel/arch/avr32/boards/atstk1000/Makefile
+--- linux-2.6.20.4-0rig/arch/avr32/boards/atstk1000/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/boards/atstk1000/Makefile	2007-03-24 16:42:28.000000000 +0100
+@@ -1,2 +1,2 @@
+-obj-y				+= setup.o spi.o flash.o
++obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
+diff -urN linux-2.6.20.4-0rig/arch/avr32/boards/atstk1000/spi.c linux-2.6.20.4-atmel/arch/avr32/boards/atstk1000/spi.c
+--- linux-2.6.20.4-0rig/arch/avr32/boards/atstk1000/spi.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/boards/atstk1000/spi.c	1970-01-01 01:00:00.000000000 +0100
+@@ -1,27 +0,0 @@
+-/*
+- * ATSTK1000 SPI devices
+- *
+- * Copyright (C) 2005 Atmel Norway
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/device.h>
+-#include <linux/spi/spi.h>
+-
+-static struct spi_board_info spi_board_info[] __initdata = {
+-	{
+-		.modalias	= "ltv350qv",
+-		.max_speed_hz	= 16000000,
+-		.bus_num	= 0,
+-		.chip_select	= 1,
+-	},
+-};
+-
+-static int board_init_spi(void)
+-{
+-	spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+-	return 0;
+-}
+-arch_initcall(board_init_spi);
+diff -urN linux-2.6.20.4-0rig/arch/avr32/drivers/dw-dmac.c linux-2.6.20.4-atmel/arch/avr32/drivers/dw-dmac.c
+--- linux-2.6.20.4-0rig/arch/avr32/drivers/dw-dmac.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/drivers/dw-dmac.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  SA_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/arch/avr32/drivers/dw-dmac.h linux-2.6.20.4-atmel/arch/avr32/drivers/dw-dmac.h
+--- linux-2.6.20.4-0rig/arch/avr32/drivers/dw-dmac.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/drivers/dw-dmac.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff -urN linux-2.6.20.4-0rig/arch/avr32/drivers/Makefile linux-2.6.20.4-atmel/arch/avr32/drivers/Makefile
+--- linux-2.6.20.4-0rig/arch/avr32/drivers/Makefile	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/drivers/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff -urN linux-2.6.20.4-0rig/arch/avr32/Kconfig linux-2.6.20.4-atmel/arch/avr32/Kconfig
+--- linux-2.6.20.4-0rig/arch/avr32/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -112,6 +112,8 @@
+ 	bool "U-Boot (or similar) bootloader"
+ endchoice
+ 
++source "arch/avr32/mach-at32ap/Kconfig"
++
+ config LOAD_ADDRESS
+ 	hex
+ 	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
+@@ -160,6 +162,10 @@
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+@@ -195,6 +201,8 @@
+ 
+ source "fs/Kconfig"
+ 
++source "arch/avr32/oprofile/Kconfig"
++
+ source "arch/avr32/Kconfig.debug"
+ 
+ source "security/Kconfig"
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/cpu.c linux-2.6.20.4-atmel/arch/avr32/kernel/cpu.c
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/cpu.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/cpu.c	2007-03-24 16:42:28.000000000 +0100
+@@ -9,6 +9,7 @@
+ #include <linux/sysdev.h>
+ #include <linux/seq_file.h>
+ #include <linux/cpu.h>
++#include <linux/module.h>
+ #include <linux/percpu.h>
+ #include <linux/param.h>
+ #include <linux/errno.h>
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/dma-controller.c linux-2.6.20.4-atmel/arch/avr32/kernel/dma-controller.c
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/dma-controller.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/dma-controller.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/irq.c linux-2.6.20.4-atmel/arch/avr32/kernel/irq.c
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/irq.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/irq.c	2007-03-24 16:42:28.000000000 +0100
+@@ -57,6 +57,7 @@
+ 		seq_printf(p, "%3d: ", i);
+ 		for_each_online_cpu(cpu)
+ 			seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
++		seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
+ 		seq_printf(p, "  %s", action->name);
+ 		for (action = action->next; action; action = action->next)
+ 			seq_printf(p, ", %s", action->name);
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/Makefile linux-2.6.20.4-atmel/arch/avr32/kernel/Makefile
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -9,6 +9,7 @@
+ obj-y				+= setup.o traps.o semaphore.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+ 
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/setup.c linux-2.6.20.4-atmel/arch/avr32/kernel/setup.c
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/setup.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/setup.c	2007-03-24 16:42:28.000000000 +0100
+@@ -16,6 +16,7 @@
+ #include <linux/module.h>
+ #include <linux/root_dev.h>
+ #include <linux/cpu.h>
++#include <linux/kernel.h>
+ 
+ #include <asm/sections.h>
+ #include <asm/processor.h>
+@@ -174,8 +175,7 @@
+ 	 * Copy the data so the bootmem init code doesn't need to care
+ 	 * about it.
+ 	 */
+-	if (mem_range_next_free >=
+-	    (sizeof(mem_range_cache) / sizeof(mem_range_cache[0])))
++	if (mem_range_next_free >= ARRAY_SIZE(mem_range_cache))
+ 		panic("Physical memory map too complex!\n");
+ 
+ 	new = &mem_range_cache[mem_range_next_free++];
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/syscall_table.S linux-2.6.20.4-atmel/arch/avr32/kernel/syscall_table.S
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/syscall_table.S	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/syscall_table.S	2007-03-24 16:42:28.000000000 +0100
+@@ -8,14 +8,6 @@
+  * published by the Free Software Foundation.
+  */
+ 
+-#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
+-#define sys_nfsservctl sys_ni_syscall
+-#endif
+-
+-#if !defined(CONFIG_SYSV_IPC)
+-# define sys_ipc	sys_ni_syscall
+-#endif
+-
+ 	.section .rodata,"a",@progbits
+ 	.type	sys_call_table,@object
+ 	.global	sys_call_table
+@@ -129,7 +121,7 @@
+ 	.long	sys_getitimer		/* 105 */
+ 	.long	sys_swapoff
+ 	.long	sys_sysinfo
+-	.long	sys_ipc
++	.long	sys_ni_syscall		/* was sys_ipc briefly */
+ 	.long	sys_sendfile
+ 	.long	sys_setdomainname	/* 110 */
+ 	.long	sys_newuname
+@@ -287,4 +279,16 @@
+ 	.long	sys_tee
+ 	.long	sys_vmsplice
+ 	.long	__sys_epoll_pwait	/* 265 */
++	.long	sys_msgget
++	.long	sys_msgsnd
++	.long	sys_msgrcv
++	.long	sys_msgctl
++	.long	sys_semget		/* 270 */
++	.long	sys_semop
++	.long	sys_semctl
++	.long	sys_semtimedop
++	.long	sys_shmat
++	.long	sys_shmget		/* 275 */
++	.long	sys_shmdt
++	.long	sys_shmctl
+ 	.long	sys_ni_syscall		/* r8 is saturated at nr_syscalls */
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/time.c linux-2.6.20.4-atmel/arch/avr32/kernel/time.c
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/time.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/time.c	2007-03-24 16:42:29.000000000 +0100
+@@ -21,6 +21,7 @@
+ #include <linux/profile.h>
+ #include <linux/sysdev.h>
+ 
++#include <asm/intc.h>
+ #include <asm/div64.h>
+ #include <asm/sysreg.h>
+ #include <asm/io.h>
+@@ -136,6 +137,10 @@
+ {
+ 	unsigned int count;
+ 
++	/* Check if interrupt is timer or performance counters */
++	if (!(intc_get_pending(irq) & 1))
++		return IRQ_NONE;
++
+ 	/* ack timer interrupt and try to set next interrupt */
+ 	count = avr32_hpt_read();
+ 	avr32_timer_ack();
+@@ -164,7 +169,7 @@
+ 
+ static struct irqaction timer_irqaction = {
+ 	.handler	= timer_interrupt,
+-	.flags		= IRQF_DISABLED,
++	.flags		= IRQF_DISABLED|IRQF_SHARED,
+ 	.name		= "timer",
+ };
+ 
+diff -urN linux-2.6.20.4-0rig/arch/avr32/kernel/traps.c linux-2.6.20.4-atmel/arch/avr32/kernel/traps.c
+--- linux-2.6.20.4-0rig/arch/avr32/kernel/traps.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/kernel/traps.c	2007-03-24 16:42:28.000000000 +0100
+@@ -49,39 +49,45 @@
+ 	return;
+ }
+ 
++static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
++{
++	return (p > (unsigned long)tinfo)
++		&& (p < (unsigned long)tinfo + THREAD_SIZE - 3);
++}
++
+ #ifdef CONFIG_FRAME_POINTER
+ static inline void __show_trace(struct task_struct *tsk, unsigned long *sp,
+ 				struct pt_regs *regs)
+ {
+-	unsigned long __user *fp;
+-	unsigned long __user *last_fp = NULL;
++	unsigned long lr, fp;
++	struct thread_info *tinfo;
+ 
+-	if (regs) {
+-		fp = (unsigned long __user *)regs->r7;
+-	} else if (tsk == current) {
+-		register unsigned long __user *real_fp __asm__("r7");
+-		fp = real_fp;
+-	} else {
+-		fp = (unsigned long __user *)tsk->thread.cpu_context.r7;
+-	}
++	tinfo = (struct thread_info *)
++		((unsigned long)sp & ~(THREAD_SIZE - 1));
++
++	if (regs)
++		fp = regs->r7;
++	else if (tsk == current)
++		asm("mov %0, r7" : "=r"(fp));
++	else
++		fp = tsk->thread.cpu_context.r7;
+ 
+ 	/*
+-	 * Walk the stack until (a) we get an exception, (b) the frame
+-	 * pointer becomes zero, or (c) the frame pointer gets stuck
+-	 * at the same value.
++	 * Walk the stack as long as the frame pointer (a) is within
++	 * the kernel stack of the task, and (b) it doesn't move
++	 * downwards.
+ 	 */
+-	while (fp && fp != last_fp) {
+-		unsigned long lr, new_fp = 0;
+-
+-		last_fp = fp;
+-		if (__get_user(lr, fp))
+-			break;
+-		if (fp && __get_user(new_fp, fp + 1))
+-			break;
+-		fp = (unsigned long __user *)new_fp;
++	while (valid_stack_ptr(tinfo, fp)) {
++		unsigned long new_fp;
+ 
++		lr = *(unsigned long *)fp;
+ 		printk(" [<%08lx>] ", lr);
+ 		print_symbol("%s\n", lr);
++
++		new_fp = *(unsigned long *)(fp + 4);
++		if (new_fp <= fp)
++			break;
++		fp = new_fp;
+ 	}
+ 	printk("\n");
+ }
+diff -urN linux-2.6.20.4-0rig/arch/avr32/lib/libgcc.h linux-2.6.20.4-atmel/arch/avr32/lib/libgcc.h
+--- linux-2.6.20.4-0rig/arch/avr32/lib/libgcc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/lib/libgcc.h	1970-01-01 01:00:00.000000000 +0100
+@@ -1,33 +0,0 @@
+-/* Definitions for various functions 'borrowed' from gcc-3.4.3 */
+-
+-#define BITS_PER_UNIT	8
+-
+-typedef		 int QItype	__attribute__ ((mode (QI)));
+-typedef unsigned int UQItype	__attribute__ ((mode (QI)));
+-typedef		 int HItype	__attribute__ ((mode (HI)));
+-typedef unsigned int UHItype	__attribute__ ((mode (HI)));
+-typedef 	 int SItype	__attribute__ ((mode (SI)));
+-typedef unsigned int USItype	__attribute__ ((mode (SI)));
+-typedef		 int DItype	__attribute__ ((mode (DI)));
+-typedef unsigned int UDItype	__attribute__ ((mode (DI)));
+-typedef 	float SFtype	__attribute__ ((mode (SF)));
+-typedef		float DFtype	__attribute__ ((mode (DF)));
+-typedef int word_type __attribute__ ((mode (__word__)));
+-
+-#define W_TYPE_SIZE (4 * BITS_PER_UNIT)
+-#define Wtype	SItype
+-#define UWtype	USItype
+-#define HWtype	SItype
+-#define UHWtype	USItype
+-#define DWtype	DItype
+-#define UDWtype	UDItype
+-#define __NW(a,b)	__ ## a ## si ## b
+-#define __NDW(a,b)	__ ## a ## di ## b
+-
+-struct DWstruct {Wtype high, low;};
+-
+-typedef union
+-{
+-  struct DWstruct s;
+-  DWtype ll;
+-} DWunion;
+diff -urN linux-2.6.20.4-0rig/arch/avr32/lib/longlong.h linux-2.6.20.4-atmel/arch/avr32/lib/longlong.h
+--- linux-2.6.20.4-0rig/arch/avr32/lib/longlong.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/lib/longlong.h	1970-01-01 01:00:00.000000000 +0100
+@@ -1,98 +0,0 @@
+-/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
+-   Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
+-   Free Software Foundation, Inc.
+-
+-   This definition file is free software; you can redistribute it
+-   and/or modify it under the terms of the GNU General Public
+-   License as published by the Free Software Foundation; either
+-   version 2, or (at your option) any later version.
+-
+-   This definition file is distributed in the hope that it will be
+-   useful, but WITHOUT ANY WARRANTY; without even the implied
+-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+-   See the GNU General Public License for more details.
+-
+-   You should have received a copy of the GNU General Public License
+-   along with this program; if not, write to the Free Software
+-   Foundation, Inc., 59 Temple Place - Suite 330,
+-   Boston, MA 02111-1307, USA.  */
+-
+-/* Borrowed from gcc-3.4.3 */
+-
+-#define __BITS4 (W_TYPE_SIZE / 4)
+-#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
+-#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
+-#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
+-
+-#define count_leading_zeros(count, x) ((count) = __builtin_clz(x))
+-
+-#define __udiv_qrnnd_c(q, r, n1, n0, d) \
+-  do {									\
+-    UWtype __d1, __d0, __q1, __q0;					\
+-    UWtype __r1, __r0, __m;						\
+-    __d1 = __ll_highpart (d);						\
+-    __d0 = __ll_lowpart (d);						\
+-									\
+-    __r1 = (n1) % __d1;							\
+-    __q1 = (n1) / __d1;							\
+-    __m = (UWtype) __q1 * __d0;						\
+-    __r1 = __r1 * __ll_B | __ll_highpart (n0);				\
+-    if (__r1 < __m)							\
+-      {									\
+-	__q1--, __r1 += (d);						\
+-	if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
+-	  if (__r1 < __m)						\
+-	    __q1--, __r1 += (d);					\
+-      }									\
+-    __r1 -= __m;							\
+-									\
+-    __r0 = __r1 % __d1;							\
+-    __q0 = __r1 / __d1;							\
+-    __m = (UWtype) __q0 * __d0;						\
+-    __r0 = __r0 * __ll_B | __ll_lowpart (n0);				\
+-    if (__r0 < __m)							\
+-      {									\
+-	__q0--, __r0 += (d);						\
+-	if (__r0 >= (d))						\
+-	  if (__r0 < __m)						\
+-	    __q0--, __r0 += (d);					\
+-      }									\
+-    __r0 -= __m;							\
+-									\
+-    (q) = (UWtype) __q1 * __ll_B | __q0;				\
+-    (r) = __r0;								\
+-  } while (0)
+-
+-#define udiv_qrnnd __udiv_qrnnd_c
+-
+-#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+-  do {									\
+-    UWtype __x;								\
+-    __x = (al) - (bl);							\
+-    (sh) = (ah) - (bh) - (__x > (al));					\
+-    (sl) = __x;								\
+-  } while (0)
+-
+-#define umul_ppmm(w1, w0, u, v)						\
+-  do {									\
+-    UWtype __x0, __x1, __x2, __x3;					\
+-    UHWtype __ul, __vl, __uh, __vh;					\
+-									\
+-    __ul = __ll_lowpart (u);						\
+-    __uh = __ll_highpart (u);						\
+-    __vl = __ll_lowpart (v);						\
+-    __vh = __ll_highpart (v);						\
+-									\
+-    __x0 = (UWtype) __ul * __vl;					\
+-    __x1 = (UWtype) __ul * __vh;					\
+-    __x2 = (UWtype) __uh * __vl;					\
+-    __x3 = (UWtype) __uh * __vh;					\
+-									\
+-    __x1 += __ll_highpart (__x0);/* this can't give carry */		\
+-    __x1 += __x2;		/* but this indeed can */		\
+-    if (__x1 < __x2)		/* did we get it? */			\
+-      __x3 += __ll_B;		/* yes, add it in the proper pos.  */	\
+-									\
+-    (w1) = __x3 + __ll_highpart (__x1);					\
+-    (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);		\
+-  } while (0)
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/at32ap7000.c linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/at32ap7000.c
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/at32ap7000.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/at32ap7000.c	2007-03-24 16:42:29.000000000 +0100
+@@ -8,6 +8,7 @@
+ #include <linux/clk.h>
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
++#include <linux/spi/spi.h>
+ 
+ #include <asm/io.h>
+ 
+@@ -310,8 +311,6 @@
+ {
+ 	u32 control;
+ 
+-	BUG_ON(clk->index > 7);
+-
+ 	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
+ 	if (enabled)
+ 		control |= SM_BIT(CEN);
+@@ -325,11 +324,6 @@
+ 	u32 control;
+ 	unsigned long div = 1;
+ 
+-	BUG_ON(clk->index > 7);
+-
+-	if (!clk->parent)
+-		return 0;
+-
+ 	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
+ 	if (control & SM_BIT(DIVEN))
+ 		div = 2 * (SM_BFEXT(DIV, control) + 1);
+@@ -342,11 +336,6 @@
+ 	u32 control;
+ 	unsigned long parent_rate, actual_rate, div;
+ 
+-	BUG_ON(clk->index > 7);
+-
+-	if (!clk->parent)
+-		return 0;
+-
+ 	parent_rate = clk->parent->get_rate(clk->parent);
+ 	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
+ 
+@@ -373,11 +362,8 @@
+ {
+ 	u32 control;
+ 
+-	BUG_ON(clk->index > 7);
+-
+ 	printk("clk %s: new parent %s (was %s)\n",
+-	       clk->name, parent->name,
+-	       clk->parent ? clk->parent->name : "(null)");
++	       clk->name, parent->name, clk->parent->name);
+ 
+ 	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
+ 
+@@ -399,6 +385,22 @@
+ 	return 0;
+ }
+ 
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
++	if (control & SM_BIT(OSCSEL))
++		parent = (control & SM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & SM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
+ /* --------------------------------------------------------------------
+  *  System peripherals
+  * -------------------------------------------------------------------- */
+@@ -464,6 +466,17 @@
+ 	.users		= 1,
+ };
+ 
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
+ /* --------------------------------------------------------------------
+  *  PIO
+  * -------------------------------------------------------------------- */
+@@ -496,19 +509,28 @@
+ DEFINE_DEV(pio, 3);
+ DEV_CLK(mck, pio3, pba, 13);
+ 
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
+ void __init at32_add_system_devices(void)
+ {
+-	system_manager.eim_first_irq = NR_INTERNAL_IRQS;
++	system_manager.eim_first_irq = EIM_IRQ_BASE;
+ 
+ 	platform_device_register(&at32_sm_device);
+ 	platform_device_register(&at32_intc0_device);
+ 	platform_device_register(&smc0_device);
+ 	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
+ 
+ 	platform_device_register(&pio0_device);
+ 	platform_device_register(&pio1_device);
+ 	platform_device_register(&pio2_device);
+ 	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
+ }
+ 
+ /* --------------------------------------------------------------------
+@@ -521,7 +543,7 @@
+ };
+ static struct resource atmel_usart0_resource[] = {
+ 	PBMEM(0xffe00c00),
+-	IRQ(7),
++	IRQ(6),
+ };
+ DEFINE_DEV_DATA(atmel_usart, 0);
+ DEV_CLK(usart, atmel_usart0, pba, 4);
+@@ -583,7 +605,7 @@
+ 	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+ }
+ 
+-static struct platform_device *at32_usarts[4];
++static struct platform_device *__initdata at32_usarts[4];
+ 
+ void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+ {
+@@ -728,32 +750,156 @@
+ /* --------------------------------------------------------------------
+  *  SPI
+  * -------------------------------------------------------------------- */
+-static struct resource spi0_resource[] = {
++static struct resource atmel_spi0_resource[] = {
+ 	PBMEM(0xffe00000),
+ 	IRQ(3),
+ };
+-DEFINE_DEV(spi, 0);
+-DEV_CLK(mck, spi0, pba, 0);
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
+ 
+-struct platform_device *__init at32_add_device_spi(unsigned int id)
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+ {
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+ 	struct platform_device *pdev;
+ 
+ 	switch (id) {
+ 	case 0:
+-		pdev = &spi0_device;
++		pdev = &atmel_spi0_device;
+ 		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+ 		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+ 		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		select_peripheral(PA(3),  PERIPH_A, 0);	/* NPCS0 */
+-		select_peripheral(PA(4),  PERIPH_A, 0);	/* NPCS1 */
+-		select_peripheral(PA(5),  PERIPH_A, 0);	/* NPCS2 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
+ 		break;
+ 
+ 	default:
+ 		return NULL;
+ 	}
+ 
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++
++static struct resource atmel_twi0_resource[] = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++DEFINE_DEV(atmel_twi, 0);
++DEV_CLK(pclk,atmel_twi0,pba,2);
++
++struct platform_device *__init
++at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_twi0_device;
++		select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++		select_peripheral(PA(7),  PERIPH_A, 0);	/* SCL	*/
++		break;
++
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct mci_platform_data atmel_mci0_data = {
++	.detect_pin	= GPIO_PIN_NONE,
++	.wp_pin		= GPIO_PIN_NONE,
++};
++static struct resource atmel_mci0_resource[] = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++DEFINE_DEV_DATA(atmel_mci, 0);
++DEV_CLK(mci_clk, atmel_mci0, pbb, 9);
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_mci0_device;
++		select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++		select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++		select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++		select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++		select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++		select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++		break;
++	default:
++		return NULL;
++	}
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++		memcpy(pdev->dev.platform_data, data,
++		       sizeof(struct mci_platform_data));
++	}
++
+ 	platform_device_register(pdev);
+ 	return pdev;
+ }
+@@ -837,6 +983,199 @@
+ 	return pdev;
+ }
+ 
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	},
++	PBMEM(0xfff03000),
++	IRQ(31),
++};
++DEFINE_DEV(usba, 0);
++DEV_CLK(pclk, usba0, pbb, 12);
++DEV_CLK(hclk, usba0, hsb, 6);
++
++struct platform_device *__init at32_add_device_usba(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &usba0_device;
++		/* USB pads are not multiplexed */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++DEFINE_DEV(atmel_ac97c, 0);
++DEV_CLK(pclk, atmel_ac97c0, pbb, 10);
++
++struct platform_device *__init
++at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_ac97c0_device;
++		select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++		select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++		select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++		select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  DAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++DEFINE_DEV(abdac, 0);
++DEV_CLK(pclk, abdac0, pbb, 8);
++static struct clk abdac0_sample_clk = {
++	.name           = "sample_clk",
++	.dev            = &abdac0_device.dev,
++	.mode           = genclk_mode,
++	.get_rate       = genclk_get_rate,
++	.set_rate       = genclk_set_rate,
++	.set_parent     = genclk_set_parent,
++	.index          = 6,
++};
++
++struct platform_device *__init
++at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &abdac0_device;
++		select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++		select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++		select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++		select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  ISI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_isi0_resource[] = {
++	PBMEM(0xfff02c00),
++	IRQ(30),
++};
++DEFINE_DEV(atmel_isi, 0);
++DEV_CLK(hclk, atmel_isi0, hsb, 5);
++DEV_CLK(pclk, atmel_isi0, pbb, 11);
++
++struct platform_device *__init
++at32_add_device_isi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_isi0_device;
++		select_peripheral(PB(0),  PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PB(1),  PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PB(2),  PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PB(3),  PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PB(4),  PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PB(5),  PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PB(6),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PB(7),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PB(11), PERIPH_B, 0);	/* DATA8  */
++		select_peripheral(PB(12), PERIPH_B, 0);	/* DATA9  */
++		select_peripheral(PB(13), PERIPH_B, 0);	/* DATA10 */
++		select_peripheral(PB(14), PERIPH_B, 0);	/* DATA11 */
++		select_peripheral(PB(8),  PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PB(9),  PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PB(10), PERIPH_A, 0);	/* PCLK	  */
++		break;
++
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
+ struct clk *at32_clock_list[] = {
+ 	&osc32k,
+ 	&osc0,
+@@ -855,11 +1194,13 @@
+ 	&smc0_mck,
+ 	&pdc_hclk,
+ 	&pdc_pclk,
++	&dmaca0_hclk,
+ 	&pico_clk,
+ 	&pio0_mck,
+ 	&pio1_mck,
+ 	&pio2_mck,
+ 	&pio3_mck,
++	&pio4_mck,
+ 	&atmel_usart0_usart,
+ 	&atmel_usart1_usart,
+ 	&atmel_usart2_usart,
+@@ -868,9 +1209,24 @@
+ 	&macb0_pclk,
+ 	&macb1_hclk,
+ 	&macb1_pclk,
+-	&spi0_mck,
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_mci_clk,
+ 	&lcdc0_hclk,
+ 	&lcdc0_pixclk,
++	&usba0_pclk,
++	&usba0_hclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++	&atmel_isi0_hclk,
++	&atmel_isi0_pclk,
+ };
+ unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+ 
+@@ -880,6 +1236,7 @@
+ 	at32_init_pio(&pio1_device);
+ 	at32_init_pio(&pio2_device);
+ 	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
+ }
+ 
+ void __init at32_clock_init(void)
+@@ -898,6 +1255,14 @@
+ 	if (sm_readl(sm, PM_PLL1) & SM_BIT(PLLOSC))
+ 		pll1.parent = &osc1;
+ 
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++	genclk_init_parent(&lcdc0_pixclk);
++	genclk_init_parent(&abdac0_sample_clk);
++
+ 	/*
+ 	 * Turn on all clocks that have at least one user already, and
+ 	 * turn off everything else. We only do this for module
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/clock.c linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/clock.c
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/clock.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/clock.c	2007-03-24 16:42:28.000000000 +0100
+@@ -63,7 +63,11 @@
+ 
+ static void __clk_disable(struct clk *clk)
+ {
+-	BUG_ON(clk->users == 0);
++	if (clk->users == 0) {
++		printk(KERN_ERR "%s: mismatched disable\n", clk->name);
++		WARN_ON(1);
++		return;
++	}
+ 
+ 	if (--clk->users == 0 && clk->mode)
+ 		clk->mode(clk, 0);
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/extint.c linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/extint.c
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/extint.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/extint.c	2007-03-24 16:42:28.000000000 +0100
+@@ -55,20 +55,11 @@
+ 	unsigned long flags;
+ 	int ret = 0;
+ 
++	flow_type &= IRQ_TYPE_SENSE_MASK;
+ 	if (flow_type == IRQ_TYPE_NONE)
+ 		flow_type = IRQ_TYPE_LEVEL_LOW;
+ 
+ 	desc = &irq_desc[irq];
+-	desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+-	desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
+-
+-	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
+-		desc->status |= IRQ_LEVEL;
+-		set_irq_handler(irq, handle_level_irq);
+-	} else {
+-		set_irq_handler(irq, handle_edge_irq);
+-	}
+-
+ 	spin_lock_irqsave(&sm->lock, flags);
+ 
+ 	mode = sm_readl(sm, EIM_MODE);
+@@ -97,9 +88,16 @@
+ 		break;
+ 	}
+ 
+-	sm_writel(sm, EIM_MODE, mode);
+-	sm_writel(sm, EIM_EDGE, edge);
+-	sm_writel(sm, EIM_LEVEL, level);
++	if (ret == 0) {
++		sm_writel(sm, EIM_MODE, mode);
++		sm_writel(sm, EIM_EDGE, edge);
++		sm_writel(sm, EIM_LEVEL, level);
++
++		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++			flow_type |= IRQ_LEVEL;
++		desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
++		desc->status |= flow_type;
++	}
+ 
+ 	spin_unlock_irqrestore(&sm->lock, flags);
+ 
+@@ -122,8 +120,6 @@
+ 	unsigned long status, pending;
+ 	unsigned int i, ext_irq;
+ 
+-	spin_lock(&sm->lock);
+-
+ 	status = sm_readl(sm, EIM_ISR);
+ 	pending = status & sm_readl(sm, EIM_IMR);
+ 
+@@ -133,10 +129,11 @@
+ 
+ 		ext_irq = i + sm->eim_first_irq;
+ 		ext_desc = irq_desc + ext_irq;
+-		ext_desc->handle_irq(ext_irq, ext_desc);
++		if (ext_desc->status & IRQ_LEVEL)
++			handle_level_irq(ext_irq, ext_desc);
++		else
++			handle_edge_irq(ext_irq, ext_desc);
+ 	}
+-
+-	spin_unlock(&sm->lock);
+ }
+ 
+ static int __init eim_init(void)
+@@ -168,8 +165,9 @@
+ 	sm->eim_chip = &eim_chip;
+ 
+ 	for (i = 0; i < nr_irqs; i++) {
++		/* NOTE the handler we set here is ignored by the demux */
+ 		set_irq_chip_and_handler(sm->eim_first_irq + i, &eim_chip,
+-					 handle_edge_irq);
++					 handle_level_irq);
+ 		set_irq_chip_data(sm->eim_first_irq + i, sm);
+ 	}
+ 
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/hsmc.c linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/hsmc.c
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/hsmc.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/hsmc.c	2007-03-24 16:42:29.000000000 +0100
+@@ -75,12 +75,35 @@
+ 		return -EINVAL;
+ 	}
+ 
++	switch (config->nwait_mode) {
++	case 0:
++		mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_DISABLED);
++		break;
++	case 1:
++		mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_RESERVED);
++		break;
++	case 2:
++		mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_FROZEN);
++		break;
++	case 3:
++		mode |= HSMC_BF(EXNW_MODE, HSMC_EXNW_MODE_READY);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (config->tdf_cycles) {
++		mode |= HSMC_BF(TDF_CYCLES, config->tdf_cycles);
++	}
++
+ 	if (config->nrd_controlled)
+ 		mode |= HSMC_BIT(READ_MODE);
+ 	if (config->nwe_controlled)
+ 		mode |= HSMC_BIT(WRITE_MODE);
+ 	if (config->byte_write)
+ 		mode |= HSMC_BIT(BAT);
++	if (config->tdf_mode)
++		mode |= HSMC_BIT(TDF_MODE);
+ 
+ 	pr_debug("smc cs%d: setup/%08x pulse/%08x cycle/%08x mode/%08x\n",
+ 		 cs, setup, pulse, cycle, mode);
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/Kconfig linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/Kconfig
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/Kconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,15 @@
++if PLATFORM_AT32AP
++
++menu "Atmel AVR32 AP options"
++
++config PIO_DEV
++	bool "PIO /dev interface"
++	select CONFIGFS_FS
++	default y
++	help
++	  Say `Y' to enable a /dev interface to the Parallel I/O
++	  Controller.
++
++endmenu
++
++endif
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/Makefile linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/Makefile
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/Makefile	2007-03-24 16:42:28.000000000 +0100
+@@ -1,2 +1,2 @@
+-obj-y				+= at32ap.o clock.o pio.o intc.o extint.o hsmc.o
++obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+ obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/pio.c linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/pio.c
+--- linux-2.6.20.4-0rig/arch/avr32/mach-at32ap/pio.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mach-at32ap/pio.c	2007-03-24 16:42:29.000000000 +0100
+@@ -12,7 +12,9 @@
+ #include <linux/debugfs.h>
+ #include <linux/fs.h>
+ #include <linux/platform_device.h>
++#include <linux/irq.h>
+ 
++#include <asm/gpio.h>
+ #include <asm/io.h>
+ 
+ #include <asm/arch/portmux.h>
+@@ -23,10 +25,11 @@
+ 
+ struct pio_device {
+ 	void __iomem *regs;
+-	const struct platform_device *pdev;
++	struct platform_device *pdev;
+ 	struct clk *clk;
+ 	u32 pinmux_mask;
+-	char name[32];
++	u32 gpio_mask;
++	char name[8];
+ };
+ 
+ static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
+@@ -76,6 +79,9 @@
+ 	if (!(flags & AT32_GPIOF_PULLUP))
+ 		pio_writel(pio, PUDR, mask);
+ 
++	/* gpio_request NOT allowed */
++	set_bit(pin_index, &pio->gpio_mask);
++
+ 	return;
+ 
+ fail:
+@@ -99,19 +105,52 @@
+ 		goto fail;
+ 	}
+ 
+-	pio_writel(pio, PUER, mask);
+-	if (flags & AT32_GPIOF_HIGH)
+-		pio_writel(pio, SODR, mask);
+-	else
+-		pio_writel(pio, CODR, mask);
+-	if (flags & AT32_GPIOF_OUTPUT)
++	if (flags & AT32_GPIOF_OUTPUT) {
++		if (flags & AT32_GPIOF_HIGH)
++			pio_writel(pio, SODR, mask);
++		else
++			pio_writel(pio, CODR, mask);
++		pio_writel(pio, PUDR, mask);
+ 		pio_writel(pio, OER, mask);
+-	else
++	} else {
++		if (flags & AT32_GPIOF_PULLUP)
++			pio_writel(pio, PUER, mask);
++		else
++			pio_writel(pio, PUDR, mask);
++		if (flags & AT32_GPIOF_DEGLITCH)
++			pio_writel(pio, IFER, mask);
++		else
++			pio_writel(pio, IFDR, mask);
+ 		pio_writel(pio, ODR, mask);
++	}
+ 
+ 	pio_writel(pio, PER, mask);
+-	if (!(flags & AT32_GPIOF_PULLUP))
+-		pio_writel(pio, PUDR, mask);
++
++	/* gpio_request now allowed */
++	clear_bit(pin_index, &pio->gpio_mask);
++
++	return;
++
++fail:
++	dump_stack();
++}
++
++/* Reserve a pin, preventing anyone else from changing its configuration. */
++void __init at32_reserve_pin(unsigned int pin)
++{
++	struct pio_device *pio;
++	unsigned int pin_index = pin & 0x1f;
++
++	pio = gpio_to_pio(pin);
++	if (unlikely(!pio)) {
++		printk("pio: invalid pin %u\n", pin);
++		goto fail;
++	}
++
++	if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
++		printk("%s: pin %u is busy\n", pio->name, pin_index);
++		goto fail;
++	}
+ 
+ 	return;
+ 
+@@ -119,20 +158,793 @@
+ 	dump_stack();
+ }
+ 
++/*--------------------------------------------------------------------------*/
++
++static unsigned int pio_id(struct pio_device *pio)
++{
++	return pio - pio_dev;
++}
++
++static void __disable_gpio(struct pio_device *pio, u32 mask)
++{
++	pio_writel(pio, PUER, mask);
++	pio_writel(pio, ODR, mask);
++}
++
++static void pio_dealloc_mask(struct pio_device *pio, u32 mask)
++{
++	u32 old, new;
++
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~mask;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++/* GPIO API */
++
++int gpio_request(unsigned int gpio, const char *label)
++{
++	struct pio_device *pio;
++	unsigned int pin;
++
++	pio = gpio_to_pio(gpio);
++	if (!pio)
++		return -ENODEV;
++
++	pin = gpio & 0x1f;
++	if (test_and_set_bit(pin, &pio->gpio_mask))
++		return -EBUSY;
++
++	return 0;
++}
++EXPORT_SYMBOL(gpio_request);
++
++void gpio_free(unsigned int gpio)
++{
++	struct pio_device *pio;
++	unsigned int pin;
++
++	pio = gpio_to_pio(gpio);
++	if (!pio) {
++		printk(KERN_ERR
++		       "gpio: attempted to free invalid pin %u\n", gpio);
++		return;
++	}
++
++	pin = gpio & 0x1f;
++	if (!test_and_clear_bit(pin, &pio->gpio_mask))
++		printk(KERN_ERR "gpio: freeing free or non-gpio pin %s-%u\n",
++		       pio->name, pin);
++}
++EXPORT_SYMBOL(gpio_free);
++
++int gpio_direction_input(unsigned int gpio)
++{
++	struct pio_device *pio;
++	unsigned int pin;
++
++	pio = gpio_to_pio(gpio);
++	if (!pio)
++		return -ENODEV;
++
++	pin = gpio & 0x1f;
++	pio_writel(pio, ODR, 1 << pin);
++
++	return 0;
++}
++EXPORT_SYMBOL(gpio_direction_input);
++
++int gpio_direction_output(unsigned int gpio)
++{
++	struct pio_device *pio;
++	unsigned int pin;
++
++	pio = gpio_to_pio(gpio);
++	if (!pio)
++		return -ENODEV;
++
++	pin = gpio & 0x1f;
++	pio_writel(pio, OER, 1 << pin);
++
++	return 0;
++}
++EXPORT_SYMBOL(gpio_direction_output);
++
++int gpio_get_value(unsigned int gpio)
++{
++	struct pio_device *pio = &pio_dev[gpio >> 5];
++
++	return (pio_readl(pio, PDSR) >> (gpio & 0x1f)) & 1;
++}
++EXPORT_SYMBOL(gpio_get_value);
++
++void gpio_set_value(unsigned int gpio, int value)
++{
++	struct pio_device *pio = &pio_dev[gpio >> 5];
++	u32 mask;
++
++	mask = 1 << (gpio & 0x1f);
++	if (value)
++		pio_writel(pio, SODR, mask);
++	else
++		pio_writel(pio, CODR, mask);
++}
++EXPORT_SYMBOL(gpio_set_value);
++
++/*--------------------------------------------------------------------------*/
++
++/* GPIO IRQ support */
++
++static void gpio_irq_mask(unsigned irq)
++{
++	unsigned		gpio = irq_to_gpio(irq);
++	struct pio_device	*pio = &pio_dev[gpio >> 5];
++
++	pio_writel(pio, IDR, 1 << (gpio & 0x1f));
++}
++
++static void gpio_irq_unmask(unsigned irq)
++{
++	unsigned		gpio = irq_to_gpio(irq);
++	struct pio_device	*pio = &pio_dev[gpio >> 5];
++
++	pio_writel(pio, IER, 1 << (gpio & 0x1f));
++}
++
++static int gpio_irq_type(unsigned irq, unsigned type)
++{
++	if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
++		return -EINVAL;
++
++	return 0;
++}
++
++static struct irq_chip gpio_irqchip = {
++	.name		= "gpio",
++	.mask		= gpio_irq_mask,
++	.unmask		= gpio_irq_unmask,
++	.set_type	= gpio_irq_type,
++};
++
++static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
++{
++	struct pio_device	*pio = get_irq_chip_data(irq);
++	unsigned		gpio_irq;
++
++	gpio_irq = (unsigned) get_irq_data(irq);
++	for (;;) {
++		u32		isr;
++		struct irq_desc	*d;
++
++		/* ack pending GPIO interrupts */
++		isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
++		if (!isr)
++			break;
++		do {
++			int i;
++
++			i = ffs(isr) - 1;
++			isr &= ~(1 << i);
++
++			i += gpio_irq;
++			d = &irq_desc[i];
++
++			d->handle_irq(i, d);
++		} while (isr);
++	}
++}
++
++static void __init
++gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
++{
++	unsigned	i;
++
++	set_irq_chip_data(irq, pio);
++	set_irq_data(irq, (void *) gpio_irq);
++
++	for (i = 0; i < 32; i++, gpio_irq++) {
++		set_irq_chip_data(gpio_irq, pio);
++		set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
++				handle_simple_irq);
++	}
++
++	set_irq_chained_handler(irq, gpio_irq_handler);
++}
++
++/*--------------------------------------------------------------------------*/
++
++#ifdef CONFIG_PIO_DEV
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	struct pio_device *pio;
++
++	int enabled;
++	int pio_id;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = pio_readl(gpio->pio, PDSR);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = pio_readl(gpio->pio, PDSR) & gpio->pin_mask;
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * pio_id(gpio->pio) + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * pio_id(gpio->pio) + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * pio_id(gpio->pio) + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = pio_readl(gpio->pio, PDSR) & gpio->pin_mask;
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	pio_writel(gpio->pio, CODR, ~value & mask);
++	pio_writel(gpio->pio, SODR, value & mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->pio_id);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if ((id < MAX_NR_PIO_DEVICES) && pio_dev[id].regs) {
++			gpio->pio_id = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	struct pio_device *pio;
++	u32 old, new;
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* Already enabled; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		__disable_gpio(gpio->pio, gpio->pin_mask);
++		pio_dealloc_mask(gpio->pio, gpio->pin_mask);
++		gpio->pio = NULL;
++	} else {
++		if (gpio->pio_id < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = -EBUSY;
++	pio = gpio->pio = &pio_dev[gpio->pio_id];
++	do {
++		old = pio->pinmux_mask;
++		if (old & gpio->pin_mask)
++			goto err_alloc_pins;
++
++		new = old | gpio->pin_mask;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	pio_writel(pio, OER, gpio->oe_mask);
++	pio_writel(pio, PER, gpio->pin_mask);
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     &gpio->pio->pdev->dev,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (pio%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, pio_id(gpio->pio), gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	__disable_gpio(pio, gpio->pin_mask);
++	pio_dealloc_mask(pio, gpio->pin_mask);
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++	gpio->pio = NULL;
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++	struct pio_device *pio;
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	pio = gpio->pio;
++	if (pio) {
++		__disable_gpio(pio, gpio->pin_mask);
++		pio_dealloc_mask(pio, gpio->pin_mask);
++		gpio->pio = NULL;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init pio_init_dev(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	init_MUTEX(&gpio_subsys.su_sem);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(pio_init_dev);
++#endif /* CONFIG_PIO_DEV */
++
+ static int __init pio_probe(struct platform_device *pdev)
+ {
+ 	struct pio_device *pio = NULL;
++	int irq = platform_get_irq(pdev, 0);
++	int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
+ 
+ 	BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
+ 	pio = &pio_dev[pdev->id];
+ 	BUG_ON(!pio->regs);
+ 
+-	/* TODO: Interrupts */
++	gpio_irq_setup(pio, irq, gpio_irq_base);
+ 
+ 	platform_set_drvdata(pdev, pio);
+ 
+-	printk(KERN_INFO "%s: Atmel Port Multiplexer at 0x%p (irq %d)\n",
+-	       pio->name, pio->regs, platform_get_irq(pdev, 0));
++	printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
++	       pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
+ 
+ 	return 0;
+ }
+@@ -148,7 +960,7 @@
+ {
+ 	return platform_driver_register(&pio_driver);
+ }
+-subsys_initcall(pio_init);
++postcore_initcall(pio_init);
+ 
+ void __init at32_init_pio(struct platform_device *pdev)
+ {
+@@ -184,6 +996,13 @@
+ 	pio->pdev = pdev;
+ 	pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
+ 
+-	pio_writel(pio, ODR, ~0UL);
+-	pio_writel(pio, PER, ~0UL);
++	/*
++	 * request_gpio() is only valid for pins that have been
++	 * explicitly configured as GPIO and not previously requested
++	 */
++	pio->gpio_mask = ~0UL;
++
++	/* start with irqs disabled and acked */
++	pio_writel(pio, IDR, ~0UL);
++	(void) pio_readl(pio, ISR);
+ }
+diff -urN linux-2.6.20.4-0rig/arch/avr32/Makefile linux-2.6.20.4-atmel/arch/avr32/Makefile
+--- linux-2.6.20.4-0rig/arch/avr32/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -30,6 +30,8 @@
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-$(CONFIG_OPROFILE)		+= arch/avr32/oprofile/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mm/cache.c linux-2.6.20.4-atmel/arch/avr32/mm/cache.c
+--- linux-2.6.20.4-0rig/arch/avr32/mm/cache.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mm/cache.c	2007-03-24 16:42:28.000000000 +0100
+@@ -22,18 +22,34 @@
+ 
+ void invalidate_dcache_region(void *start, size_t size)
+ {
+-	unsigned long v, begin, end, linesz;
++	unsigned long v, begin, end, linesz, mask;
++	int flush = 0;
+ 
+ 	linesz = boot_cpu_data.dcache.linesz;
++	mask = linesz - 1;
+ 
+-	//printk("invalidate dcache: %p + %u\n", start, size);
+-
+-	/* You asked for it, you got it */
+-	begin = (unsigned long)start & ~(linesz - 1);
+-	end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
++	/* when first and/or last cachelines are shared, flush them
++	 * instead of invalidating ... never discard valid data!
++	 */
++	begin = (unsigned long)start;
++	end = begin + size - 1;
++
++	if (begin & mask) {
++		flush_dcache_line(start);
++		begin += linesz;
++		flush = 1;
++	}
++	if ((end & mask) != mask) {
++		flush_dcache_line((void *)end);
++		end -= linesz;
++		flush = 1;
++	}
+ 
+-	for (v = begin; v < end; v += linesz)
++	/* remaining cachelines only need invalidation */
++	for (v = begin; v <= end; v += linesz)
+ 		invalidate_dcache_line((void *)v);
++	if (flush)
++		flush_write_buffer();
+ }
+ 
+ void clean_dcache_region(void *start, size_t size)
+diff -urN linux-2.6.20.4-0rig/arch/avr32/mm/dma-coherent.c linux-2.6.20.4-atmel/arch/avr32/mm/dma-coherent.c
+--- linux-2.6.20.4-0rig/arch/avr32/mm/dma-coherent.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/mm/dma-coherent.c	2007-03-24 16:42:29.000000000 +0100
+@@ -41,6 +41,13 @@
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/common.c linux-2.6.20.4-atmel/arch/avr32/oprofile/common.c
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/common.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/common.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,169 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++
++#define DEBUG
++#include <linux/init.h>
++#include <linux/oprofile.h>
++#include <linux/errno.h>
++#include <asm/semaphore.h>
++#include <linux/sysdev.h>
++
++#include "op_avr32_model.h"
++#include "op_counter.h"
++
++static struct op_avr32_model_spec *pc_model;
++static int pc_enabled = 0;
++static struct semaphore pc_sem;
++
++
++static int pc_start(void);
++static int pc_setup(void);
++static void pc_stop(void);
++static int pc_create_files(struct super_block *, struct dentry *);
++
++
++struct op_counter_config counter_config[OP_MAX_COUNTER];
++
++static int pc_suspend(struct sys_device *dev, u32 state)
++{
++	if (pc_enabled)
++		pc_stop();
++	return 0;
++}
++
++static int pc_resume(struct sys_device *dev)
++{
++	if (pc_enabled)
++		pc_start();
++	return 0;
++}
++
++static struct sysdev_class oprofile_sysclass = {
++	set_kset_name("oprofile"),
++	.resume		= pc_resume,
++	.suspend	= pc_suspend,
++};
++
++static struct sys_device device_oprofile = {
++	.id		= 0,
++	.cls		= &oprofile_sysclass,
++};
++
++static int __init init_driverfs(void)
++{
++	int ret;
++
++	if (!(ret = sysdev_class_register(&oprofile_sysclass)))
++		ret = sysdev_register(&device_oprofile);
++
++	return ret;
++}
++
++static void  exit_driverfs(void)
++{
++	sysdev_unregister(&device_oprofile);
++	sysdev_class_unregister(&oprofile_sysclass);
++}
++
++static int pc_create_files(struct super_block *sb, struct dentry *root)
++{
++	unsigned int i;
++
++	pr_debug("AVR32 Peformance Counters: create files\n");
++	for (i = 0; i < pc_model->num_counters; i++) {
++		struct dentry *dir;
++		char buf[2];
++
++		snprintf(buf, sizeof buf, "%d", i);
++		dir = oprofilefs_mkdir(sb, root, buf);
++		oprofilefs_create_ulong(sb, dir, "enabled",
++					&counter_config[i].enabled);
++		oprofilefs_create_ulong(sb, dir, "event",
++					&counter_config[i].event);
++		oprofilefs_create_ulong(sb, dir, "count",
++					&counter_config[i].count);
++		oprofilefs_create_ulong(sb, dir, "unit_mask",
++					&counter_config[i].unit_mask);
++		oprofilefs_create_ulong(sb, dir, "kernel",
++					&counter_config[i].kernel);
++		oprofilefs_create_ulong(sb, dir, "user",
++					&counter_config[i].user);
++	}
++
++	return 0;
++}
++
++static int pc_setup(void)
++{
++	int ret;
++
++	spin_lock(&oprofilefs_lock);
++	pr_debug("AVR32 Peformance Counters: setup\n");
++	ret = pc_model->setup_ctrs();
++	spin_unlock(&oprofilefs_lock);
++	return ret;
++}
++
++static int pc_start(void)
++{
++	int ret = -EBUSY;
++
++	down(&pc_sem);
++	if (!pc_enabled) {
++		pr_debug("AVR32 Peformance Counters: start\n");
++		ret = pc_model->start();
++		pc_enabled = !ret;
++	}
++	up(&pc_sem);
++	return ret;
++}
++
++static void pc_stop(void)
++{
++	down(&pc_sem);
++	pr_debug("AVR32 Peformance Counters: stop\n");
++	if (pc_enabled)
++		pc_model->stop();
++	pc_enabled = 0;
++	up(&pc_sem);
++}
++
++int __init pc_init(struct oprofile_operations *ops,
++		   struct op_avr32_model_spec *spec)
++{
++	init_MUTEX(&pc_sem);
++
++	if ( spec->init )
++		if (spec->init() < 0)
++			return -ENODEV;
++
++	pc_model = spec;
++	init_driverfs();
++	ops->create_files = pc_create_files;
++	ops->setup = pc_setup;
++	ops->shutdown = pc_stop;
++	ops->start = pc_start;
++	ops->stop = pc_stop;
++	ops->cpu_type = pc_model->name;
++	printk(KERN_INFO "oprofile: using %s Performance Counters\n",
++	       spec->name);
++	pr_debug("AVR32 Peformance Counters: pc_init\n");
++
++	return 0;
++}
++
++void pc_exit(void)
++{
++	if (pc_model) {
++		pr_debug("AVR32 Peformance Counters: exit\n");
++		exit_driverfs();
++		pc_model = NULL;
++	}
++}
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/init.c linux-2.6.20.4-atmel/arch/avr32/oprofile/init.c
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/init.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/init.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,29 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++
++#include <linux/oprofile.h>
++#include <linux/init.h>
++#include <linux/errno.h>
++#include "op_avr32_model.h"
++#include "op_model_avr32.h"
++
++int __init oprofile_arch_init(struct oprofile_operations *ops)
++{
++	int ret = -ENODEV;
++
++	ret = pc_init(ops, &op_avr32_spec);
++
++	return ret;
++}
++
++void oprofile_arch_exit(void)
++{
++	pc_exit();
++}
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/Kconfig linux-2.6.20.4-atmel/arch/avr32/oprofile/Kconfig
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/Kconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,23 @@
++
++menu "Profiling support"
++	depends on EXPERIMENTAL
++
++config PROFILING
++	bool "Profiling support (EXPERIMENTAL)"
++	help
++	  Say Y here to enable the extended profiling support mechanisms used
++	  by profilers such as OProfile.
++
++
++config OPROFILE
++	tristate "OProfile system profiling (EXPERIMENTAL)"
++	depends on PROFILING
++	help
++	  OProfile is a profiling system capable of profiling the
++	  whole system, including the kernel, kernel modules, libraries,
++	  and applications.
++
++	  If unsure, say N.
++
++endmenu
++
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/Makefile linux-2.6.20.4-atmel/arch/avr32/oprofile/Makefile
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/Makefile	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,10 @@
++obj-$(CONFIG_OPROFILE) += oprofile.o
++
++DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
++		oprof.o cpu_buffer.o buffer_sync.o \
++		event_buffer.o oprofile_files.o \
++		oprofilefs.o oprofile_stats.o \
++		timer_int.o )
++
++oprofile-y				:= $(DRIVER_OBJS) init.o common.o
++oprofile-y				+= op_model_avr32.o
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/op_avr32_model.h linux-2.6.20.4-atmel/arch/avr32/oprofile/op_avr32_model.h
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/op_avr32_model.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/op_avr32_model.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,25 @@
++/*
++ * interface to AVR32 machine specific operations
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++
++#ifndef OP_AVR32_MODEL_H
++#define OP_AVR32_MODEL_H
++
++struct op_avr32_model_spec {
++	int (*init)(void);
++	unsigned int num_counters;
++	int (*setup_ctrs)(void);
++	int (*start)(void);
++	void (*stop)(void);
++	char *name;
++};
++
++#endif /* OP_AVR32_MODEL_H */
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/op_counter.h linux-2.6.20.4-atmel/arch/avr32/oprofile/op_counter.h
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/op_counter.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/op_counter.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,29 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++#ifndef OP_COUNTER_H
++#define OP_COUNTER_H
++
++#define OP_MAX_COUNTER 3
++
++/* Per performance monitor configuration as set via
++ * oprofilefs.
++ */
++struct op_counter_config {
++	unsigned long count;
++	unsigned long enabled;
++	unsigned long event;
++	unsigned long unit_mask;
++	unsigned long kernel;
++	unsigned long user;
++};
++
++extern struct op_counter_config counter_config[];
++
++#endif /* OP_COUNTER_H */
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/op_model_avr32.c linux-2.6.20.4-atmel/arch/avr32/oprofile/op_model_avr32.c
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/op_model_avr32.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/op_model_avr32.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,222 @@
++/*
++ * AVR32 Performance Counter Driver
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Authors: Sondre Garsjoe, Ronny Pedersen
++ */
++
++#define DEBUG
++
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/sched.h>
++#include <linux/oprofile.h>
++#include <linux/interrupt.h>
++#include <asm/intc.h>
++#include <asm/irq.h>
++#include <asm/system.h>
++#include <asm/sysreg.h>
++
++#include "op_counter.h"
++#include "op_avr32_model.h"
++
++
++#define	PC_ENABLE	0x001	/* Enable counters */
++#define PCNT_RESET	0x002	/* Reset event counters */
++#define	CCNT_RESET	0x004	/* Reset clock counter */
++#define	PC_RESET	(CCNT_RESET | PCNT_RESET)
++#define PC_CNT64	0x008	/* Make CCNT count every 64th cycle */
++
++
++#define EVT_UNUSED			0xFF
++
++struct pc_counter {
++	volatile unsigned long ovf;
++	unsigned long reset_counter;
++};
++
++enum { PCCNT, PCNT0, PCNT1, MAX_COUNTERS };
++
++#define PCCNT_IE  (1 << 4)
++#define PCNT0_IE  (1 << 5)
++#define PCNT1_IE  (1 << 6)
++
++#define PCCNT_F  (1 << 8)
++#define PCNT0_F  (1 << 9)
++#define PCNT1_F  (1 << 10)
++
++#define AVR32_PC_IRQ 0
++
++static const u32 int_mask[MAX_COUNTERS] = { PCCNT_IE, PCNT0_IE, PCNT1_IE };
++static const u32 ovf_mask[MAX_COUNTERS] = { PCCNT_F, PCNT0_F, PCNT1_F };
++
++static struct pc_counter results[MAX_COUNTERS];
++
++static void write_pccr(u32 val)
++{
++	sysreg_write(PCCR, val);
++}
++
++static u32 read_pccr(void)
++{
++	return sysreg_read(PCCR);
++}
++
++static u32 read_counter(int counter)
++{
++	switch (counter) {
++	case PCCNT:
++		return sysreg_read(PCCNT);
++	case PCNT0:
++		return sysreg_read(PCNT0);
++	case PCNT1:
++		return sysreg_read(PCNT1);
++	default:
++		return 0;
++	}
++}
++
++static void write_counter(int counter, u32 val)
++{
++	switch (counter) {
++	case PCCNT:
++		sysreg_write(PCCNT, val);
++	case PCNT0:
++		sysreg_write(PCNT0, val);
++	case PCNT1:
++		sysreg_write(PCNT1, val);
++	default:
++		break;
++	}
++}
++
++static int avr32_setup_ctrs(void)
++{
++	u32  pccr;
++	int i;
++
++	for (i = PCCNT; i < MAX_COUNTERS; i++) {
++		if (counter_config[i].enabled)
++			continue;
++
++		counter_config[i].event = EVT_UNUSED;
++	}
++
++	pccr = ((counter_config[PCNT1].event << 18)
++		| (counter_config[PCNT0].event << 12));
++	pr_debug("avr32_setup_ctrs: pccr: %#08x\n", pccr);
++	write_pccr(pccr);
++
++	for (i = PCCNT; i < MAX_COUNTERS; i++) {
++		if (counter_config[i].event == EVT_UNUSED) {
++			counter_config[i].event = 0;
++			continue;
++		}
++
++		results[i].reset_counter = counter_config[i].count;
++		write_counter(i, -(u32)counter_config[i].count);
++		pr_debug("avr32_setup_ctrs: counter%d %#08x from %#08lx\n",
++			 i, read_counter(i), counter_config[i].count);
++	}
++
++	return 0;
++}
++
++static void inline check_ctrs(void)
++{
++	int i;
++	u32 pccr = read_pccr();
++
++	/* Writeback clears overflow flag */
++	write_pccr(pccr & ~PC_ENABLE);
++
++	for (i = PCCNT; i < MAX_COUNTERS; i++) {
++		if (!(int_mask[i] & pccr))
++			continue;
++
++		if (pccr & ovf_mask[i])
++			results[i].ovf++;
++	}
++}
++
++static irqreturn_t avr32_pc_interrupt(int irq, void *arg,
++				      struct pt_regs *regs)
++{
++	int i;
++
++	/* Check if this is a performance counter interrupt */
++	if (!(intc_get_pending(irq) & 2))
++		return IRQ_NONE;
++
++	check_ctrs();
++
++	for (i = PCCNT; i < MAX_COUNTERS; i++) {
++		if (!results[i].ovf)
++			continue;
++
++		write_counter(i, -(u32)results[i].reset_counter);
++		oprofile_add_sample(regs, i);
++		results[i].ovf--;
++	}
++
++	/* Enable Performance Counter */
++	write_pccr(read_pccr() | PC_ENABLE);
++
++	return IRQ_HANDLED;
++}
++
++static void avr32_pc_stop(void)
++{
++	write_pccr(read_pccr() & ~PC_ENABLE);
++
++	free_irq(AVR32_PC_IRQ, results);
++}
++
++static int avr32_pc_start(void)
++{
++	int i, ret;
++	u32 pccr = read_pccr();
++
++	ret = request_irq(AVR32_PC_IRQ, avr32_pc_interrupt, IRQF_SHARED | IRQF_DISABLED,
++			  "AVR32 Performance Counter", (void *)results);
++
++	if (ret < 0) {
++		printk(KERN_ERR
++		       "oprofile: unable to request IRQ%d for AVR32"
++		       " Performance Counter\n",
++		       AVR32_PC_IRQ);
++		return ret;
++	}
++
++	/* Enable interrupts */
++	for (i = PCCNT; i < MAX_COUNTERS; i++) {
++		if (counter_config[i].enabled)
++			pccr |= int_mask[i];
++	}
++
++	/* Disable scaler */
++	pccr &= ~PC_CNT64;
++
++	/* Enable Performance Counter */
++	pccr |= PC_ENABLE;
++
++	write_pccr(pccr);
++	pr_debug("avr32_pc_start: pc: %#08x\n", pccr);
++	return 0;
++}
++
++
++struct op_avr32_model_spec op_avr32_spec = {
++	.init		= 0,
++	.setup_ctrs	= avr32_setup_ctrs,
++	.start		= avr32_pc_start,
++	.stop		= avr32_pc_stop,
++	.num_counters	= MAX_COUNTERS,
++	.name		= "avr32/at32ap7000",
++};
++
+diff -urN linux-2.6.20.4-0rig/arch/avr32/oprofile/op_model_avr32.h linux-2.6.20.4-atmel/arch/avr32/oprofile/op_model_avr32.h
+--- linux-2.6.20.4-0rig/arch/avr32/oprofile/op_model_avr32.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/arch/avr32/oprofile/op_model_avr32.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,21 @@
++/**
++ * AVR32 Machine Specific Operations
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++#ifndef OP_MODEL_AVR32_H
++#define OP_MODEL_AVR32_H
++
++extern struct op_avr32_model_spec op_avr32_spec;
++extern int pc_init(struct oprofile_operations *ops,
++		   struct op_avr32_model_spec *spec);
++extern void pc_exit(void);
++
++
++#endif
+diff -urN linux-2.6.20.4-0rig/drivers/char/at91_spi.c linux-2.6.20.4-atmel/drivers/char/at91_spi.c
+--- linux-2.6.20.4-0rig/drivers/char/at91_spi.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/char/at91_spi.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,336 @@
++/*
++ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder)
++ *
++ *  Copyright (C) SAN People (Pty) Ltd
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/dma-mapping.h>
++#include <linux/module.h>
++#include <linux/sched.h>
++#include <linux/completion.h>
++#include <linux/interrupt.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/atmel_pdc.h>
++#include <asm/io.h>
++#include <asm/semaphore.h>
++
++#include <asm/arch/at91_spi.h>
++#include <asm/arch/board.h>
++#include <asm/arch/spi.h>
++
++#undef DEBUG_SPI
++
++static struct spi_local spi_dev[NR_SPI_DEVICES];	/* state of the SPI devices */
++static int spi_enabled = 0;
++static struct semaphore spi_lock;			/* protect access to SPI bus */
++static int current_device = -1;				/* currently selected SPI device */
++static struct clk *spi_clk;				/* SPI clock */
++static void __iomem *spi_base;				/* SPI peripheral base-address */
++
++DECLARE_COMPLETION(transfer_complete);
++
++
++#define at91_spi_read(reg)		__raw_readl(spi_base + (reg))
++#define at91_spi_write(reg, val)	__raw_writel((val), spi_base + (reg))
++
++
++/* ......................................................................... */
++
++/*
++ * Access and enable the SPI bus.
++ * This MUST be called before any transfers are performed.
++ */
++void spi_access_bus(short device)
++{
++	/* Ensure that requested device is valid */
++	if ((device < 0) || (device >= NR_SPI_DEVICES))
++		panic("at91_spi: spi_access_bus called with invalid device");
++
++	if (spi_enabled == 0) {
++		clk_enable(spi_clk);				/* Enable Peripheral clock */
++		at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN);	/* Enable SPI */
++#ifdef DEBUG_SPI
++		printk("SPI on\n");
++#endif
++	}
++	spi_enabled++;
++
++	/* Lock the SPI bus */
++	down(&spi_lock);
++	current_device = device;
++
++	/* Configure SPI bus for device */
++	at91_spi_write(AT91_SPI_MR, AT91_SPI_MSTR | AT91_SPI_MODFDIS | (spi_dev[device].pcs << 16));
++}
++
++/*
++ * Relinquish control of the SPI bus.
++ */
++void spi_release_bus(short device)
++{
++	if (device != current_device)
++		panic("at91_spi: spi_release called with invalid device");
++
++	/* Release the SPI bus */
++	current_device = -1;
++	up(&spi_lock);
++
++	spi_enabled--;
++	if (spi_enabled == 0) {
++		at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS);	/* Disable SPI */
++		clk_disable(spi_clk);				/* Disable Peripheral clock */
++#ifdef DEBUG_SPI
++		printk("SPI off\n");
++#endif
++	}
++}
++
++/*
++ * Perform a data transfer over the SPI bus
++ */
++int spi_transfer(struct spi_transfer_list* list)
++{
++	struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
++	int tx_size;
++
++	if (!list)
++		panic("at91_spi: spi_transfer called with NULL transfer list");
++	if (current_device == -1)
++		panic("at91_spi: spi_transfer called without acquiring bus");
++
++#ifdef DEBUG_SPI
++	printk("SPI transfer start [%i]\n", list->nr_transfers);
++#endif
++
++	/* If we are in 16-bit mode, we need to modify what we pass to the PDC */
++	tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
++
++	/* Store transfer list */
++	device->xfers = list;
++	list->curr = 0;
++
++	/* Assume there must be at least one transfer */
++	device->tx = dma_map_single(NULL, list->tx[0], list->txlen[0], DMA_TO_DEVICE);
++	device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE);
++
++	/* Program PDC registers */
++	at91_spi_write(ATMEL_PDC_TPR, device->tx);
++	at91_spi_write(ATMEL_PDC_RPR, device->rx);
++	at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size);
++	at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size);
++
++	/* Is there a second transfer? */
++	if (list->nr_transfers > 1) {
++		device->txnext = dma_map_single(NULL, list->tx[1], list->txlen[1], DMA_TO_DEVICE);
++		device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE);
++
++		/* Program Next PDC registers */
++		at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
++		at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
++		at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size);
++		at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size);
++	}
++	else {
++		device->txnext = 0;
++		device->rxnext = 0;
++		at91_spi_write(ATMEL_PDC_TNCR, 0);
++		at91_spi_write(ATMEL_PDC_RNCR, 0);
++	}
++
++	// TODO: If we are doing consecutive transfers (at high speed, or
++	//   small buffers), then it might be worth modifying the 'Delay between
++	//   Consecutive Transfers' in the CSR registers.
++	//   This is an issue if we cannot chain the next buffer fast enough
++	//   in the interrupt handler.
++
++	/* Enable transmitter and receiver */
++	at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN);
++
++	at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX);		/* enable buffer complete interrupt */
++	wait_for_completion(&transfer_complete);
++
++#ifdef DEBUG_SPI
++	printk("SPI transfer end\n");
++#endif
++
++	return 0;
++}
++
++/* ......................................................................... */
++
++/*
++ * Handle interrupts from the SPI controller.
++ */
++static irqreturn_t at91spi_interrupt(int irq, void *dev_id)
++{
++	unsigned int status;
++	struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
++	struct spi_transfer_list *list = device->xfers;
++
++#ifdef DEBUG_SPI
++	printk("SPI interrupt %i\n", current_device);
++#endif
++
++	if (!list)
++		panic("at91_spi: spi_interrupt with a NULL transfer list");
++
++		status = at91_spi_read(AT91_SPI_SR) & at91_spi_read(AT91_SPI_IMR);	/* read status */
++
++	dma_unmap_single(NULL, device->tx, list->txlen[list->curr], DMA_TO_DEVICE);
++	dma_unmap_single(NULL, device->rx, list->rxlen[list->curr], DMA_FROM_DEVICE);
++
++	device->tx = device->txnext;	/* move next transfer to current transfer */
++	device->rx = device->rxnext;
++
++	list->curr = list->curr + 1;
++	if (list->curr == list->nr_transfers) {		/* all transfers complete */
++		at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX);		/* disable interrupt */
++
++		/* Disable transmitter and receiver */
++		at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
++
++		device->xfers = NULL;
++		complete(&transfer_complete);
++	}
++	else if (list->curr+1 == list->nr_transfers) {	/* no more next transfers */
++		device->txnext = 0;
++		device->rxnext = 0;
++		at91_spi_write(ATMEL_PDC_TNCR, 0);
++		at91_spi_write(ATMEL_PDC_RNCR, 0);
++	}
++	else {
++		int i = (list->curr)+1;
++
++		/* If we are in 16-bit mode, we need to modify what we pass to the PDC */
++		int tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
++
++		device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE);
++		device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE);
++		at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
++		at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
++		at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size);
++		at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size);
++	}
++	return IRQ_HANDLED;
++}
++
++/* ......................................................................... */
++
++/*
++ * Initialize the SPI controller
++ */
++static int __init at91spi_probe(struct platform_device *pdev)
++{
++	int i;
++	unsigned long scbr;
++	struct resource *res;
++
++	init_MUTEX(&spi_lock);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res)
++		return -ENXIO;
++
++	if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi"))
++		return -EBUSY;
++
++	spi_base = ioremap(res->start, res->end - res->start + 1);
++	if (!spi_base) {
++		release_mem_region(res->start, res->end - res->start + 1);
++		return -ENOMEM;
++	}
++
++	spi_clk = clk_get(NULL, "spi_clk");
++	if (IS_ERR(spi_clk)) {
++		printk(KERN_ERR "at91_spi: no clock defined\n");
++		iounmap(spi_base);
++		release_mem_region(res->start, res->end - res->start + 1);
++		return -ENODEV;
++	}
++
++	at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST);	/* software reset of SPI controller */
++
++	/*
++	 * Calculate the correct SPI baud-rate divisor.
++	 */
++	scbr = clk_get_rate(spi_clk) / (2 * DEFAULT_SPI_CLK);
++	scbr = scbr + 1;		/* round up */
++
++	printk(KERN_INFO "at91_spi: Baud rate set to %ld\n", clk_get_rate(spi_clk) / (2 * scbr));
++
++	/* Set Chip Select registers to good defaults */
++	for (i = 0; i < 4; i++) {
++		at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8));
++	}
++
++	at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
++
++	memset(&spi_dev, 0, sizeof(spi_dev));
++	spi_dev[0].pcs = 0xE;
++	spi_dev[1].pcs = 0xD;
++	spi_dev[2].pcs = 0xB;
++	spi_dev[3].pcs = 0x7;
++
++	if (request_irq(AT91RM9200_ID_SPI, at91spi_interrupt, 0, "spi", NULL)) {
++		clk_put(spi_clk);
++		iounmap(spi_base);
++		release_mem_region(res->start, res->end - res->start + 1);
++		return -EBUSY;
++	}
++
++	at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN);		/* Enable SPI */
++
++	return 0;
++}
++
++static int __devexit at91spi_remove(struct platform_device *pdev)
++{
++	struct resource *res;
++
++	at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS);		/* Disable SPI */
++	clk_put(spi_clk);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	iounmap(spi_base);
++	release_mem_region(res->start, res->end - res->start + 1);
++
++	free_irq(AT91RM9200_ID_SPI, 0);
++	return 0;
++}
++
++static struct platform_driver at91spi_driver = {
++	.probe		= at91spi_probe,
++	.remove		= __devexit_p(at91spi_remove),
++	.driver		= {
++		.name	= "at91_spi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at91spi_init(void)
++{
++	return platform_driver_register(&at91spi_driver);
++}
++
++static void __exit at91spi_exit(void)
++{
++	platform_driver_unregister(&at91spi_driver);
++}
++
++EXPORT_SYMBOL(spi_access_bus);
++EXPORT_SYMBOL(spi_release_bus);
++EXPORT_SYMBOL(spi_transfer);
++
++module_init(at91spi_init);
++module_exit(at91spi_exit);
++
++MODULE_LICENSE("GPL")
++MODULE_AUTHOR("Andrew Victor")
++MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200")
+diff -urN linux-2.6.20.4-0rig/drivers/char/at91_spidev.c linux-2.6.20.4-atmel/drivers/char/at91_spidev.c
+--- linux-2.6.20.4-0rig/drivers/char/at91_spidev.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/char/at91_spidev.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,236 @@
++/*
++ * User-space interface to the SPI bus on Atmel AT91RM9200
++ *
++ *  Copyright (C) 2003 SAN People (Pty) Ltd
++ *
++ * Based on SPI driver by Rick Bronson
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/highmem.h>
++#include <linux/pagemap.h>
++#include <asm/arch/spi.h>
++
++#ifdef CONFIG_DEVFS_FS
++#include <linux/devfs_fs_kernel.h>
++#endif
++
++
++#undef DEBUG_SPIDEV
++
++/* ......................................................................... */
++
++/*
++ * Read or Write to SPI bus.
++ */
++static ssize_t spidev_rd_wr(struct file *file, char *buf, size_t count, loff_t *offset)
++{
++	unsigned int spi_device = (unsigned int) file->private_data;
++
++	struct mm_struct * mm;
++	struct page ** maplist;
++	struct spi_transfer_list* list;
++	int    pgcount;
++
++	unsigned int ofs, pagelen;
++	int res, i, err;
++
++	if (!count) {
++		return 0;
++	}
++
++	list = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
++	if (!list) {
++		return -ENOMEM;
++	}
++
++	mm = current->mm;
++
++	pgcount = ((unsigned long)buf+count+PAGE_SIZE-1)/PAGE_SIZE - (unsigned long)buf/PAGE_SIZE;
++
++	if (pgcount >= MAX_SPI_TRANSFERS) {
++		kfree(list);
++		return -EFBIG;
++	}
++
++	maplist = kmalloc (pgcount * sizeof (struct page *), GFP_KERNEL);
++
++	if (!maplist) {
++		kfree(list);
++		return -ENOMEM;
++	}
++	flush_cache_all();
++	down_read(&mm->mmap_sem);
++	err= get_user_pages(current, mm, (unsigned long)buf, pgcount, 1, 0, maplist, NULL);
++	up_read(&mm->mmap_sem);
++
++	if (err < 0) {
++		kfree(list);
++		kfree(maplist);
++		return err;
++	}
++	pgcount = err;
++
++#ifdef DEBUG_SPIDEV
++	printk("spidev_rd_rw: %i %i\n", count, pgcount);
++#endif
++
++	/* Set default return value = transfer length */
++	res = count;
++
++	/*
++	 * At this point, the virtual area buf[0] .. buf[count-1] will have
++	 * corresponding pages mapped in the physical memory and locked until
++	 * we unmap the kiobuf.  The pages cannot be swapped out or moved
++	 * around.
++	 */
++	ofs = (unsigned long) buf & (PAGE_SIZE -1);
++	pagelen = PAGE_SIZE - ofs;
++	if (count < pagelen)
++		pagelen = count;
++
++	for (i = 0; i < pgcount; i++) {
++		flush_dcache_page(maplist[i]);
++
++		list->tx[i] = list->rx[i] = page_address(maplist[i]) + ofs;
++		list->txlen[i] = list->rxlen[i] = pagelen;
++
++#ifdef DEBUG_SPIDEV
++		printk("  %i: %x  (%i)\n", i, list->tx[i], list->txlen[i]);
++#endif
++
++		ofs = 0;	/* all subsequent transfers start at beginning of a page */
++		count = count - pagelen;
++		pagelen = (count < PAGE_SIZE) ? count : PAGE_SIZE;
++	}
++	list->nr_transfers = pgcount;
++
++	/* Perform transfer on SPI bus */
++	spi_access_bus(spi_device);
++	spi_transfer(list);
++	spi_release_bus(spi_device);
++
++	while (pgcount--) {
++		page_cache_release (maplist[pgcount]);
++	}
++	flush_cache_all();
++
++	kfree(maplist);
++	kfree(list);
++
++	return res;
++}
++
++static int spidev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
++{
++	int spi_device = MINOR(inode->i_rdev);
++
++	if (spi_device >= NR_SPI_DEVICES)
++		return -ENODEV;
++
++	// TODO: This interface can be used to configure the SPI bus.
++	// Configurable options could include: Speed, Clock Polarity, Clock Phase
++
++	switch(cmd) {
++		default:
++			return -ENOIOCTLCMD;
++	}
++}
++
++/*
++ * Open the SPI device
++ */
++static int spidev_open(struct inode *inode, struct file *file)
++{
++	unsigned int spi_device = MINOR(inode->i_rdev);
++
++	if (spi_device >= NR_SPI_DEVICES)
++		return -ENODEV;
++
++	/*
++	 * 'private_data' is actually a pointer, but we overload it with the
++	 * value we want to store.
++	 */
++	file->private_data = (void *)spi_device;
++
++	return 0;
++}
++
++/*
++ * Close the SPI device
++ */
++static int spidev_close(struct inode *inode, struct file *file)
++{
++	return 0;
++}
++
++/* ......................................................................... */
++
++static struct file_operations spidev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.read		= spidev_rd_wr,
++	.write		= (int (*) (struct file *file, const char *buf, size_t count, loff_t *offset))spidev_rd_wr,
++	.ioctl		= spidev_ioctl,
++	.open		= spidev_open,
++	.release	= spidev_close,
++};
++
++/*
++ * Install the SPI /dev interface driver
++ */
++static int __init at91_spidev_init(void)
++{
++#ifdef CONFIG_DEVFS_FS
++	int i;
++#endif
++
++	if (register_chrdev(SPI_MAJOR, "spi", &spidev_fops)) {
++		printk(KERN_ERR "at91_spidev: Unable to get major %d for SPI bus\n", SPI_MAJOR);
++		return -EIO;
++	}
++
++#ifdef CONFIG_DEVFS_FS
++	devfs_mk_dir("spi");
++	for (i = 0; i < NR_SPI_DEVICES; i++) {
++		devfs_mk_cdev(MKDEV(SPI_MAJOR, i), S_IFCHR | S_IRUSR | S_IWUSR, "spi/%d",i);
++	}
++#endif
++	printk(KERN_INFO "AT91 SPI driver loaded\n");
++
++	return 0;
++}
++
++/*
++ * Remove the SPI /dev interface driver
++ */
++static void __exit at91_spidev_exit(void)
++{
++#ifdef CONFIG_DEVFS_FS
++	int i;
++	for (i = 0; i < NR_SPI_DEVICES; i++) {
++		devfs_remove("spi/%d", i);
++	}
++
++	devfs_remove("spi");
++#endif
++
++	if (unregister_chrdev(SPI_MAJOR, "spi")) {
++		printk(KERN_ERR "at91_spidev: Unable to release major %d for SPI bus\n", SPI_MAJOR);
++		return;
++	}
++}
++
++module_init(at91_spidev_init);
++module_exit(at91_spidev_exit);
++
++MODULE_LICENSE("GPL")
++MODULE_AUTHOR("Andrew Victor")
++MODULE_DESCRIPTION("SPI /dev interface for Atmel AT91RM9200")
+diff -urN linux-2.6.20.4-0rig/drivers/char/Kconfig linux-2.6.20.4-atmel/drivers/char/Kconfig
+--- linux-2.6.20.4-0rig/drivers/char/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/char/Kconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -1030,5 +1030,21 @@
+ 	  sysfs directory, /sys/devices/platform/telco_clock, with a number of
+ 	  files for controlling the behavior of this hardware.
+ 
++config AT91_SPI
++	bool "SPI driver (legacy) for AT91RM9200 processors"
++	depends on ARCH_AT91RM9200
++	default y
++	help
++	  The SPI driver gives access to this serial bus on the AT91RM9200
++	  processor.
++
++config AT91_SPIDEV
++	bool "SPI device interface (legacy) for AT91RM9200 processors"
++	depends on ARCH_AT91RM9200 && AT91_SPI
++	default n
++	help
++	  The SPI driver gives user mode access to this serial
++	  bus on the AT91RM9200 processor.
++
+ endmenu
+ 
+diff -urN linux-2.6.20.4-0rig/drivers/char/Makefile linux-2.6.20.4-atmel/drivers/char/Makefile
+--- linux-2.6.20.4-0rig/drivers/char/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/char/Makefile	2007-03-24 16:39:15.000000000 +0100
+@@ -90,6 +90,8 @@
+ obj-$(CONFIG_GPIO_VR41XX)	+= vr41xx_giu.o
+ obj-$(CONFIG_TANBAC_TB0219)	+= tb0219.o
+ obj-$(CONFIG_TELCLOCK)		+= tlclk.o
++obj-$(CONFIG_AT91_SPI)		+= at91_spi.o
++obj-$(CONFIG_AT91_SPIDEV)	+= at91_spidev.o
+ 
+ obj-$(CONFIG_WATCHDOG)		+= watchdog/
+ obj-$(CONFIG_MWAVE)		+= mwave/
+diff -urN linux-2.6.20.4-0rig/drivers/i2c/busses/atmeltwi.h linux-2.6.20.4-atmel/drivers/i2c/busses/atmeltwi.h
+--- linux-2.6.20.4-0rig/drivers/i2c/busses/atmeltwi.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/i2c/busses/atmeltwi.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ASM_AVR32_TWI_H__
++#define __ASM_AVR32_TWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name,value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name,value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name,value))
++
++/* Register access macros */
++#define twi_readl(port,reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ASM_AVR32_TWI_H__ */
+diff -urN linux-2.6.20.4-0rig/drivers/i2c/busses/i2c-at91.c linux-2.6.20.4-atmel/drivers/i2c/busses/i2c-at91.c
+--- linux-2.6.20.4-0rig/drivers/i2c/busses/i2c-at91.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/i2c/busses/i2c-at91.c	2007-03-24 16:39:15.000000000 +0100
+@@ -31,8 +31,11 @@
+ #include <asm/arch/board.h>
+ #include <asm/arch/cpu.h>
+ 
+-#define TWI_CLOCK		100000		/* Hz. max 400 Kbits/sec */
+ 
++/* Clockrate is configurable - max 400 Kbits/sec */
++static unsigned int clockrate = CONFIG_I2C_AT91_CLOCKRATE;
++module_param(clockrate, uint, 0);
++MODULE_PARM_DESC(clockrate, "The TWI clockrate");
+ 
+ static struct clk *twi_clk;
+ static void __iomem *twi_base;
+@@ -53,7 +56,7 @@
+ 	at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);	/* Set Master mode */
+ 
+ 	/* Calcuate clock dividers */
+-	cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
++	cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3;
+ 	cdiv = cdiv + 1;	/* round up */
+ 	ckdiv = 0;
+ 	while (cdiv > 255) {
+@@ -63,9 +66,14 @@
+ 
+ 	if (cpu_is_at91rm9200()) {			/* AT91RM9200 Errata #22 */
+ 		if (ckdiv > 5) {
+-			printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
++			printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
+ 			ckdiv = 5;
+ 		}
++	} else {
++		if (ckdiv > 7) {
++			printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
++			ckdiv = 7;
++		}
+ 	}
+ 
+ 	at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
+diff -urN linux-2.6.20.4-0rig/drivers/i2c/busses/i2c-atmeltwi.c linux-2.6.20.4-atmel/drivers/i2c/busses/i2c-atmeltwi.c
+--- linux-2.6.20.4-0rig/drivers/i2c/busses/i2c-atmeltwi.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/i2c/busses/i2c-atmeltwi.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,348 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++
++#include <linux/err.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/types.h>
++#include <linux/delay.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <asm/io.h>
++#include <linux/time.h>
++#include "atmeltwi.h"
++
++static unsigned int baudrate = CONFIG_I2C_ATMELTWI_BAUDRATE;
++module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	spinlock_t lock;
++	struct completion comp;
++	u32 intmask;
++	u8 *buf;
++	u8 len;
++	u8 acks_left;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * Initialize the TWI hardware registers.
++ */
++static int __devinit twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv=0;
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, (TWI_BF(CKDIV, ckdiv)
++			       | TWI_BF(CHDIV, cdiv)
++			       | TWI_BF(CLDIV, cdiv)));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out (~100ms).
++ */
++static short twi_wait_for_completion(struct atmel_twi *twi,
++		u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	twi->intmask = mask;
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if(!wait_for_completion_timeout(&twi->comp, timeout))
++		return -ETIMEDOUT;
++
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	struct i2c_msg *pmsg;
++	int i;
++
++	/* get first message */
++	pmsg = msgs;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	for (i = 0; i < num; i++, pmsg++) {
++
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,"#%d: internal addr %d %s byte%s %s 0x%02x\n",
++			i,pmsg->len, pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			twi_writel(twi, CR, TWI_BIT(START));
++			if ( twi_wait_for_completion(twi,TWI_BIT(RXRDY))==-ETIMEDOUT ) {
++				dev_dbg(&adap->dev, "RXRDY timeout. Stopped with %d bytes left\n",
++					twi->acks_left);
++				return -ETIMEDOUT;
++			}
++
++			/* Send Stop, and Wait until transfer is finished */
++			if ( twi_wait_for_completion(twi,TWI_BIT(TXCOMP))==-ETIMEDOUT ) {
++				dev_dbg(&adap->dev, "TXCOMP timeout\n");
++				return -ETIMEDOUT;
++			}
++
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			if ( twi_wait_for_completion(twi,TWI_BIT(TXRDY))==-ETIMEDOUT ) {
++				dev_dbg(&adap->dev, "TXRDY timeout. Stopped with %d bytes left\n",
++				twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	if (twi->intmask & status){
++		if (twi->intmask & TWI_BIT(NACK)) {
++			goto nack;
++		} else if (twi->intmask & TWI_BIT(RXRDY)){
++			twi->buf[twi->len - twi->acks_left] = twi_readl(twi,RHR);
++			if(--twi->acks_left==1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++			if (twi->acks_left==0)
++				goto complete;
++		} else if (twi->intmask & TWI_BIT(TXRDY)) {
++			twi->acks_left--;
++			if (twi->acks_left==0) {
++				twi->intmask = TWI_BIT(TXCOMP);
++				twi_writel(twi, IER, TWI_BIT(TXCOMP));
++			} else
++				twi_writel(twi, THR, twi->buf[twi->len - twi->acks_left]);
++		} else if (twi->intmask & TWI_BIT(TXCOMP)) {
++			goto complete;
++		}
++	}
++
++	return IRQ_HANDLED;
++
++nack:
++	printk(KERN_INFO "NACK received!\n");
++
++complete:
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	return IRQ_HANDLED;
++
++}
++
++
++/*
++ * Return list of supported functionality.
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
++}
++
++/* For now, we only handle combined mode (smbus) */
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __devinit twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_err(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev,0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_err(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_HWMON;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_adapter(adapter);
++	if (rc) {
++		dev_err(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev, "Atmel TWI i2c bus device (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __devexit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.probe		= twi_probe,
++	.remove		= __devexit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_register(&twi_driver);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/i2c/busses/Kconfig linux-2.6.20.4-atmel/drivers/i2c/busses/Kconfig
+--- linux-2.6.20.4-0rig/drivers/i2c/busses/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/i2c/busses/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -5,6 +5,26 @@
+ menu "I2C Hardware Bus support"
+ 	depends on I2C
+ 
++config I2C_ATMELTWI
++	tristate "Atmel TWI/I2C"
++	depends on I2C
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality. Atmel's TWI is compatible with Philips' I2C
++	  protocol. If in doubt, say NO
++
++config I2C_ATMELTWI_BAUDRATE
++	prompt "Atmel TWI baudrate"
++	depends on I2C_ATMELTWI
++	int
++	default 100000
++	help
++	  Set the TWI/I2C baudrate. This will alter the default value. A
++	  different baudrate can be set by using a module parameter as well. If
++	  no parameter is provided when loading, this is the value that will be
++	  used.
++
+ config I2C_ALI1535
+ 	tristate "ALI 1535"
+ 	depends on I2C && PCI
+@@ -81,6 +101,14 @@
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_AT91_CLOCKRATE
++	prompt "Atmel AT91 I2C/TWI clock-rate"
++	depends on I2C_AT91
++	int
++	default 100000
++	help
++	  Set the AT91 I2C/TWI clock-rate.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on I2C && (SOC_AU1550 || SOC_AU1200)
+diff -urN linux-2.6.20.4-0rig/drivers/i2c/busses/Makefile linux-2.6.20.4-atmel/drivers/i2c/busses/Makefile
+--- linux-2.6.20.4-0rig/drivers/i2c/busses/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/i2c/busses/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -46,6 +46,7 @@
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff -urN linux-2.6.20.4-0rig/drivers/input/touchscreen/ads7846.c linux-2.6.20.4-atmel/drivers/input/touchscreen/ads7846.c
+--- linux-2.6.20.4-0rig/drivers/input/touchscreen/ads7846.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/input/touchscreen/ads7846.c	2007-03-24 16:39:15.000000000 +0100
+@@ -17,8 +17,9 @@
+  *  it under the terms of the GNU General Public License version 2 as
+  *  published by the Free Software Foundation.
+  */
+-#include <linux/device.h>
++#include <linux/hwmon.h>
+ #include <linux/init.h>
++#include <linux/err.h>
+ #include <linux/delay.h>
+ #include <linux/input.h>
+ #include <linux/interrupt.h>
+@@ -38,7 +39,8 @@
+ /*
+  * This code has been heavily tested on a Nokia 770, and lightly
+  * tested on other ads7846 devices (OSK/Mistral, Lubbock).
+- * Support for ads7843 and ads7845 has only been stubbed in.
++ * Support for ads7843 tested on Atmel at91sam926x-EK.
++ * Support for ads7845 has only been stubbed in.
+  *
+  * IRQ handling needs a workaround because of a shortcoming in handling
+  * edge triggered IRQs on some platforms like the OMAP1/2. These
+@@ -54,7 +56,8 @@
+  * files.
+  */
+ 
+-#define	TS_POLL_PERIOD	msecs_to_jiffies(10)
++#define TS_POLL_DELAY	(1 * 1000000)	/* ns delay before the first sample */
++#define TS_POLL_PERIOD	(5 * 1000000)	/* ns delay between samples */
+ 
+ /* this driver doesn't aim at the peak continuous sample rate */
+ #define	SAMPLE_BITS	(8 /*cmd*/ + 16 /*sample*/ + 2 /* before, after */)
+@@ -63,12 +66,12 @@
+ 	/* For portability, we can't read 12 bit values using SPI (which
+ 	 * would make the controller deliver them as native byteorder u16
+ 	 * with msbs zeroed).  Instead, we read them as two 8-bit values,
+-	 * which need byteswapping then range adjustment.
++	 * *** WHICH NEED BYTESWAPPING *** and range adjustment.
+ 	 */
+-	__be16 x;
+-	__be16 y;
+-	__be16 z1, z2;
+-	int    ignore;
++	u16	x;
++	u16	y;
++	u16	z1, z2;
++	int	ignore;
+ };
+ 
+ struct ads7846 {
+@@ -76,7 +79,12 @@
+ 	char			phys[32];
+ 
+ 	struct spi_device	*spi;
++
++#if defined(CONFIG_HWMON) || defined(CONFIG_HWMON_MODULE)
+ 	struct attribute_group	*attr_group;
++	struct class_device	*hwmon;
++#endif
++
+ 	u16			model;
+ 	u16			vref_delay_usecs;
+ 	u16			x_plate_ohms;
+@@ -99,13 +107,16 @@
+ 	u16			debounce_rep;
+ 
+ 	spinlock_t		lock;
+-	struct timer_list	timer;		/* P: lock */
++	struct hrtimer		timer;
+ 	unsigned		pendown:1;	/* P: lock */
+ 	unsigned		pending:1;	/* P: lock */
+ // FIXME remove "irq_disabled"
+ 	unsigned		irq_disabled:1;	/* P: lock */
+ 	unsigned		disabled:1;
+ 
++	int			(*filter)(void *data, int data_idx, int *val);
++	void			*filter_data;
++	void			(*filter_cleanup)(void *data);
+ 	int			(*get_pendown_state)(void);
+ };
+ 
+@@ -142,15 +153,16 @@
+ #define	MAX_12BIT	((1<<12)-1)
+ 
+ /* leave ADC powered up (disables penirq) between differential samples */
+-#define	READ_12BIT_DFR(x) (ADS_START | ADS_A2A1A0_d_ ## x \
+-	| ADS_12_BIT | ADS_DFR)
+-
+-#define	READ_Y	(READ_12BIT_DFR(y)  | ADS_PD10_ADC_ON)
+-#define	READ_Z1	(READ_12BIT_DFR(z1) | ADS_PD10_ADC_ON)
+-#define	READ_Z2	(READ_12BIT_DFR(z2) | ADS_PD10_ADC_ON)
++#define	READ_12BIT_DFR(x, adc, vref) (ADS_START | ADS_A2A1A0_d_ ## x \
++	| ADS_12_BIT | ADS_DFR | \
++	(adc ? ADS_PD10_ADC_ON : 0) | (vref ? ADS_PD10_REF_ON : 0))
++
++#define	READ_Y(vref)	(READ_12BIT_DFR(y,  1, vref))
++#define	READ_Z1(vref)	(READ_12BIT_DFR(z1, 1, vref))
++#define	READ_Z2(vref)	(READ_12BIT_DFR(z2, 1, vref))
+ 
+-#define	READ_X	(READ_12BIT_DFR(x)  | ADS_PD10_ADC_ON)
+-#define	PWRDOWN	(READ_12BIT_DFR(y)  | ADS_PD10_PDOWN)	/* LAST */
++#define	READ_X(vref)	(READ_12BIT_DFR(x,  1, vref))
++#define	PWRDOWN		(READ_12BIT_DFR(y,  0, 0))	/* LAST */
+ 
+ /* single-ended samples need to first power up reference voltage;
+  * we leave both ADC and VREF powered
+@@ -158,14 +170,19 @@
+ #define	READ_12BIT_SER(x) (ADS_START | ADS_A2A1A0_ ## x \
+ 	| ADS_12_BIT | ADS_SER)
+ 
+-#define	REF_ON	(READ_12BIT_DFR(x) | ADS_PD10_ALL_ON)
+-#define	REF_OFF	(READ_12BIT_DFR(y) | ADS_PD10_PDOWN)
++#define	REF_ON	(READ_12BIT_DFR(x, 1, 1))
++#define	REF_OFF	(READ_12BIT_DFR(y, 0, 0))
+ 
+ /*--------------------------------------------------------------------------*/
+ 
+ /*
+  * Non-touchscreen sensors only use single-ended conversions.
++ * The range is GND..vREF. The ads7843 and ads7835 must use external vREF;
++ * ads7846 lets that pin be unconnected, to use internal vREF.
+  */
++static unsigned vREF_mV;
++module_param(vREF_mV, uint, 0);
++MODULE_PARM_DESC(vREF_mV, "external vREF voltage, in milliVolts");
+ 
+ struct ser_req {
+ 	u8			ref_on;
+@@ -193,50 +210,53 @@
+ 	struct ser_req		*req = kzalloc(sizeof *req, GFP_KERNEL);
+ 	int			status;
+ 	int			sample;
+-	int			i;
++	int			use_internal;
+ 
+ 	if (!req)
+ 		return -ENOMEM;
+ 
+ 	spi_message_init(&req->msg);
+ 
+-	/* activate reference, so it has time to settle; */
+-	req->ref_on = REF_ON;
+-	req->xfer[0].tx_buf = &req->ref_on;
+-	req->xfer[0].len = 1;
+-	req->xfer[1].rx_buf = &req->scratch;
+-	req->xfer[1].len = 2;
+-
+-	/*
+-	 * for external VREF, 0 usec (and assume it's always on);
+-	 * for 1uF, use 800 usec;
+-	 * no cap, 100 usec.
+-	 */
+-	req->xfer[1].delay_usecs = ts->vref_delay_usecs;
++	/* FIXME boards with ads7846 might use external vref instead ... */
++	use_internal = (ts->model == 7846);
++
++	/* maybe turn on internal vREF, and let it settle */
++	if (use_internal) {
++		req->ref_on = REF_ON;
++		req->xfer[0].tx_buf = &req->ref_on;
++		req->xfer[0].len = 1;
++		spi_message_add_tail(&req->xfer[0], &req->msg);
++
++		req->xfer[1].rx_buf = &req->scratch;
++		req->xfer[1].len = 2;
++
++		/* for 1uF, settle for 800 usec; no cap, 100 usec.  */
++		req->xfer[1].delay_usecs = ts->vref_delay_usecs;
++		spi_message_add_tail(&req->xfer[1], &req->msg);
++	}
+ 
+ 	/* take sample */
+ 	req->command = (u8) command;
+ 	req->xfer[2].tx_buf = &req->command;
+ 	req->xfer[2].len = 1;
++	spi_message_add_tail(&req->xfer[2], &req->msg);
++
+ 	req->xfer[3].rx_buf = &req->sample;
+ 	req->xfer[3].len = 2;
++	spi_message_add_tail(&req->xfer[3], &req->msg);
+ 
+ 	/* REVISIT:  take a few more samples, and compare ... */
+ 
+-	/* turn off reference */
+-	req->ref_off = REF_OFF;
++	/* converter in low power mode & enable PENIRQ */
++	req->ref_off = PWRDOWN;
+ 	req->xfer[4].tx_buf = &req->ref_off;
+ 	req->xfer[4].len = 1;
++	spi_message_add_tail(&req->xfer[4], &req->msg);
++
+ 	req->xfer[5].rx_buf = &req->scratch;
+ 	req->xfer[5].len = 2;
+-
+ 	CS_CHANGE(req->xfer[5]);
+-
+-	/* group all the transfers together, so we can't interfere with
+-	 * reading touchscreen state; disable penirq while sampling
+-	 */
+-	for (i = 0; i < 6; i++)
+-		spi_message_add_tail(&req->xfer[i], &req->msg);
++	spi_message_add_tail(&req->xfer[5], &req->msg);
+ 
+ 	ts->irq_disabled = 1;
+ 	disable_irq(spi->irq);
+@@ -256,25 +276,173 @@
+ 	return status ? status : sample;
+ }
+ 
+-#define SHOW(name) static ssize_t \
++#if defined(CONFIG_HWMON) || defined(CONFIG_HWMON_MODULE)
++
++#define SHOW(name, var, adjust) static ssize_t \
+ name ## _show(struct device *dev, struct device_attribute *attr, char *buf) \
+ { \
++	struct ads7846 *ts = dev_get_drvdata(dev); \
+ 	ssize_t v = ads7846_read12_ser(dev, \
+-			READ_12BIT_SER(name) | ADS_PD10_ALL_ON); \
++			READ_12BIT_SER(var) | ADS_PD10_ALL_ON); \
+ 	if (v < 0) \
+ 		return v; \
+-	return sprintf(buf, "%u\n", (unsigned) v); \
++	return sprintf(buf, "%u\n", adjust(ts, v)); \
+ } \
+ static DEVICE_ATTR(name, S_IRUGO, name ## _show, NULL);
+ 
+-SHOW(temp0)
+-SHOW(temp1)
+-SHOW(vaux)
+-SHOW(vbatt)
++
++/* Sysfs conventions report temperatures in millidegrees Celcius.
++ * ADS7846 could use the low-accuracy two-sample scheme, but can't do the high
++ * accuracy scheme without calibration data.  For now we won't try either;
++ * userspace sees raw sensor values, and must scale/calibrate appropriately.
++ */
++static inline unsigned null_adjust(struct ads7846 *ts, ssize_t v)
++{
++	return v;
++}
++
++SHOW(temp0, temp0, null_adjust)		/* temp1_input */
++SHOW(temp1, temp1, null_adjust)		/* temp2_input */
++
++
++/* sysfs conventions report voltages in millivolts.  We can convert voltages
++ * if we know vREF.  userspace may need to scale vAUX to match the board's
++ * external resistors; we assume that vBATT only uses the internal ones.
++ */
++static inline unsigned vaux_adjust(struct ads7846 *ts, ssize_t v)
++{
++	unsigned retval = v;
++
++	/* external resistors may scale vAUX into 0..vREF */
++	retval *= vREF_mV;
++	retval = retval >> 12;
++	return retval;
++}
++
++static inline unsigned vbatt_adjust(struct ads7846 *ts, ssize_t v)
++{
++	unsigned retval = vaux_adjust(ts, v);
++
++	/* ads7846 has a resistor ladder to scale this signal down */
++	if (ts->model == 7846)
++		retval *= 4;
++	return retval;
++}
++
++SHOW(in0_input, vaux, vaux_adjust)
++SHOW(in1_input, vbatt, vbatt_adjust)
++
++
++static struct attribute *ads7846_attributes[] = {
++	&dev_attr_temp0.attr,
++	&dev_attr_temp1.attr,
++	&dev_attr_in0_input.attr,
++	&dev_attr_in1_input.attr,
++	NULL,
++};
++
++static struct attribute_group ads7846_attr_group = {
++	.attrs = ads7846_attributes,
++};
++
++static struct attribute *ads7843_attributes[] = {
++	&dev_attr_in0_input.attr,
++	&dev_attr_in1_input.attr,
++	NULL,
++};
++
++static struct attribute_group ads7843_attr_group = {
++	.attrs = ads7843_attributes,
++};
++
++static struct attribute *ads7845_attributes[] = {
++	&dev_attr_in0_input.attr,
++	NULL,
++};
++
++static struct attribute_group ads7845_attr_group = {
++	.attrs = ads7845_attributes,
++};
++
++static int ads784x_hwmon_register(struct spi_device *spi, struct ads7846 *ts)
++{
++	struct class_device *hwmon;
++	int err;
++
++	/* hwmon sensors need a reference voltage */
++	switch (ts->model) {
++	case 7846:
++		if (!vREF_mV) {
++			dev_dbg(&spi->dev, "assuming 2.5V internal vREF\n");
++			vREF_mV = 2500;
++		}
++		break;
++	case 7845:
++	case 7843:
++		if (!vREF_mV) {
++			dev_warn(&spi->dev,
++				"external vREF for ADS%d not specified\n",
++				ts->model);
++			return 0;
++		}
++		break;
++	}
++
++	/* different chips have different sensor groups */
++	switch (ts->model) {
++	case 7846:
++		ts->attr_group = &ads7846_attr_group;
++		break;
++	case 7845:
++		ts->attr_group = &ads7845_attr_group;
++		break;
++	case 7843:
++		ts->attr_group = &ads7843_attr_group;
++		break;
++	default:
++		dev_dbg(&spi->dev, "ADS%d not recognized\n", ts->model);
++		return 0;
++	}
++
++	err = sysfs_create_group(&spi->dev.kobj, ts->attr_group);
++	if (err)
++		return err;
++
++	hwmon = hwmon_device_register(&spi->dev);
++	if (IS_ERR(hwmon)) {
++		sysfs_remove_group(&spi->dev.kobj, ts->attr_group);
++		return PTR_ERR(hwmon);
++	}
++
++	ts->hwmon = hwmon;
++	return 0;
++}
++
++static void ads784x_hwmon_unregister(struct spi_device *spi,
++				     struct ads7846 *ts)
++{
++	if (ts->hwmon) {
++		sysfs_remove_group(&spi->dev.kobj, ts->attr_group);
++		hwmon_device_unregister(ts->hwmon);
++	}
++}
++
++#else
++static inline int ads784x_hwmon_register(struct spi_device *spi,
++					 struct ads7846 *ts)
++{
++	return 0;
++}
++
++static inline void ads784x_hwmon_unregister(struct spi_device *spi,
++					    struct ads7846 *ts)
++{
++}
++#endif
+ 
+ static int is_pen_down(struct device *dev)
+ {
+-	struct ads7846		*ts = dev_get_drvdata(dev);
++	struct ads7846	*ts = dev_get_drvdata(dev);
+ 
+ 	return ts->pendown;
+ }
+@@ -318,46 +486,14 @@
+ 
+ static DEVICE_ATTR(disable, 0664, ads7846_disable_show, ads7846_disable_store);
+ 
+-static struct attribute *ads7846_attributes[] = {
+-	&dev_attr_temp0.attr,
+-	&dev_attr_temp1.attr,
+-	&dev_attr_vbatt.attr,
+-	&dev_attr_vaux.attr,
+-	&dev_attr_pen_down.attr,
+-	&dev_attr_disable.attr,
+-	NULL,
+-};
+-
+-static struct attribute_group ads7846_attr_group = {
+-	.attrs = ads7846_attributes,
+-};
+-
+-/*
+- * ads7843/7845 don't have temperature sensors, and
+- * use the other sensors a bit differently too
+- */
+-
+-static struct attribute *ads7843_attributes[] = {
+-	&dev_attr_vbatt.attr,
+-	&dev_attr_vaux.attr,
++static struct attribute *ads784x_attributes[] = {
+ 	&dev_attr_pen_down.attr,
+ 	&dev_attr_disable.attr,
+ 	NULL,
+ };
+ 
+-static struct attribute_group ads7843_attr_group = {
+-	.attrs = ads7843_attributes,
+-};
+-
+-static struct attribute *ads7845_attributes[] = {
+-	&dev_attr_vaux.attr,
+-	&dev_attr_pen_down.attr,
+-	&dev_attr_disable.attr,
+-	NULL,
+-};
+-
+-static struct attribute_group ads7845_attr_group = {
+-	.attrs = ads7845_attributes,
++static struct attribute_group ads784x_attr_group = {
++	.attrs = ads784x_attributes,
+ };
+ 
+ /*--------------------------------------------------------------------------*/
+@@ -373,25 +509,22 @@
+ static void ads7846_rx(void *ads)
+ {
+ 	struct ads7846		*ts = ads;
+-	struct input_dev	*input_dev = ts->input;
+ 	unsigned		Rt;
+-	unsigned		sync = 0;
+ 	u16			x, y, z1, z2;
+-	unsigned long		flags;
+ 
+-	/* adjust:  on-wire is a must-ignore bit, a BE12 value, then padding;
+-	 * built from two 8 bit values written msb-first.
++	/* ads7846_rx_val() did in-place conversion (including byteswap) from
++	 * on-the-wire format as part of debouncing to get stable readings.
+ 	 */
+-	x = (be16_to_cpu(ts->tc.x) >> 3) & 0x0fff;
+-	y = (be16_to_cpu(ts->tc.y) >> 3) & 0x0fff;
+-	z1 = (be16_to_cpu(ts->tc.z1) >> 3) & 0x0fff;
+-	z2 = (be16_to_cpu(ts->tc.z2) >> 3) & 0x0fff;
++	x = ts->tc.x;
++	y = ts->tc.y;
++	z1 = ts->tc.z1;
++	z2 = ts->tc.z2;
+ 
+ 	/* range filtering */
+ 	if (x == MAX_12BIT)
+ 		x = 0;
+ 
+-	if (likely(x && z1 && !device_suspended(&ts->spi->dev))) {
++	if (likely(x && z1)) {
+ 		/* compute touch pressure resistance using equation #2 */
+ 		Rt = z2;
+ 		Rt -= z1;
+@@ -402,101 +535,134 @@
+ 	} else
+ 		Rt = 0;
+ 
++	if (ts->model == 7843)
++		Rt = ts->pressure_max / 2;
++
++
+ 	/* Sample found inconsistent by debouncing or pressure is beyond
+-	* the maximum. Don't report it to user space, repeat at least
+-	* once more the measurement */
++	 * the maximum. Don't report it to user space, repeat at least
++	 * once more the measurement
++	 */
+ 	if (ts->tc.ignore || Rt > ts->pressure_max) {
+-		mod_timer(&ts->timer, jiffies + TS_POLL_PERIOD);
++#ifdef VERBOSE
++		pr_debug("%s: ignored %d pressure %d\n",
++			ts->spi->dev.bus_id, ts->tc.ignore, Rt);
++#endif
++		hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_PERIOD),
++			      HRTIMER_REL);
+ 		return;
+ 	}
+ 
+-	/* NOTE:  "pendown" is inferred from pressure; we don't rely on
+-	 * being able to check nPENIRQ status, or "friendly" trigger modes
+-	 * (both-edges is much better than just-falling or low-level).
+-	 *
+-	 * REVISIT:  some boards may require reading nPENIRQ; it's
+-	 * needed on 7843.  and 7845 reads pressure differently...
++	/* NOTE: We can't rely on the pressure to determine the pen down
++	 * state, even this controller has a pressure sensor.  The pressure
++	 * value can fluctuate for quite a while after lifting the pen and
++	 * in some cases may not even settle at the expected value.
+ 	 *
+-	 * REVISIT:  the touchscreen might not be connected; this code
+-	 * won't notice that, even if nPENIRQ never fires ...
++	 * The only safe way to check for the pen up condition is in the
++	 * timer by reading the pen signal state (it's a GPIO _and_ IRQ).
+ 	 */
+-	if (!ts->pendown && Rt != 0) {
+-		input_report_key(input_dev, BTN_TOUCH, 1);
+-		sync = 1;
+-	} else if (ts->pendown && Rt == 0) {
+-		input_report_key(input_dev, BTN_TOUCH, 0);
+-		sync = 1;
+-	}
+-
+ 	if (Rt) {
+-		input_report_abs(input_dev, ABS_X, x);
+-		input_report_abs(input_dev, ABS_Y, y);
+-		sync = 1;
+-	}
++		struct input_dev *input = ts->input;
+ 
+-	if (sync) {
+-		input_report_abs(input_dev, ABS_PRESSURE, Rt);
+-		input_sync(input_dev);
+-	}
+-
+-#ifdef	VERBOSE
+-	if (Rt || ts->pendown)
+-		pr_debug("%s: %d/%d/%d%s\n", ts->spi->dev.bus_id,
+-			x, y, Rt, Rt ? "" : " UP");
++		if (!ts->pendown) {
++			input_report_key(input, BTN_TOUCH, 1);
++			ts->pendown = 1;
++#ifdef VERBOSE
++			dev_dbg(&ts->spi->dev, "DOWN\n");
+ #endif
++		}
++		input_report_abs(input, ABS_X, x);
++		input_report_abs(input, ABS_Y, y);
++		input_report_abs(input, ABS_PRESSURE, Rt);
++
++		input_sync(input);
++#ifdef VERBOSE
++		dev_dbg(&ts->spi->dev, "%4d/%4d/%4d\n", x, y, Rt);
++#endif
++	}
+ 
+-	spin_lock_irqsave(&ts->lock, flags);
+-
+-	ts->pendown = (Rt != 0);
+-	mod_timer(&ts->timer, jiffies + TS_POLL_PERIOD);
+-
+-	spin_unlock_irqrestore(&ts->lock, flags);
++	hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_PERIOD), HRTIMER_REL);
+ }
+ 
+-static void ads7846_debounce(void *ads)
++static int ads7846_debounce(void *ads, int data_idx, int *val)
+ {
+ 	struct ads7846		*ts = ads;
+-	struct spi_message	*m;
+-	struct spi_transfer	*t;
+-	int			val;
+-	int			status;
+ 
+-	m = &ts->msg[ts->msg_idx];
+-	t = list_entry(m->transfers.prev, struct spi_transfer, transfer_list);
+-	val = (be16_to_cpu(*(__be16 *)t->rx_buf) >> 3) & 0x0fff;
+-	if (!ts->read_cnt || (abs(ts->last_read - val) > ts->debounce_tol)) {
++	if (!ts->read_cnt || (abs(ts->last_read - *val) > ts->debounce_tol)) {
++		/* Start over collecting consistent readings. */
++		ts->read_rep = 0;
+ 		/* Repeat it, if this was the first read or the read
+ 		 * wasn't consistent enough. */
+ 		if (ts->read_cnt < ts->debounce_max) {
+-			ts->last_read = val;
++			ts->last_read = *val;
+ 			ts->read_cnt++;
++			return ADS7846_FILTER_REPEAT;
+ 		} else {
+ 			/* Maximum number of debouncing reached and still
+ 			 * not enough number of consistent readings. Abort
+ 			 * the whole sample, repeat it in the next sampling
+ 			 * period.
+ 			 */
+-			ts->tc.ignore = 1;
+ 			ts->read_cnt = 0;
+-			/* Last message will contain ads7846_rx() as the
+-			 * completion function.
+-			 */
+-			m = ts->last_msg;
++			return ADS7846_FILTER_IGNORE;
+ 		}
+-		/* Start over collecting consistent readings. */
+-		ts->read_rep = 0;
+ 	} else {
+ 		if (++ts->read_rep > ts->debounce_rep) {
+ 			/* Got a good reading for this coordinate,
+ 			 * go for the next one. */
+-			ts->tc.ignore = 0;
+-			ts->msg_idx++;
+ 			ts->read_cnt = 0;
+ 			ts->read_rep = 0;
+-			m++;
+-		} else
++			return ADS7846_FILTER_OK;
++		} else {
+ 			/* Read more values that are consistent. */
+ 			ts->read_cnt++;
++			return ADS7846_FILTER_REPEAT;
++		}
++	}
++}
++
++static int ads7846_no_filter(void *ads, int data_idx, int *val)
++{
++	return ADS7846_FILTER_OK;
++}
++
++static void ads7846_rx_val(void *ads)
++{
++	struct ads7846 *ts = ads;
++	struct spi_message *m;
++	struct spi_transfer *t;
++	u16 *rx_val;
++	int val;
++	int action;
++	int status;
++
++	m = &ts->msg[ts->msg_idx];
++	t = list_entry(m->transfers.prev, struct spi_transfer, transfer_list);
++	rx_val = t->rx_buf;
++
++	/* adjust:  on-wire is a must-ignore bit, a BE12 value, then padding;
++	 * built from two 8 bit values written msb-first.
++	 */
++	val = be16_to_cpu(*rx_val) >> 3;
++
++	action = ts->filter(ts->filter_data, ts->msg_idx, &val);
++	switch (action) {
++	case ADS7846_FILTER_REPEAT:
++		break;
++	case ADS7846_FILTER_IGNORE:
++		ts->tc.ignore = 1;
++		/* Last message will contain ads7846_rx() as the
++		 * completion function.
++		 */
++		m = ts->last_msg;
++		break;
++	case ADS7846_FILTER_OK:
++		*rx_val = val;
++		ts->tc.ignore = 0;
++		m = &ts->msg[++ts->msg_idx];
++		break;
++	default:
++		BUG();
+ 	}
+ 	status = spi_async(ts->spi, m);
+ 	if (status)
+@@ -504,21 +670,34 @@
+ 				status);
+ }
+ 
+-static void ads7846_timer(unsigned long handle)
++static int ads7846_timer(struct hrtimer *handle)
+ {
+-	struct ads7846	*ts = (void *)handle;
++	struct ads7846	*ts = container_of(handle, struct ads7846, timer);
+ 	int		status = 0;
+ 
+ 	spin_lock_irq(&ts->lock);
+ 
+-	if (unlikely(ts->msg_idx && !ts->pendown)) {
++	if (unlikely(!ts->get_pendown_state() ||
++		     device_suspended(&ts->spi->dev))) {
++		if (ts->pendown) {
++			struct input_dev *input = ts->input;
++
++			input_report_key(input, BTN_TOUCH, 0);
++			input_report_abs(input, ABS_PRESSURE, 0);
++			input_sync(input);
++
++			ts->pendown = 0;
++#ifdef VERBOSE
++			dev_dbg(&ts->spi->dev, "UP\n");
++#endif
++		}
++
+ 		/* measurement cycle ended */
+ 		if (!device_suspended(&ts->spi->dev)) {
+ 			ts->irq_disabled = 0;
+ 			enable_irq(ts->spi->irq);
+ 		}
+ 		ts->pending = 0;
+-		ts->msg_idx = 0;
+ 	} else {
+ 		/* pen is still down, continue with the measurement */
+ 		ts->msg_idx = 0;
+@@ -528,6 +707,7 @@
+ 	}
+ 
+ 	spin_unlock_irq(&ts->lock);
++	return HRTIMER_NORESTART;
+ }
+ 
+ static irqreturn_t ads7846_irq(int irq, void *handle)
+@@ -546,7 +726,8 @@
+ 			ts->irq_disabled = 1;
+ 			disable_irq(ts->spi->irq);
+ 			ts->pending = 1;
+-			mod_timer(&ts->timer, jiffies);
++			hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_DELAY),
++					HRTIMER_REL);
+ 		}
+ 	}
+ 	spin_unlock_irqrestore(&ts->lock, flags);
+@@ -632,6 +813,7 @@
+ 	struct ads7846_platform_data	*pdata = spi->dev.platform_data;
+ 	struct spi_message		*m;
+ 	struct spi_transfer		*x;
++	int				vref;
+ 	int				err;
+ 
+ 	if (!spi->irq) {
+@@ -665,6 +847,10 @@
+ 	 * may not.  So we stick to very-portable 8 bit words, both RX and TX.
+ 	 */
+ 	spi->bits_per_word = 8;
++	spi->mode = SPI_MODE_1;
++	err = spi_setup(spi);
++	if (err < 0)
++		return err;
+ 
+ 	ts = kzalloc(sizeof(struct ads7846), GFP_KERNEL);
+ 	input_dev = input_allocate_device();
+@@ -679,8 +865,7 @@
+ 	ts->spi = spi;
+ 	ts->input = input_dev;
+ 
+-	init_timer(&ts->timer);
+-	ts->timer.data = (unsigned long) ts;
++	hrtimer_init(&ts->timer, CLOCK_MONOTONIC, HRTIMER_REL);
+ 	ts->timer.function = ads7846_timer;
+ 
+ 	spin_lock_init(&ts->lock);
+@@ -689,14 +874,25 @@
+ 	ts->vref_delay_usecs = pdata->vref_delay_usecs ? : 100;
+ 	ts->x_plate_ohms = pdata->x_plate_ohms ? : 400;
+ 	ts->pressure_max = pdata->pressure_max ? : ~0;
+-	if (pdata->debounce_max) {
++
++	if (pdata->filter != NULL) {
++		if (pdata->filter_init != NULL) {
++			err = pdata->filter_init(pdata, &ts->filter_data);
++			if (err < 0)
++				goto err_free_mem;
++		}
++		ts->filter = pdata->filter;
++		ts->filter_cleanup = pdata->filter_cleanup;
++	} else if (pdata->debounce_max) {
+ 		ts->debounce_max = pdata->debounce_max;
++		if (ts->debounce_max < 2)
++			ts->debounce_max = 2;
+ 		ts->debounce_tol = pdata->debounce_tol;
+ 		ts->debounce_rep = pdata->debounce_rep;
+-		if (ts->debounce_rep > ts->debounce_max + 1)
+-			ts->debounce_rep = ts->debounce_max - 1;
++		ts->filter = ads7846_debounce;
++		ts->filter_data = ts;
+ 	} else
+-		ts->debounce_tol = ~0;
++		ts->filter = ads7846_no_filter;
+ 	ts->get_pendown_state = pdata->get_pendown_state;
+ 
+ 	snprintf(ts->phys, sizeof(ts->phys), "%s/input0", spi->dev.bus_id);
+@@ -718,6 +914,8 @@
+ 	input_set_abs_params(input_dev, ABS_PRESSURE,
+ 			pdata->pressure_min, pdata->pressure_max, 0, 0);
+ 
++	vref = pdata->keep_vref_on;
++
+ 	/* set up the transfers to read touchscreen state; this assumes we
+ 	 * use formula #2 for pressure, not #3.
+ 	 */
+@@ -727,7 +925,7 @@
+ 	spi_message_init(m);
+ 
+ 	/* y- still on; turn on only y+ (and ADC) */
+-	ts->read_y = READ_Y;
++	ts->read_y = READ_Y(vref);
+ 	x->tx_buf = &ts->read_y;
+ 	x->len = 1;
+ 	spi_message_add_tail(x, m);
+@@ -737,7 +935,7 @@
+ 	x->len = 2;
+ 	spi_message_add_tail(x, m);
+ 
+-	m->complete = ads7846_debounce;
++	m->complete = ads7846_rx_val;
+ 	m->context = ts;
+ 
+ 	m++;
+@@ -745,7 +943,7 @@
+ 
+ 	/* turn y- off, x+ on, then leave in lowpower */
+ 	x++;
+-	ts->read_x = READ_X;
++	ts->read_x = READ_X(vref);
+ 	x->tx_buf = &ts->read_x;
+ 	x->len = 1;
+ 	spi_message_add_tail(x, m);
+@@ -755,7 +953,7 @@
+ 	x->len = 2;
+ 	spi_message_add_tail(x, m);
+ 
+-	m->complete = ads7846_debounce;
++	m->complete = ads7846_rx_val;
+ 	m->context = ts;
+ 
+ 	/* turn y+ off, x- on; we'll use formula #2 */
+@@ -764,7 +962,7 @@
+ 		spi_message_init(m);
+ 
+ 		x++;
+-		ts->read_z1 = READ_Z1;
++		ts->read_z1 = READ_Z1(vref);
+ 		x->tx_buf = &ts->read_z1;
+ 		x->len = 1;
+ 		spi_message_add_tail(x, m);
+@@ -774,14 +972,14 @@
+ 		x->len = 2;
+ 		spi_message_add_tail(x, m);
+ 
+-		m->complete = ads7846_debounce;
++		m->complete = ads7846_rx_val;
+ 		m->context = ts;
+ 
+ 		m++;
+ 		spi_message_init(m);
+ 
+ 		x++;
+-		ts->read_z2 = READ_Z2;
++		ts->read_z2 = READ_Z2(vref);
+ 		x->tx_buf = &ts->read_z2;
+ 		x->len = 1;
+ 		spi_message_add_tail(x, m);
+@@ -791,7 +989,7 @@
+ 		x->len = 2;
+ 		spi_message_add_tail(x, m);
+ 
+-		m->complete = ads7846_debounce;
++		m->complete = ads7846_rx_val;
+ 		m->context = ts;
+ 	}
+ 
+@@ -820,31 +1018,24 @@
+ 			spi->dev.driver->name, ts)) {
+ 		dev_dbg(&spi->dev, "irq %d busy?\n", spi->irq);
+ 		err = -EBUSY;
+-		goto err_free_mem;
++		goto err_cleanup_filter;
+ 	}
+ 
++	err = ads784x_hwmon_register(spi, ts);
++	if (err)
++		goto err_free_irq;
++
+ 	dev_info(&spi->dev, "touchscreen, irq %d\n", spi->irq);
+ 
+-	/* take a first sample, leaving nPENIRQ active; avoid
++	/* take a first sample, leaving nPENIRQ active and vREF off; avoid
+ 	 * the touchscreen, in case it's not connected.
+ 	 */
+ 	(void) ads7846_read12_ser(&spi->dev,
+ 			  READ_12BIT_SER(vaux) | ADS_PD10_ALL_ON);
+ 
+-	switch (ts->model) {
+-	case 7846:
+-		ts->attr_group = &ads7846_attr_group;
+-		break;
+-	case 7845:
+-		ts->attr_group = &ads7845_attr_group;
+-		break;
+-	default:
+-		ts->attr_group = &ads7843_attr_group;
+-		break;
+-	}
+-	err = sysfs_create_group(&spi->dev.kobj, ts->attr_group);
++	err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group);
+ 	if (err)
+-		goto err_free_irq;
++		goto err_remove_hwmon;
+ 
+ 	err = input_register_device(input_dev);
+ 	if (err)
+@@ -853,9 +1044,14 @@
+ 	return 0;
+ 
+  err_remove_attr_group:
+-	sysfs_remove_group(&spi->dev.kobj, ts->attr_group);
++	sysfs_remove_group(&spi->dev.kobj, &ads784x_attr_group);
++ err_remove_hwmon:
++	ads784x_hwmon_unregister(spi, ts);
+  err_free_irq:
+ 	free_irq(spi->irq, ts);
++ err_cleanup_filter:
++	if (ts->filter_cleanup)
++		ts->filter_cleanup(ts->filter_data);
+  err_free_mem:
+ 	input_free_device(input_dev);
+ 	kfree(ts);
+@@ -866,16 +1062,20 @@
+ {
+ 	struct ads7846		*ts = dev_get_drvdata(&spi->dev);
+ 
++	ads784x_hwmon_unregister(spi, ts);
+ 	input_unregister_device(ts->input);
+ 
+ 	ads7846_suspend(spi, PMSG_SUSPEND);
+ 
+-	sysfs_remove_group(&spi->dev.kobj, ts->attr_group);
++	sysfs_remove_group(&spi->dev.kobj, &ads784x_attr_group);
+ 
+ 	free_irq(ts->spi->irq, ts);
+ 	/* suspend left the IRQ disabled */
+ 	enable_irq(ts->spi->irq);
+ 
++	if (ts->filter_cleanup)
++		ts->filter_cleanup(ts->filter_data);
++
+ 	kfree(ts);
+ 
+ 	dev_dbg(&spi->dev, "unregistered touchscreen\n");
+diff -urN linux-2.6.20.4-0rig/drivers/leds/Kconfig linux-2.6.20.4-atmel/drivers/leds/Kconfig
+--- linux-2.6.20.4-0rig/drivers/leds/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/leds/Kconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -76,6 +76,13 @@
+ 	  This option enables support for the Soekris net4801 and net4826 error
+ 	  LED.
+ 
++config LEDS_AT91
++	tristate "LED support using AT91 GPIOs"
++	depends on LEDS_CLASS && ARCH_AT91 && !LEDS
++	help
++	  This option enables support for LEDs connected to GPIO lines
++	  on AT91-based boards.
++
+ config LEDS_WRAP
+ 	tristate "LED Support for the WRAP series LEDs"
+ 	depends on LEDS_CLASS && SCx200_GPIO
+diff -urN linux-2.6.20.4-0rig/drivers/leds/leds-at91.c linux-2.6.20.4-atmel/drivers/leds/leds-at91.c
+--- linux-2.6.20.4-0rig/drivers/leds/leds-at91.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/leds/leds-at91.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,140 @@
++/*
++ * AT91 GPIO based LED driver
++ *
++ * Copyright (C) 2006 David Brownell
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++static LIST_HEAD(at91_led_list);	/* list of AT91 LEDs */
++
++struct at91_led {
++	struct led_classdev	cdev;
++	struct list_head	list;
++	struct at91_gpio_led	*led_data;
++};
++
++/*
++ * Change the state of the LED.
++ */
++static void at91_led_set(struct led_classdev *cdev, enum led_brightness value)
++{
++	struct at91_led	*led = container_of(cdev, struct at91_led, cdev);
++	short		active = (value == LED_OFF);
++
++	if (led->led_data->flags & 1)	/* active high/low? */
++		active = !active;
++	at91_set_gpio_value(led->led_data->gpio, value == LED_OFF);
++}
++
++static int __devexit at91_led_remove(struct platform_device *pdev)
++{
++	struct at91_led		*led;
++
++	list_for_each_entry (led, &at91_led_list, list)
++		led_classdev_unregister(&led->cdev);
++
++#warning "Free allocated memory"
++	// TODO: Free memory.	kfree(led);
++
++	return 0;
++}
++
++static int __init at91_led_probe(struct platform_device *pdev)
++{
++	int			status = 0;
++	struct at91_gpio_led	*pdata = pdev->dev.platform_data;
++	unsigned		nr_leds;
++	struct at91_led		*led;
++
++	if (!pdata)
++		return -ENODEV;
++
++	nr_leds = pdata->index;		/* first index stores number of LEDs */
++
++	while (nr_leds--) {
++		led = kzalloc(sizeof(struct at91_led), GFP_KERNEL);
++		if (!led) {
++			dev_err(&pdev->dev, "No memory for device\n");
++			status = -ENOMEM;
++			goto cleanup;
++		}
++		led->led_data = pdata;
++		led->cdev.name = pdata->name;
++		led->cdev.brightness_set = at91_led_set,
++		led->cdev.default_trigger = pdata->trigger;
++
++		status = led_classdev_register(&pdev->dev, &led->cdev);
++		if (status < 0) {
++			dev_err(&pdev->dev, "led_classdev_register failed - %d\n", status);
++cleanup:
++			at91_led_remove(pdev);
++			break;
++		}
++		list_add(&led->list, &at91_led_list);
++		pdata++;
++	}
++	return status;
++}
++
++#ifdef CONFIG_PM
++static int at91_led_suspend(struct platform_device *dev, pm_message_t state)
++{
++	struct at91_led	*led;
++
++	list_for_each_entry (led, &at91_led_list, list)
++		led_classdev_suspend(&led->cdev);
++
++	return 0;
++}
++
++static int at91_led_resume(struct platform_device *dev)
++{
++	struct at91_led	*led;
++
++	list_for_each_entry (led, &at91_led_list, list)
++		led_classdev_resume(&led->cdev);
++
++	return 0;
++}
++#else
++#define	at91_led_suspend	NULL
++#define	at91_led_resume		NULL
++#endif
++
++static struct platform_driver at91_led_driver = {
++	.probe		= at91_led_probe,
++	.remove		= __devexit_p(at91_led_remove),
++	.suspend	= at91_led_suspend,
++	.resume		= at91_led_resume,
++	.driver		= {
++		.name	= "at91_leds",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at91_led_init(void)
++{
++	return platform_driver_register(&at91_led_driver);
++}
++module_init(at91_led_init);
++
++static void __exit at91_led_exit(void)
++{
++	platform_driver_unregister(&at91_led_driver);
++}
++module_exit(at91_led_exit);
++
++MODULE_DESCRIPTION("AT91 GPIO LED driver");
++MODULE_AUTHOR("David Brownell");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/leds/Makefile linux-2.6.20.4-atmel/drivers/leds/Makefile
+--- linux-2.6.20.4-0rig/drivers/leds/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/leds/Makefile	2007-03-24 16:39:15.000000000 +0100
+@@ -14,6 +14,7 @@
+ obj-$(CONFIG_LEDS_AMS_DELTA)		+= leds-ams-delta.o
+ obj-$(CONFIG_LEDS_NET48XX)		+= leds-net48xx.o
+ obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
++obj-$(CONFIG_LEDS_AT91)			+= leds-at91.o
+ 
+ # LED Triggers
+ obj-$(CONFIG_LEDS_TRIGGER_TIMER)	+= ledtrig-timer.o
+diff -urN linux-2.6.20.4-0rig/drivers/mmc/at91_mci.c linux-2.6.20.4-atmel/drivers/mmc/at91_mci.c
+--- linux-2.6.20.4-0rig/drivers/mmc/at91_mci.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mmc/at91_mci.c	2007-03-24 16:39:15.000000000 +0100
+@@ -64,6 +64,7 @@
+ #include <linux/err.h>
+ #include <linux/dma-mapping.h>
+ #include <linux/clk.h>
++#include <linux/atmel_pdc.h>
+ 
+ #include <linux/mmc/host.h>
+ #include <linux/mmc/protocol.h>
+@@ -75,7 +76,7 @@
+ #include <asm/arch/cpu.h>
+ #include <asm/arch/gpio.h>
+ #include <asm/arch/at91_mci.h>
+-#include <asm/arch/at91_pdc.h>
++
+ 
+ #define DRIVER_NAME "at91_mci"
+ 
+@@ -85,8 +86,8 @@
+ #define FL_SENT_STOP	(1 << 1)
+ 
+ #define AT91_MCI_ERRORS	(AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE	\
+-		| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE		\
+-		| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)			
++			| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE	\
++			| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
+ 
+ #define at91_mci_read(host, reg)	__raw_readl((host)->baseaddr + (reg))
+ #define at91_mci_write(host, reg, val)	__raw_writel((val), (host)->baseaddr + (reg))
+@@ -211,13 +212,13 @@
+ 
+ 		/* Check to see if this needs filling */
+ 		if (i == 0) {
+-			if (at91_mci_read(host, AT91_PDC_RCR) != 0) {
++			if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
+ 				pr_debug("Transfer active in current\n");
+ 				continue;
+ 			}
+ 		}
+ 		else {
+-			if (at91_mci_read(host, AT91_PDC_RNCR) != 0) {
++			if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
+ 				pr_debug("Transfer active in next\n");
+ 				continue;
+ 			}
+@@ -234,12 +235,12 @@
+ 		pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
+ 
+ 		if (i == 0) {
+-			at91_mci_write(host, AT91_PDC_RPR, sg->dma_address);
+-			at91_mci_write(host, AT91_PDC_RCR, sg->length / 4);
++			at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
++			at91_mci_write(host, ATMEL_PDC_RCR, sg->length / 4);
+ 		}
+ 		else {
+-			at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address);
+-			at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4);
++			at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
++			at91_mci_write(host, ATMEL_PDC_RNCR, sg->length / 4);
+ 		}
+ 	}
+ 
+@@ -303,37 +304,12 @@
+ 		at91mci_pre_dma_read(host);
+ 	else {
+ 		at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
+-		at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
++		at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
+ 	}
+ 
+ 	pr_debug("post dma read done\n");
+ }
+ 
+-/*
+- * Handle transmitted data
+- */
+-static void at91_mci_handle_transmitted(struct at91mci_host *host)
+-{
+-	struct mmc_command *cmd;
+-	struct mmc_data *data;
+-
+-	pr_debug("Handling the transmit\n");
+-
+-	/* Disable the transfer */
+-	at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
+-
+-	/* Now wait for cmd ready */
+-	at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
+-	at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
+-
+-	cmd = host->cmd;
+-	if (!cmd) return;
+-
+-	data = cmd->data;
+-	if (!data) return;
+-
+-	data->bytes_xfered = host->total_length;
+-}
+ 
+ /*
+  * Enable the controller
+@@ -431,15 +407,15 @@
+ 		cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
+ 
+ 	if (!data) {
+-		at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS);
+-		at91_mci_write(host, AT91_PDC_RPR, 0);
+-		at91_mci_write(host, AT91_PDC_RCR, 0);
+-		at91_mci_write(host, AT91_PDC_RNPR, 0);
+-		at91_mci_write(host, AT91_PDC_RNCR, 0);
+-		at91_mci_write(host, AT91_PDC_TPR, 0);
+-		at91_mci_write(host, AT91_PDC_TCR, 0);
+-		at91_mci_write(host, AT91_PDC_TNPR, 0);
+-		at91_mci_write(host, AT91_PDC_TNCR, 0);
++		at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
++		at91_mci_write(host, ATMEL_PDC_RPR, 0);
++		at91_mci_write(host, ATMEL_PDC_RCR, 0);
++		at91_mci_write(host, ATMEL_PDC_RNPR, 0);
++		at91_mci_write(host, ATMEL_PDC_RNCR, 0);
++		at91_mci_write(host, ATMEL_PDC_TPR, 0);
++		at91_mci_write(host, ATMEL_PDC_TCR, 0);
++		at91_mci_write(host, ATMEL_PDC_TNPR, 0);
++		at91_mci_write(host, ATMEL_PDC_TNCR, 0);
+ 
+ 		at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
+ 		at91_mci_write(host, AT91_MCI_CMDR, cmdr);
+@@ -452,7 +428,7 @@
+ 	/*
+ 	 * Disable the PDC controller
+ 	 */
+-	at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
++	at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
+ 
+ 	if (cmdr & AT91_MCI_TRCMD_START) {
+ 		data->bytes_xfered = 0;
+@@ -474,15 +450,15 @@
+ 			 */
+ 			host->total_length = block_length * blocks;
+ 			host->buffer = dma_alloc_coherent(NULL,
+-						  host->total_length,
+-						  &host->physical_address, GFP_KERNEL);
++						host->total_length,
++						&host->physical_address, GFP_KERNEL);
+ 
+ 			at91mci_sg_to_dma(host, data);
+ 
+ 			pr_debug("Transmitting %d bytes\n", host->total_length);
+ 
+-			at91_mci_write(host, AT91_PDC_TPR, host->physical_address);
+-			at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4);
++			at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
++			at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
+ 			ier = AT91_MCI_TXBUFE;
+ 		}
+ 	}
+@@ -497,9 +473,9 @@
+ 
+ 	if (cmdr & AT91_MCI_TRCMD_START) {
+ 		if (cmdr & AT91_MCI_TRDIR)
+-			at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN);
++			at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
+ 		else
+-			at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN);
++			at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
+ 	}
+ 	return ier;
+ }
+@@ -561,9 +537,7 @@
+ 	pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
+ 		 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
+ 
+-	if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE |
+-			AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE |
+-			AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) {
++	if (status & AT91_MCI_ERRORS) {
+ 		if ((status & AT91_MCI_RCRCE) &&
+ 			((cmd->opcode == MMC_SEND_OP_COND) || (cmd->opcode == SD_APP_OP_COND))) {
+ 			cmd->error = MMC_ERR_NONE;
+@@ -601,6 +575,32 @@
+ }
+ 
+ /*
++ * Handle transmitted data
++ */
++static void at91_mci_handle_transmitted(struct at91mci_host *host)
++{
++	struct mmc_command *cmd;
++	struct mmc_data *data;
++
++	pr_debug("Handling the transmit\n");
++
++	/* Disable the transfer */
++	at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
++
++	/* Now wait for cmd ready */
++	at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
++	at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
++
++	cmd = host->cmd;
++	if (!cmd) return;
++
++	data = cmd->data;
++	if (!data) return;
++
++	data->bytes_xfered = host->total_length;
++}
++
++/*
+  * Set the IOS
+  */
+ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+@@ -665,15 +665,15 @@
+ 
+ 	int_status = at91_mci_read(host, AT91_MCI_SR);
+ 	int_mask = at91_mci_read(host, AT91_MCI_IMR);
+-	
++
+ 	pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
+ 		int_status & int_mask);
+-	
++
+ 	int_status = int_status & int_mask;
+ 
+ 	if (int_status & AT91_MCI_ERRORS) {
+ 		completed = 1;
+-		
++
+ 		if (int_status & AT91_MCI_UNRE)
+ 			pr_debug("MMC: Underrun error\n");
+ 		if (int_status & AT91_MCI_OVRE)
+@@ -821,7 +821,7 @@
+ 	mmc->f_min = 375000;
+ 	mmc->f_max = 25000000;
+ 	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+-	mmc->caps = MMC_CAP_BYTEBLOCK;
++	mmc->caps = MMC_CAP_BYTEBLOCK | MMC_CAP_MULTIWRITE;
+ 
+ 	host = mmc_priv(mmc);
+ 	host->mmc = mmc;
+@@ -853,15 +853,15 @@
+ 	host->baseaddr = ioremap(res->start, res->end - res->start + 1);
+ 	if (!host->baseaddr) {
+ 		clk_put(host->mci_clk);
+-		mmc_free_host(mmc);
+ 		release_mem_region(res->start, res->end - res->start + 1);
++		mmc_free_host(mmc);
+ 		return -ENOMEM;
+ 	}
+ 
+ 	/*
+ 	 * Reset hardware
+ 	 */
+-	clk_enable(host->mci_clk);		/* Enable the peripheral clock */
++	clk_enable(host->mci_clk);	/* Enable the peripheral clock */
+ 	at91_mci_disable(host);
+ 	at91_mci_enable(host);
+ 
+@@ -874,9 +874,9 @@
+ 		printk(KERN_ERR "AT91 MMC: Failed to request MCI interrupt\n");
+ 		clk_disable(host->mci_clk);
+ 		clk_put(host->mci_clk);
+-		mmc_free_host(mmc);
+ 		iounmap(host->baseaddr);
+ 		release_mem_region(res->start, res->end - res->start + 1);
++		mmc_free_host(mmc);
+ 		return ret;
+ 	}
+ 
+@@ -930,13 +930,13 @@
+ 	mmc_remove_host(mmc);
+ 	free_irq(host->irq, host);
+ 
+-	clk_disable(host->mci_clk);			/* Disable the peripheral clock */
+-	clk_put(host->mci_clk);
+-
+ 	iounmap(host->baseaddr);
+ 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ 	release_mem_region(res->start, res->end - res->start + 1);
+ 
++	clk_disable(host->mci_clk);			/* Disable the peripheral clock */
++	clk_put(host->mci_clk);
++
+ 	mmc_free_host(mmc);
+ 	platform_set_drvdata(pdev, NULL);
+ 	pr_debug("MCI Removed\n");
+diff -urN linux-2.6.20.4-0rig/drivers/mmc/atmel-mci.c linux-2.6.20.4-atmel/drivers/mmc/atmel-mci.c
+--- linux-2.6.20.4-0rig/drivers/mmc/atmel-mci.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mmc/atmel-mci.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,1218 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++#include <linux/mmc/protocol.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_CMD_ERROR_FLAGS	(MCI_BIT(RINDE)	| MCI_BIT(RDIRE) |	\
++				 MCI_BIT(RCRCE) | MCI_BIT(RENDE) |	\
++				 MCI_BIT(RTOE))
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_CMD_ERROR,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_STOP_ERROR,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			stop_cmdr;
++	u32			stop_iflags;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++	u32			error_status;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_cmd_error_is_complete(host)			\
++	test_bit(EVENT_CMD_ERROR, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_stop_error_is_complete(host)		\
++	test_bit(EVENT_STOP_ERROR, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_cmd_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_stop_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_cmd_error_is_completed(host)		\
++	test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_stop_error_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_cmd_error_complete(host)		\
++	set_bit(EVENT_CMD_ERROR, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_stop_error_complete(host)		\
++	set_bit(EVENT_STOP_ERROR, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_cmd_error_pending(host)			\
++	set_bit(EVENT_CMD_ERROR, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_stop_error_pending(host)		\
++	set_bit(EVENT_STOP_ERROR, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_cmd_error_pending(host)		\
++	clear_bit(EVENT_CMD_ERROR, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_stop_error_pending(host)		\
++	clear_bit(EVENT_STOP_ERROR, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	pr_debug("%s: setting timeout to %u cycles\n",
++		 mmc_hostname(host->mmc),
++		 dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with interrupt flags to be handled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd,
++				 u32 *cmd_flags)
++{
++	u32 cmdr;
++	u32 iflags;
++
++	cmd->error = MMC_ERR_NONE;
++
++	cmdr = 0;
++	BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0);
++	cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS;
++	if (!(cmd->flags & MMC_RSP_CRC))
++		iflags &= ~MCI_BIT(RCRCE);
++
++	pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		 mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags,
++		 (unsigned long)cmdr);
++
++	*cmd_flags = cmdr;
++	return iflags;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags);
++
++	if (mrq->stop) {
++		BUG_ON(!data);
++
++		host->stop_iflags = atmci_prepare_command(mmc, mrq->stop,
++							  &host->stop_cmdr);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255)
++			clkdiv = 255;
++		mci_writel(host, MR, (clkdiv
++				      | MCI_BIT(WRPROOF)
++				      | MCI_BIT(RDPROOF)));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_OFF:
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		break;
++	case MMC_POWER_UP:
++		mci_writel(host, CR, MCI_BIT(SWRST));
++		break;
++	case MMC_POWER_ON:
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		pr_debug("%s: card is %s\n", mmc_hostname(mmc),
++			 read_only ? "read-only" : "read-write");
++	} else {
++		pr_debug("%s: no pin for checking read-only switch."
++			 " Assuming write-enable.\n", mmc_hostname(mmc));
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, host->stop_iflags);
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_error(struct mmc_host *mmc,
++				struct mmc_command *cmd,
++				u32 status)
++{
++	pr_debug("%s: command error: status=0x%08x\n",
++		 mmc_hostname(mmc), status);
++
++	if (status & MCI_BIT(RTOE))
++		cmd->error = MMC_ERR_TIMEOUT;
++	else if (status & MCI_BIT(RCRCE))
++		cmd->error = MMC_ERR_BADCRC;
++	else
++		cmd->error = MMC_ERR_FAILED;
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_error_is_pending(host)) {
++		struct mmc_command *cmd;
++
++		mci_set_cmd_error_complete(host);
++		mci_clear_cmd_pending(host);
++		cmd = host->mrq->cmd;
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					 host->dma.req.req.channel);
++			host->data = NULL;
++		}
++
++		atmci_command_error(mmc, cmd, host->error_status);
++		atmci_request_end(mmc, cmd->mrq);
++	}
++	if (mci_clear_stop_error_is_pending(host)) {
++		mci_set_stop_error_complete(host);
++		mci_clear_stop_pending(host);
++		atmci_command_error(mmc, host->mrq->stop,
++				    host->error_status);
++		if (!host->data)
++			atmci_request_end(mmc, host->mrq);
++	}
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		if (!mrq->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = MMC_ERR_INVALID;
++
++		printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n",
++		       mmc_hostname(mmc), host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->error_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		printk(KERN_DEBUG "%s: data error: status=0x%08x\n",
++		       mmc_hostname(host->mmc), status);
++
++		if (status & MCI_BIT(DCRCE)) {
++			printk(KERN_DEBUG "%s: Data CRC error\n",
++			       mmc_hostname(host->mmc));
++			data->error = MMC_ERR_BADCRC;
++		} else if (status & MCI_BIT(DTOE)) {
++			printk(KERN_DEBUG "%s: Data Timeout error\n",
++			       mmc_hostname(host->mmc));
++			data->error = MMC_ERR_TIMEOUT;
++		} else {
++			printk(KERN_DEBUG "%s: Data FIFO error\n",
++			       mmc_hostname(host->mmc));
++			data->error = MMC_ERR_FIFO;
++		}
++		printk(KERN_DEBUG "%s: Bytes xfered: %u\n",
++		       mmc_hostname(host->mmc), data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host)
++			    && !mci_cmd_error_is_complete(host)) {
++				mrq->cmd->error = MMC_ERR_TIMEOUT;
++			}
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = MMC_ERR_TIMEOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host)
++			    && !mci_stop_error_is_complete(host)) {
++				mrq->stop->error = MMC_ERR_TIMEOUT;
++			}
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS);
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host))
++		mci_set_stop_pending(host);
++	else
++		mci_set_cmd_pending(host);
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	if (data->stop && !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	if (data->flags & MMC_DATA_READ) {
++		mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS);
++		mci_set_data_pending(host);
++		tasklet_schedule(&host->tasklet);
++	} else {
++		/*
++		 * For the WRITE case, wait for NOTBUSY. This function
++		 * is called when everything has been written to the
++		 * controller, not when the card is done programming.
++		 */
++		mci_writel(host, IER, MCI_BIT(NOTBUSY));
++	}
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_CMD_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(CMDRDY)
++					       | MCI_BIT(NOTBUSY)
++					       | MCI_CMD_ERROR_FLAGS
++					       | MCI_DATA_ERROR_FLAGS));
++			host->error_status = status;
++			host->cmd = NULL;
++			if (mci_stop_sent_is_complete(host))
++				mci_set_stop_error_pending(host);
++			else
++				mci_set_cmd_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->error_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
++			 present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= 0x00100000;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			printk(KERN_WARNING "%s: no detect pin available\n",
++			       mmc_hostname(host->mmc));
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			printk(KERN_WARNING "%s: no WP pin available\n",
++			       mmc_hostname(host->mmc));
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		printk(KERN_ERR
++		       "mmci: No DMA controller available, aborting\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		printk(KERN_ERR
++		       "mmci: Unable to allocate DMA channel, aborting\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++	mci_writel(host, CR, MCI_BIT(MCIEN));
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			printk(KERN_ERR
++			       "%s: could not request IRQ %d for detect pin\n",
++			       mmc_hostname(mmc),
++			       gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n",
++	       mmc_hostname(mmc), host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/mmc/atmel-mci.h linux-2.6.20.4-atmel/drivers/mmc/atmel-mci.h
+--- linux-2.6.20.4-0rig/drivers/mmc/atmel-mci.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mmc/atmel-mci.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff -urN linux-2.6.20.4-0rig/drivers/mmc/Kconfig linux-2.6.20.4-atmel/drivers/mmc/Kconfig
+--- linux-2.6.20.4-0rig/drivers/mmc/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mmc/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -71,6 +71,16 @@
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_WBSD
+ 	tristate "Winbond W83L51xD SD/MMC Card Interface support"
+ 	depends on MMC && ISA_DMA_API
+diff -urN linux-2.6.20.4-0rig/drivers/mmc/Makefile linux-2.6.20.4-atmel/drivers/mmc/Makefile
+--- linux-2.6.20.4-0rig/drivers/mmc/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mmc/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -23,6 +23,7 @@
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ 
+ mmc_core-y := mmc.o mmc_sysfs.o
+diff -urN linux-2.6.20.4-0rig/drivers/mtd/chips/cfi_cmdset_0001.c linux-2.6.20.4-atmel/drivers/mtd/chips/cfi_cmdset_0001.c
+--- linux-2.6.20.4-0rig/drivers/mtd/chips/cfi_cmdset_0001.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mtd/chips/cfi_cmdset_0001.c	2007-03-24 16:42:29.000000000 +0100
+@@ -47,6 +47,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -153,6 +154,47 @@
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -221,6 +263,7 @@
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff -urN linux-2.6.20.4-0rig/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.6.20.4-atmel/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.20.4-0rig/drivers/mtd/chips/cfi_cmdset_0002.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mtd/chips/cfi_cmdset_0002.c	2007-03-24 16:42:29.000000000 +0100
+@@ -185,6 +185,10 @@
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff -urN linux-2.6.20.4-0rig/drivers/mtd/devices/at91_dataflash.c linux-2.6.20.4-atmel/drivers/mtd/devices/at91_dataflash.c
+--- linux-2.6.20.4-0rig/drivers/mtd/devices/at91_dataflash.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mtd/devices/at91_dataflash.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,640 @@
++/*
++ * Atmel DataFlash driver for Atmel AT91RM9200 (Thunder)
++ *
++ *  Copyright (C) SAN People (Pty) Ltd
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/pci.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/arch/spi.h>
++
++#undef DEBUG_DATAFLASH
++
++#define DATAFLASH_MAX_DEVICES	4	/* max number of dataflash devices */
++#undef	DATAFLASH_ALWAYS_ADD_DEVICE	/* always add whole device when using partitions? */
++
++#define OP_READ_CONTINUOUS	0xE8
++#define OP_READ_PAGE		0xD2
++#define OP_READ_BUFFER1		0xD4
++#define OP_READ_BUFFER2		0xD6
++#define OP_READ_STATUS		0xD7
++
++#define OP_ERASE_PAGE		0x81
++#define OP_ERASE_BLOCK		0x50
++
++#define OP_TRANSFER_BUF1	0x53
++#define OP_TRANSFER_BUF2	0x55
++#define OP_COMPARE_BUF1		0x60
++#define OP_COMPARE_BUF2		0x61
++
++#define OP_PROGRAM_VIA_BUF1	0x82
++#define OP_PROGRAM_VIA_BUF2	0x85
++
++struct dataflash_local
++{
++	int spi;			/* SPI chip-select number */
++
++	unsigned int page_size;		/* number of bytes per page */
++	unsigned short page_offset;	/* page offset in flash address */
++};
++
++
++/* Detected DataFlash devices */
++static struct mtd_info* mtd_devices[DATAFLASH_MAX_DEVICES];
++static int nr_devices = 0;
++
++/* ......................................................................... */
++
++#ifdef CONFIG_MTD_PARTITIONS
++
++static struct mtd_partition static_partitions_2M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 1 * 32 * 8 * 528,	/* 1st sector = 32 blocks * 8 pages * 528 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 6 * 32 * 8 * 528,	/* 6 sectors */
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,	/* rest = 9 sectors */
++	}
++};
++
++static struct mtd_partition static_partitions_4M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 1 * 64 * 8 * 528,	/* 1st sector = 64 blocks * 8 pages * 528 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 4 * 64 * 8 * 528,	/* 4 sectors */
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,	/* rest = 11 sectors */
++	}
++};
++
++#if defined(CONFIG_MACH_KAFA)
++static struct mtd_partition static_partitions_8M[] =
++{
++	{
++		name:		"romboot",
++		offset:		0,
++		size:		16 * 1056,	/* 160 Kb */
++		mask_flags:	MTD_WRITEABLE,		/* read-only */
++	},
++	{
++		name:		"uboot",
++		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
++		size:		128 * 1056,		/* 1 MB */
++	},
++	{
++		name:		"kernel",
++		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
++		size:		1024 * 1056,		/* 1 MB */
++	},
++	{
++		name:		"filesystem",
++		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
++		size:		MTDPART_SIZ_FULL,
++	}
++};
++
++#else
++
++static struct mtd_partition static_partitions_8M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 1 * 32 * 8 * 1056,	/* 1st sector = 32 blocks * 8 pages * 1056 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 5 * 32 * 8 * 1056,	/* 5 sectors */
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,	/* rest = 26 sectors */
++	}
++};
++#endif
++
++static const char *part_probes[] = { "cmdlinepart", NULL, };
++
++#endif
++
++/* ......................................................................... */
++
++/* Allocate a single SPI transfer descriptor.  We're assuming that if multiple
++   SPI transfers occur at the same time, spi_access_bus() will serialize them.
++   If this is not valid, then either (i) each dataflash 'priv' structure
++   needs it's own transfer descriptor, (ii) we lock this one, or (iii) use
++   another mechanism.   */
++static struct spi_transfer_list* spi_transfer_desc;
++
++/*
++ * Perform a SPI transfer to access the DataFlash device.
++ */
++static int do_spi_transfer(int nr, char* tx, int tx_len, char* rx, int rx_len,
++		char* txnext, int txnext_len, char* rxnext, int rxnext_len)
++{
++	struct spi_transfer_list* list = spi_transfer_desc;
++
++	list->tx[0] = tx;	list->txlen[0] = tx_len;
++	list->rx[0] = rx;	list->rxlen[0] = rx_len;
++
++	list->tx[1] = txnext;	list->txlen[1] = txnext_len;
++	list->rx[1] = rxnext;	list->rxlen[1] = rxnext_len;
++
++	list->nr_transfers = nr;
++
++	return spi_transfer(list);
++}
++
++/* ......................................................................... */
++
++/*
++ * Poll the DataFlash device until it is READY.
++ */
++static void at91_dataflash_waitready(void)
++{
++	char* command = kmalloc(2, GFP_KERNEL);
++
++	if (!command)
++		return;
++
++	do {
++		command[0] = OP_READ_STATUS;
++		command[1] = 0;
++
++		do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
++	} while ((command[1] & 0x80) == 0);
++
++	kfree(command);
++}
++
++/*
++ * Return the status of the DataFlash device.
++ */
++static unsigned short at91_dataflash_status(void)
++{
++	unsigned short status;
++	char* command = kmalloc(2, GFP_KERNEL);
++
++	if (!command)
++		return 0;
++
++	command[0] = OP_READ_STATUS;
++	command[1] = 0;
++
++	do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
++	status = command[1];
++
++	kfree(command);
++	return status;
++}
++
++/* ......................................................................... */
++
++/*
++ * Erase blocks of flash.
++ */
++static int at91_dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
++{
++	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
++	unsigned int pageaddr;
++	char* command;
++
++#ifdef DEBUG_DATAFLASH
++	printk("dataflash_erase: addr=%i len=%i\n", instr->addr, instr->len);
++#endif
++
++	/* Sanity checks */
++	if (instr->addr + instr->len > mtd->size)
++		return -EINVAL;
++	if ((instr->len % mtd->erasesize != 0) || (instr->len % priv->page_size != 0))
++		return -EINVAL;
++	if ((instr->addr % priv->page_size) != 0)
++		return -EINVAL;
++
++	command = kmalloc(4, GFP_KERNEL);
++	if (!command)
++		return -ENOMEM;
++
++	while (instr->len > 0) {
++		/* Calculate flash page address */
++		pageaddr = (instr->addr / priv->page_size) << priv->page_offset;
++
++		command[0] = OP_ERASE_PAGE;
++		command[1] = (pageaddr & 0x00FF0000) >> 16;
++		command[2] = (pageaddr & 0x0000FF00) >> 8;
++		command[3] = 0;
++#ifdef DEBUG_DATAFLASH
++		printk("ERASE: (%x) %x %x %x [%i]\n", command[0], command[1], command[2], command[3], pageaddr);
++#endif
++
++		/* Send command to SPI device */
++		spi_access_bus(priv->spi);
++		do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
++
++		at91_dataflash_waitready();		/* poll status until ready */
++		spi_release_bus(priv->spi);
++
++		instr->addr += priv->page_size;		/* next page */
++		instr->len -= priv->page_size;
++	}
++
++	kfree(command);
++
++	/* Inform MTD subsystem that erase is complete */
++	instr->state = MTD_ERASE_DONE;
++	if (instr->callback)
++		instr->callback(instr);
++
++	return 0;
++}
++
++/*
++ * Read from the DataFlash device.
++ *   from   : Start offset in flash device
++ *   len    : Amount to read
++ *   retlen : About of data actually read
++ *   buf    : Buffer containing the data
++ */
++static int at91_dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
++{
++	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
++	unsigned int addr;
++	char* command;
++
++#ifdef DEBUG_DATAFLASH
++	printk("dataflash_read: %lli .. %lli\n", from, from+len);
++#endif
++
++	*retlen = 0;
++
++	/* Sanity checks */
++	if (!len)
++		return 0;
++	if (from + len > mtd->size)
++		return -EINVAL;
++
++	/* Calculate flash page/byte address */
++	addr = (((unsigned)from / priv->page_size) << priv->page_offset) + ((unsigned)from % priv->page_size);
++
++	command = kmalloc(8, GFP_KERNEL);
++	if (!command)
++		return -ENOMEM;
++
++	command[0] = OP_READ_CONTINUOUS;
++	command[1] = (addr & 0x00FF0000) >> 16;
++	command[2] = (addr & 0x0000FF00) >> 8;
++	command[3] = (addr & 0x000000FF);
++#ifdef DEBUG_DATAFLASH
++	printk("READ: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++
++	/* Send command to SPI device */
++	spi_access_bus(priv->spi);
++	do_spi_transfer(2, command, 8, command, 8, buf, len, buf, len);
++	spi_release_bus(priv->spi);
++
++	*retlen = len;
++	kfree(command);
++	return 0;
++}
++
++/*
++ * Write to the DataFlash device.
++ *   to     : Start offset in flash device
++ *   len    : Amount to write
++ *   retlen : Amount of data actually written
++ *   buf    : Buffer containing the data
++ */
++static int at91_dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
++{
++	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
++	unsigned int pageaddr, addr, offset, writelen;
++	size_t remaining;
++	u_char *writebuf;
++	unsigned short status;
++	int res = 0;
++	char* command;
++	char* tmpbuf = NULL;
++
++#ifdef DEBUG_DATAFLASH
++	printk("dataflash_write: %lli .. %lli\n", to, to+len);
++#endif
++
++	*retlen = 0;
++
++	/* Sanity checks */
++	if (!len)
++		return 0;
++	if (to + len > mtd->size)
++		return -EINVAL;
++
++	command = kmalloc(4, GFP_KERNEL);
++	if (!command)
++		return -ENOMEM;
++
++	pageaddr = ((unsigned)to / priv->page_size);
++	offset = ((unsigned)to % priv->page_size);
++	if (offset + len > priv->page_size)
++		writelen = priv->page_size - offset;
++	else
++		writelen = len;
++	writebuf = (u_char *)buf;
++	remaining = len;
++
++	/* Allocate temporary buffer */
++	tmpbuf = kmalloc(priv->page_size, GFP_KERNEL);
++	if (!tmpbuf) {
++		kfree(command);
++		return -ENOMEM;
++	}
++
++	/* Gain access to the SPI bus */
++	spi_access_bus(priv->spi);
++
++	while (remaining > 0) {
++#ifdef DEBUG_DATAFLASH
++		printk("write @ %i:%i len=%i\n", pageaddr, offset, writelen);
++#endif
++
++		/* (1) Transfer to Buffer1 */
++		if (writelen != priv->page_size) {
++			addr = pageaddr << priv->page_offset;
++			command[0] = OP_TRANSFER_BUF1;
++			command[1] = (addr & 0x00FF0000) >> 16;
++			command[2] = (addr & 0x0000FF00) >> 8;
++			command[3] = 0;
++#ifdef DEBUG_DATAFLASH
++			printk("TRANSFER: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++			do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
++			at91_dataflash_waitready();
++		}
++
++		/* (2) Program via Buffer1 */
++		addr = (pageaddr << priv->page_offset) + offset;
++		command[0] = OP_PROGRAM_VIA_BUF1;
++		command[1] = (addr & 0x00FF0000) >> 16;
++		command[2] = (addr & 0x0000FF00) >> 8;
++		command[3] = (addr & 0x000000FF);
++#ifdef DEBUG_DATAFLASH
++		printk("PROGRAM: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++		do_spi_transfer(2, command, 4, command, 4, writebuf, writelen, tmpbuf, writelen);
++		at91_dataflash_waitready();
++
++		/* (3) Compare to Buffer1 */
++		addr = pageaddr << priv->page_offset;
++		command[0] = OP_COMPARE_BUF1;
++		command[1] = (addr & 0x00FF0000) >> 16;
++		command[2] = (addr & 0x0000FF00) >> 8;
++		command[3] = 0;
++#ifdef DEBUG_DATAFLASH
++		printk("COMPARE: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++		do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
++		at91_dataflash_waitready();
++
++		/* Get result of the compare operation */
++		status = at91_dataflash_status();
++		if ((status & 0x40) == 1) {
++			printk("at91_dataflash: Write error on page %i\n", pageaddr);
++			remaining = 0;
++			res = -EIO;
++		}
++
++		remaining = remaining - writelen;
++		pageaddr++;
++		offset = 0;
++		writebuf += writelen;
++		*retlen += writelen;
++
++		if (remaining > priv->page_size)
++			writelen = priv->page_size;
++		else
++			writelen = remaining;
++	}
++
++	/* Release SPI bus */
++	spi_release_bus(priv->spi);
++
++	kfree(tmpbuf);
++	kfree(command);
++	return res;
++}
++
++/* ......................................................................... */
++
++/*
++ * Initialize and register DataFlash device with MTD subsystem.
++ */
++static int __init add_dataflash(int channel, char *name, int IDsize,
++		int nr_pages, int pagesize, int pageoffset)
++{
++	struct mtd_info *device;
++	struct dataflash_local *priv;
++#ifdef CONFIG_MTD_PARTITIONS
++	struct mtd_partition *mtd_parts = 0;
++	int mtd_parts_nr = 0;
++#endif
++
++	if (nr_devices >= DATAFLASH_MAX_DEVICES) {
++		printk(KERN_ERR "at91_dataflash: Too many devices detected\n");
++		return 0;
++	}
++
++	device = kmalloc(sizeof(struct mtd_info) + strlen(name) + 8, GFP_KERNEL);
++	if (!device)
++		return -ENOMEM;
++	memset(device, 0, sizeof(struct mtd_info));
++
++	device->name = (char *)&device[1];
++	sprintf(device->name, "%s.spi%d", name, channel);
++	device->size = nr_pages * pagesize;
++	device->erasesize = pagesize;
++	device->writesize = pagesize;
++	device->owner = THIS_MODULE;
++	device->type = MTD_DATAFLASH;
++	device->flags = MTD_WRITEABLE;
++	device->erase = at91_dataflash_erase;
++	device->read = at91_dataflash_read;
++	device->write = at91_dataflash_write;
++
++	priv = (struct dataflash_local *) kmalloc(sizeof(struct dataflash_local), GFP_KERNEL);
++	if (!priv) {
++		kfree(device);
++		return -ENOMEM;
++	}
++	memset(priv, 0, sizeof(struct dataflash_local));
++
++	priv->spi = channel;
++	priv->page_size = pagesize;
++	priv->page_offset = pageoffset;
++	device->priv = priv;
++
++	mtd_devices[nr_devices] = device;
++	nr_devices++;
++	printk("at91_dataflash: %s detected [spi%i] (%i bytes)\n", name, channel, device->size);
++
++#ifdef CONFIG_MTD_PARTITIONS
++#ifdef CONFIG_MTD_CMDLINE_PARTS
++	mtd_parts_nr = parse_mtd_partitions(device, part_probes, &mtd_parts, 0);
++#endif
++	if (mtd_parts_nr <= 0) {
++		switch (IDsize) {
++			case SZ_2M:
++				mtd_parts = static_partitions_2M;
++				mtd_parts_nr = ARRAY_SIZE(static_partitions_2M);
++				break;
++			case SZ_4M:
++				mtd_parts = static_partitions_4M;
++				mtd_parts_nr = ARRAY_SIZE(static_partitions_4M);
++				break;
++			case SZ_8M:
++				mtd_parts = static_partitions_8M;
++				mtd_parts_nr = ARRAY_SIZE(static_partitions_8M);
++				break;
++		}
++	}
++
++	if (mtd_parts_nr > 0) {
++#ifdef DATAFLASH_ALWAYS_ADD_DEVICE
++		add_mtd_device(device);
++#endif
++		return add_mtd_partitions(device, mtd_parts, mtd_parts_nr);
++	}
++#endif
++	return add_mtd_device(device);		/* add whole device */
++}
++
++/*
++ * Detect and initialize DataFlash device connected to specified SPI channel.
++ *
++ *   Device            Density         ID code                 Nr Pages        Page Size       Page offset
++ *   AT45DB011B        1Mbit   (128K)  xx0011xx (0x0c)         512             264             9
++ *   AT45DB021B        2Mbit   (256K)  xx0101xx (0x14)         1025            264             9
++ *   AT45DB041B        4Mbit   (512K)  xx0111xx (0x1c)         2048            264             9
++ *   AT45DB081B        8Mbit   (1M)    xx1001xx (0x24)         4096            264             9
++ *   AT45DB0161B       16Mbit  (2M)    xx1011xx (0x2c)         4096            528             10
++ *   AT45DB0321B       32Mbit  (4M)    xx1101xx (0x34)         8192            528             10
++ *   AT45DB0642        64Mbit  (8M)    xx1111xx (0x3c)         8192            1056            11
++ *   AT45DB1282        128Mbit (16M)   xx0100xx (0x10)         16384           1056            11
++ */
++static int __init at91_dataflash_detect(int channel)
++{
++	int res = 0;
++	unsigned short status;
++
++	spi_access_bus(channel);
++	status = at91_dataflash_status();
++	spi_release_bus(channel);
++	if (status != 0xff) {			/* no dataflash device there */
++		switch (status & 0x3c) {
++			case 0x0c:	/* 0 0 1 1 */
++				res = add_dataflash(channel, "AT45DB011B", SZ_128K, 512, 264, 9);
++				break;
++			case 0x14:	/* 0 1 0 1 */
++				res = add_dataflash(channel, "AT45DB021B", SZ_256K, 1025, 264, 9);
++				break;
++			case 0x1c:	/* 0 1 1 1 */
++				res = add_dataflash(channel, "AT45DB041B", SZ_512K, 2048, 264, 9);
++				break;
++			case 0x24:	/* 1 0 0 1 */
++				res = add_dataflash(channel, "AT45DB081B", SZ_1M, 4096, 264, 9);
++				break;
++			case 0x2c:	/* 1 0 1 1 */
++				res = add_dataflash(channel, "AT45DB161B", SZ_2M, 4096, 528, 10);
++				break;
++			case 0x34:	/* 1 1 0 1 */
++				res = add_dataflash(channel, "AT45DB321B", SZ_4M, 8192, 528, 10);
++				break;
++			case 0x3c:	/* 1 1 1 1 */
++				res = add_dataflash(channel, "AT45DB642", SZ_8M, 8192, 1056, 11);
++				break;
++// Currently unsupported since Atmel removed the "Main Memory Program via Buffer" commands.
++//			case 0x10:	/* 0 1 0 0 */
++//				res = add_dataflash(channel, "AT45DB1282", SZ_16M, 16384, 1056, 11);
++//				break;
++			default:
++				printk(KERN_ERR "at91_dataflash: Unknown device (%x)\n", status & 0x3c);
++		}
++	}
++
++	return res;
++}
++
++static int __init at91_dataflash_init(void)
++{
++	spi_transfer_desc = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
++	if (!spi_transfer_desc)
++		return -ENOMEM;
++
++	/* DataFlash (SPI chip select 0) */
++	at91_dataflash_detect(0);
++
++#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
++	/* DataFlash card (SPI chip select 3) */
++	at91_dataflash_detect(3);
++#endif
++
++	return 0;
++}
++
++static void __exit at91_dataflash_exit(void)
++{
++	int i;
++
++	for (i = 0; i < DATAFLASH_MAX_DEVICES; i++) {
++		if (mtd_devices[i]) {
++#ifdef CONFIG_MTD_PARTITIONS
++			del_mtd_partitions(mtd_devices[i]);
++#else
++			del_mtd_device(mtd_devices[i]);
++#endif
++			kfree(mtd_devices[i]->priv);
++			kfree(mtd_devices[i]);
++		}
++	}
++	nr_devices = 0;
++	kfree(spi_transfer_desc);
++}
++
++
++module_init(at91_dataflash_init);
++module_exit(at91_dataflash_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andrew Victor");
++MODULE_DESCRIPTION("DataFlash driver for Atmel AT91RM9200");
+diff -urN linux-2.6.20.4-0rig/drivers/mtd/devices/Kconfig linux-2.6.20.4-atmel/drivers/mtd/devices/Kconfig
+--- linux-2.6.20.4-0rig/drivers/mtd/devices/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mtd/devices/Kconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -267,5 +267,11 @@
+ 	  LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
+ 	  you have managed to wipe the first block.
+ 
+-endmenu
++config MTD_AT91_DATAFLASH
++	tristate "AT91RM9200 DataFlash AT45DBxxx (legacy driver)"
++	depends on MTD && ARCH_AT91RM9200 && AT91_SPI
++	help
++	  This enables access to the DataFlash (AT45DBxxx) on the AT91RM9200.
++	  If you have such a board, say 'Y'.
+ 
++endmenu
+diff -urN linux-2.6.20.4-0rig/drivers/mtd/devices/Makefile linux-2.6.20.4-atmel/drivers/mtd/devices/Makefile
+--- linux-2.6.20.4-0rig/drivers/mtd/devices/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mtd/devices/Makefile	2007-03-24 16:39:15.000000000 +0100
+@@ -17,3 +17,4 @@
+ obj-$(CONFIG_MTD_BLOCK2MTD)	+= block2mtd.o
+ obj-$(CONFIG_MTD_DATAFLASH)	+= mtd_dataflash.o
+ obj-$(CONFIG_MTD_M25P80)	+= m25p80.o
++obj-$(CONFIG_MTD_AT91_DATAFLASH)+= at91_dataflash.o
+diff -urN linux-2.6.20.4-0rig/drivers/mtd/nand/at91_nand.c linux-2.6.20.4-atmel/drivers/mtd/nand/at91_nand.c
+--- linux-2.6.20.4-0rig/drivers/mtd/nand/at91_nand.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/mtd/nand/at91_nand.c	2007-03-24 16:39:15.000000000 +0100
+@@ -82,6 +82,10 @@
+ 		at91_set_gpio_value(host->board->enable_pin, 1);
+ }
+ 
++#ifdef CONFIG_MTD_PARTITIONS
++const char *part_probes[] = { "cmdlinepart", NULL };
++#endif
++
+ /*
+  * Probe for the NAND device.
+  */
+@@ -151,6 +155,12 @@
+ #ifdef CONFIG_MTD_PARTITIONS
+ 	if (host->board->partition_info)
+ 		partitions = host->board->partition_info(mtd->size, &num_partitions);
++#ifdef CONFIG_MTD_CMDLINE_PARTS
++	else {
++		mtd->name = "at91_nand";
++		num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
++	}
++#endif
+ 
+ 	if ((!partitions) || (num_partitions == 0)) {
+ 		printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n");
+diff -urN linux-2.6.20.4-0rig/drivers/net/arm/at91_ether.c linux-2.6.20.4-atmel/drivers/net/arm/at91_ether.c
+--- linux-2.6.20.4-0rig/drivers/net/arm/at91_ether.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/net/arm/at91_ether.c	2007-03-24 16:39:15.000000000 +0100
+@@ -943,14 +943,22 @@
+ 	struct net_device *dev;
+ 	struct at91_private *lp;
+ 	unsigned int val;
+-	int res;
++	struct resource *res;
++	int ret;
+ 
+ 	dev = alloc_etherdev(sizeof(struct at91_private));
+ 	if (!dev)
+ 		return -ENOMEM;
+ 
+-	dev->base_addr = AT91_VA_BASE_EMAC;
+-	dev->irq = AT91RM9200_ID_EMAC;
++	/* Get I/O base address and IRQ */
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res) {
++		free_netdev(dev);
++		return -ENODEV;
++	}
++	dev->base_addr = res->start;
++	dev->irq = platform_get_irq(pdev, 0);
++
+ 	SET_MODULE_OWNER(dev);
+ 
+ 	/* Install the interrupt handler */
+@@ -1023,12 +1031,12 @@
+ 	lp->phy_address = phy_address;	/* MDI address of PHY */
+ 
+ 	/* Register the network interface */
+-	res = register_netdev(dev);
+-	if (res) {
++	ret = register_netdev(dev);
++	if (ret) {
+ 		free_irq(dev->irq, dev);
+ 		free_netdev(dev);
+ 		dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
+-		return res;
++		return ret;
+ 	}
+ 
+ 	/* Determine current link speed */
+@@ -1103,7 +1111,7 @@
+ 			case MII_LXT971A_ID:		/* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */
+ 			case MII_RTL8201_ID:		/* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
+ 			case MII_BCM5221_ID:		/* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
+-			case MII_DP83847_ID:		/* National Semiconductor DP83847:  */
++			case MII_DP83847_ID:		/* National Semiconductor DP83847: */
+ 			case MII_AC101L_ID:		/* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
+ 			case MII_KS8721_ID:		/* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
+ 				detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk);
+diff -urN linux-2.6.20.4-0rig/drivers/net/Kconfig linux-2.6.20.4-atmel/drivers/net/Kconfig
+--- linux-2.6.20.4-0rig/drivers/net/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/net/Kconfig	2007-03-24 16:39:15.000000000 +0100
+@@ -190,7 +190,7 @@
+ 
+ config MACB
+ 	tristate "Atmel MACB support"
+-	depends on NET_ETHERNET && AVR32
++	depends on NET_ETHERNET && (AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263)
+ 	select MII
+ 	help
+ 	  The Atmel MACB ethernet interface is found on many AT32 and AT91
+diff -urN linux-2.6.20.4-0rig/drivers/net/macb.c linux-2.6.20.4-atmel/drivers/net/macb.c
+--- linux-2.6.20.4-0rig/drivers/net/macb.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/net/macb.c	2007-03-24 16:42:28.000000000 +0100
+@@ -883,27 +883,15 @@
+ static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+ {
+ 	struct macb *bp = netdev_priv(dev);
+-	int ret;
+-	unsigned long flags;
+-
+-	spin_lock_irqsave(&bp->lock, flags);
+-	ret = mii_ethtool_gset(&bp->mii, cmd);
+-	spin_unlock_irqrestore(&bp->lock, flags);
+ 
+-	return ret;
++	return mii_ethtool_gset(&bp->mii, cmd);
+ }
+ 
+ static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+ {
+ 	struct macb *bp = netdev_priv(dev);
+-	int ret;
+-	unsigned long flags;
+-
+-	spin_lock_irqsave(&bp->lock, flags);
+-	ret = mii_ethtool_sset(&bp->mii, cmd);
+-	spin_unlock_irqrestore(&bp->lock, flags);
+ 
+-	return ret;
++	return mii_ethtool_sset(&bp->mii, cmd);
+ }
+ 
+ static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
+@@ -932,17 +920,11 @@
+ static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+ {
+ 	struct macb *bp = netdev_priv(dev);
+-	int ret;
+-	unsigned long flags;
+ 
+ 	if (!netif_running(dev))
+ 		return -EINVAL;
+ 
+-	spin_lock_irqsave(&bp->lock, flags);
+-	ret = generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL);
+-	spin_unlock_irqrestore(&bp->lock, flags);
+-
+-	return ret;
++	return generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL);
+ }
+ 
+ static ssize_t macb_mii_show(const struct class_device *cd, char *buf,
+@@ -1046,6 +1028,14 @@
+ 
+ 	spin_lock_init(&bp->lock);
+ 
++#if defined(CONFIG_ARCH_AT91)
++	bp->pclk = clk_get(&pdev->dev, "macb_clk");
++	if (IS_ERR(bp->pclk)) {
++		dev_err(&pdev->dev, "failed to get macb_clk\n");
++		goto err_out_free_dev;
++	}
++	clk_enable(bp->pclk);
++#else
+ 	bp->pclk = clk_get(&pdev->dev, "pclk");
+ 	if (IS_ERR(bp->pclk)) {
+ 		dev_err(&pdev->dev, "failed to get pclk\n");
+@@ -1059,6 +1049,7 @@
+ 
+ 	clk_enable(bp->pclk);
+ 	clk_enable(bp->hclk);
++#endif
+ 
+ 	bp->regs = ioremap(regs->start, regs->end - regs->start + 1);
+ 	if (!bp->regs) {
+@@ -1119,9 +1110,17 @@
+ 
+ 	pdata = pdev->dev.platform_data;
+ 	if (pdata && pdata->is_rmii)
++#if defined(CONFIG_ARCH_AT91)
++		macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
++#else
+ 		macb_writel(bp, USRIO, 0);
++#endif
+ 	else
++#if defined(CONFIG_ARCH_AT91)
++		macb_writel(bp, USRIO, MACB_BIT(CLKEN));
++#else
+ 		macb_writel(bp, USRIO, MACB_BIT(MII));
++#endif
+ 
+ 	bp->tx_pending = DEF_TX_RING_PENDING;
+ 
+@@ -1148,9 +1147,11 @@
+ err_out_iounmap:
+ 	iounmap(bp->regs);
+ err_out_disable_clocks:
++#ifndef CONFIG_ARCH_AT91
+ 	clk_disable(bp->hclk);
+-	clk_disable(bp->pclk);
+ 	clk_put(bp->hclk);
++#endif
++	clk_disable(bp->pclk);
+ err_out_put_pclk:
+ 	clk_put(bp->pclk);
+ err_out_free_dev:
+@@ -1173,9 +1174,11 @@
+ 		unregister_netdev(dev);
+ 		free_irq(dev->irq, dev);
+ 		iounmap(bp->regs);
++#ifndef CONFIG_ARCH_AT91
+ 		clk_disable(bp->hclk);
+-		clk_disable(bp->pclk);
+ 		clk_put(bp->hclk);
++#endif
++		clk_disable(bp->pclk);
+ 		clk_put(bp->pclk);
+ 		free_netdev(dev);
+ 		platform_set_drvdata(pdev, NULL);
+diff -urN linux-2.6.20.4-0rig/drivers/net/macb.h linux-2.6.20.4-atmel/drivers/net/macb.h
+--- linux-2.6.20.4-0rig/drivers/net/macb.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/net/macb.h	2007-03-24 16:39:15.000000000 +0100
+@@ -200,7 +200,7 @@
+ #define MACB_SOF_OFFSET				30
+ #define MACB_SOF_SIZE				2
+ 
+-/* Bitfields in USRIO */
++/* Bitfields in USRIO (AVR32) */
+ #define MACB_MII_OFFSET				0
+ #define MACB_MII_SIZE				1
+ #define MACB_EAM_OFFSET				1
+@@ -210,6 +210,12 @@
+ #define MACB_TX_PAUSE_ZERO_OFFSET		3
+ #define MACB_TX_PAUSE_ZERO_SIZE			1
+ 
++/* Bitfields in USRIO (AT91) */
++#define MACB_RMII_OFFSET			0
++#define MACB_RMII_SIZE				1
++#define MACB_CLKEN_OFFSET			1
++#define MACB_CLKEN_SIZE				1
++
+ /* Bitfields in WOL */
+ #define MACB_IP_OFFSET				0
+ #define MACB_IP_SIZE				16
+diff -urN linux-2.6.20.4-0rig/drivers/pcmcia/at91_cf.c linux-2.6.20.4-atmel/drivers/pcmcia/at91_cf.c
+--- linux-2.6.20.4-0rig/drivers/pcmcia/at91_cf.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/pcmcia/at91_cf.c	2007-03-24 16:39:15.000000000 +0100
+@@ -333,20 +333,27 @@
+ 	struct at91_cf_data	*board = cf->board;
+ 
+ 	pcmcia_socket_dev_suspend(&pdev->dev, mesg);
++
+ 	if (device_may_wakeup(&pdev->dev)) {
+ 		enable_irq_wake(board->det_pin);
+ 		if (board->irq_pin)
+ 			enable_irq_wake(board->irq_pin);
+-	} else {
+-		disable_irq_wake(board->det_pin);
+-		if (board->irq_pin)
+-			disable_irq_wake(board->irq_pin);
+ 	}
++
+ 	return 0;
+ }
+ 
+ static int at91_cf_resume(struct platform_device *pdev)
+ {
++	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
++	struct at91_cf_data	*board = cf->board;
++
++	if (device_may_wakeup(&pdev->dev)) {
++		disable_irq_wake(board->det_pin);
++		if (board->irq_pin)
++			disable_irq_wake(board->irq_pin);
++	}
++
+ 	pcmcia_socket_dev_resume(&pdev->dev);
+ 	return 0;
+ }
+diff -urN linux-2.6.20.4-0rig/drivers/serial/atmel_serial.c linux-2.6.20.4-atmel/drivers/serial/atmel_serial.c
+--- linux-2.6.20.4-0rig/drivers/serial/atmel_serial.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/serial/atmel_serial.c	2007-03-24 16:42:29.000000000 +0100
+@@ -7,6 +7,8 @@
+  *  Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
+  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+  *
++ *  DMA support added by Chip Coldwell.
++ *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation; either version 2 of the License, or
+@@ -33,12 +35,14 @@
+ #include <linux/sysrq.h>
+ #include <linux/tty_flip.h>
+ #include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/atmel_pdc.h>
+ 
+ #include <asm/io.h>
+ 
+ #include <asm/mach/serial_at91.h>
+ #include <asm/arch/board.h>
+-#include <asm/arch/at91_pdc.h>
++
+ #ifdef CONFIG_ARM
+ #include <asm/arch/cpu.h>
+ #include <asm/arch/gpio.h>
+@@ -46,6 +50,11 @@
+ 
+ #include "atmel_serial.h"
+ 
++#define SUPPORT_PDC
++#define PDC_BUFFER_SIZE		(L1_CACHE_BYTES << 3)
++#warning "Revisit"
++#define PDC_RX_TIMEOUT		(3 * 10)		/* 3 bytes */
++
+ #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ #define SUPPORT_SYSRQ
+ #endif
+@@ -73,39 +82,46 @@
+ 
+ #define ATMEL_ISR_PASS_LIMIT	256
+ 
+-#define UART_PUT_CR(port,v)	writel(v, (port)->membase + ATMEL_US_CR)
+-#define UART_GET_MR(port)	readl((port)->membase + ATMEL_US_MR)
+-#define UART_PUT_MR(port,v)	writel(v, (port)->membase + ATMEL_US_MR)
+-#define UART_PUT_IER(port,v)	writel(v, (port)->membase + ATMEL_US_IER)
+-#define UART_PUT_IDR(port,v)	writel(v, (port)->membase + ATMEL_US_IDR)
+-#define UART_GET_IMR(port)	readl((port)->membase + ATMEL_US_IMR)
+-#define UART_GET_CSR(port)	readl((port)->membase + ATMEL_US_CSR)
+-#define UART_GET_CHAR(port)	readl((port)->membase + ATMEL_US_RHR)
+-#define UART_PUT_CHAR(port,v)	writel(v, (port)->membase + ATMEL_US_THR)
+-#define UART_GET_BRGR(port)	readl((port)->membase + ATMEL_US_BRGR)
+-#define UART_PUT_BRGR(port,v)	writel(v, (port)->membase + ATMEL_US_BRGR)
+-#define UART_PUT_RTOR(port,v)	writel(v, (port)->membase + ATMEL_US_RTOR)
++#define UART_PUT_CR(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_CR)
++#define UART_GET_MR(port)	__raw_readl((port)->membase + ATMEL_US_MR)
++#define UART_PUT_MR(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_MR)
++#define UART_PUT_IER(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_IER)
++#define UART_PUT_IDR(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_IDR)
++#define UART_GET_IMR(port)	__raw_readl((port)->membase + ATMEL_US_IMR)
++#define UART_GET_CSR(port)	__raw_readl((port)->membase + ATMEL_US_CSR)
++#define UART_GET_CHAR(port)	__raw_readl((port)->membase + ATMEL_US_RHR)
++#define UART_PUT_CHAR(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_THR)
++#define UART_GET_BRGR(port)	__raw_readl((port)->membase + ATMEL_US_BRGR)
++#define UART_PUT_BRGR(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_BRGR)
++#define UART_PUT_RTOR(port,v)	__raw_writel(v, (port)->membase + ATMEL_US_RTOR)
+ 
+-// #define UART_GET_CR(port)	readl((port)->membase + ATMEL_US_CR)		// is write-only
++// #define UART_GET_CR(port)	__raw_readl((port)->membase + ATMEL_US_CR)		// is write-only
+ 
+  /* PDC registers */
+-#define UART_PUT_PTCR(port,v)	writel(v, (port)->membase + ATMEL_PDC_PTCR)
+-#define UART_GET_PTSR(port)	readl((port)->membase + ATMEL_PDC_PTSR)
++#define UART_PUT_PTCR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
++#define UART_GET_PTSR(port)	__raw_readl((port)->membase + ATMEL_PDC_PTSR)
+ 
+-#define UART_PUT_RPR(port,v)	writel(v, (port)->membase + ATMEL_PDC_RPR)
+-#define UART_GET_RPR(port)	readl((port)->membase + ATMEL_PDC_RPR)
+-#define UART_PUT_RCR(port,v)	writel(v, (port)->membase + ATMEL_PDC_RCR)
+-#define UART_PUT_RNPR(port,v)	writel(v, (port)->membase + ATMEL_PDC_RNPR)
+-#define UART_PUT_RNCR(port,v)	writel(v, (port)->membase + ATMEL_PDC_RNCR)
+-
+-#define UART_PUT_TPR(port,v)	writel(v, (port)->membase + ATMEL_PDC_TPR)
+-#define UART_PUT_TCR(port,v)	writel(v, (port)->membase + ATMEL_PDC_TCR)
+-//#define UART_PUT_TNPR(port,v)	writel(v, (port)->membase + ATMEL_PDC_TNPR)
+-//#define UART_PUT_TNCR(port,v)	writel(v, (port)->membase + ATMEL_PDC_TNCR)
++#define UART_PUT_RPR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
++#define UART_GET_RPR(port)	__raw_readl((port)->membase + ATMEL_PDC_RPR)
++#define UART_PUT_RCR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
++#define UART_PUT_RNPR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
++#define UART_PUT_RNCR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
++
++#define UART_PUT_TPR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
++#define UART_PUT_TCR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
++//#define UART_PUT_TNPR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
++//#define UART_PUT_TNCR(port,v)	__raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
+ 
+ static int (*atmel_open_hook)(struct uart_port *);
+ static void (*atmel_close_hook)(struct uart_port *);
+ 
++struct atmel_dma_buffer {
++	unsigned char	*buf;
++	dma_addr_t	dma_addr;
++	size_t		dma_size;
++	unsigned int	ofs;
++};
++
+ /*
+  * We wrap our port structure around the generic uart_port.
+  */
+@@ -113,10 +129,20 @@
+ 	struct uart_port	uart;		/* uart */
+ 	struct clk		*clk;		/* uart clock */
+ 	unsigned short		suspended;	/* is port suspended? */
++
++	short			use_dma_rx;	/* enable PDC receiver */
++	short			pdc_rx_idx;	/* current PDC RX buffer */
++	struct atmel_dma_buffer	pdc_rx[2];	/* PDC receier */
++
++	short			use_dma_tx;	/* enable PDC transmitter */
++	struct atmel_dma_buffer	pdc_tx;		/* PDC transmitter */
+ };
+ 
+ static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
+ 
++#define PDC_RX_BUF(port)	&(port)->pdc_rx[(port)->pdc_rx_idx]
++#define PDC_RX_SWITCH(port)	(port)->pdc_rx_idx = !(port)->pdc_rx_idx
++
+ #ifdef SUPPORT_SYSRQ
+ static struct console atmel_console;
+ #endif
+@@ -204,7 +230,12 @@
+ {
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	UART_PUT_IDR(port, ATMEL_US_TXRDY);
++	if (atmel_port->use_dma_tx) {
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);		/* disable PDC transmit */
++		UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++	}
++	else
++		UART_PUT_IDR(port, ATMEL_US_TXRDY);
+ }
+ 
+ /*
+@@ -214,7 +245,17 @@
+ {
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	UART_PUT_IER(port, ATMEL_US_TXRDY);
++	if (atmel_port->use_dma_tx) {
++		if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
++			/* The transmitter is already running.  Yes, we
++			   really need this.*/
++			return;
++
++		UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);		/* re-enable PDC transmit */
++	}
++	else
++		UART_PUT_IER(port, ATMEL_US_TXRDY);
+ }
+ 
+ /*
+@@ -224,7 +265,12 @@
+ {
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	UART_PUT_IDR(port, ATMEL_US_RXRDY);
++	if (atmel_port->use_dma_rx) {
++		UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);		/* disable PDC receive */
++		UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
++	}
++	else
++		UART_PUT_IDR(port, ATMEL_US_RXRDY);
+ }
+ 
+ /*
+@@ -247,6 +293,134 @@
+ }
+ 
+ /*
++ * Receive data via the PDC.  A buffer has been fulled.
++ */
++static void atmel_pdc_endrx(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct tty_struct *tty = port->info->tty;
++	struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
++	unsigned int count;
++
++	count = pdc->dma_size - pdc->ofs;
++	if (likely(count > 0)) {
++		dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
++		tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
++		tty_flip_buffer_push(tty);
++
++		port->icount.rx += count;
++	}
++
++	/* Set this buffer as the next receive buffer */
++	pdc->ofs = 0;
++	UART_PUT_RNPR(port, pdc->dma_addr);
++	UART_PUT_RNCR(port, pdc->dma_size);
++
++	/* Switch to next buffer */
++	PDC_RX_SWITCH(atmel_port);		/* next PDC buffer */
++}
++
++/*
++ * Receive data via the PDC.  At least one byte was received, but the
++ * buffer was not full when the inter-character timeout expired.
++ */
++static void atmel_pdc_timeout(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct tty_struct *tty = port->info->tty;
++	struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
++	/* unsigned */ int ofs, count;
++
++	ofs = UART_GET_RPR(port) - pdc->dma_addr;	/* current DMA adress */
++	count = ofs - pdc->ofs;
++
++	if (likely(count > 0)) {
++		dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
++		tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
++		tty_flip_buffer_push(tty);
++
++		pdc->ofs = ofs;
++		port->icount.rx += count;
++	}
++
++	/* reset the UART timeout */
++	UART_PUT_CR(port, ATMEL_US_STTTO);
++}
++
++/*
++ * Deal with parity, framing and overrun errors.
++ */
++static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
++{
++	/* clear error */
++	UART_PUT_CR(port, ATMEL_US_RSTSTA);
++
++	if (status & ATMEL_US_RXBRK) {
++		status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);	/* ignore side-effect */
++		port->icount.brk++;
++	}
++	if (status & ATMEL_US_PARE)
++		port->icount.parity++;
++	if (status & ATMEL_US_FRAME)
++		port->icount.frame++;
++	if (status & ATMEL_US_OVRE)
++		port->icount.overrun++;
++}
++
++/*
++ * A transmission via the PDC is complete.
++ */
++static void atmel_pdc_endtx(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct circ_buf *xmit = &port->info->xmit;
++	struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++
++	xmit->tail += pdc->ofs;
++	if (xmit->tail >= SERIAL_XMIT_SIZE)
++		xmit->tail -= SERIAL_XMIT_SIZE;
++
++	port->icount.tx += pdc->ofs;
++	pdc->ofs = 0;
++
++	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
++		uart_write_wakeup(port);
++}
++
++/*
++ * The PDC transmitter is idle, so either start the next transfer or
++ * disable the transmitter.
++ */
++static void atmel_pdc_txbufe(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct circ_buf *xmit = &port->info->xmit;
++	struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++	int count;
++
++	if (!uart_circ_empty(xmit)) {
++		/* more to transmit - setup next transfer */
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);			/* disable PDC transmit */
++		dma_sync_single_for_device(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
++
++		if (xmit->tail < xmit->head)
++			count = xmit->head - xmit->tail;
++		else
++			count = SERIAL_XMIT_SIZE - xmit->tail;
++		pdc->ofs = count;
++
++		UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
++		UART_PUT_TCR(port, count);
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);			/* re-enable PDC transmit */
++	}
++	else {
++		/* nothing left to transmit - disable the transmitter */
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);			/* disable PDC transmit */
++		UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++	}
++}
++
++/*
+  * Characters received (called from interrupt handler)
+  */
+ static void atmel_rx_chars(struct uart_port *port)
+@@ -348,6 +522,14 @@
+ 	status = UART_GET_CSR(port);
+ 	pending = status & UART_GET_IMR(port);
+ 	while (pending) {
++		/* PDC receive */
++		if (pending & ATMEL_US_ENDRX)
++			atmel_pdc_endrx(port);
++		if (pending & ATMEL_US_TIMEOUT)
++			atmel_pdc_timeout(port);
++		if (atmel_port->use_dma_rx && pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | ATMEL_US_FRAME | ATMEL_US_PARE))
++			atmel_pdc_rxerr(port, pending);
++
+ 		/* Interrupt receive */
+ 		if (pending & ATMEL_US_RXRDY)
+ 			atmel_rx_chars(port);
+@@ -362,6 +544,12 @@
+ 		if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
+ 			wake_up_interruptible(&port->info->delta_msr_wait);
+ 
++		/* PDC transmit */
++		if (pending & ATMEL_US_ENDTX)
++			atmel_pdc_endtx(port);
++		if (pending & ATMEL_US_TXBUFE)
++			atmel_pdc_txbufe(port);
++
+ 		/* Interrupt transmit */
+ 		if (pending & ATMEL_US_TXRDY)
+ 			atmel_tx_chars(port);
+@@ -400,6 +588,47 @@
+ 	}
+ 
+ 	/*
++	 * Initialize DMA (if necessary)
++	 */
++	if (atmel_port->use_dma_rx) {
++		int i;
++
++		for (i = 0; i < 2; i++) {
++			struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
++
++			pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
++			if (pdc->buf == NULL) {
++				if (i != 0) {
++					dma_unmap_single(port->dev, atmel_port->pdc_rx[0].dma_addr, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
++					kfree(atmel_port->pdc_rx[0].buf);
++				}
++				free_irq(port->irq, port);
++				return -ENOMEM;
++			}
++			pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
++			pdc->dma_size = PDC_BUFFER_SIZE;
++			pdc->ofs = 0;
++		}
++
++		atmel_port->pdc_rx_idx = 0;
++
++		UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
++		UART_PUT_RCR(port, PDC_BUFFER_SIZE);
++
++		UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
++		UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
++	}
++	if (atmel_port->use_dma_tx) {
++		struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++		struct circ_buf *xmit = &port->info->xmit;
++
++		pdc->buf = xmit->buf;
++		pdc->dma_addr = dma_map_single(port->dev, pdc->buf, SERIAL_XMIT_SIZE, DMA_TO_DEVICE);
++		pdc->dma_size = SERIAL_XMIT_SIZE;
++		pdc->ofs = 0;
++	}
++
++	/*
+ 	 * If there is a specific "open" function (to register
+ 	 * control line interrupts)
+ 	 */
+@@ -417,7 +646,15 @@
+ 	UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
+ 	UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);		/* enable xmit & rcvr */
+ 
+-	UART_PUT_IER(port, ATMEL_US_RXRDY);		/* enable receive only */
++	if (atmel_port->use_dma_rx) {
++		UART_PUT_RTOR(port, PDC_RX_TIMEOUT);		/* set UART timeout */
++		UART_PUT_CR(port, ATMEL_US_STTTO);
++
++		UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
++		UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);		/* enable PDC controller */
++	}
++	else
++		UART_PUT_IER(port, ATMEL_US_RXRDY);		/* enable receive only */
+ 
+ 	return 0;
+ }
+@@ -430,6 +667,25 @@
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+ 	/*
++	 * Shut-down the DMA.
++	 */
++	if (atmel_port->use_dma_rx) {
++		int i;
++
++		for (i = 0; i < 2; i++) {
++			struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
++
++			dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
++			kfree(pdc->buf);
++		}
++	}
++	if (atmel_port->use_dma_tx) {
++		struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++
++		dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
++	}
++
++	/*
+ 	 * Disable all interrupts, port and break condition.
+ 	 */
+ 	UART_PUT_CR(port, ATMEL_US_RSTSTA);
+@@ -480,6 +736,7 @@
+  */
+ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
+ {
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 	unsigned long flags;
+ 	unsigned int mode, imr, quot, baud;
+ 
+@@ -533,6 +790,9 @@
+ 	if (termios->c_iflag & (BRKINT | PARMRK))
+ 		port->read_status_mask |= ATMEL_US_RXBRK;
+ 
++	if (atmel_port->use_dma_rx)	/* need to enable error interrupts */
++		UART_PUT_IER(port, port->read_status_mask);
++
+ 	/*
+ 	 * Characters to ignore
+ 	 */
+@@ -711,6 +971,11 @@
+ 		clk_enable(atmel_port->clk);
+ 		port->uartclk = clk_get_rate(atmel_port->clk);
+ 	}
++
++#ifdef SUPPORT_PDC
++	atmel_port->use_dma_rx = data->use_dma_rx;
++	atmel_port->use_dma_tx = data->use_dma_tx;
++#endif
+ }
+ 
+ /*
+diff -urN linux-2.6.20.4-0rig/drivers/spi/atmel_spi.c linux-2.6.20.4-atmel/drivers/spi/atmel_spi.c
+--- linux-2.6.20.4-0rig/drivers/spi/atmel_spi.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/spi/atmel_spi.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,699 @@
++/*
++ * Driver for Atmel AT32 and AT91 SPI Controllers
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#ifdef CONFIG_ARCH_AT91
++#include <asm/arch/cpu.h>
++#endif
++
++#include "atmel_spi.h"
++
++/*
++ * The core SPI transfer engine just talks to a register bank to set up
++ * DMA transfers; transfer queue progress is driven by IRQs.  The clock
++ * framework provides the base clock, subdivided for each spi_device.
++ *
++ * Newer controllers, marked with "new_1" flag, have:
++ *  - CR.LASTXFER
++ *  - SPI_MR.DIV32 may become FDIV or must-be-zero (here: always zero)
++ *  - SPI_SR.TXEMPTY, SPI_SR.NSSR (and corresponding irqs)
++ *  - SPI_CSRx.CSAAT
++ *  - SPI_CSRx.SBCR allows faster clocking
++ */
++struct atmel_spi {
++	spinlock_t		lock;
++
++	void __iomem		*regs;
++	int			irq;
++	struct clk		*clk;
++	struct platform_device	*pdev;
++	unsigned		new_1:1;
++
++	u8			stopping;
++	struct list_head	queue;
++	struct spi_transfer	*current_transfer;
++	unsigned long		remaining_bytes;
++
++	void			*buffer;
++	dma_addr_t		buffer_dma;
++};
++
++#define BUFFER_SIZE		PAGE_SIZE
++#define INVALID_DMA_ADDRESS	0xffffffff
++
++/*
++ * Earlier SPI controllers (e.g. on at91rm9200) have a design bug whereby
++ * they assume that spi slave device state will not change on deselect, so
++ * that automagic deselection is OK.  Not so!  Workaround uses nCSx pins
++ * as GPIOs; or newer controllers have CSAAT and friends.
++ *
++ * Since the CSAAT functionality is a bit weird on newer controllers
++ * as well, we use GPIO to control nCSx pins on all controllers.
++ */
++
++static inline void cs_activate(struct spi_device *spi)
++{
++	unsigned gpio = (unsigned) spi->controller_data;
++	unsigned active = spi->mode & SPI_CS_HIGH;
++
++	dev_dbg(&spi->dev, "activate %u%s\n", gpio, active ? " (high)" : "");
++#ifdef CONFIG_ARCH_AT91
++	at91_set_gpio_value(gpio, active);
++#else
++	gpio_set_value(gpio, active);
++#endif
++}
++
++static inline void cs_deactivate(struct spi_device *spi)
++{
++	unsigned gpio = (unsigned) spi->controller_data;
++	unsigned active = spi->mode & SPI_CS_HIGH;
++
++	dev_dbg(&spi->dev, "DEactivate %u%s\n", gpio, active ? " (low)" : "");
++#ifdef CONFIG_ARCH_AT91
++	at91_set_gpio_value(gpio, !active);
++#else
++	gpio_set_value(gpio, !active);
++#endif
++}
++
++/*
++ * Submit next transfer for DMA.
++ * lock is held, spi irq is blocked
++ */
++static void atmel_spi_next_xfer(struct spi_master *master,
++				struct spi_message *msg)
++{
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	struct spi_transfer	*xfer;
++	u32			len;
++	dma_addr_t		tx_dma, rx_dma;
++
++	xfer = as->current_transfer;
++	if (!xfer || as->remaining_bytes == 0) {
++		if (xfer)
++			xfer = list_entry(xfer->transfer_list.next,
++					struct spi_transfer, transfer_list);
++		else
++			xfer = list_entry(msg->transfers.next,
++					struct spi_transfer, transfer_list);
++		as->remaining_bytes = xfer->len;
++		as->current_transfer = xfer;
++	}
++
++	len = as->remaining_bytes;
++
++	tx_dma = xfer->tx_dma;
++	rx_dma = xfer->rx_dma;
++
++	/* use scratch buffer only when rx or tx data is unspecified */
++	if (rx_dma == INVALID_DMA_ADDRESS) {
++		rx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++	}
++	if (tx_dma == INVALID_DMA_ADDRESS) {
++		tx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++		memset(as->buffer, 0, len);
++		dma_sync_single_for_device(&as->pdev->dev,
++				as->buffer_dma, len, DMA_TO_DEVICE);
++	}
++
++	spi_writel(as, RPR, rx_dma);
++	spi_writel(as, TPR, tx_dma);
++
++	as->remaining_bytes -= len;
++	if (msg->spi->bits_per_word > 8)
++		len >>= 1;
++
++	/* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
++	 * mechanism might help avoid the IRQ latency between transfers
++	 *
++	 * We're also waiting for ENDRX before we start the next
++	 * transfer because we need to handle some difficult timing
++	 * issues otherwise. If we wait for ENDTX in one transfer and
++	 * then starts waiting for ENDRX in the next, it's difficult
++	 * to tell the difference between the ENDRX interrupt we're
++	 * actually waiting for and the ENDRX interrupt of the
++	 * previous transfer.
++	 *
++	 * It should be doable, though. Just not now...
++	 */
++	spi_writel(as, TNCR, 0);
++	spi_writel(as, RNCR, 0);
++	spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
++
++	dev_dbg(&msg->spi->dev,
++		"  start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
++		xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++		xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
++
++	wmb();
++	spi_writel(as, TCR, len);
++	spi_writel(as, RCR, len);
++	spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
++}
++
++static void atmel_spi_next_message(struct spi_master *master)
++{
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	struct spi_message	*msg;
++	u32			mr;
++
++	BUG_ON(as->current_transfer);
++
++	msg = list_entry(as->queue.next, struct spi_message, queue);
++
++	/* Select the chip */
++	mr = spi_readl(as, MR);
++	mr = SPI_BFINS(PCS, ~(1 << msg->spi->chip_select), mr);
++	spi_writel(as, MR, mr);
++	cs_activate(msg->spi);
++
++	atmel_spi_next_xfer(master, msg);
++}
++
++static void
++atmel_spi_dma_map_xfer(struct atmel_spi *as, struct spi_transfer *xfer)
++{
++	xfer->tx_dma = xfer->rx_dma = INVALID_DMA_ADDRESS;
++	if (xfer->tx_buf)
++		xfer->tx_dma = dma_map_single(&as->pdev->dev,
++				(void *) xfer->tx_buf, xfer->len,
++				DMA_TO_DEVICE);
++	if (xfer->rx_buf)
++		xfer->rx_dma = dma_map_single(&as->pdev->dev,
++				xfer->rx_buf, xfer->len,
++				DMA_FROM_DEVICE);
++}
++
++static void atmel_spi_dma_unmap_xfer(struct spi_master *master,
++				     struct spi_transfer *xfer)
++{
++	if (xfer->tx_dma != INVALID_DMA_ADDRESS)
++		dma_unmap_single(master->cdev.dev, xfer->tx_dma,
++				 xfer->len, DMA_TO_DEVICE);
++	if (xfer->rx_dma != INVALID_DMA_ADDRESS)
++		dma_unmap_single(master->cdev.dev, xfer->rx_dma,
++				 xfer->len, DMA_FROM_DEVICE);
++}
++
++static void
++atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as,
++		   struct spi_message *msg, int status)
++{
++	cs_deactivate(msg->spi);
++	list_del(&msg->queue);
++	msg->status = status;
++
++	dev_dbg(master->cdev.dev,
++		"xfer complete: %u bytes transferred\n",
++		msg->actual_length);
++
++	spin_unlock(&as->lock);
++	msg->complete(msg->context);
++	spin_lock(&as->lock);
++
++	as->current_transfer = NULL;
++
++	/* continue if needed */
++	if (list_empty(&as->queue) || as->stopping)
++		spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
++	else
++		atmel_spi_next_message(master);
++}
++
++static irqreturn_t
++atmel_spi_interrupt(int irq, void *dev_id)
++{
++	struct spi_master	*master = dev_id;
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	struct spi_message	*msg;
++	struct spi_transfer	*xfer;
++	u32			status, pending, imr;
++	int			ret = IRQ_NONE;
++
++	spin_lock(&as->lock);
++
++	xfer = as->current_transfer;
++	msg = list_entry(as->queue.next, struct spi_message, queue);
++
++	imr = spi_readl(as, IMR);
++	status = spi_readl(as, SR);
++	pending = status & imr;
++
++	if (pending & SPI_BIT(OVRES)) {
++		int timeout;
++
++		ret = IRQ_HANDLED;
++
++		spi_writel(as, IDR, (SPI_BIT(ENDTX) | SPI_BIT(ENDRX)
++				     | SPI_BIT(OVRES)));
++
++		/*
++		 * When we get an overrun, we disregard the current
++		 * transfer. Data will not be copied back from any
++		 * bounce buffer and msg->actual_len will not be
++		 * updated with the last xfer.
++		 *
++		 * We will also not process any remaning transfers in
++		 * the message.
++		 *
++		 * First, stop the transfer and unmap the DMA buffers.
++		 */
++		spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
++		if (!msg->is_dma_mapped)
++			atmel_spi_dma_unmap_xfer(master, xfer);
++
++		/* REVISIT: udelay in irq is unfriendly */
++		if (xfer->delay_usecs)
++			udelay(xfer->delay_usecs);
++
++		dev_warn(master->cdev.dev, "fifo overrun (%u/%u remaining)\n",
++			 spi_readl(as, TCR), spi_readl(as, RCR));
++
++		/*
++		 * Clean up DMA registers and make sure the data
++		 * registers are empty.
++		 */
++		spi_writel(as, RNCR, 0);
++		spi_writel(as, TNCR, 0);
++		spi_writel(as, RCR, 0);
++		spi_writel(as, TCR, 0);
++		for (timeout = 1000; timeout; timeout--)
++			if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
++				break;
++		if (!timeout)
++			dev_warn(master->cdev.dev,
++				 "timeout waiting for TXEMPTY");
++		while (spi_readl(as, SR) & SPI_BIT(RDRF))
++			spi_readl(as, RDR);
++
++		/* Clear any overrun happening while cleaning up */
++		spi_readl(as, SR);
++
++		atmel_spi_msg_done(master, as, msg, -EIO);
++	} else if (pending & SPI_BIT(ENDRX)) {
++		ret = IRQ_HANDLED;
++
++		spi_writel(as, IDR, pending);
++
++		if (as->remaining_bytes == 0) {
++			msg->actual_length += xfer->len;
++
++			if (!msg->is_dma_mapped)
++				atmel_spi_dma_unmap_xfer(master, xfer);
++
++			/* REVISIT: udelay in irq is unfriendly */
++			if (xfer->delay_usecs)
++				udelay(xfer->delay_usecs);
++
++			if (msg->transfers.prev == &xfer->transfer_list) {
++				/* report completed message */
++				atmel_spi_msg_done(master, as, msg, 0);
++			} else {
++				if (xfer->cs_change) {
++					cs_deactivate(msg->spi);
++					udelay(1);
++					cs_activate(msg->spi);
++				}
++
++				/*
++				 * Not done yet. Submit the next transfer.
++				 *
++				 * FIXME handle protocol options for xfer
++				 */
++				atmel_spi_next_xfer(master, msg);
++			}
++		} else {
++			/*
++			 * Keep going, we still have data to send in
++			 * the current transfer.
++			 */
++			atmel_spi_next_xfer(master, msg);
++		}
++	}
++
++	spin_unlock(&as->lock);
++
++	return ret;
++}
++
++#define MODEBITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH)
++
++static int atmel_spi_setup(struct spi_device *spi)
++{
++	struct atmel_spi	*as;
++	u32			scbr, csr;
++	unsigned int		bits = spi->bits_per_word;
++	unsigned long		bus_hz, sck_hz;
++	unsigned int		npcs_pin;
++	int			ret;
++
++	as = spi_master_get_devdata(spi->master);
++
++	if (as->stopping)
++		return -ESHUTDOWN;
++
++	if (spi->chip_select > spi->master->num_chipselect) {
++		dev_dbg(&spi->dev,
++				"setup: invalid chipselect %u (%u defined)\n",
++				spi->chip_select, spi->master->num_chipselect);
++		return -EINVAL;
++	}
++
++	if (bits == 0)
++		bits = 8;
++	if (bits < 8 || bits > 16) {
++		dev_dbg(&spi->dev,
++				"setup: invalid bits_per_word %u (8 to 16)\n",
++				bits);
++		return -EINVAL;
++	}
++
++	if (spi->mode & ~MODEBITS) {
++		dev_dbg(&spi->dev, "setup: unsupported mode bits %x\n",
++			spi->mode & ~MODEBITS);
++		return -EINVAL;
++	}
++
++	/* speed zero convention is used by some upper layers */
++	bus_hz = clk_get_rate(as->clk);
++	if (spi->max_speed_hz) {
++		/* assume div32/fdiv/mbz == 0 */
++		if (!as->new_1)
++			bus_hz /= 2;
++		scbr = ((bus_hz + spi->max_speed_hz - 1)
++			/ spi->max_speed_hz);
++		if (scbr >= (1 << SPI_SCBR_SIZE)) {
++			dev_dbg(&spi->dev, "setup: %d Hz too slow, scbr %u\n",
++					spi->max_speed_hz, scbr);
++			return -EINVAL;
++		}
++	} else
++		scbr = 0xff;
++	sck_hz = bus_hz / scbr;
++
++	csr = SPI_BF(SCBR, scbr) | SPI_BF(BITS, bits - 8);
++	if (spi->mode & SPI_CPOL)
++		csr |= SPI_BIT(CPOL);
++	if (!(spi->mode & SPI_CPHA))
++		csr |= SPI_BIT(NCPHA);
++
++	/* TODO: DLYBS and DLYBCT */
++	csr |= SPI_BF(DLYBS, 10);
++	csr |= SPI_BF(DLYBCT, 10);
++
++	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
++	npcs_pin = (unsigned int)spi->controller_data;
++	if (!spi->controller_state) {
++#ifndef CONFIG_ARCH_AT91
++		ret = gpio_request(npcs_pin, "spi_npcs");
++		if (ret)
++			return ret;
++#endif
++		spi->controller_state = (void *)npcs_pin;
++#ifdef CONFIG_ARCH_AT91
++		at91_set_gpio_output(npcs_pin, 0);
++#else
++		gpio_direction_output(npcs_pin);
++#endif
++	}
++
++	dev_dbg(&spi->dev,
++		"setup: %lu Hz bpw %u mode 0x%x -> csr%d %08x\n",
++		sck_hz, bits, spi->mode, spi->chip_select, csr);
++
++	spi_writel(as, CSR0 + 4 * spi->chip_select, csr);
++
++	return 0;
++}
++
++static int atmel_spi_transfer(struct spi_device *spi, struct spi_message *msg)
++{
++	struct atmel_spi	*as;
++	struct spi_transfer	*xfer;
++	unsigned long		flags;
++	struct device		*controller = spi->master->cdev.dev;
++
++	as = spi_master_get_devdata(spi->master);
++
++	dev_dbg(controller, "new message %p submitted for %s\n",
++			msg, spi->dev.bus_id);
++
++	if (unlikely(list_empty(&msg->transfers)
++			|| !spi->max_speed_hz))
++		return -EINVAL;
++
++	if (as->stopping)
++		return -ESHUTDOWN;
++
++	list_for_each_entry(xfer, &msg->transfers, transfer_list) {
++		if (!(xfer->tx_buf || xfer->rx_buf)) {
++			dev_dbg(&spi->dev, "missing rx or tx buf\n");
++			return -EINVAL;
++		}
++
++		/* FIXME implement these protocol options!! */
++		if (xfer->bits_per_word || xfer->speed_hz) {
++			dev_dbg(&spi->dev, "no protocol options yet\n");
++			return -ENOPROTOOPT;
++		}
++	}
++
++	/* scrub dcache "early" */
++	if (!msg->is_dma_mapped) {
++		list_for_each_entry(xfer, &msg->transfers, transfer_list)
++			atmel_spi_dma_map_xfer(as, xfer);
++	}
++
++	list_for_each_entry(xfer, &msg->transfers, transfer_list) {
++		dev_dbg(controller,
++			"  xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len,
++			xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	}
++
++	msg->status = -EINPROGRESS;
++	msg->actual_length = 0;
++
++	spin_lock_irqsave(&as->lock, flags);
++	list_add_tail(&msg->queue, &as->queue);
++	if (!as->current_transfer)
++		atmel_spi_next_message(spi->master);
++	spin_unlock_irqrestore(&as->lock, flags);
++
++	return 0;
++}
++
++static void atmel_spi_cleanup(const struct spi_device *spi)
++{
++#ifndef CONFIG_ARCH_AT91
++	if (spi->controller_state)
++		gpio_free((unsigned int)spi->controller_data);
++#endif
++}
++
++/*-------------------------------------------------------------------------*/
++
++static int __init atmel_spi_probe(struct platform_device *pdev)
++{
++	struct resource		*regs;
++	int			irq;
++	struct clk		*clk;
++	int			ret;
++	struct spi_master	*master;
++	struct atmel_spi	*as;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	clk = clk_get(&pdev->dev, "spi_clk");
++	if (IS_ERR(clk))
++		return PTR_ERR(clk);
++
++	/* setup spi core then atmel-specific driver state */
++	ret = -ENOMEM;
++	master = spi_alloc_master(&pdev->dev, sizeof *as);
++	if (!master)
++		goto out_free;
++
++	master->bus_num = pdev->id;
++	master->num_chipselect = 4;
++	master->setup = atmel_spi_setup;
++	master->transfer = atmel_spi_transfer;
++	master->cleanup = atmel_spi_cleanup;
++	platform_set_drvdata(pdev, master);
++
++	as = spi_master_get_devdata(master);
++
++	as->buffer = dma_alloc_coherent(&pdev->dev, BUFFER_SIZE,
++					&as->buffer_dma, GFP_KERNEL);
++	if (!as->buffer)
++		goto out_free;
++
++	spin_lock_init(&as->lock);
++	INIT_LIST_HEAD(&as->queue);
++	as->pdev = pdev;
++	as->regs = ioremap(regs->start, (regs->end - regs->start) + 1);
++	if (!as->regs)
++		goto out_free_buffer;
++	as->irq = irq;
++	as->clk = clk;
++#ifdef CONFIG_ARCH_AT91
++	if (!cpu_is_at91rm9200())
++		as->new_1 = 1;
++#endif
++
++	ret = request_irq(irq, atmel_spi_interrupt, 0,
++			pdev->dev.bus_id, master);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Initialize the hardware */
++	clk_enable(clk);
++	spi_writel(as, CR, SPI_BIT(SWRST));
++	spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
++	spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
++	spi_writel(as, CR, SPI_BIT(SPIEN));
++
++	/* go! */
++	dev_info(&pdev->dev, "Atmel SPI Controller at 0x%08lx (irq %d)\n",
++			(unsigned long)regs->start, irq);
++
++	ret = spi_register_master(master);
++	if (ret)
++		goto out_reset_hw;
++
++	return 0;
++
++out_reset_hw:
++	spi_writel(as, CR, SPI_BIT(SWRST));
++	clk_disable(clk);
++	free_irq(irq, master);
++out_unmap_regs:
++	iounmap(as->regs);
++out_free_buffer:
++	dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
++			as->buffer_dma);
++out_free:
++	clk_put(clk);
++	spi_master_put(master);
++	return ret;
++}
++
++static int __exit atmel_spi_remove(struct platform_device *pdev)
++{
++	struct spi_master	*master = platform_get_drvdata(pdev);
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	struct spi_message	*msg;
++
++	/* reset the hardware and block queue progress */
++	spin_lock_irq(&as->lock);
++	as->stopping = 1;
++	spi_writel(as, CR, SPI_BIT(SWRST));
++	spi_readl(as, SR);
++	spin_unlock_irq(&as->lock);
++
++	/* Terminate remaining queued transfers */
++	list_for_each_entry(msg, &as->queue, queue) {
++		/* REVISIT unmapping the dma is a NOP on ARM and AVR32
++		 * but we shouldn't depend on that...
++		 */
++		msg->status = -ESHUTDOWN;
++		msg->complete(msg->context);
++	}
++
++	dma_free_coherent(&pdev->dev, BUFFER_SIZE, as->buffer,
++			as->buffer_dma);
++
++	clk_disable(as->clk);
++	clk_put(as->clk);
++	free_irq(as->irq, master);
++	iounmap(as->regs);
++
++	spi_unregister_master(master);
++
++	return 0;
++}
++
++#ifdef	CONFIG_PM
++
++static int atmel_spi_suspend(struct platform_device *pdev, pm_message_t mesg)
++{
++	struct spi_master	*master = platform_get_drvdata(pdev);
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++
++	clk_disable(as->clk);
++	return 0;
++}
++
++static int atmel_spi_resume(struct platform_device *pdev)
++{
++	struct spi_master	*master = platform_get_drvdata(pdev);
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++
++	clk_enable(as->clk);
++	return 0;
++}
++
++#else
++#define	atmel_spi_suspend	NULL
++#define	atmel_spi_resume	NULL
++#endif
++
++
++static struct platform_driver atmel_spi_driver = {
++	.driver		= {
++		.name	= "atmel_spi",
++		.owner	= THIS_MODULE,
++	},
++	.suspend	= atmel_spi_suspend,
++	.resume		= atmel_spi_resume,
++	.remove		= __exit_p(atmel_spi_remove),
++};
++
++static int __init atmel_spi_init(void)
++{
++	return platform_driver_probe(&atmel_spi_driver, atmel_spi_probe);
++}
++module_init(atmel_spi_init);
++
++static void __exit atmel_spi_exit(void)
++{
++	platform_driver_unregister(&atmel_spi_driver);
++}
++module_exit(atmel_spi_exit);
++
++MODULE_DESCRIPTION("Atmel AT32/AT91 SPI Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/spi/atmel_spi.h linux-2.6.20.4-atmel/drivers/spi/atmel_spi.h
+--- linux-2.6.20.4-0rig/drivers/spi/atmel_spi.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/spi/atmel_spi.h	2007-03-24 16:43:57.000000000 +0100
+@@ -0,0 +1,167 @@
++/*
++ * Register definitions for Atmel Serial Peripheral Interface (SPI)
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ATMEL_SPI_H__
++#define __ATMEL_SPI_H__
++
++/* SPI register offsets */
++#define SPI_CR					0x0000
++#define SPI_MR					0x0004
++#define SPI_RDR					0x0008
++#define SPI_TDR					0x000c
++#define SPI_SR					0x0010
++#define SPI_IER					0x0014
++#define SPI_IDR					0x0018
++#define SPI_IMR					0x001c
++#define SPI_CSR0				0x0030
++#define SPI_CSR1				0x0034
++#define SPI_CSR2				0x0038
++#define SPI_CSR3				0x003c
++#define SPI_RPR					0x0100
++#define SPI_RCR					0x0104
++#define SPI_TPR					0x0108
++#define SPI_TCR					0x010c
++#define SPI_RNPR				0x0110
++#define SPI_RNCR				0x0114
++#define SPI_TNPR				0x0118
++#define SPI_TNCR				0x011c
++#define SPI_PTCR				0x0120
++#define SPI_PTSR				0x0124
++
++/* Bitfields in CR */
++#define SPI_SPIEN_OFFSET			0
++#define SPI_SPIEN_SIZE				1
++#define SPI_SPIDIS_OFFSET			1
++#define SPI_SPIDIS_SIZE				1
++#define SPI_SWRST_OFFSET			7
++#define SPI_SWRST_SIZE				1
++#define SPI_LASTXFER_OFFSET			24
++#define SPI_LASTXFER_SIZE			1
++
++/* Bitfields in MR */
++#define SPI_MSTR_OFFSET				0
++#define SPI_MSTR_SIZE				1
++#define SPI_PS_OFFSET				1
++#define SPI_PS_SIZE				1
++#define SPI_PCSDEC_OFFSET			2
++#define SPI_PCSDEC_SIZE				1
++#define SPI_FDIV_OFFSET				3
++#define SPI_FDIV_SIZE				1
++#define SPI_MODFDIS_OFFSET			4
++#define SPI_MODFDIS_SIZE			1
++#define SPI_LLB_OFFSET				7
++#define SPI_LLB_SIZE				1
++#define SPI_PCS_OFFSET				16
++#define SPI_PCS_SIZE				4
++#define SPI_DLYBCS_OFFSET			24
++#define SPI_DLYBCS_SIZE				8
++
++/* Bitfields in RDR */
++#define SPI_RD_OFFSET				0
++#define SPI_RD_SIZE				16
++
++/* Bitfields in TDR */
++#define SPI_TD_OFFSET				0
++#define SPI_TD_SIZE				16
++
++/* Bitfields in SR */
++#define SPI_RDRF_OFFSET				0
++#define SPI_RDRF_SIZE				1
++#define SPI_TDRE_OFFSET				1
++#define SPI_TDRE_SIZE				1
++#define SPI_MODF_OFFSET				2
++#define SPI_MODF_SIZE				1
++#define SPI_OVRES_OFFSET			3
++#define SPI_OVRES_SIZE				1
++#define SPI_ENDRX_OFFSET			4
++#define SPI_ENDRX_SIZE				1
++#define SPI_ENDTX_OFFSET			5
++#define SPI_ENDTX_SIZE				1
++#define SPI_RXBUFF_OFFSET			6
++#define SPI_RXBUFF_SIZE				1
++#define SPI_TXBUFE_OFFSET			7
++#define SPI_TXBUFE_SIZE				1
++#define SPI_NSSR_OFFSET				8
++#define SPI_NSSR_SIZE				1
++#define SPI_TXEMPTY_OFFSET			9
++#define SPI_TXEMPTY_SIZE			1
++#define SPI_SPIENS_OFFSET			16
++#define SPI_SPIENS_SIZE				1
++
++/* Bitfields in CSR0 */
++#define SPI_CPOL_OFFSET				0
++#define SPI_CPOL_SIZE				1
++#define SPI_NCPHA_OFFSET			1
++#define SPI_NCPHA_SIZE				1
++#define SPI_CSAAT_OFFSET			3
++#define SPI_CSAAT_SIZE				1
++#define SPI_BITS_OFFSET				4
++#define SPI_BITS_SIZE				4
++#define SPI_SCBR_OFFSET				8
++#define SPI_SCBR_SIZE				8
++#define SPI_DLYBS_OFFSET			16
++#define SPI_DLYBS_SIZE				8
++#define SPI_DLYBCT_OFFSET			24
++#define SPI_DLYBCT_SIZE				8
++
++/* Bitfields in RCR */
++#define SPI_RXCTR_OFFSET			0
++#define SPI_RXCTR_SIZE				16
++
++/* Bitfields in TCR */
++#define SPI_TXCTR_OFFSET			0
++#define SPI_TXCTR_SIZE				16
++
++/* Bitfields in RNCR */
++#define SPI_RXNCR_OFFSET			0
++#define SPI_RXNCR_SIZE				16
++
++/* Bitfields in TNCR */
++#define SPI_TXNCR_OFFSET			0
++#define SPI_TXNCR_SIZE				16
++
++/* Bitfields in PTCR */
++#define SPI_RXTEN_OFFSET			0
++#define SPI_RXTEN_SIZE				1
++#define SPI_RXTDIS_OFFSET			1
++#define SPI_RXTDIS_SIZE				1
++#define SPI_TXTEN_OFFSET			8
++#define SPI_TXTEN_SIZE				1
++#define SPI_TXTDIS_OFFSET			9
++#define SPI_TXTDIS_SIZE				1
++
++/* Constants for BITS */
++#define SPI_BITS_8_BPT				0
++#define SPI_BITS_9_BPT				1
++#define SPI_BITS_10_BPT				2
++#define SPI_BITS_11_BPT				3
++#define SPI_BITS_12_BPT				4
++#define SPI_BITS_13_BPT				5
++#define SPI_BITS_14_BPT				6
++#define SPI_BITS_15_BPT				7
++#define SPI_BITS_16_BPT				8
++
++/* Bit manipulation macros */
++#define SPI_BIT(name) \
++	(1 << SPI_##name##_OFFSET)
++#define SPI_BF(name,value) \
++	(((value) & ((1 << SPI_##name##_SIZE) - 1)) << SPI_##name##_OFFSET)
++#define SPI_BFEXT(name,value) \
++	(((value) >> SPI_##name##_OFFSET) & ((1 << SPI_##name##_SIZE) - 1))
++#define SPI_BFINS(name,value,old) \
++	( ((old) & ~(((1 << SPI_##name##_SIZE) - 1) << SPI_##name##_OFFSET)) \
++	  | SPI_BF(name,value))
++
++/* Register access macros */
++#define spi_readl(port,reg) \
++	__raw_readl((port)->regs + SPI_##reg)
++#define spi_writel(port,reg,value) \
++	__raw_writel((value), (port)->regs + SPI_##reg)
++
++#endif /* __ATMEL_SPI_H__ */
+diff -urN linux-2.6.20.4-0rig/drivers/spi/Kconfig linux-2.6.20.4-atmel/drivers/spi/Kconfig
+--- linux-2.6.20.4-0rig/drivers/spi/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/spi/Kconfig	2007-03-24 16:43:49.000000000 +0100
+@@ -51,6 +51,21 @@
+ comment "SPI Master Controller Drivers"
+ 	depends on SPI_MASTER
+ 
++config SPI_ATMEL
++	tristate "Atmel SPI Controller"
++	depends on (ARCH_AT91 || AVR32) && SPI_MASTER
++	select SPI_AT91_MANUAL_CS if ARCH_AT91RM9200
++	help
++	  This selects a driver for the Atmel SPI Controller, present on
++	  many AT32 (AVR32) and AT91 (ARM) chips.
++
++config SPI_ATMEL
++	tristate "Atmel SPI Controller"
++	depends on (ARCH_AT91 || AVR32) && SPI_MASTER
++	help
++	  This selects a driver for the Atmel SPI Controller, present on
++	  many AT32 (AVR32) and AT91 (ARM) chips.
++
+ config SPI_BITBANG
+ 	tristate "Bitbanging SPI master"
+ 	depends on SPI_MASTER && EXPERIMENTAL
+@@ -75,6 +90,24 @@
+ 	  inexpensive battery powered microcontroller evaluation board.
+ 	  This same cable can be used to flash new firmware.
+ 
++config SPI_AT91
++	tristate "AT91RM9200 Bitbang SPI Master"
++	depends on SPI_MASTER && ARCH_AT91RM9200 && !SPI_ATMEL && EXPERIMENTAL
++	select SPI_BITBANG
++	select SPI_AT91_MANUAL_CS
++	help
++	  This is dumb PIO bitbanging driver for the Atmel AT91RM9200.
++	  The SPI_ATMEL driver will be its replacement, using the native
++	  SPI hardware and its DMA controller.
++
++config SPI_AT91_MANUAL_CS
++	bool
++	depends on ARCH_AT91RM9200
++	help
++	  Works around an AT91RM9200 problem whereby the SPI chip-select
++	  will be wrongly disabled.  The workaround uses those pins as
++	  GPIOs instead of letting the SPI controller manage them.
++
+ config SPI_MPC83xx
+ 	tristate "Freescale MPC83xx SPI controller"
+ 	depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL
+diff -urN linux-2.6.20.4-0rig/drivers/spi/Makefile linux-2.6.20.4-atmel/drivers/spi/Makefile
+--- linux-2.6.20.4-0rig/drivers/spi/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/spi/Makefile	2007-03-24 16:39:15.000000000 +0100
+@@ -12,11 +12,14 @@
+ 
+ # SPI master controller drivers (bus)
+ obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o
++obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
+ obj-$(CONFIG_SPI_BUTTERFLY)		+= spi_butterfly.o
+ obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o
+ obj-$(CONFIG_SPI_MPC83xx)		+= spi_mpc83xx.o
+ obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o
+ obj-$(CONFIG_SPI_S3C24XX)		+= spi_s3c24xx.o
++obj-$(CONFIG_SPI_AT91)			+= spi_at91_bitbang.o
++obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o
+ # 	... add above this line ...
+ 
+ # SPI protocol drivers (device/link on bus)
+diff -urN linux-2.6.20.4-0rig/drivers/spi/spi_at91_bitbang.c linux-2.6.20.4-atmel/drivers/spi/spi_at91_bitbang.c
+--- linux-2.6.20.4-0rig/drivers/spi/spi_at91_bitbang.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/spi/spi_at91_bitbang.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,207 @@
++/*
++ * at91_spi.c - at91 SPI driver (BOOTSTRAP/BITBANG VERSION)
++ *
++ * Copyright (C) 2006 David Brownell
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_bitbang.h>
++
++#include <asm/arch/gpio.h>
++
++
++/*
++ * FIXME this bitbanging version is just to help bootstrap systems until
++ * there's a native SPI+IRQ+DMA controller driver ... such a driver should
++ * be a drop-in replacement for this one, and much faster.
++ *
++ * remember:
++ *
++ *	- other at91 parts (like at91sam9) have multiple controllers
++ *	  and different pin muxing; this version is at91rm9200 specfic.
++ *
++ *	- at91sam9261 SPI0 pins are directly muxed with MMC/SD pins.
++ *
++ *	- rm9200 spi chipselects drop wrongly, so the native driver
++ *	  will need to use gpios much like this does.
++ *
++ *	- real hardware only allows 8..16 bits per word, while this
++ *	  bitbanger allows 1..32 (incompatible superset).
++ *
++ *	- this disregards clock parameters.  with inlined gpio calls,
++ *	  gcc 3.4.4 produces about 1.5 mbit/sec, more than 2x faster
++ *	  than using the subroutined veresion from txrx_word().
++ *
++ *	- suspend/resume and <linux/clk.h> support is missing ...
++ */
++
++#define	spi_miso_bit	AT91_PIN_PA0
++#define	spi_mosi_bit	AT91_PIN_PA1
++#define	spi_sck_bit	AT91_PIN_PA2
++
++struct at91_spi {
++	struct spi_bitbang	bitbang;
++	struct platform_device	*pdev;
++};
++
++/*----------------------------------------------------------------------*/
++
++static inline void setsck(struct spi_device *spi, int is_on)
++{
++	at91_set_gpio_value(spi_sck_bit, is_on);
++}
++
++static inline void setmosi(struct spi_device *spi, int is_on)
++{
++	at91_set_gpio_value(spi_mosi_bit, is_on);
++}
++
++static inline int getmiso(struct spi_device *spi)
++{
++	return at91_get_gpio_value(spi_miso_bit);
++}
++
++static void at91_spi_chipselect(struct spi_device *spi, int is_active)
++{
++	unsigned long cs = (unsigned long) spi->controller_data;
++
++	/* set default clock polarity */
++	if (is_active)
++		setsck(spi, spi->mode & SPI_CPOL);
++
++	/* only support active-low (default) */
++	at91_set_gpio_value(cs, !is_active);
++}
++
++/*
++ * NOTE:  this is "as fast as we can"; it should be a function of
++ * the device clock ...
++ */
++#define	spidelay(X)	do{} while(0)
++
++#define	EXPAND_BITBANG_TXRX
++#include <linux/spi/spi_bitbang.h>
++
++static u32 at91_spi_txrx_word_mode0(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, 8);
++}
++
++static u32 at91_spi_txrx_word_mode1(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, 8);
++}
++
++static u32 at91_spi_txrx_word_mode2(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, 8);
++}
++
++static u32 at91_spi_txrx_word_mode3(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, 8);
++}
++
++/*----------------------------------------------------------------------*/
++
++static int __init at91_spi_probe(struct platform_device *pdev)
++{
++	int			status;
++	struct spi_master	*master;
++	struct at91_spi		*at91_spi;
++
++	if (pdev->id != 0)	/* SPI0 bus */
++		return -EINVAL;
++
++	master = spi_alloc_master(&pdev->dev, sizeof *at91_spi);
++	if (!master)
++		return -ENOMEM;
++
++	at91_spi = spi_master_get_devdata(master);
++	at91_spi->pdev = pdev;
++	platform_set_drvdata(pdev, at91_spi);
++
++	/* SPI and bitbang hookup */
++	master->bus_num = 0;
++	master->num_chipselect = 4;
++
++	at91_spi->bitbang.master = spi_master_get(master);
++	at91_spi->bitbang.chipselect = at91_spi_chipselect;
++	at91_spi->bitbang.txrx_word[SPI_MODE_0] = at91_spi_txrx_word_mode0;
++	at91_spi->bitbang.txrx_word[SPI_MODE_1] = at91_spi_txrx_word_mode1;
++	at91_spi->bitbang.txrx_word[SPI_MODE_2] = at91_spi_txrx_word_mode2;
++	at91_spi->bitbang.txrx_word[SPI_MODE_3] = at91_spi_txrx_word_mode3;
++
++	status = spi_bitbang_start(&at91_spi->bitbang);
++	if (status < 0)
++		(void) spi_master_put(at91_spi->bitbang.master);
++
++	return status;
++}
++
++static int __exit at91_spi_remove(struct platform_device *pdev)
++{
++	struct at91_spi	*at91_spi = platform_get_drvdata(pdev);
++	int status;
++
++	/* stop() unregisters child devices too */
++	status = spi_bitbang_stop(&at91_spi->bitbang);
++	(void) spi_master_put(at91_spi->bitbang.master);
++
++	platform_set_drvdata(pdev, NULL);
++	return status;
++}
++
++static struct platform_driver at91_spi_driver = {
++	.probe		= at91_spi_probe,
++	.remove		= __exit_p(at91_spi_remove),
++	.driver		= {
++		.name	= "at91_spi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at91_spi_init(void)
++{
++	at91_set_gpio_output(spi_sck_bit, 0);
++	at91_set_gpio_output(spi_mosi_bit, 0);
++	at91_set_gpio_input(spi_miso_bit, 1 /* pullup */);
++
++	/* register driver */
++	return platform_driver_register(&at91_spi_driver);
++}
++
++static void __exit at91_spi_exit(void)
++{
++	platform_driver_unregister(&at91_spi_driver);
++}
++
++device_initcall(at91_spi_init);
++module_exit(at91_spi_exit);
++
++MODULE_ALIAS("at91_spi.0");
++
++MODULE_DESCRIPTION("AT91 SPI support (BOOTSTRAP/BITBANG VERSION)");
++MODULE_AUTHOR("David Brownell");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/at91_udc.c linux-2.6.20.4-atmel/drivers/usb/gadget/at91_udc.c
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/at91_udc.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/at91_udc.c	2007-03-24 16:39:15.000000000 +0100
+@@ -287,8 +287,8 @@
+ 	ep->stopped = stopped;
+ 
+ 	/* ep0 is always ready; other endpoints need a non-empty queue */
+-	if (list_empty(&ep->queue) && ep->int_mask != (1 << 0))
+-		at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask);
++	if (list_empty(&ep->queue) && (ep->id != 0))
++		at91_udp_write(udc, AT91_UDP_IDR, 1 << ep->id);
+ }
+ 
+ /*-------------------------------------------------------------------------*/
+@@ -541,7 +541,7 @@
+ 	 * reset/init endpoint fifo.  NOTE:  leaves fifo_bank alone,
+ 	 * since endpoint resets don't reset hw pingpong state.
+ 	 */
+-	at91_udp_write(dev, AT91_UDP_RST_EP, ep->int_mask);
++	at91_udp_write(dev, AT91_UDP_RST_EP, 1 << ep->id);
+ 	at91_udp_write(dev, AT91_UDP_RST_EP, 0);
+ 
+ 	local_irq_restore(flags);
+@@ -567,7 +567,7 @@
+ 
+ 	/* reset fifos and endpoint */
+ 	if (ep->udc->clocked) {
+-		at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
++		at91_udp_write(udc, AT91_UDP_RST_EP, 1 << ep->id);
+ 		at91_udp_write(udc, AT91_UDP_RST_EP, 0);
+ 		__raw_writel(0, ep->creg);
+ 	}
+@@ -715,7 +715,7 @@
+ 
+ 	if (req && !status) {
+ 		list_add_tail (&req->queue, &ep->queue);
+-		at91_udp_write(dev, AT91_UDP_IER, ep->int_mask);
++		at91_udp_write(dev, AT91_UDP_IER, 1 << ep->id);
+ 	}
+ done:
+ 	local_irq_restore(flags);
+@@ -774,7 +774,7 @@
+ 			csr |= AT91_UDP_FORCESTALL;
+ 			VDBG("halt %s\n", ep->ep.name);
+ 		} else {
+-			at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
++			at91_udp_write(udc, AT91_UDP_RST_EP, 1 << ep->id);
+ 			at91_udp_write(udc, AT91_UDP_RST_EP, 0);
+ 			csr &= ~AT91_UDP_FORCESTALL;
+ 		}
+@@ -913,14 +913,15 @@
+ 		at91_udp_write(udc, AT91_UDP_TXVC, 0);
+ 		if (cpu_is_at91rm9200())
+ 			at91_set_gpio_value(udc->board.pullup_pin, 1);
+-		else if (cpu_is_at91sam9260()) {
++		else if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) {
+ 			u32	txvc = at91_udp_read(udc, AT91_UDP_TXVC);
+-
++			
+ 			txvc |= AT91_UDP_TXVC_PUON;
+ 			at91_udp_write(udc, AT91_UDP_TXVC, txvc);
+-		} else if (cpu_is_at91sam9261()) {
++		}
++		else if (cpu_is_at91sam9261()) {
+ 			u32	usbpucr;
+-
++			
+ 			usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
+ 			usbpucr |= AT91_MATRIX_USBPUCR_PUON;
+ 			at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
+@@ -928,20 +929,20 @@
+ 	} else {
+ 		stop_activity(udc);
+ 		at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS);
+-		if (cpu_is_at91rm9200())
+-			at91_set_gpio_value(udc->board.pullup_pin, 0);
+-		else if (cpu_is_at91sam9260()) {
+-			u32	txvc = at91_udp_read(udc, AT91_UDP_TXVC);
+-
+-			txvc &= ~AT91_UDP_TXVC_PUON;
+-			at91_udp_write(udc, AT91_UDP_TXVC, txvc);
+-		} else if (cpu_is_at91sam9261()) {
+-			u32	usbpucr;
+-
+-			usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
+-			usbpucr &= ~AT91_MATRIX_USBPUCR_PUON;
+-			at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
+-		}
++ 		if (cpu_is_at91rm9200())
++ 			at91_set_gpio_value(udc->board.pullup_pin, 0);
++ 		else if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) {
++ 			u32	txvc = at91_udp_read(udc, AT91_UDP_TXVC);
++ 
++ 			txvc &= ~AT91_UDP_TXVC_PUON;
++ 			at91_udp_write(udc, AT91_UDP_TXVC, txvc);
++ 		} else if (cpu_is_at91sam9261()) {
++ 			u32	usbpucr;
++ 
++ 			usbpucr = at91_sys_read(AT91_MATRIX_USBPUCR);
++ 			usbpucr &= ~AT91_MATRIX_USBPUCR_PUON;
++ 			at91_sys_write(AT91_MATRIX_USBPUCR, usbpucr);
++ 		}
+ 		clk_off(udc);
+ 	}
+ }
+@@ -1228,7 +1229,7 @@
+ 		} else if (ep->is_in)
+ 			goto stall;
+ 
+-		at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask);
++		at91_udp_write(udc, AT91_UDP_RST_EP, 1 << ep->id);
+ 		at91_udp_write(udc, AT91_UDP_RST_EP, 0);
+ 		tmp = __raw_readl(ep->creg);
+ 		tmp |= CLR_FX;
+@@ -1504,15 +1505,16 @@
+ 		}
+ 	},
+ 	.ep[0] = {
++		.id		= 0,
+ 		.ep = {
+ 			.name	= ep0name,
+ 			.ops	= &at91_ep_ops,
+ 		},
+ 		.udc		= &controller,
+ 		.maxpacket	= 8,
+-		.int_mask	= 1 << 0,
+ 	},
+ 	.ep[1] = {
++		.id		= 1,
+ 		.ep = {
+ 			.name	= "ep1",
+ 			.ops	= &at91_ep_ops,
+@@ -1520,9 +1522,9 @@
+ 		.udc		= &controller,
+ 		.is_pingpong	= 1,
+ 		.maxpacket	= 64,
+-		.int_mask	= 1 << 1,
+ 	},
+ 	.ep[2] = {
++		.id		= 2,
+ 		.ep = {
+ 			.name	= "ep2",
+ 			.ops	= &at91_ep_ops,
+@@ -1530,9 +1532,9 @@
+ 		.udc		= &controller,
+ 		.is_pingpong	= 1,
+ 		.maxpacket	= 64,
+-		.int_mask	= 1 << 2,
+ 	},
+ 	.ep[3] = {
++		.id		= 3,
+ 		.ep = {
+ 			/* could actually do bulk too */
+ 			.name	= "ep3-int",
+@@ -1540,9 +1542,9 @@
+ 		},
+ 		.udc		= &controller,
+ 		.maxpacket	= 8,
+-		.int_mask	= 1 << 3,
+ 	},
+ 	.ep[4] = {
++		.id		= 4,
+ 		.ep = {
+ 			.name	= "ep4",
+ 			.ops	= &at91_ep_ops,
+@@ -1550,9 +1552,9 @@
+ 		.udc		= &controller,
+ 		.is_pingpong	= 1,
+ 		.maxpacket	= 256,
+-		.int_mask	= 1 << 4,
+ 	},
+ 	.ep[5] = {
++		.id		= 5,
+ 		.ep = {
+ 			.name	= "ep5",
+ 			.ops	= &at91_ep_ops,
+@@ -1560,7 +1562,6 @@
+ 		.udc		= &controller,
+ 		.is_pingpong	= 1,
+ 		.maxpacket	= 256,
+-		.int_mask	= 1 << 5,
+ 	},
+ 	/* ep6 and ep7 are also reserved (custom silicon might use them) */
+ };
+@@ -1679,9 +1680,7 @@
+ 	if (!res)
+ 		return -ENXIO;
+ 
+-	if (!request_mem_region(res->start,
+-			res->end - res->start + 1,
+-			driver_name)) {
++	if (!request_mem_region(res->start, res->end - res->start + 1, driver_name)) {
+ 		DBG("someone's using UDC memory\n");
+ 		return -EBUSY;
+ 	}
+@@ -1807,16 +1806,13 @@
+ 			|| !wake
+ 			|| at91_suspend_entering_slow_clock()) {
+ 		pullup(udc, 0);
+-		disable_irq_wake(udc->udp_irq);
++		wake = 0;
+ 	} else
+ 		enable_irq_wake(udc->udp_irq);
+ 
+-	if (udc->board.vbus_pin > 0) {
+-		if (wake)
+-			enable_irq_wake(udc->board.vbus_pin);
+-		else
+-			disable_irq_wake(udc->board.vbus_pin);
+-	}
++	udc->active_suspend = wake;
++	if (udc->board.vbus_pin > 0 && wake)
++		enable_irq_wake(udc->board.vbus_pin);
+ 	return 0;
+ }
+ 
+@@ -1824,8 +1820,14 @@
+ {
+ 	struct at91_udc *udc = platform_get_drvdata(pdev);
+ 
++	if (udc->board.vbus_pin > 0 && udc->active_suspend)
++		disable_irq_wake(udc->board.vbus_pin);
++
+ 	/* maybe reconnect to host; if so, clocks on */
+-	pullup(udc, 1);
++	if (udc->active_suspend)
++		disable_irq_wake(udc->udp_irq);
++	else
++		pullup(udc, 1);
+ 	return 0;
+ }
+ #else
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/at91_udc.h linux-2.6.20.4-atmel/drivers/usb/gadget/at91_udc.h
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/at91_udc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/at91_udc.h	2007-03-24 16:39:15.000000000 +0100
+@@ -105,10 +105,10 @@
+ 	struct usb_ep			ep;
+ 	struct list_head		queue;
+ 	struct at91_udc			*udc;
++	u8				id;
+ 	void __iomem			*creg;
+ 
+ 	unsigned			maxpacket:16;
+-	u8				int_mask;
+ 	unsigned			is_pingpong:1;
+ 
+ 	unsigned			stopped:1;
+@@ -136,6 +136,7 @@
+ 	unsigned			wait_for_addr_ack:1;
+ 	unsigned			wait_for_config_ack:1;
+ 	unsigned			selfpowered:1;
++	unsigned			active_suspend:1;
+ 	u8				addr;
+ 	struct at91_udc_data		board;
+ 	struct clk			*iclk, *fclk;
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/ether.c linux-2.6.20.4-atmel/drivers/usb/gadget/ether.c
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/ether.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/ether.c	2007-03-24 16:42:28.000000000 +0100
+@@ -266,6 +266,10 @@
+ #define DEV_CONFIG_CDC
+ #endif
+ 
++#ifdef CONFIG_USB_GADGET_HUSB2DEV
++#define DEV_CONFIG_CDC
++#endif
++
+ 
+ /* For CDC-incapable hardware, choose the simple cdc subset.
+  * Anything that talks bulk (without notable bugs) can do this.
+@@ -428,7 +432,7 @@
+ #define DEV_RNDIS_CONFIG_VALUE	2	/* rndis; optional */
+ 
+ static struct usb_device_descriptor
+-device_desc = {
++device_desc __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof device_desc,
+ 	.bDescriptorType =	USB_DT_DEVICE,
+ 
+@@ -454,7 +458,7 @@
+ };
+ 
+ static struct usb_config_descriptor
+-eth_config = {
++eth_config __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof eth_config,
+ 	.bDescriptorType =	USB_DT_CONFIG,
+ 
+@@ -468,7 +472,7 @@
+ 
+ #ifdef	CONFIG_USB_ETH_RNDIS
+ static struct usb_config_descriptor
+-rndis_config = {
++rndis_config __attribute__((aligned(2))) = {
+ 	.bLength =              sizeof rndis_config,
+ 	.bDescriptorType =      USB_DT_CONFIG,
+ 
+@@ -493,7 +497,7 @@
+ 
+ #ifdef	DEV_CONFIG_CDC
+ static struct usb_interface_descriptor
+-control_intf = {
++control_intf __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof control_intf,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -509,7 +513,7 @@
+ 
+ #ifdef	CONFIG_USB_ETH_RNDIS
+ static const struct usb_interface_descriptor
+-rndis_control_intf = {
++rndis_control_intf __attribute__((aligned(2))) = {
+ 	.bLength =              sizeof rndis_control_intf,
+ 	.bDescriptorType =      USB_DT_INTERFACE,
+ 
+@@ -524,7 +528,7 @@
+ 
+ #if defined(DEV_CONFIG_CDC) || defined(CONFIG_USB_ETH_RNDIS)
+ 
+-static const struct usb_cdc_header_desc header_desc = {
++static const struct usb_cdc_header_desc __attribute__((aligned(2))) header_desc = {
+ 	.bLength =		sizeof header_desc,
+ 	.bDescriptorType =	USB_DT_CS_INTERFACE,
+ 	.bDescriptorSubType =	USB_CDC_HEADER_TYPE,
+@@ -566,7 +570,8 @@
+ 
+ #ifdef	DEV_CONFIG_CDC
+ 
+-static const struct usb_cdc_ether_desc ether_desc = {
++static const struct usb_cdc_ether_desc
++ether_desc __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof ether_desc,
+ 	.bDescriptorType =	USB_DT_CS_INTERFACE,
+ 	.bDescriptorSubType =	USB_CDC_ETHERNET_TYPE,
+@@ -601,7 +606,7 @@
+ #define STATUS_BYTECOUNT		16	/* 8 byte header + data */
+ 
+ static struct usb_endpoint_descriptor
+-fs_status_desc = {
++fs_status_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -632,7 +637,7 @@
+ /* ... but the "real" data interface has two bulk endpoints */
+ 
+ static const struct usb_interface_descriptor
+-data_intf = {
++data_intf __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof data_intf,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -652,7 +657,7 @@
+ /* RNDIS doesn't activate by changing to the "real" altsetting */
+ 
+ static const struct usb_interface_descriptor
+-rndis_data_intf = {
++rndis_data_intf __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof rndis_data_intf,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -675,7 +680,7 @@
+  */
+ 
+ static const struct usb_interface_descriptor
+-subset_data_intf = {
++subset_data_intf __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof subset_data_intf,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -692,7 +697,7 @@
+ 
+ 
+ static struct usb_endpoint_descriptor
+-fs_source_desc = {
++fs_source_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -701,7 +706,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-fs_sink_desc = {
++fs_sink_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -767,7 +772,7 @@
+ 
+ #if defined(DEV_CONFIG_CDC) || defined(CONFIG_USB_ETH_RNDIS)
+ static struct usb_endpoint_descriptor
+-hs_status_desc = {
++hs_status_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -778,7 +783,7 @@
+ #endif /* DEV_CONFIG_CDC */
+ 
+ static struct usb_endpoint_descriptor
+-hs_source_desc = {
++hs_source_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -787,7 +792,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-hs_sink_desc = {
++hs_sink_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -796,7 +801,7 @@
+ };
+ 
+ static struct usb_qualifier_descriptor
+-dev_qualifier = {
++dev_qualifier __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof dev_qualifier,
+ 	.bDescriptorType =	USB_DT_DEVICE_QUALIFIER,
+ 
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/file_storage.c linux-2.6.20.4-atmel/drivers/usb/gadget/file_storage.c
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/file_storage.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/file_storage.c	2007-03-24 16:42:28.000000000 +0100
+@@ -854,7 +854,7 @@
+ #define	CONFIG_VALUE		1
+ 
+ static struct usb_device_descriptor
+-device_desc = {
++device_desc __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof device_desc,
+ 	.bDescriptorType =	USB_DT_DEVICE,
+ 
+@@ -873,7 +873,7 @@
+ };
+ 
+ static struct usb_config_descriptor
+-config_desc = {
++config_desc __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof config_desc,
+ 	.bDescriptorType =	USB_DT_CONFIG,
+ 
+@@ -896,7 +896,7 @@
+ /* There is only one interface. */
+ 
+ static struct usb_interface_descriptor
+-intf_desc = {
++intf_desc __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof intf_desc,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -911,7 +911,7 @@
+  * and interrupt-in. */
+ 
+ static struct usb_endpoint_descriptor
+-fs_bulk_in_desc = {
++fs_bulk_in_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -921,7 +921,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-fs_bulk_out_desc = {
++fs_bulk_out_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -931,7 +931,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-fs_intr_in_desc = {
++fs_intr_in_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -963,7 +963,7 @@
+  * for the config descriptor.
+  */
+ static struct usb_qualifier_descriptor
+-dev_qualifier = {
++dev_qualifier __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof dev_qualifier,
+ 	.bDescriptorType =	USB_DT_DEVICE_QUALIFIER,
+ 
+@@ -974,7 +974,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-hs_bulk_in_desc = {
++hs_bulk_in_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -984,7 +984,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-hs_bulk_out_desc = {
++hs_bulk_out_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -995,7 +995,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-hs_intr_in_desc = {
++hs_intr_in_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/gadget_chips.h linux-2.6.20.4-atmel/drivers/usb/gadget/gadget_chips.h
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/gadget_chips.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/gadget_chips.h	2007-03-24 16:42:29.000000000 +0100
+@@ -75,6 +75,12 @@
+ #define	gadget_is_pxa27x(g)	0
+ #endif
+ 
++#ifdef CONFIG_USB_GADGET_HUSB2DEV
++#define gadget_is_husb2dev(g)	!strcmp("husb2_udc", (g)->name)
++#else
++#define gadget_is_husb2dev(g)	0
++#endif
++
+ #ifdef CONFIG_USB_GADGET_S3C2410
+ #define gadget_is_s3c2410(g)    !strcmp("s3c2410_udc", (g)->name)
+ #else
+@@ -169,5 +175,7 @@
+ 		return 0x16;
+ 	else if (gadget_is_mpc8272(gadget))
+ 		return 0x17;
++	else if (gadget_is_husb2dev(gadget))
++		return 0x80;
+ 	return -ENOENT;
+ }
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/husb2_udc.c linux-2.6.20.4-atmel/drivers/usb/gadget/husb2_udc.c
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/husb2_udc.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/husb2_udc.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,1997 @@
++/*
++ * Driver for the Atmel HUSB2device high speed USB device controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#undef DEBUG
++
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/list.h>
++#include <linux/platform_device.h>
++#include <linux/usb_ch9.h>
++#include <linux/usb_gadget.h>
++#include <linux/dmapool.h>
++#include <linux/delay.h>
++
++#include <asm/io.h>
++
++#include "husb2_udc.h"
++
++#define DRIVER_VERSION	"0.9"
++
++#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++
++#define FIFO_IOMEM_ID	0
++#define CTRL_IOMEM_ID	1
++
++#ifdef DEBUG
++#define DBG_ERR		0x0001	/* report all error returns */
++#define DBG_HW		0x0002	/* debug hardware initialization */
++#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
++#define DBG_INT		0x0008	/* interrupts */
++#define DBG_BUS		0x0010	/* report changes in bus state */
++#define DBG_QUEUE	0x0020  /* debug request queue processing */
++#define DBG_FIFO	0x0040  /* debug FIFO contents */
++#define DBG_DMA		0x0080  /* debug DMA handling */
++#define DBG_REQ		0x0100	/* print out queued request length */
++#define DBG_ALL		0xffff
++#define DBG_NONE	0x0000
++
++#define DEBUG_LEVEL	(DBG_ERR|DBG_REQ)
++#define DBG(level, fmt, ...)					\
++	do {							\
++		if ((level) & DEBUG_LEVEL)			\
++			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
++	} while (0)
++#else
++#define DBG(level, fmt...)
++#endif
++
++static struct husb2_udc the_udc;
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++#include <asm/uaccess.h>
++
++static int queue_dbg_open(struct inode *inode, struct file *file)
++{
++	struct husb2_ep *ep = inode->i_private;
++	struct husb2_request *req, *req_copy;
++	struct list_head *queue_data;
++
++	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
++	if (!queue_data)
++		return -ENOMEM;
++	INIT_LIST_HEAD(queue_data);
++
++	spin_lock_irq(&ep->udc->lock);
++	list_for_each_entry(req, &ep->queue, queue) {
++		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
++		if (!req_copy)
++			goto fail;
++		memcpy(req_copy, req, sizeof(*req_copy));
++		list_add_tail(&req_copy->queue, queue_data);
++	}
++	spin_unlock_irq(&ep->udc->lock);
++
++	file->private_data = queue_data;
++	return 0;
++
++fail:
++	spin_unlock_irq(&ep->udc->lock);
++	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return -ENOMEM;
++}
++
++/*
++ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
++ *
++ * b: buffer address
++ * l: buffer length
++ * I/i: interrupt/no interrupt
++ * Z/z: zero/no zero
++ * S/s: short ok/short not ok
++ * s: status
++ * n: nr_packets
++ * F/f: submitted/not submitted to FIFO
++ * D/d: using/not using DMA
++ * L/l: last transaction/not last transaction
++ */
++static ssize_t queue_dbg_read(struct file *file, char __user *buf,
++			      size_t nbytes, loff_t *ppos)
++{
++	struct list_head *queue = file->private_data;
++	struct husb2_request *req, *tmp_req;
++	size_t len, remaining, actual = 0;
++	char tmpbuf[38];
++
++	if (!access_ok(VERIFY_WRITE, buf, nbytes))
++		return -EFAULT;
++
++	mutex_lock(&file->f_dentry->d_inode->i_mutex);
++	list_for_each_entry_safe(req, tmp_req, queue, queue) {
++		len = snprintf(tmpbuf, sizeof(tmpbuf),
++			       "%8p %08x %c%c%c %5d %4u %c%c%c\n",
++			       req->req.buf, req->req.length,
++			       req->req.no_interrupt ? 'i' : 'I',
++			       req->req.zero ? 'Z' : 'z',
++			       req->req.short_not_ok ? 's' : 'S',
++			       req->req.status,
++			       req->nr_pkts,
++			       req->submitted ? 'F' : 'f',
++			       req->using_dma ? 'D' : 'd',
++			       req->last_transaction ? 'L' : 'l');
++		len = min(len, sizeof(tmpbuf));
++		if (len > nbytes)
++			break;
++
++		list_del(&req->queue);
++		kfree(req);
++
++		remaining = __copy_to_user(buf, tmpbuf, len);
++		actual += len - remaining;
++		if (remaining)
++			break;
++
++		nbytes -= len;
++		buf += len;
++	}
++	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
++
++	return actual;
++}
++
++static int queue_dbg_release(struct inode *inode, struct file *file)
++{
++	struct list_head *queue_data = file->private_data;
++	struct husb2_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return 0;
++}
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct husb2_udc *udc;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	udc = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&udc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(udc->regs + i * 4);
++	spin_unlock_irq(&udc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				       file->private_data,
++				       file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++const struct file_operations queue_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= queue_dbg_open,
++	.llseek		= no_llseek,
++	.read		= queue_dbg_read,
++	.release	= queue_dbg_release,
++};
++
++const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void husb2_ep_init_debugfs(struct husb2_udc *udc,
++				  struct husb2_ep *ep)
++{
++	struct dentry *ep_root;
++
++	ep_root = debugfs_create_dir(ep_name(ep), udc->debugfs_root);
++	if (!ep_root)
++		goto err_root;
++	ep->debugfs_dir = ep_root;
++
++	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
++						ep, &queue_dbg_fops);
++	if (!ep->debugfs_queue)
++		goto err_queue;
++
++	if (ep_can_dma(ep)) {
++		ep->debugfs_dma_status
++			= debugfs_create_u32("dma_status", 0400, ep_root,
++					     &ep->last_dma_status);
++		if (!ep->debugfs_dma_status)
++			goto err_dma_status;
++	}
++
++	return;
++
++err_dma_status:
++	debugfs_remove(ep->debugfs_queue);
++err_queue:
++	debugfs_remove(ep_root);
++err_root:
++	dev_err(&ep->udc->pdev->dev,
++		"failed to create debugfs directory for %s\n", ep_name(ep));
++}
++
++static void husb2_ep_cleanup_debugfs(struct husb2_ep *ep)
++{
++	debugfs_remove(ep->debugfs_queue);
++	debugfs_remove(ep->debugfs_dma_status);
++	debugfs_remove(ep->debugfs_dir);
++	ep->debugfs_dma_status = NULL;
++	ep->debugfs_dir = NULL;
++}
++
++static void husb2_init_debugfs(struct husb2_udc *udc)
++{
++	struct dentry *root, *regs;
++	struct resource *regs_resource;
++
++	root = debugfs_create_dir(udc->gadget.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	udc->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
++					      CTRL_IOMEM_ID);
++	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
++	udc->debugfs_regs = regs;
++
++	husb2_ep_init_debugfs(udc, to_husb2_ep(udc->gadget.ep0));
++
++	return;
++
++err_regs:
++	debugfs_remove(root);
++err_root:
++	udc->debugfs_root = NULL;
++	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++}
++
++static void husb2_cleanup_debugfs(struct husb2_udc *udc)
++{
++	husb2_ep_cleanup_debugfs(to_husb2_ep(udc->gadget.ep0));
++	debugfs_remove(udc->debugfs_regs);
++	debugfs_remove(udc->debugfs_root);
++	udc->debugfs_regs = NULL;
++	udc->debugfs_root = NULL;
++}
++#else
++static inline void husb2_ep_init_debugfs(struct husb2_udc *udc,
++					 struct husb2_ep *ep)
++{
++
++}
++
++static inline void husb2_ep_cleanup_debugfs(struct husb2_ep *ep)
++{
++
++}
++
++static inline void husb2_init_debugfs(struct husb2_udc *udc)
++{
++
++}
++
++static inline void husb2_cleanup_debugfs(struct husb2_udc *udc)
++{
++
++}
++#endif
++
++static void copy_to_fifo(void __iomem *fifo, void *buf, int len)
++{
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
++	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
++		tmp = *(unsigned long *)buf;
++		if (len >= 4) {
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++			__raw_writel(tmp, fifo);
++		} else {
++			do {
++				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
++				__raw_writeb(tmp >> 24, fifo);
++				fifo++;
++				tmp <<= 8;
++			} while (--len);
++			break;
++		}
++	}
++}
++
++static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++{
++	union {
++		unsigned long *w;
++		unsigned char *b;
++	} p;
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
++	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
++		if (len >= 4) {
++			tmp = __raw_readl(fifo);
++			*p.w = tmp;
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++		} else {
++			do {
++				tmp = __raw_readb(fifo);
++				*p.b = tmp;
++				DBG(DBG_FIFO, " -> %02lx\n", tmp);
++				fifo++, p.b++;
++			} while (--len);
++		}
++	}
++}
++
++static void next_fifo_transaction(struct husb2_ep *ep,
++				  struct husb2_request *req)
++{
++	unsigned int transaction_len;
++
++	transaction_len = req->req.length - req->req.actual;
++	req->last_transaction = 1;
++	if (transaction_len > ep->ep.maxpacket) {
++		transaction_len = ep->ep.maxpacket;
++		req->last_transaction = 0;
++	} else if (transaction_len == ep->ep.maxpacket
++		   && req->req.zero) {
++		req->last_transaction = 0;
++	}
++	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
++	    ep_name(ep), req, transaction_len,
++	    req->last_transaction ? ", done" : "");
++
++	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
++	husb2_ep_writel(ep, SET_STA, HUSB2_BIT(TX_PK_RDY));
++	req->req.actual += transaction_len;
++}
++
++static void submit_request(struct husb2_ep *ep, struct husb2_request *req)
++{
++	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
++	    ep_name(ep), req, req->req.length);
++
++	req->req.actual = 0;
++	req->submitted = 1;
++
++	if (req->using_dma) {
++		if (req->req.length == 0) {
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_PK_RDY));
++		} else {
++			husb2_ep_writel(ep, CTL_DIS, HUSB2_BIT(TX_PK_RDY));
++			husb2_dma_writel(ep, NXT_DSC,
++					 req->packet[0].desc_dma);
++			husb2_dma_writel(ep, CONTROL, HUSB2_BIT(DMA_LINK));
++		}
++	} else {
++		next_fifo_transaction(ep, req);
++		if (req->last_transaction)
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_COMPLETE));
++		else
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_PK_RDY));
++	}
++}
++
++static void submit_next_request(struct husb2_ep *ep)
++{
++	struct husb2_request *req;
++
++	if (list_empty(&ep->queue)) {
++		husb2_ep_writel(ep, CTL_DIS, (HUSB2_BIT(TX_PK_RDY)
++					      | HUSB2_BIT(RX_BK_RDY)));
++		return;
++	}
++
++	req = list_entry(ep->queue.next, struct husb2_request, queue);
++	if (!req->submitted)
++		submit_request(ep, req);
++}
++
++static void send_status(struct husb2_udc *udc, struct husb2_ep *ep)
++{
++	ep->state = STATUS_STAGE_IN;
++	husb2_ep_writel(ep, SET_STA, HUSB2_BIT(TX_PK_RDY));
++	husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_COMPLETE));
++}
++
++static void receive_data(struct husb2_ep *ep)
++{
++	struct husb2_udc *udc = ep->udc;
++	struct husb2_request *req;
++	unsigned long status;
++	unsigned int bytecount, nr_busy;
++	int is_complete = 0;
++
++	status = husb2_ep_readl(ep, STA);
++	nr_busy = HUSB2_BFEXT(BUSY_BANKS, status);
++
++	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
++
++	while (nr_busy > 0) {
++		if (list_empty(&ep->queue)) {
++			husb2_ep_writel(ep, CTL_DIS, HUSB2_BIT(RX_BK_RDY));
++			break;
++		}
++		req = list_entry(ep->queue.next,
++				 struct husb2_request, queue);
++
++		bytecount = HUSB2_BFEXT(BYTE_COUNT, status);
++
++		if (status & (1 << 31))
++			is_complete = 1;
++		if (req->req.actual + bytecount >= req->req.length) {
++			is_complete = 1;
++			bytecount = req->req.length - req->req.actual;
++		}
++
++		copy_from_fifo(req->req.buf + req->req.actual,
++			       ep->fifo, bytecount);
++		req->req.actual += bytecount;
++
++		husb2_ep_writel(ep, CLR_STA, HUSB2_BIT(RX_BK_RDY));
++
++		if (is_complete) {
++			DBG(DBG_QUEUE, "%s: request done\n", ep_name(ep));
++			req->req.status = 0;
++			list_del_init(&req->queue);
++			req->req.complete(&ep->ep, &req->req);
++		}
++
++		status = husb2_ep_readl(ep, STA);
++		nr_busy = HUSB2_BFEXT(BUSY_BANKS, status);
++
++		if (is_complete && ep_is_control(ep)) {
++			BUG_ON(nr_busy != 0);
++			send_status(udc, ep);
++			break;
++		}
++	}
++}
++
++static void request_complete(struct husb2_ep *ep,
++			     struct husb2_request *req,
++			     int status)
++{
++	struct husb2_udc *udc = ep->udc;
++	int i;
++
++	BUG_ON(!list_empty(&req->queue));
++
++	if (req->req.status == -EINPROGRESS)
++		req->req.status = status;
++
++	if (req->packet) {
++		for (i = 0; i < req->nr_pkts; i++)
++			dma_pool_free(udc->desc_pool, req->packet[i].desc,
++				      req->packet[i].desc_dma);
++		kfree(req->packet);
++		req->packet = NULL;
++		dma_unmap_single(&udc->pdev->dev,
++				 req->req.dma, req->req.length,
++				 (ep_is_in(ep)
++				  ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++		req->req.dma = DMA_ADDR_INVALID;
++	}
++
++	DBG(DBG_GADGET | DBG_REQ,
++	    "%s: req %p complete: status %d, actual %u\n",
++	    ep_name(ep), req, req->req.status, req->req.actual);
++	req->req.complete(&ep->ep, &req->req);
++}
++
++static void request_complete_list(struct husb2_ep *ep,
++				  struct list_head *list,
++				  int status)
++{
++	struct husb2_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, list, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, status);
++	}
++}
++
++static int husb2_ep_enable(struct usb_ep *_ep,
++			   const struct usb_endpoint_descriptor *desc)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	struct husb2_udc *udc = ep->udc;
++	unsigned long flags, ept_cfg, maxpacket;
++
++	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep_name(ep), desc);
++
++	maxpacket = le16_to_cpu(desc->wMaxPacketSize);
++
++	if (ep->index == 0
++	    || desc->bDescriptorType != USB_DT_ENDPOINT
++	    || ((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
++		!= ep->index)
++	    || maxpacket == 0
++	    || maxpacket > ep->fifo_size) {
++		DBG(DBG_ERR, "ep_enable: Invalid argument");
++		return -EINVAL;
++	}
++
++	if (((desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
++	     == USB_ENDPOINT_XFER_ISOC)
++	    && !(ep->capabilities & HUSB2_EP_CAP_ISOC)) {
++		DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
++		    ep_name(ep));
++		return -EINVAL;
++	}
++
++	if (maxpacket <= 8)
++		ept_cfg = HUSB2_BF(EPT_SIZE, HUSB2_EPT_SIZE_8);
++	else
++		/* LSB is bit 1, not 0 */
++		ept_cfg = HUSB2_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
++	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
++	    ep_name(ep), ept_cfg, maxpacket);
++
++	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN)
++		ept_cfg |= HUSB2_BIT(EPT_DIR);
++
++	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
++	case USB_ENDPOINT_XFER_CONTROL:
++		ept_cfg |= HUSB2_BF(EPT_TYPE, HUSB2_EPT_TYPE_CONTROL);
++		break;
++	case USB_ENDPOINT_XFER_ISOC:
++		ept_cfg |= HUSB2_BF(EPT_TYPE, HUSB2_EPT_TYPE_ISO);
++		break;
++	case USB_ENDPOINT_XFER_BULK:
++		ept_cfg |= HUSB2_BF(EPT_TYPE, HUSB2_EPT_TYPE_BULK);
++		break;
++	case USB_ENDPOINT_XFER_INT:
++		ept_cfg |= HUSB2_BF(EPT_TYPE, HUSB2_EPT_TYPE_INT);
++		break;
++	}
++	ept_cfg |= HUSB2_BF(BK_NUMBER, ep->nr_banks);
++
++	spin_lock_irqsave(&ep->udc->lock, flags);
++
++	if (ep->desc) {
++		spin_unlock_irqrestore(&ep->udc->lock, flags);
++		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
++		return -EBUSY;
++	}
++
++	ep->desc = desc;
++	ep->ep.maxpacket = maxpacket;
++
++	husb2_ep_writel(ep, CFG, ept_cfg);
++	husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(EPT_ENABLE));
++
++	if (ep_can_dma(ep)) {
++		husb2_writel(udc, INT_ENB,
++			     (husb2_readl(udc, INT_ENB)
++			      | HUSB2_BF(EPT_INT, 1 << ep->index)
++			      | HUSB2_BF(DMA_INT, 1 << ep->index)));
++		husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(AUTO_VALID));
++	} else {
++		husb2_writel(udc, INT_ENB,
++			     (husb2_readl(udc, INT_ENB)
++			      | HUSB2_BF(EPT_INT, 1 << ep->index)));
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
++	    (unsigned long)husb2_ep_readl(ep, CFG));
++	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
++	    (unsigned long)husb2_readl(udc, INT_ENB));
++
++	husb2_ep_init_debugfs(udc, ep);
++
++	return 0;
++}
++
++static int husb2_ep_disable(struct usb_ep *_ep)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	struct husb2_udc *udc = ep->udc;
++	LIST_HEAD(req_list);
++	unsigned long flags;
++
++	DBG(DBG_GADGET, "ep_disable: %s\n", ep_name(ep));
++
++	husb2_ep_cleanup_debugfs(ep);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (!ep->desc) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_ERR, "ep_disable: %s not enabled\n",
++		    ep_name(ep));
++		return -EINVAL;
++	}
++	ep->desc = NULL;
++
++	list_splice_init(&ep->queue, &req_list);
++	if (ep_can_dma(ep)) {
++		husb2_dma_writel(ep, CONTROL, 0);
++		husb2_dma_writel(ep, ADDRESS, 0);
++		husb2_dma_readl(ep, STATUS);
++	}
++	husb2_ep_writel(ep, CTL_DIS, HUSB2_BIT(EPT_ENABLE));
++	husb2_writel(udc, INT_ENB, (husb2_readl(udc, INT_ENB)
++				    & ~HUSB2_BF(EPT_INT, 1 << ep->index)));
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	request_complete_list(ep, &req_list, -ESHUTDOWN);
++
++	return 0;
++}
++
++static struct usb_request *
++husb2_ep_alloc_request(struct usb_ep *_ep, unsigned gfp_flags)
++{
++	struct husb2_request *req;
++
++	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
++
++	req = kzalloc(sizeof(*req), gfp_flags);
++	if (!req)
++		return NULL;
++
++	INIT_LIST_HEAD(&req->queue);
++	req->req.dma = DMA_ADDR_INVALID;
++
++	return &req->req;
++}
++
++static void
++husb2_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct husb2_request *req = to_husb2_req(_req);
++
++	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
++
++	kfree(req);
++}
++
++static void *husb2_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes,
++				   dma_addr_t *dma, unsigned gfp_flags)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	void *buf;
++
++	/*
++	 * We depend on kmalloc() returning cache-aligned memory. This
++	 * is normally guaranteed as long as we allocate a whole
++	 * cacheline or more.
++	 *
++	 * When CONFIG_DEBUG_SLAB is enabled, however, the slab
++	 * allocator inserts red zones and ownership information,
++	 * causing the slab objects to be misaligned.
++	 *
++	 * One alternative would be to use dma_alloc_coherent, but
++	 * that would make us unable to allocate anything less than a
++	 * page at a time.
++	 */
++#ifdef CONFIG_DEBUG_SLAB
++# error The HUSB2 UDC driver breaks with SLAB debugging enabled
++#endif
++
++	if (bytes < L1_CACHE_BYTES)
++		bytes = L1_CACHE_BYTES;
++
++	buf = kmalloc(bytes, gfp_flags);
++
++	/*
++	 * Seems like we have to map the buffer any chance we get.
++	 * ether.c wants us to initialize the dma member of a
++	 * different request than the one receiving the buffer, so one
++	 * never knows...
++	 *
++	 * Ah, screw it.  The ether driver is probably wrong, and this
++	 * is not the right place to do the mapping.  The driver
++	 * shouldn't mess with our DMA mappings anyway.
++	 */
++	*dma = DMA_ADDR_INVALID;
++
++	DBG(DBG_GADGET, "ep_alloc_buffer: %s, %u, 0x%x -> %p\n",
++	    ep_name(ep), bytes, gfp_flags, buf);
++
++	return buf;
++}
++
++static void husb2_ep_free_buffer(struct usb_ep *_ep, void *buf,
++				 dma_addr_t dma, unsigned bytes)
++{
++	DBG(DBG_GADGET, "ep_free_buffer: %s, buf %p (size %u)\n",
++	    _ep->name, buf, bytes);
++	kfree(buf);
++}
++
++static int queue_dma(struct husb2_udc *udc, struct husb2_ep *ep,
++		     struct husb2_request *req, unsigned int direction,
++		     gfp_t gfp_flags)
++{
++	struct husb2_packet *pkt, *prev_pkt;
++	unsigned int pkt_size, nr_pkts, i;
++	unsigned int residue;
++	dma_addr_t addr;
++	unsigned long flags;
++	u32 ctrl;
++
++	req->using_dma = 1;
++
++	if (req->req.length == 0) {
++		if (!req->req.zero)
++			return -EINVAL;
++		req->send_zlp = 1;
++
++		spin_lock_irqsave(&udc->lock, flags);
++		husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_PK_RDY));
++		list_add_tail(&req->queue, &ep->queue);
++		spin_unlock_irqrestore(&udc->lock, flags);
++
++		return 0;
++	}
++
++	if (req->req.dma == DMA_ADDR_INVALID)
++		req->req.dma = dma_map_single(&udc->pdev->dev,
++					      req->req.buf,
++					      req->req.length,
++					      direction);
++	else
++		dma_sync_single_for_device(&udc->pdev->dev,
++					   req->req.dma,
++					   req->req.length,
++					   direction);
++
++	pkt_size = ep->ep.maxpacket;
++	nr_pkts = req->req.length / pkt_size;
++	residue = req->req.length % pkt_size;
++	if (residue != 0)
++		nr_pkts++;
++	else if (req->req.zero && ep_is_in(ep))
++		/* ensure last packet is short */
++		req->send_zlp = 1;
++
++	req->nr_pkts = nr_pkts;
++
++	req->packet = kzalloc(sizeof(*req->packet) * nr_pkts, gfp_flags);
++	if (!req->packet)
++		goto out_of_memory;
++
++	addr = req->req.dma;
++	ctrl = (HUSB2_BF(DMA_BUF_LEN, pkt_size)
++		| HUSB2_BIT(DMA_CH_EN) | HUSB2_BIT(DMA_LINK)
++		| HUSB2_BIT(DMA_END_TR_EN) | HUSB2_BIT(DMA_END_TR_IE));
++	prev_pkt = NULL;
++	pkt = NULL;
++	DBG(DBG_DMA, "DMA descriptors:\n");
++	for (i = 0; i < nr_pkts; i++) {
++		pkt = &req->packet[i];
++		pkt->desc = dma_pool_alloc(udc->desc_pool, gfp_flags,
++					   &pkt->desc_dma);
++		if (!pkt->desc)
++			goto out_of_memory;
++
++		if (prev_pkt) {
++			prev_pkt->desc->next = pkt->desc_dma;
++			DBG(DBG_DMA, "[%d] n%08x a%08x c%08x\n",
++			    i - 1, prev_pkt->desc->next, prev_pkt->desc->addr,
++			    prev_pkt->desc->ctrl);
++		}
++		prev_pkt = pkt;
++
++		pkt->desc->addr = addr;
++		pkt->desc->ctrl = ctrl;
++		addr += pkt_size;
++	}
++
++	/* special care is needed for the last packet... */
++	ctrl = (HUSB2_BIT(DMA_CH_EN)
++		| HUSB2_BIT(DMA_END_TR_EN) | HUSB2_BIT(DMA_END_TR_IE)
++		| HUSB2_BIT(DMA_END_BUF_IE));
++	if (ep_is_in(ep))
++		ctrl |= HUSB2_BIT(DMA_END_BUF_EN);
++	if (req->req.zero || residue)
++		ctrl |= HUSB2_BF(DMA_BUF_LEN, residue);
++	else
++		ctrl |= HUSB2_BF(DMA_BUF_LEN, pkt_size);
++	pkt->desc->ctrl = ctrl;
++
++	DBG(DBG_DMA, "[%d] n%08x a%08x c%08x\n",
++	    i - 1, prev_pkt->desc->next, prev_pkt->desc->addr,
++	    prev_pkt->desc->ctrl);
++
++	/* Add this request to the queue and try to chain the DMA descriptors */
++	spin_lock_irqsave(&udc->lock, flags);
++
++	/* If the DMA controller is idle, start it */
++	if (list_empty(&ep->queue)) {
++		husb2_dma_writel(ep, NXT_DSC, req->packet[0].desc_dma);
++		husb2_dma_writel(ep, CONTROL, HUSB2_BIT(DMA_LINK));
++	}
++
++	list_add_tail(&req->queue, &ep->queue);
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++
++out_of_memory:
++	printk(KERN_ERR "ERROR: Could not allocate DMA memory for endpoint %s\n",
++	       ep_name(ep));
++	if (req->packet) {
++		for (i = 0; i < nr_pkts; i++)
++			if (req->packet[i].desc)
++				dma_pool_free(udc->desc_pool,
++					      req->packet[i].desc,
++					      req->packet[i].desc_dma);
++		kfree(req->packet);
++	}
++
++	return -ENOMEM;
++}
++
++static int husb2_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
++			  gfp_t gfp_flags)
++{
++	struct husb2_request *req = to_husb2_req(_req);
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	struct husb2_udc *udc = ep->udc;
++	unsigned long flags;
++	int direction_in = 0;
++
++	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ,
++	    "%s: queue req %p, len %u\n", ep_name(ep), req, _req->length);
++
++	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
++		return -ESHUTDOWN;
++	if (!ep->desc)
++		return -ENODEV;
++
++	req->nr_pkts = 0;
++	req->submitted = 0;
++	req->using_dma = 0;
++	req->last_transaction = 0;
++	req->send_zlp = 0;
++
++	BUG_ON(req->packet);
++
++	if (ep_is_in(ep)
++	    || (ep_is_control(ep) && (ep->state == DATA_STAGE_IN
++				      || ep->state == STATUS_STAGE_IN)))
++		direction_in = 1;
++
++	_req->status = -EINPROGRESS;
++	_req->actual = 0;
++
++	if (ep_can_dma(ep)) {
++		return queue_dma(udc, ep, req, (direction_in
++						? DMA_TO_DEVICE
++						: DMA_FROM_DEVICE),
++				 gfp_flags);
++	} else {
++		spin_lock_irqsave(&udc->lock, flags);
++		list_add_tail(&req->queue, &ep->queue);
++
++		if (direction_in)
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_PK_RDY));
++		else
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(RX_BK_RDY));
++		spin_unlock_irqrestore(&udc->lock, flags);
++	}
++
++	return 0;
++}
++
++static void husb2_update_req(struct husb2_ep *ep, struct husb2_request *req,
++			     u32 status)
++{
++	struct husb2_dma_desc *desc;
++	dma_addr_t from;
++	dma_addr_t addr;
++	size_t size;
++	unsigned int i;
++
++	addr = husb2_dma_readl(ep, ADDRESS);
++	req->req.actual = 0;
++
++	for (i = 0; i < req->nr_pkts; i++) {
++		desc = req->packet[i].desc;
++		from = desc->addr;
++		size = HUSB2_BFEXT(DMA_BUF_LEN, desc->ctrl);
++
++		req->req.actual += size;
++
++		DBG(DBG_DMA, " from=%#08x, size=%#zx\n", from, size);
++
++		if (from <= addr && (from + size) >= addr)
++			break;
++	}
++
++	req->req.actual -= HUSB2_BFEXT(DMA_BUF_LEN, status);
++}
++
++static int stop_dma(struct husb2_ep *ep, u32 *pstatus)
++{
++	unsigned int timeout;
++	u32 status;
++
++	/*
++	 * Stop the DMA controller. When writing both CH_EN
++	 * and LINK to 0, the other bits are not affected.
++	 */
++	husb2_dma_writel(ep, CONTROL, 0);
++
++	/* Wait for the FIFO to empty */
++	for (timeout = 40; timeout; --timeout) {
++		status = husb2_dma_readl(ep, STATUS);
++		if (!(status & HUSB2_BIT(DMA_CH_EN)))
++			break;
++		udelay(1);
++	}
++
++	if (pstatus)
++		*pstatus = status;
++
++	if (timeout == 0) {
++		dev_err(&ep->udc->pdev->dev,
++			"%s: timed out waiting for DMA FIFO to empty\n",
++			ep_name(ep));
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int husb2_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	struct husb2_udc *udc = ep->udc;
++	struct husb2_request *req = to_husb2_req(_req);
++	unsigned long flags;
++	u32 status;
++
++	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", ep_name(ep), req);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (req->using_dma) {
++		/*
++		 * If this request is currently being transferred,
++		 * stop the DMA controller and reset the FIFO.
++		 */
++		if (ep->queue.next == &req->queue) {
++			status = husb2_dma_readl(ep, STATUS);
++			if (status & HUSB2_BIT(DMA_CH_EN))
++				stop_dma(ep, &status);
++
++#ifdef CONFIG_DEBUG_FS
++			ep->last_dma_status = status;
++#endif
++
++			husb2_writel(udc, EPT_RST,
++				     1 << ep_index(ep));
++
++			husb2_update_req(ep, req, status);
++		}
++	}
++
++	/*
++	 * Errors should stop the queue from advancing until the
++	 * completion function returns.
++	 */
++	list_del_init(&req->queue);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	request_complete(ep, req, -ECONNRESET);
++
++	/* Process the next request if any */
++	spin_lock_irqsave(&udc->lock, flags);
++	submit_next_request(ep);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static int husb2_ep_set_halt(struct usb_ep *_ep, int value)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	struct husb2_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret = 0;
++
++	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep_name(ep),
++	    value ? "set" : "clear");
++
++	if (!ep->desc) {
++		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
++		    ep_name(ep));
++		return -ENODEV;
++	}
++	if (ep_is_isochronous(ep)) {
++		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
++		    ep_name(ep));
++		return -ENOTTY;
++	}
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	/*
++	 * We can't halt IN endpoints while there are still data to be
++	 * transferred
++	 */
++	if (!list_empty(&ep->queue)
++	    || ((value && ep_is_in(ep)
++		 && (husb2_ep_readl(ep, STA)
++		     & HUSB2_BF(BUSY_BANKS, -1L))))) {
++		ret = -EAGAIN;
++	} else {
++		if (value)
++			husb2_ep_writel(ep, SET_STA, HUSB2_BIT(FORCE_STALL));
++		else
++			husb2_ep_writel(ep, CLR_STA, (HUSB2_BIT(FORCE_STALL)
++						      | HUSB2_BIT(TOGGLE_SEQ)));
++		husb2_ep_readl(ep, STA);
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int husb2_ep_fifo_status(struct usb_ep *_ep)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++
++	return HUSB2_BFEXT(BYTE_COUNT, husb2_ep_readl(ep, STA));
++}
++
++static void husb2_ep_fifo_flush(struct usb_ep *_ep)
++{
++	struct husb2_ep *ep = to_husb2_ep(_ep);
++	struct husb2_udc *udc = ep->udc;
++
++	husb2_writel(udc, EPT_RST, 1 << ep->index);
++}
++
++struct usb_ep_ops husb2_ep_ops = {
++	.enable		= husb2_ep_enable,
++	.disable	= husb2_ep_disable,
++	.alloc_request	= husb2_ep_alloc_request,
++	.free_request	= husb2_ep_free_request,
++	.alloc_buffer	= husb2_ep_alloc_buffer,
++	.free_buffer	= husb2_ep_free_buffer,
++	.queue		= husb2_ep_queue,
++	.dequeue	= husb2_ep_dequeue,
++	.set_halt	= husb2_ep_set_halt,
++	.fifo_status	= husb2_ep_fifo_status,
++	.fifo_flush	= husb2_ep_fifo_flush,
++};
++
++static int husb2_udc_get_frame(struct usb_gadget *gadget)
++{
++	struct husb2_udc *udc = to_husb2_udc(gadget);
++
++	return HUSB2_BFEXT(FRAME_NUMBER, husb2_readl(udc, FNUM));
++}
++
++struct usb_gadget_ops husb2_udc_ops = {
++	.get_frame	= husb2_udc_get_frame,
++};
++
++#define EP(nam, type, idx, caps) {				\
++	.ep	= {						\
++		.ops		= &husb2_ep_ops,		\
++		.name		= nam,				\
++		.maxpacket	= type##_FIFO_SIZE,		\
++	},							\
++	.udc		= &the_udc,				\
++	.queue		= LIST_HEAD_INIT(husb2_ep[idx].queue),	\
++	.fifo_size	= type##_FIFO_SIZE,			\
++	.nr_banks	= type##_NR_BANKS,			\
++	.index		= idx,					\
++	.capabilities	= caps,					\
++}
++
++static struct husb2_ep husb2_ep[] = {
++	EP("ep0", EP0, 0, 0),
++	EP("ep1in-bulk", BULK, 1, HUSB2_EP_CAP_DMA),
++	EP("ep2out-bulk", BULK, 2, HUSB2_EP_CAP_DMA),
++	EP("ep3in-iso", ISO, 3, HUSB2_EP_CAP_DMA | HUSB2_EP_CAP_ISOC),
++	EP("ep4out-iso", ISO, 4, HUSB2_EP_CAP_DMA | HUSB2_EP_CAP_ISOC),
++	EP("ep5in-int", INT, 5, HUSB2_EP_CAP_DMA),
++	EP("ep6out-int", INT, 6, HUSB2_EP_CAP_DMA),
++};
++#undef EP
++
++static struct usb_endpoint_descriptor husb2_ep0_desc = {
++	.bLength = USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType = USB_DT_ENDPOINT,
++	.bEndpointAddress = 0,
++	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
++	.wMaxPacketSize = __constant_cpu_to_le16(64),
++	/* FIXME: I have no idea what to put here */
++	.bInterval = 1,
++};
++
++static void nop_release(struct device *dev)
++{
++
++}
++
++static struct husb2_udc the_udc = {
++	.gadget	= {
++		.ops		= &husb2_udc_ops,
++		.ep0		= &husb2_ep[0].ep,
++		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
++		.is_dualspeed	= 1,
++		.name		= "husb2_udc",
++		.dev	= {
++			.bus_id		= "gadget",
++			.release	= nop_release,
++		},
++	},
++
++	.lock	= SPIN_LOCK_UNLOCKED,
++};
++
++static void udc_enable(struct husb2_udc *udc)
++{
++	struct husb2_ep *ep0 = &husb2_ep[0];
++
++	/* Enable the controller */
++	husb2_writel(udc, CTRL, HUSB2_BIT(EN_HUSB2));
++
++	/* Reset all endpoints and enable basic interrupts */
++	husb2_writel(udc, EPT_RST, ~0UL);
++	husb2_writel(udc, INT_ENB, (HUSB2_BIT(DET_SUSPEND)
++				    | HUSB2_BIT(END_OF_RESET)
++				    | HUSB2_BIT(END_OF_RESUME)));
++
++	/* Configure endpoint 0 */
++	ep0->desc = &husb2_ep0_desc;
++
++	husb2_writel(udc, EPT_RST, 1 << 0);
++	husb2_ep_writel(ep0, CTL_ENB, HUSB2_BIT(EPT_ENABLE));
++	husb2_ep_writel(ep0, CFG, (HUSB2_BF(EPT_SIZE, EP0_EPT_SIZE)
++				   | HUSB2_BF(EPT_TYPE, HUSB2_EPT_TYPE_CONTROL)
++				   | HUSB2_BF(BK_NUMBER, HUSB2_BK_NUMBER_ONE)));
++
++	husb2_ep_writel(ep0, CTL_ENB, HUSB2_BIT(RX_SETUP));
++	husb2_writel(udc, INT_ENB, (husb2_readl(udc, INT_ENB)
++				    | HUSB2_BF(EPT_INT, 1)));
++
++	if (!(husb2_ep_readl(ep0, CFG) & HUSB2_BIT(EPT_MAPPED)))
++		dev_warn(&udc->pdev->dev,
++		       "WARNING: EP0 configuration is invalid!\n");
++}
++
++static void udc_disable(struct husb2_udc *udc)
++{
++	udc->gadget.speed = USB_SPEED_UNKNOWN;
++
++	husb2_writel(udc, CTRL, 0);
++}
++
++/*
++ * Called with interrupts disabled and udc->lock held.
++ */
++static void reset_all_endpoints(struct husb2_udc *udc)
++{
++	struct husb2_ep *ep;
++	struct husb2_request *req, *tmp_req;
++
++	husb2_writel(udc, EPT_RST, ~0UL);
++
++	ep = to_husb2_ep(udc->gadget.ep0);
++	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, -ECONNRESET);
++	}
++	BUG_ON(!list_empty(&ep->queue));
++
++	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
++		if (ep->desc)
++			husb2_ep_disable(&ep->ep);
++	}
++}
++
++static struct husb2_ep *get_ep_by_addr(struct husb2_udc *udc, u16 wIndex)
++{
++	struct husb2_ep *ep;
++
++	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
++		return to_husb2_ep(udc->gadget.ep0);
++
++	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
++		u8 bEndpointAddress;
++
++		if (!ep->desc)
++			continue;
++		bEndpointAddress = ep->desc->bEndpointAddress;
++		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
++			continue;
++		if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
++		    == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
++			return ep;
++	}
++
++	return NULL;
++}
++
++/* Called with interrupts disabled and udc->lock held */
++static inline void set_protocol_stall(struct husb2_udc *udc,
++				      struct husb2_ep *ep)
++{
++	husb2_ep_writel(ep, SET_STA, HUSB2_BIT(FORCE_STALL));
++	ep->state = WAIT_FOR_SETUP;
++}
++
++static inline int is_stalled(struct husb2_udc *udc, struct husb2_ep *ep)
++{
++	if (husb2_ep_readl(ep, STA) & HUSB2_BIT(FORCE_STALL))
++		return 1;
++	return 0;
++}
++
++static inline void set_address(struct husb2_udc *udc, unsigned int addr)
++{
++	u32 regval;
++
++	DBG(DBG_BUS, "setting address %u...\n", addr);
++	regval = husb2_readl(udc, CTRL);
++	regval = HUSB2_BFINS(DEV_ADDR, addr, regval);
++	husb2_writel(udc, CTRL, regval);
++}
++
++static int handle_ep0_setup(struct husb2_udc *udc, struct husb2_ep *ep,
++			    struct usb_ctrlrequest *crq)
++{
++	switch (crq->bRequest) {
++	case USB_REQ_GET_STATUS: {
++		u16 status;
++
++		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
++			/* Self-powered, no remote wakeup */
++			status = __constant_cpu_to_le16(1 << 0);
++		} else if (crq->bRequestType
++			   == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
++			status = __constant_cpu_to_le16(0);
++		} else if (crq->bRequestType
++			   == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
++			struct husb2_ep *target;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			status = 0;
++			if (is_stalled(udc, target))
++				status |= __constant_cpu_to_le16(1);
++		} else {
++			goto delegate;
++		}
++
++		/* Write directly to the FIFO. No queueing is done. */
++		if(crq->wLength != __constant_cpu_to_le16(sizeof(status)))
++			goto stall;
++		ep->state = DATA_STAGE_IN;
++		__raw_writew(status, ep->fifo);
++		husb2_ep_writel(ep, SET_STA, HUSB2_BIT(TX_PK_RDY));
++		break;
++	}
++
++	case USB_REQ_CLEAR_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			/* We don't support TEST_MODE */
++			goto stall;
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct husb2_ep *target;
++
++			if (crq->wValue != __constant_cpu_to_le16(USB_ENDPOINT_HALT)
++			    || crq->wLength != __constant_cpu_to_le16(0))
++				goto stall;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			husb2_ep_writel(target, CLR_STA, (HUSB2_BIT(FORCE_STALL)
++							  | HUSB2_BIT(TOGGLE_SEQ)));
++		} else {
++			goto delegate;
++		}
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			/* We don't support TEST_MODE */
++			goto stall;
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct husb2_ep *target;
++
++			if (crq->wValue != __constant_cpu_to_le16(USB_ENDPOINT_HALT)
++			    || crq->wLength != __constant_cpu_to_le16(0))
++				goto stall;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			husb2_ep_writel(target, SET_STA, HUSB2_BIT(FORCE_STALL));
++		} else
++			goto delegate;
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_ADDRESS:
++		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
++			goto delegate;
++
++		set_address(udc, le16_to_cpu(crq->wValue));
++		send_status(udc, ep);
++		ep->state = STATUS_STAGE_ADDR;
++		break;
++
++	default:
++	delegate:
++		return udc->driver->setup(&udc->gadget, crq);
++	}
++
++	return 0;
++
++stall:
++	printk(KERN_ERR
++	       "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
++	       "halting endpoint...\n",
++	       ep_name(ep), crq->bRequestType, crq->bRequest,
++	       le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
++	       le16_to_cpu(crq->wLength));
++	set_protocol_stall(udc, ep);
++	return -1;
++}
++
++static void husb2_control_irq(struct husb2_udc *udc, struct husb2_ep *ep)
++{
++	struct husb2_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++restart:
++	epstatus = husb2_ep_readl(ep, STA);
++	epctrl = husb2_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n",
++	    ep_name(ep), epstatus);
++
++	req = NULL;
++	if (!list_empty(&ep->queue))
++		req = list_entry(ep->queue.next,
++				 struct husb2_request, queue);
++
++	if ((epctrl & HUSB2_BIT(TX_PK_RDY))
++	    && !(epstatus & HUSB2_BIT(TX_PK_RDY))) {
++		DBG(DBG_BUS, "tx pk rdy: %d\n", ep->state);
++
++		if (req->submitted)
++			next_fifo_transaction(ep, req);
++		else
++			submit_request(ep, req);
++
++		if (req->last_transaction) {
++			husb2_ep_writel(ep, CTL_DIS, HUSB2_BIT(TX_PK_RDY));
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_COMPLETE));
++		}
++		goto restart;
++	}
++	if ((epstatus & epctrl) & HUSB2_BIT(TX_COMPLETE)) {
++		husb2_ep_writel(ep, CLR_STA, HUSB2_BIT(TX_COMPLETE));
++		DBG(DBG_BUS, "txc: %d\n", ep->state);
++
++		switch (ep->state) {
++		case DATA_STAGE_IN:
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(RX_BK_RDY));
++			husb2_ep_writel(ep, CTL_DIS,
++					HUSB2_BIT(TX_COMPLETE));
++			ep->state = STATUS_STAGE_OUT;
++			break;
++		case STATUS_STAGE_ADDR:
++			/* Activate our new address */
++			husb2_writel(udc, CTRL, (husb2_readl(udc, CTRL)
++						 | HUSB2_BIT(FADDR_EN)));
++			husb2_ep_writel(ep, CTL_DIS,
++					HUSB2_BIT(TX_COMPLETE));
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_IN:
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++				submit_next_request(ep);
++			}
++			BUG_ON(!list_empty(&ep->queue));
++			husb2_ep_writel(ep, CTL_DIS,
++					HUSB2_BIT(TX_COMPLETE));
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		default:
++			printk(KERN_ERR
++			       "udc: %s: TXCOMP: Invalid endpoint state %d, "
++			       "halting endpoint...\n",
++			       ep_name(ep), ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if ((epstatus & epctrl) & HUSB2_BIT(RX_BK_RDY)) {
++		DBG(DBG_BUS, "rxc: %d\n", ep->state);
++
++		switch (ep->state) {
++		case STATUS_STAGE_OUT:
++			husb2_ep_writel(ep, CLR_STA, HUSB2_BIT(RX_BK_RDY));
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++			}
++			husb2_ep_writel(ep, CTL_DIS, HUSB2_BIT(RX_BK_RDY));
++			ep->state = WAIT_FOR_SETUP;
++			break;
++
++		case DATA_STAGE_OUT:
++			receive_data(ep);
++			break;
++
++		default:
++			husb2_ep_writel(ep, CLR_STA, HUSB2_BIT(RX_BK_RDY));
++			set_protocol_stall(udc, ep);
++			printk(KERN_ERR
++			       "udc: %s: RXRDY: Invalid endpoint state %d, "
++			       "halting endpoint...\n",
++			       ep_name(ep), ep->state);
++			break;
++		}
++
++		goto restart;
++	}
++	if (epstatus & HUSB2_BIT(RX_SETUP)) {
++		union {
++			struct usb_ctrlrequest crq;
++			unsigned long data[2];
++		} crq;
++		unsigned int pkt_len;
++		int ret;
++
++		if (ep->state != WAIT_FOR_SETUP) {
++			/*
++			 * Didn't expect a SETUP packet at this
++			 * point. Clean up any pending requests (which
++			 * may be successful).
++			 */
++			int status = -EPROTO;
++
++			/*
++			 * RXRDY is dropped when SETUP packets arrive.
++			 * Just pretend we received the status packet.
++			 */
++			if (ep->state == STATUS_STAGE_OUT)
++				status = 0;
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, status);
++			}
++			BUG_ON(!list_empty(&ep->queue));
++		}
++
++		pkt_len = HUSB2_BFEXT(BYTE_COUNT, husb2_ep_readl(ep, STA));
++		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
++		BUG_ON(pkt_len != sizeof(crq));
++
++		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
++		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
++
++		/* Free up one bank in the FIFO so that we can
++		 * generate or receive a reply right away. */
++		husb2_ep_writel(ep, CLR_STA, HUSB2_BIT(RX_SETUP));
++
++		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
++		       ep->state, crq.crq.bRequestType,
++		       crq.crq.bRequest); */
++
++		if (crq.crq.bRequestType & USB_DIR_IN) {
++			/*
++			 * The USB 2.0 spec states that "if wLength is
++			 * zero, there is no data transfer phase."
++			 * However, testusb #14 seems to actually
++			 * expect a data phase even if wLength = 0...
++			 */
++			ep->state = DATA_STAGE_IN;
++		} else {
++			if (crq.crq.wLength != __constant_cpu_to_le16(0))
++				ep->state = DATA_STAGE_OUT;
++			else
++				ep->state = STATUS_STAGE_IN;
++		}
++
++		ret = -1;
++		if (ep->index == 0)
++			ret = handle_ep0_setup(udc, ep, &crq.crq);
++		else
++			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++
++		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
++		    crq.crq.bRequestType, crq.crq.bRequest,
++		    le16_to_cpu(crq.crq.wLength), ep->state, ret);
++
++		if (ret < 0) {
++			/* Let the host know that we failed */
++			set_protocol_stall(udc, ep);
++		}
++	}
++}
++
++static void husb2_ep_irq(struct husb2_udc *udc, struct husb2_ep *ep)
++{
++	struct husb2_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++	epstatus = husb2_ep_readl(ep, STA);
++	epctrl = husb2_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n",
++	    ep_name(ep), epstatus);
++
++	while ((epctrl & HUSB2_BIT(TX_PK_RDY))
++	       && !(epstatus & HUSB2_BIT(TX_PK_RDY))) {
++		BUG_ON(!ep_is_in(ep));
++
++		DBG(DBG_BUS, "%s: TX PK ready\n", ep_name(ep));
++
++		if (list_empty(&ep->queue)) {
++			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
++			husb2_ep_writel(ep, CTL_DIS, HUSB2_BIT(TX_PK_RDY));
++			return;
++		}
++
++		req = list_entry(ep->queue.next, struct husb2_request, queue);
++
++		if (req->using_dma) {
++			BUG_ON(!req->send_zlp);
++
++			/* Send a zero-length packet */
++			husb2_ep_writel(ep, SET_STA,
++					HUSB2_BIT(TX_PK_RDY));
++			husb2_ep_writel(ep, CTL_DIS,
++					HUSB2_BIT(TX_PK_RDY));
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		} else {
++			if (req->submitted)
++				next_fifo_transaction(ep, req);
++			else
++				submit_request(ep, req);
++
++			if (req->last_transaction) {
++				list_del_init(&req->queue);
++				submit_next_request(ep);
++				request_complete(ep, req, 0);
++			}
++		}
++
++		epstatus = husb2_ep_readl(ep, STA);
++		epctrl = husb2_ep_readl(ep, CTL);
++	}
++	if ((epstatus & epctrl) & HUSB2_BIT(RX_BK_RDY)) {
++		BUG_ON(ep_is_in(ep));
++
++		DBG(DBG_BUS, "%s: RX data ready\n", ep_name(ep));
++		receive_data(ep);
++		husb2_ep_writel(ep, CLR_STA, HUSB2_BIT(RX_BK_RDY));
++	}
++}
++
++static void husb2_dma_irq(struct husb2_udc *udc, struct husb2_ep *ep)
++{
++	struct husb2_request *req;
++	u32 status, control, pending;
++
++	status = husb2_dma_readl(ep, STATUS);
++	control = husb2_dma_readl(ep, CONTROL);
++#ifdef CONFIG_DEBUG_FS
++	ep->last_dma_status = status;
++#endif
++	pending = status & control;
++	DBG(DBG_INT, "dma irq, status=%#08x, pending=%#08x, control=%#08x\n",
++	    status, pending, control);
++
++	BUG_ON(status & HUSB2_BIT(DMA_CH_EN));
++
++	if (list_empty(&ep->queue))
++		/* Might happen if a reset comes along at the right moment */
++		return;
++
++	if (pending & (HUSB2_BIT(DMA_END_TR_ST) | HUSB2_BIT(DMA_END_BUF_ST))) {
++		req = list_entry(ep->queue.next, struct husb2_request, queue);
++		husb2_update_req(ep, req, status);
++
++		if (req->send_zlp) {
++			husb2_ep_writel(ep, CTL_ENB, HUSB2_BIT(TX_PK_RDY));
++		} else {
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		}
++	}
++}
++
++static irqreturn_t husb2_udc_irq(int irq, void *devid)
++{
++	struct husb2_udc *udc = devid;
++	u32 status;
++	u32 dma_status;
++	u32 ep_status;
++
++	spin_lock(&udc->lock);
++
++	status = husb2_readl(udc, INT_STA);
++	DBG(DBG_INT, "irq, status=%#08x\n", status);
++
++	if (status & HUSB2_BIT(DET_SUSPEND)) {
++		husb2_writel(udc, INT_CLR, HUSB2_BIT(DET_SUSPEND));
++		//DBG(DBG_BUS, "Suspend detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++		    && udc->driver && udc->driver->suspend)
++			udc->driver->suspend(&udc->gadget);
++	}
++
++	if (status & HUSB2_BIT(WAKE_UP)) {
++		husb2_writel(udc, INT_CLR, HUSB2_BIT(WAKE_UP));
++		//DBG(DBG_BUS, "Wake Up CPU detected\n");
++	}
++
++	if (status & HUSB2_BIT(END_OF_RESUME)) {
++		husb2_writel(udc, INT_CLR, HUSB2_BIT(END_OF_RESUME));
++		DBG(DBG_BUS, "Resume detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++		    && udc->driver && udc->driver->resume)
++			udc->driver->resume(&udc->gadget);
++	}
++
++	dma_status = HUSB2_BFEXT(DMA_INT, status);
++	if (dma_status) {
++		int i;
++
++		for (i = 1; i < HUSB2_NR_ENDPOINTS; i++)
++			if (dma_status & (1 << i))
++				husb2_dma_irq(udc, &husb2_ep[i]);
++	}
++
++	ep_status = HUSB2_BFEXT(EPT_INT, status);
++	if (ep_status) {
++		int i;
++
++		for (i = 0; i < HUSB2_NR_ENDPOINTS; i++)
++			if (ep_status & (1 << i)) {
++				if (ep_is_control(&husb2_ep[i]))
++					husb2_control_irq(udc, &husb2_ep[i]);
++				else
++					husb2_ep_irq(udc, &husb2_ep[i]);
++			}
++	}
++
++	if (status & HUSB2_BIT(END_OF_RESET)) {
++		husb2_writel(udc, INT_CLR, HUSB2_BIT(END_OF_RESET));
++		if (status & HUSB2_BIT(HIGH_SPEED)) {
++			DBG(DBG_BUS, "High-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_HIGH;
++		} else {
++			DBG(DBG_BUS, "Full-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_FULL;
++		}
++		/* Better start from scratch... */
++		reset_all_endpoints(udc);
++		husb2_ep[0].state = WAIT_FOR_SETUP;
++		udc_enable(udc);
++	}
++
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++int usb_gadget_register_driver(struct usb_gadget_driver *driver)
++{
++	struct husb2_udc *udc = &the_udc;
++	int ret;
++
++	spin_lock(&udc->lock);
++
++	ret = -ENODEV;
++	if (!udc->pdev)
++		goto out;
++	ret = -EBUSY;
++	if (udc->driver)
++		goto out;
++
++	udc->driver = driver;
++	udc->gadget.dev.driver = &driver->driver;
++
++	device_add(&udc->gadget.dev);
++	ret = driver->bind(&udc->gadget);
++	if (ret) {
++		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
++		    driver->driver.name, ret);
++		device_del(&udc->gadget.dev);
++
++		udc->driver = NULL;
++		udc->gadget.dev.driver = NULL;
++		goto out;
++	}
++
++	/* TODO: Create sysfs files */
++
++	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++	udc_enable(udc);
++
++out:
++	spin_unlock(&udc->lock);
++	return ret;
++}
++EXPORT_SYMBOL(usb_gadget_register_driver);
++
++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
++{
++	struct husb2_udc *udc = &the_udc;
++	int ret;
++
++	spin_lock(&udc->lock);
++
++	ret = -ENODEV;
++	if (!udc->pdev)
++		goto out;
++	ret = -EINVAL;
++	if (driver != udc->driver)
++		goto out;
++
++	local_irq_disable();
++	udc_disable(udc);
++	local_irq_enable();
++
++	driver->unbind(&udc->gadget);
++	udc->driver = NULL;
++
++	device_del(&udc->gadget.dev);
++
++	/* TODO: Remove sysfs files */
++
++	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++
++out:
++	spin_unlock(&udc->lock);
++	return ret;
++}
++EXPORT_SYMBOL(usb_gadget_unregister_driver);
++
++static int __devinit husb2_udc_probe(struct platform_device *pdev)
++{
++	struct resource *regs, *fifo;
++	struct clk *pclk, *hclk;
++	struct husb2_udc *udc = &the_udc;
++	int irq, ret, i;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
++	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
++	if (!regs || !fifo)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto out_put_pclk;
++	}
++
++	clk_enable(pclk);
++	clk_enable(hclk);
++
++	udc->pdev = pdev;
++	udc->pclk = pclk;
++	udc->hclk = hclk;
++
++	ret = -ENOMEM;
++	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!udc->regs) {
++		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
++		goto out_disable_clocks;
++	}
++	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
++		 (unsigned long)regs->start, udc->regs);
++	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
++	if (!udc->fifo) {
++		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
++		goto out_unmap_regs;
++	}
++	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
++		 (unsigned long)fifo->start, udc->fifo);
++
++	device_initialize(&udc->gadget.dev);
++	udc->gadget.dev.parent = &pdev->dev;
++	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
++
++	/* The 3-word descriptors must be 4-word aligned... */
++	udc->desc_pool = dma_pool_create("husb2-desc", &pdev->dev,
++					 sizeof(struct husb2_dma_desc),
++					 16, 0);
++	if (!udc->desc_pool) {
++		dev_err(&pdev->dev, "Cannot create descriptor DMA pool\n");
++		goto out_unmap_fifo;
++	}
++
++	platform_set_drvdata(pdev, udc);
++
++	udc_disable(udc);
++
++	INIT_LIST_HEAD(&husb2_ep[0].ep.ep_list);
++	husb2_ep[0].ep_regs = udc->regs + HUSB2_EPT_BASE(0);
++	husb2_ep[0].dma_regs = udc->regs + HUSB2_DMA_BASE(0);
++	husb2_ep[0].fifo = udc->fifo + HUSB2_FIFO_BASE(0);
++	for (i = 1; i < ARRAY_SIZE(husb2_ep); i++) {
++		struct husb2_ep *ep = &husb2_ep[i];
++
++		ep->ep_regs = udc->regs + HUSB2_EPT_BASE(i);
++		ep->dma_regs = udc->regs + HUSB2_DMA_BASE(i);
++		ep->fifo = udc->fifo + HUSB2_FIFO_BASE(i);
++
++		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
++	}
++
++	ret = request_irq(irq, husb2_udc_irq, SA_SAMPLE_RANDOM,
++			  "husb2_udc", udc);
++	if (ret) {
++		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
++			irq, ret);
++		goto out_free_pool;
++	}
++	udc->irq = irq;
++
++	husb2_init_debugfs(udc);
++
++	return 0;
++
++out_free_pool:
++	dma_pool_destroy(udc->desc_pool);
++out_unmap_fifo:
++	iounmap(udc->fifo);
++out_unmap_regs:
++	iounmap(udc->regs);
++out_disable_clocks:
++	clk_disable(hclk);
++	clk_disable(pclk);
++	clk_put(hclk);
++out_put_pclk:
++	clk_put(pclk);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return ret;
++}
++
++static int __devexit husb2_udc_remove(struct platform_device *pdev)
++{
++	struct husb2_udc *udc;
++
++	udc = platform_get_drvdata(pdev);
++	if (!udc)
++		return 0;
++
++	husb2_cleanup_debugfs(udc);
++
++	free_irq(udc->irq, udc);
++	dma_pool_destroy(udc->desc_pool);
++	iounmap(udc->fifo);
++	iounmap(udc->regs);
++	clk_disable(udc->hclk);
++	clk_disable(udc->pclk);
++	clk_put(udc->hclk);
++	clk_put(udc->pclk);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver udc_driver = {
++	.probe		= husb2_udc_probe,
++	.remove		= __devexit_p(husb2_udc_remove),
++	.driver		= {
++		.name		= "usba",
++	},
++};
++
++static int __init udc_init(void)
++{
++	printk(KERN_INFO "husb2device: Driver version %s\n", DRIVER_VERSION);
++	return platform_driver_register(&udc_driver);
++}
++module_init(udc_init);
++
++static void __exit udc_exit(void)
++{
++	platform_driver_unregister(&udc_driver);
++}
++module_exit(udc_exit);
++
++MODULE_DESCRIPTION("Atmel HUSB2 Device Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/husb2_udc.h linux-2.6.20.4-atmel/drivers/usb/gadget/husb2_udc.h
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/husb2_udc.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/husb2_udc.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,406 @@
++/*
++ * Driver for the Atmel HUSB2device high speed USB device controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LINUX_USB_GADGET_HUSB2_UDC_H__
++#define __LINUX_USB_GADGET_HUSB2_UDC_H__
++
++/* USB register offsets */
++#define HUSB2_CTRL				0x0000
++#define HUSB2_FNUM				0x0004
++#define HUSB2_INT_ENB				0x0010
++#define HUSB2_INT_STA				0x0014
++#define HUSB2_INT_CLR				0x0018
++#define HUSB2_EPT_RST				0x001c
++#define HUSB2_TST_SOF_CNT			0x00d0
++#define HUSB2_TST_CNT_A				0x00d4
++#define HUSB2_TST_CNT_B				0x00d8
++#define HUSB2_TST_MODE_REG			0x00dc
++#define HUSB2_TST				0x00f0
++
++/* USB endpoint register offsets */
++#define HUSB2_EPT_CFG				0x0000
++#define HUSB2_EPT_CTL_ENB			0x0004
++#define HUSB2_EPT_CTL_DIS			0x0008
++#define HUSB2_EPT_CTL				0x000c
++#define HUSB2_EPT_SET_STA			0x0014
++#define HUSB2_EPT_CLR_STA			0x0018
++#define HUSB2_EPT_STA				0x001c
++
++/* USB DMA register offsets */
++#define HUSB2_DMA_NXT_DSC			0x0000
++#define HUSB2_DMA_ADDRESS			0x0004
++#define HUSB2_DMA_CONTROL			0x0008
++#define HUSB2_DMA_STATUS			0x000c
++
++/* Bitfields in CTRL */
++#define HUSB2_DEV_ADDR_OFFSET			0
++#define HUSB2_DEV_ADDR_SIZE			7
++#define HUSB2_FADDR_EN_OFFSET			7
++#define HUSB2_FADDR_EN_SIZE			1
++#define HUSB2_EN_HUSB2_OFFSET			8
++#define HUSB2_EN_HUSB2_SIZE			1
++#define HUSB2_DETACH_OFFSET			9
++#define HUSB2_DETACH_SIZE			1
++#define HUSB2_REMOTE_WAKE_UP_OFFSET		10
++#define HUSB2_REMOTE_WAKE_UP_SIZE		1
++
++/* Bitfields in FNUM */
++#define HUSB2_MICRO_FRAME_NUM_OFFSET		0
++#define HUSB2_MICRO_FRAME_NUM_SIZE		3
++#define HUSB2_FRAME_NUMBER_OFFSET		3
++#define HUSB2_FRAME_NUMBER_SIZE			11
++#define HUSB2_FRAME_NUM_ERROR_OFFSET		31
++#define HUSB2_FRAME_NUM_ERROR_SIZE		1
++
++/* Bitfields in INT_ENB/INT_STA/INT_CLR */
++#define HUSB2_HIGH_SPEED_OFFSET			0
++#define HUSB2_HIGH_SPEED_SIZE			1
++#define HUSB2_DET_SUSPEND_OFFSET		1
++#define HUSB2_DET_SUSPEND_SIZE			1
++#define HUSB2_MICRO_SOF_OFFSET			2
++#define HUSB2_MICRO_SOF_SIZE			1
++#define HUSB2_SOF_OFFSET			3
++#define HUSB2_SOF_SIZE				1
++#define HUSB2_END_OF_RESET_OFFSET		4
++#define HUSB2_END_OF_RESET_SIZE			1
++#define HUSB2_WAKE_UP_OFFSET			5
++#define HUSB2_WAKE_UP_SIZE			1
++#define HUSB2_END_OF_RESUME_OFFSET		6
++#define HUSB2_END_OF_RESUME_SIZE		1
++#define HUSB2_UPSTREAM_RESUME_OFFSET		7
++#define HUSB2_UPSTREAM_RESUME_SIZE		1
++#define HUSB2_EPT_INT_OFFSET			8
++#define HUSB2_EPT_INT_SIZE			16
++#define HUSB2_DMA_INT_OFFSET			24
++#define HUSB2_DMA_INT_SIZE			8
++
++/* Bitfields in EPT_RST */
++#define HUSB2_RST_OFFSET			0
++#define HUSB2_RST_SIZE				16
++
++/* Bitfields in TST_SOF_CNT */
++#define HUSB2_SOF_CNT_MAX_OFFSET		0
++#define HUSB2_SOF_CNT_MAX_SIZE			7
++#define HUSB2_SOF_CNT_LOAD_OFFSET		7
++#define HUSB2_SOF_CNT_LOAD_SIZE			1
++
++/* Bitfields in TST_CNT_A */
++#define HUSB2_CNT_A_MAX_OFFSET			0
++#define HUSB2_CNT_A_MAX_SIZE			7
++#define HUSB2_CNT_A_LOAD_OFFSET			7
++#define HUSB2_CNT_A_LOAD_SIZE			1
++
++/* Bitfields in TST_CNT_B */
++#define HUSB2_CNT_B_MAX_OFFSET			0
++#define HUSB2_CNT_B_MAX_SIZE			7
++#define HUSB2_CNT_B_LOAD_OFFSET			7
++#define HUSB2_CNT_B_LOAD_SIZE			1
++
++/* Bitfields in TST_MODE_REG */
++#define HUSB2_TST_MODE_OFFSET			0
++#define HUSB2_TST_MODE_SIZE			6
++
++/* Bitfields in HUSB2_TST */
++#define HUSB2_SPEED_CFG_OFFSET			0
++#define HUSB2_SPEED_CFG_SIZE			2
++#define HUSB2_TST_J_MODE_OFFSET			2
++#define HUSB2_TST_J_MODE_SIZE			1
++#define HUSB2_TST_K_MODE_OFFSET			3
++#define HUSB2_TST_K_MODE_SIZE			1
++#define HUSB2_TST_PKT_MODE_OFFSE		4
++#define HUSB2_TST_PKT_MODE_SIZE			1
++#define HUSB2_OPMODE2_OFFSET			5
++#define HUSB2_OPMODE2_SIZE			1
++
++/* Bitfields in EPT_CFG */
++#define HUSB2_EPT_SIZE_OFFSET			0
++#define HUSB2_EPT_SIZE_SIZE			3
++#define HUSB2_EPT_DIR_OFFSET			3
++#define HUSB2_EPT_DIR_SIZE			1
++#define HUSB2_EPT_TYPE_OFFSET			4
++#define HUSB2_EPT_TYPE_SIZE			2
++#define HUSB2_BK_NUMBER_OFFSET			6
++#define HUSB2_BK_NUMBER_SIZE			2
++#define HUSB2_NB_TRANS_OFFSET			8
++#define HUSB2_NB_TRANS_SIZE			2
++#define HUSB2_EPT_MAPPED_OFFSET			31
++#define HUSB2_EPT_MAPPED_SIZE			1
++
++/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
++#define HUSB2_EPT_ENABLE_OFFSET			0
++#define HUSB2_EPT_ENABLE_SIZE			1
++#define HUSB2_AUTO_VALID_OFFSET			1
++#define HUSB2_AUTO_VALID_SIZE			1
++#define HUSB2_INT_DIS_DMA_OFFSET		3
++#define HUSB2_INT_DIS_DMA_SIZE			1
++#define HUSB2_NYET_DIS_OFFSET			4
++#define HUSB2_NYET_DIS_SIZE			1
++#define HUSB2_DATAX_RX_OFFSET			6
++#define HUSB2_DATAX_RX_SIZE			1
++#define HUSB2_MDATA_RX_OFFSET			7
++#define HUSB2_MDATA_RX_SIZE			1
++/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
++#define HUSB2_BUSY_BANK_IE_OFFSET		18
++#define HUSB2_BUSY_BANK_IE_SIZE			1
++
++/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
++#define HUSB2_FORCE_STALL_OFFSET		5
++#define HUSB2_FORCE_STALL_SIZE			1
++#define HUSB2_TOGGLE_SEQ_OFFSET			6
++#define HUSB2_TOGGLE_SEQ_SIZE			2
++#define HUSB2_ERR_OVFLW_OFFSET			8
++#define HUSB2_ERR_OVFLW_SIZE			1
++#define HUSB2_RX_BK_RDY_OFFSET			9
++#define HUSB2_RX_BK_RDY_SIZE			1
++#define HUSB2_KILL_BANK_OFFSET			9
++#define HUSB2_KILL_BANK_SIZE			1
++#define HUSB2_TX_COMPLETE_OFFSET		10
++#define HUSB2_TX_COMPLETE_SIZE			1
++#define HUSB2_TX_PK_RDY_OFFSET			11
++#define HUSB2_TX_PK_RDY_SIZE			1
++#define HUSB2_ISO_ERR_TRANS_OFFSET		11
++#define HUSB2_ISO_ERR_TRANS_SIZE		1
++#define HUSB2_RX_SETUP_OFFSET			12
++#define HUSB2_RX_SETUP_SIZE			1
++#define HUSB2_ISO_ERR_FLOW_OFFSET		12
++#define HUSB2_ISO_ERR_FLOW_SIZE			1
++#define HUSB2_STALL_SENT_OFFSET			13
++#define HUSB2_STALL_SENT_SIZE			1
++#define HUSB2_ISO_ERR_CRC_OFFSET		13
++#define HUSB2_ISO_ERR_CRC_SIZE			1
++#define HUSB2_ISO_ERR_NBTRANS_OFFSET		13
++#define HUSB2_ISO_ERR_NBTRANS_SIZE		1
++#define HUSB2_NAK_IN_OFFSET			14
++#define HUSB2_NAK_IN_SIZE			1
++#define HUSB2_ISO_ERR_FLUSH_OFFSET		14
++#define HUSB2_ISO_ERR_FLUSH_SIZE		1
++#define HUSB2_NAK_OUT_OFFSET			15
++#define HUSB2_NAK_OUT_SIZE			1
++#define HUSB2_CURRENT_BANK_OFFSET		16
++#define HUSB2_CURRENT_BANK_SIZE			2
++#define HUSB2_BUSY_BANKS_OFFSET			18
++#define HUSB2_BUSY_BANKS_SIZE			2
++#define HUSB2_BYTE_COUNT_OFFSET			20
++#define HUSB2_BYTE_COUNT_SIZE			11
++#define HUSB2_SHORT_PACKET_OFFSET		31
++#define HUSB2_SHORT_PACKET_SIZE			1
++
++/* Bitfields in DMA_CONTROL */
++#define HUSB2_DMA_CH_EN_OFFSET			0
++#define HUSB2_DMA_CH_EN_SIZE			1
++#define HUSB2_DMA_LINK_OFFSET			1
++#define HUSB2_DMA_LINK_SIZE			1
++#define HUSB2_DMA_END_TR_EN_OFFSET		2
++#define HUSB2_DMA_END_TR_EN_SIZE		1
++#define HUSB2_DMA_END_BUF_EN_OFFSET		3
++#define HUSB2_DMA_END_BUF_EN_SIZE		1
++#define HUSB2_DMA_END_TR_IE_OFFSET		4
++#define HUSB2_DMA_END_TR_IE_SIZE		1
++#define HUSB2_DMA_END_BUF_IE_OFFSET		5
++#define HUSB2_DMA_END_BUF_IE_SIZE		1
++#define HUSB2_DMA_DESC_LOAD_IE_OFFSET		6
++#define HUSB2_DMA_DESC_LOAD_IE_SIZE		1
++#define HUSB2_DMA_BURST_LOCK_OFFSET		7
++#define HUSB2_DMA_BURST_LOCK_SIZE		1
++#define HUSB2_DMA_BUF_LEN_OFFSET		16
++#define HUSB2_DMA_BUF_LEN_SIZE			16
++
++/* Bitfields in DMA_STATUS */
++#define HUSB2_DMA_CH_ACTIVE_OFFSET		1
++#define HUSB2_DMA_CH_ACTIVE_SIZE		1
++#define HUSB2_DMA_END_TR_ST_OFFSET		4
++#define HUSB2_DMA_END_TR_ST_SIZE		1
++#define HUSB2_DMA_END_BUF_ST_OFFSET		5
++#define HUSB2_DMA_END_BUF_ST_SIZE		1
++#define HUSB2_DMA_DESC_LOAD_ST_OFFSET		6
++#define HUSB2_DMA_DESC_LOAD_ST_SIZE		1
++
++/* Constants for SPEED_CFG */
++#define HUSB2_SPEED_CFG_NORMAL			0
++#define HUSB2_SPEED_CFG_FORCE_HIGH		2
++#define HUSB2_SPEED_CFG_FORCE_FULL		3
++
++/* Constants for EPT_SIZE */
++#define HUSB2_EPT_SIZE_8			0
++#define HUSB2_EPT_SIZE_16			1
++#define HUSB2_EPT_SIZE_32			2
++#define HUSB2_EPT_SIZE_64			3
++#define HUSB2_EPT_SIZE_128			4
++#define HUSB2_EPT_SIZE_256			5
++#define HUSB2_EPT_SIZE_512			6
++#define HUSB2_EPT_SIZE_1024			7
++
++/* Constants for EPT_TYPE */
++#define HUSB2_EPT_TYPE_CONTROL			0
++#define HUSB2_EPT_TYPE_ISO			1
++#define HUSB2_EPT_TYPE_BULK			2
++#define HUSB2_EPT_TYPE_INT			3
++
++/* Constants for BK_NUMBER */
++#define HUSB2_BK_NUMBER_ZERO			0
++#define HUSB2_BK_NUMBER_ONE			1
++#define HUSB2_BK_NUMBER_DOUBLE			2
++#define HUSB2_BK_NUMBER_TRIPLE			3
++
++/* Bit manipulation macros */
++#define HUSB2_BIT(name)						\
++	(1 << HUSB2_##name##_OFFSET)
++#define HUSB2_BF(name,value)					\
++	(((value) & ((1 << HUSB2_##name##_SIZE) - 1))		\
++	 << HUSB2_##name##_OFFSET)
++#define HUSB2_BFEXT(name,value)					\
++	(((value) >> HUSB2_##name##_OFFSET)			\
++	 & ((1 << HUSB2_##name##_SIZE) - 1))
++#define HUSB2_BFINS(name,value,old)				\
++	(((old) & ~(((1 << HUSB2_##name##_SIZE) - 1)		\
++		    << HUSB2_##name##_OFFSET))			\
++	 | HUSB2_BF(name,value))
++
++/* Register access macros */
++#define husb2_readl(udc,reg)					\
++	__raw_readl((udc)->regs + HUSB2_##reg)
++#define husb2_writel(udc,reg,value)				\
++	__raw_writel((value), (udc)->regs + HUSB2_##reg)
++#define husb2_ep_readl(ep,reg)					\
++	__raw_readl((ep)->ep_regs + HUSB2_EPT_##reg)
++#define husb2_ep_writel(ep,reg,value)				\
++	__raw_writel((value), (ep)->ep_regs + HUSB2_EPT_##reg)
++#define husb2_dma_readl(ep,reg)					\
++	__raw_readl((ep)->dma_regs + HUSB2_DMA_##reg)
++#define husb2_dma_writel(ep,reg,value)				\
++	__raw_writel((value), (ep)->dma_regs + HUSB2_DMA_##reg)
++
++/* Calculate base address for a given endpoint or DMA controller */
++#define HUSB2_EPT_BASE(x)			(0x100 + (x) * 0x20)
++#define HUSB2_DMA_BASE(x)			(0x300 + (x) * 0x10)
++#define HUSB2_FIFO_BASE(x)			((x) << 16)
++
++/* Synth parameters */
++#define HUSB2_NR_ENDPOINTS	7
++
++#define EP0_FIFO_SIZE		64
++#define EP0_EPT_SIZE		HUSB2_EPT_SIZE_64
++#define EP0_NR_BANKS		1
++#define BULK_FIFO_SIZE		512
++#define BULK_EPT_SIZE		HUSB2_EPT_SIZE_512
++#define BULK_NR_BANKS		2
++#define ISO_FIFO_SIZE		1024
++#define ISO_EPT_SIZE		HUSB2_EPT_SIZE_1024
++#define ISO_NR_BANKS		3
++#define INT_FIFO_SIZE		64
++#define INT_EPT_SIZE		HUSB2_EPT_SIZE_64
++#define INT_NR_BANKS		3
++
++enum husb2_ctrl_state {
++	WAIT_FOR_SETUP,
++	DATA_STAGE_IN,
++	DATA_STAGE_OUT,
++	STATUS_STAGE_IN,
++	STATUS_STAGE_OUT,
++	STATUS_STAGE_ADDR,
++};
++/*
++  EP_STATE_IDLE,
++  EP_STATE_SETUP,
++  EP_STATE_IN_DATA,
++  EP_STATE_OUT_DATA,
++  EP_STATE_SET_ADDR_STATUS,
++  EP_STATE_RX_STATUS,
++  EP_STATE_TX_STATUS,
++  EP_STATE_HALT,
++*/
++
++struct husb2_dma_desc {
++	dma_addr_t next;
++	dma_addr_t addr;
++	u32 ctrl;
++};
++
++struct husb2_ep {
++	int					state;
++	void __iomem				*ep_regs;
++	void __iomem				*dma_regs;
++	void __iomem				*fifo;
++	struct usb_ep				ep;
++	struct husb2_udc			*udc;
++
++	struct list_head			queue;
++	const struct usb_endpoint_descriptor	*desc;
++
++	u16					fifo_size;
++	u8					nr_banks;
++	u8					index;
++	u8					capabilities;
++
++#ifdef CONFIG_DEBUG_FS
++	u32					last_dma_status;
++	struct dentry				*debugfs_dir;
++	struct dentry				*debugfs_queue;
++	struct dentry				*debugfs_dma_status;
++#endif
++};
++#define HUSB2_EP_CAP_ISOC	0x0001
++#define HUSB2_EP_CAP_DMA	0x0002
++
++struct husb2_packet {
++	struct husb2_dma_desc			*desc;
++	dma_addr_t				desc_dma;
++};
++
++struct husb2_request {
++	struct usb_request			req;
++	struct list_head			queue;
++
++	struct husb2_packet			*packet;
++	unsigned int				nr_pkts;
++
++	unsigned int				submitted:1;
++	unsigned int				using_dma:1;
++	unsigned int				last_transaction:1;
++	unsigned int				send_zlp:1;
++};
++
++struct husb2_udc {
++	spinlock_t lock;
++
++	void __iomem *regs;
++	void __iomem *fifo;
++
++	struct dma_pool *desc_pool;
++
++	struct usb_gadget gadget;
++	struct usb_gadget_driver *driver;
++	struct platform_device *pdev;
++	int irq;
++	struct clk *pclk;
++	struct clk *hclk;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry *debugfs_root;
++	struct dentry *debugfs_regs;
++#endif
++};
++
++#define to_husb2_ep(x) container_of((x), struct husb2_ep, ep)
++#define to_husb2_req(x) container_of((x), struct husb2_request, req)
++#define to_husb2_udc(x) container_of((x), struct husb2_udc, gadget)
++
++#define ep_index(ep)	((ep)->index)
++#define ep_can_dma(ep)	((ep)->capabilities & HUSB2_EP_CAP_DMA)
++#define ep_is_in(ep)	(((ep)->desc->bEndpointAddress			\
++				 & USB_ENDPOINT_DIR_MASK)		\
++			 == USB_DIR_IN)
++#define ep_is_isochronous(ep)						\
++	(((ep)->desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)	\
++	 == USB_ENDPOINT_XFER_ISOC)
++#define ep_is_control(ep) (ep_index(ep) == 0)
++#define ep_name(ep)	((ep)->ep.name)
++#define ep_is_idle(ep)	((ep)->state == EP_STATE_IDLE)
++
++#endif /* __LINUX_USB_GADGET_HUSB2_H */
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/Kconfig linux-2.6.20.4-atmel/drivers/usb/gadget/Kconfig
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -154,6 +154,16 @@
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
++config USB_GADGET_HUSB2DEV
++	boolean "Atmel HUSB2DEVICE"
++	select USB_GADGET_DUALSPEED
++	depends on AVR32
++
++config USB_HUSB2DEV
++	tristate
++	depends on USB_GADGET_HUSB2DEV
++	default USB_GADGET
++	select USB_GADGET_SELECTED
+ 
+ config USB_GADGET_OMAP
+ 	boolean "OMAP USB Device Controller"
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/Makefile linux-2.6.20.4-atmel/drivers/usb/gadget/Makefile
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -8,6 +8,7 @@
+ obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
+ obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
+ obj-$(CONFIG_USB_AT91)		+= at91_udc.o
++obj-$(CONFIG_USB_HUSB2DEV)	+= husb2_udc.o
+ 
+ #
+ # USB gadget drivers
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/serial.c linux-2.6.20.4-atmel/drivers/usb/gadget/serial.c
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/serial.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/serial.c	2007-03-24 16:42:28.000000000 +0100
+@@ -333,7 +333,7 @@
+ 	.strings =		gs_strings,
+ };
+ 
+-static struct usb_device_descriptor gs_device_desc = {
++static struct usb_device_descriptor __attribute__((aligned(2))) gs_device_desc = {
+ 	.bLength =		USB_DT_DEVICE_SIZE,
+ 	.bDescriptorType =	USB_DT_DEVICE,
+ 	.bcdUSB =		__constant_cpu_to_le16(0x0200),
+@@ -353,7 +353,7 @@
+ 	.bmAttributes =		USB_OTG_SRP,
+ };
+ 
+-static struct usb_config_descriptor gs_bulk_config_desc = {
++static struct usb_config_descriptor __attribute__((aligned(2))) gs_bulk_config_desc = {
+ 	.bLength =		USB_DT_CONFIG_SIZE,
+ 	.bDescriptorType =	USB_DT_CONFIG,
+ 	/* .wTotalLength computed dynamically */
+@@ -364,7 +364,7 @@
+ 	.bMaxPower =		1,
+ };
+ 
+-static struct usb_config_descriptor gs_acm_config_desc = {
++static struct usb_config_descriptor __attribute__((aligned(2))) gs_acm_config_desc = {
+ 	.bLength =		USB_DT_CONFIG_SIZE,
+ 	.bDescriptorType =	USB_DT_CONFIG,
+ 	/* .wTotalLength computed dynamically */
+@@ -375,7 +375,7 @@
+ 	.bMaxPower =		1,
+ };
+ 
+-static const struct usb_interface_descriptor gs_bulk_interface_desc = {
++static const struct usb_interface_descriptor __attribute__((aligned(2))) gs_bulk_interface_desc = {
+ 	.bLength =		USB_DT_INTERFACE_SIZE,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 	.bInterfaceNumber =	GS_BULK_INTERFACE_ID,
+@@ -386,7 +386,7 @@
+ 	.iInterface =		GS_DATA_STR_ID,
+ };
+ 
+-static const struct usb_interface_descriptor gs_control_interface_desc = {
++static const struct usb_interface_descriptor __attribute__((aligned(2))) gs_control_interface_desc = {
+ 	.bLength =		USB_DT_INTERFACE_SIZE,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 	.bInterfaceNumber =	GS_CONTROL_INTERFACE_ID,
+@@ -397,7 +397,7 @@
+ 	.iInterface =		GS_CONTROL_STR_ID,
+ };
+ 
+-static const struct usb_interface_descriptor gs_data_interface_desc = {
++static const struct usb_interface_descriptor __attribute__((aligned(2))) gs_data_interface_desc = {
+ 	.bLength =		USB_DT_INTERFACE_SIZE,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 	.bInterfaceNumber =	GS_DATA_INTERFACE_ID,
+@@ -408,7 +408,7 @@
+ 	.iInterface =		GS_DATA_STR_ID,
+ };
+ 
+-static const struct usb_cdc_header_desc gs_header_desc = {
++static const struct usb_cdc_header_desc __attribute__((aligned(2))) gs_header_desc = {
+ 	.bLength =		sizeof(gs_header_desc),
+ 	.bDescriptorType =	USB_DT_CS_INTERFACE,
+ 	.bDescriptorSubType =	USB_CDC_HEADER_TYPE,
+@@ -438,7 +438,7 @@
+ 	.bSlaveInterface0 =	1,	/* index of data interface */
+ };
+  
+-static struct usb_endpoint_descriptor gs_fullspeed_notify_desc = {
++static struct usb_endpoint_descriptor __attribute__((aligned(2))) gs_fullspeed_notify_desc = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 	.bEndpointAddress =	USB_DIR_IN,
+@@ -447,14 +447,14 @@
+ 	.bInterval =		1 << GS_LOG2_NOTIFY_INTERVAL,
+ };
+ 
+-static struct usb_endpoint_descriptor gs_fullspeed_in_desc = {
++static struct usb_endpoint_descriptor __attribute__((aligned(2))) gs_fullspeed_in_desc = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 	.bEndpointAddress =	USB_DIR_IN,
+ 	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+ };
+ 
+-static struct usb_endpoint_descriptor gs_fullspeed_out_desc = {
++static struct usb_endpoint_descriptor __attribute__((aligned(2))) gs_fullspeed_out_desc = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 	.bEndpointAddress =	USB_DIR_OUT,
+@@ -484,7 +484,7 @@
+ };
+ 
+ #ifdef CONFIG_USB_GADGET_DUALSPEED
+-static struct usb_endpoint_descriptor gs_highspeed_notify_desc = {
++static struct usb_endpoint_descriptor __attribute__((aligned(2))) gs_highspeed_notify_desc = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 	.bEndpointAddress =	USB_DIR_IN,
+@@ -493,21 +493,21 @@
+ 	.bInterval =		GS_LOG2_NOTIFY_INTERVAL+4,
+ };
+ 
+-static struct usb_endpoint_descriptor gs_highspeed_in_desc = {
++static struct usb_endpoint_descriptor __attribute__((aligned(2))) gs_highspeed_in_desc = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+ 	.wMaxPacketSize =	__constant_cpu_to_le16(512),
+ };
+ 
+-static struct usb_endpoint_descriptor gs_highspeed_out_desc = {
++static struct usb_endpoint_descriptor __attribute__((aligned(2))) gs_highspeed_out_desc = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 	.bmAttributes =		USB_ENDPOINT_XFER_BULK,
+ 	.wMaxPacketSize =	__constant_cpu_to_le16(512),
+ };
+ 
+-static struct usb_qualifier_descriptor gs_qualifier_desc = {
++static struct usb_qualifier_descriptor __attribute__((aligned(2))) gs_qualifier_desc = {
+ 	.bLength =		sizeof(struct usb_qualifier_descriptor),
+ 	.bDescriptorType =	USB_DT_DEVICE_QUALIFIER,
+ 	.bcdUSB =		__constant_cpu_to_le16 (0x0200),
+diff -urN linux-2.6.20.4-0rig/drivers/usb/gadget/zero.c linux-2.6.20.4-atmel/drivers/usb/gadget/zero.c
+--- linux-2.6.20.4-0rig/drivers/usb/gadget/zero.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/gadget/zero.c	2007-03-24 16:42:28.000000000 +0100
+@@ -221,7 +221,7 @@
+ #define	CONFIG_LOOPBACK		2
+ 
+ static struct usb_device_descriptor
+-device_desc = {
++device_desc __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof device_desc,
+ 	.bDescriptorType =	USB_DT_DEVICE,
+ 
+@@ -237,7 +237,7 @@
+ };
+ 
+ static struct usb_config_descriptor
+-source_sink_config = {
++source_sink_config __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof source_sink_config,
+ 	.bDescriptorType =	USB_DT_CONFIG,
+ 
+@@ -250,7 +250,7 @@
+ };
+ 
+ static struct usb_config_descriptor
+-loopback_config = {
++loopback_config __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof loopback_config,
+ 	.bDescriptorType =	USB_DT_CONFIG,
+ 
+@@ -273,7 +273,7 @@
+ /* one interface in each configuration */
+ 
+ static const struct usb_interface_descriptor
+-source_sink_intf = {
++source_sink_intf __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof source_sink_intf,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -283,7 +283,7 @@
+ };
+ 
+ static const struct usb_interface_descriptor
+-loopback_intf = {
++loopback_intf __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof loopback_intf,
+ 	.bDescriptorType =	USB_DT_INTERFACE,
+ 
+@@ -295,7 +295,7 @@
+ /* two full speed bulk endpoints; their use is config-dependent */
+ 
+ static struct usb_endpoint_descriptor
+-fs_source_desc = {
++fs_source_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -304,7 +304,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-fs_sink_desc = {
++fs_sink_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -340,7 +340,7 @@
+  */
+ 
+ static struct usb_endpoint_descriptor
+-hs_source_desc = {
++hs_source_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -349,7 +349,7 @@
+ };
+ 
+ static struct usb_endpoint_descriptor
+-hs_sink_desc = {
++hs_sink_desc __attribute__((aligned(2))) = {
+ 	.bLength =		USB_DT_ENDPOINT_SIZE,
+ 	.bDescriptorType =	USB_DT_ENDPOINT,
+ 
+@@ -358,7 +358,7 @@
+ };
+ 
+ static struct usb_qualifier_descriptor
+-dev_qualifier = {
++dev_qualifier __attribute__((aligned(2))) = {
+ 	.bLength =		sizeof dev_qualifier,
+ 	.bDescriptorType =	USB_DT_DEVICE_QUALIFIER,
+ 
+diff -urN linux-2.6.20.4-0rig/drivers/usb/host/ohci-at91.c linux-2.6.20.4-atmel/drivers/usb/host/ohci-at91.c
+--- linux-2.6.20.4-0rig/drivers/usb/host/ohci-at91.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/usb/host/ohci-at91.c	2007-03-24 16:39:15.000000000 +0100
+@@ -18,19 +18,38 @@
+ #include <asm/mach-types.h>
+ #include <asm/hardware.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/cpu.h>
+ 
+ #ifndef CONFIG_ARCH_AT91
+ #error "CONFIG_ARCH_AT91 must be defined."
+ #endif
+ 
+ /* interface and function clocks */
+-static struct clk *iclk, *fclk;
++static struct clk *iclk, *fclk, *hclock;
+ static int clocked;
+ 
+ extern int usb_disabled(void);
+ 
+ /*-------------------------------------------------------------------------*/
+ 
++static void at91_start_clock(void)
++{
++	if (cpu_is_at91sam9261())
++		clk_enable(hclock);
++	clk_enable(iclk);
++	clk_enable(fclk);
++	clocked = 1;
++}
++
++static void at91_stop_clock(void)
++{
++	clk_disable(fclk);
++	clk_disable(iclk);
++	if (cpu_is_at91sam9261())
++		clk_disable(hclock);
++	clocked = 0;
++}
++
+ static void at91_start_hc(struct platform_device *pdev)
+ {
+ 	struct usb_hcd *hcd = platform_get_drvdata(pdev);
+@@ -41,9 +60,7 @@
+ 	/*
+ 	 * Start the USB clocks.
+ 	 */
+-	clk_enable(iclk);
+-	clk_enable(fclk);
+-	clocked = 1;
++	at91_start_clock();
+ 
+ 	/*
+ 	 * The USB host controller must remain in reset.
+@@ -66,9 +83,7 @@
+ 	/*
+ 	 * Stop the USB clocks.
+ 	 */
+-	clk_disable(fclk);
+-	clk_disable(iclk);
+-	clocked = 0;
++	at91_stop_clock();
+ }
+ 
+ 
+@@ -126,6 +141,8 @@
+ 
+ 	iclk = clk_get(&pdev->dev, "ohci_clk");
+ 	fclk = clk_get(&pdev->dev, "uhpck");
++	if (cpu_is_at91sam9261())
++		hclock = clk_get(&pdev->dev, "hck0");
+ 
+ 	at91_start_hc(pdev);
+ 	ohci_hcd_init(hcd_to_ohci(hcd));
+@@ -137,6 +154,8 @@
+ 	/* Error handling */
+ 	at91_stop_hc(pdev);
+ 
++	if (cpu_is_at91sam9261())
++		clk_put(hclock);
+ 	clk_put(fclk);
+ 	clk_put(iclk);
+ 
+@@ -170,11 +189,12 @@
+ 	at91_stop_hc(pdev);
+ 	iounmap(hcd->regs);
+ 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+-	disable_irq_wake(hcd->irq);
+ 
++	if (cpu_is_at91sam9261())
++		clk_put(hclock);
+ 	clk_put(fclk);
+ 	clk_put(iclk);
+-	fclk = iclk = NULL;
++	fclk = iclk = hclock = NULL;
+ 
+ 	dev_set_drvdata(&pdev->dev, NULL);
+ 	return 0;
+@@ -271,8 +291,6 @@
+ 
+ 	if (device_may_wakeup(&pdev->dev))
+ 		enable_irq_wake(hcd->irq);
+-	else
+-		disable_irq_wake(hcd->irq);
+ 
+ 	/*
+ 	 * The integrated transceivers seem unable to notice disconnect,
+@@ -283,9 +301,7 @@
+ 	 */
+ 	if (at91_suspend_entering_slow_clock()) {
+ 		ohci_usb_reset (ohci);
+-		clk_disable(fclk);
+-		clk_disable(iclk);
+-		clocked = 0;
++		at91_stop_clock();
+ 	}
+ 
+ 	return 0;
+@@ -293,11 +309,13 @@
+ 
+ static int ohci_hcd_at91_drv_resume(struct platform_device *pdev)
+ {
+-	if (!clocked) {
+-		clk_enable(iclk);
+-		clk_enable(fclk);
+-		clocked = 1;
+-	}
++	struct usb_hcd	*hcd = platform_get_drvdata(pdev);
++
++	if (device_may_wakeup(&pdev->dev))
++		disable_irq_wake(hcd->irq);
++
++	if (!clocked)
++		at91_start_clock();
+ 
+ 	return 0;
+ }
+diff -urN linux-2.6.20.4-0rig/drivers/video/atmel_lcdfb.c linux-2.6.20.4-atmel/drivers/video/atmel_lcdfb.c
+--- linux-2.6.20.4-0rig/drivers/video/atmel_lcdfb.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/atmel_lcdfb.c	2007-03-24 16:39:15.000000000 +0100
+@@ -0,0 +1,781 @@
++/*
++ *  drivers/video/atmel_lcdfb.c
++ *
++ *  Driver for AT91/AVR32 LCD Controller
++ *
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/interrupt.h>
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/cpu.h>
++#include <asm/arch/gpio.h>
++
++#include <video/atmel_lcdc.h>
++
++#define lcdc_readl(sinfo, reg)		__raw_readl((sinfo)->mmio+(reg))
++#define lcdc_writel(sinfo, reg, val)	__raw_writel((val), (sinfo)->mmio+(reg))
++
++/* More or less configurable parameters */
++#define ATMEL_LCDC_FIFO_SIZE		512
++#define ATMEL_LCDC_CRST_VAL_DEFAULT	0xc8
++#define ATMEL_LCDC_DMA_BURST_LEN	16
++
++#define LCD_POWER_ON	0
++#define LCD_POWER_OFF	1
++
++#if defined(CONFIG_ARCH_AT91)
++static inline void atmel_lcdfb_update_dma2d(struct fb_info *info,
++					struct fb_var_screeninfo *var) { }
++static inline void atmel_lcdfb_set_2dcfg(struct fb_info *info) { }
++#elif defined(CONFIG_AVR32)
++static void atmel_lcdfb_update_dma2d(struct fb_info *info,
++					struct fb_var_screeninfo *var)
++{
++	dma2dcfg = lcdc_readl(sinfo, ATMEL_LCDC_DMA2DCFG);
++	dma2dcfg = LCDC_INSBF(DMA2DCFG_PIXELOFF, pixeloff, dma2dcfg);
++	lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
++
++	/* Update configuration */
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
++		lcdc_readl(sinfo, ATMEL_LCDC_DMACON) | LCDC_BIT(DMACON_DMAUPDT));
++}
++
++static void atmel_lcdfb_set_2dcfg(struct fb_info *info)
++{
++	/* ...set 2D configuration (necessary for xres_virtual != xres) */
++	value = LCDC_MKBF(DMA2DCFG_ADDRINC,
++			  info->var.xres_virtual - info->var.xres);
++	lcdc_writel(sinfo, DMA2DCFG, value);
++
++	/* ...wait for DMA engine to become idle... */
++	while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & LCDC_BIT(DMACON_DMABUSY))
++		msleep(10);
++}
++#endif
++
++
++static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
++	.type		= FB_TYPE_PACKED_PIXELS,
++	.visual		= FB_VISUAL_TRUECOLOR,
++	.xpanstep	= 0,
++	.ypanstep	= 0,
++	.ywrapstep	= 0,
++	.accel		= FB_ACCEL_NONE,
++};
++
++static u32 pseudo_palette[16] = {
++	0x000000,
++	0xaa0000,
++	0x00aa00,
++	0xaa5500,
++	0x0000aa,
++	0xaa00aa,
++	0x00aaaa,
++	0xaaaaaa,
++	0x555555,
++	0xff5555,
++	0x55ff55,
++	0xffff55,
++	0x5555ff,
++	0xff55ff,
++	0x55ffff,
++	0xffffff
++};
++
++static void atmel_lcdfb_update_dma(struct fb_info *info,
++			       struct fb_var_screeninfo *var)
++{
++	struct atmel_lcdfb_info *sinfo = info->par;
++	struct fb_fix_screeninfo *fix = &info->fix;
++	unsigned long dma_addr;
++
++	dma_addr = (fix->smem_start + var->yoffset * fix->line_length
++		    + var->xoffset * var->bits_per_pixel / 8);
++
++	dma_addr &= ~3UL;
++
++	/* Set framebuffer DMA base address and pixel offset */
++	lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
++
++	atmel_lcdfb_update_dma2d(info, var);
++}
++
++static inline void atmel_lcdfb_unmap_video_memory(struct atmel_lcdfb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++
++	dma_free_writecombine(info->device, sinfo->map_size,
++				sinfo->map_cpu, sinfo->map_dma);
++}
++
++/**
++ *	atmel_lcdfb_alloc_framebuffer - Allocate framebuffer memory
++ *	@sinfo: the frame buffer to allocate memory for
++ */
++static int atmel_lcdfb_map_video_memory(struct atmel_lcdfb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++	struct fb_var_screeninfo *var = &info->var;
++
++	sinfo->map_size = (var->xres_virtual * var->yres_virtual
++			    * ((var->bits_per_pixel + 7) / 8));
++
++	sinfo->map_cpu = dma_alloc_writecombine(info->device, sinfo->map_size,
++					      &sinfo->map_dma, GFP_KERNEL);
++
++	if (!sinfo->map_cpu) {
++		return -ENOMEM;
++	}
++
++	return 0;
++}
++
++/**
++ *      atmel_lcdfb_check_var - Validates a var passed in.
++ *      @var: frame buffer variable screen structure
++ *      @info: frame buffer structure that represents a single frame buffer
++ *
++ *	Checks to see if the hardware supports the state requested by
++ *	var passed in. This function does not alter the hardware
++ *	state!!!  This means the data stored in struct fb_info and
++ *	struct atmel_lcdfb_info do not change. This includes the var
++ *	inside of struct fb_info.  Do NOT change these. This function
++ *	can be called on its own if we intent to only test a mode and
++ *	not actually set it. The stuff in modedb.c is a example of
++ *	this. If the var passed in is slightly off by what the
++ *	hardware can support then we alter the var PASSED in to what
++ *	we can do. If the hardware doesn't support mode change a
++ *	-EINVAL will be returned by the upper layers. You don't need
++ *	to implement this function then. If you hardware doesn't
++ *	support changing the resolution then this function is not
++ *	needed. In this case the driver would just provide a var that
++ *	represents the static state the screen is in.
++ *
++ *	Returns negative errno on error, or zero on success.
++ */
++static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
++			     struct fb_info *info)
++{
++	struct device *dev = info->device;
++	struct atmel_lcdfb_info *sinfo = info->par;
++	unsigned long clk_value_khz = 0;
++
++	clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
++
++	dev_dbg(dev, "%s:\n", __func__);
++	dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
++	dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
++	dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
++	dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
++
++	if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
++		dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
++		return -EINVAL;
++	}
++
++	/* Force same alignment for each line */
++	var->xres = (var->xres + 3) & ~3UL;
++	var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
++
++	var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
++	var->transp.offset = var->transp.length = 0;
++
++	switch (var->bits_per_pixel) {
++	case 2:
++	case 4:
++	case 8:
++		var->red.offset = var->green.offset = var->blue.offset = 0;
++		var->red.length = var->green.length = var->blue.length
++			= var->bits_per_pixel;
++		break;
++	case 15:
++	case 16:
++		var->red.offset = 0;
++		var->green.offset = 5;
++		var->blue.offset = 10;
++		var->red.length = var->green.length = var->blue.length = 5;
++		break;
++	case 24:
++	case 32:
++		var->red.offset = 16;
++		var->green.offset = 8;
++		var->blue.offset = 0;
++		var->red.length = var->green.length = var->blue.length = 8;
++		break;
++	default:
++		dev_err(dev, "color depth %d not supported\n",
++					var->bits_per_pixel);
++		return -EINVAL;
++	}
++
++	var->xoffset = var->yoffset = 0;
++	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
++		var->transp.msb_right = 0;
++
++	return 0;
++}
++
++/**
++ *      atmel_lcdfb_set_par - Alters the hardware state.
++ *      @info: frame buffer structure that represents a single frame buffer
++ *
++ *	Using the fb_var_screeninfo in fb_info we set the resolution
++ *	of the this particular framebuffer. This function alters the
++ *	par AND the fb_fix_screeninfo stored in fb_info. It doesn't
++ *	not alter var in fb_info since we are using that data. This
++ *	means we depend on the data in var inside fb_info to be
++ *	supported by the hardware.  atmel_lcdfb_check_var is always called
++ *	before atmel_lcdfb_set_par to ensure this.  Again if you can't
++ *	change the resolution you don't need this function.
++ *
++ */
++static int atmel_lcdfb_set_par(struct fb_info *info)
++{
++	struct atmel_lcdfb_info *sinfo = info->par;
++	unsigned long value;
++	unsigned long clk_value_khz = 0;
++
++	dev_dbg(info->device, "%s:\n", __func__);
++	dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
++		 info->var.xres, info->var.yres,
++		 info->var.xres_virtual, info->var.yres_virtual);
++
++	/* Turn off the LCD controller and the DMA controller */
++	lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
++
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
++
++	/* Reset LCDC DMA*/
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, ATMEL_LCDC_DMARST);
++
++	if (info->var.bits_per_pixel <= 8)
++		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
++	else
++		info->fix.visual = FB_VISUAL_TRUECOLOR;
++
++	info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
++
++	/* Re-initialize the DMA engine... */
++	dev_dbg(info->device, "  * update DMA engine\n");
++	atmel_lcdfb_update_dma(info, &info->var);
++
++	/* ...set frame size and burst length = 8 words (?) */
++	value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
++	value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
++	lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
++
++	atmel_lcdfb_set_2dcfg(info);
++
++	/* Now, the LCDC core... */
++
++	/* Set pixel clock */
++	clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
++
++	value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
++
++	if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
++		value++;
++
++	value = (value / 2) - 1;
++
++	if (value == 0) {
++		dev_notice(info->device, "Bypassing pixel clock divider\n");
++		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
++	} else
++		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
++
++	/* Initialize control register 2 */
++	value = sinfo->default_lcdcon2;
++
++	if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
++		value |= ATMEL_LCDC_INVLINE_INVERTED;
++	if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
++		value |= ATMEL_LCDC_INVFRAME_INVERTED;
++
++	switch (info->var.bits_per_pixel) {
++		case 1:	value |= ATMEL_LCDC_PIXELSIZE_1; break;
++		case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
++		case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
++		case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
++		case 15: /* fall through */
++		case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
++		case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
++		case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
++		default: BUG(); break;
++	}
++	dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
++	lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
++
++	/* Vertical timing */
++	value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
++	value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
++	value |= info->var.lower_margin;
++	dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
++	lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
++
++	/* Horizontal timing */
++	value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
++	value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
++	value |= (info->var.left_margin - 1);
++	dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
++	lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
++
++	/* Display size */
++	value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
++	value |= info->var.yres - 1;
++	lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
++
++	/* FIFO Threshold: Use formula from data sheet */
++	value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
++	lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
++
++	/* Toggle LCD_MODE every frame */
++	lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
++
++	/* Disable all interrupts */
++	lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
++
++	// Set contrast
++	value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
++	lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
++	lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CRST_VAL_DEFAULT);
++	/* ...wait for DMA engine to become idle... */
++	while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
++		msleep(10);
++
++	dev_dbg(info->device, "  * re-enable DMA engine\n");
++	/* ...and enable it with updated configuration */
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
++
++	dev_dbg(info->device, "  * re-enable LCDC core\n");
++	lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
++		(sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
++
++	dev_dbg(info->device, "  * DONE\n");
++
++	return 0;
++}
++
++static inline u_int chan_to_field(u_int chan, const struct fb_bitfield *bf)
++{
++	chan &= 0xffff;
++	chan >>= 16 - bf->length;
++	return chan << bf->offset;
++}
++
++/**
++ *  	atmel_lcdfb_setcolreg - Optional function. Sets a color register.
++ *      @regno: Which register in the CLUT we are programming
++ *      @red: The red value which can be up to 16 bits wide
++ *	@green: The green value which can be up to 16 bits wide
++ *	@blue:  The blue value which can be up to 16 bits wide.
++ *	@transp: If supported the alpha value which can be up to 16 bits wide.
++ *      @info: frame buffer info structure
++ *
++ *  	Set a single color register. The values supplied have a 16 bit
++ *  	magnitude which needs to be scaled in this function for the hardware.
++ *	Things to take into consideration are how many color registers, if
++ *	any, are supported with the current color visual. With truecolor mode
++ *	no color palettes are supported. Here a psuedo palette is created
++ *	which we store the value in pseudo_palette in struct fb_info. For
++ *	pseudocolor mode we have a limited color palette. To deal with this
++ *	we can program what color is displayed for a particular pixel value.
++ *	DirectColor is similar in that we can program each color field. If
++ *	we have a static colormap we don't need to implement this function.
++ *
++ *	Returns negative errno on error, or zero on success. In an
++ *	ideal world, this would have been the case, but as it turns
++ *	out, the other drivers return 1 on failure, so that's what
++ *	we're going to do.
++ */
++static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
++			     unsigned int green, unsigned int blue,
++			     unsigned int transp, struct fb_info *info)
++{
++	struct atmel_lcdfb_info *sinfo = info->par;
++	unsigned int val;
++	u32 *pal;
++	int ret = 1;
++
++	if (info->var.grayscale)
++		red = green = blue = (19595 * red + 38470 * green
++				      + 7471 * blue) >> 16;
++
++	switch (info->fix.visual) {
++	case FB_VISUAL_TRUECOLOR:
++		if (regno < 16) {
++			pal = info->pseudo_palette;
++
++			val  = chan_to_field(red, &info->var.red);
++			val |= chan_to_field(green, &info->var.green);
++			val |= chan_to_field(blue, &info->var.blue);
++
++			pal[regno] = val;
++			ret = 0;
++		}
++		break;
++
++	case FB_VISUAL_PSEUDOCOLOR:
++		if (regno < 256) {
++			val  = ((red   >> 11) & 0x001f);
++			val |= ((green >>  6) & 0x03e0);
++			val |= ((blue  >>  1) & 0x7c00);
++
++			/*
++			 * TODO: intensity bit. Maybe something like
++			 *   ~(red[10] ^ green[10] ^ blue[10]) & 1
++			 */
++
++			lcdc_writel(sinfo, ATMEL_LCDC_LUT_(regno), val);
++			ret = 0;
++		}
++		break;
++	}
++
++	return ret;
++}
++
++static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
++			       struct fb_info *info)
++{
++	dev_dbg(info->device, "%s\n", __func__);
++
++	atmel_lcdfb_update_dma(info, var);
++
++	return 0;
++}
++
++static struct fb_ops atmel_lcdfb_ops = {
++	.owner		= THIS_MODULE,
++	.fb_check_var	= atmel_lcdfb_check_var,
++	.fb_set_par	= atmel_lcdfb_set_par,
++	.fb_setcolreg	= atmel_lcdfb_setcolreg,
++	.fb_pan_display	= atmel_lcdfb_pan_display,
++	.fb_fillrect	= cfb_fillrect,
++	.fb_copyarea	= cfb_copyarea,
++	.fb_imageblit	= cfb_imageblit,
++};
++
++static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
++{
++	struct fb_info *info = dev_id;
++	struct atmel_lcdfb_info *sinfo = info->par;
++	u32 status;
++
++	status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
++	lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
++	return IRQ_HANDLED;
++}
++
++static int atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++	int ret = 0;
++
++	info->screen_base = sinfo->map_cpu;
++	info->fix.smem_start = sinfo->map_dma;
++	info->fix.smem_len = sinfo->map_size;
++
++	memset(info->screen_base, 0, info->fix.smem_len);
++	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
++
++	dev_info(info->device,
++	       "%luKiB frame buffer at %08lx (mapped at %p)\n",
++	       (unsigned long)info->fix.smem_len / 1024,
++	       (unsigned long)info->fix.smem_start,
++	       info->screen_base);
++
++	/* Allocate colormap */
++	ret = fb_alloc_cmap(&info->cmap, 256, 0);
++	if (ret < 0)
++		dev_err(info->device, "Alloc color map failed\n");
++
++	return ret;
++}
++
++static int atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
++{
++	int ret = 0;
++
++	if (sinfo->bus_clk && !IS_ERR(sinfo->bus_clk))
++		clk_enable(sinfo->bus_clk);
++	else {
++		if (cpu_is_at91sam9261()) {
++			/* not an error for other cpus */
++			ret = -ENXIO;
++		}
++	}
++
++	if (sinfo->lcdc_clk && !IS_ERR(sinfo->lcdc_clk))
++		clk_enable(sinfo->lcdc_clk);
++	else
++		ret = -ENXIO;
++
++	return ret;
++}
++
++static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
++{
++	if (sinfo->bus_clk && !IS_ERR(sinfo->bus_clk))
++		clk_disable(sinfo->bus_clk);
++	if (sinfo->lcdc_clk && !IS_ERR(sinfo->lcdc_clk))
++		clk_disable(sinfo->lcdc_clk);
++}
++
++
++static int atmel_lcdfb_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct fb_info *info;
++	struct atmel_lcdfb_info *sinfo;
++	struct resource *regs = NULL;
++	struct resource *map = NULL;
++	int ret;
++
++	dev_dbg(dev, "%s BEGIN\n", __func__);
++
++	ret = -ENOMEM;
++	info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
++	if (!info) {
++		dev_err(dev, "cannot allocate memory\n");
++		goto out;
++	}
++
++	sinfo = info->par;
++	memcpy(sinfo, dev->platform_data, sizeof(struct atmel_lcdfb_info));
++	sinfo->info = info;
++	sinfo->pdev = pdev;
++
++	strcpy(info->fix.id, sinfo->pdev->name);
++	info->flags = sinfo->default_flags;
++	info->pseudo_palette = pseudo_palette;
++	info->fbops = &atmel_lcdfb_ops;
++
++	memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
++	info->fix = atmel_lcdfb_fix;
++
++	/* Enable LCDC Clocks */
++	if (cpu_is_at91sam9261())
++		sinfo->bus_clk = clk_get(dev, "hck1");
++	sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
++	if (atmel_lcdfb_start_clock(sinfo)) {
++		dev_err(dev, "unable to clock LCDC\n");
++		goto free_info;
++	}
++
++	ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
++			info->monspecs.modedb_len, info->monspecs.modedb,
++			sinfo->default_bpp);
++	if (!ret) {
++		dev_err(dev, "no suitable video mode found\n");
++		goto stop_clk;
++	}
++
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_err(dev, "resources unusable\n");
++		ret = -ENXIO;
++		goto stop_clk;
++	}
++
++	sinfo->irq_base = platform_get_irq(pdev, 0);
++	if (sinfo->irq_base < 0) {
++		dev_err(dev, "unable to get irq\n");
++		ret = sinfo->irq_base;
++		goto stop_clk;
++	}
++
++	/* Initialize video memory */
++	map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++	if (map) {
++		/* use a pre-allocated memory buffer */
++		sinfo->map_dma = map->start;
++		sinfo->map_size = map->end - map->start + 1;
++		if (!request_mem_region(sinfo->map_dma,
++					sinfo->map_size, pdev->name)) {
++			ret = -EBUSY;
++			goto stop_clk;
++		}
++
++		sinfo->map_cpu = ioremap(sinfo->map_dma, sinfo->map_size);
++		if (!sinfo->map_cpu)
++			goto release_intmem;
++	} else {
++		/* alocate memory buffer */
++		ret = atmel_lcdfb_map_video_memory(sinfo);
++		if (ret < 0) {
++			dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
++			goto stop_clk;
++		}
++	}
++
++	/* LCDC registers */
++	info->fix.mmio_start = regs->start;
++	info->fix.mmio_len = regs->end - regs->start + 1;
++
++	if (!request_mem_region(info->fix.mmio_start,
++				info->fix.mmio_len, pdev->name)) {
++		ret = -EBUSY;
++		goto free_fb;
++	}
++
++	sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
++	if (!sinfo->mmio) {
++		dev_err(dev, "cannot map LCDC registers\n");
++		goto release_mem;
++	}
++
++	/* interrupt */
++	ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
++	if (ret) {
++		dev_err(dev, "request_irq failed: %d\n", ret);
++		goto unmap_mmio;
++	}
++
++	ret = atmel_lcdfb_init_fbinfo(sinfo);
++	if (ret < 0) {
++		dev_err(dev, "init fbinfo failed: %d\n", ret);
++		goto unregister_irqs;
++	}
++
++	/*
++	 * This makes sure that our colour bitfield
++	 * descriptors are correctly initialised.
++	 */
++	atmel_lcdfb_check_var(&info->var, info);
++	atmel_lcdfb_set_par(info);
++
++	ret = fb_set_var(info, &info->var);
++	if (ret) {
++		dev_warn(dev, "unable to set display parameters\n");
++		goto free_cmap;
++	}
++
++	dev_set_drvdata(dev, info);
++
++	/*
++	 * Tell the world that we're ready to go
++	 */
++	ret = register_framebuffer(info);
++	if (ret < 0) {
++		dev_err(dev, "failed to register framebuffer device: %d\n", ret);
++		goto free_cmap;
++	}
++
++	/* Power up the LCDC screen */
++	if (sinfo->power_control_pin)
++		at91_set_gpio_value(sinfo->power_control_pin, LCD_POWER_ON);
++
++	dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
++		       info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
++
++	return 0;
++
++
++free_cmap:
++	fb_dealloc_cmap(&info->cmap);
++unregister_irqs:
++	free_irq(sinfo->irq_base, info);
++unmap_mmio:
++	iounmap(sinfo->mmio);
++release_mem:
++ 	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
++free_fb:
++	if (map) {
++		iounmap(sinfo->map_cpu);
++	} else {
++		atmel_lcdfb_unmap_video_memory(sinfo);
++	}
++
++release_intmem:
++	if (map) {
++		release_mem_region(sinfo->map_dma, sinfo->map_size);
++	}
++stop_clk:
++	atmel_lcdfb_stop_clock(sinfo);
++free_info:
++	framebuffer_release(info);
++out:
++	dev_dbg(dev, "%s FAILED\n", __func__);
++	return ret;
++}
++
++static int atmel_lcdfb_remove(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct fb_info *info = dev_get_drvdata(dev);
++	struct atmel_lcdfb_info *sinfo = info->par;
++
++	if (!sinfo)
++		return 0;
++
++	if (sinfo->power_control_pin)
++		at91_set_gpio_value(sinfo->power_control_pin, LCD_POWER_OFF);
++	unregister_framebuffer(info);
++	atmel_lcdfb_stop_clock(sinfo);
++	fb_dealloc_cmap(&info->cmap);
++	free_irq(sinfo->irq_base, info);
++	iounmap(sinfo->mmio);
++ 	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
++	if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
++		iounmap(sinfo->map_cpu);
++		release_mem_region(sinfo->map_dma, sinfo->map_size);
++	} else {
++		atmel_lcdfb_unmap_video_memory(sinfo);
++	}
++
++	dev_set_drvdata(dev, NULL);
++	framebuffer_release(info);
++
++	return 0;
++}
++
++static struct platform_driver atmel_lcdfb_driver = {
++	.probe		= atmel_lcdfb_probe,
++	.remove		= atmel_lcdfb_remove,
++	.driver		= {
++		.name	= "atmel_lcdfb",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_lcdfb_init(void)
++{
++	return platform_driver_register(&atmel_lcdfb_driver);
++}
++
++static void __exit atmel_lcdfb_exit(void)
++{
++	platform_driver_unregister(&atmel_lcdfb_driver);
++}
++
++module_init(atmel_lcdfb_init);
++module_exit(atmel_lcdfb_exit);
++
++MODULE_AUTHOR("Atmel Corporation");
++MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/video/backlight/Kconfig linux-2.6.20.4-atmel/drivers/video/backlight/Kconfig
+--- linux-2.6.20.4-0rig/drivers/video/backlight/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/backlight/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -42,6 +42,18 @@
+ 	depends on LCD_CLASS_DEVICE
+ 	default y
+ 
++config LCD_LTV350QV
++	tristate "Samsung LTV350QV LCD Panel"
++	depends on LCD_DEVICE && SPI
++	default n
++	help
++	  If you have a Samsung LTV350QV LCD panel, say y to include a
++	  power control driver for it.  The panel starts up in power
++	  off state, so you need this driver in order to see any
++	  output.
++
++	  The LTV350QV panel is present on most ATSTK1000 boards.
++
+ config BACKLIGHT_CORGI
+ 	tristate "Sharp Corgi Backlight Driver (SL Series)"
+ 	depends on BACKLIGHT_DEVICE && PXA_SHARPSL
+diff -urN linux-2.6.20.4-0rig/drivers/video/backlight/ltv350qv.c linux-2.6.20.4-atmel/drivers/video/backlight/ltv350qv.c
+--- linux-2.6.20.4-0rig/drivers/video/backlight/ltv350qv.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/backlight/ltv350qv.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,300 @@
++/*
++ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/lcd.h>
++#include <linux/module.h>
++#include <linux/reboot.h>
++#include <linux/spi/spi.h>
++
++#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++
++struct ltv350qv {
++	struct spi_device *spi;
++	u8 *buffer;
++	int power;
++	struct semaphore lock;
++	struct lcd_device *ld;
++	struct list_head list;
++	int halt_done;
++};
++
++static LIST_HEAD(lcd_list);
++
++static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++{
++	struct spi_message msg;
++	struct spi_transfer index_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++	struct spi_transfer value_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++
++	spi_message_init(&msg);
++
++	/* register index */
++	lcd->buffer[0] = 0x74;
++	lcd->buffer[1] = 0x00;
++	lcd->buffer[2] = reg & 0x7f;
++	index_xfer.tx_buf = lcd->buffer;
++	spi_message_add_tail(&index_xfer, &msg);
++
++	/* register value */
++	lcd->buffer[4] = 0x76;
++	lcd->buffer[5] = val >> 8;
++	lcd->buffer[6] = val;
++	value_xfer.tx_buf = lcd->buffer + 4;
++	spi_message_add_tail(&value_xfer, &msg);
++
++	return spi_sync(lcd->spi, &msg);
++}
++
++#define write_reg(_spi, reg, val)				\
++	do {							\
++		ret = ltv350qv_write_reg(_spi, reg, val);	\
++		if (ret)					\
++			goto out;				\
++	} while (0)
++
++static int ltv350qv_power_on(struct ltv350qv *lcd)
++{
++	int ret;
++
++	write_reg(lcd,  9, 0x0000);
++	msleep(15);
++	write_reg(lcd,  9, 0x4000);
++	write_reg(lcd, 10, 0x2000);
++	write_reg(lcd,  9, 0x4055);
++	msleep(55);
++	write_reg(lcd,  1, 0x409d);
++	write_reg(lcd,  2, 0x0204);
++	write_reg(lcd,  3, 0x0100);
++	write_reg(lcd,  4, 0x3000);
++	write_reg(lcd,  5, 0x4003);
++	write_reg(lcd,  6, 0x000a);
++	write_reg(lcd,  7, 0x0021);
++	write_reg(lcd,  8, 0x0c00);
++	write_reg(lcd, 10, 0x0103);
++	write_reg(lcd, 11, 0x0301);
++	write_reg(lcd, 12, 0x1f0f);
++	write_reg(lcd, 13, 0x1f0f);
++	write_reg(lcd, 14, 0x0707);
++	write_reg(lcd, 15, 0x0307);
++	write_reg(lcd, 16, 0x0707);
++	write_reg(lcd, 17, 0x0000);
++	write_reg(lcd, 18, 0x0004);
++	write_reg(lcd, 19, 0x0000);
++
++	msleep(20);
++	write_reg(lcd,  9, 0x4a55);
++	write_reg(lcd,  5, 0x5003);
++
++out:
++	return ret;
++}
++
++static int ltv350qv_power_off(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* GON -> 0, POC -> 0 */
++	write_reg(lcd,  9, 0x4055);
++	/* DSC -> 0 */
++	write_reg(lcd,  5, 0x4003);
++	/* VCOMG -> 0 */
++	write_reg(lcd, 10, 0x2103);
++
++	msleep(1);
++
++	/* AP[2:0] -> 000 */
++	write_reg(lcd,  9, 0x4050);
++
++out:
++	return ret;
++}
++
++static int ltv350qv_power(struct ltv350qv *lcd, int power)
++{
++	int ret = 0;
++
++	down(&lcd->lock);
++
++	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_on(lcd);
++	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_off(lcd);
++
++	if (!ret)
++		lcd->power = power;
++
++	up(&lcd->lock);
++
++	return ret;
++}
++
++static int ltv350qv_set_power(struct lcd_device *ld, int power)
++{
++	struct ltv350qv *lcd;
++
++	lcd = class_get_devdata(&ld->class_dev);
++	return ltv350qv_power(lcd, power);
++}
++
++static int ltv350qv_get_power(struct lcd_device *ld)
++{
++	struct ltv350qv *lcd;
++
++	lcd = class_get_devdata(&ld->class_dev);
++	return lcd->power;
++}
++
++static struct lcd_properties lcd_properties = {
++	.owner		= THIS_MODULE,
++	.get_power	= ltv350qv_get_power,
++	.set_power	= ltv350qv_set_power,
++};
++
++static int __devinit ltv350qv_probe(struct spi_device *spi)
++{
++	struct ltv350qv *lcd;
++	struct lcd_device *ld;
++	int ret;
++
++	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
++	if (!lcd)
++		return -ENOMEM;
++
++	lcd->spi = spi;
++	lcd->power = FB_BLANK_POWERDOWN;
++	init_MUTEX(&lcd->lock);
++	lcd->buffer = kzalloc(8, GFP_KERNEL);
++
++	spi->mode = SPI_MODE_3;
++	spi->bits_per_word = 8;
++	ret = spi_setup(spi);
++	if (ret)
++		goto out_free_lcd;
++
++	ld = lcd_device_register("ltv350qv", lcd, &lcd_properties);
++	if (IS_ERR(ld)) {
++		ret = PTR_ERR(ld);
++		goto out_free_lcd;
++	}
++	lcd->ld = ld;
++
++	list_add(&lcd->list, &lcd_list);
++
++	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	if (ret)
++		goto out_unregister;
++
++	dev_set_drvdata(&spi->dev, lcd);
++
++	return 0;
++
++out_unregister:
++	lcd_device_unregister(ld);
++out_free_lcd:
++	kfree(lcd);
++	return ret;
++}
++
++static int __devexit ltv350qv_remove(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	list_del(&lcd->list);
++	lcd_device_unregister(lcd->ld);
++	kfree(lcd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int ltv350qv_suspend(struct spi_device *spi,
++			    pm_message_t state, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == SUSPEND_POWER_DOWN)
++		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++
++	return 0;
++}
++
++static int ltv350qv_resume(struct spi_device *spi, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == RESUME_POWER_ON)
++		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++
++	return 0;
++}
++#else
++#define ltv350qv_suspend	NULL
++#define ltv350qv_resume		NULL
++#endif
++
++/* Power down all displays on reboot, poweroff or halt */
++static int ltv350qv_halt(struct notifier_block *nb, unsigned long event,
++			 void *p)
++{
++	struct ltv350qv *lcd;
++
++	list_for_each_entry(lcd, &lcd_list, list) {
++		if (!lcd->halt_done)
++			ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++		lcd->halt_done = 1;
++	}
++
++	return NOTIFY_OK;
++}
++
++static struct spi_driver ltv350qv_driver = {
++	.driver = {
++		.name		= "ltv350qv",
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++
++	.probe		= ltv350qv_probe,
++	.remove		= __devexit_p(ltv350qv_remove),
++	.suspend	= ltv350qv_suspend,
++	.resume		= ltv350qv_resume,
++};
++
++static struct notifier_block ltv350qv_notifier = {
++	.notifier_call	= ltv350qv_halt,
++};
++
++static int __init ltv350qv_init(void)
++{
++	register_reboot_notifier(&ltv350qv_notifier);
++	return spi_register_driver(&ltv350qv_driver);
++}
++
++static void __exit ltv350qv_exit(void)
++{
++	unregister_reboot_notifier(&ltv350qv_notifier);
++	spi_unregister_driver(&ltv350qv_driver);
++}
++module_init(ltv350qv_init);
++module_exit(ltv350qv_exit);
++
++MODULE_AUTHOR("Atmel Norway");
++MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/drivers/video/backlight/Makefile linux-2.6.20.4-atmel/drivers/video/backlight/Makefile
+--- linux-2.6.20.4-0rig/drivers/video/backlight/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/backlight/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -5,3 +5,4 @@
+ obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+ obj-$(CONFIG_BACKLIGHT_LOCOMO)	+= locomolcd.o
++obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
+diff -urN linux-2.6.20.4-0rig/drivers/video/fbmem.c linux-2.6.20.4-atmel/drivers/video/fbmem.c
+--- linux-2.6.20.4-0rig/drivers/video/fbmem.c	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/fbmem.c	2007-03-24 16:42:29.000000000 +0100
+@@ -1199,6 +1199,10 @@
+ 	pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
+ #elif defined(__arm__) || defined(__sh__) || defined(__m32r__)
+ 	vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
++#elif defined(__avr32__)
++	vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)
++				      & ~_PAGE_CACHABLE)
++				     | (_PAGE_BUFFER | _PAGE_DIRTY));
+ #elif defined(__ia64__)
+ 	if (efi_range_is_wc(vma->vm_start, vma->vm_end - vma->vm_start))
+ 		vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+diff -urN linux-2.6.20.4-0rig/drivers/video/Kconfig linux-2.6.20.4-atmel/drivers/video/Kconfig
+--- linux-2.6.20.4-0rig/drivers/video/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -276,6 +276,28 @@
+ 	  If you plan to use the LCD display with your SA-1100 system, say
+ 	  Y here.
+ 
++config FB_SIDSA
++	tristate "SIDSA LCDC support"
++	select FB_CFB_FILLRECT
++	select FB_CFB_COPYAREA
++	select FB_CFB_IMAGEBLIT
++	depends on FB && AVR32
++	help
++	  This enables support for the SIDSA LCD Controller.
++
++config FB_SIDSA_DEFAULT_BPP
++	int "SIDSA LCDC default color depth"
++	default 24
++	depends on FB_SIDSA
++	help
++	  Specify the maximum color depth you want to be able to
++	  support. This, together with the resolution of the LCD
++	  panel, determines the amount of framebuffer memory allocated
++	  when the driver is initialized.
++
++	  Allowable values are 1, 2, 4, 8, 16, 24 and 32. If unsure,
++	  say 24.
++
+ config FB_IMX
+ 	tristate "Motorola i.MX LCD support"
+ 	depends on FB && ARM && ARCH_IMX
+@@ -698,6 +720,22 @@
+ 	  working with S1D13806). Product specs at
+ 	  <http://www.erd.epson.com/vdc/html/legacy_13xxx.htm>
+ 
++config FB_ATMEL
++	tristate "AT91/AT32 LCD Controller support"
++	depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || AVR32)
++	select FB_CFB_FILLRECT
++	select FB_CFB_COPYAREA
++	select FB_CFB_IMAGEBLIT
++	help
++	  This enables support for the AT91/AT32 LCD Controller.
++
++config FB_INTSRAM
++	bool "Frame Buffer in internal SRAM"
++	depends on FB_ATMEL && ARCH_AT91SAM9261
++	help
++	  Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
++	  to let frame buffer in external SDRAM.
++
+ config FB_NVIDIA
+ 	tristate "nVidia Framebuffer Support"
+ 	depends on FB && PCI
+diff -urN linux-2.6.20.4-0rig/drivers/video/Makefile linux-2.6.20.4-atmel/drivers/video/Makefile
+--- linux-2.6.20.4-0rig/drivers/video/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -78,6 +78,7 @@
+ obj-$(CONFIG_FB_SUN3)             += sun3fb.o
+ obj-$(CONFIG_FB_HIT)              += hitfb.o
+ obj-$(CONFIG_FB_EPSON1355)	  += epson1355fb.o
++obj-$(CONFIG_FB_ATMEL)		  += atmel_lcdfb.o
+ obj-$(CONFIG_FB_PVR2)             += pvr2fb.o
+ obj-$(CONFIG_FB_VOODOO1)          += sstfb.o
+ obj-$(CONFIG_FB_ARMCLCD)	  += amba-clcd.o
+@@ -100,6 +101,7 @@
+ obj-$(CONFIG_FB_PNX4008_DUM)	  += pnx4008/
+ obj-$(CONFIG_FB_PNX4008_DUM_RGB)  += pnx4008/
+ obj-$(CONFIG_FB_IBM_GXT4500)	  += gxt4500.o
++obj-$(CONFIG_FB_SIDSA)		  += sidsafb.o
+ 
+ # Platform or fallback drivers go here
+ obj-$(CONFIG_FB_VESA)             += vesafb.o
+diff -urN linux-2.6.20.4-0rig/drivers/video/sidsafb.c linux-2.6.20.4-atmel/drivers/video/sidsafb.c
+--- linux-2.6.20.4-0rig/drivers/video/sidsafb.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/drivers/video/sidsafb.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,860 @@
++/*
++ * Framebuffer Driver for Atmel/SIDSA LCD Controller
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#undef DEBUG
++
++#include <linux/clk.h>
++#include <linux/completion.h>
++#include <linux/kernel.h>
++#include <linux/dma-mapping.h>
++#include <linux/interrupt.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++
++#include <asm/arch/board.h>
++
++#include <asm/periph/lcdc.h>
++
++/* More or less configurable parameters */
++#define SIDSAFB_FIFO_SIZE		512
++#define SIDSAFB_DMA_BURST_LEN		8
++
++/* TODO: These should be autogenerated from part description file */
++#define LCDC_DISTYPE_STN_MONO		0
++#define LCDC_DISTYPE_STN_COLOR		1
++#define LCDC_DISTYPE_TFT		2
++#define LCDC_LUT			0xc00
++
++struct sidsafb_info {
++	spinlock_t		lock;
++	struct fb_info *	info;
++	void __iomem *		regs;
++	unsigned long		irq_base;
++	int			wait_for_vsync;
++	struct completion	vsync_complete;
++	unsigned int		guard_time;
++	struct clk		*hclk;
++	struct clk		*pixclk;
++	struct platform_device	*pdev;
++	u32			pseudo_palette[16];
++};
++
++/*
++ * How large framebuffer to allocate if none was provided by the
++ * platform. This default is the smallest we can possibly get away
++ * with.
++ */
++static unsigned long fb_size = (320 * 240);
++
++#if 0
++static struct fb_videomode sony_modes[] = {
++	{
++		.refresh	= 48,
++		.xres		= 240,		.yres		= 160,
++		.pixclock	= 520833,
++
++		.left_margin	= 7,		.right_margin	= 9,
++		.upper_margin	= 19,		.lower_margin	= 20,
++		.hsync_len	= 9,		.vsync_len	= 2,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++#endif
++
++#if 0
++static struct fb_videomode vga_modes[] = {
++	{
++		.refresh	= 122,
++		.xres		= 320,		.yres		= 240,
++		.pixclock	= 80000,
++
++		.left_margin	= 10,		.right_margin	= 20,
++		.upper_margin	= 30,		.lower_margin	= 5,
++		.hsync_len	= 20,		.vsync_len	= 3,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++	{
++		.refresh	= 70,
++		.xres		= 640,		.yres		= 480,
++		.pixclock	= 40000,
++
++		.left_margin	= 10,		.right_margin	= 20,
++		.upper_margin	= 30,		.lower_margin	= 5,
++		.hsync_len	= 20,		.vsync_len	= 3,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++#else
++static struct fb_videomode samsung_modes[] = {
++	{
++		.refresh	= 75,
++		.xres		= 320,		.yres		= 240,
++		.pixclock	= 145111,
++
++		.left_margin	= 17,		.right_margin	= 33,
++		.upper_margin	= 10,		.lower_margin	= 10,
++		.hsync_len	= 16,		.vsync_len	= 1,
++
++		.sync		= FB_SYNC_PCLK_RISING,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++#endif
++
++#if 1
++static struct fb_monspecs default_monspecs = {
++	.modedb		= samsung_modes,
++	.manufacturer	= "SNG",
++	.monitor	= "LCD panel",
++	.serial_no	= "xxxx",
++	.ascii		= "yyyy",
++	.modedb_len	= ARRAY_SIZE(samsung_modes),
++	.hfmin		= 14820,
++	.hfmax		= 22230,
++	.vfmin		= 60,
++	.vfmax		= 90,
++	.dclkmax	= 30000000,
++};
++#endif
++
++#if 0
++static struct fb_monspecs default_monspecs = {
++	.modedb		= sony_modes,
++	.manufacturer	= "SNY",	/* 4 chars?!? */
++	.monitor	= "LCD panel",
++	.serial_no	= "xxxx",
++	.ascii		= "yyyy",
++	.modedb_len	= ARRAY_SIZE(sony_modes),
++	.hfmin		= 7000,
++	.hfmax		= 8000,
++	.vfmin		= 45,
++	.vfmax		= 50,
++};
++// #else
++static struct fb_monspecs default_monspecs = {
++	.modedb		= vga_modes,
++	.manufacturer	= "VGA",
++	.monitor	= "Generic VGA",
++	.serial_no	= "xxxx",
++	.ascii		= "yyyy",
++	.modedb_len	= ARRAY_SIZE(vga_modes),
++	.hfmin		= 30000,
++	.hfmax		= 64000,
++	.vfmin		= 50,
++	.vfmax		= 150,
++};
++#endif
++
++/* Driver defaults */
++static struct fb_fix_screeninfo sidsafb_fix __devinitdata = {
++	.id		= "sidsafb",
++	.type		= FB_TYPE_PACKED_PIXELS,
++	.visual		= FB_VISUAL_TRUECOLOR,
++	.xpanstep	= 1,
++	.ypanstep	= 1,
++	.ywrapstep	= 0,
++	.accel		= FB_ACCEL_NONE,
++};
++
++/*
++ * Let the user decide whether FBIOPAN_DISPLAY waits for the next
++ * vsync or not.
++ */
++static ssize_t
++vsync_pan_show(struct device *dev, struct device_attribute *attr, char *buf)
++{
++	struct fb_info *info = dev_get_drvdata(dev);
++	struct sidsafb_info *sinfo = info->par;
++
++	return sprintf(buf, "%d\n", sinfo->wait_for_vsync);
++}
++
++static ssize_t
++vsync_pan_store(struct device *dev, struct device_attribute *attr,
++		const char *buf, size_t count)
++{
++	struct fb_info *info = dev_get_drvdata(dev);
++	struct sidsafb_info *sinfo = info->par;
++	unsigned long val;
++
++	val = simple_strtoul(buf, NULL, 0);
++	if (val)
++		sinfo->wait_for_vsync = 1;
++	else
++		sinfo->wait_for_vsync = 0;
++
++	return count;
++}
++
++static DEVICE_ATTR(vsync_pan, 0644, vsync_pan_show, vsync_pan_store);
++
++static void sidsafb_update_dma(struct fb_info *info,
++			       struct fb_var_screeninfo *var)
++{
++	struct sidsafb_info *sinfo = info->par;
++	struct fb_fix_screeninfo *fix = &info->fix;
++	unsigned long dma_addr;
++	unsigned long pixeloff;
++	unsigned long dma2dcfg;
++
++	dma_addr = (fix->smem_start + var->yoffset * fix->line_length
++		    + var->xoffset * var->bits_per_pixel / 8);
++
++	dma_addr &= ~3UL;
++	pixeloff = LCDC_MKBF(DMA2DCFG_PIXELOFF, var->xoffset * var->bits_per_pixel);
++
++	/* Set framebuffer DMA base address and pixel offset */
++	lcdc_writel(sinfo, DMABADDR1, dma_addr);
++	dma2dcfg = lcdc_readl(sinfo, DMA2DCFG);
++	dma2dcfg = LCDC_INSBF(DMA2DCFG_PIXELOFF, pixeloff, dma2dcfg);
++	lcdc_writel(sinfo, DMA2DCFG, dma2dcfg);
++
++	/* Update configuration */
++	lcdc_writel(sinfo, DMACON, (lcdc_readl(sinfo, DMACON)
++				    | LCDC_BIT(DMACON_DMAUPDT)));
++}
++
++/**
++ *      sidsafb_check_var - Validates a var passed in.
++ *      @var: frame buffer variable screen structure
++ *      @info: frame buffer structure that represents a single frame buffer
++ *
++ *	Checks to see if the hardware supports the state requested by
++ *	var passed in. This function does not alter the hardware
++ *	state!!!  This means the data stored in struct fb_info and
++ *	struct sidsafb_info do not change. This includes the var
++ *	inside of struct fb_info.  Do NOT change these. This function
++ *	can be called on its own if we intent to only test a mode and
++ *	not actually set it. The stuff in modedb.c is a example of
++ *	this. If the var passed in is slightly off by what the
++ *	hardware can support then we alter the var PASSED in to what
++ *	we can do. If the hardware doesn't support mode change a
++ *	-EINVAL will be returned by the upper layers. You don't need
++ *	to implement this function then. If you hardware doesn't
++ *	support changing the resolution then this function is not
++ *	needed. In this case the driver would just provide a var that
++ *	represents the static state the screen is in.
++ *
++ *	Returns negative errno on error, or zero on success.
++ */
++static int sidsafb_check_var(struct fb_var_screeninfo *var,
++			     struct fb_info *info)
++{
++	unsigned long new_fb_size;
++
++	pr_debug("sidsafb_check_var:\n");
++	pr_debug("  resolution: %ux%u\n", var->xres, var->yres);
++	pr_debug("  pixclk:     %llu Hz\n", 1000000000000ULL / var->pixclock);
++	pr_debug("  bpp:        %u\n", var->bits_per_pixel);
++
++	new_fb_size = (var->xres_virtual * var->yres_virtual
++		       * ((var->bits_per_pixel + 7) / 8));
++	if (new_fb_size > info->fix.smem_len) {
++		printk(KERN_NOTICE
++		       "sidsafb: %uB framebuffer too small for %ux%ux%u\n",
++		       info->fix.smem_len, var->xres_virtual,
++		       var->yres_virtual, var->bits_per_pixel);
++		return -EINVAL;
++	}
++
++	/* Force same alignment for each line */
++	var->xres = (var->xres + 3) & ~3UL;
++	var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
++
++	var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
++	var->transp.offset = var->transp.length = 0;
++
++	switch (var->bits_per_pixel) {
++	case 2:
++	case 4:
++	case 8:
++		var->red.offset = var->green.offset = var->blue.offset = 0;
++		var->red.length = var->green.length = var->blue.length
++			= var->bits_per_pixel;
++		break;
++	case 15:
++	case 16:
++		/*
++		 * Bit 16 is the "intensity" bit, I think. Not sure
++		 * what we're going to use that for...
++		 */
++		var->red.offset = 0;
++		var->green.offset = 5;
++		var->blue.offset = 10;
++		var->red.length = 5;
++		var->green.length = 5;
++		var->blue.length = 5;
++		break;
++	case 32:
++		var->transp.offset = 24;
++		var->transp.length = 8;
++		/* fall through */
++	case 24:
++		var->red.offset = 16;
++		var->green.offset = 8;
++		var->blue.offset = 0;
++		var->red.length = var->green.length = var->blue.length = 8;
++		break;
++	default:
++		printk(KERN_NOTICE "sidsafb: color depth %d not supported\n",
++		       var->bits_per_pixel);
++		return -EINVAL;
++	}
++
++	var->xoffset = var->yoffset = 0;
++	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
++		var->transp.msb_right = 0;
++
++	return 0;
++}
++
++/**
++ *      sidsafb_set_par - Alters the hardware state.
++ *      @info: frame buffer structure that represents a single frame buffer
++ *
++ *	Using the fb_var_screeninfo in fb_info we set the resolution
++ *	of the this particular framebuffer. This function alters the
++ *	par AND the fb_fix_screeninfo stored in fb_info. It doesn't
++ *	not alter var in fb_info since we are using that data. This
++ *	means we depend on the data in var inside fb_info to be
++ *	supported by the hardware.  sidsafb_check_var is always called
++ *	before sidsafb_set_par to ensure this.  Again if you can't
++ *	change the resolution you don't need this function.
++ *
++ */
++static int sidsafb_set_par(struct fb_info *info)
++{
++	struct sidsafb_info *sinfo = info->par;
++	unsigned long value;
++
++	pr_debug("sidsafb_set_par:\n");
++	pr_debug("  * resolution: %ux%u (%ux%u virtual)\n",
++		 info->var.xres, info->var.yres,
++		 info->var.xres_virtual, info->var.yres_virtual);
++
++	/* Turn off the LCD controller and the DMA controller */
++	pr_debug("writing 0x%08x to %p\n",
++		 LCDC_MKBF(PWRCON_GUARD_TIME, sinfo->guard_time),
++		 sinfo->regs + LCDC_PWRCON);
++	lcdc_writel(sinfo, PWRCON,
++		    LCDC_MKBF(PWRCON_GUARD_TIME, sinfo->guard_time));
++	pr_debug("writing 0 to %p\n", sinfo->regs + LCDC_DMACON);
++	lcdc_writel(sinfo, DMACON, 0);
++
++	info->fix.line_length = (info->var.xres_virtual
++				 * (info->var.bits_per_pixel / 8));
++
++	if (info->var.bits_per_pixel <= 8)
++		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
++	else
++		info->fix.visual = FB_VISUAL_TRUECOLOR;
++
++	/* Re-initialize the DMA engine... */
++	pr_debug("  * update DMA engine\n");
++	sidsafb_update_dma(info, &info->var);
++
++	/* ...set frame size and burst length = 8 words (?) */
++	value = LCDC_MKBF(DMAFRMCFG_FRMSIZE,
++			  (info->var.yres * info->fix.line_length + 3) / 4);
++	value |= LCDC_MKBF(DMAFRMCFG_BRSTLEN, (SIDSAFB_DMA_BURST_LEN - 1));
++	lcdc_writel(sinfo, DMAFRMCFG, value);
++
++	/* ...set 2D configuration (necessary for xres_virtual != xres) */
++	value = LCDC_MKBF(DMA2DCFG_ADDRINC,
++			  info->var.xres_virtual - info->var.xres);
++	lcdc_writel(sinfo, DMA2DCFG, value);
++
++	/* ...wait for DMA engine to become idle... */
++	while (lcdc_readl(sinfo, DMACON) & LCDC_BIT(DMACON_DMABUSY))
++		msleep(10);
++
++	pr_debug("  * re-enable DMA engine\n");
++	/* ...and enable it with updated configuration */
++	lcdc_writel(sinfo, DMACON, (LCDC_BIT(DMACON_DMAEN)
++				    | LCDC_BIT(DMACON_DMAUPDT)
++				    | LCDC_BIT(DMACON_DMA2DEN)));
++
++	/* Now, the LCD core... */
++
++	/* Set pixel clock. */
++	value = (clk_get_rate(sinfo->pixclk) / 100000) * info->var.pixclock;
++	value /= 10000000;
++	value = (value + 1) / 2;
++	if (value == 0) {
++		printk("sidsafb: Bypassing lcdc_pclk divider\n");
++		lcdc_writel(sinfo, LCDCON1, LCDC_BIT(LCDCON1_BYPASS));
++	} else {
++		lcdc_writel(sinfo, LCDCON1, LCDC_MKBF(LCDCON1_CLKVAL, value - 1));
++	}
++
++	/* Initialize control register 2 */
++	value = (LCDC_BIT(LCDCON2_CLKMOD)
++		 | LCDC_MKBF(LCDCON2_DISTYPE, LCDC_DISTYPE_TFT));
++	if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
++		value |= LCDC_BIT(LCDCON2_INVLINE);
++	if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
++		value |= LCDC_BIT(LCDCON2_INVFRAME);
++	if (info->var.sync & FB_SYNC_PCLK_RISING)
++		value |= LCDC_BIT(LCDCON2_INVCLK);
++
++	switch (info->var.bits_per_pixel) {
++	case 1:	value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 0); break;
++	case 2: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 1); break;
++	case 4: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 2); break;
++	case 8: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 3); break;
++	case 15: /* fall through */
++	case 16: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 4); break;
++	case 24: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 5); break;
++	case 32: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 6); break;
++	default: BUG(); break;
++	}
++	pr_debug("  * LCDCON2 = %08lx\n", value);
++	lcdc_writel(sinfo, LCDCON2, value);
++
++	/* Vertical timing */
++	value = LCDC_MKBF(LCDTIM1_VPW, info->var.vsync_len - 1);
++	value |= LCDC_MKBF(LCDTIM1_VBP, info->var.upper_margin);
++	value |= LCDC_MKBF(LCDTIM1_VFP, info->var.lower_margin);
++	pr_debug("  * LCDTIM1 = %08lx\n", value);
++	lcdc_writel(sinfo, LCDTIM1, value);
++
++	/* Horizontal timing */
++	value = LCDC_MKBF(LCDTIM2_HFP, info->var.right_margin - 1);
++	value |= LCDC_MKBF(LCDTIM2_HPW, info->var.hsync_len - 1);
++	value |= LCDC_MKBF(LCDTIM2_HBP, info->var.left_margin - 1);
++	pr_debug("  * LCDTIM2 = %08lx\n", value);
++	lcdc_writel(sinfo, LCDTIM2, value);
++
++	/* Display size */
++	value = LCDC_MKBF(LCDFRMCFG_LINESIZE, info->var.xres - 1);
++	value |= LCDC_MKBF(LCDFRMCFG_LINEVAL, info->var.yres - 1);
++	lcdc_writel(sinfo, LCDFRMCFG, value);
++
++	/* FIFO Threshold: Use formula from data sheet */
++	value = SIDSAFB_FIFO_SIZE - (2 * SIDSAFB_DMA_BURST_LEN + 3);
++	lcdc_writel(sinfo, LCDFIFO, value);
++
++	/* Toggle LCD_MODE every frame */
++	lcdc_writel(sinfo, LCDMVAL, 0);
++
++	/* Disable all interrupts */
++	lcdc_writel(sinfo, LCD_IDR, ~0UL);
++
++	/* Wait for the LCDC core to become idle and enable it */
++	while(lcdc_readl(sinfo, PWRCON) & LCDC_BIT(PWRCON_LCD_BUSY))
++		msleep(10);
++
++	pr_debug("  * re-enable LCD core\n");
++	lcdc_writel(sinfo, PWRCON,
++		    LCDC_MKBF(PWRCON_GUARD_TIME, sinfo->guard_time)
++		    | LCDC_BIT(PWRCON_LCD_PWR));
++
++	pr_debug("  * DONE\n");
++	return 0;
++}
++
++static inline u_int chan_to_field(u_int chan, const struct fb_bitfield *bf)
++{
++	chan &= 0xffff;
++	chan >>= 16 - bf->length;
++	return chan << bf->offset;
++}
++
++/**
++ *  	sidsafb_setcolreg - Optional function. Sets a color register.
++ *      @regno: Which register in the CLUT we are programming
++ *      @red: The red value which can be up to 16 bits wide
++ *	@green: The green value which can be up to 16 bits wide
++ *	@blue:  The blue value which can be up to 16 bits wide.
++ *	@transp: If supported the alpha value which can be up to 16 bits wide.
++ *      @info: frame buffer info structure
++ *
++ *  	Set a single color register. The values supplied have a 16 bit
++ *  	magnitude which needs to be scaled in this function for the hardware.
++ *	Things to take into consideration are how many color registers, if
++ *	any, are supported with the current color visual. With truecolor mode
++ *	no color palettes are supported. Here a psuedo palette is created
++ *	which we store the value in pseudo_palette in struct fb_info. For
++ *	pseudocolor mode we have a limited color palette. To deal with this
++ *	we can program what color is displayed for a particular pixel value.
++ *	DirectColor is similar in that we can program each color field. If
++ *	we have a static colormap we don't need to implement this function.
++ *
++ *	Returns negative errno on error, or zero on success. In an
++ *	ideal world, this would have been the case, but as it turns
++ *	out, the other drivers return 1 on failure, so that's what
++ *	we're going to do.
++ */
++static int sidsafb_setcolreg(unsigned int regno, unsigned int red,
++			     unsigned int green, unsigned int blue,
++			     unsigned int transp, struct fb_info *info)
++{
++	struct sidsafb_info *sinfo = info->par;
++	unsigned int val;
++	u32 *pal;
++	int ret = 1;
++
++	if (info->var.grayscale)
++		red = green = blue = (19595 * red + 38470 * green
++				      + 7471 * blue) >> 16;
++
++	switch (info->fix.visual) {
++	case FB_VISUAL_TRUECOLOR:
++		if (regno < 16) {
++			pal = info->pseudo_palette;
++
++			val  = chan_to_field(red, &info->var.red);
++			val |= chan_to_field(green, &info->var.green);
++			val |= chan_to_field(blue, &info->var.blue);
++
++			pal[regno] = val;
++			ret = 0;
++		}
++		break;
++
++	case FB_VISUAL_PSEUDOCOLOR:
++		if (regno < 256) {
++			val  = ((red   >> 11) & 0x001f);
++			val |= ((green >>  6) & 0x03e0);
++			val |= ((blue  >>  1) & 0x7c00);
++
++			/*
++			 * TODO: intensity bit. Maybe something like
++			 *   ~(red[10] ^ green[10] ^ blue[10]) & 1
++			 */
++
++			lcdc_writel(sinfo, LUT + regno * 4, val);
++			ret = 0;
++		}
++		break;
++	}
++
++	return ret;
++}
++
++static int sidsafb_pan_display(struct fb_var_screeninfo *var,
++			       struct fb_info *info)
++{
++	struct sidsafb_info *sinfo = info->par;
++
++	pr_debug("sidsafb_pan_display\n");
++
++	sidsafb_update_dma(info, var);
++
++	if (sinfo->wait_for_vsync) {
++		spin_lock_irq(&sinfo->lock);
++		lcdc_writel(sinfo, LCD_ICR, LCDC_BIT(LCD_ICR_EOFIC));
++		lcdc_writel(sinfo, LCD_IER, LCDC_BIT(LCD_IER_EOFIE));
++		init_completion(&sinfo->vsync_complete);
++		lcdc_readl(sinfo, LCD_IMR);
++		spin_unlock_irq(&sinfo->lock);
++
++		wait_for_completion(&sinfo->vsync_complete);
++
++		lcdc_writel(sinfo, LCD_IDR, LCDC_BIT(LCD_IDR_EOFID));
++	}
++
++	return 0;
++}
++
++static struct fb_ops sidsafb_ops = {
++	.owner		= THIS_MODULE,
++	.fb_check_var	= sidsafb_check_var,
++	.fb_set_par	= sidsafb_set_par,
++	.fb_setcolreg	= sidsafb_setcolreg,
++	.fb_pan_display	= sidsafb_pan_display,
++	.fb_fillrect	= cfb_fillrect,
++	.fb_copyarea	= cfb_copyarea,
++	.fb_imageblit	= cfb_imageblit,
++};
++
++static irqreturn_t sidsafb_interrupt(int irq, void *dev_id)
++{
++	struct fb_info *info = dev_id;
++	struct sidsafb_info *sinfo = info->par;
++	u32 status;
++
++	status = lcdc_readl(sinfo, LCD_ISR);
++	while (status) {
++		if (status & LCDC_BIT(LCD_ISR_EOFIS)) {
++			pr_debug("sidsafb: DMA End Of Frame interrupt\n");
++
++			lcdc_writel(sinfo, LCD_ICR, LCDC_BIT(LCD_ICR_EOFIC));
++			status &= ~LCDC_BIT(LCD_ISR_EOFIS);
++			complete(&sinfo->vsync_complete);
++		}
++
++		if (status) {
++			printk(KERN_ERR
++			       "LCDC: Interrupts still pending: 0x%x\n",
++			       status);
++			lcdc_writel(sinfo, LCD_IDR, status);
++		}
++
++		status = lcdc_readl(sinfo, LCD_ISR);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static void __devinit init_pseudo_palette(u32 *palette)
++{
++	static const u32 init_palette[16] = {
++		0x000000,
++		0xaa0000,
++		0x00aa00,
++		0xaa5500,
++		0x0000aa,
++		0xaa00aa,
++		0x00aaaa,
++		0xaaaaaa,
++		0x555555,
++		0xff5555,
++		0x55ff55,
++		0xffff55,
++		0x5555ff,
++		0xff55ff,
++		0x55ffff,
++		0xffffff
++	};
++
++	memcpy(palette, init_palette, sizeof(init_palette));
++}
++
++static int __devinit sidsafb_set_fbinfo(struct sidsafb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++
++	init_pseudo_palette(sinfo->pseudo_palette);
++
++	info->flags		= (FBINFO_DEFAULT
++				   | FBINFO_PARTIAL_PAN_OK
++				   | FBINFO_HWACCEL_XPAN
++				   | FBINFO_HWACCEL_YPAN);
++	memcpy(&info->fix, &sidsafb_fix, sizeof(info->fix));
++	memcpy(&info->monspecs, &default_monspecs, sizeof(info->monspecs));
++	info->fbops		= &sidsafb_ops;
++	info->pseudo_palette	= sinfo->pseudo_palette;
++
++	return 0;
++}
++
++static int __devinit sidsafb_probe(struct platform_device *pdev)
++{
++	struct lcdc_platform_data *fb_data = pdev->dev.platform_data;
++	struct fb_info *info;
++	struct sidsafb_info *sinfo;
++	const struct resource *mmio_resource;
++	int ret;
++
++	pr_debug("sidsafb_probe BEGIN\n");
++
++	mmio_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!mmio_resource) {
++		dev_err(&pdev->dev, "no MMIO resource found\n");
++		return -ENXIO;
++	}
++
++	ret = -ENOMEM;
++	info = framebuffer_alloc(sizeof(struct sidsafb_info), &pdev->dev);
++	if (!info) {
++		dev_err(&pdev->dev, "failed to allocate memory\n");
++		goto out;
++	}
++
++	sinfo = info->par;
++	sinfo->info = info;
++	sinfo->pdev = pdev;
++	sinfo->guard_time = 1;
++
++	spin_lock_init(&sinfo->lock);
++	sidsafb_set_fbinfo(sinfo);
++	info->fix.mmio_start = mmio_resource->start;
++	info->fix.mmio_len = mmio_resource->end - mmio_resource->start + 1;
++	sinfo->irq_base = platform_get_irq(pdev, 0);
++
++	sinfo->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(sinfo->hclk)) {
++		dev_err(&pdev->dev, "failed to get hclk\n");
++		ret = PTR_ERR(sinfo->hclk);
++		goto free_info;
++	}
++	sinfo->pixclk = clk_get(&pdev->dev, "pixclk");
++	if (IS_ERR(sinfo->pixclk)) {
++		dev_err(&pdev->dev, "failed to get pixel clock\n");
++		ret = PTR_ERR(sinfo->hclk);
++		goto put_hclk;
++	}
++
++	clk_enable(sinfo->hclk);
++	clk_enable(sinfo->pixclk);
++
++	/* Use platform-supplied framebuffer memory if available */
++	if (fb_data && fb_data->fbmem_size != 0) {
++		info->fix.smem_start = fb_data->fbmem_start;
++		info->fix.smem_len = fb_data->fbmem_size;
++		info->screen_base = ioremap(info->fix.smem_start,
++					    info->fix.smem_len);
++	} else {
++		dma_addr_t paddr;
++
++		info->fix.smem_len = fb_size;
++		info->screen_base = dma_alloc_coherent(&pdev->dev, fb_size,
++						       &paddr, GFP_KERNEL);
++		info->fix.smem_start = paddr;
++	}
++
++	if (!info->screen_base) {
++		printk(KERN_ERR "sidsafb: Could not allocate framebuffer\n");
++		goto disable_clocks;
++	}
++
++	sinfo->regs = ioremap(info->fix.mmio_start, info->fix.mmio_len);
++	if (!sinfo->regs) {
++		printk(KERN_ERR "sidsafb: Could not map LCDC registers\n");
++		goto free_fb;
++	}
++
++	ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
++			   info->monspecs.modedb_len, info->monspecs.modedb,
++			   CONFIG_FB_SIDSA_DEFAULT_BPP);
++	if (!ret) {
++		printk(KERN_ERR "sidsafb: No suitable video mode found\n");
++		goto unmap_regs;
++	}
++
++	ret = request_irq(sinfo->irq_base, sidsafb_interrupt, 0,
++			  "sidsafb", info);
++	if (ret)
++		goto unmap_regs;
++
++	/* Allocate colormap */
++	if (fb_alloc_cmap(&info->cmap, 256, 0)) {
++		ret = -ENOMEM;
++		goto unregister_irqs;
++	}
++
++	platform_set_drvdata(pdev, info);
++	ret = device_create_file(&pdev->dev, &dev_attr_vsync_pan);
++	if (ret)
++		goto free_cmap;
++
++	/*
++	 * Tell the world that we're ready to go
++	 */
++	ret = register_framebuffer(info);
++	if (ret)
++		goto remove_attrs;
++
++	printk("fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
++	       info->node, info->fix.mmio_start, sinfo->regs, sinfo->irq_base);
++
++	memset_io(info->screen_base, 0, info->fix.smem_len);
++	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
++	ret = fb_set_var(info, &info->var);
++	if (ret)
++		printk(KERN_WARNING
++		       "sidsafb: Unable to set display parameters\n");
++	info->var.activate &= ~(FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW);
++
++	pr_debug("sidsafb_probe SUCCESS\n");
++	return 0;
++
++
++remove_attrs:
++	device_remove_file(&pdev->dev, &dev_attr_vsync_pan);
++free_cmap:
++	fb_dealloc_cmap(&info->cmap);
++unregister_irqs:
++	free_irq(sinfo->irq_base, info);
++unmap_regs:
++	iounmap(sinfo->regs);
++free_fb:
++	if (!fb_data || fb_data->fbmem_size == 0)
++		dma_free_coherent(&pdev->dev, info->fix.smem_len,
++				  (void __force *)info->screen_base,
++				  info->fix.smem_start);
++disable_clocks:
++	clk_disable(sinfo->pixclk);
++	clk_disable(sinfo->hclk);
++	clk_put(sinfo->pixclk);
++put_hclk:
++	clk_put(sinfo->hclk);
++free_info:
++	framebuffer_release(info);
++out:
++	pr_debug("sidsafb_probe FAILED\n");
++	return ret;
++}
++
++static int __devexit sidsafb_remove(struct platform_device *pdev)
++{
++	struct lcdc_platform_data *fb_data = pdev->dev.platform_data;
++	struct fb_info *info = platform_get_drvdata(pdev);
++	struct sidsafb_info *sinfo;
++
++	if (!info)
++		return 0;
++	sinfo = info->par;
++
++	/* TODO: Restore original state */
++	unregister_framebuffer(info);
++
++	device_remove_file(&pdev->dev, &dev_attr_vsync_pan);
++
++	fb_dealloc_cmap(&info->cmap);
++	free_irq(sinfo->irq_base, info);
++	iounmap(sinfo->regs);
++	if (!fb_data || fb_data->fbmem_size == 0)
++		dma_free_coherent(&pdev->dev, info->fix.smem_len,
++				  (void __force *)info->screen_base,
++				  info->fix.smem_start);
++	clk_disable(sinfo->hclk);
++	clk_put(sinfo->hclk);
++	platform_set_drvdata(pdev, NULL);
++	framebuffer_release(info);
++
++	return 0;
++}
++
++static struct platform_driver sidsafb_driver = {
++	.probe		= sidsafb_probe,
++	.remove		= __devexit_p(sidsafb_remove),
++	.driver		= {
++		.name		= "lcdc",
++	},
++};
++
++int __init sidsafb_init(void)
++{
++	return platform_driver_register(&sidsafb_driver);
++}
++
++static void __exit sidsafb_exit(void)
++{
++	platform_driver_unregister(&sidsafb_driver);
++}
++
++module_init(sidsafb_init);
++module_exit(sidsafb_exit);
++
++module_param(fb_size, ulong, 0644);
++MODULE_PARM_DESC(fb_size, "Minimum framebuffer size to allocate");
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Atmel/SIDSA LCD Controller framebuffer driver");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_dbgu.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_dbgu.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_dbgu.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_dbgu.h	2007-03-24 16:39:15.000000000 +0100
+@@ -35,6 +35,20 @@
+ #define		AT91_CIDR_NVPSIZ	(0xf  << 8)		/* Nonvolatile Program Memory Size */
+ #define		AT91_CIDR_NVPSIZ2	(0xf  << 12)		/* Second Nonvolatile Program Memory Size */
+ #define		AT91_CIDR_SRAMSIZ	(0xf  << 16)		/* Internal SRAM Size */
++#define			AT91_CIDR_SRAMSIZ_1K	(1 << 16)
++#define			AT91_CIDR_SRAMSIZ_2K	(2 << 16)
++#define			AT91_CIDR_SRAMSIZ_112K	(4 << 16)
++#define			AT91_CIDR_SRAMSIZ_4K	(5 << 16)
++#define			AT91_CIDR_SRAMSIZ_80K	(6 << 16)
++#define			AT91_CIDR_SRAMSIZ_160K	(7 << 16)
++#define			AT91_CIDR_SRAMSIZ_8K	(8 << 16)
++#define			AT91_CIDR_SRAMSIZ_16K	(9 << 16)
++#define			AT91_CIDR_SRAMSIZ_32K	(10 << 16)
++#define			AT91_CIDR_SRAMSIZ_64K	(11 << 16)
++#define			AT91_CIDR_SRAMSIZ_128K	(12 << 16)
++#define			AT91_CIDR_SRAMSIZ_256K	(13 << 16)
++#define			AT91_CIDR_SRAMSIZ_96K	(14 << 16)
++#define			AT91_CIDR_SRAMSIZ_512K	(15 << 16)
+ #define		AT91_CIDR_ARCH		(0xff << 20)		/* Architecture Identifier */
+ #define		AT91_CIDR_NVPTYP	(7    << 28)		/* Nonvolatile Program Memory Type */
+ #define		AT91_CIDR_EXT		(1    << 31)		/* Extension Flag */
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_mci.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_mci.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_mci.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_mci.h	2007-03-24 16:39:15.000000000 +0100
+@@ -26,6 +26,9 @@
+ #define AT91_MCI_MR		0x04		/* Mode Register */
+ #define		AT91_MCI_CLKDIV		(0xff  <<  0)	/* Clock Divider */
+ #define		AT91_MCI_PWSDIV		(7     <<  8)	/* Power Saving Divider */
++#define		AT91_MCI_RDPROOF	(1     << 11)	/* Read Proof Enable [SAM926[03] only] */
++#define		AT91_MCI_WRPROOF	(1     << 12)	/* Write Proof Enable [SAM926[03] only] */
++#define		AT91_MCI_PDCFBYTE	(1     << 13)	/* PDC Force Byte Transfer [SAM926[03] only] */
+ #define		AT91_MCI_PDCPADV	(1     << 14)	/* PDC Padding Value */
+ #define		AT91_MCI_PDCMODE	(1     << 15)	/* PDC-orientated Mode */
+ #define		AT91_MCI_BLKLEN		(0xfff << 18)	/* Data Block Length */
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_pdc.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_pdc.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_pdc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_pdc.h	1970-01-01 01:00:00.000000000 +0100
+@@ -1,36 +0,0 @@
+-/*
+- * include/asm-arm/arch-at91rm9200/at91_pdc.h
+- *
+- * Copyright (C) 2005 Ivan Kokshaysky
+- * Copyright (C) SAN People
+- *
+- * Peripheral Data Controller (PDC) registers.
+- * Based on AT91RM9200 datasheet revision E.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- */
+-
+-#ifndef AT91_PDC_H
+-#define AT91_PDC_H
+-
+-#define AT91_PDC_RPR		0x100	/* Receive Pointer Register */
+-#define AT91_PDC_RCR		0x104	/* Receive Counter Register */
+-#define AT91_PDC_TPR		0x108	/* Transmit Pointer Register */
+-#define AT91_PDC_TCR		0x10c	/* Transmit Counter Register */
+-#define AT91_PDC_RNPR		0x110	/* Receive Next Pointer Register */
+-#define AT91_PDC_RNCR		0x114	/* Receive Next Counter Register */
+-#define AT91_PDC_TNPR		0x118	/* Transmit Next Pointer Register */
+-#define AT91_PDC_TNCR		0x11c	/* Transmit Next Counter Register */
+-
+-#define AT91_PDC_PTCR		0x120	/* Transfer Control Register */
+-#define		AT91_PDC_RXTEN		(1 << 0)	/* Receiver Transfer Enable */
+-#define		AT91_PDC_RXTDIS		(1 << 1)	/* Receiver Transfer Disable */
+-#define		AT91_PDC_TXTEN		(1 << 8)	/* Transmitter Transfer Enable */
+-#define		AT91_PDC_TXTDIS		(1 << 9)	/* Transmitter Transfer Disable */
+-
+-#define AT91_PDC_PTSR		0x124	/* Transfer Status Register */
+-
+-#endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_rstc.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_rstc.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91_rstc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91_rstc.h	2007-03-24 16:39:16.000000000 +0100
+@@ -17,7 +17,7 @@
+ #define		AT91_RSTC_PROCRST	(1 << 0)		/* Processor Reset */
+ #define		AT91_RSTC_PERRST	(1 << 2)		/* Peripheral Reset */
+ #define		AT91_RSTC_EXTRST	(1 << 3)		/* External Reset */
+-#define		AT91_RSTC_KEY		(0xff << 24)		/* KEY Password */
++#define		AT91_RSTC_KEY		(0xa5 << 24)		/* KEY Password */
+ 
+ #define AT91_RSTC_SR		(AT91_RSTC + 0x04)	/* Reset Controller Status Register */
+ #define		AT91_RSTC_URSTS		(1 << 0)		/* User Reset Status */
+@@ -34,6 +34,5 @@
+ #define		AT91_RSTC_URSTEN	(1 << 0)		/* User Reset Enable */
+ #define		AT91_RSTC_URSTIEN	(1 << 4)		/* User Reset Interrupt Enable */
+ #define		AT91_RSTC_ERSTL		(0xf << 8)		/* External Reset Length */
+-#define		AT91_RSTC_KEY		(0xff << 24)		/* KEY Password */
+ 
+ #endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9260.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9260.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9260.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9260.h	2007-03-24 16:39:16.000000000 +0100
+@@ -113,6 +113,10 @@
+ 
+ #define AT91SAM9260_UHP_BASE	0x00500000	/* USB Host controller */
+ 
++#define AT91SAM9XE_FLASH_BASE	0x00200000	/* Internal FLASH base address */
++#define AT91SAM9XE_SRAM_BASE	0x00300000	/* Internal SRAM base address */
++
++
+ #if 0
+ /*
+  * PIO pin definitions (peripheral A/B multiplexing).
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9260_matrix.h	2007-03-24 16:39:16.000000000 +0100
+@@ -18,7 +18,7 @@
+ #define AT91_MATRIX_MCFG2	(AT91_MATRIX + 0x08)	/* Master Configuration Register 2 */
+ #define AT91_MATRIX_MCFG3	(AT91_MATRIX + 0x0C)	/* Master Configuration Register 3 */
+ #define AT91_MATRIX_MCFG4	(AT91_MATRIX + 0x10)	/* Master Configuration Register 4 */
+-#define AT91_MATRIX_MCFG5	(AT91_MATRIX + 0x04)	/* Master Configuration Register 5 */
++#define AT91_MATRIX_MCFG5	(AT91_MATRIX + 0x14)	/* Master Configuration Register 5 */
+ #define		AT91_MATRIX_ULBT		(7 << 0)	/* Undefined Length Burst Type */
+ #define			AT91_MATRIX_ULBT_INFINITE	(0 << 0)
+ #define			AT91_MATRIX_ULBT_SINGLE		(1 << 0)
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9263.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9263.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9263.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9263.h	2007-03-24 16:39:16.000000000 +0100
+@@ -0,0 +1,131 @@
++/*
++ * include/asm-arm/arch-at91rm9200/at91sam9263.h
++ *
++ * (C) 2007 Atmel Corporation.
++ *
++ * Common definitions.
++ * Based on AT91SAM9263 datasheet revision B (Preliminary).
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91SAM9263_H
++#define AT91SAM9263_H
++
++/*
++ * Peripheral identifiers/interrupts.
++ */
++#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
++#define AT91_ID_SYS		1	/* System Peripherals */
++#define AT91SAM9263_ID_PIOA	2	/* Parallel IO Controller A */
++#define AT91SAM9263_ID_PIOB	3	/* Parallel IO Controller B */
++#define AT91SAM9263_ID_PIOCDE	4	/* Parallel IO Controller C, D and E */
++#define AT91SAM9263_ID_US0	7	/* USART 0 */
++#define AT91SAM9263_ID_US1	8	/* USART 1 */
++#define AT91SAM9263_ID_US2	9	/* USART 2 */
++#define AT91SAM9263_ID_MCI0	10	/* Multimedia Card Interface 0 */
++#define AT91SAM9263_ID_MCI1	11	/* Multimedia Card Interface 1 */
++#define AT91SAM9263_ID_CAN	12	/* CAN */
++#define AT91SAM9263_ID_TWI	13	/* Two-Wire Interface */
++#define AT91SAM9263_ID_SPI0	14	/* Serial Peripheral Interface 0 */
++#define AT91SAM9263_ID_SPI1	15	/* Serial Peripheral Interface 1 */
++#define AT91SAM9263_ID_SSC0	16	/* Serial Synchronous Controller 0 */
++#define AT91SAM9263_ID_SSC1	17	/* Serial Synchronous Controller 1 */
++#define AT91SAM9263_ID_AC97C	18	/* AC97 Controller */
++#define AT91SAM9263_ID_TCB	19	/* Timer Counter 0, 1 and 2 */
++#define AT91SAM9263_ID_PWMC	20	/* Pulse Width Modulation Controller */
++#define AT91SAM9263_ID_EMAC	21	/* Ethernet */
++#define AT91SAM9263_ID_2DGE	23	/* 2D Graphic Engine */
++#define AT91SAM9263_ID_UDP	24	/* USB Device Port */
++#define AT91SAM9263_ID_ISI	25	/* Image Sensor Interface */
++#define AT91SAM9263_ID_LCDC	26	/* LCD Controller */
++#define AT91SAM9263_ID_DMA	27	/* DMA Controller */
++#define AT91SAM9263_ID_UHP	29	/* USB Host port */
++#define AT91SAM9263_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
++#define AT91SAM9263_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
++
++
++/*
++ * User Peripheral physical base addresses.
++ */
++#define AT91SAM9263_BASE_UDP		0xfff78000
++#define AT91SAM9263_BASE_TCB0		0xfff7c000
++#define AT91SAM9263_BASE_TC0		0xfff7c000
++#define AT91SAM9263_BASE_TC1		0xfff7c040
++#define AT91SAM9263_BASE_TC2		0xfff7c080
++#define AT91SAM9263_BASE_MCI0		0xfff80000
++#define AT91SAM9263_BASE_MCI1		0xfff84000
++#define AT91SAM9263_BASE_TWI		0xfff88000
++#define AT91SAM9263_BASE_US0		0xfff8c000
++#define AT91SAM9263_BASE_US1		0xfff90000
++#define AT91SAM9263_BASE_US2		0xfff94000
++#define AT91SAM9263_BASE_SSC0		0xfff98000
++#define AT91SAM9263_BASE_SSC1		0xfff9c000
++#define AT91SAM9263_BASE_AC97C		0xfffa0000
++#define AT91SAM9263_BASE_SPI0		0xfffa4000
++#define AT91SAM9263_BASE_SPI1		0xfffa8000
++#define AT91SAM9263_BASE_CAN		0xfffac000
++#define AT91SAM9263_BASE_PWMC		0xfffb8000
++#define AT91SAM9263_BASE_EMAC		0xfffbc000
++#define AT91SAM9263_BASE_ISI		0xfffc4000
++#define AT91SAM9263_BASE_2DGE		0xfffc8000
++#define AT91_BASE_SYS			0xffffe000
++
++/*
++ * System Peripherals (offset from AT91_BASE_SYS)
++ */
++#define AT91_ECC0	(0xffffe000 - AT91_BASE_SYS)
++#define AT91_SDRAMC0	(0xffffe200 - AT91_BASE_SYS)
++#define AT91_SMC0	(0xffffe400 - AT91_BASE_SYS)
++#define AT91_ECC1	(0xffffe600 - AT91_BASE_SYS)
++#define AT91_SDRAMC1	(0xffffe800 - AT91_BASE_SYS)
++#define AT91_SMC1	(0xffffea00 - AT91_BASE_SYS)
++#define AT91_MATRIX	(0xffffec00 - AT91_BASE_SYS)
++#define AT91_CCFG	(0xffffed10 - AT91_BASE_SYS)
++#define AT91_DBGU	(0xffffee00 - AT91_BASE_SYS)
++#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)
++#define AT91_PIOA	(0xfffff200 - AT91_BASE_SYS)
++#define AT91_PIOB	(0xfffff400 - AT91_BASE_SYS)
++#define AT91_PIOC	(0xfffff600 - AT91_BASE_SYS)
++#define AT91_PIOD	(0xfffff800 - AT91_BASE_SYS)
++#define AT91_PIOE	(0xfffffa00 - AT91_BASE_SYS)
++#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)
++#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS)
++#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS)
++#define AT91_RTT0	(0xfffffd20 - AT91_BASE_SYS)
++#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS)
++#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS)
++#define AT91_RTT1	(0xfffffd50 - AT91_BASE_SYS)
++#define AT91_GPBR	(0xfffffd60 - AT91_BASE_SYS)
++
++#define AT91_SMC	AT91_SMC0
++
++/*
++ * Internal Memory.
++ */
++#define AT91SAM9263_SRAM0_BASE	0x00300000	/* Internal SRAM 0 base address */
++#define AT91SAM9263_SRAM0_SIZE	(80 * SZ_1K)	/* Internal SRAM 0 size (80Kb) */
++
++#define AT91SAM9263_ROM_BASE	0x00400000	/* Internal ROM base address */
++#define AT91SAM9263_ROM_SIZE	SZ_128K		/* Internal ROM size (128Kb) */
++
++#define AT91SAM9263_SRAM1_BASE	0x00500000	/* Internal SRAM 1 base address */
++#define AT91SAM9263_SRAM1_SIZE	SZ_16K		/* Internal SRAM 1 size (16Kb) */
++
++#define AT91SAM9263_LCDC_BASE	0x00700000	/* LCD Controller */
++#define AT91SAM9263_DMAC_BASE	0x00800000	/* DMA Controller */
++#define AT91SAM9263_UHP_BASE	0x00a00000	/* USB Host controller */
++
++#if 0
++/*
++ * PIO pin definitions (peripheral A/B multiplexing).
++ */
++
++// TODO: Add
++
++#endif
++
++#endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9263_matrix.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9263_matrix.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam9263_matrix.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam9263_matrix.h	2007-03-24 16:39:16.000000000 +0100
+@@ -0,0 +1,129 @@
++/*
++ * include/asm-arm/arch-at91rm9200/at91sam9263_matrix.h
++ *
++ *  Copyright (C) 2006 Atmel Corporation.
++ *
++ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
++ * Based on AT91SAM9263 datasheet revision B (Preliminary).
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91SAM9263_MATRIX_H
++#define AT91SAM9263_MATRIX_H
++
++#define AT91_MATRIX_MCFG0	(AT91_MATRIX + 0x00)	/* Master Configuration Register 0 */
++#define AT91_MATRIX_MCFG1	(AT91_MATRIX + 0x04)	/* Master Configuration Register 1 */
++#define AT91_MATRIX_MCFG2	(AT91_MATRIX + 0x08)	/* Master Configuration Register 2 */
++#define AT91_MATRIX_MCFG3	(AT91_MATRIX + 0x0C)	/* Master Configuration Register 3 */
++#define AT91_MATRIX_MCFG4	(AT91_MATRIX + 0x10)	/* Master Configuration Register 4 */
++#define AT91_MATRIX_MCFG5	(AT91_MATRIX + 0x14)	/* Master Configuration Register 5 */
++#define AT91_MATRIX_MCFG6	(AT91_MATRIX + 0x18)	/* Master Configuration Register 6 */
++#define AT91_MATRIX_MCFG7	(AT91_MATRIX + 0x1C)	/* Master Configuration Register 7 */
++#define AT91_MATRIX_MCFG8	(AT91_MATRIX + 0x20)	/* Master Configuration Register 8 */
++#define		AT91_MATRIX_ULBT	(7 << 0)	/* Undefined Length Burst Type */
++#define			AT91_MATRIX_ULBT_INFINITE	(0 << 0)
++#define			AT91_MATRIX_ULBT_SINGLE		(1 << 0)
++#define			AT91_MATRIX_ULBT_FOUR		(2 << 0)
++#define			AT91_MATRIX_ULBT_EIGHT		(3 << 0)
++#define			AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
++
++#define AT91_MATRIX_SCFG0	(AT91_MATRIX + 0x40)	/* Slave Configuration Register 0 */
++#define AT91_MATRIX_SCFG1	(AT91_MATRIX + 0x44)	/* Slave Configuration Register 1 */
++#define AT91_MATRIX_SCFG2	(AT91_MATRIX + 0x48)	/* Slave Configuration Register 2 */
++#define AT91_MATRIX_SCFG3	(AT91_MATRIX + 0x4C)	/* Slave Configuration Register 3 */
++#define AT91_MATRIX_SCFG4	(AT91_MATRIX + 0x50)	/* Slave Configuration Register 4 */
++#define AT91_MATRIX_SCFG5	(AT91_MATRIX + 0x54)	/* Slave Configuration Register 5 */
++#define AT91_MATRIX_SCFG6	(AT91_MATRIX + 0x58)	/* Slave Configuration Register 6 */
++#define AT91_MATRIX_SCFG7	(AT91_MATRIX + 0x5C)	/* Slave Configuration Register 7 */
++#define		AT91_MATRIX_SLOT_CYCLE		(0xff << 0)	/* Maximum Number of Allowed Cycles for a Burst */
++#define		AT91_MATRIX_DEFMSTR_TYPE	(3    << 16)	/* Default Master Type */
++#define			AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
++#define			AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
++#define			AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
++#define		AT91_MATRIX_FIXED_DEFMSTR	(7    << 18)	/* Fixed Index of Default Master */
++#define		AT91_MATRIX_ARBT		(3    << 24)	/* Arbitration Type */
++#define			AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
++#define			AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
++
++#define AT91_MATRIX_PRAS0	(AT91_MATRIX + 0x80)	/* Priority Register A for Slave 0 */
++#define AT91_MATRIX_PRBS0	(AT91_MATRIX + 0x84)	/* Priority Register B for Slave 0 */
++#define AT91_MATRIX_PRAS1	(AT91_MATRIX + 0x88)	/* Priority Register A for Slave 1 */
++#define AT91_MATRIX_PRBS1	(AT91_MATRIX + 0x8C)	/* Priority Register B for Slave 1 */
++#define AT91_MATRIX_PRAS2	(AT91_MATRIX + 0x90)	/* Priority Register A for Slave 2 */
++#define AT91_MATRIX_PRBS2	(AT91_MATRIX + 0x94)	/* Priority Register B for Slave 2 */
++#define AT91_MATRIX_PRAS3	(AT91_MATRIX + 0x98)	/* Priority Register A for Slave 3 */
++#define AT91_MATRIX_PRBS3	(AT91_MATRIX + 0x9C)	/* Priority Register B for Slave 3 */
++#define AT91_MATRIX_PRAS4	(AT91_MATRIX + 0xA0)	/* Priority Register A for Slave 4 */
++#define AT91_MATRIX_PRBS4	(AT91_MATRIX + 0xA4)	/* Priority Register B for Slave 4 */
++#define AT91_MATRIX_PRAS5	(AT91_MATRIX + 0xA8)	/* Priority Register A for Slave 5 */
++#define AT91_MATRIX_PRBS5	(AT91_MATRIX + 0xAC)	/* Priority Register B for Slave 5 */
++#define AT91_MATRIX_PRAS6	(AT91_MATRIX + 0xB0)	/* Priority Register A for Slave 6 */
++#define AT91_MATRIX_PRBS6	(AT91_MATRIX + 0xB4)	/* Priority Register B for Slave 6 */
++#define AT91_MATRIX_PRAS7	(AT91_MATRIX + 0xB8)	/* Priority Register A for Slave 7 */
++#define AT91_MATRIX_PRBS7	(AT91_MATRIX + 0xBC)	/* Priority Register B for Slave 7 */
++#define		AT91_MATRIX_M0PR		(3 << 0)	/* Master 0 Priority */
++#define		AT91_MATRIX_M1PR		(3 << 4)	/* Master 1 Priority */
++#define		AT91_MATRIX_M2PR		(3 << 8)	/* Master 2 Priority */
++#define		AT91_MATRIX_M3PR		(3 << 12)	/* Master 3 Priority */
++#define		AT91_MATRIX_M4PR		(3 << 16)	/* Master 4 Priority */
++#define		AT91_MATRIX_M5PR		(3 << 20)	/* Master 5 Priority */
++#define		AT91_MATRIX_M6PR		(3 << 24)	/* Master 6 Priority */
++#define		AT91_MATRIX_M7PR		(3 << 28)	/* Master 7 Priority */
++#define		AT91_MATRIX_M8PR		(3 << 0)	/* Master 8 Priority (in Register B) */
++
++#define AT91_MATRIX_MRCR	(AT91_MATRIX + 0x100)	/* Master Remap Control Register */
++#define		AT91_MATRIX_RCB0		(1 << 0)	/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
++#define		AT91_MATRIX_RCB1		(1 << 1)	/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
++#define		AT91_MATRIX_RCB2		(1 << 2)
++#define		AT91_MATRIX_RCB3		(1 << 3)
++#define		AT91_MATRIX_RCB4		(1 << 4)
++#define		AT91_MATRIX_RCB5		(1 << 5)
++#define		AT91_MATRIX_RCB6		(1 << 6)
++#define		AT91_MATRIX_RCB7		(1 << 7)
++#define		AT91_MATRIX_RCB8		(1 << 8)
++
++#define AT91_MATRIX_TCMR	(AT91_MATRIX + 0x114)	/* TCM Configuration Register */
++#define		AT91_MATRIX_ITCM_SIZE		(0xf << 0)	/* Size of ITCM enabled memory block */
++#define			AT91_MATRIX_ITCM_0		(0 << 0)
++#define			AT91_MATRIX_ITCM_16		(5 << 0)
++#define			AT91_MATRIX_ITCM_32		(6 << 0)
++#define		AT91_MATRIX_DTCM_SIZE		(0xf << 4)	/* Size of DTCM enabled memory block */
++#define			AT91_MATRIX_DTCM_0		(0 << 4)
++#define			AT91_MATRIX_DTCM_16		(5 << 4)
++#define			AT91_MATRIX_DTCM_32		(6 << 4)
++
++#define AT91_MATRIX_EBI0CSA	(AT91_MATRIX + 0x120)	/* EBI0 Chip Select Assignment Register */
++#define		AT91_MATRIX_EBI0_CS1A		(1 << 1)	/* Chip Select 1 Assignment */
++#define			AT91_MATRIX_EBI0_CS1A_SMC		(0 << 1)
++#define			AT91_MATRIX_EBI0_CS1A_SDRAMC		(1 << 1)
++#define		AT91_MATRIX_EBI0_CS3A		(1 << 3)	/* Chip Select 3 Assignment */
++#define			AT91_MATRIX_EBI0_CS3A_SMC		(0 << 3)
++#define			AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA	(1 << 3)
++#define		AT91_MATRIX_EBI0_CS4A		(1 << 4)	/* Chip Select 4 Assignment */
++#define			AT91_MATRIX_EBI0_CS4A_SMC		(0 << 4)
++#define			AT91_MATRIX_EBI0_CS4A_SMC_CF1		(1 << 4)
++#define		AT91_MATRIX_EBI0_CS5A		(1 << 5)	/* Chip Select 5 Assignment */
++#define			AT91_MATRIX_EBI0_CS5A_SMC		(0 << 5)
++#define			AT91_MATRIX_EBI0_CS5A_SMC_CF2		(1 << 5)
++#define		AT91_MATRIX_EBI0_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
++#define		AT91_MATRIX_EBI0_VDDIOMSEL	(1 << 16)	/* Memory voltage selection */
++#define			AT91_MATRIX_EBI0_VDDIOMSEL_1_8V		(0 << 16)
++#define			AT91_MATRIX_EBI0_VDDIOMSEL_3_3V		(1 << 16)
++
++#define AT91_MATRIX_EBI1CSA	(AT91_MATRIX + 0x124)	/* EBI1 Chip Select Assignment Register */
++#define		AT91_MATRIX_EBI1_CS1A		(1 << 1)	/* Chip Select 1 Assignment */
++#define			AT91_MATRIX_EBI1_CS1A_SMC		(0 << 1)
++#define			AT91_MATRIX_EBI1_CS1A_SDRAMC		(1 << 1)
++#define		AT91_MATRIX_EBI1_CS2A		(1 << 3)	/* Chip Select 3 Assignment */
++#define			AT91_MATRIX_EBI1_CS2A_SMC		(0 << 3)
++#define			AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA	(1 << 3)
++#define		AT91_MATRIX_EBI1_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
++#define		AT91_MATRIX_EBI1_VDDIOMSEL	(1 << 16)	/* Memory voltage selection */
++#define			AT91_MATRIX_EBI1_VDDIOMSEL_1_8V		(0 << 16)
++#define			AT91_MATRIX_EBI1_VDDIOMSEL_3_3V		(1 << 16)
++
++#endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h	2007-03-24 16:39:16.000000000 +0100
+@@ -131,4 +131,11 @@
+ #define			AT91_SMC_PS_16			(2 << 28)
+ #define			AT91_SMC_PS_32			(3 << 28)
+ 
++#if defined(AT91_SMC1)		/* The AT91SAM9263 has 2 Static Memory contollers */
++#define AT91_SMC1_SETUP(n)	(AT91_SMC1 + 0x00 + ((n)*0x10))	/* Setup Register for CS n */
++#define AT91_SMC1_PULSE(n)	(AT91_SMC1 + 0x04 + ((n)*0x10))	/* Pulse Register for CS n */
++#define AT91_SMC1_CYCLE(n)	(AT91_SMC1 + 0x08 + ((n)*0x10))	/* Cycle Register for CS n */
++#define AT91_SMC1_MODE(n)	(AT91_SMC1 + 0x0c + ((n)*0x10))	/* Mode Register for CS n */
++#endif
++
+ #endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/board.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/board.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/board.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/board.h	2007-03-24 16:39:16.000000000 +0100
+@@ -34,6 +34,7 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/device.h>
+ #include <linux/spi/spi.h>
++#include <video/atmel_lcdc.h>
+ 
+  /* USB Device */
+ struct at91_udc_data {
+@@ -60,18 +61,23 @@
+ 	u8		wp_pin;		/* (SD) writeprotect detect */
+ 	u8		vcc_pin;	/* power switching (high == on) */
+ };
+-extern void __init at91_add_device_mmc(struct at91_mmc_data *data);
++extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
+ 
+- /* Ethernet */
++/* Ethernet (EMAC & MACB) */
+ struct at91_eth_data {
+ 	u8		phy_irq_pin;	/* PHY IRQ */
+ 	u8		is_rmii;	/* using RMII interface? */
+ };
+ extern void __init at91_add_device_eth(struct at91_eth_data *data);
+ 
++#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263)
++#define eth_platform_data	at91_eth_data
++#endif
++
+  /* USB Host */
+ struct at91_usbh_data {
+ 	u8		ports;		/* number of ports on root hub */
++	u8		vbus_pin[];	/* port power switch */
+ };
+ extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
+ 
+@@ -93,6 +99,9 @@
+  /* SPI */
+ extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
+ 
++ /* LCD Controler */
++extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
++
+  /* Serial */
+ struct at91_uart_config {
+ 	unsigned short	console_tty;	/* tty number of serial console */
+@@ -114,4 +123,13 @@
+ extern u8 at91_leds_timer;
+ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
+ 
++struct at91_gpio_led {
++	u8		index;		/* index of LED */
++	char*		name;		/* name of LED */
++	u8		gpio;		/* AT91_PIN_xx */
++	u8		flags;		/* 1=active-high */
++	char*		trigger;	/* default trigger */
++};
++extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr);
++
+ #endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/cpu.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/cpu.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/cpu.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/cpu.h	2007-03-24 16:39:16.000000000 +0100
+@@ -20,7 +20,11 @@
+ #define ARCH_ID_AT91RM9200	0x09290780
+ #define ARCH_ID_AT91SAM9260	0x019803a0
+ #define ARCH_ID_AT91SAM9261	0x019703a0
++#define ARCH_ID_AT91SAM9263	0x019607a0
+ 
++#define ARCH_ID_AT91SAM9XE128	0x329973a0
++#define ARCH_ID_AT91SAM9XE256	0x329a93a0
++#define ARCH_ID_AT91SAM9XE512	0x329aa3a0
+ 
+ static inline unsigned long at91_cpu_identify(void)
+ {
+@@ -28,6 +32,16 @@
+ }
+ 
+ 
++#define ARCH_FAMILY_AT91X92	0x09200000
++#define ARCH_FAMILY_AT91SAM9	0x01900000
++#define ARCH_FAMILY_AT91SAM9XE	0x02900000
++
++static inline unsigned long at91_arch_identify(void)
++{
++	return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
++}
++
++
+ #ifdef CONFIG_ARCH_AT91RM9200
+ #define cpu_is_at91rm9200()	(at91_cpu_identify() == ARCH_ID_AT91RM9200)
+ #else
+@@ -35,8 +49,10 @@
+ #endif
+ 
+ #ifdef CONFIG_ARCH_AT91SAM9260
+-#define cpu_is_at91sam9260()	(at91_cpu_identify() == ARCH_ID_AT91SAM9260)
++#define cpu_is_at91sam9xe()	(at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
++#define cpu_is_at91sam9260()	((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
+ #else
++#define cpu_is_at91sam9xe()	(0)
+ #define cpu_is_at91sam9260()	(0)
+ #endif
+ 
+@@ -46,4 +62,10 @@
+ #define cpu_is_at91sam9261()	(0)
+ #endif
+ 
++#ifdef CONFIG_ARCH_AT91SAM9263
++#define cpu_is_at91sam9263()	(at91_cpu_identify() == ARCH_ID_AT91SAM9263)
++#else
++#define cpu_is_at91sam9263()	(0)
++#endif
++
+ #endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/debug-macro.S linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/debug-macro.S
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/debug-macro.S	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/debug-macro.S	2007-03-24 16:39:16.000000000 +0100
+@@ -16,24 +16,24 @@
+ 
+ 	.macro	addruart,rx
+ 	mrc	p15, 0, \rx, c1, c0
+-	tst	\rx, #1				@ MMU enabled?
+-	ldreq	\rx, =AT91_BASE_SYS		@ System peripherals (phys address)
+-	ldrne	\rx, =AT91_VA_BASE_SYS		@ System peripherals (virt address)
++	tst	\rx, #1						@ MMU enabled?
++	ldreq	\rx, =(AT91_BASE_SYS + AT91_DBGU)		@ System peripherals (phys address)
++	ldrne	\rx, =(AT91_VA_BASE_SYS	+ AT91_DBGU)		@ System peripherals (virt address)
+ 	.endm
+ 
+ 	.macro	senduart,rd,rx
+-	strb	\rd, [\rx, #AT91_DBGU_THR]	@ Write to Transmitter Holding Register
++	strb	\rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)]	@ Write to Transmitter Holding Register
+ 	.endm
+ 
+ 	.macro	waituart,rd,rx
+-1001:	ldr	\rd, [\rx, #AT91_DBGU_SR]	@ Read Status Register
+-	tst	\rd, #AT91_DBGU_TXRDY		@ DBGU_TXRDY = 1 when ready to transmit
++1001:	ldr	\rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)]		@ Read Status Register
++	tst	\rd, #AT91_DBGU_TXRDY				@ DBGU_TXRDY = 1 when ready to transmit
+ 	beq	1001b
+ 	.endm
+ 
+ 	.macro	busyuart,rd,rx
+-1001:	ldr	\rd, [\rx, #AT91_DBGU_SR]	@ Read Status Register
+-	tst	\rd, #AT91_DBGU_TXEMPTY		@ DBGU_TXEMPTY = 1 when transmission complete
++1001:	ldr	\rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)]		@ Read Status Register
++	tst	\rd, #AT91_DBGU_TXEMPTY				@ DBGU_TXEMPTY = 1 when transmission complete
+ 	beq	1001b
+ 	.endm
+ 
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/entry-macro.S linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/entry-macro.S
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/entry-macro.S	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/entry-macro.S	2007-03-24 16:39:16.000000000 +0100
+@@ -17,10 +17,10 @@
+ 	.endm
+ 
+ 	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
+-	ldr	\base, =(AT91_VA_BASE_SYS)		@ base virtual address of SYS peripherals
+-	ldr	\irqnr, [\base, #AT91_AIC_IVR]		@ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
+-	ldr	\irqstat, [\base, #AT91_AIC_ISR]	@ read interrupt source number
+-	teq	\irqstat, #0				@ ISR is 0 when no current interrupt, or spurious interrupt
+-	streq	\tmp, [\base, #AT91_AIC_EOICR]		@ not going to be handled further, then ACK it now.
++	ldr	\base, =(AT91_VA_BASE_SYS + AT91_AIC)		@ base virtual address of AIC peripheral
++	ldr	\irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)]	@ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
++	ldr	\irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)]	@ read interrupt source number
++	teq	\irqstat, #0					@ ISR is 0 when no current interrupt, or spurious interrupt
++	streq	\tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)]	@ not going to be handled further, then ACK it now.
+ 	.endm
+ 
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/gpio.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/gpio.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/gpio.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/gpio.h	2007-03-24 16:39:16.000000000 +0100
+@@ -17,7 +17,7 @@
+ 
+ #define PIN_BASE		NR_AIC_IRQS
+ 
+-#define MAX_GPIO_BANKS		4
++#define MAX_GPIO_BANKS		5
+ 
+ /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
+ 
+@@ -26,37 +26,31 @@
+ #define	AT91_PIN_PA2	(PIN_BASE + 0x00 + 2)
+ #define	AT91_PIN_PA3	(PIN_BASE + 0x00 + 3)
+ #define	AT91_PIN_PA4	(PIN_BASE + 0x00 + 4)
+-
+ #define	AT91_PIN_PA5	(PIN_BASE + 0x00 + 5)
+ #define	AT91_PIN_PA6	(PIN_BASE + 0x00 + 6)
+ #define	AT91_PIN_PA7	(PIN_BASE + 0x00 + 7)
+ #define	AT91_PIN_PA8	(PIN_BASE + 0x00 + 8)
+ #define	AT91_PIN_PA9	(PIN_BASE + 0x00 + 9)
+-
+ #define	AT91_PIN_PA10	(PIN_BASE + 0x00 + 10)
+ #define	AT91_PIN_PA11	(PIN_BASE + 0x00 + 11)
+ #define	AT91_PIN_PA12	(PIN_BASE + 0x00 + 12)
+ #define	AT91_PIN_PA13	(PIN_BASE + 0x00 + 13)
+ #define	AT91_PIN_PA14	(PIN_BASE + 0x00 + 14)
+-
+ #define	AT91_PIN_PA15	(PIN_BASE + 0x00 + 15)
+ #define	AT91_PIN_PA16	(PIN_BASE + 0x00 + 16)
+ #define	AT91_PIN_PA17	(PIN_BASE + 0x00 + 17)
+ #define	AT91_PIN_PA18	(PIN_BASE + 0x00 + 18)
+ #define	AT91_PIN_PA19	(PIN_BASE + 0x00 + 19)
+-
+ #define	AT91_PIN_PA20	(PIN_BASE + 0x00 + 20)
+ #define	AT91_PIN_PA21	(PIN_BASE + 0x00 + 21)
+ #define	AT91_PIN_PA22	(PIN_BASE + 0x00 + 22)
+ #define	AT91_PIN_PA23	(PIN_BASE + 0x00 + 23)
+ #define	AT91_PIN_PA24	(PIN_BASE + 0x00 + 24)
+-
+ #define	AT91_PIN_PA25	(PIN_BASE + 0x00 + 25)
+ #define	AT91_PIN_PA26	(PIN_BASE + 0x00 + 26)
+ #define	AT91_PIN_PA27	(PIN_BASE + 0x00 + 27)
+ #define	AT91_PIN_PA28	(PIN_BASE + 0x00 + 28)
+ #define	AT91_PIN_PA29	(PIN_BASE + 0x00 + 29)
+-
+ #define	AT91_PIN_PA30	(PIN_BASE + 0x00 + 30)
+ #define	AT91_PIN_PA31	(PIN_BASE + 0x00 + 31)
+ 
+@@ -65,37 +59,31 @@
+ #define	AT91_PIN_PB2	(PIN_BASE + 0x20 + 2)
+ #define	AT91_PIN_PB3	(PIN_BASE + 0x20 + 3)
+ #define	AT91_PIN_PB4	(PIN_BASE + 0x20 + 4)
+-
+ #define	AT91_PIN_PB5	(PIN_BASE + 0x20 + 5)
+ #define	AT91_PIN_PB6	(PIN_BASE + 0x20 + 6)
+ #define	AT91_PIN_PB7	(PIN_BASE + 0x20 + 7)
+ #define	AT91_PIN_PB8	(PIN_BASE + 0x20 + 8)
+ #define	AT91_PIN_PB9	(PIN_BASE + 0x20 + 9)
+-
+ #define	AT91_PIN_PB10	(PIN_BASE + 0x20 + 10)
+ #define	AT91_PIN_PB11	(PIN_BASE + 0x20 + 11)
+ #define	AT91_PIN_PB12	(PIN_BASE + 0x20 + 12)
+ #define	AT91_PIN_PB13	(PIN_BASE + 0x20 + 13)
+ #define	AT91_PIN_PB14	(PIN_BASE + 0x20 + 14)
+-
+ #define	AT91_PIN_PB15	(PIN_BASE + 0x20 + 15)
+ #define	AT91_PIN_PB16	(PIN_BASE + 0x20 + 16)
+ #define	AT91_PIN_PB17	(PIN_BASE + 0x20 + 17)
+ #define	AT91_PIN_PB18	(PIN_BASE + 0x20 + 18)
+ #define	AT91_PIN_PB19	(PIN_BASE + 0x20 + 19)
+-
+ #define	AT91_PIN_PB20	(PIN_BASE + 0x20 + 20)
+ #define	AT91_PIN_PB21	(PIN_BASE + 0x20 + 21)
+ #define	AT91_PIN_PB22	(PIN_BASE + 0x20 + 22)
+ #define	AT91_PIN_PB23	(PIN_BASE + 0x20 + 23)
+ #define	AT91_PIN_PB24	(PIN_BASE + 0x20 + 24)
+-
+ #define	AT91_PIN_PB25	(PIN_BASE + 0x20 + 25)
+ #define	AT91_PIN_PB26	(PIN_BASE + 0x20 + 26)
+ #define	AT91_PIN_PB27	(PIN_BASE + 0x20 + 27)
+ #define	AT91_PIN_PB28	(PIN_BASE + 0x20 + 28)
+ #define	AT91_PIN_PB29	(PIN_BASE + 0x20 + 29)
+-
+ #define	AT91_PIN_PB30	(PIN_BASE + 0x20 + 30)
+ #define	AT91_PIN_PB31	(PIN_BASE + 0x20 + 31)
+ 
+@@ -104,37 +92,31 @@
+ #define	AT91_PIN_PC2	(PIN_BASE + 0x40 + 2)
+ #define	AT91_PIN_PC3	(PIN_BASE + 0x40 + 3)
+ #define	AT91_PIN_PC4	(PIN_BASE + 0x40 + 4)
+-
+ #define	AT91_PIN_PC5	(PIN_BASE + 0x40 + 5)
+ #define	AT91_PIN_PC6	(PIN_BASE + 0x40 + 6)
+ #define	AT91_PIN_PC7	(PIN_BASE + 0x40 + 7)
+ #define	AT91_PIN_PC8	(PIN_BASE + 0x40 + 8)
+ #define	AT91_PIN_PC9	(PIN_BASE + 0x40 + 9)
+-
+ #define	AT91_PIN_PC10	(PIN_BASE + 0x40 + 10)
+ #define	AT91_PIN_PC11	(PIN_BASE + 0x40 + 11)
+ #define	AT91_PIN_PC12	(PIN_BASE + 0x40 + 12)
+ #define	AT91_PIN_PC13	(PIN_BASE + 0x40 + 13)
+ #define	AT91_PIN_PC14	(PIN_BASE + 0x40 + 14)
+-
+ #define	AT91_PIN_PC15	(PIN_BASE + 0x40 + 15)
+ #define	AT91_PIN_PC16	(PIN_BASE + 0x40 + 16)
+ #define	AT91_PIN_PC17	(PIN_BASE + 0x40 + 17)
+ #define	AT91_PIN_PC18	(PIN_BASE + 0x40 + 18)
+ #define	AT91_PIN_PC19	(PIN_BASE + 0x40 + 19)
+-
+ #define	AT91_PIN_PC20	(PIN_BASE + 0x40 + 20)
+ #define	AT91_PIN_PC21	(PIN_BASE + 0x40 + 21)
+ #define	AT91_PIN_PC22	(PIN_BASE + 0x40 + 22)
+ #define	AT91_PIN_PC23	(PIN_BASE + 0x40 + 23)
+ #define	AT91_PIN_PC24	(PIN_BASE + 0x40 + 24)
+-
+ #define	AT91_PIN_PC25	(PIN_BASE + 0x40 + 25)
+ #define	AT91_PIN_PC26	(PIN_BASE + 0x40 + 26)
+ #define	AT91_PIN_PC27	(PIN_BASE + 0x40 + 27)
+ #define	AT91_PIN_PC28	(PIN_BASE + 0x40 + 28)
+ #define	AT91_PIN_PC29	(PIN_BASE + 0x40 + 29)
+-
+ #define	AT91_PIN_PC30	(PIN_BASE + 0x40 + 30)
+ #define	AT91_PIN_PC31	(PIN_BASE + 0x40 + 31)
+ 
+@@ -143,40 +125,67 @@
+ #define	AT91_PIN_PD2	(PIN_BASE + 0x60 + 2)
+ #define	AT91_PIN_PD3	(PIN_BASE + 0x60 + 3)
+ #define	AT91_PIN_PD4	(PIN_BASE + 0x60 + 4)
+-
+ #define	AT91_PIN_PD5	(PIN_BASE + 0x60 + 5)
+ #define	AT91_PIN_PD6	(PIN_BASE + 0x60 + 6)
+ #define	AT91_PIN_PD7	(PIN_BASE + 0x60 + 7)
+ #define	AT91_PIN_PD8	(PIN_BASE + 0x60 + 8)
+ #define	AT91_PIN_PD9	(PIN_BASE + 0x60 + 9)
+-
+ #define	AT91_PIN_PD10	(PIN_BASE + 0x60 + 10)
+ #define	AT91_PIN_PD11	(PIN_BASE + 0x60 + 11)
+ #define	AT91_PIN_PD12	(PIN_BASE + 0x60 + 12)
+ #define	AT91_PIN_PD13	(PIN_BASE + 0x60 + 13)
+ #define	AT91_PIN_PD14	(PIN_BASE + 0x60 + 14)
+-
+ #define	AT91_PIN_PD15	(PIN_BASE + 0x60 + 15)
+ #define	AT91_PIN_PD16	(PIN_BASE + 0x60 + 16)
+ #define	AT91_PIN_PD17	(PIN_BASE + 0x60 + 17)
+ #define	AT91_PIN_PD18	(PIN_BASE + 0x60 + 18)
+ #define	AT91_PIN_PD19	(PIN_BASE + 0x60 + 19)
+-
+ #define	AT91_PIN_PD20	(PIN_BASE + 0x60 + 20)
+ #define	AT91_PIN_PD21	(PIN_BASE + 0x60 + 21)
+ #define	AT91_PIN_PD22	(PIN_BASE + 0x60 + 22)
+ #define	AT91_PIN_PD23	(PIN_BASE + 0x60 + 23)
+ #define	AT91_PIN_PD24	(PIN_BASE + 0x60 + 24)
+-
+ #define	AT91_PIN_PD25	(PIN_BASE + 0x60 + 25)
+ #define	AT91_PIN_PD26	(PIN_BASE + 0x60 + 26)
+ #define	AT91_PIN_PD27	(PIN_BASE + 0x60 + 27)
+ #define	AT91_PIN_PD28	(PIN_BASE + 0x60 + 28)
+ #define	AT91_PIN_PD29	(PIN_BASE + 0x60 + 29)
+-
+ #define	AT91_PIN_PD30	(PIN_BASE + 0x60 + 30)
+ #define	AT91_PIN_PD31	(PIN_BASE + 0x60 + 31)
+ 
++#define	AT91_PIN_PE0	(PIN_BASE + 0x80 + 0)
++#define	AT91_PIN_PE1	(PIN_BASE + 0x80 + 1)
++#define	AT91_PIN_PE2	(PIN_BASE + 0x80 + 2)
++#define	AT91_PIN_PE3	(PIN_BASE + 0x80 + 3)
++#define	AT91_PIN_PE4	(PIN_BASE + 0x80 + 4)
++#define	AT91_PIN_PE5	(PIN_BASE + 0x80 + 5)
++#define	AT91_PIN_PE6	(PIN_BASE + 0x80 + 6)
++#define	AT91_PIN_PE7	(PIN_BASE + 0x80 + 7)
++#define	AT91_PIN_PE8	(PIN_BASE + 0x80 + 8)
++#define	AT91_PIN_PE9	(PIN_BASE + 0x80 + 9)
++#define	AT91_PIN_PE10	(PIN_BASE + 0x80 + 10)
++#define	AT91_PIN_PE11	(PIN_BASE + 0x80 + 11)
++#define	AT91_PIN_PE12	(PIN_BASE + 0x80 + 12)
++#define	AT91_PIN_PE13	(PIN_BASE + 0x80 + 13)
++#define	AT91_PIN_PE14	(PIN_BASE + 0x80 + 14)
++#define	AT91_PIN_PE15	(PIN_BASE + 0x80 + 15)
++#define	AT91_PIN_PE16	(PIN_BASE + 0x80 + 16)
++#define	AT91_PIN_PE17	(PIN_BASE + 0x80 + 17)
++#define	AT91_PIN_PE18	(PIN_BASE + 0x80 + 18)
++#define	AT91_PIN_PE19	(PIN_BASE + 0x80 + 19)
++#define	AT91_PIN_PE20	(PIN_BASE + 0x80 + 20)
++#define	AT91_PIN_PE21	(PIN_BASE + 0x80 + 21)
++#define	AT91_PIN_PE22	(PIN_BASE + 0x80 + 22)
++#define	AT91_PIN_PE23	(PIN_BASE + 0x80 + 23)
++#define	AT91_PIN_PE24	(PIN_BASE + 0x80 + 24)
++#define	AT91_PIN_PE25	(PIN_BASE + 0x80 + 25)
++#define	AT91_PIN_PE26	(PIN_BASE + 0x80 + 26)
++#define	AT91_PIN_PE27	(PIN_BASE + 0x80 + 27)
++#define	AT91_PIN_PE28	(PIN_BASE + 0x80 + 28)
++#define	AT91_PIN_PE29	(PIN_BASE + 0x80 + 29)
++#define	AT91_PIN_PE30	(PIN_BASE + 0x80 + 30)
++#define	AT91_PIN_PE31	(PIN_BASE + 0x80 + 31)
++
+ #ifndef __ASSEMBLY__
+ /* setup setup routines, called from board init or driver probe() */
+ extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup);
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/hardware.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/hardware.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/hardware.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/hardware.h	2007-03-24 16:39:16.000000000 +0100
+@@ -22,21 +22,23 @@
+ #include <asm/arch/at91sam9260.h>
+ #elif defined(CONFIG_ARCH_AT91SAM9261)
+ #include <asm/arch/at91sam9261.h>
++#elif defined(CONFIG_ARCH_AT91SAM9263)
++#include <asm/arch/at91sam9263.h>
+ #else
+ #error "Unsupported AT91 processor"
+ #endif
+ 
+ 
+ /*
+- * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
+- * to 0xFEFA0000 .. 0xFF000000.  (384Kb)
++ * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
++ * to 0xFEF78000 .. 0xFF000000.  (544Kb)
+  */
+-#define AT91_IO_PHYS_BASE	0xFFFA0000
++#define AT91_IO_PHYS_BASE	0xFFF78000
+ #define AT91_IO_SIZE		(0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
+ #define AT91_IO_VIRT_BASE	(0xFF000000 - AT91_IO_SIZE)
+ 
+  /* Convert a physical IO address to virtual IO address */
+-#define AT91_IO_P2V(x)	((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
++#define AT91_IO_P2V(x)		((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
+ 
+ /*
+  * Virtual to Physical Address mapping for IO devices.
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/ics1523.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/ics1523.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/ics1523.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/ics1523.h	2007-03-24 16:39:16.000000000 +0100
+@@ -0,0 +1,154 @@
++//*----------------------------------------------------------------------------
++//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
++//*----------------------------------------------------------------------------
++//* The software is delivered "AS IS" without warranty or condition of any
++//* kind, either express, implied or statutory. This includes without
++//* limitation any warranty or condition with respect to merchantability or
++//* fitness for any particular purpose, or against the infringements of
++//* intellectual property rights of others.
++//*----------------------------------------------------------------------------
++//* File Name           : ics1523.h
++//* Object              : Clock Generator Prototyping File.
++//*
++//* 1.0 08/28/02 ED     : Creation
++//* 1.2 13/01/03 FB		: Update on lib V3
++//*----------------------------------------------------------------------------
++
++#ifndef ics1523_h
++#define ics1523_h
++
++/*-------------------------------------------*/
++/* ICS1523 TWI Serial Clock Definition       */
++/*-------------------------------------------*/
++
++#define		ICS_MIN_CLOCK		100		/* Min Frequency Access Clock KHz */
++#define		ICS_MAX_CLOCK		400		/* Max Frequency Access Clock KHz */
++#define		ICS_TRANSFER_RATE	ICS_MAX_CLOCK	/* Transfer speed to apply */
++
++#define		ICS_WRITE_CLK_PNB	30		/* TWCK Clock Periods required to write */
++#define		ICS_READ_CLK_PNB	40		/* TWCK Clock Periods required to read */
++
++/*-------------------------------------------*/
++/* ICS1523 Write Operation Definition        */
++/*-------------------------------------------*/
++
++#define		ICS1523_ACCESS_OK	0		/* OK */
++#define		ICS1523_ACCESS_ERROR	-1		/* NOK */
++
++/*-------------------------------------------*/
++/* ICS1523 Device Addresses Definition       */
++/*-------------------------------------------*/
++
++#define		ICS_ADDR		0x26		/* Device Address */
++
++/*--------------------------------------------------*/
++/* ICS1523 Registers Internal Addresses Definition  */
++/*--------------------------------------------------*/
++
++#define		ICS_ICR			0x0		/* Input Control Register */
++#define		ICS_LCR			0x1		/* Loop Control Register */
++#define		ICS_FD0			0x2		/* PLL FeedBack Divider LSBs */
++#define		ICS_FD1			0x3		/* PLL FeedBack Divider MSBs */
++#define		ICS_DPAO		0x4		/* Dynamic Phase Aligner Offset */
++#define		ICS_DPAC		0x5		/* Dynamic Phase Aligner Resolution */
++#define		ICS_OE			0x6		/* Output Enables Register */
++#define		ICS_OD			0x7		/* Osc Divider Register */
++#define		ICS_SWRST		0x8		/* DPA & PLL Reset Register */
++#define		ICS_VID			0x10		/* Chip Version Register */
++#define		ICS_RID			0x11		/* Chip Revision Register */
++#define		ICS_SR			0x12		/* Status Register */
++
++/*------------------------------------------------------*/
++/* ICS1523 Input Control Register Bits Definition       */
++/*------------------------------------------------------*/
++
++#define		ICS_PDEN		0x1		/* Phase Detector Enable */
++#define		ICS_PDPOL		0x2		/* Phase Detector Enable Polarity */
++#define		ICS_REFPOL		0x4		/* External Reference Polarity */
++#define		ICS_FBKPOL		0x8		/* External Feedback Polarity */
++#define		ICS_FBKSEL		0x10		/* External Feedback Select */
++#define		ICS_FUNCSEL		0x20		/* Function Out Select */
++#define		ICS_ENPLS		0x40		/* Enable PLL Lock/Ref Status Output */
++#define		ICS_ENDLS		0x80		/* Enable DPA Lock/Ref Status Output */
++
++/*-----------------------------------------------------*/
++/* ICS1523 Loop Control Register Bits Definition       */
++/*-----------------------------------------------------*/
++
++#define		ICS_PFD			0x7		/* Phase Detector Gain */
++#define		ICS_PSD			0x30		/* Post-Scaler Divider */
++
++/*----------------------------------------------------*/
++/* ICS1523 PLL FeedBack Divider LSBs Definition       */
++/*----------------------------------------------------*/
++
++#define		ICS_FBDL		0xFF		/* PLL FeedBack Divider LSBs */
++
++/*----------------------------------------------------*/
++/* ICS1523 PLL FeedBack Divider MSBs Definition       */
++/*----------------------------------------------------*/
++
++#define		ICS_FBDM		0xF		/* PLL FeedBack Divider MSBs */
++
++/*------------------------------------------------------------*/
++/* ICS1523 Dynamic Phase Aligner Offset Bits Definition       */
++/*------------------------------------------------------------*/
++
++#define		ICS_DPAOS		0x2F		/* Dynamic Phase Aligner Offset */
++#define		ICS_FILSEL		0x80		/* Loop Filter Select */
++
++/*----------------------------------------------------------------*/
++/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition       */
++/*----------------------------------------------------------------*/
++
++#define		ICS_DPARES		0x3		/* Dynamic Phase Aligner Resolution */
++#define		ICS_MMREV		0xFC		/* Metal Mask Revision Number */
++
++/*-------------------------------------------------------*/
++/* ICS1523 Output Enables Register Bits Definition       */
++/*-------------------------------------------------------*/
++
++#define		ICS_OEPCK		0x1		/* Output Enable for PECL PCLK Outputs */
++#define		ICS_OETCK		0x2		/* Output Enable for STTL CLK Output */
++#define		ICS_OEP2		0x4		/* Output Enable for PECL CLK/2 Outputs */
++#define		ICS_OET2		0x8		/* Output Enable for STTL CLK/2 Output */
++#define		ICS_OEF			0x10		/* Output Enable for STTL FUNC Output */
++#define		ICS_CLK2INV		0x20		/* CLK/2 Invert */
++#define		ICS_OSCL		0xC0		/* SSTL Clock Scaler */
++
++/*----------------------------------------------------*/
++/* ICS1523 Osc Divider Register Bits Definition       */
++/*----------------------------------------------------*/
++
++#define		ICS_OSCDIV		0x7F		/* Oscillator Divider Modulus */
++#define		ICS_INSEL		0x80		/* Input Select */
++
++/*---------------------------------------------------*/
++/* ICS1523 DPA & PLL Reset Register Definition       */
++/*---------------------------------------------------*/
++
++#define		ICS_DPAR		0x0A		/* DPA Reset Command */
++#define		ICS_PLLR		0x50		/* PLL Reset Command */
++
++/*------------------------------------------------*/
++/* ICS1523 Chip Version Register Definition       */
++/*------------------------------------------------*/
++
++#define		ICS_CHIPV		0xFF		/* Chip Version */
++
++/*-------------------------------------------------*/
++/* ICS1523 Chip Revision Register Definition       */
++/*-------------------------------------------------*/
++
++#define		ICS_CHIPR		0xFF		/* Chip Revision */
++
++/*------------------------------------------*/
++/* ICS1523 Status Register Definition       */
++/*------------------------------------------*/
++
++#define		ICS_DPALOCK		0x1		/* DPA Lock Status */
++#define		ICS_PLLLOCK		0x2		/* PLL Lock Status */
++
++int at91_ics1523_init(void);
++
++#endif /* ics1523_h */
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/irqs.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/irqs.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/irqs.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/irqs.h	2007-03-24 16:39:16.000000000 +0100
+@@ -37,8 +37,8 @@
+  * IRQ interrupt symbols are the AT91xxx_ID_* symbols
+  * for IRQs handled directly through the AIC, or else the AT91_PIN_*
+  * symbols in gpio.h for ones handled indirectly as GPIOs.
+- * We make provision for 4 banks of GPIO.
++ * We make provision for 5 banks of GPIO.
+  */
+-#define	NR_IRQS		(NR_AIC_IRQS + (4 * 32))
++#define	NR_IRQS		(NR_AIC_IRQS + (5 * 32))
+ 
+ #endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/spi.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/spi.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/spi.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/spi.h	2007-03-24 16:39:16.000000000 +0100
+@@ -0,0 +1,54 @@
++/*
++ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200
++ *
++ * (c) SAN People (Pty) Ltd
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#ifndef AT91_LEGACY_SPI_H
++#define AT91_LEGACY_SPI_H
++
++#define SPI_MAJOR		153	/* registered device number */
++
++#define DEFAULT_SPI_CLK		6000000
++
++
++/* Maximum number of buffers in a single SPI transfer.
++ *  DataFlash uses maximum of 2
++ *  spidev interface supports up to 8.
++ */
++#define MAX_SPI_TRANSFERS	8
++#define NR_SPI_DEVICES		4	/* number of devices on SPI bus */
++
++/*
++ * Describes the buffers for a SPI transfer.
++ * A transmit & receive buffer must be specified for each transfer
++ */
++struct spi_transfer_list {
++	void* tx[MAX_SPI_TRANSFERS];	/* transmit */
++	int txlen[MAX_SPI_TRANSFERS];
++	void* rx[MAX_SPI_TRANSFERS];	/* receive */
++	int rxlen[MAX_SPI_TRANSFERS];
++	int nr_transfers;		/* number of transfers */
++	int curr;			/* current transfer */
++};
++
++struct spi_local {
++	unsigned int pcs;		/* Peripheral Chip Select value */
++
++	struct spi_transfer_list *xfers;	/* current transfer list */
++	dma_addr_t tx, rx;		/* DMA address for current transfer */
++	dma_addr_t txnext, rxnext;	/* DMA address for next transfer */
++};
++
++
++/* Exported functions */
++extern void spi_access_bus(short device);
++extern void spi_release_bus(short device);
++extern int spi_transfer(struct spi_transfer_list* list);
++
++#endif
+diff -urN linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/timex.h linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/timex.h
+--- linux-2.6.20.4-0rig/include/asm-arm/arch-at91rm9200/timex.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-arm/arch-at91rm9200/timex.h	2007-03-24 16:39:16.000000000 +0100
+@@ -32,6 +32,11 @@
+ #define AT91SAM9_MASTER_CLOCK	99300000
+ #define CLOCK_TICK_RATE		(AT91SAM9_MASTER_CLOCK/16)
+ 
++#elif defined(CONFIG_ARCH_AT91SAM9263)
++
++#define AT91SAM9_MASTER_CLOCK	99959500
++#define CLOCK_TICK_RATE		(AT91SAM9_MASTER_CLOCK/16)
++
+ #endif
+ 
+ #endif
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/at32ap7000.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/at32ap7000.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/at32ap7000.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/at32ap7000.h	2007-03-24 16:42:28.000000000 +0100
+@@ -24,10 +24,12 @@
+ #define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+ #define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+ #define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+ 
+ #define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+ #define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+ #define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+ #define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+ 
+ #endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/at91_pdc.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/at91_pdc.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/at91_pdc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/at91_pdc.h	1970-01-01 01:00:00.000000000 +0100
+@@ -1,36 +0,0 @@
+-/*
+- * include/asm-arm/arch-at91rm9200/at91_pdc.h
+- *
+- * Copyright (C) 2005 Ivan Kokshaysky
+- * Copyright (C) SAN People
+- *
+- * Peripheral Data Controller (PDC) registers.
+- * Based on AT91RM9200 datasheet revision E.
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License as published by
+- * the Free Software Foundation; either version 2 of the License, or
+- * (at your option) any later version.
+- */
+-
+-#ifndef AT91_PDC_H
+-#define AT91_PDC_H
+-
+-#define AT91_PDC_RPR		0x100	/* Receive Pointer Register */
+-#define AT91_PDC_RCR		0x104	/* Receive Counter Register */
+-#define AT91_PDC_TPR		0x108	/* Transmit Pointer Register */
+-#define AT91_PDC_TCR		0x10c	/* Transmit Counter Register */
+-#define AT91_PDC_RNPR		0x110	/* Receive Next Pointer Register */
+-#define AT91_PDC_RNCR		0x114	/* Receive Next Counter Register */
+-#define AT91_PDC_TNPR		0x118	/* Transmit Next Pointer Register */
+-#define AT91_PDC_TNCR		0x11c	/* Transmit Next Counter Register */
+-
+-#define AT91_PDC_PTCR		0x120	/* Transfer Control Register */
+-#define		AT91_PDC_RXTEN		(1 << 0)	/* Receiver Transfer Enable */
+-#define		AT91_PDC_RXTDIS		(1 << 1)	/* Receiver Transfer Disable */
+-#define		AT91_PDC_TXTEN		(1 << 8)	/* Transmitter Transfer Enable */
+-#define		AT91_PDC_TXTDIS		(1 << 9)	/* Transmitter Transfer Disable */
+-
+-#define AT91_PDC_PTSR		0x124	/* Transfer Status Register */
+-
+-#endif
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/board.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/board.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/board.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/board.h	2007-03-24 16:42:29.000000000 +0100
+@@ -6,6 +6,8 @@
+ 
+ #include <linux/types.h>
+ 
++#define GPIO_PIN_NONE	(-1)
++
+ /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
+ void at32_add_system_devices(void);
+ 
+@@ -26,7 +28,19 @@
+ struct platform_device *
+ at32_add_device_eth(unsigned int id, struct eth_platform_data *data);
+ 
+-struct platform_device *at32_add_device_spi(unsigned int id);
++struct spi_board_info;
++struct platform_device *
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
++
++struct platform_device *at32_add_device_twi(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++struct platform_device *at32_add_device_usba(unsigned int id);
+ 
+ struct lcdc_platform_data {
+ 	unsigned long fbmem_start;
+@@ -35,4 +49,8 @@
+ struct platform_device *
+ at32_add_device_lcdc(unsigned int id, struct lcdc_platform_data *data);
+ 
++struct platform_device *at32_add_device_ac97c(unsigned int id);
++struct platform_device *at32_add_device_abdac(unsigned int id);
++struct platform_device *at32_add_device_isi(unsigned int id);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/gpio.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/gpio.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/gpio.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/gpio.h	2007-03-24 16:42:28.000000000 +0100
+@@ -0,0 +1,27 @@
++#ifndef __ASM_AVR32_ARCH_GPIO_H
++#define __ASM_AVR32_ARCH_GPIO_H
++
++#include <linux/compiler.h>
++#include <asm/irq.h>
++
++
++/* Arch-neutral GPIO API */
++int __must_check gpio_request(unsigned int gpio, const char *label);
++void gpio_free(unsigned int gpio);
++
++int gpio_direction_input(unsigned int gpio);
++int gpio_direction_output(unsigned int gpio);
++int gpio_get_value(unsigned int gpio);
++void gpio_set_value(unsigned int gpio, int value);
++
++static inline int gpio_to_irq(unsigned int gpio)
++{
++	return gpio + GPIO_IRQ_BASE;
++}
++
++static inline int irq_to_gpio(unsigned int irq)
++{
++	return irq - GPIO_IRQ_BASE;
++}
++
++#endif /* __ASM_AVR32_ARCH_GPIO_H */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/irq.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/irq.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/irq.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/irq.h	2007-03-24 16:42:28.000000000 +0100
+@@ -0,0 +1,14 @@
++#ifndef __ASM_AVR32_ARCH_IRQ_H
++#define __ASM_AVR32_ARCH_IRQ_H
++
++#define EIM_IRQ_BASE	NR_INTERNAL_IRQS
++#define NR_EIM_IRQS	32
++
++#define AT32_EXTINT(n)	(EIM_IRQ_BASE + (n))
++
++#define GPIO_IRQ_BASE	(EIM_IRQ_BASE + NR_EIM_IRQS)
++#define NR_GPIO_IRQS	(5 * 32)
++
++#define NR_IRQS		(GPIO_IRQ_BASE + NR_GPIO_IRQS)
++
++#endif /* __ASM_AVR32_ARCH_IRQ_H */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/portmux.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/portmux.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/portmux.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/portmux.h	2007-03-24 16:42:28.000000000 +0100
+@@ -15,12 +15,14 @@
+  *
+  * The following flags determine the initial state of the pin.
+  */
+-#define AT32_GPIOF_PULLUP	0x00000001	/* Enable pull-up */
+-#define AT32_GPIOF_OUTPUT	0x00000002	/* Enable output driver */
+-#define AT32_GPIOF_HIGH		0x00000004	/* Set output high */
++#define AT32_GPIOF_PULLUP	0x00000001	/* (not-OUT) Enable pull-up */
++#define AT32_GPIOF_OUTPUT	0x00000002	/* (OUT) Enable output driver */
++#define AT32_GPIOF_HIGH		0x00000004	/* (OUT) Set output high */
++#define AT32_GPIOF_DEGLITCH	0x00000008	/* (IN) Filter glitches */
+ 
+ void at32_select_periph(unsigned int pin, unsigned int periph,
+ 			unsigned long flags);
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
++void at32_reserve_pin(unsigned int pin);
+ 
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/smc.h linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/smc.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/arch-at32ap/smc.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/arch-at32ap/smc.h	2007-03-24 16:42:29.000000000 +0100
+@@ -48,10 +48,32 @@
+ 	unsigned int	nwe_controlled:1;
+ 
+ 	/*
++	 * 0: NWAIT is disabled
++	 * 1: Reserved
++	 * 2: NWAIT is frozen mode
++	 * 3: NWAIT in ready mode
++	 */
++	unsigned int	nwait_mode:2;
++
++	/*
+ 	 * 0: Byte select access type
+ 	 * 1: Byte write access type
+ 	 */
+ 	unsigned int	byte_write:1;
++
++	/*
++	 * Number of clock cycles before data is released after
++	 * the rising edge of the read controlling signal
++	 *
++	 * Total cycles from SMC is tdf_cycles + 1
++	 */
++	unsigned int	tdf_cycles:4;
++
++	/*
++	 * 0: TDF optimization disabled
++	 * 1: TDF optimization enabled
++	 */
++	unsigned int	tdf_mode:1;
+ };
+ 
+ extern int smc_set_configuration(int cs, const struct smc_config *config);
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/checksum.h linux-2.6.20.4-atmel/include/asm-avr32/checksum.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/checksum.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/checksum.h	2007-03-24 16:42:28.000000000 +0100
+@@ -38,7 +38,7 @@
+  *	passed in an incorrect kernel address to one of these functions.
+  *
+  *	If you use these functions directly please don't forget the
+- *	verify_area().
++ *	access_ok().
+  */
+ static inline
+ __wsum csum_partial_copy_nocheck(const void *src, void *dst,
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/dma-controller.h linux-2.6.20.4-atmel/include/asm-avr32/dma-controller.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/dma-controller.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/dma-controller.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/dma-mapping.h linux-2.6.20.4-atmel/include/asm-avr32/dma-mapping.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/dma-mapping.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/dma-mapping.h	2007-03-24 16:42:28.000000000 +0100
+@@ -32,6 +32,14 @@
+ 	return 0;
+ }
+ 
++/*
++ * dma_map_single can't fail as it is implemented now.
++ */
++static inline int dma_mapping_error(dma_addr_t addr)
++{
++	return 0;
++}
++
+ /**
+  * dma_alloc_coherent - allocate consistent memory for DMA
+  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/gpio.h linux-2.6.20.4-atmel/include/asm-avr32/gpio.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/gpio.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/gpio.h	2007-03-24 16:42:28.000000000 +0100
+@@ -0,0 +1,6 @@
++#ifndef __ASM_AVR32_GPIO_H
++#define __ASM_AVR32_GPIO_H
++
++#include <asm/arch/gpio.h>
++
++#endif /* __ASM_AVR32_GPIO_H */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/ide.h linux-2.6.20.4-atmel/include/asm-avr32/ide.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/ide.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/ide.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,36 @@
++/*
++ *  linux/include/asm-arm/ide.h
++ *
++ *  Copyright (C) 1994-1996  Linus Torvalds & authors
++ */
++
++/*
++ *  This file contains the ARM architecture specific IDE code.
++ */
++
++#ifndef __ASMAVR32_IDE_H
++#define __ASMAVR32_IDE_H
++
++#ifdef __KERNEL__
++
++#ifndef MAX_HWIFS
++#define MAX_HWIFS	4
++#endif
++
++#if !defined(CONFIG_ARCH_L7200)
++# define IDE_ARCH_OBSOLETE_INIT
++# ifdef CONFIG_ARCH_CLPS7500
++#  define ide_default_io_ctl(base)	((base) + 0x206) /* obsolete */
++# else
++#  define ide_default_io_ctl(base)	(0)
++# endif
++#endif /* !ARCH_L7200 */
++
++#define __ide_mm_insw(port,addr,len)	readsw(port,addr,len)
++#define __ide_mm_insl(port,addr,len)	readsl(port,addr,len)
++#define __ide_mm_outsw(port,addr,len)	writesw(port,addr,len)
++#define __ide_mm_outsl(port,addr,len)	writesl(port,addr,len)
++
++#endif /* __KERNEL__ */
++
++#endif /* __ASMAVR32_IDE_H */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/io.h linux-2.6.20.4-atmel/include/asm-avr32/io.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/io.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/io.h	2007-03-24 16:42:29.000000000 +0100
+@@ -5,6 +5,8 @@
+ 
+ #ifdef __KERNEL__
+ 
++#include <linux/types.h>
++
+ #include <asm/addrspace.h>
+ #include <asm/byteorder.h>
+ 
+@@ -28,45 +30,72 @@
+  * Generic IO read/write.  These perform native-endian accesses.  Note
+  * that some architectures will want to re-define __raw_{read,write}w.
+  */
+-extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
+-extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
+-extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
++extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
++extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
++extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
++
++extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
++extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
++extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
++
++static inline void __raw_writeb(u8 v, volatile void __iomem *addr)
++{
++	*(volatile u8 __force *)addr = v;
++}
++static inline void __raw_writew(u16 v, volatile void __iomem *addr)
++{
++	*(volatile u16 __force *)addr = v;
++}
++static inline void __raw_writel(u32 v, volatile void __iomem *addr)
++{
++	*(volatile u32 __force *)addr = v;
++}
++
++static inline u8 __raw_readb(const volatile void __iomem *addr)
++{
++	return *(const volatile u8 __force *)addr;
++}
++static inline u16 __raw_readw(const volatile void __iomem *addr)
++{
++	return *(const volatile u16 __force *)addr;
++}
++static inline u32 __raw_readl(const volatile void __iomem *addr)
++{
++	return *(const volatile u32 __force *)addr;
++}
+ 
+-extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
+-extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
+-extern void __raw_readsl(unsigned int addr, void *data, int longlen);
++#define __swizzle_addr_b(addr)					\
++	((typeof(addr))((unsigned long)(addr) ^ 3UL))
++#define __swizzle_addr_w(addr)					\
++	((typeof(addr))((unsigned long)(addr) ^ 2UL))
++#define __swizzle_addr_l(addr)					\
++	(addr)
+ 
+-static inline void writeb(unsigned char b, volatile void __iomem *addr)
++static inline void writeb(u8 v, volatile void __iomem *addr)
+ {
+-	*(volatile unsigned char __force *)addr = b;
++	__raw_writeb(v, __swizzle_addr_b(addr));
+ }
+-static inline void writew(unsigned short b, volatile void __iomem *addr)
++static inline void writew(u16 v, volatile void __iomem *addr)
+ {
+-	*(volatile unsigned short __force *)addr = b;
++	__raw_writew(v, __swizzle_addr_w(addr));
+ }
+-static inline void writel(unsigned int b, volatile void __iomem *addr)
++static inline void writel(u32 v, volatile void __iomem *addr)
+ {
+-	*(volatile unsigned int __force *)addr = b;
++	__raw_writel(v, __swizzle_addr_l(addr));
+ }
+-#define __raw_writeb writeb
+-#define __raw_writew writew
+-#define __raw_writel writel
+ 
+-static inline unsigned char readb(const volatile void __iomem *addr)
++static inline u8 readb(const volatile void __iomem *addr)
+ {
+-	return *(const volatile unsigned char __force *)addr;
++	return __raw_readb(__swizzle_addr_b(addr));
+ }
+-static inline unsigned short readw(const volatile void __iomem *addr)
++static inline u16 readw(const volatile void __iomem *addr)
+ {
+-	return *(const volatile unsigned short __force *)addr;
++	return __raw_readw(__swizzle_addr_w(addr));
+ }
+-static inline unsigned int readl(const volatile void __iomem *addr)
++static inline u32 readl(const volatile void __iomem *addr)
+ {
+-	return *(const volatile unsigned int __force *)addr;
++	return __raw_readl(__swizzle_addr_l(addr));
+ }
+-#define __raw_readb readb
+-#define __raw_readw readw
+-#define __raw_readl readl
+ 
+ #define writesb(p, d, l)	__raw_writesb((unsigned int)p, d, l)
+ #define writesw(p, d, l)	__raw_writesw((unsigned int)p, d, l)
+@@ -108,17 +137,13 @@
+ 
+ #endif
+ 
+-
+-/*
+- * These two are only here because ALSA _thinks_ it needs them...
+- */
+ static inline void memcpy_fromio(void * to, const volatile void __iomem *from,
+ 				 unsigned long count)
+ {
+ 	char *p = to;
+ 	while (count) {
+ 		count--;
+-		*p = readb(from);
++		*p = __raw_readb(from);
+ 		p++;
+ 		from++;
+ 	}
+@@ -130,7 +155,7 @@
+ 	const char *p = from;
+ 	while (count) {
+ 		count--;
+-		writeb(*p, to);
++		__raw_writeb(*p, to);
+ 		p++;
+ 		to++;
+ 	}
+@@ -252,6 +277,9 @@
+ #define ioremap(offset, size)			\
+ 	__ioremap((offset), (size), 0)
+ 
++#define ioremap_nocache(offset, size)		\
++	__ioremap((offset), (size), 0)
++
+ #define iounmap(addr)				\
+ 	__iounmap(addr)
+ 
+@@ -263,6 +291,14 @@
+ #define page_to_bus page_to_phys
+ #define bus_to_page phys_to_page
+ 
++/*
++ * Create a virtual mapping cookie for an IO port range.  There exists
++ * no such thing as port-based I/O on AVR32, so a regular ioremap()
++ * should do what we need.
++ */
++#define ioport_map(port, nr)	ioremap(port, nr)
++#define ioport_unmap(port)	iounmap(port)
++
+ #define dma_cache_wback_inv(_start, _size)	\
+ 	flush_dcache_region(_start, _size)
+ #define dma_cache_inv(_start, _size)		\
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/irq.h linux-2.6.20.4-atmel/include/asm-avr32/irq.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/irq.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/irq.h	2007-03-24 16:42:28.000000000 +0100
+@@ -2,8 +2,12 @@
+ #define __ASM_AVR32_IRQ_H
+ 
+ #define NR_INTERNAL_IRQS	64
+-#define NR_EXTERNAL_IRQS	64
+-#define NR_IRQS			(NR_INTERNAL_IRQS + NR_EXTERNAL_IRQS)
++
++#include <asm/arch/irq.h>
++
++#ifndef NR_IRQS
++#define NR_IRQS			(NR_INTERNAL_IRQS)
++#endif
+ 
+ #define irq_canonicalize(i)	(i)
+ 
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/Kbuild linux-2.6.20.4-atmel/include/asm-avr32/Kbuild
+--- linux-2.6.20.4-0rig/include/asm-avr32/Kbuild	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/Kbuild	2007-03-24 16:42:28.000000000 +0100
+@@ -1,3 +1,3 @@
+ include include/asm-generic/Kbuild.asm
+ 
+-headers-y	+= cachectl.h
++header-y	+= cachectl.h
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/periph/lcdc.h linux-2.6.20.4-atmel/include/asm-avr32/periph/lcdc.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/periph/lcdc.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/periph/lcdc.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,271 @@
++/*
++ * Register definitions for Atmel/SIDSA LCD Controller
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_PERIPH_LCDC_H__
++#define __ASM_AVR32_PERIPH_LCDC_H__
++
++#define LCDC_CONTRAST_CTR                       0x00000840
++# define LCDC_CONTRAST_CTR_ENA_OFFSET           3
++# define LCDC_CONTRAST_CTR_ENA_SIZE             1
++# define LCDC_CONTRAST_CTR_POL_OFFSET           2
++# define LCDC_CONTRAST_CTR_POL_SIZE             1
++# define LCDC_CONTRAST_CTR_PS_OFFSET            0
++# define LCDC_CONTRAST_CTR_PS_SIZE              2
++#define LCDC_CONTRAST_VAL                       0x00000844
++# define LCDC_CONTRAST_VAL_CVAL_OFFSET          0
++# define LCDC_CONTRAST_VAL_CVAL_SIZE            8
++#define LCDC_DMABADDR1                          0x00000000
++# define LCDC_DMABADDR1_BADDR_U_OFFSET          0
++# define LCDC_DMABADDR1_BADDR_U_SIZE            32
++#define LCDC_DMABADDR2                          0x00000004
++# define LCDC_DMABADDR2_BADDR_L_OFFSET          0
++# define LCDC_DMABADDR2_BADDR_L_SIZE            32
++#define LCDC_DMACON                             0x0000001C
++# define LCDC_DMACON_DMABUSY_OFFSET             2
++# define LCDC_DMACON_DMABUSY_SIZE               1
++# define LCDC_DMACON_DMAEN_OFFSET               0
++# define LCDC_DMACON_DMAEN_SIZE                 1
++# define LCDC_DMACON_DMARST_OFFSET              1
++# define LCDC_DMACON_DMARST_SIZE                1
++# define LCDC_DMACON_DMAUPDT_OFFSET             3
++# define LCDC_DMACON_DMAUPDT_SIZE               1
++# define LCDC_DMACON_DMA2DEN_OFFSET             4
++# define LCDC_DMACON_DMA2DEN_SIZE               1
++#define LCDC_DMAFRMADD1                         0x00000010
++# define LCDC_DMAFRMADD1_FRMADD_U_OFFSET        0
++# define LCDC_DMAFRMADD1_FRMADD_U_SIZE          32
++#define LCDC_DMAFRMADD2                         0x00000014
++# define LCDC_DMAFRMADD2_FRMADD_L_OFFSET        0
++# define LCDC_DMAFRMADD2_FRMADD_L_SIZE          32
++#define LCDC_DMAFRMCFG                          0x00000018
++# define LCDC_DMAFRMCFG_BRSTLEN_OFFSET          24
++# define LCDC_DMAFRMCFG_BRSTLEN_SIZE            7
++# define LCDC_DMAFRMCFG_FRMSIZE_OFFSET          0
++# define LCDC_DMAFRMCFG_FRMSIZE_SIZE            23
++#define LCDC_DMAFRMPT1                          0x00000008
++# define LCDC_DMAFRMPT1_FRMPT_U_OFFSET          0
++# define LCDC_DMAFRMPT1_FRMPT_U_SIZE            23
++#define LCDC_DMAFRMPT2                          0x0000000C
++# define LCDC_DMAFRMPT2_FRMPT_L_OFFSET          0
++# define LCDC_DMAFRMPT2_FRMPT_L_SIZE            23
++#define LCDC_DMA2DCFG                           0x00000020
++# define LCDC_DMA2DCFG_ADDRINC_OFFSET           0
++# define LCDC_DMA2DCFG_ADDRINC_SIZE             16
++# define LCDC_DMA2DCFG_PIXELOFF_OFFSET          24
++# define LCDC_DMA2DCFG_PIXELOFF_SIZE            5
++#define LCDC_DP1_2                              0x0000081C
++# define LCDC_DP1_2_DP1_2_OFFSET                0
++# define LCDC_DP1_2_DP1_2_SIZE                  8
++#define LCDC_DP2_3                              0x00000828
++# define LCDC_DP2_3_DP2_3_OFFSET                0
++# define LCDC_DP2_3_DP2_3_SIZE                  12
++#define LCDC_DP3_4                              0x00000830
++# define LCDC_DP3_4_DP3_4_OFFSET                0
++# define LCDC_DP3_4_DP3_4_SIZE                  16
++#define LCDC_DP3_5                              0x00000824
++# define LCDC_DP3_5_DP3_5_OFFSET                0
++# define LCDC_DP3_5_DP3_5_SIZE                  20
++#define LCDC_DP4_5                              0x00000834
++# define LCDC_DP4_5_DP4_5_OFFSET                0
++# define LCDC_DP4_5_DP4_5_SIZE                  20
++#define LCDC_DP4_7                              0x00000820
++# define LCDC_DP4_7_DP4_7_OFFSET                0
++# define LCDC_DP4_7_DP4_7_SIZE                  28
++#define LCDC_DP5_7                              0x0000082C
++# define LCDC_DP5_7_DP5_7_OFFSET                0
++# define LCDC_DP5_7_DP5_7_SIZE                  28
++#define LCDC_DP6_7                              0x00000838
++# define LCDC_DP6_7_DP6_7_OFFSET                0
++# define LCDC_DP6_7_DP6_7_SIZE                  28
++#define LCDC_LCDCON1                            0x00000800
++# define LCDC_LCDCON1_BYPASS_OFFSET             0
++# define LCDC_LCDCON1_BYPASS_SIZE               1
++# define LCDC_LCDCON1_CLKVAL_OFFSET             12
++# define LCDC_LCDCON1_CLKVAL_SIZE               9
++# define LCDC_LCDCON1_LINECNT_OFFSET            21
++# define LCDC_LCDCON1_LINECNT_SIZE              11
++#define LCDC_LCDCON2                            0x00000804
++# define LCDC_LCDCON2_CLKMOD_OFFSET             15
++# define LCDC_LCDCON2_CLKMOD_SIZE               1
++# define LCDC_LCDCON2_DISTYPE_OFFSET            0
++# define LCDC_LCDCON2_DISTYPE_SIZE              2
++# define LCDC_LCDCON2_IFWIDTH_OFFSET            3
++# define LCDC_LCDCON2_IFWIDTH_SIZE              2
++# define LCDC_LCDCON2_INVCLK_OFFSET             11
++# define LCDC_LCDCON2_INVCLK_SIZE               1
++# define LCDC_LCDCON2_INVDVAL_OFFSET            12
++# define LCDC_LCDCON2_INVDVAL_SIZE              1
++# define LCDC_LCDCON2_INVFRAME_OFFSET           9
++# define LCDC_LCDCON2_INVFRAME_SIZE             1
++# define LCDC_LCDCON2_INVLINE_OFFSET            10
++# define LCDC_LCDCON2_INVLINE_SIZE              1
++# define LCDC_LCDCON2_INVVD_OFFSET              8
++# define LCDC_LCDCON2_INVVD_SIZE                1
++# define LCDC_LCDCON2_MEMOR_OFFSET              30
++# define LCDC_LCDCON2_MEMOR_SIZE                2
++# define LCDC_LCDCON2_PIXELSIZE_OFFSET          5
++# define LCDC_LCDCON2_PIXELSIZE_SIZE            3
++# define LCDC_LCDCON2_SCANMOD_OFFSET            2
++# define LCDC_LCDCON2_SCANMOD_SIZE              1
++#define LCDC_LCDFIFO                            0x00000814
++# define LCDC_LCDFIFO_FIFOTH_OFFSET             0
++# define LCDC_LCDFIFO_FIFOTH_SIZE               16
++#define LCDC_LCDFRMCFG                          0x00000810
++# define LCDC_LCDFRMCFG_LINESIZE_OFFSET         21
++# define LCDC_LCDFRMCFG_LINESIZE_SIZE           11
++# define LCDC_LCDFRMCFG_LINEVAL_OFFSET          0
++# define LCDC_LCDFRMCFG_LINEVAL_SIZE            11
++#define LCDC_LCDMVAL                            0x00000818
++# define LCDC_LCDMVAL_MMODE_OFFSET              31
++# define LCDC_LCDMVAL_MMODE_SIZE                1
++# define LCDC_LCDMVAL_MVAL_OFFSET               0
++# define LCDC_LCDMVAL_MVAL_SIZE                 8
++#define LCDC_LCDTIM1                            0x00000808
++# define LCDC_LCDTIM1_VBP_OFFSET                8
++# define LCDC_LCDTIM1_VBP_SIZE                  8
++# define LCDC_LCDTIM1_VFP_OFFSET                0
++# define LCDC_LCDTIM1_VFP_SIZE                  8
++# define LCDC_LCDTIM1_VHDLY_OFFSET              24
++# define LCDC_LCDTIM1_VHDLY_SIZE                4
++# define LCDC_LCDTIM1_VPW_OFFSET                16
++# define LCDC_LCDTIM1_VPW_SIZE                  6
++#define LCDC_LCDTIM2                            0x0000080C
++# define LCDC_LCDTIM2_HBP_OFFSET                0
++# define LCDC_LCDTIM2_HBP_SIZE                  8
++# define LCDC_LCDTIM2_HFP_OFFSET                21
++# define LCDC_LCDTIM2_HFP_SIZE                  11
++# define LCDC_LCDTIM2_HPW_OFFSET                8
++# define LCDC_LCDTIM2_HPW_SIZE                  6
++#define LCDC_LCD_GPR                            0x0000085C
++# define LCDC_LCD_GPR_GPRB0_OFFSET              0
++# define LCDC_LCD_GPR_GPRB0_SIZE                1
++# define LCDC_LCD_GPR_GPRB1_OFFSET              1
++# define LCDC_LCD_GPR_GPRB1_SIZE                1
++# define LCDC_LCD_GPR_GPRB2_OFFSET              2
++# define LCDC_LCD_GPR_GPRB2_SIZE                1
++# define LCDC_LCD_GPR_GPRB3_OFFSET              3
++# define LCDC_LCD_GPR_GPRB3_SIZE                1
++# define LCDC_LCD_GPR_GPRB4_OFFSET              4
++# define LCDC_LCD_GPR_GPRB4_SIZE                1
++# define LCDC_LCD_GPR_GPRB5_OFFSET              5
++# define LCDC_LCD_GPR_GPRB5_SIZE                1
++# define LCDC_LCD_GPR_GPRB6_OFFSET              6
++# define LCDC_LCD_GPR_GPRB6_SIZE                1
++# define LCDC_LCD_GPR_GPRB7_OFFSET              7
++# define LCDC_LCD_GPR_GPRB7_SIZE                1
++#define LCDC_LCD_ICR                            0x00000858
++# define LCDC_LCD_ICR_EOFIC_OFFSET              2
++# define LCDC_LCD_ICR_EOFIC_SIZE                1
++# define LCDC_LCD_ICR_LNIC_OFFSET               0
++# define LCDC_LCD_ICR_LNIC_SIZE                 1
++# define LCDC_LCD_ICR_LSTLNIC_OFFSET            1
++# define LCDC_LCD_ICR_LSTLNIC_SIZE              1
++# define LCDC_LCD_ICR_MERIC_OFFSET              6
++# define LCDC_LCD_ICR_MERIC_SIZE                1
++# define LCDC_LCD_ICR_OWRIC_OFFSET              5
++# define LCDC_LCD_ICR_OWRIC_SIZE                1
++# define LCDC_LCD_ICR_UFLWIC_OFFSET             4
++# define LCDC_LCD_ICR_UFLWIC_SIZE               1
++#define LCDC_LCD_IDR                            0x0000084C
++# define LCDC_LCD_IDR_EOFID_OFFSET              2
++# define LCDC_LCD_IDR_EOFID_SIZE                1
++# define LCDC_LCD_IDR_LNID_OFFSET               0
++# define LCDC_LCD_IDR_LNID_SIZE                 1
++# define LCDC_LCD_IDR_LSTLNID_OFFSET            1
++# define LCDC_LCD_IDR_LSTLNID_SIZE              1
++# define LCDC_LCD_IDR_MERID_OFFSET              6
++# define LCDC_LCD_IDR_MERID_SIZE                1
++# define LCDC_LCD_IDR_OWRID_OFFSET              5
++# define LCDC_LCD_IDR_OWRID_SIZE                1
++# define LCDC_LCD_IDR_UFLWID_OFFSET             4
++# define LCDC_LCD_IDR_UFLWID_SIZE               1
++#define LCDC_LCD_IER                            0x00000848
++# define LCDC_LCD_IER_EOFIE_OFFSET              2
++# define LCDC_LCD_IER_EOFIE_SIZE                1
++# define LCDC_LCD_IER_LNIE_OFFSET               0
++# define LCDC_LCD_IER_LNIE_SIZE                 1
++# define LCDC_LCD_IER_LSTLNIE_OFFSET            1
++# define LCDC_LCD_IER_LSTLNIE_SIZE              1
++# define LCDC_LCD_IER_MERIE_OFFSET              6
++# define LCDC_LCD_IER_MERIE_SIZE                1
++# define LCDC_LCD_IER_OWRIE_OFFSET              5
++# define LCDC_LCD_IER_OWRIE_SIZE                1
++# define LCDC_LCD_IER_UFLWIE_OFFSET             4
++# define LCDC_LCD_IER_UFLWIE_SIZE               1
++#define LCDC_LCD_IMR                            0x00000850
++# define LCDC_LCD_IMR_EOFIM_OFFSET              2
++# define LCDC_LCD_IMR_EOFIM_SIZE                1
++# define LCDC_LCD_IMR_LNIM_OFFSET               0
++# define LCDC_LCD_IMR_LNIM_SIZE                 1
++# define LCDC_LCD_IMR_LSTLNIM_OFFSET            1
++# define LCDC_LCD_IMR_LSTLNIM_SIZE              1
++# define LCDC_LCD_IMR_MERIM_OFFSET              6
++# define LCDC_LCD_IMR_MERIM_SIZE                1
++# define LCDC_LCD_IMR_OWRIM_OFFSET              5
++# define LCDC_LCD_IMR_OWRIM_SIZE                1
++# define LCDC_LCD_IMR_UFLWIM_OFFSET             4
++# define LCDC_LCD_IMR_UFLWIM_SIZE               1
++#define LCDC_LCD_IRR                            0x00000864
++# define LCDC_LCD_IRR_EOFIR_OFFSET              2
++# define LCDC_LCD_IRR_EOFIR_SIZE                1
++# define LCDC_LCD_IRR_LNIR_OFFSET               0
++# define LCDC_LCD_IRR_LNIR_SIZE                 1
++# define LCDC_LCD_IRR_LSTLNIR_OFFSET            1
++# define LCDC_LCD_IRR_LSTLNIR_SIZE              1
++# define LCDC_LCD_IRR_MERIR_OFFSET              6
++# define LCDC_LCD_IRR_MERIR_SIZE                1
++# define LCDC_LCD_IRR_OWRIR_OFFSET              5
++# define LCDC_LCD_IRR_OWRIR_SIZE                1
++# define LCDC_LCD_IRR_UFLWIR_OFFSET             4
++# define LCDC_LCD_IRR_UFLWIR_SIZE               1
++#define LCDC_LCD_ISR                            0x00000854
++# define LCDC_LCD_ISR_EOFIS_OFFSET              2
++# define LCDC_LCD_ISR_EOFIS_SIZE                1
++# define LCDC_LCD_ISR_LNIS_OFFSET               0
++# define LCDC_LCD_ISR_LNIS_SIZE                 1
++# define LCDC_LCD_ISR_LSTLNIS_OFFSET            1
++# define LCDC_LCD_ISR_LSTLNIS_SIZE              1
++# define LCDC_LCD_ISR_MERIS_OFFSET              6
++# define LCDC_LCD_ISR_MERIS_SIZE                1
++# define LCDC_LCD_ISR_OWRIS_OFFSET              5
++# define LCDC_LCD_ISR_OWRIS_SIZE                1
++# define LCDC_LCD_ISR_UFLWIS_OFFSET             4
++# define LCDC_LCD_ISR_UFLWIS_SIZE               1
++#define LCDC_LCD_ITR                            0x00000860
++# define LCDC_LCD_ITR_EOFIT_OFFSET              2
++# define LCDC_LCD_ITR_EOFIT_SIZE                1
++# define LCDC_LCD_ITR_LNIT_OFFSET               0
++# define LCDC_LCD_ITR_LNIT_SIZE                 1
++# define LCDC_LCD_ITR_LSTLNIT_OFFSET            1
++# define LCDC_LCD_ITR_LSTLNIT_SIZE              1
++# define LCDC_LCD_ITR_MERIT_OFFSET              6
++# define LCDC_LCD_ITR_MERIT_SIZE                1
++# define LCDC_LCD_ITR_OWRIT_OFFSET              5
++# define LCDC_LCD_ITR_OWRIT_SIZE                1
++# define LCDC_LCD_ITR_UFLWIT_OFFSET             4
++# define LCDC_LCD_ITR_UFLWIT_SIZE               1
++#define LCDC_PWRCON                             0x0000083C
++# define LCDC_PWRCON_GUARD_TIME_OFFSET          1
++# define LCDC_PWRCON_GUARD_TIME_SIZE            7
++# define LCDC_PWRCON_LCD_BUSY_OFFSET            31
++# define LCDC_PWRCON_LCD_BUSY_SIZE              1
++# define LCDC_PWRCON_LCD_PWR_OFFSET             0
++# define LCDC_PWRCON_LCD_PWR_SIZE               1
++
++#define LCDC_BIT(name)                          (1 << LCDC_##name##_OFFSET)
++#define LCDC_MKBF(name,value)                   (((value) & ((1 << LCDC_##name##_SIZE) - 1)) << LCDC_##name##_OFFSET)
++#define LCDC_GETBF(name,value)                  (((value) >> LCDC_##name##_OFFSET) & ((1 << LCDC_##name##_SIZE) - 1))
++#define LCDC_INSBF(name,value,old)              (((old) & ~(((1 << LCDC_##name##_SIZE) - 1) << LCDC_##name##_OFFSET)) | LCDC_MKBF(name, value))
++
++#define lcdc_readl(port,reg)				\
++	__raw_readl((port)->regs + LCDC_##reg)
++#define lcdc_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + LCDC_##reg)
++
++#endif /* __ASM_AVR32_PERIPH_LCDC_H__ */
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/posix_types.h linux-2.6.20.4-atmel/include/asm-avr32/posix_types.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/posix_types.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/posix_types.h	2007-03-24 16:42:28.000000000 +0100
+@@ -23,7 +23,7 @@
+ typedef unsigned int	__kernel_uid_t;
+ typedef unsigned int	__kernel_gid_t;
+ typedef unsigned long	__kernel_size_t;
+-typedef int             __kernel_ssize_t;
++typedef long		__kernel_ssize_t;
+ typedef int             __kernel_ptrdiff_t;
+ typedef long            __kernel_time_t;
+ typedef long            __kernel_suseconds_t;
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/uaccess.h linux-2.6.20.4-atmel/include/asm-avr32/uaccess.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/uaccess.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/uaccess.h	2007-03-24 16:42:28.000000000 +0100
+@@ -68,12 +68,6 @@
+ 
+ #define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0))
+ 
+-static inline int
+-verify_area(int type, const void __user *addr, unsigned long size)
+-{
+-	return access_ok(type, addr, size) ? 0 : -EFAULT;
+-}
+-
+ /* Generic arbitrary sized copy. Return the number of bytes NOT copied */
+ extern __kernel_size_t __copy_user(void *to, const void *from,
+ 				   __kernel_size_t n);
+diff -urN linux-2.6.20.4-0rig/include/asm-avr32/unistd.h linux-2.6.20.4-atmel/include/asm-avr32/unistd.h
+--- linux-2.6.20.4-0rig/include/asm-avr32/unistd.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/asm-avr32/unistd.h	2007-03-24 16:42:28.000000000 +0100
+@@ -120,7 +120,7 @@
+ #define __NR_getitimer		105
+ #define __NR_swapoff		106
+ #define __NR_sysinfo		107
+-#define __NR_ipc		108
++/* 108 was __NR_ipc for a little while */
+ #define __NR_sendfile		109
+ #define __NR_setdomainname	110
+ #define __NR_uname		111
+@@ -282,8 +282,21 @@
+ #define __NR_vmsplice		264
+ #define __NR_epoll_pwait	265
+ 
++#define __NR_msgget		266
++#define __NR_msgsnd		267
++#define __NR_msgrcv		268
++#define __NR_msgctl		269
++#define __NR_semget		270
++#define __NR_semop		271
++#define __NR_semctl		272
++#define __NR_semtimedop		273
++#define __NR_shmat		274
++#define __NR_shmget		275
++#define __NR_shmdt		276
++#define __NR_shmctl		277
++
+ #ifdef __KERNEL__
+-#define NR_syscalls		266
++#define NR_syscalls		278
+ 
+ 
+ #define __ARCH_WANT_IPC_PARSE_VERSION
+diff -urN linux-2.6.20.4-0rig/include/linux/atmel_pdc.h linux-2.6.20.4-atmel/include/linux/atmel_pdc.h
+--- linux-2.6.20.4-0rig/include/linux/atmel_pdc.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/linux/atmel_pdc.h	2007-03-24 16:39:16.000000000 +0100
+@@ -0,0 +1,36 @@
++/*
++ * include/linux/atmel_pdc.h
++ *
++ * Copyright (C) 2005 Ivan Kokshaysky
++ * Copyright (C) SAN People
++ *
++ * Peripheral Data Controller (PDC) registers.
++ * Based on AT91RM9200 datasheet revision E.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef ATMEL_PDC_H
++#define ATMEL_PDC_H
++
++#define ATMEL_PDC_RPR		0x100	/* Receive Pointer Register */
++#define ATMEL_PDC_RCR		0x104	/* Receive Counter Register */
++#define ATMEL_PDC_TPR		0x108	/* Transmit Pointer Register */
++#define ATMEL_PDC_TCR		0x10c	/* Transmit Counter Register */
++#define ATMEL_PDC_RNPR		0x110	/* Receive Next Pointer Register */
++#define ATMEL_PDC_RNCR		0x114	/* Receive Next Counter Register */
++#define ATMEL_PDC_TNPR		0x118	/* Transmit Next Pointer Register */
++#define ATMEL_PDC_TNCR		0x11c	/* Transmit Next Counter Register */
++
++#define ATMEL_PDC_PTCR		0x120	/* Transfer Control Register */
++#define		ATMEL_PDC_RXTEN		(1 << 0)	/* Receiver Transfer Enable */
++#define		ATMEL_PDC_RXTDIS	(1 << 1)	/* Receiver Transfer Disable */
++#define		ATMEL_PDC_TXTEN		(1 << 8)	/* Transmitter Transfer Enable */
++#define		ATMEL_PDC_TXTDIS	(1 << 9)	/* Transmitter Transfer Disable */
++
++#define ATMEL_PDC_PTSR		0x124	/* Transfer Status Register */
++
++#endif
+diff -urN linux-2.6.20.4-0rig/include/linux/fb.h linux-2.6.20.4-atmel/include/linux/fb.h
+--- linux-2.6.20.4-0rig/include/linux/fb.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/linux/fb.h	2007-03-24 16:42:29.000000000 +0100
+@@ -192,6 +192,7 @@
+ 					/* vtotal = 144d/288n/576i => PAL  */
+ 					/* vtotal = 121d/242n/484i => NTSC */
+ #define FB_SYNC_ON_GREEN	32	/* sync on green */
++#define FB_SYNC_PCLK_RISING	64	/* pixel data sampled on rising pclk */
+ 
+ #define FB_VMODE_NONINTERLACED  0	/* non interlaced */
+ #define FB_VMODE_INTERLACED	1	/* interlaced	*/
+@@ -827,7 +828,7 @@
+ #define fb_writeq sbus_writeq
+ #define fb_memset sbus_memset_io
+ 
+-#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__)
++#elif defined(__i386__) || defined(__alpha__) || defined(__x86_64__) || defined(__hppa__) || (defined(__sh__) && !defined(__SH5__)) || defined(__powerpc__) || defined(__avr32__)
+ 
+ #define fb_readb __raw_readb
+ #define fb_readw __raw_readw
+diff -urN linux-2.6.20.4-0rig/include/linux/mtd/physmap.h linux-2.6.20.4-atmel/include/linux/mtd/physmap.h
+--- linux-2.6.20.4-0rig/include/linux/mtd/physmap.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/linux/mtd/physmap.h	2007-03-24 16:42:28.000000000 +0100
+@@ -18,9 +18,10 @@
+ #define __LINUX_MTD_PHYSMAP__
+ 
+ #include <linux/mtd/mtd.h>
+-#include <linux/mtd/map.h>
+ #include <linux/mtd/partitions.h>
+ 
++struct map_info;
++
+ struct physmap_flash_data {
+ 	unsigned int		width;
+ 	void			(*set_vpp)(struct map_info *, int);
+diff -urN linux-2.6.20.4-0rig/include/linux/spi/ads7846.h linux-2.6.20.4-atmel/include/linux/spi/ads7846.h
+--- linux-2.6.20.4-0rig/include/linux/spi/ads7846.h	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/include/linux/spi/ads7846.h	2007-03-24 16:39:16.000000000 +0100
+@@ -5,9 +5,17 @@
+  *
+  * It's OK if the min/max values are zero.
+  */
++enum ads7846_filter {
++	ADS7846_FILTER_OK,
++	ADS7846_FILTER_REPEAT,
++	ADS7846_FILTER_IGNORE,
++};
++
+ struct ads7846_platform_data {
+ 	u16	model;			/* 7843, 7845, 7846. */
+ 	u16	vref_delay_usecs;	/* 0 for external vref; etc */
++	int	keep_vref_on:1;		/* set to keep vref on for differential
++					 * measurements as well */
+ 	u16	x_plate_ohms;
+ 	u16	y_plate_ohms;
+ 
+@@ -21,5 +29,9 @@
+ 	u16	debounce_rep;		/* additional consecutive good readings
+ 					 * required after the first two */
+ 	int	(*get_pendown_state)(void);
++	int	(*filter_init)	(struct ads7846_platform_data *pdata,
++				 void **filter_data);
++	int	(*filter)	(void *filter_data, int data_idx, int *val);
++	void	(*filter_cleanup)(void *filter_data);
+ };
+ 
+diff -urN linux-2.6.20.4-0rig/include/video/atmel_lcdc.h linux-2.6.20.4-atmel/include/video/atmel_lcdc.h
+--- linux-2.6.20.4-0rig/include/video/atmel_lcdc.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/include/video/atmel_lcdc.h	2007-03-24 16:39:16.000000000 +0100
+@@ -0,0 +1,193 @@
++/*
++ *  include/video/atmel_lcdc.h
++ *
++ *  Header file for AT91/AT32 LCD Controller
++ *
++ *  Data structure and register user interface
++ *
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++#ifndef __ATMEL_LCDC_H__
++#define __ATMEL_LCDC_H__
++
++ /* LCD Controller info data structure */
++struct atmel_lcdfb_info {
++	spinlock_t		lock;
++	struct fb_info		*info;
++	void __iomem		*mmio;
++	unsigned long		irq_base;
++	dma_addr_t		map_dma;
++	void			*map_cpu;
++	size_t			map_size;
++
++	unsigned int		guard_time;
++	struct platform_device	*pdev;
++	struct clk		*bus_clk;
++	struct clk		*lcdc_clk;
++	unsigned int		default_bpp;
++	unsigned int		default_lcdcon2;
++	unsigned int		default_dmacon;
++	int			default_flags;
++	u8			power_control_pin;
++	struct fb_monspecs	 *default_monspecs;
++};
++
++#define ATMEL_LCDC_DMABADDR1	0x00		/* DMA Base Address Register 1 */
++#define ATMEL_LCDC_DMABADDR2	0x04		/* DMA Base Address Register 2 */
++#define ATMEL_LCDC_DMAFRMPT1	0x08		/* DMA Frame Pointer Register 1 */
++#define ATMEL_LCDC_DMAFRMPT2	0x0c		/* DMA Frame Pointer Register 2 */
++#define ATMEL_LCDC_DMAFRMADD1	0x10		/* DMA Frame Address Register 1 */
++#define ATMEL_LCDC_DMAFRMADD2	0x14		/* DMA Frame Address Register 2 */
++
++#define ATMEL_LCDC_DMAFRMCFG	0x18		/* DMA Frame Configuration Register */
++#define		ATMEL_LCDC_FRSIZE	(0x7fffff <<  0)	/* Frame Size */
++#define		ATMEL_LCDC_BLENGTH_OFFSET	24		/* Burst Length */
++#define		ATMEL_LCDC_BLENGTH	(0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)
++
++#define ATMEL_LCDC_DMACON	0x1c		/* DMA Control Register */
++#define		ATMEL_LCDC_DMAEN	(0x1 << 0)	/* DMA Enable */
++#define		ATMEL_LCDC_DMARST	(0x1 << 1)	/* DMA Reset */
++#define		ATMEL_LCDC_DMABUSY	(0x1 << 2)	/* DMA Busy */
++
++#define ATMEL_LCDC_LCDCON1	0x0800		/* LCD Control Register 1 */
++#define		ATMEL_LCDC_BYPASS	(1     <<  0)	/* Bypass lcd_dotck divider */
++#define		ATMEL_LCDC_CLKVAL_OFFSET	12	/* Clock Divider */
++#define		ATMEL_LCDC_CLKVAL	(0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
++#define		ATMEL_LCDC_LINCNT	(0x7ff << 21)	/* Line Counter */
++
++#define ATMEL_LCDC_LCDCON2	0x0804		/* LCD Control Register 2 */
++#define		ATMEL_LCDC_DISTYPE	(3 << 0)	/* Display Type */
++#define			ATMEL_LCDC_DISTYPE_STNMONO	(0 << 0)
++#define			ATMEL_LCDC_DISTYPE_STNCOLOR	(1 << 0)
++#define			ATMEL_LCDC_DISTYPE_TFT		(2 << 0)
++#define		ATMEL_LCDC_SCANMOD	(1 << 2)	/* Scan Mode */
++#define			ATMEL_LCDC_SCANMOD_SINGLE	(0 << 2)
++#define			ATMEL_LCDC_SCANMOD_DUAL		(1 << 2)
++#define		ATMEL_LCDC_IFWIDTH	(3 << 3)	/*Interface Width */
++#define			ATMEL_LCDC_IFWIDTH_4		(0 << 3)
++#define			ATMEL_LCDC_IFWIDTH_8		(1 << 3)
++#define			ATMEL_LCDC_IFWIDTH_16		(2 << 3)
++#define		ATMEL_LCDC_PIXELSIZE	(7 << 5)	/* Bits per pixel */
++#define			ATMEL_LCDC_PIXELSIZE_1		(0 << 5)
++#define			ATMEL_LCDC_PIXELSIZE_2		(1 << 5)
++#define			ATMEL_LCDC_PIXELSIZE_4		(2 << 5)
++#define			ATMEL_LCDC_PIXELSIZE_8		(3 << 5)
++#define			ATMEL_LCDC_PIXELSIZE_16		(4 << 5)
++#define			ATMEL_LCDC_PIXELSIZE_24		(5 << 5)
++#define			ATMEL_LCDC_PIXELSIZE_32		(6 << 5)
++#define		ATMEL_LCDC_INVVD	(1 << 8)	/* LCD Data polarity */
++#define			ATMEL_LCDC_INVVD_NORMAL		(0 << 8)
++#define			ATMEL_LCDC_INVVD_INVERTED	(1 << 8)
++#define		ATMEL_LCDC_INVFRAME	(1 << 9 )	/* LCD VSync polarity */
++#define			ATMEL_LCDC_INVFRAME_NORMAL	(0 << 9)
++#define			ATMEL_LCDC_INVFRAME_INVERTED	(1 << 9)
++#define		ATMEL_LCDC_INVLINE	(1 << 10)	/* LCD HSync polarity */
++#define			ATMEL_LCDC_INVLINE_NORMAL	(0 << 10)
++#define			ATMEL_LCDC_INVLINE_INVERTED	(1 << 10)
++#define		ATMEL_LCDC_INVCLK	(1 << 11)	/* LCD dotclk polarity */
++#define			ATMEL_LCDC_INVCLK_NORMAL	(0 << 11)
++#define			ATMEL_LCDC_INVCLK_INVERTED	(1 << 11)
++#define		ATMEL_LCDC_INVDVAL	(1 << 12)	/* LCD dval polarity */
++#define			ATMEL_LCDC_INVDVAL_NORMAL	(0 << 12)
++#define			ATMEL_LCDC_INVDVAL_INVERTED	(1 << 12)
++#define		ATMEL_LCDC_CLKMOD	(1 << 15)	/* LCD dotclk mode */
++#define			ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY	(0 << 15)
++#define			ATMEL_LCDC_CLKMOD_ALWAYSACTIVE	(1 << 15)
++#define		ATMEL_LCDC_MEMOR	(1 << 31)	/* Memory Ordering Format */
++#define			ATMEL_LCDC_MEMOR_BIG		(0 << 31)
++#define			ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)
++
++#define ATMEL_LCDC_TIM1		0x0808		/* LCD Timing Register 1 */
++#define		ATMEL_LCDC_VFP		(0xff <<  0)	/* Vertical Front Porch */
++#define		ATMEL_LCDC_VBP_OFFSET		8	/* Vertical Back Porch */
++#define		ATMEL_LCDC_VBP		(0xff <<  ATMEL_LCDC_VBP_OFFSET)
++#define		ATMEL_LCDC_VPW_OFFSET		16	/* Vertical Synchronization Pulse Width */
++#define		ATMEL_LCDC_VPW		(0x3f << ATMEL_LCDC_VPW_OFFSET)
++#define		ATMEL_LCDC_VHDLY_OFFSET		24	/* Vertical to Horizontal Delay */
++#define		ATMEL_LCDC_VHDLY	(0xf  << ATMEL_LCDC_VHDLY_OFFSET)
++
++#define ATMEL_LCDC_TIM2		0x080c		/* LCD Timing Register 2 */
++#define		ATMEL_LCDC_HBP		(0xff  <<  0)	/* Horizontal Back Porch */
++#define		ATMEL_LCDC_HPW_OFFSET		8	/* Horizontal Synchronization Pulse Width */
++#define		ATMEL_LCDC_HPW		(0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
++#define		ATMEL_LCDC_HFP_OFFSET		21	/* Horizontal Front Porch */
++#define		ATMEL_LCDC_HFP		(0x7ff << ATMEL_LCDC_HFP_OFFSET)
++
++#define ATMEL_LCDC_LCDFRMCFG	0x0810		/* LCD Frame Configuration Register */
++#define		ATMEL_LCDC_LINEVAL	(0x7ff <<  0)	/* Vertical Size of LCD Module */
++#define		ATMEL_LCDC_HOZVAL_OFFSET	21	/* Horizontal Size of LCD Module */
++#define		ATMEL_LCDC_HOZVAL	(0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
++
++#define ATMEL_LCDC_FIFO		0x0814		/* LCD FIFO Register */
++#define		ATMEL_LCDC_FIFOTH	(0xffff)	/* FIFO Threshold */
++
++#define ATMEL_LCDC_MVAL		0x0818		/* LCD Mode Toggle Rate Value Register */
++
++#define ATMEL_LCDC_DP1_2		0x081c		/* Dithering Pattern DP1_2 Register */
++#define ATMEL_LCDC_DP4_7		0x0820		/* Dithering Pattern DP4_7 Register */
++#define ATMEL_LCDC_DP3_5		0x0824		/* Dithering Pattern DP3_5 Register */
++#define ATMEL_LCDC_DP2_3		0x0828		/* Dithering Pattern DP2_3 Register */
++#define ATMEL_LCDC_DP5_7		0x082c		/* Dithering Pattern DP5_7 Register */
++#define ATMEL_LCDC_DP3_4		0x0830		/* Dithering Pattern DP3_4 Register */
++#define ATMEL_LCDC_DP4_5		0x0834		/* Dithering Pattern DP4_5 Register */
++#define ATMEL_LCDC_DP6_7		0x0838		/* Dithering Pattern DP6_7 Register */
++#define		ATMEL_LCDC_DP1_2_VAL	(0xff)
++#define		ATMEL_LCDC_DP4_7_VAL	(0xfffffff)
++#define		ATMEL_LCDC_DP3_5_VAL	(0xfffff)
++#define		ATMEL_LCDC_DP2_3_VAL	(0xfff)
++#define		ATMEL_LCDC_DP5_7_VAL	(0xfffffff)
++#define		ATMEL_LCDC_DP3_4_VAL	(0xffff)
++#define		ATMEL_LCDC_DP4_5_VAL	(0xfffff)
++#define		ATMEL_LCDC_DP6_7_VAL	(0xfffffff)
++
++#define ATMEL_LCDC_PWRCON	0x083c		/* Power Control Register */
++#define		ATMEL_LCDC_PWR		(1    <<  0)	/* LCD Module Power Control */
++#define		ATMEL_LCDC_GUARDT_OFFSET	1	/* Delay in Frame Period */
++#define		ATMEL_LCDC_GUARDT	(0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
++#define		ATMEL_LCDC_BUSY		(1    << 31)	/* LCD Busy */
++
++#define ATMEL_LCDC_CONTRAST_CTR	0x0840		/* Contrast Control Register */
++#define		ATMEL_LCDC_PS		(3 << 0)	/* Contrast Counter Prescaler */
++#define			ATMEL_LCDC_PS_DIV1		(0 << 0)
++#define			ATMEL_LCDC_PS_DIV2		(1 << 0)
++#define			ATMEL_LCDC_PS_DIV4		(2 << 0)
++#define			ATMEL_LCDC_PS_DIV8		(3 << 0)
++#define		ATMEL_LCDC_POL		(1 << 2)	/* Polarity of output Pulse */
++#define			ATMEL_LCDC_POL_NEGATIVE		(0 << 2)
++#define			ATMEL_LCDC_POL_POSITIVE		(1 << 2)
++#define		ATMEL_LCDC_ENA		(1 << 3)	/* PWM generator Control */
++#define			ATMEL_LCDC_ENA_PWMDISABLE	(0 << 3)
++#define			ATMEL_LCDC_ENA_PWMENABLE	(1 << 3)
++
++#define ATMEL_LCDC_CONTRAST_VAL	0x0844		/* Contrast Value Register */
++#define		ATMEL_LCDC_CVAL	(0xff)		/* PWM compare value */
++
++#define ATMEL_LCDC_IER		0x0848		/* Interrupt Enable Register */
++#define ATMEL_LCDC_IDR		0x084c		/* Interrupt Disable Register */
++#define ATMEL_LCDC_IMR		0x0850		/* Interrupt Mask Register */
++#define ATMEL_LCDC_ISR		0x0854		/* Interrupt Status Register */
++#define ATMEL_LCDC_ICR		0x0858		/* Interrupt Clear Register */
++#define		ATMEL_LCDC_LNI		(1 << 0)	/* Line Interrupt */
++#define		ATMEL_LCDC_LSTLNI	(1 << 1)	/* Last Line Interrupt */
++#define		ATMEL_LCDC_EOFI		(1 << 2)	/* DMA End Of Frame Interrupt */
++#define		ATMEL_LCDC_UFLWI	(1 << 4)	/* FIFO Underflow Interrupt */
++#define		ATMEL_LCDC_OWRI		(1 << 5)	/* FIFO Overwrite Interrupt */
++#define		ATMEL_LCDC_MERI		(1 << 6)	/* DMA Memory Error Interrupt */
++
++#define ATMEL_LCDC_LUT_(n)	(0x0c00 + ((n)*4))	/* Palette Entry 0..255 */
++
++#endif /* __ATMEL_LCDC_H__ */
+diff -urN linux-2.6.20.4-0rig/MAINTAINERS linux-2.6.20.4-atmel/MAINTAINERS
+--- linux-2.6.20.4-0rig/MAINTAINERS	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/MAINTAINERS	2007-03-24 16:43:49.000000000 +0100
+@@ -602,6 +602,11 @@
+ M:	hskinnemoen@atmel.com
+ S:	Supported
+ 
++ATMEL SPI DRIVER
++P:	Haavard Skinnemoen
++M:	hskinnemoen@atmel.com
++S:	Supported
++
+ ATMEL WIRELESS DRIVER
+ P:	Simon Kelley
+ M:	simon@thekelleys.org.uk
+diff -urN linux-2.6.20.4-0rig/scripts/checkstack.pl linux-2.6.20.4-atmel/scripts/checkstack.pl
+--- linux-2.6.20.4-0rig/scripts/checkstack.pl	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/scripts/checkstack.pl	2007-03-24 16:42:29.000000000 +0100
+@@ -12,6 +12,7 @@
+ #	sh64 port by Paul Mundt
+ #	Random bits by Matt Mackall <mpm@selenic.com>
+ #	M68k port by Geert Uytterhoeven and Andreas Schwab
++#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
+ #
+ #	Usage:
+ #	objdump -d vmlinux | stackcheck.pl [arch]
+@@ -37,6 +38,10 @@
+ 	if ($arch eq 'arm') {
+ 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
+ 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
++	} elsif ($arch eq 'avr32') {
++		#8000008a:       20 1d           sub sp,4
++		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
++		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
+ 	} elsif ($arch =~ /^i[3456]86$/) {
+ 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
+ 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
+diff -urN linux-2.6.20.4-0rig/sound/avr32/ac97c.c linux-2.6.20.4-atmel/sound/avr32/ac97c.c
+--- linux-2.6.20.4-0rig/sound/avr32/ac97c.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/avr32/ac97c.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,1250 @@
++/*
++ * Driver for the Atmel AC97 Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#ifndef SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++#include <sound/memalloc.h>
++#endif
++
++#include <asm/io.h>
++
++#include "ac97c.h"
++
++static DEFINE_MUTEX(opened_mutex);
++
++/* module parameters */
++static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
++static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
++static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
++
++module_param_array(index, int, NULL, 0444);
++MODULE_PARM_DESC(index, "Index value for AC97 controller");
++module_param_array(id, charp, NULL, 0444);
++MODULE_PARM_DESC(id, "ID string for AC97 controller");
++module_param_array(enable, bool, NULL, 0444);
++MODULE_PARM_DESC(enable, "Enable AC97 controller");
++
++#ifndef CONFIG_SND_ATMEL_AC97C_USE_PDC
++#include <asm/dma-controller.h>
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++#endif
++
++
++typedef struct atmel_ac97 {
++	spinlock_t lock;
++	void __iomem *regs;
++	int period;
++
++	snd_pcm_substream_t *playback_substream;
++	snd_pcm_substream_t *capture_substream;
++	snd_card_t *card;
++	snd_pcm_t *pcm;
++	ac97_t *ac97;
++	ac97_bus_t *ac97_bus;
++	int irq;
++	int opened;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++        struct atmel_ac97_dma_info dma;
++} atmel_ac97_t;
++#define get_chip(card) ((atmel_ac97_t *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/* PCM part */
++
++static snd_pcm_hardware_t snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  |SNDRV_PCM_INFO_MMAP
++				  |SNDRV_PCM_INFO_MMAP_VALID
++				  |SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  |SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE|SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	.period_bytes_max	= 64*1024,
++#else
++	.period_bytes_max	= 4095,
++#endif
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static snd_pcm_hardware_t snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  |SNDRV_PCM_INFO_MMAP
++				  |SNDRV_PCM_INFO_MMAP_VALID
++				  |SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  |SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE|SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	.period_bytes_max	= 64*1024,
++#else
++	.period_bytes_max	= 4095,
++#endif
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/* Joint full duplex variables */
++unsigned int hw_rates[1];
++unsigned int hw_formats[1];
++struct snd_pcm_hw_constraint_list hw_constraint_rates;
++struct snd_pcm_hw_constraint_list hw_constraint_formats;
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	snd_pcm_runtime_t *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL<<chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	snd_pcm_runtime_t *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL<<chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_params(snd_pcm_substream_t *substream,
++				    snd_pcm_hw_params_t *hw_params)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++#ifdef SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++	int err;
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return err;
++#else
++	int pg;
++	size_t size = params_buffer_bytes(hw_params);
++	struct snd_pcm_runtime *runtime;
++	struct snd_dma_buffer *dmab = NULL;
++
++	substream->dma_buffer.dev.type = SNDRV_DMA_TYPE_DEV;
++	snd_assert(substream != NULL, return -EINVAL);
++	runtime = substream->runtime;
++	snd_assert(runtime != NULL, return -EINVAL);
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	/* check if buffer is already allocated */
++	if (runtime->dma_buffer_p) {
++		size_t size_previouse;
++		int pg_previouse;
++
++		/* new buffer is smaler than previouse allocated buffer */
++		if (runtime->dma_buffer_p->bytes >= size) {
++			runtime->dma_bytes = size;
++			return 0; /* don't change buffer size */
++		}
++
++		size_previouse = runtime->dma_buffer_p->bytes;
++		pg_previouse = get_order(size_previouse);
++
++		dma_free_coherent(runtime->dma_buffer_p->dev.dev,
++				PAGE_SIZE << pg_previouse,
++				runtime->dma_buffer_p->area,
++				runtime->dma_buffer_p->addr);
++
++		kfree(runtime->dma_buffer_p);
++	}
++
++	dmab = kzalloc(sizeof(*dmab), GFP_KERNEL);
++	if (!dmab)
++		return -ENOMEM;
++
++	dmab->dev = substream->dma_buffer.dev;
++	dmab->bytes = 0;
++
++	pg = get_order(size);
++
++	dmab->area = dma_alloc_coherent(
++			substream->dma_buffer.dev.dev,
++			PAGE_SIZE << pg,
++			(dma_addr_t *)&dmab->addr,
++			GFP_KERNEL);
++
++	if (!dmab->area) {
++		kfree(dmab);
++		return -ENOMEM;
++	}
++
++	dmab->bytes = size;
++
++	snd_pcm_set_runtime_buffer(substream, dmab);
++	runtime->dma_bytes = size;
++	return 1;
++#endif
++}
++
++static int snd_atmel_ac97_capture_hw_params(snd_pcm_substream_t *substream,
++				    snd_pcm_hw_params_t *hw_params)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++#ifdef SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++	int err;
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return err;
++#else
++	int pg;
++	size_t size = params_buffer_bytes(hw_params);
++	struct snd_pcm_runtime *runtime;
++	struct snd_dma_buffer *dmab = NULL;
++
++	substream->dma_buffer.dev.type = SNDRV_DMA_TYPE_DEV;
++	snd_assert(substream != NULL, return -EINVAL);
++	runtime = substream->runtime;
++	snd_assert(runtime != NULL, return -EINVAL);
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	/* check if buffer is already allocated */
++	if (runtime->dma_buffer_p) {
++		size_t size_previouse;
++		int pg_previouse;
++
++		/* new buffer is smaler than previouse allocated buffer */
++		if (runtime->dma_buffer_p->bytes >= size) {
++			runtime->dma_bytes = size;
++			return 0; /* don't change buffer size */
++		}
++
++		size_previouse = runtime->dma_buffer_p->bytes;
++		pg_previouse = get_order(size_previouse);
++
++		dma_free_coherent(runtime->dma_buffer_p->dev.dev,
++				PAGE_SIZE << pg_previouse,
++				runtime->dma_buffer_p->area,
++				runtime->dma_buffer_p->addr);
++
++		kfree(runtime->dma_buffer_p);
++	}
++
++	dmab = kzalloc(sizeof(*dmab), GFP_KERNEL);
++	if (!dmab)
++		return -ENOMEM;
++
++	dmab->dev = substream->dma_buffer.dev;
++	dmab->bytes = 0;
++
++	pg = get_order(size);
++
++	dmab->area = dma_alloc_coherent(
++			substream->dma_buffer.dev.dev,
++			PAGE_SIZE << pg,
++			(dma_addr_t *)&dmab->addr,
++			GFP_KERNEL);
++
++	if (!dmab->area) {
++		kfree(dmab);
++		return -ENOMEM;
++	}
++
++	dmab->bytes = size;
++
++	snd_pcm_set_runtime_buffer(substream, dmab);
++	runtime->dma_bytes = size;
++	return 1;
++#endif
++}
++
++static int snd_atmel_ac97_playback_hw_free(snd_pcm_substream_t *substream)
++{
++#ifdef SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++	return snd_pcm_lib_free_pages(substream);
++#else
++	int pg;
++	struct snd_pcm_runtime *runtime;
++	struct snd_dma_buffer *dmab = NULL;
++
++	snd_assert(substream != NULL, return -EINVAL);
++	runtime = substream->runtime;
++	snd_assert(runtime != NULL, return -EINVAL);
++	dmab = runtime->dma_buffer_p;
++
++	if (!dmab)
++		return 0;
++
++	if (!dmab->area)
++		return 0;
++
++	pg = get_order(dmab->bytes);
++	dma_free_coherent(dmab->dev.dev, PAGE_SIZE << pg, dmab->area, dmab->addr);
++	kfree(runtime->dma_buffer_p);
++	snd_pcm_set_runtime_buffer(substream, NULL);
++	return 0;
++#endif
++}
++
++static int snd_atmel_ac97_capture_hw_free(snd_pcm_substream_t *substream)
++{
++
++#ifdef SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++	return snd_pcm_lib_free_pages(substream);
++#else
++	int pg;
++	struct snd_pcm_runtime *runtime;
++	struct snd_dma_buffer *dmab = NULL;
++
++	snd_assert(substream != NULL, return -EINVAL);
++	runtime = substream->runtime;
++	snd_assert(runtime != NULL, return -EINVAL);
++	dmab = runtime->dma_buffer_p;
++
++	if (!dmab)
++		return 0;
++
++	if (!dmab->area)
++		return 0;
++
++	pg = get_order(dmab->bytes);
++	dma_free_coherent(dmab->dev.dev, PAGE_SIZE << pg, dmab->area, dmab->addr);
++	kfree(runtime->dma_buffer_p);
++	snd_pcm_set_runtime_buffer(substream, NULL);
++	return 0;
++#endif
++}
++
++static int snd_atmel_ac97_playback_prepare(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	snd_pcm_runtime_t *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++        case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++        default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++        word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++        switch (runtime->format){
++        case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++        case SNDRV_PCM_FORMAT_S16_BE:
++        default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++        }
++
++	ac97c_writel(chip, CAMR, word);
++
++        /* Set variable rate if needed */
++        if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++        } else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++        }
++
++        /* Set rate */
++        snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	/* Initialize and start the PDC */
++        ac97c_writel(chip, CATPR, runtime->dma_addr);
++	ac97c_writel(chip, CATCR, block_size / 4);
++	ac97c_writel(chip, CATNPR, runtime->dma_addr + block_size);
++	ac97c_writel(chip, CATNCR, block_size / 4);
++	ac97c_writel(chip, PTCR, PDC_PTCR_TXTEN);
++	/* Enable Channel A interrupts */
++	ac97c_writel(chip, IER, AC97C_SR_CAEVT);
++#else
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++        chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++        chip->dma.req_tx.buffer_start = runtime->dma_addr;
++        chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++        chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++        chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++        chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++        chip->dma.req_tx.dev_id = chip;
++#endif
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	snd_pcm_runtime_t *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++        case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++        case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++        word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	/* Initialize and start the PDC */
++	ac97c_writel(chip, CARPR, runtime->dma_addr);
++	ac97c_writel(chip, CARCR, block_size / 4);
++	ac97c_writel(chip, CARNPR, runtime->dma_addr + block_size);
++	ac97c_writel(chip, CARNCR, block_size / 4);
++	ac97c_writel(chip, PTCR, PDC_PTCR_RXEN);
++	/* Enable Channel A interrupts */
++	ac97c_writel(chip, IER, AC97C_SR_CAEVT);
++#else
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++#endif
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_trigger(snd_pcm_substream_t *substream, int cmd)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= (AC97C_CMR_CENA
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++				|AC97C_CMR_TXRDY
++#endif
++			);
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1) {
++			camr &= ~(AC97C_CMR_CENA
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++					|AC97C_CMR_TXRDY
++#endif
++				 );
++		}
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++		else {
++			camr &= ~(AC97C_CMR_TXRDY);
++		}
++#endif
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++static int snd_atmel_ac97_capture_trigger(snd_pcm_substream_t *substream, int cmd)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= (AC97C_CMR_CENA
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++			 | AC97C_CMR_RXRDY
++#endif
++			);
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1) {
++			camr &= ~(AC97C_CMR_CENA
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++					| AC97C_CMR_RXRDY
++#endif
++				 );
++		}
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++		else {
++			  camr &= ~(AC97C_CSR_RXRDY);
++		}
++#endif
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++static snd_pcm_uframes_t snd_atmel_ac97_playback_pointer(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	snd_pcm_runtime_t *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	bytes = ac97c_readl(chip, CATPR) - runtime->dma_addr;
++#else
++        bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++#endif
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++static snd_pcm_uframes_t snd_atmel_ac97_capture_pointer(snd_pcm_substream_t *substream)
++{
++	atmel_ac97_t *chip = snd_pcm_substream_chip(substream);
++	snd_pcm_runtime_t *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	bytes = ac97c_readl(chip, CARPR) - runtime->dma_addr;
++#else
++        bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,chip->dma.req_rx.req.channel) -
++			runtime->dma_addr);
++#endif
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static snd_pcm_ops_t atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static snd_pcm_ops_t atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(atmel_ac97_t *chip)
++{
++	snd_pcm_t *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++#ifdef SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++					      &chip->pdev->dev,
++					      128 * 1024, 128 * 1024);
++#endif
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/* Mixer part */
++static int snd_atmel_ac97_mixer_new(atmel_ac97_t *chip)
++{
++	int err;
++	ac97_template_t template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++static irqreturn_t snd_atmel_ac97_interrupt(int irq, void *dev_id,
++					    struct pt_regs *regs)
++{
++	atmel_ac97_t *chip = dev_id;
++	unsigned long status;
++
++	status = ac97c_readl(chip, SR);
++
++	if (status & AC97C_SR_CAEVT) {
++		snd_pcm_runtime_t *runtime;
++		int offset, next_period, block_size;
++		unsigned long casr;
++
++		/* FIXME: separate playback from capture */
++		runtime = chip->playback_substream->runtime;
++		block_size = frames_to_bytes(runtime, runtime->period_size);
++
++		casr = ac97c_readl(chip, CASR);
++
++		if (casr & AC97C_CSR_ENDTX) {
++			chip->period++;
++			if (chip->period == runtime->periods)
++				chip->period = 0;
++			next_period = chip->period + 1;
++			if (next_period == runtime->periods)
++				next_period = 0;
++
++			offset = block_size * next_period;
++
++			ac97c_writel(chip, CATNPR,
++				     runtime->dma_addr + offset);
++			ac97c_writel(chip, CATNCR, block_size / 4);
++
++			snd_pcm_period_elapsed(chip->playback_substream);
++		}
++		else if (casr & AC97C_CSR_ENDRX) {
++			chip->period++;
++			if (chip->period == runtime->periods)
++				chip->period = 0;
++			next_period = chip->period + 1;
++			if (next_period == runtime->periods)
++				next_period = 0;
++
++			offset = block_size * next_period;
++
++			ac97c_writel(chip, CARNPR,
++				     runtime->dma_addr + offset);
++			ac97c_writel(chip, CARNCR, block_size / 4);
++
++			snd_pcm_period_elapsed(chip->capture_substream);
++		} else {
++			snd_printk(KERN_INFO
++			       "atmel-ac97: spurious interrupt, status = 0x%08lx\n",
++			       (unsigned long)casr);
++		}
++	} else {
++		snd_printk(KERN_INFO
++		       "atmel-ac97: spurious interrupt, status = 0x%08lx\n",
++		       status);
++	}
++
++	(volatile int)ac97c_readl(chip, SR);
++
++	return IRQ_HANDLED;
++}
++
++#else
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++
++	printk(KERN_WARNING
++	       "DMA Controller error, channel %d (AC97C)\n",
++	       req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	atmel_ac97_t *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++#endif
++
++/* CODEC part */
++
++static void snd_atmel_ac97_write(ac97_t *ac97, unsigned short reg,
++				 unsigned short val)
++{
++	atmel_ac97_t *chip = ac97->private_data;
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	snd_printk(KERN_WARNING "atmel-ac97: codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(ac97_t *ac97,
++					  unsigned short reg)
++{
++	atmel_ac97_t *chip = ac97->private_data;
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++                if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++                }
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0){
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	snd_printk(KERN_INFO "atmel-ac97: codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(atmel_ac97_t *chip)
++{
++	/* TODO: Perform hard reset of codec as well */
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(snd_card_t *card)
++{
++	atmel_ac97_t *chip = get_chip(card);
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	if (chip->irq != -1)
++		free_irq(chip->irq, chip);
++#endif
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++#ifndef CONFIG_SND_ATMEL_AC97C_USE_PDC
++        if (chip->dma.req_tx.req.dmac){
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				    chip->dma.req_tx.req.channel);
++        }
++        if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				    chip->dma.req_rx.req.channel);
++        }
++#endif
++}
++
++static int __devinit snd_atmel_ac97_create(snd_card_t *card,
++					   struct platform_device *pdev)
++{
++	static ac97_bus_ops_t ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	atmel_ac97_t *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	int irq;
++#endif
++        int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++#endif
++
++	mck = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++	chip->irq = -1;
++
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	err = request_irq(irq, snd_atmel_ac97_interrupt, 0,
++			  "ac97", chip);
++	if (err) {
++		snd_printk("unable to request IRQ%d\n", irq);
++		return err;
++	}
++	chip->irq = irq;
++#endif
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	snd_card_t *card;
++	atmel_ac97_t *chip;
++	int err;
++        int ch;
++
++	if (dev >= SNDRV_CARDS)
++		return -ENODEV;
++	if (!enable[dev]) {
++		dev++;
++		return -ENOENT;
++	}
++
++	err = -ENOMEM;
++
++	mutex_init(&opened_mutex);
++
++	card = snd_card_new(index[dev], id[dev], THIS_MODULE,
++			    sizeof(atmel_ac97_t));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++#ifndef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		printk(KERN_ERR
++		       "atmel-ac97c: No DMA controller for TX, aborting\n");
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		snd_printk(KERN_ERR
++		       "atmel-ac97c: No DMA controller available for RX, aborting\n");
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		printk(KERN_ERR
++		       "atmel-ac97c: Unable to allocate TX DMA channel, aborting\n");
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		snd_printk(KERN_ERR
++		       "atmel-ac97c: Unable to allocate RX DMA channel, aborting\n");
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++#endif
++
++	strcpy(card->driver, "ac97c");
++	strcpy(card->shortname, "Atmel-AC97");
++#ifdef CONFIG_SND_ATMEL_AC97C_USE_PDC
++	sprintf(card->longname, "Atmel AVR32 AC97 Controller at 0x%p, irq %i",
++		chip->regs, chip->irq);
++#else
++	sprintf(card->longname, "Atmel AVR32 AC97 Controller at 0x%p, dma rx %i and tx %i",
++		chip->regs, chip->dma.rx_periph_id, chip->dma.tx_periph_id);
++#endif
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	snd_card_t *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.probe		= snd_atmel_ac97_probe,
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "ac97c",
++	},
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_register(&atmel_ac97_driver);
++}
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++
++module_init(atmel_ac97_init);
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff -urN linux-2.6.20.4-0rig/sound/avr32/ac97c.h linux-2.6.20.4-atmel/sound/avr32/ac97c.h
+--- linux-2.6.20.4-0rig/sound/avr32/ac97c.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/avr32/ac97c.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff -urN linux-2.6.20.4-0rig/sound/avr32/at73c213.c linux-2.6.20.4-atmel/sound/avr32/at73c213.c
+--- linux-2.6.20.4-0rig/sound/avr32/at73c213.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/avr32/at73c213.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,1295 @@
++/*
++ * Driver for the at73c213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#undef DEBUG
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kmod.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <sound/initval.h>
++#include <sound/driver.h>
++#include <sound/control.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#ifndef SND_AT73C213_USE_ALSA_MALLOC_CALLS
++#include <sound/memalloc.h>
++#endif
++
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++#include <asm/processor.h>
++
++#include "at73c213.h"
++
++/* module parameters */
++static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
++static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
++static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
++
++/* Register defines */
++#define PIOA_BASE	0xFFE02800
++#define SSC0_BASE	0xFFE01C00
++#define PM_BASE		0xFFF00000
++
++#define PM_CKSEL	0x04
++#define PM_APBAMASK	0x10
++#define PM_GCCTRL	0x60
++
++#define PIO_PER		0x00
++#define PIO_PDR		0x04
++#define PIO_PUER	0x64
++#define PIO_ASR		0x70
++#define PIO_BSR		0x74
++
++#define SSC_CMR		0x04
++#define SSC_CR		0x00
++#define SSC_TCMR	0x18
++#define SSC_TFMR	0x1C
++
++/* SSC register definitions */
++#define SSC_CR		0x00
++#define SSC_CMR		0x04
++#define SSC_TCMR	0x18
++#define SSC_TFMR	0x1C
++#define SSC_THR		0x24
++#define SSC_SR		0x40
++#define SSC_IER		0x44
++#define SSC_IDR		0x48
++#define SSC_IMR		0x4C
++
++/* SSC fields definitions */
++#define SSC_CR_TXEN	0x00000100
++#define SSC_CR_TXDIS	0x00000200
++#define SSC_CR_SWRST	0x00008000
++
++/* SSC interrupt definitions */
++#define SSC0_IRQ	10
++#define SSC_INT_ENDTX	0x00000004
++#define SSC_INT_TXBUFE	0x00000008
++
++/* PDC register definitions */
++#define PDC_RPR		0x100
++#define PDC_RCR		0x104
++#define PDC_TPR		0x108
++#define PDC_TCR		0x10c
++#define PDC_RNPR	0x110
++#define PDC_RNCR	0x114
++#define PDC_TNPR	0x118
++#define PDC_TNCR	0x11c
++#define PDC_PTCR	0x120
++#define PDC_PTSR	0x124
++
++/* PDC fields definitions */
++#define PDC_PTCR_RXTEN	0x0001
++#define PDC_PTCR_RXTDIS	0x0002
++#define PDC_PTCR_TXTEN	0x0100
++#define PDC_PTCR_TXTDIS 0x0200
++
++static int bitrate;
++static int gclk_div;
++static int ssc_div;
++static int spi = 0;
++static int ssc = 1;
++
++module_param(spi, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
++MODULE_PARM_DESC(spi, "Which SPI interface to use to communicate with the at73c213");
++module_param(ssc, int, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
++MODULE_PARM_DESC(ssc, "Which SSC interface to use to communicate with the at73c213");
++
++/* Initial AT73C213 register values */
++static unsigned char snd_at73c213_original_image[18] =
++{
++	0x00,	/* 00 - CTRL    */
++	0x05,	/* 01 - LLIG    */
++	0x05,	/* 02 - RLIG    */
++	0x08,	/* 03 - LPMG    */
++	0x08,	/* 04 - RPMG    */
++	0x00,	/* 05 - LLOG    */
++	0x00,	/* 06 - RLOG    */
++	0x22,	/* 07 - OLC     */
++	0x09,	/* 08 - MC      */
++	0x00,	/* 09 - CSFC    */
++	0x00,	/* 0A - MISC    */
++	0x00,	/* 0B -         */
++	0x00,	/* 0C - PRECH   */
++	0x05,	/* 0D - AUXG    */
++	0x00,	/* 0E -         */
++	0x00,	/* 0F -         */
++	0x00,	/* 10 - RST     */
++	0x00,	/* 11 - PA_CTRL */
++};
++
++/* chip-specific data */
++struct snd_at73c213 {
++	snd_card_t		*card;
++	snd_pcm_t		*pcm;
++	snd_pcm_substream_t	*substream;
++	int			irq;
++	int			period;
++	void __iomem		*regs;
++	struct clk		*ssc_clk;
++	struct spi_device	*spi;
++	u8			spi_wbuffer[2];
++	u8			spi_rbuffer[2];
++	/* image of the SPI registers in AT73C213 */
++	u8			image[18];
++	spinlock_t		lock;
++	struct platform_device	*pdev;
++};
++
++#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
++
++static int
++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
++{
++	struct spi_message msg;
++	struct spi_transfer msg_xfer = {
++		.len		= 2,
++		.cs_change	= 0,
++	};
++
++	spi_message_init(&msg);
++
++	chip->spi_wbuffer[0] = reg;
++	chip->spi_wbuffer[1] = val;
++
++	msg_xfer.tx_buf = chip->spi_wbuffer;
++	msg_xfer.rx_buf = chip->spi_rbuffer;
++	spi_message_add_tail(&msg_xfer, &msg);
++
++	return spi_sync(chip->spi, &msg);
++}
++
++#define write_reg(_spi, reg, val)				\
++	do {							\
++		retval = snd_at73c213_write_reg(_spi, reg, val);	\
++		if (retval)					\
++			goto out;				\
++	} while (0)
++
++static snd_pcm_hardware_t snd_at73c213_playback_hw = {
++	.info		= SNDRV_PCM_INFO_INTERLEAVED |
++			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
++	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
++	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++	.rate_min	= 8000,  /* This will be overwritten with bitrate */
++	.rate_max	= 50000, /* This will be overwritten with bitrate */
++	.channels_min	= 2,
++	.channels_max	= 2,
++	.buffer_bytes_max = 64 * 1024 - 1,
++	.period_bytes_min = 512,
++	.period_bytes_max = 64 * 1024 - 1,
++	.periods_min	= 4,
++	.periods_max	= 1024,
++};
++
++/* calculate and set bitrate and divisions */
++static int snd_at73c213_set_bitrate_and_div(void)
++{
++	extern struct avr32_cpuinfo boot_cpu_data;
++	unsigned long pll0_hz, apba_hz;
++	unsigned long apba_realdiv, gclk_realdiv, ssc_realdiv, wanted_bitrate;
++	char cpusel, ahbsel, apbasel;
++	int regval;
++
++	regval = __raw_readl((void __iomem *)PM_BASE + PM_CKSEL);
++	wanted_bitrate = 48000;
++
++	cpusel = regval & 0x07;
++	ahbsel = (regval>>8) & 0x07;
++	apbasel = (regval>>16) & 0x07;
++
++	/* FIXME: Use the clk framework for this */
++	if ((regval&(1<<7)) != 0) {
++		pll0_hz = clk_get_rate(boot_cpu_data.clk)/(1<<(cpusel+1));
++	} else {
++		pll0_hz = clk_get_rate(boot_cpu_data.clk);
++	}
++
++	if ((regval&(1<<23)) != 0) {
++		apba_hz = pll0_hz/(1<<(apbasel+1));
++		apba_realdiv = (1<<(apbasel+1));
++	} else {
++		apba_hz = pll0_hz;
++		apba_realdiv = 1;
++	}
++
++calculate:
++	/* Adjust bitrate as close as possible to 48000 Hz */
++	gclk_realdiv = pll0_hz/(wanted_bitrate*256);
++	ssc_realdiv = 2 * apba_realdiv * gclk_realdiv;
++
++	if ((gclk_realdiv % 2) == 0)
++		goto setbitrates;
++
++	if(wanted_bitrate >= 22050 && wanted_bitrate <= 48000)
++		wanted_bitrate -= 50;
++	else if (wanted_bitrate < 22050)
++		wanted_bitrate = 48050;
++	else if (wanted_bitrate <= 50000)
++		wanted_bitrate += 50;
++	else {
++		printk(KERN_ERR "at73c213 could not set dividers for a valid bitrate\n");
++		return -EINVAL;
++	}
++
++	goto calculate;
++
++setbitrates:
++	bitrate = pll0_hz/(gclk_realdiv*256);
++	gclk_div = (gclk_realdiv/2)-1;
++	ssc_realdiv = 2*apba_realdiv*gclk_realdiv;
++	ssc_div = ssc_realdiv/(2*apba_realdiv);
++
++	printk(KERN_INFO "at73c213: bitrate is %d Hz\n", bitrate);
++
++	return 0;
++}
++
++/* open callback */
++static int snd_at73c213_pcm_open(snd_pcm_substream_t *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	snd_pcm_runtime_t *runtime = substream->runtime;
++
++	snd_at73c213_playback_hw.rate_min = bitrate;
++	snd_at73c213_playback_hw.rate_max = bitrate;
++	runtime->hw = snd_at73c213_playback_hw;
++	chip->substream = substream;
++
++	return 0;
++}
++
++/* close callback */
++static int snd_at73c213_pcm_close(snd_pcm_substream_t *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	chip->substream = NULL;
++	return 0;
++}
++
++/* hw_params callback */
++static int snd_at73c213_pcm_hw_params(snd_pcm_substream_t *substream,
++				 snd_pcm_hw_params_t *hw_params)
++{
++#ifdef SND_AT73C213_USE_ALSA_MALLOC_CALLS
++	return snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++#else
++	int pg;
++	size_t size = params_buffer_bytes(hw_params);
++	struct snd_pcm_runtime *runtime;
++	struct snd_dma_buffer *dmab = NULL;
++
++	substream->dma_buffer.dev.type = SNDRV_DMA_TYPE_DEV;
++	snd_assert(substream != NULL, return -EINVAL);
++	runtime = substream->runtime;
++	snd_assert(runtime != NULL, return -EINVAL);
++
++	/* check if buffer is already allocated */
++	if (runtime->dma_buffer_p) {
++		size_t size_previouse;
++		int pg_previouse;
++
++		/* new buffer is smaler than previouse allocated buffer */
++		if (runtime->dma_buffer_p->bytes >= size) {
++			runtime->dma_bytes = size;
++			return 0; /* don't change buffer size */
++		}
++
++		size_previouse = runtime->dma_buffer_p->bytes;
++		pg_previouse = get_order(size_previouse);
++
++		dma_free_coherent(runtime->dma_buffer_p->dev.dev,
++				PAGE_SIZE << pg_previouse,
++				runtime->dma_buffer_p->area,
++				runtime->dma_buffer_p->addr);
++
++		kfree(runtime->dma_buffer_p);
++	}
++
++	dmab = kzalloc(sizeof(*dmab), GFP_KERNEL);
++	if (!dmab)
++		return -ENOMEM;
++
++	dmab->dev = substream->dma_buffer.dev;
++	dmab->bytes = 0;
++
++	pg = get_order(size);
++
++	dmab->area = dma_alloc_coherent(
++			substream->dma_buffer.dev.dev,
++			PAGE_SIZE << pg,
++			(dma_addr_t *)&dmab->addr,
++			GFP_KERNEL);
++
++	if (!dmab->area) {
++		kfree(dmab);
++		return -ENOMEM;
++	}
++
++	dmab->bytes = size;
++	snd_pcm_set_runtime_buffer(substream, dmab);
++	runtime->dma_bytes = size;
++	return 1;
++#endif
++}
++
++/* hw_free callback */
++static int snd_at73c213_pcm_hw_free(snd_pcm_substream_t *substream)
++{
++#ifdef SND_AT73C213_USE_ALSA_MALLOC_CALLS
++	return snd_pcm_lib_free_pages(substream);
++#else
++	int pg;
++	struct snd_pcm_runtime *runtime;
++	struct snd_dma_buffer *dmab = NULL;
++
++	snd_assert(substream != NULL, return -EINVAL);
++	runtime = substream->runtime;
++	snd_assert(runtime != NULL, return -EINVAL);
++	dmab = runtime->dma_buffer_p;
++
++	if (!dmab)
++		return 0;
++
++	if (!dmab->area)
++		return 0;
++
++	pg = get_order(dmab->bytes);
++	dma_free_coherent(dmab->dev.dev, PAGE_SIZE << pg, dmab->area, dmab->addr);
++	kfree(runtime->dma_buffer_p);
++	snd_pcm_set_runtime_buffer(substream, NULL);
++	return 0;
++#endif
++}
++
++/* prepare callback */
++static int snd_at73c213_pcm_prepare(snd_pcm_substream_t *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	snd_pcm_runtime_t *runtime = substream->runtime;
++	int block_size;
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++
++	chip->period = 0;
++
++	/* Make sure that our data are actually readable by the SSC */
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size, DMA_TO_DEVICE);
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr + block_size,
++			block_size, DMA_TO_DEVICE);
++
++	__raw_writel(runtime->dma_addr, chip->regs + PDC_TPR);
++	__raw_writel(runtime->period_size * 2, chip->regs + PDC_TCR);
++	__raw_writel(runtime->dma_addr + block_size, chip->regs + PDC_TNPR);
++	__raw_writel(runtime->period_size * 2, chip->regs + PDC_TNCR);
++
++	return 0;
++}
++
++/* trigger callback */
++static int snd_at73c213_pcm_trigger(snd_pcm_substream_t *substream,
++				   int cmd)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	int retval = 0;
++	int flags = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		__raw_writel(SSC_INT_ENDTX, chip->regs + SSC_IER);
++		__raw_writel(PDC_PTCR_TXTEN, chip->regs + PDC_PTCR);
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		__raw_writel(PDC_PTCR_TXTDIS, chip->regs + PDC_PTCR);
++		__raw_writel(SSC_INT_ENDTX, chip->regs + SSC_IDR);
++		break;
++	default:
++		printk(KERN_WARNING "at73c213: spuriouse command %x\n", cmd);
++		retval = -EINVAL;
++		break;
++	}
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return retval;
++}
++
++/* pointer callback */
++static snd_pcm_uframes_t snd_at73c213_pcm_pointer(snd_pcm_substream_t *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	snd_pcm_runtime_t *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = __raw_readl(chip->regs + PDC_TPR) - runtime->dma_addr;
++
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++/* operators */
++static snd_pcm_ops_t at73c213_playback_ops = {
++	.open		= snd_at73c213_pcm_open,
++	.close		= snd_at73c213_pcm_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_at73c213_pcm_hw_params,
++	.hw_free	= snd_at73c213_pcm_hw_free,
++	.prepare	= snd_at73c213_pcm_prepare,
++	.trigger	= snd_at73c213_pcm_trigger,
++	.pointer	= snd_at73c213_pcm_pointer,
++};
++
++/* free a pcm device */
++static void snd_at73c213_pcm_free(snd_pcm_t *pcm)
++{
++	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
++	if (chip->pcm != 0 ) {
++#ifdef SND_AT73C213_USE_ALSA_MALLOC_CALLS
++		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
++#endif
++		chip->pcm = NULL;
++	}
++}
++
++/* create a new pcm device */
++static int __devinit snd_at73c213_new_pcm(struct snd_at73c213 *chip, int device)
++{
++	snd_pcm_t *pcm;
++	int retval;
++
++	retval = snd_pcm_new(chip->card, chip->card->shortname, device, 1, 0, &pcm);
++	if (retval < 0)
++		return retval;
++
++	pcm->private_data = chip;
++	pcm->private_free = snd_at73c213_pcm_free;
++	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
++	strcpy(pcm->name, "at73c213");
++	chip->pcm = pcm;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
++
++#ifdef SND_AT73C213_USE_ALSA_MALLOC_CALLS
++	snd_pcm_lib_preallocate_pages_for_all(chip->pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev, 64 * 1024, 64 * 1024);
++#endif
++
++	return 0;
++}
++
++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
++{
++	struct snd_at73c213 *chip = dev_id;
++	struct platform_device *pdev = chip->pdev;
++	snd_pcm_runtime_t *runtime = chip->substream->runtime;
++	u32 status;
++	int offset, next_period, block_size;
++
++	spin_lock(&chip->lock);
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++
++	status = __raw_readl(chip->regs + SSC_IMR);
++
++	if (status & SSC_INT_ENDTX) {
++		chip->period++;
++		if (chip->period == runtime->periods)
++			chip->period = 0;
++		next_period = chip->period + 1;
++		if (next_period == runtime->periods)
++			next_period = 0;
++
++		offset = block_size * next_period;
++
++		/* Make sure that our data are actually readable by the SSC */
++		dma_sync_single_for_device(&pdev->dev, runtime->dma_addr + offset,
++				block_size, DMA_TO_DEVICE);
++		__raw_writel(runtime->dma_addr + offset, chip->regs + PDC_TNPR);
++		__raw_writel(runtime->period_size * 2, chip->regs + PDC_TNCR);
++
++		if (next_period == 0) {
++			(void)__raw_readl(chip->regs + PDC_TPR);
++			(void)__raw_readl(chip->regs + PDC_TCR);
++		}
++	} else {
++		printk(KERN_WARNING
++		       "Spurious SSC interrupt, status = 0x%08lx\n",
++		       (unsigned long)status);
++		__raw_writel(status, chip->regs + SSC_IDR);
++	}
++
++	(void)__raw_readl(chip->regs + SSC_IMR);
++	spin_unlock(&chip->lock);
++
++	if (status & SSC_INT_ENDTX)
++		snd_pcm_period_elapsed(chip->substream);
++
++	return IRQ_HANDLED;
++}
++
++/*
++ * Mixer functions
++ */
++#if 0 /* Function not in use */
++static int snd_at73c213_mono_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	unsigned long mask = (kcontrol->private_value >> 16) & 0xff;
++
++	uinfo->type = (mask == 1) ?
++		SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
++
++	return 0;
++}
++#endif
++
++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	unsigned long flags;
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	unsigned long flags;
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	val = (ucontrol->value.integer.value[0] & mask);
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	val = (chip->image[reg] & ~(mask << shift)) | val;
++	change = val != chip->image[reg];
++	write_reg(chip, reg, val);
++
++	chip->image[reg] = val;
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	int mask = (kcontrol->private_value >> 24) & 0xFF;
++
++	uinfo->type = mask == 1 ?
++		SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	unsigned long flags;
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	ucontrol->value.integer.value[0] =
++		(chip->image[left_reg] >> shift_left) & mask;
++	ucontrol->value.integer.value[1] =
++		(chip->image[right_reg] >> shift_right) & mask;
++
++	if (invert) {
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++		ucontrol->value.integer.value[1] =
++			(mask - ucontrol->value.integer.value[1]);
++	}
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	unsigned long flags;
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++	int change, retval;
++	unsigned short val1, val2;
++
++	val1 = ucontrol->value.integer.value[0] & mask;
++	val2 = ucontrol->value.integer.value[1] & mask;
++	if (invert) {
++		val1 = mask - val1;
++		val2 = mask - val2;
++	}
++	val1 <<= shift_left;
++	val2 <<= shift_right;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
++	val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
++	change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
++	write_reg(chip, left_reg, val1);
++	write_reg(chip, right_reg, val2);
++
++	chip->image[left_reg] = val1;
++	chip->image[right_reg] = val2;
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	unsigned long flags;
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & 0x01;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(0x01 - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	unsigned long flags;
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	if (ucontrol->value.integer.value[0])
++		val = mask;
++	else
++		val = 0;
++
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irqsave(&chip->lock, flags);
++
++	val |= (chip->image[reg] & ~(mask << shift));
++	change = val != chip->image[reg];
++
++	write_reg(chip, reg, val);
++
++	chip->image[reg] = val;
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xFF) - 1;
++
++	return 0;
++}
++
++static int snd_at73c213_line_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++static int snd_at73c213_aux_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++#define AT73C213_MONO(xname, xindex, reg, shift, mask, invert) \
++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
++  .info = snd_at73c213_mono_info, \
++  .get = snd_at73c213_mono_get, .put = snd_at73c213_mono_put, \
++  .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
++
++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \
++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
++  .info = snd_at73c213_mono_switch_info, \
++  .get = snd_at73c213_mono_switch_get, .put = snd_at73c213_mono_switch_put, \
++  .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
++
++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
++  .info = snd_at73c213_stereo_info, \
++  .get = snd_at73c213_stereo_get, .put = snd_at73c213_stereo_put, \
++  .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
++
++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1F, 1),
++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1F, 1),
++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "PA Playback Volume",
++	.index	= 0,
++	.info	= snd_at73c213_pa_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= PA_CTRL|(PA_CTRL_APAGAIN<<8)|(0x0F<<16)|(1<<24),
++},
++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Aux Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_aux_capture_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= DAC_AUXG|(0<<8)|(0x1F<<16)|(1<<24),
++},
++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Line Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_line_capture_volume_info,
++	.get	= snd_at73c213_stereo_get,
++	.put	= snd_at73c213_stereo_put,
++	.private_value	= DAC_LLIG|(DAC_RLIG<<8)|(0<<16)|(0<<19)|(0x1F<<24)|(1<<22),
++},
++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
++};
++
++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
++{
++	struct snd_card *card;
++	int errval, idx;
++
++	if (chip == NULL || chip->pcm == NULL)
++		return -EINVAL;
++
++	card = chip->card;
++
++	strcpy(card->mixername, chip->pcm->name);
++
++	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
++		if ((errval = snd_ctl_add(card,
++				       snd_ctl_new1(&snd_at73c213_controls[idx],
++						    chip))) < 0)
++			return errval;
++	}
++
++	return 0;
++}
++
++/*
++ * Device functions
++ */
++static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
++{
++	int retval;
++	unsigned char dac_ctrl = 0;
++
++	/* XXX: Unmask the APB clock for SSC0 */
++	__raw_writel(__raw_readl((void __iomem *)PM_BASE + PM_APBAMASK)|(1<<7),
++			(void __iomem *)PM_BASE + PM_APBAMASK);
++
++	/* Wait for clock to be stable */
++	msleep(10);
++
++	retval = snd_at73c213_set_bitrate_and_div();
++	if (retval)
++		goto out;
++
++	/* Reset the SSC */
++	__raw_writel(SSC_CR_SWRST, chip->regs + SSC_CR);
++
++	/* Enable GCLK0 */
++	__raw_writel((1<<30), (void __iomem *)(PIOA_BASE + PIO_PDR));
++	__raw_writel((1<<30), (void __iomem *)(PIOA_BASE + PIO_ASR));
++	__raw_writel(((gclk_div<<8)|0x10|0x04|0x02), (void __iomem *)(PM_BASE + PM_GCCTRL));
++
++	/* Enable SSC and setup for I2S */
++	__raw_writel(ssc_div, chip->regs + SSC_CMR);
++
++	/* CKO, START, STTDLY, PERIOD */
++	__raw_writel((1<<2)|(4<<8)|(1<<16)|(15<<24), chip->regs + SSC_TCMR);
++
++	/* DATLEN, MSBF, DATNB, FSLEN, FSOS */
++	__raw_writel((15<<0)|(1<<7)|(1<<8)|(15<<16)|(1<<20), chip->regs + SSC_TFMR);
++
++	/* Initialize at73c213 on SPI bus */
++	/* Reset the device */
++	write_reg(chip, DAC_RST, 0x04);
++	msleep(1);
++	write_reg(chip, DAC_RST, 0x03);
++
++	/* Turn on precharge */
++	write_reg(chip, DAC_PRECH, 0xFF);
++	write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
++	write_reg(chip, DAC_CTRL, (1<<DAC_CTRL_ONLNOL)|(1<<DAC_CTRL_ONLNOR));
++
++	msleep(50);
++
++	/* Stop precharging PA */
++	write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0F);
++	chip->image[PA_CTRL] = (1<<PA_CTRL_APALP)|0x0F;
++
++	msleep(450);
++
++	/* Stop precharging, turn on master power */
++	write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
++	chip->image[DAC_PRECH] = (1<<DAC_PRECH_ONMSTR);
++
++	msleep(1);
++
++	/* Turn on DAC */
++	dac_ctrl = (1<<DAC_CTRL_ONDACL)|(1<<DAC_CTRL_ONDACR)|
++			(1<<DAC_CTRL_ONLNOL)|(1<<DAC_CTRL_ONLNOR);
++
++	write_reg(chip, DAC_CTRL, dac_ctrl);
++	chip->image[DAC_CTRL] = dac_ctrl;
++
++	/* Mute sound */
++	write_reg(chip, DAC_LMPG, 0x3F);
++	chip->image[DAC_LMPG] = 0x3F;
++	write_reg(chip, DAC_RMPG, 0x3F);
++	chip->image[DAC_RMPG] = 0x3F;
++	write_reg(chip, DAC_LLOG, 0x3F);
++	chip->image[DAC_LLOG] = 0x3F;
++	write_reg(chip, DAC_RLOG, 0x3F);
++	chip->image[DAC_RLOG] = 0x3F;
++	write_reg(chip, DAC_LLIG, 0x11);
++	chip->image[DAC_LLIG] = 0x11;
++	write_reg(chip, DAC_RLIG, 0x11);
++	chip->image[DAC_RLIG] = 0x11;
++	write_reg(chip, DAC_AUXG, 0x11);
++	chip->image[DAC_AUXG] = 0x11;
++
++	/* Turn on SSC transmitter */
++	__raw_writel(SSC_CR_TXEN, chip->regs + SSC_CR);
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_dev_free(snd_device_t *device)
++{
++	struct snd_at73c213 *chip = device->device_data;
++
++	if (chip->regs) {
++		__raw_writel(SSC_CR_TXDIS, chip->regs + SSC_CR);
++		iounmap(chip->regs);
++	}
++
++	if (chip->irq >= 0)
++		free_irq(chip->irq, chip);
++
++	if (chip->ssc_clk) {
++		clk_disable(chip->ssc_clk);
++		clk_put(chip->ssc_clk);
++	}
++
++	return 0;
++}
++
++static int __devinit snd_at73c213_create(snd_card_t *card,
++					 struct platform_device *pdev)
++{
++	static snd_device_ops_t ops = {
++		.dev_free	= snd_at73c213_dev_free,
++	};
++	struct snd_at73c213 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *ssc_clk;
++	int irq, retval;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	ssc_clk = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(ssc_clk))
++		return PTR_ERR(ssc_clk);
++	clk_enable(ssc_clk);
++	chip->ssc_clk = ssc_clk;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++	chip->irq = -1;
++
++	retval = -ENOMEM;
++
++	retval = spi_setup(chip->spi);
++	if (retval)
++		goto out;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		goto out;
++
++	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
++	if (retval) {
++		snd_printk("unable to request IRQ%d\n", irq);
++		goto out;
++	}
++	chip->irq = irq;
++
++	memcpy(&chip->image, &snd_at73c213_original_image,
++			sizeof(snd_at73c213_original_image));
++
++	retval = snd_at73c213_chip_init(chip);
++	if (retval)
++		goto out;
++
++	retval = snd_at73c213_new_pcm(chip, 0);
++	if (retval)
++		goto out;
++
++	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
++	if (retval)
++		goto out;
++
++	retval = snd_at73c213_mixer(chip);
++	if (retval)
++		goto out;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++out:
++	return retval;
++}
++
++static int __devinit snd_at73c213_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct spi_board_info *binfo;
++	struct spi_master *smaster;
++	struct snd_at73c213 *chip;
++	snd_card_t *card;
++	int retval;
++
++	if (dev >= SNDRV_CARDS)
++		return -ENODEV;
++	if (!enable[dev]) {
++		dev++;
++		return -ENOENT;
++	}
++
++	if (spi < 0 || ssc < 0)
++		return -ENODEV;
++
++	retval = -ENOMEM;
++	card = snd_card_new(index[dev], id[dev], THIS_MODULE,
++			    sizeof(struct snd_at73c213));
++	if (!card)
++		goto out;
++
++	chip = card->private_data;
++
++	retval = -ENODEV;
++
++	/* Get the SPI bus */
++	binfo = pdev->dev.platform_data;
++	if (!binfo) {
++		printk(KERN_WARNING "at73c213: could not get platform data\n");
++		goto out;
++	}
++
++	smaster = spi_busnum_to_master(spi);
++	if (!smaster) {
++		request_module("spi1");
++		smaster = spi_busnum_to_master(spi);
++		if (!smaster) {
++			printk(KERN_WARNING
++					"at73c213: could not get "
++					"SPI bus %d, remembered to load "
++					"the spi_atmel module?\n", spi);
++			goto out;
++		}
++	}
++
++	chip->spi = spi_new_device(smaster, binfo);
++	if (!chip->spi) {
++		printk(KERN_WARNING "at73c213: could not get SPI device %d\n", spi);
++		goto out;
++	}
++
++	chip->spi->mode = SPI_MODE_1;
++	chip->spi->bits_per_word = 8;
++
++	retval = snd_at73c213_create(card, pdev);
++	if (retval)
++		goto out_free_card;
++
++	strcpy(card->driver, "at73c213");
++	strcpy(card->shortname, "at73c213 (AVR32 STK1000)");
++	sprintf(card->longname, "%s at %p (irq %i)", card->shortname, chip->regs, chip->irq);
++
++	retval = snd_card_register(card);
++	if (retval)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return retval;
++}
++
++static int __devexit snd_at73c213_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct snd_at73c213 *chip = card->private_data;
++	int retval;
++
++	/* Stop playback */
++	__raw_writel(SSC_CR_TXDIS, chip->regs + SSC_CR);
++
++	/* Stop GLCK0 */
++	__raw_writel(0, (void __iomem *)PM_BASE + PM_GCCTRL);
++
++	/* Mute sound */
++	write_reg(chip, DAC_LMPG, 0x3F);
++	chip->image[DAC_LMPG] = 0x3F;
++	write_reg(chip, DAC_RMPG, 0x3F);
++	chip->image[DAC_RMPG] = 0x3F;
++	write_reg(chip, DAC_LLOG, 0x3F);
++	chip->image[DAC_LLOG] = 0x3F;
++	write_reg(chip, DAC_RLOG, 0x3F);
++	chip->image[DAC_RLOG] = 0x3F;
++	write_reg(chip, DAC_LLIG, 0x11);
++	chip->image[DAC_LLIG] = 0x11;
++	write_reg(chip, DAC_RLIG, 0x11);
++	chip->image[DAC_RLIG] = 0x11;
++	write_reg(chip, DAC_AUXG, 0x11);
++	chip->image[DAC_AUXG] = 0x11;
++
++	/* Turn off PA */
++	write_reg(chip, PA_CTRL, (chip->image[PA_CTRL]|0x0F));
++	chip->image[PA_CTRL] |= 0x0F;
++	msleep(10);
++	write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0F);
++	chip->image[PA_CTRL] = (1<<PA_CTRL_APALP)|0x0F;
++
++	/* Turn off external DAC */
++	write_reg(chip, DAC_CTRL, 0x0C);
++	chip->image[DAC_CTRL] = 0x0C;
++	msleep(2);
++	write_reg(chip, DAC_CTRL, 0x00);
++	chip->image[DAC_CTRL] = 0x00;
++
++	/* Turn off master power */
++	write_reg(chip, DAC_PRECH, 0x00);
++	chip->image[DAC_PRECH] = 0x00;
++
++	msleep(10);
++
++out:
++	if (chip->spi)
++		spi_unregister_device(chip->spi);
++
++	if (card) {
++		snd_card_free(card);
++		platform_set_drvdata(pdev, NULL);
++	}
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int snd_at73c213_suspend(struct platform_device *pdev, pm_message_t state, u32 level)
++{
++	struct snd_card *card = at32_get_drvdata(pdev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	printk(KERN_DEBUG "at73c213: suspending\n");
++
++	/* Stop SSC and GCLK0 */
++
++	spi_suspend(chip->spi, state);
++
++	return 0;
++}
++
++static int snd_at73c213_resume(struct platform_device *pdev, u32 level)
++{
++	struct snd_card *card = at32_get_drvdata(pdev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	printk(KERN_DEBUG "at73c213: resuming\n");
++
++	/* Start GLCK0 and SSC */
++
++	spi_resume(chip->spi);
++
++	return 0;
++}
++#endif /* CONFIG_PM */
++
++/* Driver core initialization */
++static struct platform_driver at73c213_driver = {
++	.probe		= snd_at73c213_probe,
++	.remove		= __devexit_p(snd_at73c213_remove),
++	.driver		= {
++		.name	= "at73c213",
++	}
++#ifdef CONFIG_PM
++	.resume		= snd_at73c213_resume,
++	.suspend	= snd_at73c213_suspend,
++#endif
++};
++
++static int __init at73c213_init(void)
++{
++	return platform_driver_register(&at73c213_driver);
++}
++
++static void __exit at73c213_exit(void)
++{
++	platform_driver_unregister(&at73c213_driver);
++}
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Sound driver for at73c213 on STK1000");
++MODULE_LICENSE("GPL");
++
++module_init(at73c213_init);
++module_exit(at73c213_exit);
++
+diff -urN linux-2.6.20.4-0rig/sound/avr32/at73c213.h linux-2.6.20.4-atmel/sound/avr32/at73c213.h
+--- linux-2.6.20.4-0rig/sound/avr32/at73c213.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/avr32/at73c213.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,120 @@
++/*
++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++
++#ifndef _SND_AT73C213_MIXER_H_
++#define _SND_AT73C213_MIXER_H_
++
++/* DAC control register */
++#define DAC_CTRL		0x00
++#define DAC_CTRL_ONPADRV	7
++#define DAC_CTRL_ONAUXIN	6
++#define DAC_CTRL_ONDACR		5
++#define DAC_CTRL_ONDACL		4
++#define DAC_CTRL_ONLNOR		3
++#define DAC_CTRL_ONLNOL		2
++#define DAC_CTRL_ONLNIR		1
++#define DAC_CTRL_ONLNIL		0
++
++/* DAC left line in gain register */
++#define DAC_LLIG		0x01
++#define DAC_LLIG_LLIG		0
++
++/* DAC right line in gain register */
++#define DAC_RLIG		0x02
++#define DAC_RLIG_RLIG		0
++
++/* DAC Left Master Playback Gain Register */
++#define DAC_LMPG		0x03
++#define DAC_LMPG_LMPG		0
++
++/* DAC Right Master Playback Gain Register */
++#define DAC_RMPG		0x04
++#define DAC_RMPG_RMPG		0
++
++/* DAC Left Line Out Gain Register */
++#define DAC_LLOG		0x05
++#define DAC_LLOG_LLOG		0
++
++/* DAC Right Line Out Gain Register */
++#define DAC_RLOG		0x06
++#define DAC_RLOG_RLOG		0
++
++/* DAC Output Level Control Register */
++#define DAC_OLC			0x07
++#define DAC_OLC_RSHORT		7
++#define DAC_OLC_ROLC		4
++#define DAC_OLC_LSHORT		3
++#define DAC_OLC_LOLC		0
++
++/* DAC Mixer Control Register */
++#define DAC_MC			0x08
++#define DAC_MC_INVR		5
++#define DAC_MC_INVL		4
++#define DAC_MC_RMSMIN2		3
++#define DAC_MC_RMSMIN1		2
++#define DAC_MC_LMSMIN2		1
++#define DAC_MC_LMSMIN1		0
++
++/* DAC Clock and Sampling Frequency Control Register */
++#define DAC_CSFC		0x09
++#define DAC_CSFC_OVRSEL		4
++
++/* DAC Miscellaneous Register */
++#define DAC_MISC		0x0A
++#define DAC_MISC_VCMCAPSEL	7
++#define DAC_MISC_DINTSEL	4
++#define DAC_MISC_DITHEN		3
++#define DAC_MISC_DEEMPEN	2
++#define DAC_MISC_NBITS		0
++
++/* DAC Precharge Control Register */
++#define DAC_PRECH		0x0C
++#define DAC_PRECH_PRCHGPDRV	7
++#define DAC_PRECH_PRCHGAUX1	6
++#define DAC_PRECH_PRCHGLNOR	5
++#define DAC_PRECH_PRCHGLNOL	4
++#define DAC_PRECH_PRCHGLNIR	3
++#define DAC_PRECH_PRCHGLNIL	2
++#define DAC_PRECH_PRCHG		1
++#define DAC_PRECH_ONMSTR	0
++
++/* DAC Auxiliary Input Gain Control Register */
++#define DAC_AUXG		0x0D
++#define DAC_AUXG_AUXG		0
++
++/* DAC Reset Register */
++#define DAC_RST			0x10
++#define DAC_RST_RESMASK		2
++#define DAC_RST_RESFILZ		1
++#define DAC_RST_RSTZ		0
++
++/* Power Amplifier Control Register */
++#define PA_CTRL			0x11
++#define PA_CTRL_APAON		6
++#define PA_CTRL_APAPRECH	5
++#define PA_CTRL_APALP		4
++#define PA_CTRL_APAGAIN		0
++
++#endif
++
+diff -urN linux-2.6.20.4-0rig/sound/avr32/Kconfig linux-2.6.20.4-atmel/sound/avr32/Kconfig
+--- linux-2.6.20.4-0rig/sound/avr32/Kconfig	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/avr32/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,51 @@
++# ALSA AVR32 drivers
++
++menu "ALSA AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	depends on SND
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++config SND_ATMEL_AC97_USE_ALSA_MALLOC_CALLS
++	bool "Use the built-in malloc calls in the alsa driver"
++	default n
++	depends on SND_ATMEL_AC97
++	help
++	  Say Y if the built-in malloc calls in the alsa driver should be
++	  used instead of the native dma_alloc_coherent and dma_free_coherent
++	  function calls. Enabling this feature may break the rmmod feature.
++
++config SND_ATMEL_AC97C_USE_PDC
++	bool "Use PDC for DMA transfers to/from the Atmel AC97 Controller"
++	default n
++	depends on SND_ATMEL_AC97
++	help
++	  Say Y if PDC (Peripheral DMA Controller) is used for DMA transfers
++	  to/from the Atmel AC97C instead of using the generic DMA framework.
++
++config SND_AT73C213
++	tristate "Atmel AT73C213 DAC driver"
++	depends on SND && SPI_ATMEL
++	select SND_PCM
++	help
++	  Say Y here if you want to use the Atmel AT73C213 external
++	  DAC on the ATSTK1000 development board.
++
++	  To compile this driver as a module, choose M here: the
++	  module will be called snd-at73c213.
++
++config SND_AT73C213_USE_ALSA_MALLOC_CALLS
++	bool "Use the built-in malloc calls in the alsa driver"
++	default n
++	depends on SND_AT73C213
++	help
++	  Say Y if the built-in malloc calls in the alsa driver should be
++	  used instead of the native dma_alloc_coherent and dma_free_coherent
++	  function calls. Enabling this feature may brake the rmmod feature.
++
++endmenu
+diff -urN linux-2.6.20.4-0rig/sound/avr32/Makefile linux-2.6.20.4-atmel/sound/avr32/Makefile
+--- linux-2.6.20.4-0rig/sound/avr32/Makefile	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/avr32/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,9 @@
++#
++# Makefile for ALSA
++#
++
++snd-atmel-ac97-objs		:= ac97c.o
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
++
++snd-at73c213-objs		:= at73c213.o
++obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
+diff -urN linux-2.6.20.4-0rig/sound/Kconfig linux-2.6.20.4-atmel/sound/Kconfig
+--- linux-2.6.20.4-0rig/sound/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -62,6 +62,8 @@
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
+ source "sound/mips/Kconfig"
+ 
+ # the following will depend on the order of config.
+diff -urN linux-2.6.20.4-0rig/sound/Makefile linux-2.6.20.4-atmel/sound/Makefile
+--- linux-2.6.20.4-0rig/sound/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -6,6 +6,7 @@
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+ obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/
++obj-$(CONFIG_SND) += avr32/
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff -urN linux-2.6.20.4-0rig/sound/oss/at32dac.c linux-2.6.20.4-atmel/sound/oss/at32dac.c
+--- linux-2.6.20.4-0rig/sound/oss/at32dac.c	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/oss/at32dac.c	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,720 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32dac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int at32dac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int at32dac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int at32dac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void at32dac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			printk(KERN_NOTICE "at32dac: underrun\n");
++		dac->dma.tail = new_tail;
++		pr_debug("update tail: 0x%x - 0x%x = %u\n",
++			 dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int at32dac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	pr_debug("Starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int at32dac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int at32dac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void at32dac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void at32dac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void at32dac_dma_error(struct dma_request *req)
++{
++	printk(KERN_ERR "at32dac: DMA error\n");
++}
++
++static irqreturn_t at32dac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		printk(KERN_ERR "at32dac: Underrun detected\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		printk(KERN_ERR "at32dac: Spurious interrupt: status=0x%x\n",
++		       status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!at32dac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[at32dac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!at32dac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[at32dac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!at32dac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[at32dac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!at32dac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[at32dac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t at32dac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	pr_debug("at32dac: Copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int at32dac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		printk("at32dac: Unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int at32dac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t at32dac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = at32dac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			at32dac_update_dma_tail(dac);
++			avail = at32dac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = at32dac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		at32dac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int at32dac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			at32dac_stop(dac);
++			ret = at32dac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		at32dac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			at32dac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = at32dac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		at32dac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (at32dac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		printk("at32dac: Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int at32dac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	at32dac_set_format(dac, AFMT_S16_BE);
++	ret = at32dac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int at32dac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	at32dac_stop(dac);
++	at32dac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations at32dac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= at32dac_dsp_write,
++	.ioctl		= at32dac_dsp_ioctl,
++	.open		= at32dac_dsp_open,
++	.release	= at32dac_dsp_release,
++};
++
++static int __devinit at32dac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, at32dac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = at32dac_dma_block_complete;
++	dac->req.req.error = at32dac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&at32dac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __devexit at32dac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver at32dac_driver = {
++	.probe		= at32dac_probe,
++	.remove		= __devexit_p(at32dac_remove),
++	.driver		= {
++		.name	= "dac",
++	},
++};
++
++static int __init at32dac_init(void)
++{
++	return platform_driver_register(&at32dac_driver);
++}
++module_init(at32dac_init);
++
++static void __exit at32dac_exit(void)
++{
++	platform_driver_unregister(&at32dac_driver);
++}
++module_exit(at32dac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("DMA Sound Driver for the Atmel AT32 on-chip DAC");
++MODULE_LICENSE("GPL");
+diff -urN linux-2.6.20.4-0rig/sound/oss/at32dac.h linux-2.6.20.4-atmel/sound/oss/at32dac.h
+--- linux-2.6.20.4-0rig/sound/oss/at32dac.h	1970-01-01 01:00:00.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/oss/at32dac.h	2007-03-24 16:42:29.000000000 +0100
+@@ -0,0 +1,65 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DAC_H__
++#define __ASM_AVR32_DAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in DATA */
++#define DAC_DATA_OFFSET                         0
++#define DAC_DATA_SIZE                           32
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK */
++
++/* Bitfields in INT_EN */
++
++/* Bitfields in INT_DIS */
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bitfields in INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++
++/* Bitfields in INT_STATUS */
++
++/* Bitfields in PDC_DATA */
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)                           (1 << DAC_##name##_OFFSET)
++#define DAC_BF(name,value)                      (((value) & ((1 << DAC_##name##_SIZE) - 1)) << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name,value)                   (((value) >> DAC_##name##_OFFSET) & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name,value,old)               (((old) & ~(((1 << DAC_##name##_SIZE) - 1) << DAC_##name##_OFFSET)) | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port,reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __ASM_AVR32_DAC_H__ */
+diff -urN linux-2.6.20.4-0rig/sound/oss/Kconfig linux-2.6.20.4-atmel/sound/oss/Kconfig
+--- linux-2.6.20.4-0rig/sound/oss/Kconfig	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/oss/Kconfig	2007-03-24 16:42:29.000000000 +0100
+@@ -750,3 +750,7 @@
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_DAC
++	tristate "Atmel AT32 On-chip DAC support"
++	depends on SOUND_PRIME && AVR32
+diff -urN linux-2.6.20.4-0rig/sound/oss/Makefile linux-2.6.20.4-atmel/sound/oss/Makefile
+--- linux-2.6.20.4-0rig/sound/oss/Makefile	2007-03-23 20:52:51.000000000 +0100
++++ linux-2.6.20.4-atmel/sound/oss/Makefile	2007-03-24 16:42:29.000000000 +0100
+@@ -10,6 +10,7 @@
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_DAC)	+= at32dac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
diff --git a/target/device/Atmel/Linux/kernel-patches-2.6.21.1/2.6.21.1-at91.patch b/target/device/Atmel/Linux/kernel-patches-2.6.21.1/2.6.21.1-at91.patch
new file mode 100644
index 000000000..90e7dfd51
--- /dev/null
+++ b/target/device/Atmel/Linux/kernel-patches-2.6.21.1/2.6.21.1-at91.patch
@@ -0,0 +1,14630 @@
+diff -urN -x CVS linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S
+--- linux-2.6.21/arch/arm/boot/compressed/head-at91rm9200.S	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/boot/compressed/head-at91rm9200.S	Tue May  8 12:13:30 2007
+@@ -67,6 +67,12 @@
+ 		cmp	r7, r3
+ 		beq	99f
+ 
++		@ Promwad Chub : 1181
++		mov	r3,	#(MACH_TYPE_CHUB & 0xff)
++		orr	r3, r3, #(MACH_TYPE_CHUB & 0xff00)
++		cmp	r7, r3
++		beq	99f
++
+ 		@ Unknown board, use the AT91RM9200DK board
+ 		@ mov	r7, #MACH_TYPE_AT91RM9200
+ 		mov	r7,	#(MACH_TYPE_AT91RM9200DK & 0xff)
+diff -urN -x CVS linux-2.6.21/arch/arm/configs/at91sam9260ek_defconfig linux-2.6-stable/arch/arm/configs/at91sam9260ek_defconfig
+--- linux-2.6.21/arch/arm/configs/at91sam9260ek_defconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/configs/at91sam9260ek_defconfig	Tue May  8 12:13:30 2007
+@@ -1,18 +1,24 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.19-rc6
+-# Fri Nov 17 18:42:21 2006
++# Linux kernel version: 2.6.21
++# Mon May  7 11:42:02 2007
+ #
+ CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
+ # CONFIG_GENERIC_TIME is not set
+ CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
+ CONFIG_GENERIC_HARDIRQS=y
+ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
+ CONFIG_VECTORS_BASE=0xffff0000
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+@@ -31,13 +37,16 @@
+ # CONFIG_SWAP is not set
+ CONFIG_SYSVIPC=y
+ # CONFIG_IPC_NS is not set
++CONFIG_SYSVIPC_SYSCTL=y
+ # CONFIG_POSIX_MQUEUE is not set
+ # CONFIG_BSD_PROCESS_ACCT is not set
+ # CONFIG_TASKSTATS is not set
+ # CONFIG_UTS_NS is not set
+ # CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
++CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
+ CONFIG_INITRAMFS_SOURCE=""
+ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_SYSCTL=y
+@@ -76,7 +85,9 @@
+ # Block layer
+ #
+ CONFIG_BLOCK=y
++# CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
+ 
+ #
+ # IO Schedulers
+@@ -110,10 +121,12 @@
+ # CONFIG_ARCH_IMX is not set
+ # CONFIG_ARCH_IOP32X is not set
+ # CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IOP13XX is not set
+ # CONFIG_ARCH_IXP4XX is not set
+ # CONFIG_ARCH_IXP2000 is not set
+ # CONFIG_ARCH_IXP23XX is not set
+ # CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_NS9XXX is not set
+ # CONFIG_ARCH_PNX4008 is not set
+ # CONFIG_ARCH_PXA is not set
+ # CONFIG_ARCH_RPC is not set
+@@ -129,21 +142,29 @@
+ # CONFIG_ARCH_AT91RM9200 is not set
+ CONFIG_ARCH_AT91SAM9260=y
+ # CONFIG_ARCH_AT91SAM9261 is not set
++# CONFIG_ARCH_AT91SAM9263 is not set
++
++#
++# AT91SAM9260 Variants
++#
++# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set
+ 
+ #
+-# AT91SAM9260 Board Type
++# AT91SAM9260 / AT91SAM9XE Board Type
+ #
+ CONFIG_MACH_AT91SAM9260EK=y
+ 
+ #
+ # AT91 Board Options
+ #
++# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
+ # CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
+ 
+ #
+ # AT91 Feature Selections
+ #
+ # CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++# CONFIG_ATMEL_TCLIB is not set
+ 
+ #
+ # Processor Type
+@@ -166,6 +187,7 @@
+ # CONFIG_CPU_DCACHE_DISABLE is not set
+ # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+ # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
++# CONFIG_OUTER_CACHE is not set
+ 
+ #
+ # Bus support
+@@ -193,6 +215,7 @@
+ # CONFIG_SPARSEMEM_STATIC is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4096
+ # CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
+ # CONFIG_LEDS is not set
+ CONFIG_ALIGNMENT_TRAP=y
+ 
+@@ -203,6 +226,7 @@
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+ # CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
+ 
+ #
+ # Floating point emulation
+@@ -228,7 +252,6 @@
+ # Power management options
+ #
+ # CONFIG_PM is not set
+-# CONFIG_APM is not set
+ 
+ #
+ # Networking
+@@ -242,9 +265,6 @@
+ CONFIG_PACKET=y
+ # CONFIG_PACKET_MMAP is not set
+ CONFIG_UNIX=y
+-CONFIG_XFRM=y
+-# CONFIG_XFRM_USER is not set
+-# CONFIG_XFRM_SUB_POLICY is not set
+ # CONFIG_NET_KEY is not set
+ CONFIG_INET=y
+ # CONFIG_IP_MULTICAST is not set
+@@ -263,14 +283,15 @@
+ # CONFIG_INET_IPCOMP is not set
+ # CONFIG_INET_XFRM_TUNNEL is not set
+ # CONFIG_INET_TUNNEL is not set
+-CONFIG_INET_XFRM_MODE_TRANSPORT=y
+-CONFIG_INET_XFRM_MODE_TUNNEL=y
+-CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+ CONFIG_TCP_CONG_CUBIC=y
+ CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
+ # CONFIG_IPV6 is not set
+ # CONFIG_INET6_XFRM_TUNNEL is not set
+ # CONFIG_INET6_TUNNEL is not set
+@@ -328,6 +349,7 @@
+ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+ 
+ #
+@@ -348,6 +370,7 @@
+ #
+ # Plug and Play support
+ #
++# CONFIG_PNPACPI is not set
+ 
+ #
+ # Block devices
+@@ -360,7 +383,6 @@
+ CONFIG_BLK_DEV_RAM_COUNT=16
+ CONFIG_BLK_DEV_RAM_SIZE=8192
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+-CONFIG_BLK_DEV_INITRD=y
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+ 
+@@ -369,6 +391,7 @@
+ #
+ # CONFIG_RAID_ATTRS is not set
+ CONFIG_SCSI=y
++# CONFIG_SCSI_TGT is not set
+ # CONFIG_SCSI_NETLINK is not set
+ CONFIG_SCSI_PROC_FS=y
+ 
+@@ -388,6 +411,7 @@
+ CONFIG_SCSI_MULTI_LUN=y
+ # CONFIG_SCSI_CONSTANTS is not set
+ # CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
+ 
+ #
+ # SCSI Transports
+@@ -405,6 +429,11 @@
+ # CONFIG_SCSI_DEBUG is not set
+ 
+ #
++# Serial ATA (prod) and Parallel ATA (experimental) drivers
++#
++# CONFIG_ATA is not set
++
++#
+ # Multi-device support (RAID and LVM)
+ #
+ # CONFIG_MD is not set
+@@ -425,7 +454,51 @@
+ #
+ # Network device support
+ #
+-# CONFIG_NETDEVICES is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++
++#
++# PHY device support
++#
++# CONFIG_PHYLIB is not set
++
++#
++# Ethernet (10 or 100Mbit)
++#
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++CONFIG_MACB=y
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++
++#
++# Ethernet (1000 Mbit)
++#
++
++#
++# Ethernet (10000 Mbit)
++#
++
++#
++# Token Ring devices
++#
++
++#
++# Wireless LAN (non-hamradio)
++#
++# CONFIG_NET_RADIO is not set
++
++#
++# Wan interfaces
++#
++# CONFIG_WAN is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+ 
+@@ -517,10 +590,6 @@
+ # CONFIG_NVRAM is not set
+ # CONFIG_DTLK is not set
+ # CONFIG_R3964 is not set
+-
+-#
+-# Ftape, the floppy tape device driver
+-#
+ # CONFIG_RAW_DRIVER is not set
+ 
+ #
+@@ -553,7 +622,11 @@
+ #
+ # Misc devices
+ #
+-# CONFIG_TIFM_CORE is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
+ 
+ #
+ # LED devices
+@@ -582,7 +655,7 @@
+ #
+ # Graphics support
+ #
+-# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ # CONFIG_FB is not set
+ 
+ #
+@@ -590,7 +663,6 @@
+ #
+ # CONFIG_VGA_CONSOLE is not set
+ CONFIG_DUMMY_CONSOLE=y
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Sound
+@@ -598,6 +670,12 @@
+ # CONFIG_SOUND is not set
+ 
+ #
++# HID Devices
++#
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++
++#
+ # USB support
+ #
+ CONFIG_USB_ARCH_HAS_HCD=y
+@@ -610,7 +688,6 @@
+ # Miscellaneous USB options
+ #
+ CONFIG_USB_DEVICEFS=y
+-# CONFIG_USB_BANDWIDTH is not set
+ # CONFIG_USB_DYNAMIC_MINORS is not set
+ # CONFIG_USB_OTG is not set
+ 
+@@ -619,7 +696,8 @@
+ #
+ # CONFIG_USB_ISP116X_HCD is not set
+ CONFIG_USB_OHCI_HCD=y
+-# CONFIG_USB_OHCI_BIG_ENDIAN is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+ # CONFIG_USB_SL811_HCD is not set
+ 
+@@ -671,6 +749,7 @@
+ # CONFIG_USB_ATI_REMOTE2 is not set
+ # CONFIG_USB_KEYSPAN_REMOTE is not set
+ # CONFIG_USB_APPLETOUCH is not set
++# CONFIG_USB_GTCO is not set
+ 
+ #
+ # USB Imaging devices
+@@ -708,6 +787,7 @@
+ # CONFIG_USB_RIO500 is not set
+ # CONFIG_USB_LEGOTOWER is not set
+ # CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
+ # CONFIG_USB_LED is not set
+ # CONFIG_USB_CYPRESS_CY7C63 is not set
+ # CONFIG_USB_CYTHERM is not set
+@@ -717,6 +797,7 @@
+ # CONFIG_USB_APPLEDISPLAY is not set
+ # CONFIG_USB_LD is not set
+ # CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
+ # CONFIG_USB_TEST is not set
+ 
+ #
+@@ -889,6 +970,11 @@
+ # CONFIG_NLS_UTF8 is not set
+ 
+ #
++# Distributed Lock Manager
++#
++# CONFIG_DLM is not set
++
++#
+ # Profiling support
+ #
+ # CONFIG_PROFILING is not set
+@@ -900,28 +986,30 @@
+ CONFIG_ENABLE_MUST_CHECK=y
+ # CONFIG_MAGIC_SYSRQ is not set
+ # CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_LOG_BUF_SHIFT=14
+ CONFIG_DETECT_SOFTLOCKUP=y
+ # CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_SLAB is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
+-# CONFIG_DEBUG_RWSEMS is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+-# CONFIG_DEBUG_FS is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
+-# CONFIG_HEADERS_CHECK is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
+ CONFIG_DEBUG_USER=y
+ # CONFIG_DEBUG_ERRORS is not set
+ CONFIG_DEBUG_LL=y
+@@ -941,9 +1029,12 @@
+ #
+ # Library routines
+ #
++CONFIG_BITREVERSE=y
+ # CONFIG_CRC_CCITT is not set
+ # CONFIG_CRC16 is not set
+ CONFIG_CRC32=y
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
+diff -urN -x CVS linux-2.6.21/arch/arm/configs/at91sam9261ek_defconfig linux-2.6-stable/arch/arm/configs/at91sam9261ek_defconfig
+--- linux-2.6.21/arch/arm/configs/at91sam9261ek_defconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/configs/at91sam9261ek_defconfig	Tue May  8 12:13:30 2007
+@@ -1,18 +1,24 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.19-rc6
+-# Fri Nov 17 18:00:38 2006
++# Linux kernel version: 2.6.21
++# Mon May  7 11:42:30 2007
+ #
+ CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
+ # CONFIG_GENERIC_TIME is not set
+ CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
+ CONFIG_GENERIC_HARDIRQS=y
+ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
+ CONFIG_VECTORS_BASE=0xffff0000
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+@@ -31,13 +37,16 @@
+ # CONFIG_SWAP is not set
+ CONFIG_SYSVIPC=y
+ # CONFIG_IPC_NS is not set
++CONFIG_SYSVIPC_SYSCTL=y
+ # CONFIG_POSIX_MQUEUE is not set
+ # CONFIG_BSD_PROCESS_ACCT is not set
+ # CONFIG_TASKSTATS is not set
+ # CONFIG_UTS_NS is not set
+ # CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
++CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
+ CONFIG_INITRAMFS_SOURCE=""
+ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_SYSCTL=y
+@@ -76,7 +85,9 @@
+ # Block layer
+ #
+ CONFIG_BLOCK=y
++# CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
+ 
+ #
+ # IO Schedulers
+@@ -110,10 +121,12 @@
+ # CONFIG_ARCH_IMX is not set
+ # CONFIG_ARCH_IOP32X is not set
+ # CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IOP13XX is not set
+ # CONFIG_ARCH_IXP4XX is not set
+ # CONFIG_ARCH_IXP2000 is not set
+ # CONFIG_ARCH_IXP23XX is not set
+ # CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_NS9XXX is not set
+ # CONFIG_ARCH_PNX4008 is not set
+ # CONFIG_ARCH_PXA is not set
+ # CONFIG_ARCH_RPC is not set
+@@ -129,6 +142,7 @@
+ # CONFIG_ARCH_AT91RM9200 is not set
+ # CONFIG_ARCH_AT91SAM9260 is not set
+ CONFIG_ARCH_AT91SAM9261=y
++# CONFIG_ARCH_AT91SAM9263 is not set
+ 
+ #
+ # AT91SAM9261 Board Type
+@@ -138,12 +152,14 @@
+ #
+ # AT91 Board Options
+ #
++# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
+ # CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
+ 
+ #
+ # AT91 Feature Selections
+ #
+ # CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++# CONFIG_ATMEL_TCLIB is not set
+ 
+ #
+ # Processor Type
+@@ -166,6 +182,7 @@
+ # CONFIG_CPU_DCACHE_DISABLE is not set
+ # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+ # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
++# CONFIG_OUTER_CACHE is not set
+ 
+ #
+ # Bus support
+@@ -193,6 +210,7 @@
+ # CONFIG_SPARSEMEM_STATIC is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4096
+ # CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
+ # CONFIG_LEDS is not set
+ CONFIG_ALIGNMENT_TRAP=y
+ 
+@@ -203,6 +221,7 @@
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+ # CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
+ 
+ #
+ # Floating point emulation
+@@ -228,7 +247,6 @@
+ # Power management options
+ #
+ # CONFIG_PM is not set
+-# CONFIG_APM is not set
+ 
+ #
+ # Networking
+@@ -245,6 +263,7 @@
+ CONFIG_XFRM=y
+ # CONFIG_XFRM_USER is not set
+ # CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
+ # CONFIG_NET_KEY is not set
+ CONFIG_INET=y
+ # CONFIG_IP_MULTICAST is not set
+@@ -271,6 +290,7 @@
+ # CONFIG_TCP_CONG_ADVANCED is not set
+ CONFIG_TCP_CONG_CUBIC=y
+ CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
+ # CONFIG_IPV6 is not set
+ # CONFIG_INET6_XFRM_TUNNEL is not set
+ # CONFIG_INET6_TUNNEL is not set
+@@ -328,6 +348,7 @@
+ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+ 
+ #
+@@ -350,6 +371,7 @@
+ # User Modules And Translation Layers
+ #
+ # CONFIG_MTD_CHAR is not set
++CONFIG_MTD_BLKDEVS=y
+ CONFIG_MTD_BLOCK=y
+ # CONFIG_FTL is not set
+ # CONFIG_NFTL is not set
+@@ -386,6 +408,8 @@
+ #
+ # Self-contained MTD device drivers
+ #
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -422,6 +446,7 @@
+ #
+ # Plug and Play support
+ #
++# CONFIG_PNPACPI is not set
+ 
+ #
+ # Block devices
+@@ -434,7 +459,6 @@
+ CONFIG_BLK_DEV_RAM_COUNT=16
+ CONFIG_BLK_DEV_RAM_SIZE=8192
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+-CONFIG_BLK_DEV_INITRD=y
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+ 
+@@ -443,6 +467,7 @@
+ #
+ # CONFIG_RAID_ATTRS is not set
+ CONFIG_SCSI=y
++# CONFIG_SCSI_TGT is not set
+ # CONFIG_SCSI_NETLINK is not set
+ CONFIG_SCSI_PROC_FS=y
+ 
+@@ -462,6 +487,7 @@
+ CONFIG_SCSI_MULTI_LUN=y
+ # CONFIG_SCSI_CONSTANTS is not set
+ # CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
+ 
+ #
+ # SCSI Transports
+@@ -479,6 +505,11 @@
+ # CONFIG_SCSI_DEBUG is not set
+ 
+ #
++# Serial ATA (prod) and Parallel ATA (experimental) drivers
++#
++# CONFIG_ATA is not set
++
++#
+ # Multi-device support (RAID and LVM)
+ #
+ # CONFIG_MD is not set
+@@ -575,7 +606,16 @@
+ # CONFIG_INPUT_KEYBOARD is not set
+ # CONFIG_INPUT_MOUSE is not set
+ # CONFIG_INPUT_JOYSTICK is not set
+-# CONFIG_INPUT_TOUCHSCREEN is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_ADS7846=y
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
+ # CONFIG_INPUT_MISC is not set
+ 
+ #
+@@ -634,10 +674,6 @@
+ # CONFIG_NVRAM is not set
+ # CONFIG_DTLK is not set
+ # CONFIG_R3964 is not set
+-
+-#
+-# Ftape, the floppy tape device driver
+-#
+ # CONFIG_RAW_DRIVER is not set
+ 
+ #
+@@ -662,6 +698,7 @@
+ # I2C Hardware Bus support
+ #
+ CONFIG_I2C_AT91=y
++CONFIG_I2C_AT91_CLOCKRATE=100000
+ # CONFIG_I2C_OCORES is not set
+ # CONFIG_I2C_PARPORT_LIGHT is not set
+ # CONFIG_I2C_STUB is not set
+@@ -686,8 +723,20 @@
+ #
+ # SPI support
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
+ 
+ #
+ # Dallas's 1-wire bus
+@@ -703,7 +752,11 @@
+ #
+ # Misc devices
+ #
+-# CONFIG_TIFM_CORE is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
+ 
+ #
+ # LED devices
+@@ -732,7 +785,7 @@
+ #
+ # Graphics support
+ #
+-# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ # CONFIG_FB is not set
+ 
+ #
+@@ -740,7 +793,6 @@
+ #
+ # CONFIG_VGA_CONSOLE is not set
+ CONFIG_DUMMY_CONSOLE=y
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Sound
+@@ -748,6 +800,12 @@
+ # CONFIG_SOUND is not set
+ 
+ #
++# HID Devices
++#
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++
++#
+ # USB support
+ #
+ CONFIG_USB_ARCH_HAS_HCD=y
+@@ -760,7 +818,6 @@
+ # Miscellaneous USB options
+ #
+ CONFIG_USB_DEVICEFS=y
+-# CONFIG_USB_BANDWIDTH is not set
+ # CONFIG_USB_DYNAMIC_MINORS is not set
+ # CONFIG_USB_OTG is not set
+ 
+@@ -769,7 +826,8 @@
+ #
+ # CONFIG_USB_ISP116X_HCD is not set
+ CONFIG_USB_OHCI_HCD=y
+-# CONFIG_USB_OHCI_BIG_ENDIAN is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+ # CONFIG_USB_SL811_HCD is not set
+ 
+@@ -821,6 +879,7 @@
+ # CONFIG_USB_ATI_REMOTE2 is not set
+ # CONFIG_USB_KEYSPAN_REMOTE is not set
+ # CONFIG_USB_APPLETOUCH is not set
++# CONFIG_USB_GTCO is not set
+ 
+ #
+ # USB Imaging devices
+@@ -858,6 +917,7 @@
+ # CONFIG_USB_RIO500 is not set
+ # CONFIG_USB_LEGOTOWER is not set
+ # CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
+ # CONFIG_USB_LED is not set
+ # CONFIG_USB_CYPRESS_CY7C63 is not set
+ # CONFIG_USB_CYTHERM is not set
+@@ -867,6 +927,7 @@
+ # CONFIG_USB_APPLEDISPLAY is not set
+ # CONFIG_USB_LD is not set
+ # CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
+ # CONFIG_USB_TEST is not set
+ 
+ #
+@@ -903,7 +964,6 @@
+ # CONFIG_MMC_DEBUG is not set
+ CONFIG_MMC_BLOCK=y
+ CONFIG_MMC_AT91=m
+-# CONFIG_MMC_TIFM_SD is not set
+ 
+ #
+ # Real Time Clock
+@@ -973,7 +1033,6 @@
+ # CONFIG_BEFS_FS is not set
+ # CONFIG_BFS_FS is not set
+ # CONFIG_EFS_FS is not set
+-# CONFIG_JFFS_FS is not set
+ # CONFIG_JFFS2_FS is not set
+ CONFIG_CRAMFS=y
+ # CONFIG_VXFS_FS is not set
+@@ -1045,6 +1104,11 @@
+ # CONFIG_NLS_UTF8 is not set
+ 
+ #
++# Distributed Lock Manager
++#
++# CONFIG_DLM is not set
++
++#
+ # Profiling support
+ #
+ # CONFIG_PROFILING is not set
+@@ -1056,28 +1120,30 @@
+ CONFIG_ENABLE_MUST_CHECK=y
+ # CONFIG_MAGIC_SYSRQ is not set
+ # CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_LOG_BUF_SHIFT=14
+ CONFIG_DETECT_SOFTLOCKUP=y
+ # CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_SLAB is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
+-# CONFIG_DEBUG_RWSEMS is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+-# CONFIG_DEBUG_FS is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
+-# CONFIG_HEADERS_CHECK is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
+ CONFIG_DEBUG_USER=y
+ # CONFIG_DEBUG_ERRORS is not set
+ CONFIG_DEBUG_LL=y
+@@ -1097,9 +1163,12 @@
+ #
+ # Library routines
+ #
++CONFIG_BITREVERSE=y
+ # CONFIG_CRC_CCITT is not set
+ # CONFIG_CRC16 is not set
+ CONFIG_CRC32=y
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
+diff -urN -x CVS linux-2.6.21/arch/arm/configs/at91sam9263ek_defconfig linux-2.6-stable/arch/arm/configs/at91sam9263ek_defconfig
+--- linux-2.6.21/arch/arm/configs/at91sam9263ek_defconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/configs/at91sam9263ek_defconfig	Tue May  8 12:13:30 2007
+@@ -1,11 +1,14 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.20-rc1
+-# Mon Jan  8 16:06:54 2007
++# Linux kernel version: 2.6.21
++# Mon May  7 11:42:49 2007
+ #
+ CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
+ # CONFIG_GENERIC_TIME is not set
+ CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
+ CONFIG_GENERIC_HARDIRQS=y
+ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+@@ -15,6 +18,7 @@
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
+ CONFIG_VECTORS_BASE=0xffff0000
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+@@ -33,6 +37,7 @@
+ # CONFIG_SWAP is not set
+ CONFIG_SYSVIPC=y
+ # CONFIG_IPC_NS is not set
++CONFIG_SYSVIPC_SYSCTL=y
+ # CONFIG_POSIX_MQUEUE is not set
+ # CONFIG_BSD_PROCESS_ACCT is not set
+ # CONFIG_TASKSTATS is not set
+@@ -41,6 +46,7 @@
+ # CONFIG_IKCONFIG is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
+ CONFIG_INITRAMFS_SOURCE=""
+ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_SYSCTL=y
+@@ -120,6 +126,7 @@
+ # CONFIG_ARCH_IXP2000 is not set
+ # CONFIG_ARCH_IXP23XX is not set
+ # CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_NS9XXX is not set
+ # CONFIG_ARCH_PNX4008 is not set
+ # CONFIG_ARCH_PXA is not set
+ # CONFIG_ARCH_RPC is not set
+@@ -152,6 +159,7 @@
+ # AT91 Feature Selections
+ #
+ # CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++# CONFIG_ATMEL_TCLIB is not set
+ 
+ #
+ # Processor Type
+@@ -174,6 +182,7 @@
+ # CONFIG_CPU_DCACHE_DISABLE is not set
+ # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+ # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
++# CONFIG_OUTER_CACHE is not set
+ 
+ #
+ # Bus support
+@@ -201,6 +210,7 @@
+ # CONFIG_SPARSEMEM_STATIC is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4096
+ # CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
+ # CONFIG_LEDS is not set
+ CONFIG_ALIGNMENT_TRAP=y
+ 
+@@ -211,6 +221,7 @@
+ CONFIG_ZBOOT_ROM_BSS=0x0
+ CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+ # CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
+ 
+ #
+ # Floating point emulation
+@@ -236,7 +247,6 @@
+ # Power management options
+ #
+ # CONFIG_PM is not set
+-# CONFIG_APM is not set
+ 
+ #
+ # Networking
+@@ -333,6 +343,7 @@
+ CONFIG_PREVENT_FIRMWARE_BUILD=y
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+ 
+ #
+@@ -430,6 +441,7 @@
+ #
+ # Plug and Play support
+ #
++# CONFIG_PNPACPI is not set
+ 
+ #
+ # Block devices
+@@ -443,7 +455,6 @@
+ CONFIG_BLK_DEV_RAM_COUNT=16
+ CONFIG_BLK_DEV_RAM_SIZE=8192
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+-CONFIG_BLK_DEV_INITRD=y
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+ 
+@@ -531,6 +542,7 @@
+ #
+ CONFIG_NET_ETHERNET=y
+ CONFIG_MII=y
++CONFIG_MACB=y
+ # CONFIG_SMC91X is not set
+ # CONFIG_DM9000 is not set
+ 
+@@ -685,6 +697,7 @@
+ # I2C Hardware Bus support
+ #
+ CONFIG_I2C_AT91=y
++CONFIG_I2C_AT91_CLOCKRATE=100000
+ # CONFIG_I2C_OCORES is not set
+ # CONFIG_I2C_PARPORT_LIGHT is not set
+ # CONFIG_I2C_STUB is not set
+@@ -722,6 +735,7 @@
+ #
+ # SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
+ 
+ #
+ # Dallas's 1-wire bus
+@@ -737,7 +751,11 @@
+ #
+ # Misc devices
+ #
+-# CONFIG_TIFM_CORE is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
+ 
+ #
+ # LED devices
+@@ -766,15 +784,23 @@
+ #
+ # Graphics support
+ #
+-# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
+ # CONFIG_FB_CFB_FILLRECT is not set
+ # CONFIG_FB_CFB_COPYAREA is not set
+ # CONFIG_FB_CFB_IMAGEBLIT is not set
++# CONFIG_FB_SVGALIB is not set
+ # CONFIG_FB_MACMODES is not set
+ # CONFIG_FB_BACKLIGHT is not set
+ # CONFIG_FB_MODE_HELPERS is not set
+ # CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D15605 is not set
+ # CONFIG_FB_S1D13XXX is not set
+ # CONFIG_FB_VIRTUAL is not set
+ 
+@@ -789,7 +815,6 @@
+ # Logo configuration
+ #
+ # CONFIG_LOGO is not set
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Sound
+@@ -800,6 +825,7 @@
+ # HID Devices
+ #
+ CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
+ 
+ #
+ # USB support
+@@ -814,9 +840,7 @@
+ # Miscellaneous USB options
+ #
+ CONFIG_USB_DEVICEFS=y
+-# CONFIG_USB_BANDWIDTH is not set
+ # CONFIG_USB_DYNAMIC_MINORS is not set
+-# CONFIG_USB_MULTITHREAD_PROBE is not set
+ # CONFIG_USB_OTG is not set
+ 
+ #
+@@ -824,7 +848,8 @@
+ #
+ # CONFIG_USB_ISP116X_HCD is not set
+ CONFIG_USB_OHCI_HCD=y
+-# CONFIG_USB_OHCI_BIG_ENDIAN is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+ # CONFIG_USB_SL811_HCD is not set
+ 
+@@ -877,6 +902,7 @@
+ # CONFIG_USB_ATI_REMOTE2 is not set
+ # CONFIG_USB_KEYSPAN_REMOTE is not set
+ # CONFIG_USB_APPLETOUCH is not set
++# CONFIG_USB_GTCO is not set
+ 
+ #
+ # USB Imaging devices
+@@ -914,6 +940,7 @@
+ # CONFIG_USB_RIO500 is not set
+ # CONFIG_USB_LEGOTOWER is not set
+ # CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
+ # CONFIG_USB_LED is not set
+ # CONFIG_USB_CYPRESS_CY7C63 is not set
+ # CONFIG_USB_CYTHERM is not set
+@@ -923,6 +950,7 @@
+ # CONFIG_USB_APPLEDISPLAY is not set
+ # CONFIG_USB_LD is not set
+ # CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
+ # CONFIG_USB_TEST is not set
+ 
+ #
+@@ -959,7 +987,6 @@
+ # CONFIG_MMC_DEBUG is not set
+ CONFIG_MMC_BLOCK=y
+ CONFIG_MMC_AT91=m
+-# CONFIG_MMC_TIFM_SD is not set
+ 
+ #
+ # Real Time Clock
+@@ -1136,15 +1163,16 @@
+ # CONFIG_DEBUG_FS is not set
+ # CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_LOG_BUF_SHIFT=14
+ CONFIG_DETECT_SOFTLOCKUP=y
+ # CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_SLAB is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
+-# CONFIG_DEBUG_RWSEMS is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -1155,6 +1183,7 @@
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
+ CONFIG_DEBUG_USER=y
+ # CONFIG_DEBUG_ERRORS is not set
+ CONFIG_DEBUG_LL=y
+@@ -1180,5 +1209,7 @@
+ CONFIG_CRC32=y
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
+ CONFIG_PLIST=y
+-CONFIG_IOMAP_COPY=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
+diff -urN -x CVS linux-2.6.21/arch/arm/configs/at91sam9rlek_defconfig linux-2.6-stable/arch/arm/configs/at91sam9rlek_defconfig
+--- linux-2.6.21/arch/arm/configs/at91sam9rlek_defconfig	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/configs/at91sam9rlek_defconfig	Wed May  9 10:20:54 2007
+@@ -0,0 +1,957 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.21
++# Mon May  7 16:30:40 2007
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_GENERIC_TIME is not set
++CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# Code maturity level options
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++
++#
++# General setup
++#
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SWAP is not set
++CONFIG_SYSVIPC=y
++# CONFIG_IPC_NS is not set
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_UTS_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SHMEM=y
++CONFIG_SLAB=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++# CONFIG_SLOB is not set
++
++#
++# Loadable module support
++#
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_KMOD=y
++
++#
++# Block layer
++#
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_DEFAULT_AS=y
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="anticipatory"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++CONFIG_ARCH_AT91=y
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_OMAP is not set
++
++#
++# Atmel AT91 System-on-Chip
++#
++# CONFIG_ARCH_AT91RM9200 is not set
++# CONFIG_ARCH_AT91SAM9260 is not set
++# CONFIG_ARCH_AT91SAM9261 is not set
++# CONFIG_ARCH_AT91SAM9263 is not set
++CONFIG_ARCH_AT91SAM9RL=y
++
++#
++# AT91SAM9RL Board Type
++#
++CONFIG_MACH_AT91SAM9RLEK=y
++
++#
++# AT91 Board Options
++#
++
++#
++# AT91 Feature Selections
++#
++# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM926T=y
++CONFIG_CPU_32v5=y
++CONFIG_CPU_ABRT_EV5TJ=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++# CONFIG_ARM_THUMB is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
++# CONFIG_OUTER_CACHE is not set
++
++#
++# Bus support
++#
++
++#
++# PCCARD (PCMCIA/CardBus) support
++#
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_PREEMPT is not set
++# CONFIG_NO_IDLE_HZ is not set
++CONFIG_HZ=100
++# CONFIG_AEABI is not set
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++# CONFIG_LEDS is not set
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,17105363 root=/dev/ram0 rw"
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++# CONFIG_VFP is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++# CONFIG_ARTHUR is not set
++
++#
++# Power management options
++#
++# CONFIG_PM is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++# CONFIG_NETDEBUG is not set
++# CONFIG_PACKET is not set
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++# CONFIG_INET is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_WAN_ROUTER is not set
++
++#
++# QoS and/or fair queueing
++#
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_IEEE80211 is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++
++#
++# Connector - unified userspace <-> kernelspace linker
++#
++# CONFIG_CONNECTOR is not set
++
++#
++# Memory Technology Devices (MTD)
++#
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=y
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++# CONFIG_MTD_OBSOLETE_CHIPS is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=y
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++
++#
++# NAND Flash Device Drivers
++#
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++CONFIG_MTD_NAND_AT91=y
++# CONFIG_MTD_NAND_NANDSIM is not set
++
++#
++# OneNAND Flash Device Drivers
++#
++# CONFIG_MTD_ONENAND is not set
++
++#
++# Parallel port support
++#
++# CONFIG_PARPORT is not set
++
++#
++# Plug and Play support
++#
++# CONFIG_PNPACPI is not set
++
++#
++# Block devices
++#
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=4
++CONFIG_BLK_DEV_RAM_SIZE=24576
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++
++#
++# SCSI low-level drivers
++#
++# CONFIG_SCSI_DEBUG is not set
++
++#
++# Serial ATA (prod) and Parallel ATA (experimental) drivers
++#
++# CONFIG_ATA is not set
++
++#
++# Multi-device support (RAID and LVM)
++#
++# CONFIG_MD is not set
++
++#
++# Fusion MPT device support
++#
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# I2O device support
++#
++
++#
++# Network device support
++#
++# CONFIG_NETDEVICES is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++
++#
++# ISDN subsystem
++#
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_TSDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_UCB1400 is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=256
++
++#
++# IPMI
++#
++# CONFIG_IPMI_HANDLER is not set
++
++#
++# Watchdog Cards
++#
++CONFIG_WATCHDOG=y
++CONFIG_WATCHDOG_NOWAYOUT=y
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_NVRAM is not set
++# CONFIG_DTLK is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++
++#
++# TPM devices
++#
++# CONFIG_TCG_TPM is not set
++
++#
++# I2C support
++#
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++
++#
++# Dallas's 1-wire bus
++#
++# CONFIG_W1 is not set
++
++#
++# Hardware Monitoring support
++#
++# CONFIG_HWMON is not set
++# CONFIG_HWMON_VID is not set
++
++#
++# Misc devices
++#
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# LED devices
++#
++# CONFIG_NEW_LEDS is not set
++
++#
++# LED drivers
++#
++
++#
++# LED Triggers
++#
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++
++#
++# Digital Video Broadcasting Devices
++#
++
++#
++# Graphics support
++#
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++
++#
++# Logo configuration
++#
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=y
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_SEQUENCER=y
++CONFIG_SND_SEQ_DUMMY=y
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=y
++CONFIG_SND_PCM_OSS=y
++CONFIG_SND_PCM_OSS_PLUGINS=y
++CONFIG_SND_SEQUENCER_OSS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++CONFIG_SND_VERBOSE_PRINTK=y
++CONFIG_SND_DEBUG=y
++CONFIG_SND_DEBUG_DETECT=y
++# CONFIG_SND_PCM_XRUN_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_VIRMIDI is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# ALSA ARM devices
++#
++
++#
++# SoC audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++
++#
++# HID Devices
++#
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++
++#
++# USB support
++#
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++# CONFIG_USB_GADGET is not set
++
++#
++# MMC/SD Card support
++#
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_AT91=y
++
++#
++# Real Time Clock
++#
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_CLASS is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4DEV_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_RAMFS=y
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++# CONFIG_JFFS2_FS is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++
++#
++# Network File Systems
++#
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++
++#
++# Native Language Support
++#
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=y
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++CONFIG_NLS_ISO8859_15=y
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=y
++
++#
++# Profiling support
++#
++# CONFIG_PROFILING is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_MUST_CHECK=y
++# CONFIG_MAGIC_SYSRQ is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_LOG_BUF_SHIFT=14
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++CONFIG_DEBUG_USER=y
++# CONFIG_DEBUG_ERRORS is not set
++CONFIG_DEBUG_LL=y
++# CONFIG_DEBUG_ICEDCC is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++
++#
++# Cryptographic options
++#
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++CONFIG_CRC32=y
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
+diff -urN -x CVS linux-2.6.21/arch/arm/configs/cam60_defconfig linux-2.6-stable/arch/arm/configs/cam60_defconfig
+--- linux-2.6.21/arch/arm/configs/cam60_defconfig	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/configs/cam60_defconfig	Tue May  8 12:13:30 2007
+@@ -0,0 +1,954 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.20
++# Tue May  1 21:06:33 2007
++#
++CONFIG_ARM=y
++# CONFIG_GENERIC_TIME is not set
++CONFIG_MMU=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# Code maturity level options
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++
++#
++# General setup
++#
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SWAP is not set
++CONFIG_SYSVIPC=y
++# CONFIG_IPC_NS is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_UTS_NS is not set
++# CONFIG_AUDIT is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SHMEM=y
++CONFIG_SLAB=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=0
++# CONFIG_SLOB is not set
++
++#
++# Loadable module support
++#
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++
++#
++# Block layer
++#
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_DEFAULT_AS=y
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="anticipatory"
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++CONFIG_ARCH_AT91=y
++# CONFIG_ARCH_CLPS7500 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CO285 is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_OMAP is not set
++
++#
++# Atmel AT91 System-on-Chip
++#
++# CONFIG_ARCH_AT91RM9200 is not set
++CONFIG_ARCH_AT91SAM9260=y
++# CONFIG_ARCH_AT91SAM9261 is not set
++# CONFIG_ARCH_AT91SAM9263 is not set
++
++#
++# AT91SAM9260 Board Type
++#
++# CONFIG_MACH_AT91SAM9260EK is not set
++CONFIG_MACH_CAM60=y
++
++#
++# AT91 Board Options
++#
++
++#
++# AT91 Feature Selections
++#
++# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_ARM926T=y
++CONFIG_CPU_32v5=y
++CONFIG_CPU_ABRT_EV5TJ=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_V4WB=y
++CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++# CONFIG_ARM_THUMB is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
++
++#
++# Bus support
++#
++
++#
++# PCCARD (PCMCIA/CardBus) support
++#
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++# CONFIG_PREEMPT is not set
++# CONFIG_NO_IDLE_HZ is not set
++CONFIG_HZ=100
++# CONFIG_AEABI is not set
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++# CONFIG_LEDS is not set
++CONFIG_ALIGNMENT_TRAP=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x22000000
++CONFIG_ZBOOT_ROM_BSS=0x20004000
++# CONFIG_ZBOOT_ROM is not set
++CONFIG_CMDLINE="console=ttyS0,115200 noinitrd root=/dev/mtdblock3 rootfstype=jffs2 mem=64M"
++# CONFIG_XIP_KERNEL is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++# CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
++# CONFIG_VFP is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++# CONFIG_ARTHUR is not set
++
++#
++# Power management options
++#
++# CONFIG_PM is not set
++# CONFIG_APM is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++# CONFIG_NETDEBUG is not set
++CONFIG_PACKET=y
++# CONFIG_PACKET_MMAP is not set
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++# CONFIG_IP_PNP_DHCP is not set
++CONFIG_IP_PNP_BOOTP=y
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++
++#
++# DCCP Configuration (EXPERIMENTAL)
++#
++# CONFIG_IP_DCCP is not set
++
++#
++# SCTP Configuration (EXPERIMENTAL)
++#
++# CONFIG_IP_SCTP is not set
++
++#
++# TIPC Configuration (EXPERIMENTAL)
++#
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++
++#
++# QoS and/or fair queueing
++#
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_IEEE80211 is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++
++#
++# Connector - unified userspace <-> kernelspace linker
++#
++# CONFIG_CONNECTOR is not set
++
++#
++# Memory Technology Devices (MTD)
++#
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=y
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++# CONFIG_MTD_CFI_AMDSTD is not set
++# CONFIG_MTD_CFI_STAA is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++# CONFIG_MTD_OBSOLETE_CHIPS is not set
++
++#
++# Mapping drivers for chip access
++#
++CONFIG_MTD_COMPLEX_MAPPINGS=y
++# CONFIG_MTD_PHYSMAP is not set
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=y
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++
++#
++# NAND Flash Device Drivers
++#
++# CONFIG_MTD_NAND is not set
++
++#
++# OneNAND Flash Device Drivers
++#
++# CONFIG_MTD_ONENAND is not set
++
++#
++# Parallel port support
++#
++# CONFIG_PARPORT is not set
++
++#
++# Plug and Play support
++#
++
++#
++# Block devices
++#
++# CONFIG_BLK_DEV_COW_COMMON is not set
++# CONFIG_BLK_DEV_LOOP is not set
++# CONFIG_BLK_DEV_NBD is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=8192
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++CONFIG_BLK_DEV_INITRD=y
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_NETLINK is not set
++
++#
++# Serial ATA (prod) and Parallel ATA (experimental) drivers
++#
++# CONFIG_ATA is not set
++
++#
++# Multi-device support (RAID and LVM)
++#
++# CONFIG_MD is not set
++
++#
++# Fusion MPT device support
++#
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# I2O device support
++#
++
++#
++# Network device support
++#
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++
++#
++# PHY device support
++#
++# CONFIG_PHYLIB is not set
++
++#
++# Ethernet (10 or 100Mbit)
++#
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++CONFIG_MACB=y
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++
++#
++# Ethernet (1000 Mbit)
++#
++
++#
++# Ethernet (10000 Mbit)
++#
++
++#
++# Token Ring devices
++#
++
++#
++# Wireless LAN (non-hamradio)
++#
++# CONFIG_NET_RADIO is not set
++
++#
++# Wan interfaces
++#
++# CONFIG_WAN is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++
++#
++# ISDN subsystem
++#
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_TSDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=256
++
++#
++# IPMI
++#
++# CONFIG_IPMI_HANDLER is not set
++
++#
++# Watchdog Cards
++#
++# CONFIG_WATCHDOG is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_NVRAM is not set
++# CONFIG_DTLK is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++
++#
++# TPM devices
++#
++# CONFIG_TCG_TPM is not set
++
++#
++# I2C support
++#
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++
++#
++# Dallas's 1-wire bus
++#
++# CONFIG_W1 is not set
++
++#
++# Hardware Monitoring support
++#
++# CONFIG_HWMON is not set
++# CONFIG_HWMON_VID is not set
++
++#
++# Misc devices
++#
++# CONFIG_TIFM_CORE is not set
++
++#
++# LED devices
++#
++# CONFIG_NEW_LEDS is not set
++
++#
++# LED drivers
++#
++
++#
++# LED Triggers
++#
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++
++#
++# Digital Video Broadcasting Devices
++#
++# CONFIG_DVB is not set
++
++#
++# Graphics support
++#
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++
++#
++# HID Devices
++#
++# CONFIG_HID is not set
++
++#
++# USB support
++#
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++# CONFIG_USB_GADGET is not set
++
++#
++# MMC/SD Card support
++#
++# CONFIG_MMC is not set
++
++#
++# Real Time Clock
++#
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_CLASS is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_XATTR=y
++# CONFIG_EXT3_FS_POSIX_ACL is not set
++# CONFIG_EXT3_FS_SECURITY is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_DNOTIFY=y
++# CONFIG_AUTOFS_FS is not set
++CONFIG_AUTOFS4_FS=y
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++# CONFIG_MSDOS_FS is not set
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_RAMFS=y
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_CRAMFS=y
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++
++#
++# Network File Systems
++#
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++# CONFIG_NFS_V4 is not set
++# CONFIG_NFS_DIRECTIO is not set
++# CONFIG_NFSD is not set
++CONFIG_ROOT_NFS=y
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_RPCSEC_GSS_KRB5 is not set
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++# CONFIG_9P_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++
++#
++# Native Language Support
++#
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=y
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++# CONFIG_NLS_UTF8 is not set
++
++#
++# Distributed Lock Manager
++#
++# CONFIG_DLM is not set
++
++#
++# Profiling support
++#
++# CONFIG_PROFILING is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_MUST_CHECK=y
++# CONFIG_MAGIC_SYSRQ is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++CONFIG_LOG_BUF_SHIFT=14
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_DEBUG_SLAB is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_RWSEMS is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_RCU_TORTURE_TEST is not set
++CONFIG_DEBUG_USER=y
++# CONFIG_DEBUG_ERRORS is not set
++CONFIG_DEBUG_LL=y
++# CONFIG_DEBUG_ICEDCC is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++
++#
++# Cryptographic options
++#
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++CONFIG_CRC32=y
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_IOMAP_COPY=y
+diff -urN -x CVS linux-2.6.21/arch/arm/configs/kb9202_defconfig linux-2.6-stable/arch/arm/configs/kb9202_defconfig
+--- linux-2.6.21/arch/arm/configs/kb9202_defconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/configs/kb9202_defconfig	Tue May  8 12:13:30 2007
+@@ -1,19 +1,31 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.13-rc2
+-# Sun Aug 14 19:26:59 2005
++# Linux kernel version: 2.6.21
++# Mon May  7 11:43:14 2007
+ #
+ CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_GENERIC_TIME is not set
+ CONFIG_MMU=y
+-CONFIG_UID16=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+ # Code maturity level options
+ #
+-# CONFIG_EXPERIMENTAL is not set
+-CONFIG_CLEAN_COMPILE=y
++CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+ 
+@@ -21,54 +33,103 @@
+ # General setup
+ #
+ CONFIG_LOCALVERSION=""
+-# CONFIG_SWAP is not set
+-# CONFIG_SYSVIPC is not set
+-# CONFIG_BSD_PROCESS_ACCT is not set
++CONFIG_LOCALVERSION_AUTO=y
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++# CONFIG_IPC_NS is not set
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++# CONFIG_BSD_PROCESS_ACCT_V3 is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_UTS_NS is not set
++CONFIG_AUDIT=y
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+ CONFIG_SYSCTL=y
+-# CONFIG_AUDIT is not set
+-CONFIG_HOTPLUG=y
+-# CONFIG_KOBJECT_UEVENT is not set
+-# CONFIG_IKCONFIG is not set
+ # CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
+ CONFIG_KALLSYMS=y
+ # CONFIG_KALLSYMS_ALL is not set
+-# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_KALLSYMS_EXTRA_PASS=y
++CONFIG_HOTPLUG=y
+ CONFIG_PRINTK=y
+ CONFIG_BUG=y
++CONFIG_ELF_CORE=y
+ CONFIG_BASE_FULL=y
+ CONFIG_FUTEX=y
+ CONFIG_EPOLL=y
+-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_SHMEM=y
+-CONFIG_CC_ALIGN_FUNCTIONS=0
+-CONFIG_CC_ALIGN_LABELS=0
+-CONFIG_CC_ALIGN_LOOPS=0
+-CONFIG_CC_ALIGN_JUMPS=0
++CONFIG_SLAB=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=0
++# CONFIG_SLOB is not set
+ 
+ #
+ # Loadable module support
+ #
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+-CONFIG_OBSOLETE_MODPARM=y
+-# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SRCVERSION_ALL=y
+ CONFIG_KMOD=y
+ 
+ #
++# Block layer
++#
++CONFIG_BLOCK=y
++CONFIG_LBD=y
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
+ # System Type
+ #
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++CONFIG_ARCH_AT91=y
+ # CONFIG_ARCH_CLPS7500 is not set
+ # CONFIG_ARCH_CLPS711X is not set
+ # CONFIG_ARCH_CO285 is not set
+ # CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
+ # CONFIG_ARCH_FOOTBRIDGE is not set
+-# CONFIG_ARCH_INTEGRATOR is not set
+-# CONFIG_ARCH_IOP3XX is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IOP13XX is not set
+ # CONFIG_ARCH_IXP4XX is not set
+ # CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP23XX is not set
+ # CONFIG_ARCH_L7200 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_PNX4008 is not set
+ # CONFIG_ARCH_PXA is not set
+ # CONFIG_ARCH_RPC is not set
+ # CONFIG_ARCH_SA1100 is not set
+@@ -76,34 +137,52 @@
+ # CONFIG_ARCH_SHARK is not set
+ # CONFIG_ARCH_LH7A40X is not set
+ # CONFIG_ARCH_OMAP is not set
+-# CONFIG_ARCH_VERSATILE is not set
+-# CONFIG_ARCH_IMX is not set
+-# CONFIG_ARCH_H720X is not set
+-# CONFIG_ARCH_AAEC2000 is not set
+-CONFIG_ARCH_AT91=y
++
++#
++# Atmel AT91 System-on-Chip
++#
+ CONFIG_ARCH_AT91RM9200=y
++# CONFIG_ARCH_AT91SAM9260 is not set
++# CONFIG_ARCH_AT91SAM9261 is not set
++# CONFIG_ARCH_AT91SAM9263 is not set
+ 
+ #
+-# AT91RM9200 Implementations
++# AT91RM9200 Board Type
+ #
++# CONFIG_MACH_ONEARM is not set
+ # CONFIG_ARCH_AT91RM9200DK is not set
+ # CONFIG_MACH_AT91RM9200EK is not set
+ # CONFIG_MACH_CSB337 is not set
+ # CONFIG_MACH_CSB637 is not set
+ # CONFIG_MACH_CARMEVA is not set
++# CONFIG_MACH_ATEB9200 is not set
+ CONFIG_MACH_KB9200=y
++# CONFIG_MACH_KAFA is not set
++# CONFIG_MACH_CHUB is not set
++
++#
++# AT91 Board Options
++#
++
++#
++# AT91 Feature Selections
++#
++# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
++# CONFIG_ATMEL_TCLIB is not set
+ 
+ #
+ # Processor Type
+ #
+ CONFIG_CPU_32=y
+ CONFIG_CPU_ARM920T=y
+-CONFIG_CPU_32v4=y
++CONFIG_CPU_32v4T=y
+ CONFIG_CPU_ABRT_EV4T=y
+ CONFIG_CPU_CACHE_V4WT=y
+ CONFIG_CPU_CACHE_VIVT=y
+ CONFIG_CPU_COPY_V4WB=y
+ CONFIG_CPU_TLB_V4WBI=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
+ 
+ #
+ # Processor Features
+@@ -112,24 +191,44 @@
+ # CONFIG_CPU_ICACHE_DISABLE is not set
+ # CONFIG_CPU_DCACHE_DISABLE is not set
+ # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++# CONFIG_OUTER_CACHE is not set
+ 
+ #
+ # Bus support
+ #
+-CONFIG_ISA_DMA_API=y
+ 
+ #
+ # PCCARD (PCMCIA/CardBus) support
+ #
+-# CONFIG_PCCARD is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++CONFIG_PCMCIA_LOAD_CIS=y
++CONFIG_PCMCIA_IOCTL=y
++
++#
++# PC-card bridges
++#
++# CONFIG_AT91_CF is not set
+ 
+ #
+ # Kernel Features
+ #
++# CONFIG_PREEMPT is not set
+ # CONFIG_NO_IDLE_HZ is not set
++CONFIG_HZ=100
++# CONFIG_AEABI is not set
+ # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
+ # CONFIG_LEDS is not set
+ CONFIG_ALIGNMENT_TRAP=y
+ 
+@@ -138,8 +237,10 @@
+ #
+ CONFIG_ZBOOT_ROM_TEXT=0x10000000
+ CONFIG_ZBOOT_ROM_BSS=0x20040000
+-CONFIG_ZBOOT_ROM=y
+-CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram rw initrd=0x20210000,654933"
++# CONFIG_ZBOOT_ROM is not set
++CONFIG_CMDLINE="noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M"
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
+ 
+ #
+ # Floating point emulation
+@@ -150,6 +251,7 @@
+ #
+ CONFIG_FPE_NWFPE=y
+ # CONFIG_FPE_NWFPE_XP is not set
++# CONFIG_FPE_FASTFPE is not set
+ 
+ #
+ # Userspace binary formats
+@@ -165,6 +267,96 @@
+ # CONFIG_PM is not set
+ 
+ #
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++# CONFIG_NETDEBUG is not set
++CONFIG_PACKET=y
++# CONFIG_PACKET_MMAP is not set
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++# CONFIG_IP_PNP_DHCP is not set
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++
++#
++# DCCP Configuration (EXPERIMENTAL)
++#
++# CONFIG_IP_DCCP is not set
++
++#
++# SCTP Configuration (EXPERIMENTAL)
++#
++CONFIG_IP_SCTP=m
++# CONFIG_SCTP_DBG_MSG is not set
++# CONFIG_SCTP_DBG_OBJCNT is not set
++# CONFIG_SCTP_HMAC_NONE is not set
++# CONFIG_SCTP_HMAC_SHA1 is not set
++CONFIG_SCTP_HMAC_MD5=y
++
++#
++# TIPC Configuration (EXPERIMENTAL)
++#
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++
++#
++# QoS and/or fair queueing
++#
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_IEEE80211 is not set
++
++#
+ # Device Drivers
+ #
+ 
+@@ -173,13 +365,95 @@
+ #
+ CONFIG_STANDALONE=y
+ CONFIG_PREVENT_FIRMWARE_BUILD=y
+-# CONFIG_FW_LOADER is not set
+-CONFIG_DEBUG_DRIVER=y
++CONFIG_FW_LOADER=y
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++
++#
++# Connector - unified userspace <-> kernelspace linker
++#
++# CONFIG_CONNECTOR is not set
+ 
+ #
+ # Memory Technology Devices (MTD)
+ #
+-# CONFIG_MTD is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++CONFIG_MTD_CONCAT=y
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++# CONFIG_MTD_OBSOLETE_CHIPS is not set
++
++#
++# Mapping drivers for chip access
++#
++CONFIG_MTD_COMPLEX_MAPPINGS=y
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++
++#
++# NAND Flash Device Drivers
++#
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++CONFIG_MTD_NAND_AT91=y
++# CONFIG_MTD_NAND_NANDSIM is not set
++
++#
++# OneNAND Flash Device Drivers
++#
++# CONFIG_MTD_ONENAND is not set
+ 
+ #
+ # Parallel port support
+@@ -189,6 +463,7 @@
+ #
+ # Plug and Play support
+ #
++# CONFIG_PNPACPI is not set
+ 
+ #
+ # Block devices
+@@ -196,28 +471,27 @@
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=y
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+-CONFIG_BLK_DEV_NBD=y
++# CONFIG_BLK_DEV_NBD is not set
+ # CONFIG_BLK_DEV_UB is not set
+ CONFIG_BLK_DEV_RAM=y
+ CONFIG_BLK_DEV_RAM_COUNT=16
+-CONFIG_BLK_DEV_RAM_SIZE=4096
+-CONFIG_BLK_DEV_INITRD=y
+-CONFIG_INITRAMFS_SOURCE=""
++CONFIG_BLK_DEV_RAM_SIZE=16384
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
+ 
+ #
+-# IO Schedulers
++# ATA/ATAPI/MFM/RLL support
+ #
+-CONFIG_IOSCHED_NOOP=y
+-CONFIG_IOSCHED_AS=y
+-CONFIG_IOSCHED_DEADLINE=y
+-CONFIG_IOSCHED_CFQ=y
+-# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_IDE is not set
+ 
+ #
+ # SCSI device support
+ #
++# CONFIG_RAID_ATTRS is not set
+ CONFIG_SCSI=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
+ CONFIG_SCSI_PROC_FS=y
+ 
+ #
+@@ -233,97 +507,61 @@
+ #
+ # Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+ #
+-# CONFIG_SCSI_MULTI_LUN is not set
+-# CONFIG_SCSI_CONSTANTS is not set
+-# CONFIG_SCSI_LOGGING is not set
++CONFIG_SCSI_MULTI_LUN=y
++CONFIG_SCSI_CONSTANTS=y
++CONFIG_SCSI_LOGGING=y
++# CONFIG_SCSI_SCAN_ASYNC is not set
+ 
+ #
+-# SCSI Transport Attributes
++# SCSI Transports
+ #
+-# CONFIG_SCSI_SPI_ATTRS is not set
++CONFIG_SCSI_SPI_ATTRS=m
+ # CONFIG_SCSI_FC_ATTRS is not set
+ # CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
+ 
+ #
+ # SCSI low-level drivers
+ #
+-# CONFIG_SCSI_SATA is not set
++# CONFIG_ISCSI_TCP is not set
+ # CONFIG_SCSI_DEBUG is not set
+ 
+ #
+-# Multi-device support (RAID and LVM)
+-#
+-# CONFIG_MD is not set
+-
+-#
+-# Fusion MPT device support
++# PCMCIA SCSI adapter support
+ #
+-# CONFIG_FUSION is not set
++# CONFIG_PCMCIA_AHA152X is not set
++# CONFIG_PCMCIA_FDOMAIN is not set
++# CONFIG_PCMCIA_NINJA_SCSI is not set
++# CONFIG_PCMCIA_QLOGIC is not set
++# CONFIG_PCMCIA_SYM53C500 is not set
+ 
+ #
+-# IEEE 1394 (FireWire) support
++# Serial ATA (prod) and Parallel ATA (experimental) drivers
+ #
++# CONFIG_ATA is not set
+ 
+ #
+-# I2O device support
++# Multi-device support (RAID and LVM)
+ #
++# CONFIG_MD is not set
+ 
+ #
+-# Networking support
++# Fusion MPT device support
+ #
+-CONFIG_NET=y
++# CONFIG_FUSION is not set
+ 
+ #
+-# Networking options
++# IEEE 1394 (FireWire) support
+ #
+-CONFIG_PACKET=y
+-# CONFIG_PACKET_MMAP is not set
+-CONFIG_UNIX=y
+-# CONFIG_NET_KEY is not set
+-CONFIG_INET=y
+-CONFIG_IP_MULTICAST=y
+-# CONFIG_IP_ADVANCED_ROUTER is not set
+-CONFIG_IP_FIB_HASH=y
+-CONFIG_IP_PNP=y
+-CONFIG_IP_PNP_DHCP=y
+-# CONFIG_IP_PNP_BOOTP is not set
+-# CONFIG_IP_PNP_RARP is not set
+-# CONFIG_NET_IPIP is not set
+-# CONFIG_NET_IPGRE is not set
+-# CONFIG_IP_MROUTE is not set
+-# CONFIG_SYN_COOKIES is not set
+-# CONFIG_INET_AH is not set
+-# CONFIG_INET_ESP is not set
+-# CONFIG_INET_IPCOMP is not set
+-# CONFIG_INET_TUNNEL is not set
+-# CONFIG_IP_TCPDIAG is not set
+-# CONFIG_IP_TCPDIAG_IPV6 is not set
+-# CONFIG_TCP_CONG_ADVANCED is not set
+-CONFIG_TCP_CONG_BIC=y
+-# CONFIG_IPV6 is not set
+-# CONFIG_NETFILTER is not set
+-# CONFIG_BRIDGE is not set
+-# CONFIG_VLAN_8021Q is not set
+-# CONFIG_DECNET is not set
+-# CONFIG_LLC2 is not set
+-# CONFIG_IPX is not set
+-# CONFIG_ATALK is not set
+ 
+ #
+-# QoS and/or fair queueing
++# I2O device support
+ #
+-# CONFIG_NET_SCHED is not set
+-# CONFIG_NET_CLS_ROUTE is not set
+ 
+ #
+-# Network testing
++# Network device support
+ #
+-# CONFIG_NET_PKTGEN is not set
+-# CONFIG_NETPOLL is not set
+-# CONFIG_NET_POLL_CONTROLLER is not set
+-# CONFIG_HAMRADIO is not set
+-# CONFIG_IRDA is not set
+-# CONFIG_BT is not set
+ CONFIG_NETDEVICES=y
+ # CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
+@@ -331,6 +569,11 @@
+ # CONFIG_TUN is not set
+ 
+ #
++# PHY device support
++#
++# CONFIG_PHYLIB is not set
++
++#
+ # Ethernet (10 or 100Mbit)
+ #
+ CONFIG_NET_ETHERNET=y
+@@ -357,11 +600,20 @@
+ # CONFIG_NET_RADIO is not set
+ 
+ #
++# PCMCIA network device support
++#
++# CONFIG_NET_PCMCIA is not set
++
++#
+ # Wan interfaces
+ #
+ # CONFIG_WAN is not set
+ # CONFIG_PPP is not set
+ # CONFIG_SLIP is not set
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
+ 
+ #
+ # ISDN subsystem
+@@ -372,6 +624,7 @@
+ # Input device support
+ #
+ CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
+ 
+ #
+ # Userland interfaces
+@@ -397,9 +650,7 @@
+ #
+ # Hardware I/O ports
+ #
+-CONFIG_SERIO=y
+-# CONFIG_SERIO_SERPORT is not set
+-# CONFIG_SERIO_RAW is not set
++# CONFIG_SERIO is not set
+ # CONFIG_GAMEPORT is not set
+ 
+ #
+@@ -408,6 +659,7 @@
+ CONFIG_VT=y
+ CONFIG_VT_CONSOLE=y
+ CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
+ # CONFIG_SERIAL_NONSTANDARD is not set
+ 
+ #
+@@ -420,11 +672,11 @@
+ #
+ CONFIG_SERIAL_ATMEL=y
+ CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
+ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+-CONFIG_LEGACY_PTYS=y
+-CONFIG_LEGACY_PTY_COUNT=256
++# CONFIG_LEGACY_PTYS is not set
+ 
+ #
+ # IPMI
+@@ -435,21 +687,23 @@
+ # Watchdog Cards
+ #
+ # CONFIG_WATCHDOG is not set
++# CONFIG_HW_RANDOM is not set
+ # CONFIG_NVRAM is not set
+-# CONFIG_RTC is not set
+-# CONFIG_AT91RM9200_RTC is not set
+ # CONFIG_DTLK is not set
+ # CONFIG_R3964 is not set
+ 
+ #
+-# Ftape, the floppy tape device driver
++# PCMCIA character devices
+ #
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
+ # CONFIG_RAW_DRIVER is not set
+ 
+ #
+ # TPM devices
+ #
+-# CONFIG_AT91_SPI is not set
++# CONFIG_TCG_TPM is not set
+ 
+ #
+ # I2C support
+@@ -457,10 +711,50 @@
+ # CONFIG_I2C is not set
+ 
+ #
++# SPI support
++#
++# CONFIG_SPI is not set
++# CONFIG_SPI_MASTER is not set
++
++#
++# Dallas's 1-wire bus
++#
++# CONFIG_W1 is not set
++
++#
++# Hardware Monitoring support
++#
++CONFIG_HWMON=y
++# CONFIG_HWMON_VID is not set
++# CONFIG_SENSORS_ABITUGURU is not set
++# CONFIG_SENSORS_F71805F is not set
++# CONFIG_SENSORS_PC87427 is not set
++# CONFIG_SENSORS_VT1211 is not set
++CONFIG_HWMON_DEBUG_CHIP=y
++
++#
+ # Misc devices
+ #
+ 
+ #
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# LED devices
++#
++# CONFIG_NEW_LEDS is not set
++
++#
++# LED drivers
++#
++
++#
++# LED Triggers
++#
++
++#
+ # Multimedia devices
+ #
+ # CONFIG_VIDEO_DEV is not set
+@@ -469,17 +763,57 @@
+ # Digital Video Broadcasting Devices
+ #
+ # CONFIG_DVB is not set
++# CONFIG_USB_DABUSB is not set
+ 
+ #
+ # Graphics support
+ #
+-# CONFIG_FB is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_LCD_CLASS_DEVICE is not set
++CONFIG_BACKLIGHT_KB920x=y
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++CONFIG_FB_TILEBLITTING=y
++
++#
++# Frame buffer hardware drivers
++#
++CONFIG_FB_S1D15605=y
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_VIRTUAL is not set
+ 
+ #
+ # Console display driver support
+ #
+ # CONFIG_VGA_CONSOLE is not set
+ CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++# CONFIG_FONT_8x16 is not set
++# CONFIG_FONT_6x11 is not set
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++CONFIG_FONT_MINI_4x6=y
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++
++#
++# Logo configuration
++#
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+@@ -487,82 +821,98 @@
+ # CONFIG_SOUND is not set
+ 
+ #
++# HID Devices
++#
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++
++#
+ # USB support
+ #
+ CONFIG_USB_ARCH_HAS_HCD=y
+ CONFIG_USB_ARCH_HAS_OHCI=y
++# CONFIG_USB_ARCH_HAS_EHCI is not set
+ CONFIG_USB=y
+-CONFIG_USB_DEBUG=y
++# CONFIG_USB_DEBUG is not set
+ 
+ #
+ # Miscellaneous USB options
+ #
+ CONFIG_USB_DEVICEFS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_OTG is not set
+ 
+ #
+ # USB Host Controller Drivers
+ #
+ # CONFIG_USB_ISP116X_HCD is not set
+ CONFIG_USB_OHCI_HCD=y
+-# CONFIG_USB_OHCI_BIG_ENDIAN is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+ # CONFIG_USB_SL811_HCD is not set
+ 
+ #
+ # USB Device Class drivers
+ #
+-# CONFIG_USB_BLUETOOTH_TTY is not set
+ # CONFIG_USB_ACM is not set
+ # CONFIG_USB_PRINTER is not set
+ 
+ #
+-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# may also be needed; see USB_STORAGE Help for more information
+ #
+ CONFIG_USB_STORAGE=y
+-CONFIG_USB_STORAGE_DEBUG=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
+ # CONFIG_USB_STORAGE_FREECOM is not set
+ # CONFIG_USB_STORAGE_DPCM is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++CONFIG_USB_LIBUSUAL=y
+ 
+ #
+ # USB Input Devices
+ #
+-# CONFIG_USB_HID is not set
+-
+-#
+-# USB HID Boot Protocol drivers
+-#
+-# CONFIG_USB_KBD is not set
+-# CONFIG_USB_MOUSE is not set
++CONFIG_USB_HID=y
++# CONFIG_USB_HIDINPUT_POWERBOOK is not set
++# CONFIG_HID_FF is not set
++# CONFIG_USB_HIDDEV is not set
+ # CONFIG_USB_AIPTEK is not set
+ # CONFIG_USB_WACOM is not set
+ # CONFIG_USB_ACECAD is not set
+ # CONFIG_USB_KBTAB is not set
+ # CONFIG_USB_POWERMATE is not set
+-# CONFIG_USB_MTOUCH is not set
+-# CONFIG_USB_ITMTOUCH is not set
+-# CONFIG_USB_EGALAX is not set
++# CONFIG_USB_TOUCHSCREEN is not set
++# CONFIG_USB_YEALINK is not set
+ # CONFIG_USB_XPAD is not set
+ # CONFIG_USB_ATI_REMOTE is not set
++# CONFIG_USB_ATI_REMOTE2 is not set
++# CONFIG_USB_KEYSPAN_REMOTE is not set
++# CONFIG_USB_APPLETOUCH is not set
++# CONFIG_USB_GTCO is not set
+ 
+ #
+ # USB Imaging devices
+ #
++# CONFIG_USB_MDC800 is not set
+ # CONFIG_USB_MICROTEK is not set
+ 
+ #
+-# USB Multimedia devices
+-#
+-# CONFIG_USB_DABUSB is not set
+-
+-#
+-# Video4Linux support is needed for USB Multimedia device support
+-#
+-
+-#
+ # USB Network Adapters
+ #
++# CONFIG_USB_CATC is not set
+ # CONFIG_USB_KAWETH is not set
+ # CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET_MII is not set
+ # CONFIG_USB_USBNET is not set
+ # CONFIG_USB_MON is not set
+ 
+@@ -580,12 +930,23 @@
+ #
+ # CONFIG_USB_EMI62 is not set
+ # CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_AUERSWALD is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
+ # CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
+ # CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
+ # CONFIG_USB_CYTHERM is not set
+-# CONFIG_USB_PHIDGETKIT is not set
+-# CONFIG_USB_PHIDGETSERVO is not set
++# CONFIG_USB_PHIDGET is not set
+ # CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
+ 
+ #
+ # USB DSL modem support
+@@ -599,36 +960,51 @@
+ #
+ # MMC/SD Card support
+ #
+-# CONFIG_MMC is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_AT91=y
++
++#
++# Real Time Clock
++#
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_CLASS is not set
+ 
+ #
+ # File systems
+ #
+ CONFIG_EXT2_FS=y
+ CONFIG_EXT2_FS_XATTR=y
+-# CONFIG_EXT2_FS_POSIX_ACL is not set
+-# CONFIG_EXT2_FS_SECURITY is not set
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
+ # CONFIG_EXT2_FS_XIP is not set
+ CONFIG_EXT3_FS=y
+ CONFIG_EXT3_FS_XATTR=y
+-# CONFIG_EXT3_FS_POSIX_ACL is not set
+-# CONFIG_EXT3_FS_SECURITY is not set
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++# CONFIG_EXT4DEV_FS is not set
+ CONFIG_JBD=y
+ # CONFIG_JBD_DEBUG is not set
+ CONFIG_FS_MBCACHE=y
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+-
+-#
+-# XFS support
+-#
++CONFIG_FS_POSIX_ACL=y
+ # CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_QUOTA is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++CONFIG_QUOTA=y
++# CONFIG_QFMT_V1 is not set
++CONFIG_QFMT_V2=y
++CONFIG_QUOTACTL=y
+ CONFIG_DNOTIFY=y
+-CONFIG_AUTOFS_FS=y
++# CONFIG_AUTOFS_FS is not set
+ CONFIG_AUTOFS4_FS=y
++# CONFIG_FUSE_FS is not set
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -643,25 +1019,40 @@
+ CONFIG_MSDOS_FS=y
+ CONFIG_VFAT_FS=y
+ CONFIG_FAT_DEFAULT_CODEPAGE=437
+-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
+ # CONFIG_NTFS_FS is not set
+ 
+ #
+ # Pseudo filesystems
+ #
+ CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
+ CONFIG_SYSFS=y
+-CONFIG_DEVPTS_FS_XATTR=y
+-# CONFIG_DEVPTS_FS_SECURITY is not set
+ CONFIG_TMPFS=y
+-# CONFIG_TMPFS_XATTR is not set
++# CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+ CONFIG_RAMFS=y
++CONFIG_CONFIGFS_FS=y
+ 
+ #
+ # Miscellaneous filesystems
+ #
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
+ # CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+ # CONFIG_VXFS_FS is not set
+ # CONFIG_HPFS_FS is not set
+@@ -675,16 +1066,23 @@
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
++CONFIG_NFS_V4=y
++# CONFIG_NFS_DIRECTIO is not set
+ # CONFIG_NFSD is not set
+ CONFIG_ROOT_NFS=y
+ CONFIG_LOCKD=y
+ CONFIG_LOCKD_V4=y
+ CONFIG_NFS_COMMON=y
+ CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=y
++CONFIG_RPCSEC_GSS_KRB5=y
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
+ # CONFIG_SMB_FS is not set
+ # CONFIG_CIFS is not set
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+@@ -734,26 +1132,51 @@
+ # CONFIG_NLS_ISO8859_15 is not set
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+-# CONFIG_NLS_UTF8 is not set
++CONFIG_NLS_UTF8=y
++
++#
++# Distributed Lock Manager
++#
++# CONFIG_DLM is not set
++
++#
++# Profiling support
++#
++# CONFIG_PROFILING is not set
+ 
+ #
+ # Kernel hacking
+ #
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
+-# CONFIG_MAGIC_SYSRQ is not set
+-CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_LOG_BUF_SHIFT=17
++CONFIG_DETECT_SOFTLOCKUP=y
+ # CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_SLAB is not set
+-# CONFIG_DEBUG_SPINLOCK is not set
+-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++CONFIG_DEBUG_SPINLOCK=y
++# CONFIG_DEBUG_MUTEXES is not set
++CONFIG_DEBUG_SPINLOCK_SLEEP=y
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+-# CONFIG_DEBUG_FS is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
+ CONFIG_FRAME_POINTER=y
+-CONFIG_DEBUG_USER=y
+-CONFIG_DEBUG_ERRORS=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_DEBUG_USER is not set
++# CONFIG_DEBUG_ERRORS is not set
+ CONFIG_DEBUG_LL=y
+ # CONFIG_DEBUG_ICEDCC is not set
+ 
+@@ -766,7 +1189,43 @@
+ #
+ # Cryptographic options
+ #
+-# CONFIG_CRYPTO is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_HMAC=m
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=y
++# CONFIG_CRYPTO_SHA1 is not set
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_WP512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_ECB is not set
++CONFIG_CRYPTO_CBC=y
++CONFIG_CRYPTO_PCBC=m
++# CONFIG_CRYPTO_LRW is not set
++CONFIG_CRYPTO_DES=y
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_DEFLATE is not set
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_TEST is not set
+ 
+ #
+ # Hardware crypto devices
+@@ -775,6 +1234,14 @@
+ #
+ # Library routines
+ #
++CONFIG_BITREVERSE=y
+ # CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
+ CONFIG_CRC32=y
+ # CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Kconfig linux-2.6-stable/arch/arm/mach-at91/Kconfig
+--- linux-2.6.21/arch/arm/mach-at91/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/Kconfig	Wed May  9 10:20:54 2007
+@@ -17,6 +17,9 @@
+ config ARCH_AT91SAM9263
+ 	bool "AT91SAM9263"
+ 
++config ARCH_AT91SAM9RL
++	bool "AT91SAM9RL"
++
+ endchoice
+ 
+ # ----------------------------------------------------------
+@@ -87,6 +90,12 @@
+ 	help
+ 	  Select this if you are using Sperry-Sun's KAFA board.
+ 
++config MACH_CHUB
++	bool "Promwad Chub board"
++	depends on ARCH_AT91RM9200
++	help
++	  Select this if you are using Promwad's Chub board.
++
+ endif
+ 
+ # ----------------------------------------------------------
+@@ -111,6 +120,13 @@
+ 	  Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
+ 	  <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
+ 
++config MACH_CAM60
++	bool "KwikByte CAM60 board"
++	depends on ARCH_AT91SAM9260
++	help
++	  Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260.
++	  <http://www.kwikbyte.com>
++
+ endif
+ 
+ # ----------------------------------------------------------
+@@ -145,6 +161,20 @@
+ 
+ # ----------------------------------------------------------
+ 
++if ARCH_AT91SAM9RL
++
++comment "AT91SAM9RL Board Type"
++
++config MACH_AT91SAM9RLEK
++	bool "Atmel AT91SAM9RL-EK Evaluation Kit"
++	depends on ARCH_AT91SAM9RL
++	help
++	  Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
++
++endif
++
++# ----------------------------------------------------------
++
+ comment "AT91 Board Options"
+ 
+ config MTD_AT91_DATAFLASH_CARD
+@@ -160,6 +190,20 @@
+ 	  On AT91SAM926x boards both types of NAND flash can be present
+ 	  (8 and 16 bit data bus width).
+ 
++config CSB300_WAKE_SW0
++	bool "CSB300 SW0 irq0 wakeup"
++	depends on MACH_CSB337 && PM
++	help
++	  If you have a CSB300 connected to your CSB337, this lets
++	  SW0 serve as a wakeup button.  It uses IRQ0.
++
++config CSB300_WAKE_SW1
++	bool "CSB300 SW1 gpio wakeup"
++	depends on MACH_CSB337 && PM
++	help
++	  If you have a CSB300 connected to your CSB337, this lets
++	  SW1 serve as a wakeup button.  It uses GPIO.
++
+ # ----------------------------------------------------------
+ 
+ comment "AT91 Feature Selections"
+@@ -170,6 +214,20 @@
+ 	  Select this if you need to program one or more of the PCK0..PCK3
+ 	  programmable clock outputs.
+ 
++config ATMEL_TCLIB
++	bool "Timer/Counter Library"
++	help
++	  Select this if you want a library to allocate the Timer/Counter
++	  blocks found on many Atmel processors.  This facilitates using
++	  these modules despite processor differences.
++
++config AT91_SLOW_CLOCK
++	bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)"
++	depends on PM && EXPERIMENTAL
++	help
++	  Select this if you wish to put the CPU into slow clock mode
++	  while in the "Suspend to RAM" state, to save more power.
++
+ endmenu
+ 
+ endif
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/Makefile linux-2.6-stable/arch/arm/mach-at91/Makefile
+--- linux-2.6.21/arch/arm/mach-at91/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/Makefile	Wed May  9 12:37:19 2007
+@@ -8,12 +8,15 @@
+ obj-		:=
+ 
+ obj-$(CONFIG_PM)		+= pm.o
++obj-$(CONFIG_AT91_SLOW_CLOCK)	+= pm_slowclock.o
++obj-$(CONFIG_ATMEL_TCLIB)	+= tclib.o
+ 
+ # CPU-specific support
+ obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
+ obj-$(CONFIG_ARCH_AT91SAM9260)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o
+ obj-$(CONFIG_ARCH_AT91SAM9261)	+= at91sam9261.o at91sam926x_time.o at91sam9261_devices.o
+ obj-$(CONFIG_ARCH_AT91SAM9263)	+= at91sam9263.o at91sam926x_time.o at91sam9263_devices.o
++obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o
+ 
+ # AT91RM9200 board-specific support
+ obj-$(CONFIG_MACH_ONEARM)	+= board-1arm.o
+@@ -25,9 +28,11 @@
+ obj-$(CONFIG_MACH_KB9200)	+= board-kb9202.o
+ obj-$(CONFIG_MACH_ATEB9200)	+= board-eb9200.o
+ obj-$(CONFIG_MACH_KAFA)		+= board-kafa.o
++obj-$(CONFIG_MACH_CHUB)		+= board-chub.o
+ 
+ # AT91SAM9260 board-specific support
+ obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
++obj-$(CONFIG_MACH_CAM60)	+= board-cam60.o
+ 
+ # AT91SAM9261 board-specific support
+ obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
+@@ -35,9 +40,13 @@
+ # AT91SAM9263 board-specific support
+ obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
+ 
++# AT91SAM9RL board-specific support
++obj-$(CONFIG_MACH_AT91SAM9RLEK)	+= board-sam9rlek.o
++
+ # LEDs support
+ led-$(CONFIG_ARCH_AT91RM9200DK)	+= leds.o
+ led-$(CONFIG_MACH_AT91RM9200EK)	+= leds.o
++led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o
+ led-$(CONFIG_MACH_CSB337)	+= leds.o
+ led-$(CONFIG_MACH_CSB637)	+= leds.o
+ led-$(CONFIG_MACH_KB9200)	+= leds.o
+@@ -45,7 +54,7 @@
+ obj-$(CONFIG_LEDS) += $(led-y)
+ 
+ # VGA support
+-#obj-$(CONFIG_FB_S1D13XXX)	+= ics1523.o
++obj-$(CONFIG_FB_S1D13XXX)	+= ics1523.o
+ 
+ 
+ ifeq ($(CONFIG_PM_DEBUG),y)
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c
+--- linux-2.6.21/arch/arm/mach-at91/at91rm9200.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200.c	Tue May  8 12:13:30 2007
+@@ -117,6 +117,21 @@
+ 	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk ssc0_clk = {
++	.name		= "ssc0_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_SSC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc1_clk = {
++	.name		= "ssc1_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_SSC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc2_clk = {
++	.name		= "ssc2_clk",
++	.pmc_mask	= 1 << AT91RM9200_ID_SSC2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk tc0_clk = {
+ 	.name		= "tc0_clk",
+ 	.pmc_mask	= 1 << AT91RM9200_ID_TC0,
+@@ -161,7 +176,9 @@
+ 	&udc_clk,
+ 	&twi_clk,
+ 	&spi_clk,
+-	// ssc 0 .. ssc2
++	&ssc0_clk,
++	&ssc1_clk,
++	&ssc2_clk,
+ 	&tc0_clk,
+ 	&tc1_clk,
+ 	&tc2_clk,
+@@ -250,6 +267,33 @@
+ 
+ 
+ /* --------------------------------------------------------------------
++ *  Timer/Counter library initialization
++ * -------------------------------------------------------------------- */
++#ifdef CONFIG_ATMEL_TCLIB
++
++#include "tclib.h"
++
++static struct atmel_tcblock at91rm9200_tcblocks[] = {
++	[0] = {
++		.physaddr	= AT91RM9200_BASE_TCB0,
++		.irq		= { AT91RM9200_ID_TC0, AT91RM9200_ID_TC1, AT91RM9200_ID_TC2 },
++		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
++	},
++	[1] = {
++		.physaddr	= AT91RM9200_BASE_TCB1,
++		.irq		= { AT91RM9200_ID_TC3, AT91RM9200_ID_TC4, AT91RM9200_ID_TC5 },
++		.clk		= { &tc3_clk, &tc4_clk, &tc5_clk },
++	},
++};
++
++#define at91rm9200_tc_init()	atmel_tc_init(at91rm9200_tcblocks, ARRAY_SIZE(at91rm9200_tcblocks))
++
++#else
++#define at91rm9200_tc_init()	do {} while(0)
++#endif
++
++
++/* --------------------------------------------------------------------
+  *  AT91RM9200 processor initialization
+  * -------------------------------------------------------------------- */
+ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
+@@ -271,6 +315,9 @@
+ 
+ 	/* Initialize GPIO subsystem */
+ 	at91_gpio_init(at91rm9200_gpio, banks);
++
++	/* Initialize the Timer/Counter blocks */
++	at91rm9200_tc_init();
+ }
+ 
+ 
+@@ -284,28 +331,28 @@
+ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
+ 	7,	/* Advanced Interrupt Controller (FIQ) */
+ 	7,	/* System Peripherals */
+-	0,	/* Parallel IO Controller A */
+-	0,	/* Parallel IO Controller B */
+-	0,	/* Parallel IO Controller C */
+-	0,	/* Parallel IO Controller D */
+-	6,	/* USART 0 */
+-	6,	/* USART 1 */
+-	6,	/* USART 2 */
+-	6,	/* USART 3 */
++	1,	/* Parallel IO Controller A */
++	1,	/* Parallel IO Controller B */
++	1,	/* Parallel IO Controller C */
++	1,	/* Parallel IO Controller D */
++	5,	/* USART 0 */
++	5,	/* USART 1 */
++	5,	/* USART 2 */
++	5,	/* USART 3 */
+ 	0,	/* Multimedia Card Interface */
+-	4,	/* USB Device Port */
+-	0,	/* Two-Wire Interface */
+-	6,	/* Serial Peripheral Interface */
+-	5,	/* Serial Synchronous Controller 0 */
+-	5,	/* Serial Synchronous Controller 1 */
+-	5,	/* Serial Synchronous Controller 2 */
++	2,	/* USB Device Port */
++	6,	/* Two-Wire Interface */
++	5,	/* Serial Peripheral Interface */
++	4,	/* Serial Synchronous Controller 0 */
++	4,	/* Serial Synchronous Controller 1 */
++	4,	/* Serial Synchronous Controller 2 */
+ 	0,	/* Timer Counter 0 */
+ 	0,	/* Timer Counter 1 */
+ 	0,	/* Timer Counter 2 */
+ 	0,	/* Timer Counter 3 */
+ 	0,	/* Timer Counter 4 */
+ 	0,	/* Timer Counter 5 */
+-	3,	/* USB Host port */
++	2,	/* USB Host port */
+ 	3,	/* Ethernet MAC */
+ 	0,	/* Advanced Interrupt Controller (IRQ0) */
+ 	0,	/* Advanced Interrupt Controller (IRQ1) */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c
+--- linux-2.6.21/arch/arm/mach-at91/at91rm9200_devices.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91rm9200_devices.c	Tue May  8 12:13:30 2007
+@@ -480,7 +480,18 @@
+  *  SPI
+  * -------------------------------------------------------------------- */
+ 
+-#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
++#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)		/* legacy SPI driver */
++#define SPI_DEVNAME	"at91_spi"
++
++#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE)	/* SPI bitbanging driver */
++#define SPI_DEVNAME	"at91_spi"
++
++#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)	/* new SPI driver */
++#define SPI_DEVNAME	"atmel_spi"
++
++#endif
++
++#ifdef SPI_DEVNAME
+ static u64 spi_dmamask = 0xffffffffUL;
+ 
+ static struct resource spi_resources[] = {
+@@ -497,7 +508,7 @@
+ };
+ 
+ static struct platform_device at91rm9200_spi_device = {
+-	.name		= "at91_spi",
++	.name		= SPI_DEVNAME,
+ 	.id		= 0,
+ 	.dev		= {
+ 				.dma_mask		= &spi_dmamask,
+@@ -606,6 +617,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9260.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260.c	Tue May  8 12:13:30 2007
+@@ -119,6 +119,11 @@
+ 	.pmc_mask	= 1 << AT91SAM9260_ID_SPI1,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk ssc_clk = {
++	.name		= "ssc_clk",
++	.pmc_mask	= 1 << AT91SAM9260_ID_SSC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk tc0_clk = {
+ 	.name		= "tc0_clk",
+ 	.pmc_mask	= 1 << AT91SAM9260_ID_TC0,
+@@ -193,7 +198,7 @@
+ 	&twi_clk,
+ 	&spi0_clk,
+ 	&spi1_clk,
+-	// ssc
++	&ssc_clk,
+ 	&tc0_clk,
+ 	&tc1_clk,
+ 	&tc2_clk,
+@@ -264,6 +269,33 @@
+ 
+ 
+ /* --------------------------------------------------------------------
++ *  Timer/Counter library initialization
++ * -------------------------------------------------------------------- */
++#ifdef CONFIG_ATMEL_TCLIB
++
++#include "tclib.h"
++
++static struct atmel_tcblock at91sam9260_tcblocks[] = {
++	[0] = {
++		.physaddr	= AT91SAM9260_BASE_TCB0,
++		.irq		= { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 },
++		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
++	},
++	[1] = {
++		.physaddr	= AT91SAM9260_BASE_TCB1,
++		.irq		= { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 },
++		.clk		= { &tc3_clk, &tc4_clk, &tc5_clk },
++	},
++};
++
++#define at91sam9260_tc_init()	atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks))
++
++#else
++#define at91sam9260_tc_init()	do {} while(0)
++#endif
++
++
++/* --------------------------------------------------------------------
+  *  AT91SAM9260 processor initialization
+  * -------------------------------------------------------------------- */
+ 
+@@ -310,6 +342,9 @@
+ 
+ 	/* Register GPIO subsystem */
+ 	at91_gpio_init(at91sam9260_gpio, 3);
++
++	/* Initialize the Timer/Counter blocks */
++	at91sam9260_tc_init();
+ }
+ 
+ /* --------------------------------------------------------------------
+@@ -322,30 +357,30 @@
+ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
+ 	7,	/* Advanced Interrupt Controller */
+ 	7,	/* System Peripherals */
+-	0,	/* Parallel IO Controller A */
+-	0,	/* Parallel IO Controller B */
+-	0,	/* Parallel IO Controller C */
++	1,	/* Parallel IO Controller A */
++	1,	/* Parallel IO Controller B */
++	1,	/* Parallel IO Controller C */
+ 	0,	/* Analog-to-Digital Converter */
+-	6,	/* USART 0 */
+-	6,	/* USART 1 */
+-	6,	/* USART 2 */
++	5,	/* USART 0 */
++	5,	/* USART 1 */
++	5,	/* USART 2 */
+ 	0,	/* Multimedia Card Interface */
+-	4,	/* USB Device Port */
+-	0,	/* Two-Wire Interface */
+-	6,	/* Serial Peripheral Interface 0 */
+-	6,	/* Serial Peripheral Interface 1 */
++	2,	/* USB Device Port */
++	6,	/* Two-Wire Interface */
++	5,	/* Serial Peripheral Interface 0 */
++	5,	/* Serial Peripheral Interface 1 */
+ 	5,	/* Serial Synchronous Controller */
+ 	0,
+ 	0,
+ 	0,	/* Timer Counter 0 */
+ 	0,	/* Timer Counter 1 */
+ 	0,	/* Timer Counter 2 */
+-	3,	/* USB Host port */
++	2,	/* USB Host port */
+ 	3,	/* Ethernet */
+ 	0,	/* Image Sensor Interface */
+-	6,	/* USART 3 */
+-	6,	/* USART 4 */
+-	6,	/* USART 5 */
++	5,	/* USART 3 */
++	5,	/* USART 4 */
++	5,	/* USART 5 */
+ 	0,	/* Timer Counter 3 */
+ 	0,	/* Timer Counter 4 */
+ 	0,	/* Timer Counter 5 */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9260_devices.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9260_devices.c	Tue May  8 12:13:30 2007
+@@ -527,6 +527,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9261.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261.c	Tue May  8 12:13:30 2007
+@@ -97,6 +97,21 @@
+ 	.pmc_mask	= 1 << AT91SAM9261_ID_SPI1,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk ssc0_clk = {
++	.name		= "ssc0_clk",
++	.pmc_mask	= 1 << AT91SAM9261_ID_SSC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc1_clk = {
++	.name		= "ssc1_clk",
++	.pmc_mask	= 1 << AT91SAM9261_ID_SSC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc2_clk = {
++	.name		= "ssc2_clk",
++	.pmc_mask	= 1 << AT91SAM9261_ID_SSC2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk tc0_clk = {
+ 	.name		= "tc0_clk",
+ 	.pmc_mask	= 1 << AT91SAM9261_ID_TC0,
+@@ -135,7 +150,9 @@
+ 	&twi_clk,
+ 	&spi0_clk,
+ 	&spi1_clk,
+-	// ssc 0 .. ssc2
++	&ssc0_clk,
++	&ssc1_clk,
++	&ssc2_clk,
+ 	&tc0_clk,
+ 	&tc1_clk,
+ 	&tc2_clk,
+@@ -230,6 +247,28 @@
+ 
+ 
+ /* --------------------------------------------------------------------
++ *  Timer/Counter library initialization
++ * -------------------------------------------------------------------- */
++#ifdef CONFIG_ATMEL_TCLIB
++
++#include "tclib.h"
++
++static struct atmel_tcblock at91sam9261_tcblocks[] = {
++	[0] = {
++		.physaddr	= AT91SAM9261_BASE_TCB0,
++		.irq		= { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 },
++		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
++	}
++};
++
++#define at91sam9261_tc_init()	atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks))
++
++#else
++#define at91sam9261_tc_init()	do {} while(0)
++#endif
++
++
++/* --------------------------------------------------------------------
+  *  AT91SAM9261 processor initialization
+  * -------------------------------------------------------------------- */
+ 
+@@ -250,6 +289,9 @@
+ 
+ 	/* Register GPIO subsystem */
+ 	at91_gpio_init(at91sam9261_gpio, 3);
++
++	/* Initialize the Timer/Counter blocks */
++	at91sam9261_tc_init();
+ }
+ 
+ /* --------------------------------------------------------------------
+@@ -262,25 +304,25 @@
+ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
+ 	7,	/* Advanced Interrupt Controller */
+ 	7,	/* System Peripherals */
+-	0,	/* Parallel IO Controller A */
+-	0,	/* Parallel IO Controller B */
+-	0,	/* Parallel IO Controller C */
++	1,	/* Parallel IO Controller A */
++	1,	/* Parallel IO Controller B */
++	1,	/* Parallel IO Controller C */
+ 	0,
+-	6,	/* USART 0 */
+-	6,	/* USART 1 */
+-	6,	/* USART 2 */
++	5,	/* USART 0 */
++	5,	/* USART 1 */
++	5,	/* USART 2 */
+ 	0,	/* Multimedia Card Interface */
+-	4,	/* USB Device Port */
+-	0,	/* Two-Wire Interface */
+-	6,	/* Serial Peripheral Interface 0 */
+-	6,	/* Serial Peripheral Interface 1 */
+-	5,	/* Serial Synchronous Controller 0 */
+-	5,	/* Serial Synchronous Controller 1 */
+-	5,	/* Serial Synchronous Controller 2 */
++	2,	/* USB Device Port */
++	6,	/* Two-Wire Interface */
++	5,	/* Serial Peripheral Interface 0 */
++	5,	/* Serial Peripheral Interface 1 */
++	4,	/* Serial Synchronous Controller 0 */
++	4,	/* Serial Synchronous Controller 1 */
++	4,	/* Serial Synchronous Controller 2 */
+ 	0,	/* Timer Counter 0 */
+ 	0,	/* Timer Counter 1 */
+ 	0,	/* Timer Counter 2 */
+-	3,	/* USB Host port */
++	2,	/* USB Host port */
+ 	3,	/* LCD Controller */
+ 	0,
+ 	0,
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9261_devices.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9261_devices.c	Tue May  8 12:56:33 2007
+@@ -14,6 +14,9 @@
+ #include <asm/mach/map.h>
+ 
+ #include <linux/platform_device.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/arch/board.h>
+ #include <asm/arch/gpio.h>
+@@ -430,9 +433,9 @@
+  *  LCD Controller
+  * -------------------------------------------------------------------- */
+ 
+-#if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
+ static u64 lcdc_dmamask = 0xffffffffUL;
+-static struct at91fb_info lcdc_data;
++static struct atmel_lcdfb_info lcdc_data;
+ 
+ static struct resource lcdc_resources[] = {
+ 	[0] = {
+@@ -455,7 +458,7 @@
+ };
+ 
+ static struct platform_device at91_lcdc_device = {
+-	.name		= "at91-fb",
++	.name		= "atmel_lcdfb",
+ 	.id		= 0,
+ 	.dev		= {
+ 				.dma_mask		= &lcdc_dmamask,
+@@ -466,7 +469,7 @@
+ 	.num_resources	= ARRAY_SIZE(lcdc_resources),
+ };
+ 
+-void __init at91_add_device_lcdc(struct at91fb_info *data)
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
+ {
+ 	if (!data) {
+ 		return;
+@@ -499,7 +502,7 @@
+ 	platform_device_register(&at91_lcdc_device);
+ }
+ #else
+-void __init at91_add_device_lcdc(struct at91fb_info *data) {}
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
+ #endif
+ 
+ 
+@@ -525,6 +528,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9263.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263.c	Tue May  8 12:13:30 2007
+@@ -87,6 +87,11 @@
+ 	.pmc_mask	= 1 << AT91SAM9263_ID_MCI1,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk can_clk = {
++	.name		= "can_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_CAN,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk twi_clk = {
+ 	.name		= "twi_clk",
+ 	.pmc_mask	= 1 << AT91SAM9263_ID_TWI,
+@@ -102,16 +107,46 @@
+ 	.pmc_mask	= 1 << AT91SAM9263_ID_SPI1,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk ssc0_clk = {
++	.name		= "ssc0_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_SSC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc1_clk = {
++	.name		= "ssc1_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_SSC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ac97_clk = {
++	.name		= "ac97_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_AC97C,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk tcb_clk = {
+ 	.name		= "tcb_clk",
+ 	.pmc_mask	= 1 << AT91SAM9263_ID_TCB,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk pwmc_clk = {
++	.name		= "pwmc_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_PWMC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk macb_clk = {
+ 	.name		= "macb_clk",
+ 	.pmc_mask	= 1 << AT91SAM9263_ID_EMAC,
+ 	.type		= CLK_TYPE_PERIPHERAL,
+ };
++static struct clk dma_clk = {
++	.name		= "dma_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_DMA,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk twodge_clk = {
++	.name		= "2dge_clk",
++	.pmc_mask	= 1 << AT91SAM9263_ID_2DGE,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
+ static struct clk udc_clk = {
+ 	.name		= "udc_clk",
+ 	.pmc_mask	= 1 << AT91SAM9263_ID_UDP,
+@@ -142,20 +177,21 @@
+ 	&usart2_clk,
+ 	&mmc0_clk,
+ 	&mmc1_clk,
+-	// can
++	&can_clk,
+ 	&twi_clk,
+ 	&spi0_clk,
+ 	&spi1_clk,
+-	// ssc0 .. ssc1
+-	// ac97
++	&ssc0_clk,
++	&ssc1_clk,
++	&ac97_clk,
+ 	&tcb_clk,
+-	// pwmc
++	&pwmc_clk,
+ 	&macb_clk,
+-	// 2dge
++	&twodge_clk,
+ 	&udc_clk,
+ 	&isi_clk,
+ 	&lcdc_clk,
+-	// dma
++	&dma_clk,
+ 	&ohci_clk,
+ 	// irq0 .. irq1
+ };
+@@ -237,6 +273,28 @@
+ 
+ 
+ /* --------------------------------------------------------------------
++ *  Timer/Counter library initialization
++ * -------------------------------------------------------------------- */
++#ifdef CONFIG_ATMEL_TCLIB
++
++#include "tclib.h"
++
++static struct atmel_tcblock at91sam9263_tcblocks[] = {
++	[0] = {
++		.physaddr	= AT91SAM9263_BASE_TCB0,
++		.irq		= { AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB },
++		.clk		= { &tcb_clk, &tcb_clk, &tcb_clk },
++	}
++};
++
++#define at91sam9263_tc_init()	atmel_tc_init(at91sam9263_tcblocks, ARRAY_SIZE(at91sam9263_tcblocks))
++
++#else
++#define at91sam9263_tc_init()	do {} while(0)
++#endif
++
++
++/* --------------------------------------------------------------------
+  *  AT91SAM9263 processor initialization
+  * -------------------------------------------------------------------- */
+ 
+@@ -256,6 +314,9 @@
+ 
+ 	/* Register GPIO subsystem */
+ 	at91_gpio_init(at91sam9263_gpio, 5);
++
++	/* Initialize the Timer/Counter blocks */
++	at91sam9263_tc_init();
+ }
+ 
+ /* --------------------------------------------------------------------
+@@ -268,34 +329,34 @@
+ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
+ 	7,	/* Advanced Interrupt Controller (FIQ) */
+ 	7,	/* System Peripherals */
+-	0,	/* Parallel IO Controller A */
+-	0,	/* Parallel IO Controller B */
+-	0,	/* Parallel IO Controller C, D and E */
++	1,	/* Parallel IO Controller A */
++	1,	/* Parallel IO Controller B */
++	1,	/* Parallel IO Controller C, D and E */
+ 	0,
+ 	0,
+-	6,	/* USART 0 */
+-	6,	/* USART 1 */
+-	6,	/* USART 2 */
++	5,	/* USART 0 */
++	5,	/* USART 1 */
++	5,	/* USART 2 */
+ 	0,	/* Multimedia Card Interface 0 */
+ 	0,	/* Multimedia Card Interface 1 */
+-	4,	/* CAN */
+-	0,	/* Two-Wire Interface */
+-	6,	/* Serial Peripheral Interface 0 */
+-	6,	/* Serial Peripheral Interface 1 */
+-	5,	/* Serial Synchronous Controller 0 */
+-	5,	/* Serial Synchronous Controller 1 */
+-	6,	/* AC97 Controller */
++	3,	/* CAN */
++	6,	/* Two-Wire Interface */
++	5,	/* Serial Peripheral Interface 0 */
++	5,	/* Serial Peripheral Interface 1 */
++	4,	/* Serial Synchronous Controller 0 */
++	4,	/* Serial Synchronous Controller 1 */
++	5,	/* AC97 Controller */
+ 	0,	/* Timer Counter 0, 1 and 2 */
+ 	0,	/* Pulse Width Modulation Controller */
+ 	3,	/* Ethernet */
+ 	0,
+ 	0,	/* 2D Graphic Engine */
+-	3,	/* USB Device Port */
++	2,	/* USB Device Port */
+ 	0,	/* Image Sensor Interface */
+ 	3,	/* LDC Controller */
+ 	0,	/* DMA Controller */
+ 	0,
+-	3,	/* USB Host port */
++	2,	/* USB Host port */
+ 	0,	/* Advanced Interrupt Controller (IRQ0) */
+ 	0,	/* Advanced Interrupt Controller (IRQ1) */
+ };
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9263_devices.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9263_devices.c	Thu May 10 12:23:46 2007
+@@ -13,6 +13,9 @@
+ #include <asm/mach/map.h>
+ 
+ #include <linux/platform_device.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/arch/board.h>
+ #include <asm/arch/gpio.h>
+@@ -573,6 +576,180 @@
+ 
+ 
+ /* --------------------------------------------------------------------
++ *  AC97
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
++static u64 ac97_dmamask = 0xffffffffUL;
++static struct atmel_ac97_data ac97_data;
++
++static struct resource ac97_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_AC97C,
++		.end	= AT91SAM9263_BASE_AC97C + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_AC97C,
++		.end	= AT91SAM9263_ID_AC97C,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_ac97_device = {
++	.name		= "ac97c",
++	.id		= 1,
++	.dev		= {
++				.dma_mask		= &ac97_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &ac97_data,
++	},
++	.resource	= ac97_resources,
++	.num_resources	= ARRAY_SIZE(ac97_resources),
++};
++
++void __init at91_add_device_ac97(struct atmel_ac97_data *data)
++{
++	if (!data)
++		return;
++
++	at91_set_A_periph(AT91_PIN_PB0, 0);	/* AC97FS */
++	at91_set_A_periph(AT91_PIN_PB1, 0);	/* AC97CK */
++	at91_set_A_periph(AT91_PIN_PB2, 0);	/* AC97TX */
++	at91_set_A_periph(AT91_PIN_PB3, 0);	/* AC97RX */
++
++	/* reset */
++	if (data->reset_pin)
++		at91_set_gpio_output(data->reset_pin, 0);
++
++	ac97_data = *ek_data;
++	platform_device_register(&at91sam9263_ac97_device);
++}
++#else
++void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  Image Sensor Interface
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
++
++struct resource isi_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_BASE_ISI,
++		.end	= AT91SAM9263_BASE_ISI + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_ISI,
++		.end	= AT91SAM9263_ID_ISI,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9263_isi_device = {
++	.name		= "at91_isi",
++	.id		= -1,
++	.resource	= isi_resources,
++	.num_resources	= ARRAY_SIZE(isi_resources),
++};
++
++void __init at91_add_device_isi(void)
++{
++	at91_set_A_periph(AT91_PIN_PE0, 0);	/* ISI_D0 */
++	at91_set_A_periph(AT91_PIN_PE1, 0);	/* ISI_D1 */
++	at91_set_A_periph(AT91_PIN_PE2, 0);	/* ISI_D2 */
++	at91_set_A_periph(AT91_PIN_PE3, 0);	/* ISI_D3 */
++	at91_set_A_periph(AT91_PIN_PE4, 0);	/* ISI_D4 */
++	at91_set_A_periph(AT91_PIN_PE5, 0);	/* ISI_D5 */
++	at91_set_A_periph(AT91_PIN_PE6, 0);	/* ISI_D6 */
++	at91_set_A_periph(AT91_PIN_PE7, 0);	/* ISI_D7 */
++	at91_set_A_periph(AT91_PIN_PE8, 0);	/* ISI_PCK */
++	at91_set_A_periph(AT91_PIN_PE9, 0);	/* ISI_HSYNC */
++	at91_set_A_periph(AT91_PIN_PE10, 0);	/* ISI_VSYNC */
++	at91_set_B_periph(AT91_PIN_PE11, 0);	/* ISI_MCK (PCK3) */
++	at91_set_B_periph(AT91_PIN_PE12, 0);	/* ISI_PD8 */
++	at91_set_B_periph(AT91_PIN_PE13, 0);	/* ISI_PD9 */
++	at91_set_B_periph(AT91_PIN_PE14, 0);	/* ISI_PD10 */
++	at91_set_B_periph(AT91_PIN_PE15, 0);	/* ISI_PD11 */
++}
++#else
++void __init at91_add_device_isi(void) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  LCD Controller
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static u64 lcdc_dmamask = 0xffffffffUL;
++static struct atmel_lcdfb_info lcdc_data;
++
++static struct resource lcdc_resources[] = {
++	[0] = {
++		.start	= AT91SAM9263_LCDC_BASE,
++		.end	= AT91SAM9263_LCDC_BASE + SZ_4K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9263_ID_LCDC,
++		.end	= AT91SAM9263_ID_LCDC,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91_lcdc_device = {
++	.name		= "atmel_lcdfb",
++	.id		= 0,
++	.dev		= {
++				.dma_mask		= &lcdc_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &lcdc_data,
++	},
++	.resource	= lcdc_resources,
++	.num_resources	= ARRAY_SIZE(lcdc_resources),
++};
++
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
++{
++	if (!data)
++		return;
++
++	at91_set_A_periph(AT91_PIN_PC1, 0);	/* LCDHSYNC */
++	at91_set_A_periph(AT91_PIN_PC2, 0);	/* LCDDOTCK */
++	at91_set_A_periph(AT91_PIN_PC3, 0);	/* LCDDEN */
++	at91_set_B_periph(AT91_PIN_PB9, 0);	/* LCDCC */
++	at91_set_A_periph(AT91_PIN_PC6, 0);	/* LCDD2 */
++	at91_set_A_periph(AT91_PIN_PC7, 0);	/* LCDD3 */
++	at91_set_A_periph(AT91_PIN_PC8, 0);	/* LCDD4 */
++	at91_set_A_periph(AT91_PIN_PC9, 0);	/* LCDD5 */
++	at91_set_A_periph(AT91_PIN_PC10, 0);	/* LCDD6 */
++	at91_set_A_periph(AT91_PIN_PC11, 0);	/* LCDD7 */
++	at91_set_A_periph(AT91_PIN_PC14, 0);	/* LCDD10 */
++	at91_set_A_periph(AT91_PIN_PC15, 0);	/* LCDD11 */
++	at91_set_A_periph(AT91_PIN_PC16, 0);	/* LCDD12 */
++	at91_set_B_periph(AT91_PIN_PC12, 0);	/* LCDD13 */
++	at91_set_A_periph(AT91_PIN_PC18, 0);	/* LCDD14 */
++	at91_set_A_periph(AT91_PIN_PC19, 0);	/* LCDD15 */
++	at91_set_A_periph(AT91_PIN_PC22, 0);	/* LCDD18 */
++	at91_set_A_periph(AT91_PIN_PC23, 0);	/* LCDD19 */
++	at91_set_A_periph(AT91_PIN_PC24, 0);	/* LCDD20 */
++	at91_set_B_periph(AT91_PIN_PC17, 0);	/* LCDD21 */
++	at91_set_A_periph(AT91_PIN_PC26, 0);	/* LCDD22 */
++	at91_set_A_periph(AT91_PIN_PC27, 0);	/* LCDD23 */
++
++	lcdc_data = *data;
++	platform_device_register(&at91_lcdc_device);
++}
++#else
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
+  *  LEDs
+  * -------------------------------------------------------------------- */
+ 
+@@ -594,6 +771,32 @@
+ #endif
+ 
+ 
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
+ /* --------------------------------------------------------------------
+  *  UART
+  * -------------------------------------------------------------------- */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9rl.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl.c	Fri May 11 15:48:14 2007
+@@ -0,0 +1,366 @@
++/*
++ * arch/arm/mach-at91/at91sam9rl.c
++ *
++ *  Copyright (C) 2005 SAN People
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#include <linux/module.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/arch/cpu.h>
++#include <asm/arch/at91sam9rl.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91_rstc.h>
++
++#include "generic.h"
++#include "clock.h"
++
++static struct map_desc at91sam9rl_io_desc[] __initdata = {
++	{
++		.virtual	= AT91_VA_BASE_SYS,
++		.pfn		= __phys_to_pfn(AT91_BASE_SYS),
++		.length		= SZ_16K,
++		.type		= MT_DEVICE,
++	},
++};
++
++static struct map_desc at91sam9rl_sram_desc[] __initdata = {
++	{
++		.pfn		= __phys_to_pfn(AT91SAM9RL_SRAM_BASE),
++		.type		= MT_DEVICE,
++	}
++};
++
++/* --------------------------------------------------------------------
++ *  Clocks
++ * -------------------------------------------------------------------- */
++
++/*
++ * The peripheral clocks.
++ */
++static struct clk pioA_clk = {
++	.name		= "pioA_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOA,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk pioB_clk = {
++	.name		= "pioB_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOB,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk pioC_clk = {
++	.name		= "pioC_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk pioD_clk = {
++	.name		= "pioD_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_PIOD,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart0_clk = {
++	.name		= "usart0_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_US0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart1_clk = {
++	.name		= "usart1_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_US1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart2_clk = {
++	.name		= "usart2_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_US2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk usart3_clk = {
++	.name		= "usart3_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_US3,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk mmc_clk = {
++	.name		= "mci_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_MCI,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk twi0_clk = {
++	.name		= "twi0_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_TWI0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk twi1_clk = {
++	.name		= "twi1_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_TWI1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk spi_clk = {
++	.name		= "spi_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_SPI,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc0_clk = {
++	.name		= "ssc0_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_SSC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ssc1_clk = {
++	.name		= "ssc1_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_SSC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc0_clk = {
++	.name		= "tc0_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_TC0,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc1_clk = {
++	.name		= "tc1_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_TC1,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tc2_clk = {
++	.name		= "tc2_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_TC2,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk pwmc_clk = {
++	.name		= "pwmc_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_PWMC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk tsc_clk = {
++	.name		= "tsc_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_TSC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk dma_clk = {
++	.name		= "dma_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_DMA,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk udphs_clk = {
++	.name		= "udphs_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_UDPHS,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk lcdc_clk = {
++	.name		= "lcdc_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_LCDC,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++static struct clk ac97_clk = {
++	.name		= "ac97_clk",
++	.pmc_mask	= 1 << AT91SAM9RL_ID_AC97C,
++	.type		= CLK_TYPE_PERIPHERAL,
++};
++
++static struct clk *periph_clocks[] __initdata = {
++	&pioA_clk,
++	&pioB_clk,
++	&pioC_clk,
++	&pioD_clk,
++	&usart0_clk,
++	&usart1_clk,
++	&usart2_clk,
++	&usart3_clk,
++	&mmc_clk,
++	&twi0_clk,
++	&twi1_clk,
++	&spi_clk,
++	&ssc0_clk,
++	&ssc1_clk,
++	&tc0_clk,
++	&tc1_clk,
++	&tc2_clk,
++	&pwmc_clk,
++	&tsc_clk,
++	&dma_clk,
++	&udphs_clk,
++	&lcdc_clk,
++	&ac97_clk,
++	// irq0
++};
++
++/*
++ * The two programmable clocks.
++ * You must configure pin multiplexing to bring these signals out.
++ */
++static struct clk pck0 = {
++	.name		= "pck0",
++	.pmc_mask	= AT91_PMC_PCK0,
++	.type		= CLK_TYPE_PROGRAMMABLE,
++	.id		= 0,
++};
++static struct clk pck1 = {
++	.name		= "pck1",
++	.pmc_mask	= AT91_PMC_PCK1,
++	.type		= CLK_TYPE_PROGRAMMABLE,
++	.id		= 1,
++};
++
++static void __init at91sam9rl_register_clocks(void)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
++		clk_register(periph_clocks[i]);
++
++	clk_register(&pck0);
++	clk_register(&pck1);
++}
++
++/* --------------------------------------------------------------------
++ *  GPIO
++ * -------------------------------------------------------------------- */
++
++static struct at91_gpio_bank at91sam9rl_gpio[] = {
++	{
++		.id		= AT91SAM9RL_ID_PIOA,
++		.offset		= AT91_PIOA,
++		.clock		= &pioA_clk,
++	}, {
++		.id		= AT91SAM9RL_ID_PIOB,
++		.offset		= AT91_PIOB,
++		.clock		= &pioB_clk,
++	}, {
++		.id		= AT91SAM9RL_ID_PIOC,
++		.offset		= AT91_PIOC,
++		.clock		= &pioC_clk,
++	}, {
++		.id		= AT91SAM9RL_ID_PIOD,
++		.offset		= AT91_PIOD,
++		.clock		= &pioD_clk,
++	}
++};
++
++static void at91sam9rl_reset(void)
++{
++	at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
++}
++
++
++/* --------------------------------------------------------------------
++ *  Timer/Counter library initialization
++ * -------------------------------------------------------------------- */
++#ifdef CONFIG_ATMEL_TCLIB
++
++#include "tclib.h"
++
++static struct atmel_tcblock at91sam9rl_tcblocks[] = {
++	[0] = {
++		.physaddr	= AT91SAM9RL_BASE_TCB0,
++		.irq		= { AT91SAM9RL_ID_TC0, AT91SAM9RL_ID_TC1, AT91SAM9RL_ID_TC2 },
++		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
++	}
++};
++
++#define at91sam9rl_tc_init()	atmel_tc_init(at91sam9rl_tcblocks, ARRAY_SIZE(at91sam9rl_tcblocks))
++
++#else
++#define at91sam9rl_tc_init()	do {} while(0)
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  AT91SAM9RL processor initialization
++ * -------------------------------------------------------------------- */
++
++void __init at91sam9rl_initialize(unsigned long main_clock)
++{
++	unsigned long cidr, sram_size;
++
++	/* Map peripherals */
++	iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc));
++
++	cidr = at91_sys_read(AT91_DBGU_CIDR);
++
++	switch (cidr & AT91_CIDR_SRAMSIZ) {
++		case AT91_CIDR_SRAMSIZ_32K:
++			sram_size = 2 * SZ_16K;
++			break;
++		case AT91_CIDR_SRAMSIZ_16K:
++		default:
++			sram_size = SZ_16K;
++	}
++
++	at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size;
++	at91sam9rl_sram_desc->length = sram_size;
++
++	/* Map SRAM */
++	iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
++
++	at91_arch_reset = at91sam9rl_reset;
++	at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
++
++	/* Init clock subsystem */
++	at91_clock_init(main_clock);
++
++	/* Register the processor-specific clocks */
++	at91sam9rl_register_clocks();
++
++	/* Register GPIO subsystem */
++	at91_gpio_init(at91sam9rl_gpio, 4);
++	
++	/* Initialize the Timer/Counter blocks */
++	at91sam9rl_tc_init();
++}
++
++/* --------------------------------------------------------------------
++ *  Interrupt initialization
++ * -------------------------------------------------------------------- */
++
++/*
++ * The default interrupt priority levels (0 = lowest, 7 = highest).
++ */
++static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = {
++	7,	/* Advanced Interrupt Controller */
++	7,	/* System Peripherals */
++	1,	/* Parallel IO Controller A */
++	1,	/* Parallel IO Controller B */
++	1,	/* Parallel IO Controller C */
++	1,	/* Parallel IO Controller D */
++	5,	/* USART 0 */
++	5,	/* USART 1 */
++	5,	/* USART 2 */
++	5,	/* USART 3 */
++	0,	/* Multimedia Card Interface */
++	6,	/* Two-Wire Interface 0 */
++	6,	/* Two-Wire Interface 1 */
++	5,	/* Serial Peripheral Interface */
++	4,	/* Serial Synchronous Controller 0 */
++	4,	/* Serial Synchronous Controller 1 */
++	0,	/* Timer Counter 0 */
++	0,	/* Timer Counter 1 */
++	0,	/* Timer Counter 2 */
++	0,
++	0,	/* Touch Screen Controller */
++	0,	/* DMA Controller */
++	2,	/* USB Device High speed port */
++	2,	/* LCD Controller */
++	6,	/* AC97 Controller */
++	0,
++	0,
++	0,
++	0,
++	0,
++	0,
++	0,	/* Advanced Interrupt Controller */
++};
++
++void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS])
++{
++	if (!priority)
++		priority = at91sam9rl_default_irq_priority;
++
++	/* Initialize the AIC interrupt controller */
++	at91_aic_init(priority);
++
++	/* Enable GPIO interrupts */
++	at91_gpio_irq_setup();
++}
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c
+--- linux-2.6.21/arch/arm/mach-at91/at91sam9rl_devices.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/at91sam9rl_devices.c	Fri May 11 16:03:25 2007
+@@ -0,0 +1,660 @@
++/*
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++
++#include <linux/platform_device.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91sam9rl.h>
++#include <asm/arch/at91sam9rl_matrix.h>
++#include <asm/arch/at91sam926x_mc.h>
++
++#include "generic.h"
++
++#define SZ_512	0x00000200
++#define SZ_256	0x00000100
++#define SZ_16	0x00000010
++
++
++/* --------------------------------------------------------------------
++ *  MMC / SD
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
++static u64 mmc_dmamask = 0xffffffffUL;
++static struct at91_mmc_data mmc_data;
++
++static struct resource mmc_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_MCI,
++		.end	= AT91SAM9RL_BASE_MCI + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_MCI,
++		.end	= AT91SAM9RL_ID_MCI,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9rl_mmc_device = {
++	.name		= "at91_mci",
++	.id		= -1,
++	.dev		= {
++				.dma_mask		= &mmc_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &mmc_data,
++	},
++	.resource	= mmc_resources,
++	.num_resources	= ARRAY_SIZE(mmc_resources),
++};
++
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
++{
++	if (!data)
++		return;
++
++	/* input/irq */
++	if (data->det_pin) {
++		at91_set_gpio_input(data->det_pin, 1);
++		at91_set_deglitch(data->det_pin, 1);
++	}
++	if (data->wp_pin)
++		at91_set_gpio_input(data->wp_pin, 1);
++	if (data->vcc_pin)
++		at91_set_gpio_output(data->vcc_pin, 0);
++
++	/* CLK */
++	at91_set_A_periph(AT91_PIN_PA2, 0);
++
++	/* CMD */
++	at91_set_A_periph(AT91_PIN_PA1, 1);
++
++	/* DAT0, maybe DAT1..DAT3 */
++	at91_set_A_periph(AT91_PIN_PA0, 1);
++	if (data->wire4) {
++		at91_set_A_periph(AT91_PIN_PA3, 1);
++		at91_set_A_periph(AT91_PIN_PA4, 1);
++		at91_set_A_periph(AT91_PIN_PA5, 1);
++	}
++
++	mmc_data = *data;
++	platform_device_register(&at91sam9rl_mmc_device);
++}
++#else
++void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  NAND / SmartMedia
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
++static struct at91_nand_data nand_data;
++
++#define NAND_BASE	AT91_CHIPSELECT_3
++
++static struct resource nand_resources[] = {
++	{
++		.start	= NAND_BASE,
++		.end	= NAND_BASE + SZ_256M - 1,
++		.flags	= IORESOURCE_MEM,
++	}
++};
++
++static struct platform_device at91_nand_device = {
++	.name		= "at91_nand",
++	.id		= -1,
++	.dev		= {
++				.platform_data	= &nand_data,
++	},
++	.resource	= nand_resources,
++	.num_resources	= ARRAY_SIZE(nand_resources),
++};
++
++void __init at91_add_device_nand(struct at91_nand_data *data)
++{
++	unsigned long csa;
++
++	if (!data)
++		return;
++
++	csa = at91_sys_read(AT91_MATRIX_EBICSA);
++	at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
++
++	/* set the bus interface characteristics */
++	at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
++			| AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
++
++	at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
++			| AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
++
++	at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
++
++	at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
++
++	/* enable pin */
++	if (data->enable_pin)
++		at91_set_gpio_output(data->enable_pin, 1);
++
++	/* ready/busy pin */
++	if (data->rdy_pin)
++		at91_set_gpio_input(data->rdy_pin, 1);
++
++	/* card detect pin */
++	if (data->det_pin)
++		at91_set_gpio_input(data->det_pin, 1);
++
++	at91_set_A_periph(AT91_PIN_PB4, 0);		/* NANDOE */
++	at91_set_A_periph(AT91_PIN_PB5, 0);		/* NANDWE */
++
++	nand_data = *data;
++	platform_device_register(&at91_nand_device);
++}
++
++#else
++void __init at91_add_device_nand(struct at91_nand_data *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  TWI (i2c)
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
++
++static struct resource twi_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_TWI0,
++		.end	= AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_TWI0,
++		.end	= AT91SAM9RL_ID_TWI0,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9rl_twi_device = {
++	.name		= "at91_i2c",
++	.id		= -1,
++	.resource	= twi_resources,
++	.num_resources	= ARRAY_SIZE(twi_resources),
++};
++
++void __init at91_add_device_i2c(void)
++{
++	/* pins used for TWI interface */
++	at91_set_A_periph(AT91_PIN_PA23, 0);		/* TWD */
++	at91_set_multi_drive(AT91_PIN_PA23, 1);
++
++	at91_set_A_periph(AT91_PIN_PA24, 0);		/* TWCK */
++	at91_set_multi_drive(AT91_PIN_PA24, 1);
++
++	platform_device_register(&at91sam9rl_twi_device);
++}
++#else
++void __init at91_add_device_i2c(void) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
++static u64 spi_dmamask = 0xffffffffUL;
++
++static struct resource spi_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_SPI,
++		.end	= AT91SAM9RL_BASE_SPI + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_SPI,
++		.end	= AT91SAM9RL_ID_SPI,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct platform_device at91sam9rl_spi_device = {
++	.name		= "atmel_spi",
++	.id		= 0,
++	.dev		= {
++				.dma_mask		= &spi_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++	},
++	.resource	= spi_resources,
++	.num_resources	= ARRAY_SIZE(spi_resources),
++};
++
++static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
++
++
++void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
++{
++	int i;
++	unsigned long cs_pin;
++
++	at91_set_A_periph(AT91_PIN_PA25, 0);	/* MISO */
++	at91_set_A_periph(AT91_PIN_PA26, 0);	/* MOSI */
++	at91_set_A_periph(AT91_PIN_PA27, 0);	/* SPCK */
++
++	/* Enable SPI chip-selects */
++	for (i = 0; i < nr_devices; i++) {
++		if (devices[i].controller_data)
++			cs_pin = (unsigned long) devices[i].controller_data;
++		else
++			cs_pin = spi_standard_cs[devices[i].chip_select];
++
++		/* enable chip-select pin */
++		at91_set_gpio_output(cs_pin, 1);
++
++		/* pass chip-select pin to driver */
++		devices[i].controller_data = (void *) cs_pin;
++	}
++
++	spi_register_board_info(devices, nr_devices);
++	platform_device_register(&at91sam9rl_spi_device);
++}
++#else
++void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  LCD Controller
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static u64 lcdc_dmamask = 0xffffffffUL;
++static struct atmel_lcdfb_info lcdc_data;
++
++static struct resource lcdc_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_LCDC_BASE,
++		.end	= AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_LCDC,
++		.end	= AT91SAM9RL_ID_LCDC,
++		.flags	= IORESOURCE_IRQ,
++	},
++#if defined(CONFIG_FB_INTSRAM)
++	[2] = {
++		.start	= AT91SAM9RL_SRAM_BASE,
++		.end	= AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++#endif
++};
++
++static struct platform_device at91_lcdc_device = {
++	.name		= "atmel_lcdfb",
++	.id		= 0,
++	.dev		= {
++				.dma_mask		= &lcdc_dmamask,
++				.coherent_dma_mask	= 0xffffffff,
++				.platform_data		= &lcdc_data,
++	},
++	.resource	= lcdc_resources,
++	.num_resources	= ARRAY_SIZE(lcdc_resources),
++};
++
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
++{
++	if (!data) {
++		return;
++	}
++
++#warning "Check this"
++	at91_set_B_periph(AT91_PIN_PC5, 0);	/* LCDHSYNC */
++	at91_set_B_periph(AT91_PIN_PC6, 0);	/* LCDDOTCK */
++	at91_set_B_periph(AT91_PIN_PC7, 0);	/* LCDDEN */
++	at91_set_B_periph(AT91_PIN_PC3, 0);	/* LCDCC */
++	at91_set_B_periph(AT91_PIN_PC9, 0);	/* LCDD3 */
++	at91_set_B_periph(AT91_PIN_PC10, 0);	/* LCDD4 */
++	at91_set_B_periph(AT91_PIN_PC11, 0);	/* LCDD5 */
++	at91_set_B_periph(AT91_PIN_PC12, 0);	/* LCDD6 */
++	at91_set_B_periph(AT91_PIN_PC13, 0);	/* LCDD7 */
++	at91_set_B_periph(AT91_PIN_PC15, 0);	/* LCDD11 */
++	at91_set_B_periph(AT91_PIN_PC16, 0);	/* LCDD12 */
++	at91_set_B_periph(AT91_PIN_PC17, 0);	/* LCDD13 */
++	at91_set_B_periph(AT91_PIN_PC18, 0);	/* LCDD14 */
++	at91_set_B_periph(AT91_PIN_PC19, 0);	/* LCDD15 */
++	at91_set_B_periph(AT91_PIN_PC20, 0);	/* LCDD18 */
++	at91_set_B_periph(AT91_PIN_PC21, 0);	/* LCDD19 */
++	at91_set_B_periph(AT91_PIN_PC22, 0);	/* LCDD20 */
++	at91_set_B_periph(AT91_PIN_PC23, 0);	/* LCDD21 */
++	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
++	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
++
++	lcdc_data = *data;
++	platform_device_register(&at91_lcdc_device);
++}
++#else
++void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  LEDs
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_LEDS)
++u8 at91_leds_cpu;
++u8 at91_leds_timer;
++
++void __init at91_init_leds(u8 cpu_led, u8 timer_led)
++{
++	/* Enable GPIO to access the LEDs */
++	at91_set_gpio_output(cpu_led, 1);
++	at91_set_gpio_output(timer_led, 1);
++
++	at91_leds_cpu	= cpu_led;
++	at91_leds_timer	= timer_led;
++}
++#else
++void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
++#endif
++
++
++#if defined(CONFIG_NEW_LEDS)
++
++static struct platform_device at91_leds = {
++	.name		= "at91_leds",
++	.id		= -1,
++};
++
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
++{
++	if (!nr)
++		return;
++
++	at91_leds.dev.platform_data = leds;
++
++	for ( ; nr; nr--, leds++) {
++		leds->index = nr;	/* first record stores number of leds */
++		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
++	}
++
++	platform_device_register(&at91_leds);
++}
++#else
++void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
++#endif
++
++
++/* --------------------------------------------------------------------
++ *  UART
++ * -------------------------------------------------------------------- */
++
++#if defined(CONFIG_SERIAL_ATMEL)
++static struct resource dbgu_resources[] = {
++	[0] = {
++		.start	= AT91_VA_BASE_SYS + AT91_DBGU,
++		.end	= AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91_ID_SYS,
++		.end	= AT91_ID_SYS,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data dbgu_data = {
++	.use_dma_tx	= 0,
++	.use_dma_rx	= 0,		/* DBGU not capable of receive DMA */
++	.regs		= (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
++};
++
++static struct platform_device at91sam9rl_dbgu_device = {
++	.name		= "atmel_usart",
++	.id		= 0,
++	.dev		= {
++				.platform_data	= &dbgu_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= dbgu_resources,
++	.num_resources	= ARRAY_SIZE(dbgu_resources),
++};
++
++static inline void configure_dbgu_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PA21, 0);		/* DRXD */
++	at91_set_A_periph(AT91_PIN_PA22, 1);		/* DTXD */
++}
++
++static struct resource uart0_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_US0,
++		.end	= AT91SAM9RL_BASE_US0 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_US0,
++		.end	= AT91SAM9RL_ID_US0,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9rl_uart0_device = {
++	.name		= "atmel_usart",
++	.id		= 1,
++	.dev		= {
++				.platform_data	= &uart0_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart0_resources,
++	.num_resources	= ARRAY_SIZE(uart0_resources),
++};
++
++static inline void configure_usart0_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PA6, 1);		/* TXD0 */
++	at91_set_A_periph(AT91_PIN_PA7, 0);		/* RXD0 */
++	at91_set_A_periph(AT91_PIN_PA9, 0);		/* RTS0 */
++	at91_set_A_periph(AT91_PIN_PA10, 0);		/* CTS0 */
++}
++
++static struct resource uart1_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_US1,
++		.end	= AT91SAM9RL_BASE_US1 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_US1,
++		.end	= AT91SAM9RL_ID_US1,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9rl_uart1_device = {
++	.name		= "atmel_usart",
++	.id		= 2,
++	.dev		= {
++				.platform_data	= &uart1_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart1_resources,
++	.num_resources	= ARRAY_SIZE(uart1_resources),
++};
++
++static inline void configure_usart1_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PA11, 1);		/* TXD1 */
++	at91_set_A_periph(AT91_PIN_PA12, 0);		/* RXD1 */
++}
++
++static struct resource uart2_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_US2,
++		.end	= AT91SAM9RL_BASE_US2 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_US2,
++		.end	= AT91SAM9RL_ID_US2,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9rl_uart2_device = {
++	.name		= "atmel_usart",
++	.id		= 3,
++	.dev		= {
++				.platform_data	= &uart2_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart2_resources,
++	.num_resources	= ARRAY_SIZE(uart2_resources),
++};
++
++static inline void configure_usart2_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PA13, 1);		/* TXD2 */
++	at91_set_A_periph(AT91_PIN_PA14, 0);		/* RXD2 */
++}
++
++static struct resource uart3_resources[] = {
++	[0] = {
++		.start	= AT91SAM9RL_BASE_US3,
++		.end	= AT91SAM9RL_BASE_US3 + SZ_16K - 1,
++		.flags	= IORESOURCE_MEM,
++	},
++	[1] = {
++		.start	= AT91SAM9RL_ID_US3,
++		.end	= AT91SAM9RL_ID_US3,
++		.flags	= IORESOURCE_IRQ,
++	},
++};
++
++static struct atmel_uart_data uart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++
++static struct platform_device at91sam9rl_uart3_device = {
++	.name		= "atmel_usart",
++	.id		= 4,
++	.dev		= {
++				.platform_data	= &uart3_data,
++				.coherent_dma_mask = 0xffffffff,
++	},
++	.resource	= uart3_resources,
++	.num_resources	= ARRAY_SIZE(uart3_resources),
++};
++
++static inline void configure_usart3_pins(void)
++{
++	at91_set_A_periph(AT91_PIN_PB0, 1);		/* TXD3 */
++	at91_set_A_periph(AT91_PIN_PB1, 0);		/* RXD3 */
++}
++
++struct platform_device *at91_uarts[ATMEL_MAX_UART];	/* the UARTs to use */
++struct platform_device *atmel_default_console_device;	/* the serial console device */
++
++void __init at91_init_serial(struct at91_uart_config *config)
++{
++	int i;
++
++	/* Fill in list of supported UARTs */
++	for (i = 0; i < config->nr_tty; i++) {
++		switch (config->tty_map[i]) {
++			case 0:
++				configure_usart0_pins();
++				at91_uarts[i] = &at91sam9rl_uart0_device;
++				at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
++				break;
++			case 1:
++				configure_usart1_pins();
++				at91_uarts[i] = &at91sam9rl_uart1_device;
++				at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
++				break;
++			case 2:
++				configure_usart2_pins();
++				at91_uarts[i] = &at91sam9rl_uart2_device;
++				at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
++				break;
++			case 3:
++				configure_usart3_pins();
++				at91_uarts[i] = &at91sam9rl_uart3_device;
++				at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
++				break;
++			case 4:
++				configure_dbgu_pins();
++				at91_uarts[i] = &at91sam9rl_dbgu_device;
++				at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
++				break;
++			default:
++				continue;
++		}
++		at91_uarts[i]->id = i;		/* update ID number to mapped ID */
++	}
++
++	/* Set serial console device */
++	if (config->console_tty < ATMEL_MAX_UART)
++		atmel_default_console_device = at91_uarts[config->console_tty];
++	if (!atmel_default_console_device)
++		printk(KERN_INFO "AT91: No default serial console defined.\n");
++}
++
++void __init at91_add_device_serial(void)
++{
++	int i;
++
++	for (i = 0; i < ATMEL_MAX_UART; i++) {
++		if (at91_uarts[i])
++			platform_device_register(at91_uarts[i]);
++	}
++}
++#else
++void __init at91_init_serial(struct at91_uart_config *config) {}
++void __init at91_add_device_serial(void) {}
++#endif
++
++
++/* -------------------------------------------------------------------- */
++
++/*
++ * These devices are always present and don't need any board-specific
++ * setup.
++ */
++static int __init at91_add_standard_devices(void)
++{
++	return 0;
++}
++
++arch_initcall(at91_add_standard_devices);
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-cam60.c linux-2.6-stable/arch/arm/mach-at91/board-cam60.c
+--- linux-2.6.21/arch/arm/mach-at91/board-cam60.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/board-cam60.c	Tue May  8 12:13:30 2007
+@@ -0,0 +1,148 @@
++/*
++ * KwikByte CAM60
++ *
++ * based on board-sam9260ek.c
++ *   Copyright (C) 2005 SAN People
++ *   Copyright (C) 2006 Atmel
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
++
++#include <asm/hardware.h>
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91sam926x_mc.h>
++
++#include "generic.h"
++
++
++/*
++ * Serial port configuration.
++ *    0 .. 5 = USART0 .. USART5
++ *    6      = DBGU
++ */
++static struct at91_uart_config __initdata cam60_uart_config = {
++	.console_tty	= 0,				/* ttyS0 */
++	.nr_tty		= 1,
++	.tty_map	= { 6, -1, -1, -1, -1, -1, -1 }	/* ttyS0, ..., ttyS6 */
++};
++
++static void __init cam60_map_io(void)
++{
++	/* Initialize processor: 10 MHz crystal */
++	at91sam9260_initialize(10000000);
++
++	/* Setup the serial ports and console */
++	at91_init_serial(&cam60_uart_config);
++}
++
++static void __init cam60_init_irq(void)
++{
++	at91sam9260_init_interrupts(NULL);
++}
++
++
++/*
++ * SPI devices.
++ */
++#if defined(CONFIG_MTD_DATAFLASH)
++static struct mtd_partition __initdata cam60_spi_partitions[] = {
++	{
++		.name	= "BOOT1",
++		.offset	= 0,
++		.size	= 4 * 1056,
++	},
++	{
++		.name	= "BOOT2",
++		.offset	= MTDPART_OFS_NXTBLK,
++		.size	= 256 * 1056,
++	},
++	{
++		.name	= "kernel",
++		.offset	= MTDPART_OFS_NXTBLK,
++		.size	= 2222 * 1056,
++	},
++	{
++		.name	= "file system",
++		.offset	= MTDPART_OFS_NXTBLK,
++		.size	= MTDPART_SIZ_FULL,
++	},
++};
++
++static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
++	.name		= "spi_flash",
++	.parts		= cam60_spi_partitions,
++	.nr_parts	= ARRAY_SIZE(cam60_spi_partitions)
++};
++#endif
++
++static struct spi_board_info cam60_spi_devices[] = {
++#if defined(CONFIG_MTD_DATAFLASH)
++	{	/* DataFlash chip */
++		.modalias	= "mtd_dataflash",
++		.chip_select	= 0,
++		.max_speed_hz	= 15 * 1000 * 1000,
++		.bus_num	= 0,
++		.platform_data	= &cam60_spi_flash_platform_data
++	},
++#endif
++};
++
++
++/*
++ * MACB Ethernet device
++ */
++static struct __initdata at91_eth_data cam60_macb_data = {
++	.phy_irq_pin	= AT91_PIN_PB5,
++	.is_rmii	= 0,
++};
++
++
++static void __init cam60_board_init(void)
++{
++	/* Serial */
++	at91_add_device_serial();
++	/* SPI */
++	at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
++	/* Ethernet */
++	at91_add_device_eth(&cam60_macb_data);
++}
++
++MACHINE_START(CAM60, "KwikByte CAM60")
++	/* Maintainer: KwikByte */
++	.phys_io	= AT91_BASE_SYS,
++	.io_pg_offst	= (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++	.boot_params	= AT91_SDRAM_BASE + 0x100,
++	.timer		= &at91sam926x_timer,
++	.map_io		= cam60_map_io,
++	.init_irq	= cam60_init_irq,
++	.init_machine	= cam60_board_init,
++MACHINE_END
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-chub.c linux-2.6-stable/arch/arm/mach-at91/board-chub.c
+--- linux-2.6.21/arch/arm/mach-at91/board-chub.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/board-chub.c	Tue May  8 12:13:30 2007
+@@ -0,0 +1,132 @@
++/*
++ * linux/arch/arm/mach-at91/board-chub.c
++ *
++ *  Copyright (C) 2005 SAN People, adapted for Promwad Chub board
++ *  by Kuten Ivan
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/hardware.h>
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "generic.h"
++
++/*
++ * Serial port configuration.
++ *    0 .. 3 = USART0 .. USART3
++ *    4      = DBGU
++ */
++static struct at91_uart_config __initdata chub_uart_config = {
++	.console_tty	= 0,				/* ttyS0 */
++	.nr_tty		= 5,
++	.tty_map	= { 4, 0, 1, 2, 3 }		/* ttyS0, ..., ttyS4 */
++};
++
++static void __init chub_init_irq(void)
++{
++	at91rm9200_init_interrupts(NULL);
++}
++
++static void __init chub_map_io(void)
++{
++	/* Initialize clocks: 18.432 MHz crystal */
++	at91rm9200_initialize(18432000, AT91RM9200_PQFP);
++
++	/* Setup the serial ports and console */
++	at91_init_serial(&chub_uart_config);
++}
++
++static struct at91_eth_data __initdata chub_eth_data = {
++	.phy_irq_pin	= AT91_PIN_PB29,
++	.is_rmii	= 0,
++};
++
++static struct mtd_partition __initdata chub_nand_partition[] = {
++	{
++		.name	= "NAND Partition 1",
++		.offset = 0,
++		.size	= MTDPART_SIZ_FULL,
++	},
++};
++
++static struct mtd_partition *nand_partitions(int size, int *num_partitions)
++{
++	*num_partitions = ARRAY_SIZE(chub_nand_partition);
++	return chub_nand_partition;
++}
++
++static struct at91_nand_data __initdata chub_nand_data = {
++	.ale		= 22,
++	.cle		= 21,
++	.enable_pin	= AT91_PIN_PA27,
++	.partition_info	= nand_partitions,
++};
++
++static struct spi_board_info chub_spi_devices[] = {
++	{	/* DataFlash chip */
++		.modalias	= "mtd_dataflash",
++		.chip_select	= 0,
++		.max_speed_hz	= 15 * 1000 * 1000,
++	},
++};
++
++static void __init chub_board_init(void)
++{
++	/* Serial */
++	at91_add_device_serial();
++	/* I2C */
++	at91_add_device_i2c();
++	/* Ethernet */
++	at91_add_device_eth(&chub_eth_data);
++	/* SPI */
++	at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices));
++	/* NAND Flash */
++	at91_add_device_nand(&chub_nand_data);
++	/* Disable write protect for NAND */
++	at91_set_gpio_output(AT91_PIN_PB7, 1);
++	/* Power enable for 3x RS-232 and 1x RS-485 */
++	at91_set_gpio_output(AT91_PIN_PB9, 1);
++	/* Disable write protect for FRAM */
++	at91_set_gpio_output(AT91_PIN_PA21, 1);
++	/* Disable write protect for Dataflash */
++	at91_set_gpio_output(AT91_PIN_PA19, 1);
++}
++
++MACHINE_START(CHUB, "Promwad Chub")
++	/* Maintainer: Ivan Kuten AT Promwad DOT com */
++	.phys_io	= AT91_BASE_SYS,
++	.io_pg_offst	= (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++	.boot_params	= AT91_SDRAM_BASE + 0x100,
++	.timer		= &at91rm9200_timer,
++	.map_io		= chub_map_io,
++	.init_irq	= chub_init_irq,
++	.init_machine	= chub_board_init,
++MACHINE_END
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-csb337.c linux-2.6-stable/arch/arm/mach-at91/board-csb337.c
+--- linux-2.6.21/arch/arm/mach-at91/board-csb337.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-csb337.c	Tue May  8 12:13:30 2007
+@@ -24,6 +24,7 @@
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/spi/spi.h>
++#include <linux/interrupt.h>
+ #include <linux/mtd/physmap.h>
+ 
+ #include <asm/hardware.h>
+@@ -59,6 +60,7 @@
+ 
+ 	/* Setup the LEDs */
+ 	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
++	at91_set_gpio_output(AT91_PIN_PB2, 1);		/* third (unused) LED */
+ 
+ 	/* Setup the serial ports and console */
+ 	at91_init_serial(&csb337_uart_config);
+@@ -149,6 +151,55 @@
+ 	.num_resources	= ARRAY_SIZE(csb_flash_resources),
+ };
+ 
++static struct at91_gpio_led csb337_leds[] = {
++	{
++		.name		= "led0",
++		.gpio		= AT91_PIN_PB0,
++		.trigger	= "heartbeat",
++	},
++	{
++		.name		= "led1",
++		.gpio		= AT91_PIN_PB1,
++		.trigger	= "timer",
++	},
++	{
++		.name		= "led2",
++		.gpio		= AT91_PIN_PB2,
++	}
++};
++
++#if defined(CONFIG_CSB300_WAKE_SW0) || defined(CONFIG_CSB300_WAKE_SW1)
++static irqreturn_t switch_irq_handler(int irq, void *context)
++{
++	return IRQ_HANDLED;
++}
++
++static inline void __init switch_irq_setup(int irq, char *name, unsigned long mode)
++{
++	int res;
++
++	res = request_irq(irq, switch_irq_handler, IRQF_SAMPLE_RANDOM | mode, name, NULL);
++	if (res == 0)
++		enable_irq_wake(irq);
++}
++
++static void __init csb300_switches(void)
++{
++#ifdef CONFIG_CSB300_WAKE_SW0
++	at91_set_A_periph(AT91_PIN_PB29, 1);		/* IRQ0 */
++	switch_irq_setup(AT91RM9200_ID_IRQ0, "csb300_sw0", IRQF_TRIGGER_FALLING);
++#endif
++#ifdef CONFIG_CSB300_WAKE_SW1
++	at91_set_gpio_input(AT91_PIN_PB28, 1);
++	at91_set_deglitch(AT91_PIN_PB28, 1);
++	switch_irq_setup(AT91_PIN_PB28, "csb300_sw1", IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING);
++#endif
++	/* there's also SW2 at PA21, GPIO or TIOA2 */
++}
++#else
++static void __init csb300_switches(void) {}
++#endif
++
+ static void __init csb337_board_init(void)
+ {
+ 	/* Serial */
+@@ -168,8 +219,12 @@
+ 	at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
+ 	/* MMC */
+ 	at91_add_device_mmc(0, &csb337_mmc_data);
++	/* LEDS */
++	at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds));
+ 	/* NOR flash */
+ 	platform_device_register(&csb_flash);
++	/* Switches on CSB300 */
++	csb300_switches();
+ }
+ 
+ MACHINE_START(CSB337, "Cogent CSB337")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-dk.c linux-2.6-stable/arch/arm/mach-at91/board-dk.c
+--- linux-2.6.21/arch/arm/mach-at91/board-dk.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-dk.c	Tue May  8 14:29:12 2007
+@@ -73,6 +73,185 @@
+ 	at91rm9200_init_interrupts(NULL);
+ }
+ 
++#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
++#include <video/s1d13xxxfb.h>
++#include <asm/arch/ics1523.h>
++
++/* EPSON S1D13806 FB */
++#define AT91_FB_REG_BASE	0x30000000L
++#define AT91_FB_REG_SIZE	0x200
++#define AT91_FB_VMEM_BASE	0x30200000L
++#define AT91_FB_VMEM_SIZE	0x140000L
++
++static void __init dk_init_video(void)
++{
++	/* NWAIT Signal */
++	at91_set_A_periph(AT91_PIN_PC6, 0);
++
++	/* Initialization of the Static Memory Controller for Chip Select 2 */
++	at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16			/* 16 bit */
++				| AT91_SMC_WSEN | AT91_SMC_NWS_(4)	/* wait states */
++				| AT91_SMC_TDF_(1)			/* float time */
++	);
++
++	at91_ics1523_init();
++}
++
++/* CRT:    (active)   640x480 60Hz (PCLK=CLKI=25.175MHz)
++   Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
++static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
++	{S1DREG_MISC,			0x00},	/* Enable Memory/Register select bit */
++	{S1DREG_COM_DISP_MODE,		0x00},	/* disable display output */
++	{S1DREG_GPIO_CNF0,		0x00},
++	{S1DREG_GPIO_CNF1,		0x00},
++	{S1DREG_GPIO_CTL0,		0x08},
++	{S1DREG_GPIO_CTL1,		0x00},
++	{S1DREG_CLK_CNF,		0x01},	/* no divide, MCLK source is CLKI3 0x02*/
++	{S1DREG_LCD_CLK_CNF,		0x00},
++	{S1DREG_CRT_CLK_CNF,		0x00},
++	{S1DREG_MPLUG_CLK_CNF,		0x00},
++	{S1DREG_CPU2MEM_WST_SEL,	0x01},	/* 2*period(MCLK) - 4ns > period(BCLK) */
++	{S1DREG_SDRAM_REF_RATE,		0x03},	/* 32768 <= MCLK <= 50000 (MHz) */
++	{S1DREG_SDRAM_TC0,		0x00},	/* MCLK source freq (MHz): */
++	{S1DREG_SDRAM_TC1,		0x01},	/* 42 <= MCLK <= 50 */
++	{S1DREG_MEM_CNF,		0x80},	/* SDRAM Initialization - needed before mem access */
++	{S1DREG_PANEL_TYPE,		0x25},	/* std TFT 16bit, 8bit SCP format 2, single passive LCD */
++	{S1DREG_MOD_RATE,		0x00},	/* toggle every FPFRAME */
++	{S1DREG_LCD_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_LCD_NDISP_HPER,		0x12},	/* 152 pix */
++	{S1DREG_TFT_FPLINE_START,	0x01},	/* 13 pix */
++	{S1DREG_TFT_FPLINE_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_LCD_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_LCD_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_LCD_NDISP_VPER,		0x2C},	/* 44 lines */
++	{S1DREG_TFT_FPFRAME_START,	0x0A},	/* 10 lines */
++	{S1DREG_TFT_FPFRAME_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_LCD_DISP_MODE,		0x05},  /* 16 bpp */
++	{S1DREG_LCD_MISC,		0x00},	/* dithering enabled, dual panel buffer enabled */
++	{S1DREG_LCD_DISP_START0,	0x00},
++	{S1DREG_LCD_DISP_START1,	0xC8},
++	{S1DREG_LCD_DISP_START2,	0x00},
++	{S1DREG_LCD_MEM_OFF0,		0x80},
++	{S1DREG_LCD_MEM_OFF1,		0x02},
++	{S1DREG_LCD_PIX_PAN,		0x00},
++	{S1DREG_LCD_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_LCD_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_CRT_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_CRT_NDISP_HPER,		0x13},	/* 160 pix */
++	{S1DREG_CRT_HRTC_START,		0x01},	/* 13 pix */
++	{S1DREG_CRT_HRTC_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_CRT_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_CRT_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_CRT_NDISP_VPER,		0x2B},	/* 44 lines */
++	{S1DREG_CRT_VRTC_START,		0x09},	/* 10 lines */
++	{S1DREG_CRT_VRTC_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_TV_OUT_CTL,		0x10},
++	{S1DREG_CRT_DISP_MODE,		0x05},	/* 16 bpp */
++	{S1DREG_CRT_DISP_START0,	0x00},
++	{S1DREG_CRT_DISP_START1,	0x00},
++	{S1DREG_CRT_DISP_START2,	0x00},
++	{S1DREG_CRT_MEM_OFF0,		0x80},
++	{S1DREG_CRT_MEM_OFF1,		0x02},
++	{S1DREG_CRT_PIX_PAN,		0x00},
++	{S1DREG_CRT_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_CRT_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_LCD_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_LCD_CUR_START,		0x01},
++	{S1DREG_LCD_CUR_XPOS0,		0x00},
++	{S1DREG_LCD_CUR_XPOS1,		0x00},
++	{S1DREG_LCD_CUR_YPOS0,		0x00},
++	{S1DREG_LCD_CUR_YPOS1,		0x00},
++	{S1DREG_LCD_CUR_BCTL0,		0x00},
++	{S1DREG_LCD_CUR_GCTL0,		0x00},
++	{S1DREG_LCD_CUR_RCTL0,		0x00},
++	{S1DREG_LCD_CUR_BCTL1,		0x1F},
++	{S1DREG_LCD_CUR_GCTL1,		0x3F},
++	{S1DREG_LCD_CUR_RCTL1,		0x1F},
++	{S1DREG_LCD_CUR_FIFO_HTC,	0x00},
++	{S1DREG_CRT_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_CRT_CUR_START,		0x01},
++	{S1DREG_CRT_CUR_XPOS0,		0x00},
++	{S1DREG_CRT_CUR_XPOS1,		0x00},
++	{S1DREG_CRT_CUR_YPOS0,		0x00},
++	{S1DREG_CRT_CUR_YPOS1,		0x00},
++	{S1DREG_CRT_CUR_BCTL0,		0x00},
++	{S1DREG_CRT_CUR_GCTL0,		0x00},
++	{S1DREG_CRT_CUR_RCTL0,		0x00},
++	{S1DREG_CRT_CUR_BCTL1,		0x1F},
++	{S1DREG_CRT_CUR_GCTL1,		0x3F},
++	{S1DREG_CRT_CUR_RCTL1,		0x1F},
++	{S1DREG_CRT_CUR_FIFO_HTC,	0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CC_EXP,		0x00},
++	{S1DREG_BBLT_OP,		0x00},
++	{S1DREG_BBLT_SRC_START0,	0x00},
++	{S1DREG_BBLT_SRC_START1,	0x00},
++	{S1DREG_BBLT_SRC_START2,	0x00},
++	{S1DREG_BBLT_DST_START0,	0x00},
++	{S1DREG_BBLT_DST_START1,	0x00},
++	{S1DREG_BBLT_DST_START2,	0x00},
++	{S1DREG_BBLT_MEM_OFF0,		0x00},
++	{S1DREG_BBLT_MEM_OFF1,		0x00},
++	{S1DREG_BBLT_WIDTH0,		0x00},
++	{S1DREG_BBLT_WIDTH1,		0x00},
++	{S1DREG_BBLT_HEIGHT0,		0x00},
++	{S1DREG_BBLT_HEIGHT1,		0x00},
++	{S1DREG_BBLT_BGC0,		0x00},
++	{S1DREG_BBLT_BGC1,		0x00},
++	{S1DREG_BBLT_FGC0,		0x00},
++	{S1DREG_BBLT_FGC1,		0x00},
++	{S1DREG_LKUP_MODE,		0x00},	/* LCD LUT r | LCD and CRT/TV LUT w */
++	{S1DREG_LKUP_ADDR,		0x00},
++	{S1DREG_PS_CNF,			0x00},	/* Power Save disable */
++	{S1DREG_PS_STATUS,		0x02},	/* LCD Panel down, mem up */
++	{S1DREG_CPU2MEM_WDOGT,		0x00},
++	{S1DREG_COM_DISP_MODE,		0x02},	/* enable CRT display output */
++};
++
++static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
++	.initregs		= dk_s1dfb_initregs,
++	.initregssize		= ARRAY_SIZE(dk_s1dfb_initregs),
++	.platform_init_video	= dk_init_video,
++};
++
++static u64 s1dfb_dmamask = 0xffffffffUL;
++
++static struct resource dk_s1dfb_resource[] = {
++	[0] = {	/* video mem */
++		.name   = "s1d13806 memory",
++		.start  = AT91_FB_VMEM_BASE,
++		.end    = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++	[1] = {	/* video registers */
++		.name   = "s1d13806 registers",
++		.start  = AT91_FB_REG_BASE,
++		.end    = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++};
++
++static struct platform_device dk_s1dfb_device = {
++	.name		= "s1d13806fb",
++	.id		= -1,
++	.dev		= {
++			.dma_mask		= &s1dfb_dmamask,
++			.coherent_dma_mask	= 0xffffffff,
++			.platform_data		= &dk_s1dfb_pdata,
++	},
++	.resource	= dk_s1dfb_resource,
++	.num_resources	= ARRAY_SIZE(dk_s1dfb_resource),
++};
++
++static void __init dk_add_device_video(void)
++{
++	platform_device_register(&dk_s1dfb_device);
++}
++#else
++static void __init dk_add_device_video(void) {}
++#endif
++
+ static struct at91_eth_data __initdata dk_eth_data = {
+ 	.phy_irq_pin	= AT91_PIN_PC4,
+ 	.is_rmii	= 1,
+@@ -151,7 +330,7 @@
+ #define DK_FLASH_SIZE	0x200000
+ 
+ static struct physmap_flash_data dk_flash_data = {
+-	.width	= 2,
++	.width		= 2,
+ };
+ 
+ static struct resource dk_flash_resource = {
+@@ -170,6 +349,13 @@
+ 	.num_resources	= 1,
+ };
+ 
++static struct at91_gpio_led dk_leds[] = {
++	{
++		.name		= "led0",
++		.gpio		= AT91_PIN_PB2,
++		.trigger	= "timer",
++	}
++};
+ 
+ static void __init dk_board_init(void)
+ {
+@@ -200,8 +386,10 @@
+ 	at91_add_device_nand(&dk_nand_data);
+ 	/* NOR Flash */
+ 	platform_device_register(&dk_flash);
++	/* LEDs */
++	at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
+ 	/* VGA */
+-//	dk_add_device_video();
++	dk_add_device_video();
+ }
+ 
+ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-ek.c linux-2.6-stable/arch/arm/mach-at91/board-ek.c
+--- linux-2.6.21/arch/arm/mach-at91/board-ek.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-ek.c	Tue May  8 14:29:22 2007
+@@ -73,6 +73,187 @@
+ 	at91rm9200_init_interrupts(NULL);
+ }
+ 
++#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
++#include <video/s1d13xxxfb.h>
++#include <asm/arch/ics1523.h>
++
++/* EPSON S1D13806 FB */
++#define AT91_FB_REG_BASE	0x40000000L
++#define	AT91_FB_REG_SIZE	0x200
++#define AT91_FB_VMEM_BASE	0x40200000L
++#define AT91_FB_VMEM_SIZE	0x140000L
++
++static void __init ek_init_video(void)
++{
++	/* NWAIT Signal */
++	at91_set_A_periph(AT91_PIN_PC6, 0);
++
++	/* Initialization of the Static Memory Controller for Chip Select 3 */
++	at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16			/* 16 bit */
++				| AT91_SMC_WSEN | AT91_SMC_NWS_(5)	/* wait states */
++				| AT91_SMC_TDF_(1)			/* float time */
++	);
++
++	at91_ics1523_init();
++}
++
++/* CRT:    (active)   640x480 60Hz (PCLK=CLKI=25.175MHz)
++   Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
++static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
++	{S1DREG_MISC,			0x00},	/* Enable Memory/Register select bit */
++	{S1DREG_COM_DISP_MODE,		0x00},	/* disable display output */
++	{S1DREG_GPIO_CNF0,		0xFF},	// 0x00
++	{S1DREG_GPIO_CNF1,		0x1F},	// 0x08
++	{S1DREG_GPIO_CTL0,		0x00},
++	{S1DREG_GPIO_CTL1,		0x00},
++	{S1DREG_CLK_CNF,		0x01},	/* no divide, MCLK source is CLKI3 0x02*/
++	{S1DREG_LCD_CLK_CNF,		0x00},
++	{S1DREG_CRT_CLK_CNF,		0x00},
++	{S1DREG_MPLUG_CLK_CNF,		0x00},
++	{S1DREG_CPU2MEM_WST_SEL,	0x01},	/* 2*period(MCLK) - 4ns > period(BCLK) */
++	{S1DREG_SDRAM_REF_RATE,		0x03},	/* 32768 <= MCLK <= 50000 (MHz) */
++	{S1DREG_SDRAM_TC0,		0x00},	/* MCLK source freq (MHz): */
++	{S1DREG_SDRAM_TC1,		0x01},	/* 42 <= MCLK <= 50 */
++	{S1DREG_MEM_CNF,		0x80},	/* SDRAM Initialization - needed before mem access */
++	{S1DREG_PANEL_TYPE,		0x25},	/* std TFT 16bit, 8bit SCP format 2, single passive LCD */
++	{S1DREG_MOD_RATE,		0x00},	/* toggle every FPFRAME */
++	{S1DREG_LCD_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_LCD_NDISP_HPER,		0x12},	/* 152 pix */
++	{S1DREG_TFT_FPLINE_START,	0x01},	/* 13 pix */
++	{S1DREG_TFT_FPLINE_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_LCD_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_LCD_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_LCD_NDISP_VPER,		0x2C},	/* 44 lines */
++	{S1DREG_TFT_FPFRAME_START,	0x0A},	/* 10 lines */
++	{S1DREG_TFT_FPFRAME_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_LCD_DISP_MODE,		0x05},  /* 16 bpp */
++	{S1DREG_LCD_MISC,		0x00},	/* dithering enabled, dual panel buffer enabled */
++	{S1DREG_LCD_DISP_START0,	0x00},
++	{S1DREG_LCD_DISP_START1,	0xC8},
++	{S1DREG_LCD_DISP_START2,	0x00},
++	{S1DREG_LCD_MEM_OFF0,		0x80},
++	{S1DREG_LCD_MEM_OFF1,		0x02},
++	{S1DREG_LCD_PIX_PAN,		0x00},
++	{S1DREG_LCD_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_LCD_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_CRT_DISP_HWIDTH,	0x4F},	/* 680 pix */
++	{S1DREG_CRT_NDISP_HPER,		0x13},	/* 160 pix */
++	{S1DREG_CRT_HRTC_START,		0x01},	/* 13 pix */
++	{S1DREG_CRT_HRTC_PWIDTH,	0x0B},	/* 96 pix */
++	{S1DREG_CRT_DISP_VHEIGHT0,	0xDF},
++	{S1DREG_CRT_DISP_VHEIGHT1,	0x01},	/* 480 lines */
++	{S1DREG_CRT_NDISP_VPER,		0x2B},	/* 44 lines */
++	{S1DREG_CRT_VRTC_START,		0x09},	/* 10 lines */
++	{S1DREG_CRT_VRTC_PWIDTH,	0x01},	/* 2 lines */
++	{S1DREG_TV_OUT_CTL,		0x10},
++	{0x005E,			0x9F},
++	{0x005F,			0x00},
++	{S1DREG_CRT_DISP_MODE,		0x05},	/* 16 bpp */
++	{S1DREG_CRT_DISP_START0,	0x00},
++	{S1DREG_CRT_DISP_START1,	0x00},
++	{S1DREG_CRT_DISP_START2,	0x00},
++	{S1DREG_CRT_MEM_OFF0,		0x80},
++	{S1DREG_CRT_MEM_OFF1,		0x02},
++	{S1DREG_CRT_PIX_PAN,		0x00},
++	{S1DREG_CRT_DISP_FIFO_HTC,	0x3B},
++	{S1DREG_CRT_DISP_FIFO_LTC,	0x3C},
++	{S1DREG_LCD_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_LCD_CUR_START,		0x01},
++	{S1DREG_LCD_CUR_XPOS0,		0x00},
++	{S1DREG_LCD_CUR_XPOS1,		0x00},
++	{S1DREG_LCD_CUR_YPOS0,		0x00},
++	{S1DREG_LCD_CUR_YPOS1,		0x00},
++	{S1DREG_LCD_CUR_BCTL0,		0x00},
++	{S1DREG_LCD_CUR_GCTL0,		0x00},
++	{S1DREG_LCD_CUR_RCTL0,		0x00},
++	{S1DREG_LCD_CUR_BCTL1,		0x1F},
++	{S1DREG_LCD_CUR_GCTL1,		0x3F},
++	{S1DREG_LCD_CUR_RCTL1,		0x1F},
++	{S1DREG_LCD_CUR_FIFO_HTC,	0x00},
++	{S1DREG_CRT_CUR_CTL,		0x00},	/* inactive */
++	{S1DREG_CRT_CUR_START,		0x01},
++	{S1DREG_CRT_CUR_XPOS0,		0x00},
++	{S1DREG_CRT_CUR_XPOS1,		0x00},
++	{S1DREG_CRT_CUR_YPOS0,		0x00},
++	{S1DREG_CRT_CUR_YPOS1,		0x00},
++	{S1DREG_CRT_CUR_BCTL0,		0x00},
++	{S1DREG_CRT_CUR_GCTL0,		0x00},
++	{S1DREG_CRT_CUR_RCTL0,		0x00},
++	{S1DREG_CRT_CUR_BCTL1,		0x1F},
++	{S1DREG_CRT_CUR_GCTL1,		0x3F},
++	{S1DREG_CRT_CUR_RCTL1,		0x1F},
++	{S1DREG_CRT_CUR_FIFO_HTC,	0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CTL0,		0x00},
++	{S1DREG_BBLT_CC_EXP,		0x00},
++	{S1DREG_BBLT_OP,		0x00},
++	{S1DREG_BBLT_SRC_START0,	0x00},
++	{S1DREG_BBLT_SRC_START1,	0x00},
++	{S1DREG_BBLT_SRC_START2,	0x00},
++	{S1DREG_BBLT_DST_START0,	0x00},
++	{S1DREG_BBLT_DST_START1,	0x00},
++	{S1DREG_BBLT_DST_START2,	0x00},
++	{S1DREG_BBLT_MEM_OFF0,		0x00},
++	{S1DREG_BBLT_MEM_OFF1,		0x00},
++	{S1DREG_BBLT_WIDTH0,		0x00},
++	{S1DREG_BBLT_WIDTH1,		0x00},
++	{S1DREG_BBLT_HEIGHT0,		0x00},
++	{S1DREG_BBLT_HEIGHT1,		0x00},
++	{S1DREG_BBLT_BGC0,		0x00},
++	{S1DREG_BBLT_BGC1,		0x00},
++	{S1DREG_BBLT_FGC0,		0x00},
++	{S1DREG_BBLT_FGC1,		0x00},
++	{S1DREG_LKUP_MODE,		0x00},	/* LCD LUT r | LCD and CRT/TV LUT w */
++	{S1DREG_LKUP_ADDR,		0x00},
++	{S1DREG_PS_CNF,			0x10},	/* Power Save disable */
++	{S1DREG_PS_STATUS,		0x02},	/* LCD Panel down, mem up */
++	{S1DREG_CPU2MEM_WDOGT,		0x00},
++	{S1DREG_COM_DISP_MODE,		0x02},	/* enable CRT display output */
++};
++
++static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
++	.initregs		= ek_s1dfb_initregs,
++	.initregssize		= ARRAY_SIZE(ek_s1dfb_initregs),
++	.platform_init_video	= ek_init_video,
++};
++
++static u64 s1dfb_dmamask = 0xffffffffUL;
++
++static struct resource ek_s1dfb_resource[] = {
++	[0] = {	/* video mem */
++		.name   = "s1d13806 memory",
++		.start  = AT91_FB_VMEM_BASE,
++		.end    = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++	[1] = {	/* video registers */
++		.name   = "s1d13806 registers",
++		.start  = AT91_FB_REG_BASE,
++		.end    = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
++		.flags  = IORESOURCE_MEM,
++	},
++};
++
++static struct platform_device ek_s1dfb_device = {
++	.name		= "s1d13806fb",
++	.id		= -1,
++	.dev		= {
++			.dma_mask		= &s1dfb_dmamask,
++			.coherent_dma_mask	= 0xffffffff,
++			.platform_data		= &ek_s1dfb_pdata,
++	},
++	.resource	= ek_s1dfb_resource,
++	.num_resources	= ARRAY_SIZE(ek_s1dfb_resource),
++};
++
++static void __init ek_add_device_video(void)
++{
++	platform_device_register(&ek_s1dfb_device);
++}
++#else
++static void __init ek_add_device_video(void) {}
++#endif
++
+ static struct at91_eth_data __initdata ek_eth_data = {
+ 	.phy_irq_pin	= AT91_PIN_PC4,
+ 	.is_rmii	= 1,
+@@ -113,7 +294,7 @@
+ #define EK_FLASH_SIZE	0x200000
+ 
+ static struct physmap_flash_data ek_flash_data = {
+-	.width	= 2,
++	.width		= 2,
+ };
+ 
+ static struct resource ek_flash_resource = {
+@@ -132,6 +313,18 @@
+ 	.num_resources	= 1,
+ };
+ 
++static struct at91_gpio_led ek_leds[] = {
++	{
++		.name		= "led0",
++		.gpio		= AT91_PIN_PB1,
++		.trigger	= "heartbeat",
++	},
++	{
++		.name		= "led1",
++		.gpio		= AT91_PIN_PB2,
++		.trigger	= "timer",
++	}
++};
+ 
+ static void __init ek_board_init(void)
+ {
+@@ -158,8 +351,10 @@
+ #endif
+ 	/* NOR Flash */
+ 	platform_device_register(&ek_flash);
++	/* LEDs */
++	at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
+ 	/* VGA */
+-//	ek_add_device_video();
++	ek_add_device_video();
+ }
+ 
+ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-kb9202.c linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c
+--- linux-2.6.21/arch/arm/mach-at91/board-kb9202.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-kb9202.c	Tue May  8 12:21:31 2007
+@@ -37,6 +37,8 @@
+ #include <asm/arch/board.h>
+ #include <asm/arch/gpio.h>
+ 
++#include <asm/arch/at91rm9200_mc.h>
++
+ #include "generic.h"
+ 
+ 
+@@ -111,6 +113,48 @@
+ 	.partition_info	= nand_partitions,
+ };
+ 
++
++#if defined(CONFIG_FB_S1D15605)
++#warning "Rather pass reset pin via platform_data"
++static struct resource kb9202_lcd_resources[] = {
++	[0] = {
++		.start	= AT91_CHIPSELECT_2,
++		.end	= AT91_CHIPSELECT_2 + 0x200FF,
++		.flags	= IORESOURCE_MEM
++	},
++	[1] = {	/* reset pin */
++		.start	= AT91_PIN_PC22,
++		.end	= AT91_PIN_PC22,
++		.flags	= IORESOURCE_MEM
++	},
++};
++
++static struct platform_device kb9202_lcd_device = {
++	.name		= "s1d15605fb",
++	.id		= 0,
++	.num_resources	= ARRAY_SIZE(kb9202_lcd_resources),
++	.resource	= kb9202_lcd_resources,
++};
++
++static void __init kb9202_add_device_lcd(void)
++{
++ 	/* In case the boot loader did not set the chip select mode and timing */
++	at91_sys_write(AT91_SMC_CSR(2),
++		AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 |
++		AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1));
++
++	/* Backlight pin = output, off */
++	at91_set_gpio_output(AT91_PIN_PC23, 0);
++
++	/* Reset pin = output, in reset */
++	at91_set_gpio_output(AT91_PIN_PC22, 0);
++
++	platform_device_register(&kb9202_lcd_device);
++}
++#else
++static void __init kb9202_add_device_lcd(void) {}
++#endif
++
+ static void __init kb9202_board_init(void)
+ {
+ 	/* Serial */
+@@ -129,6 +173,8 @@
+ 	at91_add_device_spi(NULL, 0);
+ 	/* NAND */
+ 	at91_add_device_nand(&kb9202_nand_data);
++	/* LCD	*/
++	kb9202_add_device_lcd();
+ }
+ 
+ MACHINE_START(KB9200, "KB920x")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c
+--- linux-2.6.21/arch/arm/mach-at91/board-sam9260ek.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9260ek.c	Tue May  8 12:13:30 2007
+@@ -104,9 +104,9 @@
+ 	},
+ #endif
+ #endif
+-#if defined(CONFIG_SND_AT73C213)
++#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
+ 	{	/* AT73C213 DAC */
+-		.modalias	= "snd_at73c213",
++		.modalias	= "at73c213",
+ 		.chip_select	= 0,
+ 		.max_speed_hz	= 10 * 1000 * 1000,
+ 		.bus_num	= 1,
+@@ -118,7 +118,7 @@
+ /*
+  * MACB Ethernet device
+  */
+-static struct __initdata at91_eth_data ek_macb_data = {
++static struct at91_eth_data __initdata ek_macb_data = {
+ 	.phy_irq_pin	= AT91_PIN_PA7,
+ 	.is_rmii	= 1,
+ };
+@@ -188,6 +188,8 @@
+ 	at91_add_device_eth(&ek_macb_data);
+ 	/* MMC */
+ 	at91_add_device_mmc(0, &ek_mmc_data);
++	/* I2C */
++	at91_add_device_i2c();
+ }
+ 
+ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c
+--- linux-2.6.21/arch/arm/mach-at91/board-sam9261ek.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9261ek.c	Wed May  9 12:37:19 2007
+@@ -25,7 +25,11 @@
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/spi/spi.h>
++#include <linux/spi/ads7846.h>
+ #include <linux/dm9000.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/hardware.h>
+ #include <asm/setup.h>
+@@ -59,6 +63,9 @@
+ 	/* Initialize processor: 18.432 MHz crystal */
+ 	at91sam9261_initialize(18432000);
+ 
++	/* Setup the LEDs */
++	at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
++
+ 	/* Setup the serial ports and console */
+ 	at91_init_serial(&ek_uart_config);
+ }
+@@ -195,6 +202,41 @@
+ };
+ 
+ /*
++ * ADS7846 Touchscreen
++ */
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++
++static int ads7843_pendown_state(void)
++{
++	return !at91_get_gpio_value(AT91_PIN_PC2);	/* Touchscreen PENIRQ */
++}
++
++static struct ads7846_platform_data ads_info = {
++	.model			= 7843,
++	.x_min			= 150,
++	.x_max			= 3830,
++	.y_min			= 190,
++	.y_max			= 3830,
++	.vref_delay_usecs	= 100,
++	.x_plate_ohms		= 450,
++	.y_plate_ohms		= 250,
++	.pressure_max		= 15000,
++	.debounce_max		= 1,
++	.debounce_rep		= 0,
++	.debounce_tol		= (~0),
++	.get_pendown_state	= ads7843_pendown_state,
++};
++
++static void __init ek_add_device_ts(void)
++{
++	at91_set_B_periph(AT91_PIN_PC2, 1);	/* External IRQ0, with pullup */
++	at91_set_gpio_input(AT91_PIN_PA11, 1);	/* Touchscreen BUSY signal */
++}
++#else
++static void __init ek_add_device_ts(void) {}
++#endif
++
++/*
+  * SPI devices
+  */
+ static struct spi_board_info ek_spi_devices[] = {
+@@ -204,6 +246,17 @@
+ 		.max_speed_hz	= 15 * 1000 * 1000,
+ 		.bus_num	= 0,
+ 	},
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++	{
++		.modalias	= "ads7846",
++		.chip_select	= 2,
++		.max_speed_hz	= 125000 * 26,	/* (max sample rate @ 3V) * (cmd + data + overhead) */
++		.bus_num	= 0,
++		.platform_data	= &ads_info,
++		.irq		= AT91SAM9261_ID_IRQ0,
++		.controller_data = AT91_PIN_PA28,	/* CS pin */
++	},
++#endif
+ #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
+ 	{	/* DataFlash card - jumper (J12) configurable to CS3 or CS0 */
+ 		.modalias	= "mtd_dataflash",
+@@ -211,9 +264,9 @@
+ 		.max_speed_hz	= 15 * 1000 * 1000,
+ 		.bus_num	= 0,
+ 	},
+-#elif defined(CONFIG_SND_AT73C213)
++#elif defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
+ 	{	/* AT73C213 DAC */
+-		.modalias	= "snd_at73c213",
++		.modalias	= "at73c213",
+ 		.chip_select	= 3,
+ 		.max_speed_hz	= 10 * 1000 * 1000,
+ 		.bus_num	= 0,
+@@ -222,6 +275,65 @@
+ };
+ 
+ 
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++	{
++	        .name           = "TX09D50VM1CCA @ 60",
++		.refresh	= 60,
++		.xres		= 240,		.yres		= 320,
++		.pixclock	= KHZ2PICOS(4965),
++
++		.left_margin	= 1,		.right_margin	= 33,
++		.upper_margin	= 1,		.lower_margin	= 0,
++		.hsync_len	= 5,		.vsync_len	= 1,
++
++		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++	.manufacturer	= "HIT",
++	.monitor        = "TX09D50VM1CCA",
++
++	.modedb		= at91_tft_vga_modes,
++	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
++	.hfmin		= 15000,
++	.hfmax		= 64000,
++	.vfmin		= 50,
++	.vfmax		= 150,
++};
++
++#define AT91SAM9261_DEFAULT_LCDCON2 	(ATMEL_LCDC_MEMOR_LITTLE \
++					| ATMEL_LCDC_DISTYPE_TFT    \
++					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++static void at91_lcdc_power_control(int on)
++{
++	if (on)
++		at91_set_gpio_value(AT91_PIN_PA12, 0);	/* power up */
++	else
++		at91_set_gpio_value(AT91_PIN_PA12, 1);	/* power down */
++}
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++	.default_bpp			= 16,
++	.default_dmacon			= ATMEL_LCDC_DMAEN,
++	.default_lcdcon2		= AT91SAM9261_DEFAULT_LCDCON2,
++	.default_monspecs		= &at91fb_default_monspecs,
++	.atmel_lcdfb_power_control	= at91_lcdc_power_control,
++	.guard_time			= 1,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
+ static void __init ek_board_init(void)
+ {
+ 	/* Serial */
+@@ -241,10 +353,14 @@
+ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
+ 	/* SPI */
+ 	at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++	/* Touchscreen */
++	ek_add_device_ts();
+ #else
+ 	/* MMC */
+ 	at91_add_device_mmc(0, &ek_mmc_data);
+ #endif
++	/* LCD Controller */
++	at91_add_device_lcdc(&ek_lcdc_data);
+ }
+ 
+ MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c
+--- linux-2.6.21/arch/arm/mach-at91/board-sam9263ek.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9263ek.c	Tue May  8 12:56:33 2007
+@@ -25,6 +25,10 @@
+ #include <linux/module.h>
+ #include <linux/platform_device.h>
+ #include <linux/spi/spi.h>
++#include <linux/spi/ads7846.h>
++#include <linux/fb.h>
++
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/hardware.h>
+ #include <asm/setup.h>
+@@ -86,6 +90,40 @@
+ 
+ 
+ /*
++ * ADS7846 Touchscreen
++ */
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++static int ads7843_pendown_state(void)
++{
++	return !at91_get_gpio_value(AT91_PIN_PA15);	/* Touchscreen PENIRQ */
++}
++
++static struct ads7846_platform_data ads_info = {
++	.model			= 7843,
++	.x_min			= 150,
++	.x_max			= 3830,
++	.y_min			= 190,
++	.y_max			= 3830,
++	.vref_delay_usecs	= 100,
++	.x_plate_ohms		= 450,
++	.y_plate_ohms		= 250,
++	.pressure_max		= 15000,
++	.debounce_max		= 1,
++	.debounce_rep		= 0,
++	.debounce_tol		= (~0),
++	.get_pendown_state	= ads7843_pendown_state,
++};
++
++static void __init ek_add_device_ts(void)
++{
++	at91_set_B_periph(AT91_PIN_PA15, 1);	/* External IRQ1, with pullup */
++	at91_set_gpio_input(AT91_PIN_PA31, 1);	/* Touchscreen BUSY signal */
++}
++#else
++static void __init ek_add_device_ts(void) {}
++#endif
++
++/*
+  * SPI devices.
+  */
+ static struct spi_board_info ek_spi_devices[] = {
+@@ -97,6 +135,16 @@
+ 		.bus_num	= 0,
+ 	},
+ #endif
++#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
++	{
++		.modalias	= "ads7846",
++		.chip_select	= 3,
++		.max_speed_hz	= 125000 * 26,	/* (max sample rate @ 3V) * (cmd + data + overhead) */
++		.bus_num	= 0,
++		.platform_data	= &ads_info,
++		.irq		= AT91SAM9263_ID_IRQ1,
++	},
++#endif
+ };
+ 
+ 
+@@ -112,6 +160,14 @@
+ 
+ 
+ /*
++ * MACB Ethernet device
++ */
++static struct at91_eth_data __initdata ek_macb_data = {
++	.is_rmii	= 1,
++};
++
++
++/*
+  * NAND flash
+  */
+ static struct mtd_partition __initdata ek_nand_partition[] = {
+@@ -148,6 +204,73 @@
+ };
+ 
+ 
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++	{
++	        .name           = "TX09D50VM1CCA @ 60",
++		.refresh	= 60,
++		.xres		= 240,		.yres		= 320,
++		.pixclock	= KHZ2PICOS(4965),
++
++		.left_margin	= 1,		.right_margin	= 33,
++		.upper_margin	= 1,		.lower_margin	= 0,
++		.hsync_len	= 5,		.vsync_len	= 1,
++
++		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++	.manufacturer	= "HIT",
++	.monitor        = "TX09D70VM1CCA",
++
++	.modedb		= at91_tft_vga_modes,
++	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
++	.hfmin		= 15000,
++	.hfmax		= 64000,
++	.vfmin		= 50,
++	.vfmax		= 150,
++};
++
++#define AT91SAM9263_DEFAULT_LCDCON2 	(ATMEL_LCDC_MEMOR_LITTLE \
++					| ATMEL_LCDC_DISTYPE_TFT    \
++					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++static void at91_lcdc_power_control(int on)
++{
++	if (on)
++		at91_set_gpio_value(AT91_PIN_PD12, 0);	/* power up */
++	else
++		at91_set_gpio_value(AT91_PIN_PD12, 1);	/* power down */
++}
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++	.default_bpp			= 16,
++	.default_dmacon			= ATMEL_LCDC_DMAEN,
++	.default_lcdcon2		= AT91SAM9263_DEFAULT_LCDCON2,
++	.default_monspecs		= &at91fb_default_monspecs,
++	.atmel_lcdfb_power_control	= at91_lcdc_power_control,
++	.guard_time			= 1,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
++/*
++ * AC97
++ */
++static struct atmel_ac97_data ek_ac97_data = {
++	.reset_pin	= AT91_PIN_PA13,
++};
++
++
+ static void __init ek_board_init(void)
+ {
+ 	/* Serial */
+@@ -157,11 +280,22 @@
+ 	/* USB Device */
+ 	at91_add_device_udc(&ek_udc_data);
+ 	/* SPI */
++	at91_set_gpio_output(AT91_PIN_PE20, 1);		/* select spi0 clock */
+ 	at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++	/* Touchscreen */
++	ek_add_device_ts();
+ 	/* MMC */
+ 	at91_add_device_mmc(1, &ek_mmc_data);
++	/* Ethernet */
++	at91_add_device_eth(&ek_macb_data);
+ 	/* NAND */
+ 	at91_add_device_nand(&ek_nand_data);
++	/* I2C */
++	at91_add_device_i2c();
++	/* LCD Controller */
++	at91_add_device_lcdc(&ek_lcdc_data);
++	/* AC97 */
++	at91_add_device_ac97(&ek_ac97_data);
+ }
+ 
+ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c
+--- linux-2.6.21/arch/arm/mach-at91/board-sam9rlek.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/board-sam9rlek.c	Wed May  9 10:58:34 2007
+@@ -0,0 +1,204 @@
++/*
++ *  Copyright (C) 2005 SAN People
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <linux/fb.h>
++#include <linux/clk.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/hardware.h>
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/irq.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/map.h>
++#include <asm/mach/irq.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/at91sam926x_mc.h>
++
++#include "generic.h"
++
++
++/*
++ * Serial port configuration.
++ *    0 .. 3 = USART0 .. USART3
++ *    4      = DBGU
++ */
++static struct at91_uart_config __initdata ek_uart_config = {
++	.console_tty	= 0,				/* ttyS0 */
++	.nr_tty		= 2,
++	.tty_map	= { 4, 0, -1, -1, -1 }		/* ttyS0, ..., ttyS4 */
++};
++
++static void __init ek_map_io(void)
++{
++	/* Initialize processor: 12.000 MHz crystal */
++	at91sam9rl_initialize(12000000);
++
++	/* Setup the serial ports and console */
++	at91_init_serial(&ek_uart_config);
++}
++
++static void __init ek_init_irq(void)
++{
++	at91sam9rl_init_interrupts(NULL);
++}
++
++
++/*
++ * MCI (SD/MMC)
++ */
++static struct at91_mmc_data __initdata ek_mmc_data = {
++	.wire4		= 1,
++	.det_pin	= AT91_PIN_PA15,
++//	.wp_pin		= ... not connected
++//	.vcc_pin	= ... not connected
++};
++
++
++/*
++ * NAND flash
++ */
++static struct mtd_partition __initdata ek_nand_partition[] = {
++	{
++		.name	= "Partition 1",
++		.offset	= 0,
++		.size	= 256 * 1024,
++	},
++	{
++		.name	= "Partition 2",
++		.offset	= 256 * 1024 ,
++		.size	= MTDPART_SIZ_FULL,
++	},
++};
++
++static struct mtd_partition *nand_partitions(int size, int *num_partitions)
++{
++	*num_partitions = ARRAY_SIZE(ek_nand_partition);
++	return ek_nand_partition;
++}
++
++static struct at91_nand_data __initdata ek_nand_data = {
++	.ale		= 21,
++	.cle		= 22,
++//	.det_pin	= ... not connected
++	.rdy_pin	= AT91_PIN_PD17,
++	.enable_pin	= AT91_PIN_PB6,
++	.partition_info	= nand_partitions,
++	.bus_width_16	= 0,
++};
++
++
++/*
++ * SPI devices
++ */
++static struct spi_board_info ek_spi_devices[] = {
++	{	/* DataFlash chip */
++		.modalias	= "mtd_dataflash",
++		.chip_select	= 0,
++		.max_speed_hz	= 15 * 1000 * 1000,
++		.bus_num	= 0,
++	},
++};
++
++
++/*
++ * LCD Controller
++ */
++#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
++static struct fb_videomode at91_tft_vga_modes[] = {
++	{
++		.name		= "TX09D50VM1CCA @ 60",
++		.refresh	= 60,
++		.xres		= 240,		.yres		= 320,
++		.pixclock	= KHZ2PICOS(4965),
++
++		.left_margin	= 1,		.right_margin	= 33,
++		.upper_margin	= 1,		.lower_margin	= 0,
++		.hsync_len	= 5,		.vsync_len	= 1,
++
++		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs at91fb_default_monspecs = {
++	.manufacturer	= "HIT",
++	.monitor	= "TX09D50VM1CCA",
++
++	.modedb		= at91_tft_vga_modes,
++	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
++	.hfmin		= 15000,
++	.hfmax		= 64000,
++	.vfmin		= 50,
++	.vfmax		= 150,
++};
++
++#define AT91SAM9RL_DEFAULT_LCDCON2	(ATMEL_LCDC_MEMOR_LITTLE \
++					| ATMEL_LCDC_DISTYPE_TFT \
++					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
++
++static void at91_lcdc_power_control(int on)
++{
++	if (on)
++		at91_set_gpio_value(AT91_PIN_PA30, 0);	/* power up */
++	else
++		at91_set_gpio_value(AT91_PIN_PA30, 1);	/* power down */
++}
++
++/* Driver datas */
++static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
++	.default_bpp			= 16,
++	.default_dmacon			= ATMEL_LCDC_DMAEN,
++	.default_lcdcon2		= AT91SAM9RL_DEFAULT_LCDCON2,
++	.default_monspecs		= &at91fb_default_monspecs,
++	.atmel_lcdfb_power_control	= at91_lcdc_power_control,
++	.guard_time			= 1,
++};
++
++#else
++static struct atmel_lcdfb_info __initdata ek_lcdc_data;
++#endif
++
++
++static void __init ek_board_init(void)
++{
++	/* Serial */
++	at91_add_device_serial();
++	/* I2C */
++	at91_add_device_i2c();
++	/* NAND */
++	at91_add_device_nand(&ek_nand_data);
++	/* SPI */
++	at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
++	/* MMC */
++	at91_add_device_mmc(0, &ek_mmc_data);
++	/* LCD Controller */
++	at91_add_device_lcdc(&ek_lcdc_data);
++}
++
++MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
++	/* Maintainer: Atmel */
++	.phys_io	= AT91_BASE_SYS,
++	.io_pg_offst	= (AT91_VA_BASE_SYS >> 18) & 0xfffc,
++	.boot_params	= AT91_SDRAM_BASE + 0x100,
++	.timer		= &at91sam926x_timer,
++	.map_io		= ek_map_io,
++	.init_irq	= ek_init_irq,
++	.init_machine	= ek_board_init,
++MACHINE_END
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/clock.c linux-2.6-stable/arch/arm/mach-at91/clock.c
+--- linux-2.6.21/arch/arm/mach-at91/clock.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/clock.c	Tue May  8 12:13:30 2007
+@@ -32,6 +32,7 @@
+ #include <asm/arch/cpu.h>
+ 
+ #include "clock.h"
++#include "generic.h"
+ 
+ 
+ /*
+@@ -254,6 +255,23 @@
+ 
+ /*------------------------------------------------------------------------*/
+ 
++#ifdef CONFIG_PM
++
++int clk_must_disable(struct clk *clk)
++{
++	if (!at91_suspend_entering_slow_clock())
++		return 0;
++
++	while (clk->parent)
++		clk = clk->parent;
++	return clk != &clk32k;
++}
++EXPORT_SYMBOL(clk_must_disable);
++
++#endif
++
++/*------------------------------------------------------------------------*/
++
+ #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
+ 
+ /*
+@@ -375,6 +393,7 @@
+ 	seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
+ 
+ 	seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
++#warning "Hard-coded PCK"
+ 	for (i = 0; i < 4; i++)
+ 		seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
+ 	seq_printf(s, "SR   = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/generic.h linux-2.6-stable/arch/arm/mach-at91/generic.h
+--- linux-2.6.21/arch/arm/mach-at91/generic.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/generic.h	Wed May  9 10:20:54 2007
+@@ -13,12 +13,14 @@
+ extern void __init at91sam9260_initialize(unsigned long main_clock);
+ extern void __init at91sam9261_initialize(unsigned long main_clock);
+ extern void __init at91sam9263_initialize(unsigned long main_clock);
++extern void __init at91sam9rl_initialize(unsigned long main_clock);
+ 
+  /* Interrupts */
+ extern void __init at91rm9200_init_interrupts(unsigned int priority[]);
+ extern void __init at91sam9260_init_interrupts(unsigned int priority[]);
+ extern void __init at91sam9261_init_interrupts(unsigned int priority[]);
+ extern void __init at91sam9263_init_interrupts(unsigned int priority[]);
++extern void __init at91sam9rl_init_interrupts(unsigned int priority[]);
+ extern void __init at91_aic_init(unsigned int priority[]);
+ 
+  /* Timer */
+@@ -34,6 +36,7 @@
+  /* Power Management */
+ extern void at91_irq_suspend(void);
+ extern void at91_irq_resume(void);
++extern int at91_suspend_entering_slow_clock(void);
+ 
+  /* GPIO */
+ #define AT91RM9200_PQFP		3	/* AT91RM9200 PQFP package has 3 banks */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/ics1523.c linux-2.6-stable/arch/arm/mach-at91/ics1523.c
+--- linux-2.6.21/arch/arm/mach-at91/ics1523.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/ics1523.c	Tue May  8 12:13:30 2007
+@@ -0,0 +1,207 @@
++/*
++ * arch/arm/mach-at91rm9200/ics1523.c
++ *
++ *  Copyright (C) 2003 ATMEL Rousset
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#include <asm/hardware.h>
++#include <asm/io.h>
++
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/init.h>
++
++#include <asm/arch/ics1523.h>
++#include <asm/arch/at91_twi.h>
++#include <asm/arch/gpio.h>
++
++/* TWI Errors */
++#define	AT91_TWI_ERROR	(AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
++
++
++static void __iomem *twi_base;
++
++#define at91_twi_read(reg)		__raw_readl(twi_base + (reg))
++#define at91_twi_write(reg, val)	__raw_writel((val), twi_base + (reg))
++
++
++/* -----------------------------------------------------------------------------
++ * Initialization of TWI CLOCK
++ * ----------------------------------------------------------------------------- */
++
++static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
++{
++	int sclock;
++
++	/* Here, CKDIV = 1 and CHDIV = CLDIV  ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
++	sclock = (10*mck_khz / ICS_TRANSFER_RATE);
++	if (sclock % 10 >= 5)
++		sclock = (sclock /10) - 5;
++	else
++		sclock = (sclock /10)- 6;
++	sclock = (sclock + (4 - sclock %4)) >> 2;	/* div 4 */
++
++	at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
++}
++
++/* -----------------------------------------------------------------------------
++ * Read a byte with TWI Interface from the Clock Generator ICS1523
++ * ----------------------------------------------------------------------------- */
++
++static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
++{
++	int Status, nb_trial;
++
++	at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
++	at91_twi_write(AT91_TWI_IADR, reg_address);
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
++
++	/* Program temporizing period (300us) */
++	udelay(300);
++
++	/* Wait TXcomplete ... */
++	nb_trial = 0;
++	Status = at91_twi_read(AT91_TWI_SR);
++	while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
++		nb_trial++;
++		Status = at91_twi_read(AT91_TWI_SR);
++	}
++
++	if (Status & AT91_TWI_TXCOMP) {
++		*data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
++		return ICS1523_ACCESS_OK;
++	}
++	else
++		return ICS1523_ACCESS_ERROR;
++}
++
++/* -----------------------------------------------------------------------------
++ * Write a byte with TWI Interface to the Clock Generator ICS1523
++ * ----------------------------------------------------------------------------- */
++
++static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
++{
++	int Status, nb_trial;
++
++	at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
++	at91_twi_write(AT91_TWI_IADR, reg_address);
++	at91_twi_write(AT91_TWI_THR, data_out);
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
++
++	/* Program temporizing period (300us) */
++	udelay(300);
++
++	nb_trial = 0;
++	Status = at91_twi_read(AT91_TWI_SR);
++	while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
++		nb_trial++;
++		if (Status & AT91_TWI_ERROR) {
++			/* If Underrun OR NACK - Start again */
++			at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
++
++			/*  Program temporizing period (300us) */
++			udelay(300);
++		}
++		Status = at91_twi_read(AT91_TWI_SR);
++	};
++
++	if (Status & AT91_TWI_TXCOMP)
++		return ICS1523_ACCESS_OK;
++	else
++		return ICS1523_ACCESS_ERROR;
++}
++
++/* -----------------------------------------------------------------------------
++ * Initialization of the Clock Generator ICS1523
++ * ----------------------------------------------------------------------------- */
++
++int at91_ics1523_init(void)
++{
++	int		nb_trial;
++	int		ack = ICS1523_ACCESS_OK;
++	unsigned int	status = 0xffffffff;
++	struct clk	*twi_clk;
++
++	/* Map in TWI peripheral */
++	twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
++	if (!twi_base)
++		return -ENOMEM;
++
++	/* pins used for TWI interface */
++	at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
++	at91_set_multi_drive(AT91_PIN_PA25, 1);
++	at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
++	at91_set_multi_drive(AT91_PIN_PA26, 1);
++
++	/* Enable the TWI clock */
++	twi_clk = clk_get(NULL, "twi_clk");
++	if (IS_ERR(twi_clk))
++		return ICS1523_ACCESS_ERROR;
++	clk_enable(twi_clk);
++
++	/* Disable interrupts */
++	at91_twi_write(AT91_TWI_IDR, -1);
++
++	/* Reset peripheral */
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
++
++	/* Set Master mode */
++	at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
++
++	/* Set TWI Clock Waveform Generator Register */
++	at91_ics1523_SetTwiClock(60000);     /* MCK in KHz = 60000 KHz */
++
++	/* ICS1523 Initialisation */
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
++
++	nb_trial = 0;
++	do {
++		nb_trial++;
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
++		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
++
++		/* Program 1ms temporizing period */
++		mdelay(1);
++
++		at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
++	} while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
++
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
++
++	/* Program 1ms temporizing period */
++	mdelay(1);
++
++	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
++
++	/* Program 1ms temporizing period */
++	mdelay(1);
++	
++	/* All done - cleanup */
++	iounmap(twi_base);
++	clk_disable(twi_clk);
++	clk_put(twi_clk);
++
++	return ack;
++}
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm.c linux-2.6-stable/arch/arm/mach-at91/pm.c
+--- linux-2.6.21/arch/arm/mach-at91/pm.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mach-at91/pm.c	Tue May  8 12:13:31 2007
+@@ -63,6 +63,7 @@
+  * Verify that all the clocks are correct before entering
+  * slow-clock mode.
+  */
++#warning "SAM9260 only has 3 programmable clocks."
+ static int at91_pm_verify_clocks(void)
+ {
+ 	unsigned long scsr;
+@@ -104,20 +105,15 @@
+ }
+ 
+ /*
+- * Call this from platform driver suspend() to see how deeply to suspend.
++ * This is called from clk_must_disable(), to see how deeply to suspend.
+  * For example, some controllers (like OHCI) need one of the PLL clocks
+  * in order to act as a wakeup source, and those are not available when
+  * going into slow clock mode.
+- *
+- * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
+- * the very same problem (but not using at91 main_clk), and it'd be better
+- * to add one generic API rather than lots of platform-specific ones.
+  */
+ int at91_suspend_entering_slow_clock(void)
+ {
+ 	return (target_state == PM_SUSPEND_MEM);
+ }
+-EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
+ 
+ 
+ static void (*slow_clock)(void);
+@@ -207,16 +203,23 @@
+ 	.enter		= at91_pm_enter,
+ };
+ 
++#ifdef CONFIG_AT91_SLOW_CLOCK
++extern void at91rm9200_slow_clock(void);
++extern u32 at91rm9200_slow_clock_sz;
++#endif
++
+ static int __init at91_pm_init(void)
+ {
+-	printk("AT91: Power Management\n");
+-
+-#ifdef CONFIG_AT91_PM_SLOW_CLOCK
+-	/* REVISIT allocations of SRAM should be dynamically managed.
++#ifdef CONFIG_AT91_SLOW_CLOCK
++	/*
++	 * REVISIT allocations of SRAM should be dynamically managed.
+ 	 * FIQ handlers and other components will want SRAM/TCM too...
+ 	 */
+-	slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
++	slow_clock = (void *) (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE + (3 * SZ_4K));
+ 	memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
++	printk("AT91: Power Management (with slow clock mode)\n");
++#else
++	printk("AT91: Power Management\n");
+ #endif
+ 
+ 	/* Disable SDRAM low-power mode.  Cannot be used with self-refresh. */
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S
+--- linux-2.6.21/arch/arm/mach-at91/pm_slowclock.S	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/pm_slowclock.S	Tue May  8 12:13:31 2007
+@@ -0,0 +1,172 @@
++/*
++ * arch/arm/mach-at91/pm_slow_clock.S
++ *
++ *  Copyright (C) 2006 Savin Zlobec
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/linkage.h>
++#include <asm/hardware.h>
++#include <asm/arch/at91_pmc.h>
++#include <asm/arch/at91rm9200_mc.h>
++
++#define MCKRDY_TIMEOUT		1000
++#define MOSCRDY_TIMEOUT 	1000
++#define PLLALOCK_TIMEOUT	1000
++
++	.macro wait_mckrdy
++	mov	r2, #MCKRDY_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_MCKRDY
++	beq	1b
++2:
++	.endm
++
++	.macro wait_moscrdy
++	mov	r2, #MOSCRDY_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_MOSCS
++	beq	1b
++2:
++	.endm
++
++	.macro wait_pllalock
++	mov	r2, #PLLALOCK_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_LOCKA
++	beq	1b
++2:
++	.endm
++
++	.macro wait_plladis
++	mov	r2, #PLLALOCK_TIMEOUT
++1:	sub	r2, r2, #1
++	cmp	r2, #0
++	beq	2f
++	ldr	r3, [r1, #AT91_PMC_SR]
++	tst	r3, #AT91_PMC_LOCKA
++	bne	1b
++2:
++	.endm
++
++	.text
++
++ENTRY(at91rm9200_slow_clock)
++
++	ldr	r1, .at91_va_base_sys
++
++	/* Put SDRAM in self refresh mode */
++
++	b	1f
++	.align	5
++1:	mcr	p15, 0, r0, c7, c10, 4
++	mov	r2, #1
++	str	r2, [r1, #AT91_SDRAMC_SRR]
++
++	/* Save Master clock setting */
++
++	ldr	r2, [r1, #AT91_PMC_MCKR]
++	str	r2, .saved_mckr
++
++	/*
++	 * Set the Master clock source to slow clock
++	 *
++	 * First set the CSS field, wait for MCKRDY
++	 * and than set the PRES and MDIV fields.
++	 *
++	 * See eratta #2[78] for details.
++	 */
++
++	bic	r2, r2, #3
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	wait_mckrdy
++
++	mov	r2, #0
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	/* Save PLLA setting and disable it */
++
++	ldr	r2, [r1, #AT91_CKGR_PLLAR]
++	str	r2, .saved_pllar
++
++	mov	r2, #0
++	str	r2, [r1, #AT91_CKGR_PLLAR]
++
++	wait_plladis
++
++	/* Turn off the main oscillator */
++
++	ldr	r2, [r1, #AT91_CKGR_MOR]
++	bic	r2, r2, #AT91_PMC_MOSCEN
++	str	r2, [r1, #AT91_CKGR_MOR]
++
++	/* Wait for interrupt */
++
++	mcr	p15, 0, r0, c7, c0, 4
++
++	/* Turn on the main oscillator */
++
++	ldr	r2, [r1, #AT91_CKGR_MOR]
++	orr	r2, r2, #AT91_PMC_MOSCEN
++	str	r2, [r1, #AT91_CKGR_MOR]
++
++	wait_moscrdy
++
++	/* Restore PLLA setting */
++
++	ldr	r2, .saved_pllar
++	str	r2, [r1, #AT91_CKGR_PLLAR]
++
++	wait_pllalock
++
++	/*
++	 * Restore master clock setting
++	 *
++	 * First set PRES if it was not 0,
++	 * than set CSS and MDIV fields.
++	 * After every change wait for
++	 * MCKRDY.
++	 *
++	 * See eratta #2[78] for details.
++	 */
++
++	ldr	r2, .saved_mckr
++	tst	r2, #0x1C
++	beq	2f
++	and	r2, r2, #0x1C
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	wait_mckrdy
++
++2:	ldr	r2, .saved_mckr
++	str	r2, [r1, #AT91_PMC_MCKR]
++
++	wait_mckrdy
++
++	mov	pc, lr
++
++.saved_mckr:
++	.word 0
++
++.saved_pllar:
++	.word 0
++
++.at91_va_base_sys:
++	.word AT91_VA_BASE_SYS
++
++ENTRY(at91rm9200_slow_clock_sz)
++	.word .-at91rm9200_slow_clock
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/tclib.c linux-2.6-stable/arch/arm/mach-at91/tclib.c
+--- linux-2.6.21/arch/arm/mach-at91/tclib.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/tclib.c	Tue May  8 12:13:31 2007
+@@ -0,0 +1,17 @@
++#include <linux/clk.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++
++#include "tclib.h"
++
++static struct atmel_tcblock *blocks;
++static int nblocks;
++
++/*
++ * Called from the processor-specific init to register the TC Blocks.
++ */
++void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n)
++{
++	blocks = tcblocks;
++	nblocks = n;
++}
+diff -urN -x CVS linux-2.6.21/arch/arm/mach-at91/tclib.h linux-2.6-stable/arch/arm/mach-at91/tclib.h
+--- linux-2.6.21/arch/arm/mach-at91/tclib.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/arch/arm/mach-at91/tclib.h	Tue May  8 12:13:31 2007
+@@ -0,0 +1,11 @@
++
++#define TC_PER_TCB	3
++
++struct atmel_tcblock {
++	u32 		physaddr;
++	void __iomem	*ioaddr;
++	struct clk	*clk[TC_PER_TCB];
++	int		irq[TC_PER_TCB];
++};
++
++extern void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n);
+diff -urN -x CVS linux-2.6.21/arch/arm/mm/Kconfig linux-2.6-stable/arch/arm/mm/Kconfig
+--- linux-2.6.21/arch/arm/mm/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/mm/Kconfig	Wed May  9 10:20:54 2007
+@@ -171,8 +171,8 @@
+ # ARM926T
+ config CPU_ARM926T
+ 	bool "Support ARM926T processor"
+-	depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX
+-	default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX
++	depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX
++	default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX
+ 	select CPU_32v5
+ 	select CPU_ABRT_EV5TJ
+ 	select CPU_CACHE_VIVT
+diff -urN -x CVS linux-2.6.21/arch/arm/tools/mach-types linux-2.6-stable/arch/arm/tools/mach-types
+--- linux-2.6.21/arch/arm/tools/mach-types	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/arch/arm/tools/mach-types	Tue May  8 12:13:31 2007
+@@ -1335,3 +1335,32 @@
+ comtech_router		MACH_COMTECH_ROUTER	COMTECH_ROUTER		1327
+ sbc2410x		MACH_SBC2410X		SBC2410X		1328
+ at4x0bd			MACH_AT4X0BD		AT4X0BD			1329
++cbifr			MACH_CBIFR		CBIFR			1330
++arcom_quantum		MACH_ARCOM_QUANTUM	ARCOM_QUANTUM		1331
++matrix520		MACH_MATRIX520		MATRIX520		1332
++matrix510		MACH_MATRIX510		MATRIX510		1333
++matrix500		MACH_MATRIX500		MATRIX500		1334
++m501			MACH_M501		M501			1335
++aaeon1270		MACH_AAEON1270		AAEON1270		1336
++matrix500ev		MACH_MATRIX500EV	MATRIX500EV		1337
++pac500			MACH_PAC500		PAC500			1338
++pnx8181			MACH_PNX8181		PNX8181			1339
++colibri320		MACH_COLIBRI320		COLIBRI320		1340
++aztoolbb		MACH_AZTOOLBB		AZTOOLBB		1341
++aztoolg2		MACH_AZTOOLG2		AZTOOLG2		1342
++dvlhost			MACH_DVLHOST		DVLHOST			1343
++zir9200			MACH_ZIR9200		ZIR9200			1344
++zir9260			MACH_ZIR9260		ZIR9260			1345
++cocopah			MACH_COCOPAH		COCOPAH			1346
++nds			MACH_NDS		NDS			1347
++rosencrantz		MACH_ROSENCRANTZ	ROSENCRANTZ		1348
++fttx_odsc		MACH_FTTX_ODSC		FTTX_ODSC		1349
++classe_r6904		MACH_CLASSE_R6904	CLASSE_R6904		1350
++cam60			MACH_CAM60		CAM60			1351
++mxc30031ads		MACH_MXC30031ADS	MXC30031ADS		1352
++datacall		MACH_DATACALL		DATACALL		1353
++at91eb01		MACH_AT91EB01		AT91EB01		1354
++rty			MACH_RTY		RTY			1355
++dwl2100			MACH_DWL2100		DWL2100			1356
++vinsi			MACH_VINSI		VINSI			1357
++db88f5281		MACH_DB88F5281		DB88F5281		1358
+diff -urN -x CVS linux-2.6.21/drivers/char/Kconfig linux-2.6-stable/drivers/char/Kconfig
+--- linux-2.6.21/drivers/char/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/char/Kconfig	Tue May  8 14:31:24 2007
+@@ -1071,5 +1071,21 @@
+ 	  /sys/devices/platform/telco_clock, with a number of files for
+ 	  controlling the behavior of this hardware.
+ 
++config AT91_SPI
++	bool "SPI driver (legacy) for AT91RM9200 processors"
++	depends on ARCH_AT91RM9200
++	default y
++	help
++	  The SPI driver gives access to this serial bus on the AT91RM9200
++	  processor.
++
++config AT91_SPIDEV
++	bool "SPI device interface (legacy) for AT91RM9200 processors"
++	depends on ARCH_AT91RM9200 && AT91_SPI
++	default n
++	help
++	  The SPI driver gives user mode access to this serial
++	  bus on the AT91RM9200 processor.
++
+ endmenu
+ 
+diff -urN -x CVS linux-2.6.21/drivers/char/Makefile linux-2.6-stable/drivers/char/Makefile
+--- linux-2.6.21/drivers/char/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/char/Makefile	Tue May  8 14:31:24 2007
+@@ -93,6 +93,8 @@
+ obj-$(CONFIG_GPIO_VR41XX)	+= vr41xx_giu.o
+ obj-$(CONFIG_TANBAC_TB0219)	+= tb0219.o
+ obj-$(CONFIG_TELCLOCK)		+= tlclk.o
++obj-$(CONFIG_AT91_SPI)		+= at91_spi.o
++obj-$(CONFIG_AT91_SPIDEV)	+= at91_spidev.o
+ 
+ obj-$(CONFIG_WATCHDOG)		+= watchdog/
+ obj-$(CONFIG_MWAVE)		+= mwave/
+diff -urN -x CVS linux-2.6.21/drivers/char/at91_spi.c linux-2.6-stable/drivers/char/at91_spi.c
+--- linux-2.6.21/drivers/char/at91_spi.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/char/at91_spi.c	Tue May  8 14:31:24 2007
+@@ -0,0 +1,336 @@
++/*
++ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder)
++ *
++ *  Copyright (C) SAN People (Pty) Ltd
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/dma-mapping.h>
++#include <linux/module.h>
++#include <linux/sched.h>
++#include <linux/completion.h>
++#include <linux/interrupt.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/atmel_pdc.h>
++#include <asm/io.h>
++#include <asm/semaphore.h>
++
++#include <asm/arch/at91_spi.h>
++#include <asm/arch/board.h>
++#include <asm/arch/spi.h>
++
++#undef DEBUG_SPI
++
++static struct spi_local spi_dev[NR_SPI_DEVICES];	/* state of the SPI devices */
++static int spi_enabled = 0;
++static struct semaphore spi_lock;			/* protect access to SPI bus */
++static int current_device = -1;				/* currently selected SPI device */
++static struct clk *spi_clk;				/* SPI clock */
++static void __iomem *spi_base;				/* SPI peripheral base-address */
++
++DECLARE_COMPLETION(transfer_complete);
++
++
++#define at91_spi_read(reg)		__raw_readl(spi_base + (reg))
++#define at91_spi_write(reg, val)	__raw_writel((val), spi_base + (reg))
++
++
++/* ......................................................................... */
++
++/*
++ * Access and enable the SPI bus.
++ * This MUST be called before any transfers are performed.
++ */
++void spi_access_bus(short device)
++{
++	/* Ensure that requested device is valid */
++	if ((device < 0) || (device >= NR_SPI_DEVICES))
++		panic("at91_spi: spi_access_bus called with invalid device");
++
++	if (spi_enabled == 0) {
++		clk_enable(spi_clk);				/* Enable Peripheral clock */
++		at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN);	/* Enable SPI */
++#ifdef DEBUG_SPI
++		printk("SPI on\n");
++#endif
++	}
++	spi_enabled++;
++
++	/* Lock the SPI bus */
++	down(&spi_lock);
++	current_device = device;
++
++	/* Configure SPI bus for device */
++	at91_spi_write(AT91_SPI_MR, AT91_SPI_MSTR | AT91_SPI_MODFDIS | (spi_dev[device].pcs << 16));
++}
++
++/*
++ * Relinquish control of the SPI bus.
++ */
++void spi_release_bus(short device)
++{
++	if (device != current_device)
++		panic("at91_spi: spi_release called with invalid device");
++
++	/* Release the SPI bus */
++	current_device = -1;
++	up(&spi_lock);
++
++	spi_enabled--;
++	if (spi_enabled == 0) {
++		at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS);	/* Disable SPI */
++		clk_disable(spi_clk);				/* Disable Peripheral clock */
++#ifdef DEBUG_SPI
++		printk("SPI off\n");
++#endif
++	}
++}
++
++/*
++ * Perform a data transfer over the SPI bus
++ */
++int spi_transfer(struct spi_transfer_list* list)
++{
++	struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
++	int tx_size;
++
++	if (!list)
++		panic("at91_spi: spi_transfer called with NULL transfer list");
++	if (current_device == -1)
++		panic("at91_spi: spi_transfer called without acquiring bus");
++
++#ifdef DEBUG_SPI
++	printk("SPI transfer start [%i]\n", list->nr_transfers);
++#endif
++
++	/* If we are in 16-bit mode, we need to modify what we pass to the PDC */
++	tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
++
++	/* Store transfer list */
++	device->xfers = list;
++	list->curr = 0;
++
++	/* Assume there must be at least one transfer */
++	device->tx = dma_map_single(NULL, list->tx[0], list->txlen[0], DMA_TO_DEVICE);
++	device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE);
++
++	/* Program PDC registers */
++	at91_spi_write(ATMEL_PDC_TPR, device->tx);
++	at91_spi_write(ATMEL_PDC_RPR, device->rx);
++	at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size);
++	at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size);
++
++	/* Is there a second transfer? */
++	if (list->nr_transfers > 1) {
++		device->txnext = dma_map_single(NULL, list->tx[1], list->txlen[1], DMA_TO_DEVICE);
++		device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE);
++
++		/* Program Next PDC registers */
++		at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
++		at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
++		at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size);
++		at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size);
++	}
++	else {
++		device->txnext = 0;
++		device->rxnext = 0;
++		at91_spi_write(ATMEL_PDC_TNCR, 0);
++		at91_spi_write(ATMEL_PDC_RNCR, 0);
++	}
++
++	// TODO: If we are doing consecutive transfers (at high speed, or
++	//   small buffers), then it might be worth modifying the 'Delay between
++	//   Consecutive Transfers' in the CSR registers.
++	//   This is an issue if we cannot chain the next buffer fast enough
++	//   in the interrupt handler.
++
++	/* Enable transmitter and receiver */
++	at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN);
++
++	at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX);		/* enable buffer complete interrupt */
++	wait_for_completion(&transfer_complete);
++
++#ifdef DEBUG_SPI
++	printk("SPI transfer end\n");
++#endif
++
++	return 0;
++}
++
++/* ......................................................................... */
++
++/*
++ * Handle interrupts from the SPI controller.
++ */
++static irqreturn_t at91spi_interrupt(int irq, void *dev_id)
++{
++	unsigned int status;
++	struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
++	struct spi_transfer_list *list = device->xfers;
++
++#ifdef DEBUG_SPI
++	printk("SPI interrupt %i\n", current_device);
++#endif
++
++	if (!list)
++		panic("at91_spi: spi_interrupt with a NULL transfer list");
++
++		status = at91_spi_read(AT91_SPI_SR) & at91_spi_read(AT91_SPI_IMR);	/* read status */
++
++	dma_unmap_single(NULL, device->tx, list->txlen[list->curr], DMA_TO_DEVICE);
++	dma_unmap_single(NULL, device->rx, list->rxlen[list->curr], DMA_FROM_DEVICE);
++
++	device->tx = device->txnext;	/* move next transfer to current transfer */
++	device->rx = device->rxnext;
++
++	list->curr = list->curr + 1;
++	if (list->curr == list->nr_transfers) {		/* all transfers complete */
++		at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX);		/* disable interrupt */
++
++		/* Disable transmitter and receiver */
++		at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
++
++		device->xfers = NULL;
++		complete(&transfer_complete);
++	}
++	else if (list->curr+1 == list->nr_transfers) {	/* no more next transfers */
++		device->txnext = 0;
++		device->rxnext = 0;
++		at91_spi_write(ATMEL_PDC_TNCR, 0);
++		at91_spi_write(ATMEL_PDC_RNCR, 0);
++	}
++	else {
++		int i = (list->curr)+1;
++
++		/* If we are in 16-bit mode, we need to modify what we pass to the PDC */
++		int tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
++
++		device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE);
++		device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE);
++		at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
++		at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
++		at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size);
++		at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size);
++	}
++	return IRQ_HANDLED;
++}
++
++/* ......................................................................... */
++
++/*
++ * Initialize the SPI controller
++ */
++static int __init at91spi_probe(struct platform_device *pdev)
++{
++	int i;
++	unsigned long scbr;
++	struct resource *res;
++
++	init_MUTEX(&spi_lock);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res)
++		return -ENXIO;
++
++	if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi"))
++		return -EBUSY;
++
++	spi_base = ioremap(res->start, res->end - res->start + 1);
++	if (!spi_base) {
++		release_mem_region(res->start, res->end - res->start + 1);
++		return -ENOMEM;
++	}
++
++	spi_clk = clk_get(NULL, "spi_clk");
++	if (IS_ERR(spi_clk)) {
++		printk(KERN_ERR "at91_spi: no clock defined\n");
++		iounmap(spi_base);
++		release_mem_region(res->start, res->end - res->start + 1);
++		return -ENODEV;
++	}
++
++	at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST);	/* software reset of SPI controller */
++
++	/*
++	 * Calculate the correct SPI baud-rate divisor.
++	 */
++	scbr = clk_get_rate(spi_clk) / (2 * DEFAULT_SPI_CLK);
++	scbr = scbr + 1;		/* round up */
++
++	printk(KERN_INFO "at91_spi: Baud rate set to %ld\n", clk_get_rate(spi_clk) / (2 * scbr));
++
++	/* Set Chip Select registers to good defaults */
++	for (i = 0; i < 4; i++) {
++		at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8));
++	}
++
++	at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
++
++	memset(&spi_dev, 0, sizeof(spi_dev));
++	spi_dev[0].pcs = 0xE;
++	spi_dev[1].pcs = 0xD;
++	spi_dev[2].pcs = 0xB;
++	spi_dev[3].pcs = 0x7;
++
++	if (request_irq(AT91RM9200_ID_SPI, at91spi_interrupt, 0, "spi", NULL)) {
++		clk_put(spi_clk);
++		iounmap(spi_base);
++		release_mem_region(res->start, res->end - res->start + 1);
++		return -EBUSY;
++	}
++
++	at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN);		/* Enable SPI */
++
++	return 0;
++}
++
++static int __devexit at91spi_remove(struct platform_device *pdev)
++{
++	struct resource *res;
++
++	at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS);		/* Disable SPI */
++	clk_put(spi_clk);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	iounmap(spi_base);
++	release_mem_region(res->start, res->end - res->start + 1);
++
++	free_irq(AT91RM9200_ID_SPI, 0);
++	return 0;
++}
++
++static struct platform_driver at91spi_driver = {
++	.probe		= at91spi_probe,
++	.remove		= __devexit_p(at91spi_remove),
++	.driver		= {
++		.name	= "at91_spi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at91spi_init(void)
++{
++	return platform_driver_register(&at91spi_driver);
++}
++
++static void __exit at91spi_exit(void)
++{
++	platform_driver_unregister(&at91spi_driver);
++}
++
++EXPORT_SYMBOL(spi_access_bus);
++EXPORT_SYMBOL(spi_release_bus);
++EXPORT_SYMBOL(spi_transfer);
++
++module_init(at91spi_init);
++module_exit(at91spi_exit);
++
++MODULE_LICENSE("GPL")
++MODULE_AUTHOR("Andrew Victor")
++MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200")
+diff -urN -x CVS linux-2.6.21/drivers/char/at91_spidev.c linux-2.6-stable/drivers/char/at91_spidev.c
+--- linux-2.6.21/drivers/char/at91_spidev.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/char/at91_spidev.c	Tue May  8 14:31:24 2007
+@@ -0,0 +1,236 @@
++/*
++ * User-space interface to the SPI bus on Atmel AT91RM9200
++ *
++ *  Copyright (C) 2003 SAN People (Pty) Ltd
++ *
++ * Based on SPI driver by Rick Bronson
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/highmem.h>
++#include <linux/pagemap.h>
++#include <asm/arch/spi.h>
++
++#ifdef CONFIG_DEVFS_FS
++#include <linux/devfs_fs_kernel.h>
++#endif
++
++
++#undef DEBUG_SPIDEV
++
++/* ......................................................................... */
++
++/*
++ * Read or Write to SPI bus.
++ */
++static ssize_t spidev_rd_wr(struct file *file, char *buf, size_t count, loff_t *offset)
++{
++	unsigned int spi_device = (unsigned int) file->private_data;
++
++	struct mm_struct * mm;
++	struct page ** maplist;
++	struct spi_transfer_list* list;
++	int    pgcount;
++
++	unsigned int ofs, pagelen;
++	int res, i, err;
++
++	if (!count) {
++		return 0;
++	}
++
++	list = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
++	if (!list) {
++		return -ENOMEM;
++	}
++
++	mm = current->mm;
++
++	pgcount = ((unsigned long)buf+count+PAGE_SIZE-1)/PAGE_SIZE - (unsigned long)buf/PAGE_SIZE;
++
++	if (pgcount >= MAX_SPI_TRANSFERS) {
++		kfree(list);
++		return -EFBIG;
++	}
++
++	maplist = kmalloc (pgcount * sizeof (struct page *), GFP_KERNEL);
++
++	if (!maplist) {
++		kfree(list);
++		return -ENOMEM;
++	}
++	flush_cache_all();
++	down_read(&mm->mmap_sem);
++	err= get_user_pages(current, mm, (unsigned long)buf, pgcount, 1, 0, maplist, NULL);
++	up_read(&mm->mmap_sem);
++
++	if (err < 0) {
++		kfree(list);
++		kfree(maplist);
++		return err;
++	}
++	pgcount = err;
++
++#ifdef DEBUG_SPIDEV
++	printk("spidev_rd_rw: %i %i\n", count, pgcount);
++#endif
++
++	/* Set default return value = transfer length */
++	res = count;
++
++	/*
++	 * At this point, the virtual area buf[0] .. buf[count-1] will have
++	 * corresponding pages mapped in the physical memory and locked until
++	 * we unmap the kiobuf.  The pages cannot be swapped out or moved
++	 * around.
++	 */
++	ofs = (unsigned long) buf & (PAGE_SIZE -1);
++	pagelen = PAGE_SIZE - ofs;
++	if (count < pagelen)
++		pagelen = count;
++
++	for (i = 0; i < pgcount; i++) {
++		flush_dcache_page(maplist[i]);
++
++		list->tx[i] = list->rx[i] = page_address(maplist[i]) + ofs;
++		list->txlen[i] = list->rxlen[i] = pagelen;
++
++#ifdef DEBUG_SPIDEV
++		printk("  %i: %x  (%i)\n", i, list->tx[i], list->txlen[i]);
++#endif
++
++		ofs = 0;	/* all subsequent transfers start at beginning of a page */
++		count = count - pagelen;
++		pagelen = (count < PAGE_SIZE) ? count : PAGE_SIZE;
++	}
++	list->nr_transfers = pgcount;
++
++	/* Perform transfer on SPI bus */
++	spi_access_bus(spi_device);
++	spi_transfer(list);
++	spi_release_bus(spi_device);
++
++	while (pgcount--) {
++		page_cache_release (maplist[pgcount]);
++	}
++	flush_cache_all();
++
++	kfree(maplist);
++	kfree(list);
++
++	return res;
++}
++
++static int spidev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
++{
++	int spi_device = MINOR(inode->i_rdev);
++
++	if (spi_device >= NR_SPI_DEVICES)
++		return -ENODEV;
++
++	// TODO: This interface can be used to configure the SPI bus.
++	// Configurable options could include: Speed, Clock Polarity, Clock Phase
++
++	switch(cmd) {
++		default:
++			return -ENOIOCTLCMD;
++	}
++}
++
++/*
++ * Open the SPI device
++ */
++static int spidev_open(struct inode *inode, struct file *file)
++{
++	unsigned int spi_device = MINOR(inode->i_rdev);
++
++	if (spi_device >= NR_SPI_DEVICES)
++		return -ENODEV;
++
++	/*
++	 * 'private_data' is actually a pointer, but we overload it with the
++	 * value we want to store.
++	 */
++	file->private_data = (void *)spi_device;
++
++	return 0;
++}
++
++/*
++ * Close the SPI device
++ */
++static int spidev_close(struct inode *inode, struct file *file)
++{
++	return 0;
++}
++
++/* ......................................................................... */
++
++static struct file_operations spidev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.read		= spidev_rd_wr,
++	.write		= (int (*) (struct file *file, const char *buf, size_t count, loff_t *offset))spidev_rd_wr,
++	.ioctl		= spidev_ioctl,
++	.open		= spidev_open,
++	.release	= spidev_close,
++};
++
++/*
++ * Install the SPI /dev interface driver
++ */
++static int __init at91_spidev_init(void)
++{
++#ifdef CONFIG_DEVFS_FS
++	int i;
++#endif
++
++	if (register_chrdev(SPI_MAJOR, "spi", &spidev_fops)) {
++		printk(KERN_ERR "at91_spidev: Unable to get major %d for SPI bus\n", SPI_MAJOR);
++		return -EIO;
++	}
++
++#ifdef CONFIG_DEVFS_FS
++	devfs_mk_dir("spi");
++	for (i = 0; i < NR_SPI_DEVICES; i++) {
++		devfs_mk_cdev(MKDEV(SPI_MAJOR, i), S_IFCHR | S_IRUSR | S_IWUSR, "spi/%d",i);
++	}
++#endif
++	printk(KERN_INFO "AT91 SPI driver loaded\n");
++
++	return 0;
++}
++
++/*
++ * Remove the SPI /dev interface driver
++ */
++static void __exit at91_spidev_exit(void)
++{
++#ifdef CONFIG_DEVFS_FS
++	int i;
++	for (i = 0; i < NR_SPI_DEVICES; i++) {
++		devfs_remove("spi/%d", i);
++	}
++
++	devfs_remove("spi");
++#endif
++
++	if (unregister_chrdev(SPI_MAJOR, "spi")) {
++		printk(KERN_ERR "at91_spidev: Unable to release major %d for SPI bus\n", SPI_MAJOR);
++		return;
++	}
++}
++
++module_init(at91_spidev_init);
++module_exit(at91_spidev_exit);
++
++MODULE_LICENSE("GPL")
++MODULE_AUTHOR("Andrew Victor")
++MODULE_DESCRIPTION("SPI /dev interface for Atmel AT91RM9200")
+diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/Kconfig linux-2.6-stable/drivers/i2c/busses/Kconfig
+--- linux-2.6.21/drivers/i2c/busses/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/i2c/busses/Kconfig	Tue May  8 12:13:31 2007
+@@ -81,6 +81,14 @@
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_AT91_CLOCKRATE
++	prompt "Atmel AT91 I2C/TWI clock-rate"
++	depends on I2C_AT91
++	int
++	default 100000
++	help
++	  Set the AT91 I2C/TWI clock-rate.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on I2C && (SOC_AU1550 || SOC_AU1200)
+@@ -545,6 +553,14 @@
+ 	  This driver can also be built as a module.  If so, the module
+ 	  will be called i2c-voodoo3.
+ 
++config I2C_PCA
++	tristate "PCA9564"
++	depends on I2C
++	select I2C_ALGOPCA
++	help
++	  This driver support the Philips PCA 9564 Parallel bus to I2C
++	  bus controller.
++
+ config I2C_PCA_ISA
+ 	tristate "PCA9564 on an ISA bus"
+ 	depends on I2C
+diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/Makefile linux-2.6-stable/drivers/i2c/busses/Makefile
+--- linux-2.6.21/drivers/i2c/busses/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/i2c/busses/Makefile	Tue May  8 12:13:31 2007
+@@ -28,6 +28,7 @@
+ obj-$(CONFIG_I2C_PARPORT)	+= i2c-parport.o
+ obj-$(CONFIG_I2C_PARPORT_LIGHT)	+= i2c-parport-light.o
+ obj-$(CONFIG_I2C_PASEMI)	+= i2c-pasemi.o
++obj-$(CONFIG_I2C_PCA)		+= i2c-pca.o
+ obj-$(CONFIG_I2C_PCA_ISA)	+= i2c-pca-isa.o
+ obj-$(CONFIG_I2C_PIIX4)		+= i2c-piix4.o
+ obj-$(CONFIG_I2C_PNX)		+= i2c-pnx.o
+diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/i2c-at91.c linux-2.6-stable/drivers/i2c/busses/i2c-at91.c
+--- linux-2.6.21/drivers/i2c/busses/i2c-at91.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/i2c/busses/i2c-at91.c	Tue May  8 12:13:31 2007
+@@ -31,8 +31,11 @@
+ #include <asm/arch/board.h>
+ #include <asm/arch/cpu.h>
+ 
+-#define TWI_CLOCK		100000		/* Hz. max 400 Kbits/sec */
+ 
++/* Clockrate is configurable - max 400 Kbits/sec */
++static unsigned int clockrate = CONFIG_I2C_AT91_CLOCKRATE;
++module_param(clockrate, uint, 0);
++MODULE_PARM_DESC(clockrate, "The TWI clockrate");
+ 
+ static struct clk *twi_clk;
+ static void __iomem *twi_base;
+@@ -53,7 +56,7 @@
+ 	at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);	/* Set Master mode */
+ 
+ 	/* Calcuate clock dividers */
+-	cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
++	cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3;
+ 	cdiv = cdiv + 1;	/* round up */
+ 	ckdiv = 0;
+ 	while (cdiv > 255) {
+@@ -61,11 +64,12 @@
+ 		cdiv = cdiv >> 1;
+ 	}
+ 
+-	if (cpu_is_at91rm9200()) {			/* AT91RM9200 Errata #22 */
+-		if (ckdiv > 5) {
+-			printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
+-			ckdiv = 5;
+-		}
++	if (cpu_is_at91rm9200() && (ckdiv > 5)) {	/* AT91RM9200 Errata #22 */
++		printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
++		ckdiv = 5;
++	} else if (ckdiv > 7) {
++		printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
++		ckdiv = 7;
+ 	}
+ 
+ 	at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
+diff -urN -x CVS linux-2.6.21/drivers/i2c/busses/i2c-pca.c linux-2.6-stable/drivers/i2c/busses/i2c-pca.c
+--- linux-2.6.21/drivers/i2c/busses/i2c-pca.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/i2c/busses/i2c-pca.c	Tue May  8 12:13:31 2007
+@@ -0,0 +1,213 @@
++/*
++ *  Platform driver for PCA9564 I2C bus controller.
++ *
++ *  (C) 2006 Andrew Victor
++ *
++ *  Based on i2c-pca-isa.c driver for PCA9564 on ISA boards
++ *    Copyright (C) 2004 Arcom Control Systems
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation; either version 2 of the License, or
++ *  (at your option) any later version.
++ *
++ *  This program is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with this program; if not, write to the Free Software
++ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/delay.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/wait.h>
++#include <linux/platform_device.h>
++
++#include <linux/i2c.h>
++#include <linux/i2c-algo-pca.h>
++
++#include <asm/io.h>
++
++#include "../algos/i2c-algo-pca.h"
++
++#define PCA_OWN_ADDRESS		0x55	/* our address for slave mode */
++#define PCA_CLOCK		I2C_PCA_CON_59kHz
++
++//#define REG_SHIFT		2
++#define REG_SHIFT		0
++
++//#define DEBUG_IO
++
++#define PCA_IO_SIZE 4
++
++static void __iomem *base_addr;
++static int irq;
++static wait_queue_head_t pca_wait;
++
++static int pca_getown(struct i2c_algo_pca_data *adap)
++{
++	return PCA_OWN_ADDRESS;
++}
++
++static int pca_getclock(struct i2c_algo_pca_data *adap)
++{
++	return PCA_CLOCK;
++}
++
++static void pca_writebyte(struct i2c_algo_pca_data *adap, int reg, int val)
++{
++#ifdef DEBUG_IO
++	static char *names[] = { "T/O", "DAT", "ADR", "CON" };
++	printk("*** write %s at %#lx <= %#04x\n", names[reg], (unsigned long) base_addr+reg, val);
++#endif
++	udelay(1);
++	outb(val, base_addr + (reg << REG_SHIFT));
++}
++
++static int pca_readbyte(struct i2c_algo_pca_data *adap, int reg)
++{
++	int res;
++
++	udelay(1);
++	res = inb(base_addr + (reg << REG_SHIFT));
++#ifdef DEBUG_IO
++	{
++		static char *names[] = { "STA", "DAT", "ADR", "CON" };
++		printk("*** read  %s => %#04x\n", names[reg], res);
++	}
++#endif
++	return res;
++}
++
++static int pca_waitforinterrupt(struct i2c_algo_pca_data *adap)
++{
++	int ret = 0;
++
++	if (irq > -1) {
++		ret = wait_event_interruptible(pca_wait,
++				pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI);
++	} else {
++		while ((pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
++			udelay(100);
++	}
++	return ret;
++}
++
++static irqreturn_t pca_handler(int this_irq, void *dev_id)
++{
++	wake_up_interruptible(&pca_wait);
++	return IRQ_HANDLED;
++}
++
++static struct i2c_algo_pca_data pca_i2c_data = {
++	.get_own		= pca_getown,
++	.get_clock		= pca_getclock,
++	.write_byte		= pca_writebyte,
++	.read_byte		= pca_readbyte,
++	.wait_for_interrupt	= pca_waitforinterrupt,
++};
++
++static struct i2c_adapter pca_i2c_ops = {
++	.owner          = THIS_MODULE,
++	.id		= I2C_HW_A_PLAT,
++	.algo_data	= &pca_i2c_data,
++	.name		= "PCA9564",
++	.class		= I2C_CLASS_HWMON,
++};
++
++static int __devinit pca_i2c_probe(struct platform_device *pdev)
++{
++	struct resource *res;
++
++	init_waitqueue_head(&pca_wait);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res)
++		return -ENODEV;
++
++	if (!request_mem_region(res->start, PCA_IO_SIZE, "PCA9564"))
++		return -ENXIO;
++
++	base_addr = ioremap(res->start, PCA_IO_SIZE);
++	if (base_addr == NULL)
++		goto out_region;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq > -1) {
++		if (request_irq(irq, pca_handler, 0, "pca9564", NULL) < 0) {
++			printk(KERN_ERR "i2c-pca: Request irq%d failed\n", irq);
++			goto out_remap;
++		}
++	}
++
++	/* set up the driverfs linkage to our parent device */
++	pca_i2c_ops.dev.parent = &pdev->dev;
++
++	if (i2c_pca_add_bus(&pca_i2c_ops) < 0) {
++		printk(KERN_ERR "i2c-pca: Failed to add i2c bus\n");
++		goto out_irq;
++	}
++
++	return 0;
++
++ out_irq:
++	if (irq > -1)
++		free_irq(irq, &pca_i2c_ops);
++
++ out_remap:
++	iounmap(base_addr);
++
++ out_region:
++	release_mem_region(res->start, PCA_IO_SIZE);
++	return -ENODEV;
++}
++
++static int __devexit pca_i2c_remove(struct platform_device *pdev)
++{
++	struct resource *res;
++
++	i2c_del_adapter(&pca_i2c_ops);
++
++	if (irq > 0)
++		free_irq(irq, NULL);
++
++	iounmap(base_addr);
++
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	release_mem_region(res->start, PCA_IO_SIZE);
++
++	return 0;
++}
++
++static struct platform_driver pca_i2c_driver = {
++	.probe		= pca_i2c_probe,
++	.remove		= __devexit_p(pca_i2c_remove),
++	.driver		= {
++		.name	= "pca9564",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init pca_i2c_init(void)
++{
++	return platform_driver_register(&pca_i2c_driver);
++}
++
++static void __exit pca_i2c_exit(void)
++{
++	platform_driver_unregister(&pca_i2c_driver);
++}
++
++module_init(pca_i2c_init);
++module_exit(pca_i2c_exit);
++
++MODULE_AUTHOR("Andrew Victor");
++MODULE_DESCRIPTION("PCA9564 platform driver");
++MODULE_LICENSE("GPL");
+diff -urN -x CVS linux-2.6.21/drivers/input/touchscreen/ads7846.c linux-2.6-stable/drivers/input/touchscreen/ads7846.c
+--- linux-2.6.21/drivers/input/touchscreen/ads7846.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/input/touchscreen/ads7846.c	Tue May  8 12:56:33 2007
+@@ -39,7 +39,8 @@
+ /*
+  * This code has been heavily tested on a Nokia 770, and lightly
+  * tested on other ads7846 devices (OSK/Mistral, Lubbock).
+- * Support for ads7843 and ads7845 has only been stubbed in.
++ * Support for ads7843 tested on Atmel at91sam926x-EK.
++ * Support for ads7845 has only been stubbed in.
+  *
+  * IRQ handling needs a workaround because of a shortcoming in handling
+  * edge triggered IRQs on some platforms like the OMAP1/2. These
+@@ -246,18 +247,16 @@
+ 
+ 	/* REVISIT:  take a few more samples, and compare ... */
+ 
+-	/* maybe off internal vREF */
+-	if (use_internal) {
+-		req->ref_off = REF_OFF;
+-		req->xfer[4].tx_buf = &req->ref_off;
+-		req->xfer[4].len = 1;
+-		spi_message_add_tail(&req->xfer[4], &req->msg);
+-
+-		req->xfer[5].rx_buf = &req->scratch;
+-		req->xfer[5].len = 2;
+-		CS_CHANGE(req->xfer[5]);
+-		spi_message_add_tail(&req->xfer[5], &req->msg);
+-	}
++	/* converter in low power mode & enable PENIRQ */
++	req->ref_off = PWRDOWN;
++	req->xfer[4].tx_buf = &req->ref_off;
++	req->xfer[4].len = 1;
++	spi_message_add_tail(&req->xfer[4], &req->msg);
++
++	req->xfer[5].rx_buf = &req->scratch;
++	req->xfer[5].len = 2;
++	CS_CHANGE(req->xfer[5]);
++	spi_message_add_tail(&req->xfer[5], &req->msg);
+ 
+ 	ts->irq_disabled = 1;
+ 	disable_irq(spi->irq);
+@@ -536,6 +535,9 @@
+ 	} else
+ 		Rt = 0;
+ 
++	if (ts->model == 7843)
++		Rt = ts->pressure_max / 2;
++
+ 	/* Sample found inconsistent by debouncing or pressure is beyond
+ 	 * the maximum. Don't report it to user space, repeat at least
+ 	 * once more the measurement
+diff -urN -x CVS linux-2.6.21/drivers/leds/Kconfig linux-2.6-stable/drivers/leds/Kconfig
+--- linux-2.6.21/drivers/leds/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/leds/Kconfig	Tue May  8 12:13:31 2007
+@@ -76,6 +76,13 @@
+ 	  This option enables support for the Soekris net4801 and net4826 error
+ 	  LED.
+ 
++config LEDS_AT91
++	tristate "LED support using AT91 GPIOs"
++	depends on LEDS_CLASS && ARCH_AT91 && !LEDS
++	help
++	  This option enables support for LEDs connected to GPIO lines
++	  on AT91-based boards.
++
+ config LEDS_WRAP
+ 	tristate "LED Support for the WRAP series LEDs"
+ 	depends on LEDS_CLASS && SCx200_GPIO
+diff -urN -x CVS linux-2.6.21/drivers/leds/Makefile linux-2.6-stable/drivers/leds/Makefile
+--- linux-2.6.21/drivers/leds/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/leds/Makefile	Tue May  8 12:13:31 2007
+@@ -16,6 +16,7 @@
+ obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
+ obj-$(CONFIG_LEDS_H1940)		+= leds-h1940.o
+ obj-$(CONFIG_LEDS_COBALT)		+= leds-cobalt.o
++obj-$(CONFIG_LEDS_AT91)			+= leds-at91.o
+ 
+ # LED Triggers
+ obj-$(CONFIG_LEDS_TRIGGER_TIMER)	+= ledtrig-timer.o
+diff -urN -x CVS linux-2.6.21/drivers/leds/leds-at91.c linux-2.6-stable/drivers/leds/leds-at91.c
+--- linux-2.6.21/drivers/leds/leds-at91.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/leds/leds-at91.c	Tue May  8 12:13:31 2007
+@@ -0,0 +1,140 @@
++/*
++ * AT91 GPIO based LED driver
++ *
++ * Copyright (C) 2006 David Brownell
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++static LIST_HEAD(at91_led_list);	/* list of AT91 LEDs */
++
++struct at91_led {
++	struct led_classdev	cdev;
++	struct list_head	list;
++	struct at91_gpio_led	*led_data;
++};
++
++/*
++ * Change the state of the LED.
++ */
++static void at91_led_set(struct led_classdev *cdev, enum led_brightness value)
++{
++	struct at91_led	*led = container_of(cdev, struct at91_led, cdev);
++	short		active = (value == LED_OFF);
++
++	if (led->led_data->flags & 1)	/* active high/low? */
++		active = !active;
++	at91_set_gpio_value(led->led_data->gpio, active);
++}
++
++static int __devexit at91_led_remove(struct platform_device *pdev)
++{
++	struct at91_led		*led;
++
++	list_for_each_entry (led, &at91_led_list, list)
++		led_classdev_unregister(&led->cdev);
++
++#warning "Free allocated memory"
++	// TODO: Free memory.	kfree(led);
++
++	return 0;
++}
++
++static int __init at91_led_probe(struct platform_device *pdev)
++{
++	int			status = 0;
++	struct at91_gpio_led	*pdata = pdev->dev.platform_data;
++	unsigned		nr_leds;
++	struct at91_led		*led;
++
++	if (!pdata)
++		return -ENODEV;
++
++	nr_leds = pdata->index;		/* first index stores number of LEDs */
++
++	while (nr_leds--) {
++		led = kzalloc(sizeof(struct at91_led), GFP_KERNEL);
++		if (!led) {
++			dev_err(&pdev->dev, "No memory for device\n");
++			status = -ENOMEM;
++			goto cleanup;
++		}
++		led->led_data = pdata;
++		led->cdev.name = pdata->name;
++		led->cdev.brightness_set = at91_led_set,
++		led->cdev.default_trigger = pdata->trigger;
++
++		status = led_classdev_register(&pdev->dev, &led->cdev);
++		if (status < 0) {
++			dev_err(&pdev->dev, "led_classdev_register failed - %d\n", status);
++cleanup:
++			at91_led_remove(pdev);
++			break;
++		}
++		list_add(&led->list, &at91_led_list);
++		pdata++;
++	}
++	return status;
++}
++
++#ifdef CONFIG_PM
++static int at91_led_suspend(struct platform_device *dev, pm_message_t state)
++{
++	struct at91_led	*led;
++
++	list_for_each_entry (led, &at91_led_list, list)
++		led_classdev_suspend(&led->cdev);
++
++	return 0;
++}
++
++static int at91_led_resume(struct platform_device *dev)
++{
++	struct at91_led	*led;
++
++	list_for_each_entry (led, &at91_led_list, list)
++		led_classdev_resume(&led->cdev);
++
++	return 0;
++}
++#else
++#define	at91_led_suspend	NULL
++#define	at91_led_resume		NULL
++#endif
++
++static struct platform_driver at91_led_driver = {
++	.probe		= at91_led_probe,
++	.remove		= __devexit_p(at91_led_remove),
++	.suspend	= at91_led_suspend,
++	.resume		= at91_led_resume,
++	.driver		= {
++		.name	= "at91_leds",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at91_led_init(void)
++{
++	return platform_driver_register(&at91_led_driver);
++}
++module_init(at91_led_init);
++
++static void __exit at91_led_exit(void)
++{
++	platform_driver_unregister(&at91_led_driver);
++}
++module_exit(at91_led_exit);
++
++MODULE_DESCRIPTION("AT91 GPIO LED driver");
++MODULE_AUTHOR("David Brownell");
++MODULE_LICENSE("GPL");
+diff -urN -x CVS linux-2.6.21/drivers/mmc/at91_mci.c linux-2.6-stable/drivers/mmc/at91_mci.c
+--- linux-2.6.21/drivers/mmc/at91_mci.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/mmc/at91_mci.c	Fri May 11 17:13:13 2007
+@@ -86,7 +86,7 @@
+ 
+ #define AT91_MCI_ERRORS	(AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE	\
+ 		| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE		\
+-		| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)			
++		| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
+ 
+ #define at91_mci_read(host, reg)	__raw_readl((host)->baseaddr + (reg))
+ #define at91_mci_write(host, reg, val)	__raw_writel((val), (host)->baseaddr + (reg))
+@@ -561,9 +561,7 @@
+ 	pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
+ 		 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
+ 
+-	if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE |
+-			AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE |
+-			AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) {
++	if (status & AT91_MCI_ERRORS) {
+ 		if ((status & AT91_MCI_RCRCE) &&
+ 			((cmd->opcode == MMC_SEND_OP_COND) || (cmd->opcode == SD_APP_OP_COND))) {
+ 			cmd->error = MMC_ERR_NONE;
+@@ -665,15 +663,15 @@
+ 
+ 	int_status = at91_mci_read(host, AT91_MCI_SR);
+ 	int_mask = at91_mci_read(host, AT91_MCI_IMR);
+-	
++
+ 	pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
+ 		int_status & int_mask);
+-	
++
+ 	int_status = int_status & int_mask;
+ 
+ 	if (int_status & AT91_MCI_ERRORS) {
+ 		completed = 1;
+-		
++
+ 		if (int_status & AT91_MCI_UNRE)
+ 			pr_debug("MMC: Underrun error\n");
+ 		if (int_status & AT91_MCI_OVRE)
+@@ -821,7 +819,7 @@
+ 	mmc->f_min = 375000;
+ 	mmc->f_max = 25000000;
+ 	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
+-	mmc->caps = MMC_CAP_BYTEBLOCK;
++	mmc->caps = MMC_CAP_BYTEBLOCK | MMC_CAP_MULTIWRITE;
+ 
+ 	mmc->max_blk_size = 4095;
+ 	mmc->max_blk_count = mmc->max_req_size;
+@@ -895,6 +893,8 @@
+ 
+ 	mmc_add_host(mmc);
+ 
++	device_init_wakeup(&pdev->dev, 1);
++
+ 	/*
+ 	 * monitor card insertion/removal if we can
+ 	 */
+@@ -924,6 +924,8 @@
+ 
+ 	host = mmc_priv(mmc);
+ 
++	device_init_wakeup(&pdev->dev, 0);
++
+ 	if (host->present != -1) {
+ 		free_irq(host->board->det_pin, host);
+ 		cancel_delayed_work(&host->mmc->detect);
+@@ -951,8 +953,12 @@
+ static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
+ {
+ 	struct mmc_host *mmc = platform_get_drvdata(pdev);
++	struct at91mci_host *host = mmc_priv(mmc);
+ 	int ret = 0;
+ 
++	if (device_may_wakeup(&pdev->dev))
++		enable_irq_wake(host->board->det_pin);
++
+ 	if (mmc)
+ 		ret = mmc_suspend_host(mmc, state);
+ 
+@@ -962,8 +968,12 @@
+ static int at91_mci_resume(struct platform_device *pdev)
+ {
+ 	struct mmc_host *mmc = platform_get_drvdata(pdev);
++	struct at91mci_host *host = mmc_priv(mmc);
+ 	int ret = 0;
+ 
++	if (device_may_wakeup(&pdev->dev))
++		disable_irq_wake(host->board->det_pin);
++
+ 	if (mmc)
+ 		ret = mmc_resume_host(mmc);
+ 
+diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/Kconfig linux-2.6-stable/drivers/mtd/devices/Kconfig
+--- linux-2.6.21/drivers/mtd/devices/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/mtd/devices/Kconfig	Tue May  8 14:31:24 2007
+@@ -267,5 +267,11 @@
+ 	  LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
+ 	  you have managed to wipe the first block.
+ 
+-endmenu
++config MTD_AT91_DATAFLASH
++	tristate "AT91RM9200 DataFlash AT45DBxxx (legacy driver)"
++	depends on MTD && ARCH_AT91RM9200 && AT91_SPI
++	help
++	  This enables access to the DataFlash (AT45DBxxx) on the AT91RM9200.
++	  If you have such a board, say 'Y'.
+ 
++endmenu
+diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/Makefile linux-2.6-stable/drivers/mtd/devices/Makefile
+--- linux-2.6.21/drivers/mtd/devices/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/mtd/devices/Makefile	Tue May  8 14:31:24 2007
+@@ -17,3 +17,4 @@
+ obj-$(CONFIG_MTD_BLOCK2MTD)	+= block2mtd.o
+ obj-$(CONFIG_MTD_DATAFLASH)	+= mtd_dataflash.o
+ obj-$(CONFIG_MTD_M25P80)	+= m25p80.o
++obj-$(CONFIG_MTD_AT91_DATAFLASH)+= at91_dataflash.o
+diff -urN -x CVS linux-2.6.21/drivers/mtd/devices/at91_dataflash.c linux-2.6-stable/drivers/mtd/devices/at91_dataflash.c
+--- linux-2.6.21/drivers/mtd/devices/at91_dataflash.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/mtd/devices/at91_dataflash.c	Tue May  8 14:31:24 2007
+@@ -0,0 +1,667 @@
++/*
++ * Atmel DataFlash driver for Atmel AT91RM9200 (Thunder)
++ *
++ *  Copyright (C) SAN People (Pty) Ltd
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/slab.h>
++#include <linux/pci.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++#include <asm/arch/spi.h>
++
++#undef DEBUG_DATAFLASH
++
++#define DATAFLASH_MAX_DEVICES	4	/* max number of dataflash devices */
++#undef	DATAFLASH_ALWAYS_ADD_DEVICE	/* always add whole device when using partitions? */
++
++#define OP_READ_CONTINUOUS	0xE8
++#define OP_READ_PAGE		0xD2
++#define OP_READ_BUFFER1		0xD4
++#define OP_READ_BUFFER2		0xD6
++#define OP_READ_STATUS		0xD7
++
++#define OP_ERASE_PAGE		0x81
++#define OP_ERASE_BLOCK		0x50
++
++#define OP_TRANSFER_BUF1	0x53
++#define OP_TRANSFER_BUF2	0x55
++#define OP_COMPARE_BUF1		0x60
++#define OP_COMPARE_BUF2		0x61
++
++#define OP_PROGRAM_VIA_BUF1	0x82
++#define OP_PROGRAM_VIA_BUF2	0x85
++
++struct dataflash_local
++{
++	int spi;			/* SPI chip-select number */
++
++	unsigned int page_size;		/* number of bytes per page */
++	unsigned short page_offset;	/* page offset in flash address */
++};
++
++
++/* Detected DataFlash devices */
++static struct mtd_info* mtd_devices[DATAFLASH_MAX_DEVICES];
++static int nr_devices = 0;
++
++/* ......................................................................... */
++
++#ifdef CONFIG_MTD_PARTITIONS
++
++static struct mtd_partition static_partitions_2M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 1 * 32 * 8 * 528,	/* 1st sector = 32 blocks * 8 pages * 528 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 6 * 32 * 8 * 528,	/* 6 sectors */
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,	/* rest = 9 sectors */
++	}
++};
++
++static struct mtd_partition static_partitions_4M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 1 * 64 * 8 * 528,	/* 1st sector = 64 blocks * 8 pages * 528 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 4 * 64 * 8 * 528,	/* 4 sectors */
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,	/* rest = 11 sectors */
++	}
++};
++
++#if defined(CONFIG_MACH_KAFA)
++static struct mtd_partition static_partitions_8M[] =
++{
++	{
++		name:		"romboot",
++		offset:		0,
++		size:		16 * 1056,	/* 160 Kb */
++		mask_flags:	MTD_WRITEABLE,		/* read-only */
++	},
++	{
++		name:		"uboot",
++		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
++		size:		128 * 1056,		/* 1 MB */
++	},
++	{
++		name:		"kernel",
++		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
++		size:		1024 * 1056,		/* 1 MB */
++	},
++	{
++		name:		"filesystem",
++		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
++		size:		MTDPART_SIZ_FULL,
++	}
++};
++
++#elif defined(CONFIG_MACH_MULTMDP)
++
++static struct mtd_partition static_partitions_8M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 12 * 1056,		/* 1st sector = 32 blocks * 8 pages * 1056 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "configuration",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 20 * 1056,
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 1520 * 1056,
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,
++	}
++};
++
++#else
++
++static struct mtd_partition static_partitions_8M[] =
++{
++	{
++		.name		= "bootloader",
++		.offset		= 0,
++		.size		= 1 * 32 * 8 * 1056,	/* 1st sector = 32 blocks * 8 pages * 1056 bytes */
++		.mask_flags	= MTD_WRITEABLE,	/* read-only */
++	},
++	{
++		.name		= "kernel",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= 5 * 32 * 8 * 1056,	/* 5 sectors */
++	},
++	{
++		.name		= "filesystem",
++		.offset		= MTDPART_OFS_NXTBLK,
++		.size		= MTDPART_SIZ_FULL,	/* rest = 26 sectors */
++	}
++};
++#endif
++
++static const char *part_probes[] = { "cmdlinepart", NULL, };
++
++#endif
++
++/* ......................................................................... */
++
++/* Allocate a single SPI transfer descriptor.  We're assuming that if multiple
++   SPI transfers occur at the same time, spi_access_bus() will serialize them.
++   If this is not valid, then either (i) each dataflash 'priv' structure
++   needs it's own transfer descriptor, (ii) we lock this one, or (iii) use
++   another mechanism.   */
++static struct spi_transfer_list* spi_transfer_desc;
++
++/*
++ * Perform a SPI transfer to access the DataFlash device.
++ */
++static int do_spi_transfer(int nr, char* tx, int tx_len, char* rx, int rx_len,
++		char* txnext, int txnext_len, char* rxnext, int rxnext_len)
++{
++	struct spi_transfer_list* list = spi_transfer_desc;
++
++	list->tx[0] = tx;	list->txlen[0] = tx_len;
++	list->rx[0] = rx;	list->rxlen[0] = rx_len;
++
++	list->tx[1] = txnext;	list->txlen[1] = txnext_len;
++	list->rx[1] = rxnext;	list->rxlen[1] = rxnext_len;
++
++	list->nr_transfers = nr;
++
++	return spi_transfer(list);
++}
++
++/* ......................................................................... */
++
++/*
++ * Poll the DataFlash device until it is READY.
++ */
++static void at91_dataflash_waitready(void)
++{
++	char* command = kmalloc(2, GFP_KERNEL);
++
++	if (!command)
++		return;
++
++	do {
++		command[0] = OP_READ_STATUS;
++		command[1] = 0;
++
++		do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
++	} while ((command[1] & 0x80) == 0);
++
++	kfree(command);
++}
++
++/*
++ * Return the status of the DataFlash device.
++ */
++static unsigned short at91_dataflash_status(void)
++{
++	unsigned short status;
++	char* command = kmalloc(2, GFP_KERNEL);
++
++	if (!command)
++		return 0;
++
++	command[0] = OP_READ_STATUS;
++	command[1] = 0;
++
++	do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
++	status = command[1];
++
++	kfree(command);
++	return status;
++}
++
++/* ......................................................................... */
++
++/*
++ * Erase blocks of flash.
++ */
++static int at91_dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
++{
++	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
++	unsigned int pageaddr;
++	char* command;
++
++#ifdef DEBUG_DATAFLASH
++	printk("dataflash_erase: addr=%i len=%i\n", instr->addr, instr->len);
++#endif
++
++	/* Sanity checks */
++	if (instr->addr + instr->len > mtd->size)
++		return -EINVAL;
++	if ((instr->len % mtd->erasesize != 0) || (instr->len % priv->page_size != 0))
++		return -EINVAL;
++	if ((instr->addr % priv->page_size) != 0)
++		return -EINVAL;
++
++	command = kmalloc(4, GFP_KERNEL);
++	if (!command)
++		return -ENOMEM;
++
++	while (instr->len > 0) {
++		/* Calculate flash page address */
++		pageaddr = (instr->addr / priv->page_size) << priv->page_offset;
++
++		command[0] = OP_ERASE_PAGE;
++		command[1] = (pageaddr & 0x00FF0000) >> 16;
++		command[2] = (pageaddr & 0x0000FF00) >> 8;
++		command[3] = 0;
++#ifdef DEBUG_DATAFLASH
++		printk("ERASE: (%x) %x %x %x [%i]\n", command[0], command[1], command[2], command[3], pageaddr);
++#endif
++
++		/* Send command to SPI device */
++		spi_access_bus(priv->spi);
++		do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
++
++		at91_dataflash_waitready();		/* poll status until ready */
++		spi_release_bus(priv->spi);
++
++		instr->addr += priv->page_size;		/* next page */
++		instr->len -= priv->page_size;
++	}
++
++	kfree(command);
++
++	/* Inform MTD subsystem that erase is complete */
++	instr->state = MTD_ERASE_DONE;
++	if (instr->callback)
++		instr->callback(instr);
++
++	return 0;
++}
++
++/*
++ * Read from the DataFlash device.
++ *   from   : Start offset in flash device
++ *   len    : Amount to read
++ *   retlen : About of data actually read
++ *   buf    : Buffer containing the data
++ */
++static int at91_dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
++{
++	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
++	unsigned int addr;
++	char* command;
++
++#ifdef DEBUG_DATAFLASH
++	printk("dataflash_read: %lli .. %lli\n", from, from+len);
++#endif
++
++	*retlen = 0;
++
++	/* Sanity checks */
++	if (!len)
++		return 0;
++	if (from + len > mtd->size)
++		return -EINVAL;
++
++	/* Calculate flash page/byte address */
++	addr = (((unsigned)from / priv->page_size) << priv->page_offset) + ((unsigned)from % priv->page_size);
++
++	command = kmalloc(8, GFP_KERNEL);
++	if (!command)
++		return -ENOMEM;
++
++	command[0] = OP_READ_CONTINUOUS;
++	command[1] = (addr & 0x00FF0000) >> 16;
++	command[2] = (addr & 0x0000FF00) >> 8;
++	command[3] = (addr & 0x000000FF);
++#ifdef DEBUG_DATAFLASH
++	printk("READ: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++
++	/* Send command to SPI device */
++	spi_access_bus(priv->spi);
++	do_spi_transfer(2, command, 8, command, 8, buf, len, buf, len);
++	spi_release_bus(priv->spi);
++
++	*retlen = len;
++	kfree(command);
++	return 0;
++}
++
++/*
++ * Write to the DataFlash device.
++ *   to     : Start offset in flash device
++ *   len    : Amount to write
++ *   retlen : Amount of data actually written
++ *   buf    : Buffer containing the data
++ */
++static int at91_dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
++{
++	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
++	unsigned int pageaddr, addr, offset, writelen;
++	size_t remaining;
++	u_char *writebuf;
++	unsigned short status;
++	int res = 0;
++	char* command;
++	char* tmpbuf = NULL;
++
++#ifdef DEBUG_DATAFLASH
++	printk("dataflash_write: %lli .. %lli\n", to, to+len);
++#endif
++
++	*retlen = 0;
++
++	/* Sanity checks */
++	if (!len)
++		return 0;
++	if (to + len > mtd->size)
++		return -EINVAL;
++
++	command = kmalloc(4, GFP_KERNEL);
++	if (!command)
++		return -ENOMEM;
++
++	pageaddr = ((unsigned)to / priv->page_size);
++	offset = ((unsigned)to % priv->page_size);
++	if (offset + len > priv->page_size)
++		writelen = priv->page_size - offset;
++	else
++		writelen = len;
++	writebuf = (u_char *)buf;
++	remaining = len;
++
++	/* Allocate temporary buffer */
++	tmpbuf = kmalloc(priv->page_size, GFP_KERNEL);
++	if (!tmpbuf) {
++		kfree(command);
++		return -ENOMEM;
++	}
++
++	/* Gain access to the SPI bus */
++	spi_access_bus(priv->spi);
++
++	while (remaining > 0) {
++#ifdef DEBUG_DATAFLASH
++		printk("write @ %i:%i len=%i\n", pageaddr, offset, writelen);
++#endif
++
++		/* (1) Transfer to Buffer1 */
++		if (writelen != priv->page_size) {
++			addr = pageaddr << priv->page_offset;
++			command[0] = OP_TRANSFER_BUF1;
++			command[1] = (addr & 0x00FF0000) >> 16;
++			command[2] = (addr & 0x0000FF00) >> 8;
++			command[3] = 0;
++#ifdef DEBUG_DATAFLASH
++			printk("TRANSFER: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++			do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
++			at91_dataflash_waitready();
++		}
++
++		/* (2) Program via Buffer1 */
++		addr = (pageaddr << priv->page_offset) + offset;
++		command[0] = OP_PROGRAM_VIA_BUF1;
++		command[1] = (addr & 0x00FF0000) >> 16;
++		command[2] = (addr & 0x0000FF00) >> 8;
++		command[3] = (addr & 0x000000FF);
++#ifdef DEBUG_DATAFLASH
++		printk("PROGRAM: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++		do_spi_transfer(2, command, 4, command, 4, writebuf, writelen, tmpbuf, writelen);
++		at91_dataflash_waitready();
++
++		/* (3) Compare to Buffer1 */
++		addr = pageaddr << priv->page_offset;
++		command[0] = OP_COMPARE_BUF1;
++		command[1] = (addr & 0x00FF0000) >> 16;
++		command[2] = (addr & 0x0000FF00) >> 8;
++		command[3] = 0;
++#ifdef DEBUG_DATAFLASH
++		printk("COMPARE: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
++#endif
++		do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
++		at91_dataflash_waitready();
++
++		/* Get result of the compare operation */
++		status = at91_dataflash_status();
++		if ((status & 0x40) == 1) {
++			printk("at91_dataflash: Write error on page %i\n", pageaddr);
++			remaining = 0;
++			res = -EIO;
++		}
++
++		remaining = remaining - writelen;
++		pageaddr++;
++		offset = 0;
++		writebuf += writelen;
++		*retlen += writelen;
++
++		if (remaining > priv->page_size)
++			writelen = priv->page_size;
++		else
++			writelen = remaining;
++	}
++
++	/* Release SPI bus */
++	spi_release_bus(priv->spi);
++
++	kfree(tmpbuf);
++	kfree(command);
++	return res;
++}
++
++/* ......................................................................... */
++
++/*
++ * Initialize and register DataFlash device with MTD subsystem.
++ */
++static int __init add_dataflash(int channel, char *name, int IDsize,
++		int nr_pages, int pagesize, int pageoffset)
++{
++	struct mtd_info *device;
++	struct dataflash_local *priv;
++#ifdef CONFIG_MTD_PARTITIONS
++	struct mtd_partition *mtd_parts = 0;
++	int mtd_parts_nr = 0;
++#endif
++
++	if (nr_devices >= DATAFLASH_MAX_DEVICES) {
++		printk(KERN_ERR "at91_dataflash: Too many devices detected\n");
++		return 0;
++	}
++
++	device = kmalloc(sizeof(struct mtd_info) + strlen(name) + 8, GFP_KERNEL);
++	if (!device)
++		return -ENOMEM;
++	memset(device, 0, sizeof(struct mtd_info));
++
++	device->name = (char *)&device[1];
++	sprintf(device->name, "%s.spi%d", name, channel);
++	device->size = nr_pages * pagesize;
++	device->erasesize = pagesize;
++	device->writesize = pagesize;
++	device->owner = THIS_MODULE;
++	device->type = MTD_DATAFLASH;
++	device->flags = MTD_WRITEABLE;
++	device->erase = at91_dataflash_erase;
++	device->read = at91_dataflash_read;
++	device->write = at91_dataflash_write;
++
++	priv = (struct dataflash_local *) kmalloc(sizeof(struct dataflash_local), GFP_KERNEL);
++	if (!priv) {
++		kfree(device);
++		return -ENOMEM;
++	}
++	memset(priv, 0, sizeof(struct dataflash_local));
++
++	priv->spi = channel;
++	priv->page_size = pagesize;
++	priv->page_offset = pageoffset;
++	device->priv = priv;
++
++	mtd_devices[nr_devices] = device;
++	nr_devices++;
++	printk("at91_dataflash: %s detected [spi%i] (%i bytes)\n", name, channel, device->size);
++
++#ifdef CONFIG_MTD_PARTITIONS
++#ifdef CONFIG_MTD_CMDLINE_PARTS
++	mtd_parts_nr = parse_mtd_partitions(device, part_probes, &mtd_parts, 0);
++#endif
++	if (mtd_parts_nr <= 0) {
++		switch (IDsize) {
++			case SZ_2M:
++				mtd_parts = static_partitions_2M;
++				mtd_parts_nr = ARRAY_SIZE(static_partitions_2M);
++				break;
++			case SZ_4M:
++				mtd_parts = static_partitions_4M;
++				mtd_parts_nr = ARRAY_SIZE(static_partitions_4M);
++				break;
++			case SZ_8M:
++				mtd_parts = static_partitions_8M;
++				mtd_parts_nr = ARRAY_SIZE(static_partitions_8M);
++				break;
++		}
++	}
++
++	if (mtd_parts_nr > 0) {
++#ifdef DATAFLASH_ALWAYS_ADD_DEVICE
++		add_mtd_device(device);
++#endif
++		return add_mtd_partitions(device, mtd_parts, mtd_parts_nr);
++	}
++#endif
++	return add_mtd_device(device);		/* add whole device */
++}
++
++/*
++ * Detect and initialize DataFlash device connected to specified SPI channel.
++ *
++ *   Device            Density         ID code                 Nr Pages        Page Size       Page offset
++ *   AT45DB011B        1Mbit   (128K)  xx0011xx (0x0c)         512             264             9
++ *   AT45DB021B        2Mbit   (256K)  xx0101xx (0x14)         1025            264             9
++ *   AT45DB041B        4Mbit   (512K)  xx0111xx (0x1c)         2048            264             9
++ *   AT45DB081B        8Mbit   (1M)    xx1001xx (0x24)         4096            264             9
++ *   AT45DB0161B       16Mbit  (2M)    xx1011xx (0x2c)         4096            528             10
++ *   AT45DB0321B       32Mbit  (4M)    xx1101xx (0x34)         8192            528             10
++ *   AT45DB0642        64Mbit  (8M)    xx1111xx (0x3c)         8192            1056            11
++ *   AT45DB1282        128Mbit (16M)   xx0100xx (0x10)         16384           1056            11
++ */
++static int __init at91_dataflash_detect(int channel)
++{
++	int res = 0;
++	unsigned short status;
++
++	spi_access_bus(channel);
++	status = at91_dataflash_status();
++	spi_release_bus(channel);
++	if (status != 0xff) {			/* no dataflash device there */
++		switch (status & 0x3c) {
++			case 0x0c:	/* 0 0 1 1 */
++				res = add_dataflash(channel, "AT45DB011B", SZ_128K, 512, 264, 9);
++				break;
++			case 0x14:	/* 0 1 0 1 */
++				res = add_dataflash(channel, "AT45DB021B", SZ_256K, 1025, 264, 9);
++				break;
++			case 0x1c:	/* 0 1 1 1 */
++				res = add_dataflash(channel, "AT45DB041B", SZ_512K, 2048, 264, 9);
++				break;
++			case 0x24:	/* 1 0 0 1 */
++				res = add_dataflash(channel, "AT45DB081B", SZ_1M, 4096, 264, 9);
++				break;
++			case 0x2c:	/* 1 0 1 1 */
++				res = add_dataflash(channel, "AT45DB161B", SZ_2M, 4096, 528, 10);
++				break;
++			case 0x34:	/* 1 1 0 1 */
++				res = add_dataflash(channel, "AT45DB321B", SZ_4M, 8192, 528, 10);
++				break;
++			case 0x3c:	/* 1 1 1 1 */
++				res = add_dataflash(channel, "AT45DB642", SZ_8M, 8192, 1056, 11);
++				break;
++// Currently unsupported since Atmel removed the "Main Memory Program via Buffer" commands.
++//			case 0x10:	/* 0 1 0 0 */
++//				res = add_dataflash(channel, "AT45DB1282", SZ_16M, 16384, 1056, 11);
++//				break;
++			default:
++				printk(KERN_ERR "at91_dataflash: Unknown device (%x)\n", status & 0x3c);
++		}
++	}
++
++	return res;
++}
++
++static int __init at91_dataflash_init(void)
++{
++	spi_transfer_desc = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
++	if (!spi_transfer_desc)
++		return -ENOMEM;
++
++	/* DataFlash (SPI chip select 0) */
++	at91_dataflash_detect(0);
++
++#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
++	/* DataFlash card (SPI chip select 3) */
++	at91_dataflash_detect(3);
++#endif
++
++	return 0;
++}
++
++static void __exit at91_dataflash_exit(void)
++{
++	int i;
++
++	for (i = 0; i < DATAFLASH_MAX_DEVICES; i++) {
++		if (mtd_devices[i]) {
++#ifdef CONFIG_MTD_PARTITIONS
++			del_mtd_partitions(mtd_devices[i]);
++#else
++			del_mtd_device(mtd_devices[i]);
++#endif
++			kfree(mtd_devices[i]->priv);
++			kfree(mtd_devices[i]);
++		}
++	}
++	nr_devices = 0;
++	kfree(spi_transfer_desc);
++}
++
++
++module_init(at91_dataflash_init);
++module_exit(at91_dataflash_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Andrew Victor");
++MODULE_DESCRIPTION("DataFlash driver for Atmel AT91RM9200");
+diff -urN -x CVS linux-2.6.21/drivers/mtd/nand/at91_nand.c linux-2.6-stable/drivers/mtd/nand/at91_nand.c
+--- linux-2.6.21/drivers/mtd/nand/at91_nand.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/mtd/nand/at91_nand.c	Tue May  8 12:13:31 2007
+@@ -82,6 +82,10 @@
+ 		at91_set_gpio_value(host->board->enable_pin, 1);
+ }
+ 
++#ifdef CONFIG_MTD_PARTITIONS
++const char *part_probes[] = { "cmdlinepart", NULL };
++#endif
++
+ /*
+  * Probe for the NAND device.
+  */
+@@ -151,6 +155,12 @@
+ #ifdef CONFIG_MTD_PARTITIONS
+ 	if (host->board->partition_info)
+ 		partitions = host->board->partition_info(mtd->size, &num_partitions);
++#ifdef CONFIG_MTD_CMDLINE_PARTS
++	else {
++		mtd->name = "at91_nand";
++		num_partitions = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
++	}
++#endif
+ 
+ 	if ((!partitions) || (num_partitions == 0)) {
+ 		printk(KERN_ERR "at91_nand: No parititions defined, or unsupported device.\n");
+diff -urN -x CVS linux-2.6.21/drivers/net/arm/at91_ether.c linux-2.6-stable/drivers/net/arm/at91_ether.c
+--- linux-2.6.21/drivers/net/arm/at91_ether.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/net/arm/at91_ether.c	Tue May  8 12:13:31 2007
+@@ -225,6 +225,16 @@
+ 		if (!(phy & ((1 << 2) | 1)))
+ 			goto done;
+ 	}
++	else if (lp->phy_type == MII_T78Q21x3_ID) {			/* ack interrupt in Teridian PHY */
++		read_phy(lp->phy_address, MII_T78Q21INT_REG, &phy);
++		if (!(phy & ((1 << 2) | 1)))
++			goto done;
++	}
++	else if (lp->phy_type == MII_DP83848_ID) {
++		read_phy(lp->phy_address, MII_DPPHYSTS_REG, &phy);	/* ack interrupt in DP83848 PHY */
++		if (!(phy & (1 << 7)))
++			goto done;
++	}
+ 
+ 	update_linkspeed(dev, 0);
+ 
+@@ -280,6 +290,19 @@
+ 		dsintr = (1 << 10) | ( 1 << 8);
+ 		write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
+ 	}
++	else if (lp->phy_type == MII_T78Q21x3_ID) {	/* for Teridian PHY */
++		read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr);
++		dsintr = dsintr | 0x500;		/* set bits 8, 10 */
++		write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr);
++	}
++	else if (lp->phy_type == MII_DP83848_ID) {	/* National Semiconductor DP83848 PHY */
++		read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr);
++		dsintr = dsintr | 0x3c;			/* set bits 2..5 */
++		write_phy(lp->phy_address, MII_DPMISR_REG, dsintr);
++		read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr);
++		dsintr = dsintr | 0x3;			/* set bits 0,1 */
++		write_phy(lp->phy_address, MII_DPMICR_REG, dsintr);
++	}
+ 
+ 	disable_mdi();
+ 	spin_unlock_irq(&lp->lock);
+@@ -323,6 +346,19 @@
+ 		dsintr = ~((1 << 10) | (1 << 8));
+ 		write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
+ 	}
++	else if (lp->phy_type == MII_T78Q21x3_ID) {	/* for Teridian PHY */
++		read_phy(lp->phy_address, MII_T78Q21INT_REG, &dsintr);
++		dsintr = dsintr & ~0x500;			/* clear bits 8, 10 */
++		write_phy(lp->phy_address, MII_T78Q21INT_REG, dsintr);
++	}
++	else if (lp->phy_type == MII_DP83848_ID) {	/* National Semiconductor DP83848 PHY */
++		read_phy(lp->phy_address, MII_DPMICR_REG, &dsintr);
++		dsintr = dsintr & ~0x3;				/* clear bits 0, 1 */
++		write_phy(lp->phy_address, MII_DPMICR_REG, dsintr);
++		read_phy(lp->phy_address, MII_DPMISR_REG, &dsintr);
++		dsintr = dsintr & ~0x3c;			/* clear bits 2..5 */
++		write_phy(lp->phy_address, MII_DPMISR_REG, dsintr);
++	}
+ 
+ 	disable_mdi();
+ 	spin_unlock_irq(&lp->lock);
+@@ -535,8 +571,8 @@
+ 		mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
+ 	}
+ 
+-	at91_emac_write(AT91_EMAC_HSH, mc_filter[0]);
+-	at91_emac_write(AT91_EMAC_HSL, mc_filter[1]);
++	at91_emac_write(AT91_EMAC_HSL, mc_filter[0]);
++	at91_emac_write(AT91_EMAC_HSH, mc_filter[1]);
+ }
+ 
+ /*
+@@ -943,14 +979,22 @@
+ 	struct net_device *dev;
+ 	struct at91_private *lp;
+ 	unsigned int val;
+-	int res;
++	struct resource *res;
++	int ret;
+ 
+ 	dev = alloc_etherdev(sizeof(struct at91_private));
+ 	if (!dev)
+ 		return -ENOMEM;
+ 
+-	dev->base_addr = AT91_VA_BASE_EMAC;
+-	dev->irq = AT91RM9200_ID_EMAC;
++	/* Get I/O base address and IRQ */
++	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res) {
++		free_netdev(dev);
++		return -ENODEV;
++	}
++	dev->base_addr = res->start;
++	dev->irq = platform_get_irq(pdev, 0);
++
+ 	SET_MODULE_OWNER(dev);
+ 
+ 	/* Install the interrupt handler */
+@@ -1023,12 +1067,12 @@
+ 	lp->phy_address = phy_address;	/* MDI address of PHY */
+ 
+ 	/* Register the network interface */
+-	res = register_netdev(dev);
+-	if (res) {
++	ret = register_netdev(dev);
++	if (ret) {
+ 		free_irq(dev->irq, dev);
+ 		free_netdev(dev);
+ 		dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
+-		return res;
++		return ret;
+ 	}
+ 
+ 	/* Determine current link speed */
+@@ -1063,10 +1107,16 @@
+ 		printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name);
+ 	else if (phy_type == MII_DP83847_ID)
+ 		printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name);
++	else if (phy_type == MII_DP83848_ID)
++		printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name);
+ 	else if (phy_type == MII_AC101L_ID)
+ 		printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name);
+ 	else if (phy_type == MII_KS8721_ID)
+ 		printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name);
++	else if (phy_type == MII_T78Q21x3_ID)
++		printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name);
++	else if (phy_type == MII_LAN83C185_ID)
++		printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name);
+ 
+ 	return 0;
+ }
+@@ -1104,8 +1154,11 @@
+ 			case MII_RTL8201_ID:		/* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */
+ 			case MII_BCM5221_ID:		/* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */
+ 			case MII_DP83847_ID:		/* National Semiconductor DP83847:  */
++			case MII_DP83848_ID:		/* National Semiconductor DP83848:  */
+ 			case MII_AC101L_ID:		/* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
+ 			case MII_KS8721_ID:		/* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
++			case MII_T78Q21x3_ID:		/* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */
++			case MII_LAN83C185_ID:		/* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */
+ 				detected = at91ether_setup(phy_id, phy_address, pdev, ether_clk);
+ 				break;
+ 		}
+diff -urN -x CVS linux-2.6.21/drivers/net/arm/at91_ether.h linux-2.6-stable/drivers/net/arm/at91_ether.h
+--- linux-2.6.21/drivers/net/arm/at91_ether.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/net/arm/at91_ether.h	Tue May  8 12:13:31 2007
+@@ -17,39 +17,46 @@
+ 
+ 
+ /* Davicom 9161 PHY */
+-#define MII_DM9161_ID	0x0181b880
+-#define MII_DM9161A_ID	0x0181b8a0
+-
+-/* Davicom specific registers */
+-#define MII_DSCR_REG	16
+-#define MII_DSCSR_REG	17
+-#define MII_DSINTR_REG	21
++#define MII_DM9161_ID		0x0181b880
++#define MII_DM9161A_ID		0x0181b8a0
++#define MII_DSCR_REG		16
++#define MII_DSCSR_REG		17
++#define MII_DSINTR_REG		21
+ 
+ /* Intel LXT971A PHY */
+-#define MII_LXT971A_ID	0x001378E0
+-
+-/* Intel specific registers */
+-#define MII_ISINTE_REG	18
+-#define MII_ISINTS_REG	19
+-#define MII_LEDCTRL_REG	20
++#define MII_LXT971A_ID		0x001378E0
++#define MII_ISINTE_REG		18
++#define MII_ISINTS_REG		19
++#define MII_LEDCTRL_REG		20
+ 
+ /* Realtek RTL8201 PHY */
+-#define MII_RTL8201_ID	0x00008200
++#define MII_RTL8201_ID		0x00008200
+ 
+ /* Broadcom BCM5221 PHY */
+-#define MII_BCM5221_ID	0x004061e0
+-
+-/* Broadcom specific registers */
+-#define MII_BCMINTR_REG	26
++#define MII_BCM5221_ID		0x004061e0
++#define MII_BCMINTR_REG		26
+ 
+ /* National Semiconductor DP83847 */
+-#define MII_DP83847_ID	0x20005c30
++#define MII_DP83847_ID		0x20005c30
++
++/* National Semiconductor DP83848 */
++#define MII_DP83848_ID		0x20005c90
++#define MII_DPPHYSTS_REG	16
++#define MII_DPMICR_REG		17
++#define MII_DPMISR_REG		18
+ 
+ /* Altima AC101L PHY */
+-#define MII_AC101L_ID	0x00225520
++#define MII_AC101L_ID		0x00225520
+ 
+ /* Micrel KS8721 PHY */
+-#define MII_KS8721_ID	0x00221610
++#define MII_KS8721_ID		0x00221610
++
++/* Teridian 78Q2123/78Q2133 */
++#define MII_T78Q21x3_ID		0x000e7230
++#define MII_T78Q21INT_REG	17
++
++/* SMSC LAN83C185 */
++#define MII_LAN83C185_ID	0x0007C0A0
+ 
+ /* ........................................................................ */
+ 
+diff -urN -x CVS linux-2.6.21/drivers/pcmcia/at91_cf.c linux-2.6-stable/drivers/pcmcia/at91_cf.c
+--- linux-2.6.21/drivers/pcmcia/at91_cf.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/pcmcia/at91_cf.c	Tue May  8 12:13:31 2007
+@@ -332,20 +332,27 @@
+ 	struct at91_cf_data	*board = cf->board;
+ 
+ 	pcmcia_socket_dev_suspend(&pdev->dev, mesg);
++
+ 	if (device_may_wakeup(&pdev->dev)) {
+ 		enable_irq_wake(board->det_pin);
+ 		if (board->irq_pin)
+ 			enable_irq_wake(board->irq_pin);
+-	} else {
+-		disable_irq_wake(board->det_pin);
+-		if (board->irq_pin)
+-			disable_irq_wake(board->irq_pin);
+ 	}
++
+ 	return 0;
+ }
+ 
+ static int at91_cf_resume(struct platform_device *pdev)
+ {
++	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
++	struct at91_cf_data	*board = cf->board;
++
++	if (device_may_wakeup(&pdev->dev)) {
++		disable_irq_wake(board->det_pin);
++		if (board->irq_pin)
++			disable_irq_wake(board->irq_pin);
++	}
++
+ 	pcmcia_socket_dev_resume(&pdev->dev);
+ 	return 0;
+ }
+@@ -360,7 +367,6 @@
+ 		.name		= (char *) driver_name,
+ 		.owner		= THIS_MODULE,
+ 	},
+-	.probe		= at91_cf_probe,
+ 	.remove		= __exit_p(at91_cf_remove),
+ 	.suspend	= at91_cf_suspend,
+ 	.resume		= at91_cf_resume,
+@@ -370,7 +376,7 @@
+ 
+ static int __init at91_cf_init(void)
+ {
+-	return platform_driver_register(&at91_cf_driver);
++	return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
+ }
+ module_init(at91_cf_init);
+ 
+diff -urN -x CVS linux-2.6.21/drivers/serial/atmel_serial.c linux-2.6-stable/drivers/serial/atmel_serial.c
+--- linux-2.6.21/drivers/serial/atmel_serial.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/serial/atmel_serial.c	Tue May  8 12:13:31 2007
+@@ -7,6 +7,8 @@
+  *  Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
+  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
+  *
++ *  DMA support added by Chip Coldwell.
++ *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License as published by
+  * the Free Software Foundation; either version 2 of the License, or
+@@ -33,6 +35,7 @@
+ #include <linux/sysrq.h>
+ #include <linux/tty_flip.h>
+ #include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
+ #include <linux/atmel_pdc.h>
+ 
+ #include <asm/io.h>
+@@ -47,6 +50,11 @@
+ 
+ #include "atmel_serial.h"
+ 
++#define SUPPORT_PDC
++#define PDC_BUFFER_SIZE		(L1_CACHE_BYTES << 3)
++#warning "Revisit"
++#define PDC_RX_TIMEOUT		(3 * 10)		/* 3 bytes */
++
+ #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ #define SUPPORT_SYSRQ
+ #endif
+@@ -107,6 +115,13 @@
+ static int (*atmel_open_hook)(struct uart_port *);
+ static void (*atmel_close_hook)(struct uart_port *);
+ 
++struct atmel_dma_buffer {
++	unsigned char	*buf;
++	dma_addr_t	dma_addr;
++	size_t		dma_size;
++	unsigned int	ofs;
++};
++
+ /*
+  * We wrap our port structure around the generic uart_port.
+  */
+@@ -114,10 +129,20 @@
+ 	struct uart_port	uart;		/* uart */
+ 	struct clk		*clk;		/* uart clock */
+ 	unsigned short		suspended;	/* is port suspended? */
++
++	short			use_dma_rx;	/* enable PDC receiver */
++	short			pdc_rx_idx;	/* current PDC RX buffer */
++	struct atmel_dma_buffer	pdc_rx[2];	/* PDC receier */
++
++	short			use_dma_tx;	/* enable PDC transmitter */
++	struct atmel_dma_buffer	pdc_tx;		/* PDC transmitter */
+ };
+ 
+ static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
+ 
++#define PDC_RX_BUF(port)	&(port)->pdc_rx[(port)->pdc_rx_idx]
++#define PDC_RX_SWITCH(port)	(port)->pdc_rx_idx = !(port)->pdc_rx_idx
++
+ #ifdef SUPPORT_SYSRQ
+ static struct console atmel_console;
+ #endif
+@@ -205,7 +230,12 @@
+ {
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	UART_PUT_IDR(port, ATMEL_US_TXRDY);
++	if (atmel_port->use_dma_tx) {
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);		/* disable PDC transmit */
++		UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++	}
++	else
++		UART_PUT_IDR(port, ATMEL_US_TXRDY);
+ }
+ 
+ /*
+@@ -215,7 +245,17 @@
+ {
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	UART_PUT_IER(port, ATMEL_US_TXRDY);
++	if (atmel_port->use_dma_tx) {
++		if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
++			/* The transmitter is already running.  Yes, we
++			   really need this.*/
++			return;
++
++		UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);		/* re-enable PDC transmit */
++	}
++	else
++		UART_PUT_IER(port, ATMEL_US_TXRDY);
+ }
+ 
+ /*
+@@ -225,7 +265,12 @@
+ {
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	UART_PUT_IDR(port, ATMEL_US_RXRDY);
++	if (atmel_port->use_dma_rx) {
++		UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);		/* disable PDC receive */
++		UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
++	}
++	else
++		UART_PUT_IDR(port, ATMEL_US_RXRDY);
+ }
+ 
+ /*
+@@ -248,6 +293,134 @@
+ }
+ 
+ /*
++ * Receive data via the PDC.  A buffer has been fulled.
++ */
++static void atmel_pdc_endrx(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct tty_struct *tty = port->info->tty;
++	struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
++	unsigned int count;
++
++	count = pdc->dma_size - pdc->ofs;
++	if (likely(count > 0)) {
++		dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
++		tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
++		tty_flip_buffer_push(tty);
++
++		port->icount.rx += count;
++	}
++
++	/* Set this buffer as the next receive buffer */
++	pdc->ofs = 0;
++	UART_PUT_RNPR(port, pdc->dma_addr);
++	UART_PUT_RNCR(port, pdc->dma_size);
++
++	/* Switch to next buffer */
++	PDC_RX_SWITCH(atmel_port);		/* next PDC buffer */
++}
++
++/*
++ * Receive data via the PDC.  At least one byte was received, but the
++ * buffer was not full when the inter-character timeout expired.
++ */
++static void atmel_pdc_timeout(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct tty_struct *tty = port->info->tty;
++	struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
++	/* unsigned */ int ofs, count;
++
++	ofs = UART_GET_RPR(port) - pdc->dma_addr;	/* current DMA adress */
++	count = ofs - pdc->ofs;
++
++	if (likely(count > 0)) {
++		dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
++		tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
++		tty_flip_buffer_push(tty);
++
++		pdc->ofs = ofs;
++		port->icount.rx += count;
++	}
++
++	/* reset the UART timeout */
++	UART_PUT_CR(port, ATMEL_US_STTTO);
++}
++
++/*
++ * Deal with parity, framing and overrun errors.
++ */
++static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
++{
++	/* clear error */
++	UART_PUT_CR(port, ATMEL_US_RSTSTA);
++
++	if (status & ATMEL_US_RXBRK) {
++		status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);	/* ignore side-effect */
++		port->icount.brk++;
++	}
++	if (status & ATMEL_US_PARE)
++		port->icount.parity++;
++	if (status & ATMEL_US_FRAME)
++		port->icount.frame++;
++	if (status & ATMEL_US_OVRE)
++		port->icount.overrun++;
++}
++
++/*
++ * A transmission via the PDC is complete.
++ */
++static void atmel_pdc_endtx(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct circ_buf *xmit = &port->info->xmit;
++	struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++
++	xmit->tail += pdc->ofs;
++	if (xmit->tail >= SERIAL_XMIT_SIZE)
++		xmit->tail -= SERIAL_XMIT_SIZE;
++
++	port->icount.tx += pdc->ofs;
++	pdc->ofs = 0;
++
++	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
++		uart_write_wakeup(port);
++}
++
++/*
++ * The PDC transmitter is idle, so either start the next transfer or
++ * disable the transmitter.
++ */
++static void atmel_pdc_txbufe(struct uart_port *port)
++{
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
++	struct circ_buf *xmit = &port->info->xmit;
++	struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++	int count;
++
++	if (!uart_circ_empty(xmit)) {
++		/* more to transmit - setup next transfer */
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);			/* disable PDC transmit */
++		dma_sync_single_for_device(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
++
++		if (xmit->tail < xmit->head)
++			count = xmit->head - xmit->tail;
++		else
++			count = SERIAL_XMIT_SIZE - xmit->tail;
++		pdc->ofs = count;
++
++		UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
++		UART_PUT_TCR(port, count);
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);			/* re-enable PDC transmit */
++	}
++	else {
++		/* nothing left to transmit - disable the transmitter */
++		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);			/* disable PDC transmit */
++		UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
++	}
++}
++
++/*
+  * Characters received (called from interrupt handler)
+  */
+ static void atmel_rx_chars(struct uart_port *port)
+@@ -349,6 +522,14 @@
+ 	status = UART_GET_CSR(port);
+ 	pending = status & UART_GET_IMR(port);
+ 	while (pending) {
++		/* PDC receive */
++		if (pending & ATMEL_US_ENDRX)
++			atmel_pdc_endrx(port);
++		if (pending & ATMEL_US_TIMEOUT)
++			atmel_pdc_timeout(port);
++		if (atmel_port->use_dma_rx && pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | ATMEL_US_FRAME | ATMEL_US_PARE))
++			atmel_pdc_rxerr(port, pending);
++
+ 		/* Interrupt receive */
+ 		if (pending & ATMEL_US_RXRDY)
+ 			atmel_rx_chars(port);
+@@ -363,6 +544,12 @@
+ 		if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
+ 			wake_up_interruptible(&port->info->delta_msr_wait);
+ 
++		/* PDC transmit */
++		if (pending & ATMEL_US_ENDTX)
++			atmel_pdc_endtx(port);
++		if (pending & ATMEL_US_TXBUFE)
++			atmel_pdc_txbufe(port);
++
+ 		/* Interrupt transmit */
+ 		if (pending & ATMEL_US_TXRDY)
+ 			atmel_tx_chars(port);
+@@ -401,6 +588,47 @@
+ 	}
+ 
+ 	/*
++	 * Initialize DMA (if necessary)
++	 */
++	if (atmel_port->use_dma_rx) {
++		int i;
++
++		for (i = 0; i < 2; i++) {
++			struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
++
++			pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
++			if (pdc->buf == NULL) {
++				if (i != 0) {
++					dma_unmap_single(port->dev, atmel_port->pdc_rx[0].dma_addr, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
++					kfree(atmel_port->pdc_rx[0].buf);
++				}
++				free_irq(port->irq, port);
++				return -ENOMEM;
++			}
++			pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
++			pdc->dma_size = PDC_BUFFER_SIZE;
++			pdc->ofs = 0;
++		}
++
++		atmel_port->pdc_rx_idx = 0;
++
++		UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
++		UART_PUT_RCR(port, PDC_BUFFER_SIZE);
++
++		UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
++		UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
++	}
++	if (atmel_port->use_dma_tx) {
++		struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++		struct circ_buf *xmit = &port->info->xmit;
++
++		pdc->buf = xmit->buf;
++		pdc->dma_addr = dma_map_single(port->dev, pdc->buf, SERIAL_XMIT_SIZE, DMA_TO_DEVICE);
++		pdc->dma_size = SERIAL_XMIT_SIZE;
++		pdc->ofs = 0;
++	}
++
++	/*
+ 	 * If there is a specific "open" function (to register
+ 	 * control line interrupts)
+ 	 */
+@@ -418,7 +646,15 @@
+ 	UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
+ 	UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);		/* enable xmit & rcvr */
+ 
+-	UART_PUT_IER(port, ATMEL_US_RXRDY);		/* enable receive only */
++	if (atmel_port->use_dma_rx) {
++		UART_PUT_RTOR(port, PDC_RX_TIMEOUT);		/* set UART timeout */
++		UART_PUT_CR(port, ATMEL_US_STTTO);
++
++		UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
++		UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);		/* enable PDC controller */
++	}
++	else
++		UART_PUT_IER(port, ATMEL_US_RXRDY);		/* enable receive only */
+ 
+ 	return 0;
+ }
+@@ -431,6 +667,31 @@
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+ 	/*
++	 * Ensure everything is stopped.
++	 */
++	atmel_stop_rx(port);
++	atmel_stop_tx(port);
++
++	/*
++	 * Shut-down the DMA.
++	 */
++	if (atmel_port->use_dma_rx) {
++		int i;
++
++		for (i = 0; i < 2; i++) {
++			struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
++
++			dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
++			kfree(pdc->buf);
++		}
++	}
++	if (atmel_port->use_dma_tx) {
++		struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
++
++		dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
++	}
++
++	/*
+ 	 * Disable all interrupts, port and break condition.
+ 	 */
+ 	UART_PUT_CR(port, ATMEL_US_RSTSTA);
+@@ -481,14 +742,20 @@
+  */
+ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
+ {
++	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 	unsigned long flags;
+ 	unsigned int mode, imr, quot, baud;
+ 
++	/* Get current mode register */
++	mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
++
+ 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+ 	quot = uart_get_divisor(port, baud);
+ 
+-	/* Get current mode register */
+-	mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
++	if (quot > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
++		quot /= 8;
++		mode |= ATMEL_US_USCLKS_MCK_DIV8;
++	}
+ 
+ 	/* byte size */
+ 	switch (termios->c_cflag & CSIZE) {
+@@ -534,6 +801,9 @@
+ 	if (termios->c_iflag & (BRKINT | PARMRK))
+ 		port->read_status_mask |= ATMEL_US_RXBRK;
+ 
++	if (atmel_port->use_dma_rx)	/* need to enable error interrupts */
++		UART_PUT_IER(port, port->read_status_mask);
++
+ 	/*
+ 	 * Characters to ignore
+ 	 */
+@@ -712,6 +982,13 @@
+ 		clk_enable(atmel_port->clk);
+ 		port->uartclk = clk_get_rate(atmel_port->clk);
+ 	}
++
++#ifdef SUPPORT_PDC
++	atmel_port->use_dma_rx = data->use_dma_rx;
++	atmel_port->use_dma_tx = data->use_dma_tx;
++	if (atmel_port->use_dma_tx)
++		port->fifosize = PDC_BUFFER_SIZE;
++#endif
+ }
+ 
+ /*
+@@ -888,7 +1165,8 @@
+ 	struct uart_port *port = platform_get_drvdata(pdev);
+ 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
+ 
+-	if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
++	if (device_may_wakeup(&pdev->dev)
++			&& !clk_must_disable(atmel_port->clk))
+ 		enable_irq_wake(port->irq);
+ 	else {
+ 		uart_suspend_port(&atmel_uart, port);
+diff -urN -x CVS linux-2.6.21/drivers/serial/atmel_serial.h linux-2.6-stable/drivers/serial/atmel_serial.h
+--- linux-2.6.21/drivers/serial/atmel_serial.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/serial/atmel_serial.h	Tue May  8 12:13:31 2007
+@@ -46,6 +46,9 @@
+ #define			ATMEL_US_USMODE_ISO7816_T1	6
+ #define			ATMEL_US_USMODE_IRDA		8
+ #define		ATMEL_US_USCLKS		(3   <<  4)		/* Clock Selection */
++#define			ATMEL_US_USCLKS_MCK		(0 <<  4)
++#define			ATMEL_US_USCLKS_MCK_DIV8	(1 <<  4)
++#define			ATMEL_US_USCLKS_SCK		(3 <<  4)
+ #define		ATMEL_US_CHRL		(3   <<  6)		/* Character Length */
+ #define			ATMEL_US_CHRL_5			(0 <<  6)
+ #define			ATMEL_US_CHRL_6			(1 <<  6)
+diff -urN -x CVS linux-2.6.21/drivers/spi/Kconfig linux-2.6-stable/drivers/spi/Kconfig
+--- linux-2.6.21/drivers/spi/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/spi/Kconfig	Tue May  8 14:31:24 2007
+@@ -54,6 +54,7 @@
+ config SPI_ATMEL
+ 	tristate "Atmel SPI Controller"
+ 	depends on (ARCH_AT91 || AVR32) && SPI_MASTER
++	select SPI_AT91_MANUAL_CS if ARCH_AT91RM9200
+ 	help
+ 	  This selects a driver for the Atmel SPI Controller, present on
+ 	  many AT32 (AVR32) and AT91 (ARM) chips.
+@@ -82,6 +83,24 @@
+ 	  inexpensive battery powered microcontroller evaluation board.
+ 	  This same cable can be used to flash new firmware.
+ 
++config SPI_AT91
++	tristate "AT91RM9200 Bitbang SPI Master"
++	depends on SPI_MASTER && ARCH_AT91RM9200 && !SPI_ATMEL && EXPERIMENTAL
++	select SPI_BITBANG
++	select SPI_AT91_MANUAL_CS
++	help
++	  This is dumb PIO bitbanging driver for the Atmel AT91RM9200.
++	  The SPI_ATMEL driver will be its replacement, using the native
++	  SPI hardware and its DMA controller.
++
++config SPI_AT91_MANUAL_CS
++	bool
++	depends on ARCH_AT91RM9200
++	help
++	  Works around an AT91RM9200 problem whereby the SPI chip-select
++	  will be wrongly disabled.  The workaround uses those pins as
++	  GPIOs instead of letting the SPI controller manage them.
++
+ config SPI_IMX
+ 	tristate "Freescale iMX SPI controller"
+ 	depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL
+diff -urN -x CVS linux-2.6.21/drivers/spi/Makefile linux-2.6-stable/drivers/spi/Makefile
+--- linux-2.6.21/drivers/spi/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/spi/Makefile	Tue May  8 14:31:24 2007
+@@ -20,6 +20,7 @@
+ obj-$(CONFIG_SPI_MPC83xx)		+= spi_mpc83xx.o
+ obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o
+ obj-$(CONFIG_SPI_S3C24XX)		+= spi_s3c24xx.o
++obj-$(CONFIG_SPI_AT91)			+= spi_at91_bitbang.o
+ # 	... add above this line ...
+ 
+ # SPI protocol drivers (device/link on bus)
+diff -urN -x CVS linux-2.6.21/drivers/spi/spi_at91_bitbang.c linux-2.6-stable/drivers/spi/spi_at91_bitbang.c
+--- linux-2.6.21/drivers/spi/spi_at91_bitbang.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/spi/spi_at91_bitbang.c	Tue May  8 14:31:24 2007
+@@ -0,0 +1,207 @@
++/*
++ * at91_spi.c - at91 SPI driver (BOOTSTRAP/BITBANG VERSION)
++ *
++ * Copyright (C) 2006 David Brownell
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++ */
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/spi_bitbang.h>
++
++#include <asm/arch/gpio.h>
++
++
++/*
++ * FIXME this bitbanging version is just to help bootstrap systems until
++ * there's a native SPI+IRQ+DMA controller driver ... such a driver should
++ * be a drop-in replacement for this one, and much faster.
++ *
++ * remember:
++ *
++ *	- other at91 parts (like at91sam9) have multiple controllers
++ *	  and different pin muxing; this version is at91rm9200 specfic.
++ *
++ *	- at91sam9261 SPI0 pins are directly muxed with MMC/SD pins.
++ *
++ *	- rm9200 spi chipselects drop wrongly, so the native driver
++ *	  will need to use gpios much like this does.
++ *
++ *	- real hardware only allows 8..16 bits per word, while this
++ *	  bitbanger allows 1..32 (incompatible superset).
++ *
++ *	- this disregards clock parameters.  with inlined gpio calls,
++ *	  gcc 3.4.4 produces about 1.5 mbit/sec, more than 2x faster
++ *	  than using the subroutined veresion from txrx_word().
++ *
++ *	- suspend/resume and <linux/clk.h> support is missing ...
++ */
++
++#define	spi_miso_bit	AT91_PIN_PA0
++#define	spi_mosi_bit	AT91_PIN_PA1
++#define	spi_sck_bit	AT91_PIN_PA2
++
++struct at91_spi {
++	struct spi_bitbang	bitbang;
++	struct platform_device	*pdev;
++};
++
++/*----------------------------------------------------------------------*/
++
++static inline void setsck(struct spi_device *spi, int is_on)
++{
++	at91_set_gpio_value(spi_sck_bit, is_on);
++}
++
++static inline void setmosi(struct spi_device *spi, int is_on)
++{
++	at91_set_gpio_value(spi_mosi_bit, is_on);
++}
++
++static inline int getmiso(struct spi_device *spi)
++{
++	return at91_get_gpio_value(spi_miso_bit);
++}
++
++static void at91_spi_chipselect(struct spi_device *spi, int is_active)
++{
++	unsigned long cs = (unsigned long) spi->controller_data;
++
++	/* set default clock polarity */
++	if (is_active)
++		setsck(spi, spi->mode & SPI_CPOL);
++
++	/* only support active-low (default) */
++	at91_set_gpio_value(cs, !is_active);
++}
++
++/*
++ * NOTE:  this is "as fast as we can"; it should be a function of
++ * the device clock ...
++ */
++#define	spidelay(X)	do{} while(0)
++
++#define	EXPAND_BITBANG_TXRX
++#include <linux/spi/spi_bitbang.h>
++
++static u32 at91_spi_txrx_word_mode0(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, 8);
++}
++
++static u32 at91_spi_txrx_word_mode1(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, 8);
++}
++
++static u32 at91_spi_txrx_word_mode2(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, 8);
++}
++
++static u32 at91_spi_txrx_word_mode3(struct spi_device *spi,
++		unsigned nsecs, u32 word, u8 bits)
++{
++	return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, 8);
++}
++
++/*----------------------------------------------------------------------*/
++
++static int __init at91_spi_probe(struct platform_device *pdev)
++{
++	int			status;
++	struct spi_master	*master;
++	struct at91_spi		*at91_spi;
++
++	if (pdev->id != 0)	/* SPI0 bus */
++		return -EINVAL;
++
++	master = spi_alloc_master(&pdev->dev, sizeof *at91_spi);
++	if (!master)
++		return -ENOMEM;
++
++	at91_spi = spi_master_get_devdata(master);
++	at91_spi->pdev = pdev;
++	platform_set_drvdata(pdev, at91_spi);
++
++	/* SPI and bitbang hookup */
++	master->bus_num = 0;
++	master->num_chipselect = 4;
++
++	at91_spi->bitbang.master = spi_master_get(master);
++	at91_spi->bitbang.chipselect = at91_spi_chipselect;
++	at91_spi->bitbang.txrx_word[SPI_MODE_0] = at91_spi_txrx_word_mode0;
++	at91_spi->bitbang.txrx_word[SPI_MODE_1] = at91_spi_txrx_word_mode1;
++	at91_spi->bitbang.txrx_word[SPI_MODE_2] = at91_spi_txrx_word_mode2;
++	at91_spi->bitbang.txrx_word[SPI_MODE_3] = at91_spi_txrx_word_mode3;
++
++	status = spi_bitbang_start(&at91_spi->bitbang);
++	if (status < 0)
++		(void) spi_master_put(at91_spi->bitbang.master);
++
++	return status;
++}
++
++static int __exit at91_spi_remove(struct platform_device *pdev)
++{
++	struct at91_spi	*at91_spi = platform_get_drvdata(pdev);
++	int status;
++
++	/* stop() unregisters child devices too */
++	status = spi_bitbang_stop(&at91_spi->bitbang);
++	(void) spi_master_put(at91_spi->bitbang.master);
++
++	platform_set_drvdata(pdev, NULL);
++	return status;
++}
++
++static struct platform_driver at91_spi_driver = {
++	.probe		= at91_spi_probe,
++	.remove		= __exit_p(at91_spi_remove),
++	.driver		= {
++		.name	= "at91_spi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at91_spi_init(void)
++{
++	at91_set_gpio_output(spi_sck_bit, 0);
++	at91_set_gpio_output(spi_mosi_bit, 0);
++	at91_set_gpio_input(spi_miso_bit, 1 /* pullup */);
++
++	/* register driver */
++	return platform_driver_register(&at91_spi_driver);
++}
++
++static void __exit at91_spi_exit(void)
++{
++	platform_driver_unregister(&at91_spi_driver);
++}
++
++device_initcall(at91_spi_init);
++module_exit(at91_spi_exit);
++
++MODULE_ALIAS("at91_spi.0");
++
++MODULE_DESCRIPTION("AT91 SPI support (BOOTSTRAP/BITBANG VERSION)");
++MODULE_AUTHOR("David Brownell");
++MODULE_LICENSE("GPL");
+diff -urN -x CVS linux-2.6.21/drivers/usb/gadget/Kconfig linux-2.6-stable/drivers/usb/gadget/Kconfig
+--- linux-2.6.21/drivers/usb/gadget/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/usb/gadget/Kconfig	Wed May  9 10:20:54 2007
+@@ -189,7 +189,7 @@
+ 
+ config USB_GADGET_AT91
+ 	boolean "AT91 USB Device Port"
+-	depends on ARCH_AT91
++	depends on ARCH_AT91 && !ARCH_AT91SAM9RL
+ 	select USB_GADGET_SELECTED
+ 	help
+ 	   Many Atmel AT91 processors (such as the AT91RM2000) have a
+diff -urN -x CVS linux-2.6.21/drivers/usb/gadget/at91_udc.c linux-2.6-stable/drivers/usb/gadget/at91_udc.c
+--- linux-2.6.21/drivers/usb/gadget/at91_udc.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/usb/gadget/at91_udc.c	Tue May  8 12:13:31 2007
+@@ -1804,7 +1804,7 @@
+ 	 */
+ 	if ((!udc->suspended && udc->addr)
+ 			|| !wake
+-			|| at91_suspend_entering_slow_clock()) {
++			|| clk_must_disable(udc->fclk)) {
+ 		pullup(udc, 0);
+ 		wake = 0;
+ 	} else
+diff -urN -x CVS linux-2.6.21/drivers/usb/host/ohci-at91.c linux-2.6-stable/drivers/usb/host/ohci-at91.c
+--- linux-2.6.21/drivers/usb/host/ohci-at91.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/usb/host/ohci-at91.c	Tue May  8 12:13:31 2007
+@@ -299,7 +299,7 @@
+ 	 *
+ 	 * REVISIT: some boards will be able to turn VBUS off...
+ 	 */
+-	if (at91_suspend_entering_slow_clock()) {
++	if (clk_must_disable(fclk)) {
+ 		ohci_usb_reset (ohci);
+ 		at91_stop_clock();
+ 	}
+diff -urN -x CVS linux-2.6.21/drivers/video/Kconfig linux-2.6-stable/drivers/video/Kconfig
+--- linux-2.6.21/drivers/video/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/video/Kconfig	Thu May 10 12:34:41 2007
+@@ -663,6 +663,17 @@
+ 	  framebuffer.  Product specs at
+ 	  <http://www.erd.epson.com/vdc/html/products.htm>.
+ 
++config FB_S1D15605
++	tristate "Epson S1D15605 framebuffer support"
++	depends on FB
++	default m if MACH_KB9200
++	select FB_CFB_FILLRECT
++	select FB_CFB_COPYAREA
++	select FB_CFB_IMAGEBLIT
++	help
++	  Build in support for the S1D15605 Epson Research 128x64
++	  LCD controller as a framebuffer.
++
+ config FB_S1D13XXX
+ 	tristate "Epson S1D13XXX framebuffer support"
+ 	depends on FB
+@@ -674,6 +685,22 @@
+ 	  working with S1D13806). Product specs at
+ 	  <http://www.erd.epson.com/vdc/html/legacy_13xxx.htm>
+ 
++config FB_ATMEL
++	tristate "AT91/AT32 LCD Controller support"
++	depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || AVR32)
++	select FB_CFB_FILLRECT
++	select FB_CFB_COPYAREA
++	select FB_CFB_IMAGEBLIT
++	help
++	  This enables support for the AT91/AT32 LCD Controller.
++
++config FB_INTSRAM
++	bool "Frame Buffer in internal SRAM"
++	depends on FB_ATMEL && ARCH_AT91SAM9261
++	help
++	  Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
++	  to let frame buffer in external SDRAM.
++
+ config FB_NVIDIA
+ 	tristate "nVidia Framebuffer Support"
+ 	depends on FB && PCI
+diff -urN -x CVS linux-2.6.21/drivers/video/Makefile linux-2.6-stable/drivers/video/Makefile
+--- linux-2.6.21/drivers/video/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/video/Makefile	Thu May 10 12:34:01 2007
+@@ -75,6 +75,8 @@
+ obj-$(CONFIG_FB_SA1100)           += sa1100fb.o
+ obj-$(CONFIG_FB_HIT)              += hitfb.o
+ obj-$(CONFIG_FB_EPSON1355)	  += epson1355fb.o
++obj-$(CONFIG_FB_S1D15605)	  += s1d15605fb.o
++obj-$(CONFIG_FB_ATMEL)            += atmel_lcdfb.o
+ obj-$(CONFIG_FB_PVR2)             += pvr2fb.o
+ obj-$(CONFIG_FB_VOODOO1)          += sstfb.o
+ obj-$(CONFIG_FB_ARMCLCD)	  += amba-clcd.o
+diff -urN -x CVS linux-2.6.21/drivers/video/atmel_lcdfb.c linux-2.6-stable/drivers/video/atmel_lcdfb.c
+--- linux-2.6.21/drivers/video/atmel_lcdfb.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/video/atmel_lcdfb.c	Thu May 10 12:34:01 2007
+@@ -0,0 +1,752 @@
++/*
++ *  Driver for AT91/AT32 LCD Controller
++ *
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/interrupt.h>
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/cpu.h>
++#include <asm/arch/gpio.h>
++
++#include <video/atmel_lcdc.h>
++
++#define lcdc_readl(sinfo, reg)		__raw_readl((sinfo)->mmio+(reg))
++#define lcdc_writel(sinfo, reg, val)	__raw_writel((val), (sinfo)->mmio+(reg))
++
++/* configurable parameters */
++#define ATMEL_LCDC_CVAL_DEFAULT		0xc8
++#define ATMEL_LCDC_DMA_BURST_LEN	8
++
++#if defined(CONFIG_ARCH_AT91SAM9263)
++#define ATMEL_LCDC_FIFO_SIZE		2048
++#else
++#define ATMEL_LCDC_FIFO_SIZE		512
++#endif
++
++#if defined(CONFIG_ARCH_AT91)
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++
++static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
++					struct fb_var_screeninfo *var)
++{
++
++}
++#elif defined(CONFIG_AVR32)
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					| FBINFO_PARTIAL_PAN_OK \
++					| FBINFO_HWACCEL_XPAN \
++					| FBINFO_HWACCEL_YPAN)
++
++static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
++				     struct fb_var_screeninfo *var)
++{
++	u32 dma2dcfg;
++	u32 pixeloff;
++
++	pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
++
++	dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
++	dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
++	lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
++
++	/* Update configuration */
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
++		    lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
++		    | ATMEL_LCDC_DMAUPDT);
++}
++#endif
++
++
++static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
++	.type		= FB_TYPE_PACKED_PIXELS,
++	.visual		= FB_VISUAL_TRUECOLOR,
++	.xpanstep	= 0,
++	.ypanstep	= 0,
++	.ywrapstep	= 0,
++	.accel		= FB_ACCEL_NONE,
++};
++
++
++static void atmel_lcdfb_update_dma(struct fb_info *info,
++			       struct fb_var_screeninfo *var)
++{
++	struct atmel_lcdfb_info *sinfo = info->par;
++	struct fb_fix_screeninfo *fix = &info->fix;
++	unsigned long dma_addr;
++
++	dma_addr = (fix->smem_start + var->yoffset * fix->line_length
++		    + var->xoffset * var->bits_per_pixel / 8);
++
++	dma_addr &= ~3UL;
++
++	/* Set framebuffer DMA base address and pixel offset */
++	lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
++
++	atmel_lcdfb_update_dma2d(sinfo, var);
++}
++
++static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++
++	dma_free_writecombine(info->device, info->fix.smem_len,
++				info->screen_base, info->fix.smem_start);
++}
++
++/**
++ *	atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
++ *	@sinfo: the frame buffer to allocate memory for
++ */
++static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++	struct fb_var_screeninfo *var = &info->var;
++
++	info->fix.smem_len = (var->xres_virtual * var->yres_virtual
++			    * ((var->bits_per_pixel + 7) / 8));
++
++	info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
++					(dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
++
++	if (!info->screen_base) {
++		return -ENOMEM;
++	}
++
++	return 0;
++}
++
++/**
++ *      atmel_lcdfb_check_var - Validates a var passed in.
++ *      @var: frame buffer variable screen structure
++ *      @info: frame buffer structure that represents a single frame buffer
++ *
++ *	Checks to see if the hardware supports the state requested by
++ *	var passed in. This function does not alter the hardware
++ *	state!!!  This means the data stored in struct fb_info and
++ *	struct atmel_lcdfb_info do not change. This includes the var
++ *	inside of struct fb_info.  Do NOT change these. This function
++ *	can be called on its own if we intent to only test a mode and
++ *	not actually set it. The stuff in modedb.c is a example of
++ *	this. If the var passed in is slightly off by what the
++ *	hardware can support then we alter the var PASSED in to what
++ *	we can do. If the hardware doesn't support mode change a
++ *	-EINVAL will be returned by the upper layers. You don't need
++ *	to implement this function then. If you hardware doesn't
++ *	support changing the resolution then this function is not
++ *	needed. In this case the driver would just provide a var that
++ *	represents the static state the screen is in.
++ *
++ *	Returns negative errno on error, or zero on success.
++ */
++static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
++			     struct fb_info *info)
++{
++	struct device *dev = info->device;
++	struct atmel_lcdfb_info *sinfo = info->par;
++	unsigned long clk_value_khz;
++
++	clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
++
++	dev_dbg(dev, "%s:\n", __func__);
++	dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
++	dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
++	dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
++	dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
++
++	if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
++		dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
++		return -EINVAL;
++	}
++
++	/* Force same alignment for each line */
++	var->xres = (var->xres + 3) & ~3UL;
++	var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
++
++	var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
++	var->transp.msb_right = 0;
++	var->transp.offset = var->transp.length = 0;
++	var->xoffset = var->yoffset = 0;
++
++	switch (var->bits_per_pixel) {
++	case 2:
++	case 4:
++	case 8:
++		var->red.offset = var->green.offset = var->blue.offset = 0;
++		var->red.length = var->green.length = var->blue.length
++			= var->bits_per_pixel;
++		break;
++	case 15:
++	case 16:
++		var->red.offset = 0;
++		var->green.offset = 5;
++		var->blue.offset = 10;
++		var->red.length = var->green.length = var->blue.length = 5;
++		break;
++	case 24:
++	case 32:
++		var->red.offset = 0;
++		var->green.offset = 8;
++		var->blue.offset = 16;
++		var->red.length = var->green.length = var->blue.length = 8;
++		break;
++	default:
++		dev_err(dev, "color depth %d not supported\n",
++					var->bits_per_pixel);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++/**
++ *      atmel_lcdfb_set_par - Alters the hardware state.
++ *      @info: frame buffer structure that represents a single frame buffer
++ *
++ *	Using the fb_var_screeninfo in fb_info we set the resolution
++ *	of the this particular framebuffer. This function alters the
++ *	par AND the fb_fix_screeninfo stored in fb_info. It doesn't
++ *	not alter var in fb_info since we are using that data. This
++ *	means we depend on the data in var inside fb_info to be
++ *	supported by the hardware.  atmel_lcdfb_check_var is always called
++ *	before atmel_lcdfb_set_par to ensure this.  Again if you can't
++ *	change the resolution you don't need this function.
++ *
++ */
++static int atmel_lcdfb_set_par(struct fb_info *info)
++{
++	struct atmel_lcdfb_info *sinfo = info->par;
++	unsigned long value;
++	unsigned long clk_value_khz;
++
++	dev_dbg(info->device, "%s:\n", __func__);
++	dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
++		 info->var.xres, info->var.yres,
++		 info->var.xres_virtual, info->var.yres_virtual);
++
++	/* Turn off the LCD controller and the DMA controller */
++	lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
++
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
++
++	if (info->var.bits_per_pixel <= 8)
++		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
++	else
++		info->fix.visual = FB_VISUAL_TRUECOLOR;
++
++	info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
++
++	/* Re-initialize the DMA engine... */
++	dev_dbg(info->device, "  * update DMA engine\n");
++	atmel_lcdfb_update_dma(info, &info->var);
++
++	/* ...set frame size and burst length = 8 words (?) */
++	value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
++	value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
++	lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
++
++	/* Now, the LCDC core... */
++
++	/* Set pixel clock */
++	clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
++
++	value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
++
++	if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
++		value++;
++
++	value = (value / 2) - 1;
++
++	if (value <= 0) {
++		dev_notice(info->device, "Bypassing pixel clock divider\n");
++		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
++	} else
++		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
++
++	/* Initialize control register 2 */
++	value = sinfo->default_lcdcon2;
++
++	if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
++		value |= ATMEL_LCDC_INVLINE_INVERTED;
++	if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
++		value |= ATMEL_LCDC_INVFRAME_INVERTED;
++
++	switch (info->var.bits_per_pixel) {
++		case 1:	value |= ATMEL_LCDC_PIXELSIZE_1; break;
++		case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
++		case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
++		case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
++		case 15: /* fall through */
++		case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
++		case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
++		case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
++		default: BUG(); break;
++	}
++	dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
++	lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
++
++	/* Vertical timing */
++	value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
++	value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
++	value |= info->var.lower_margin;
++	dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
++	lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
++
++	/* Horizontal timing */
++	value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
++	value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
++	value |= (info->var.left_margin - 1);
++	dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
++	lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
++
++	/* Display size */
++	value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
++	value |= info->var.yres - 1;
++	lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
++
++	/* FIFO Threshold: Use formula from data sheet */
++	value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
++	lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
++
++	/* Toggle LCD_MODE every frame */
++	lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
++
++	/* Disable all interrupts */
++	lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
++
++	/* Set contrast */
++	value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE;
++	lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value);
++	lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
++	/* ...wait for DMA engine to become idle... */
++	while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
++		msleep(10);
++
++	dev_dbg(info->device, "  * re-enable DMA engine\n");
++	/* ...and enable it with updated configuration */
++	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
++
++	dev_dbg(info->device, "  * re-enable LCDC core\n");
++	lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
++		(sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
++
++	dev_dbg(info->device, "  * DONE\n");
++
++	return 0;
++}
++
++static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
++{
++	chan &= 0xffff;
++	chan >>= 16 - bf->length;
++	return chan << bf->offset;
++}
++
++/**
++ *  	atmel_lcdfb_setcolreg - Optional function. Sets a color register.
++ *      @regno: Which register in the CLUT we are programming
++ *      @red: The red value which can be up to 16 bits wide
++ *	@green: The green value which can be up to 16 bits wide
++ *	@blue:  The blue value which can be up to 16 bits wide.
++ *	@transp: If supported the alpha value which can be up to 16 bits wide.
++ *      @info: frame buffer info structure
++ *
++ *  	Set a single color register. The values supplied have a 16 bit
++ *  	magnitude which needs to be scaled in this function for the hardware.
++ *	Things to take into consideration are how many color registers, if
++ *	any, are supported with the current color visual. With truecolor mode
++ *	no color palettes are supported. Here a psuedo palette is created
++ *	which we store the value in pseudo_palette in struct fb_info. For
++ *	pseudocolor mode we have a limited color palette. To deal with this
++ *	we can program what color is displayed for a particular pixel value.
++ *	DirectColor is similar in that we can program each color field. If
++ *	we have a static colormap we don't need to implement this function.
++ *
++ *	Returns negative errno on error, or zero on success. In an
++ *	ideal world, this would have been the case, but as it turns
++ *	out, the other drivers return 1 on failure, so that's what
++ *	we're going to do.
++ */
++static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
++			     unsigned int green, unsigned int blue,
++			     unsigned int transp, struct fb_info *info)
++{
++	struct atmel_lcdfb_info *sinfo = info->par;
++	unsigned int val;
++	u32 *pal;
++	int ret = 1;
++
++	if (info->var.grayscale)
++		red = green = blue = (19595 * red + 38470 * green
++				      + 7471 * blue) >> 16;
++
++	switch (info->fix.visual) {
++	case FB_VISUAL_TRUECOLOR:
++		if (regno < 16) {
++			pal = info->pseudo_palette;
++
++			val  = chan_to_field(red, &info->var.red);
++			val |= chan_to_field(green, &info->var.green);
++			val |= chan_to_field(blue, &info->var.blue);
++
++			pal[regno] = val;
++			ret = 0;
++		}
++		break;
++
++	case FB_VISUAL_PSEUDOCOLOR:
++		if (regno < 256) {
++			val  = ((red   >> 11) & 0x001f);
++			val |= ((green >>  6) & 0x03e0);
++			val |= ((blue  >>  1) & 0x7c00);
++
++			/*
++			 * TODO: intensity bit. Maybe something like
++			 *   ~(red[10] ^ green[10] ^ blue[10]) & 1
++			 */
++
++			lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
++			ret = 0;
++		}
++		break;
++	}
++
++	return ret;
++}
++
++static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
++			       struct fb_info *info)
++{
++	dev_dbg(info->device, "%s\n", __func__);
++
++	atmel_lcdfb_update_dma(info, var);
++
++	return 0;
++}
++
++static struct fb_ops atmel_lcdfb_ops = {
++	.owner		= THIS_MODULE,
++	.fb_check_var	= atmel_lcdfb_check_var,
++	.fb_set_par	= atmel_lcdfb_set_par,
++	.fb_setcolreg	= atmel_lcdfb_setcolreg,
++	.fb_pan_display	= atmel_lcdfb_pan_display,
++	.fb_fillrect	= cfb_fillrect,
++	.fb_copyarea	= cfb_copyarea,
++	.fb_imageblit	= cfb_imageblit,
++};
++
++static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
++{
++	struct fb_info *info = dev_id;
++	struct atmel_lcdfb_info *sinfo = info->par;
++	u32 status;
++
++	status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
++	lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
++	return IRQ_HANDLED;
++}
++
++static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
++{
++	struct fb_info *info = sinfo->info;
++	int ret = 0;
++
++	memset_io(info->screen_base, 0, info->fix.smem_len);
++	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
++
++	dev_info(info->device,
++	       "%luKiB frame buffer at %08lx (mapped at %p)\n",
++	       (unsigned long)info->fix.smem_len / 1024,
++	       (unsigned long)info->fix.smem_start,
++	       info->screen_base);
++
++	/* Allocate colormap */
++	ret = fb_alloc_cmap(&info->cmap, 256, 0);
++	if (ret < 0)
++		dev_err(info->device, "Alloc color map failed\n");
++
++	return ret;
++}
++
++static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
++{
++	if (sinfo->bus_clk)
++		clk_enable(sinfo->bus_clk);
++	clk_enable(sinfo->lcdc_clk);
++}
++
++static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
++{
++	if (sinfo->bus_clk)
++		clk_disable(sinfo->bus_clk);
++	clk_disable(sinfo->lcdc_clk);
++}
++
++
++static int __init atmel_lcdfb_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct fb_info *info;
++	struct atmel_lcdfb_info *sinfo;
++	struct atmel_lcdfb_info *pdata_sinfo;
++	struct resource *regs = NULL;
++	struct resource *map = NULL;
++	int ret;
++
++	dev_dbg(dev, "%s BEGIN\n", __func__);
++
++	ret = -ENOMEM;
++	info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
++	if (!info) {
++		dev_err(dev, "cannot allocate memory\n");
++		goto out;
++	}
++
++	sinfo = info->par;
++
++	if (dev->platform_data) {
++		pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
++		sinfo->default_bpp = pdata_sinfo->default_bpp;
++		sinfo->default_dmacon = pdata_sinfo->default_dmacon;
++		sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
++		sinfo->default_monspecs = pdata_sinfo->default_monspecs;
++		sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
++		sinfo->guard_time = pdata_sinfo->guard_time;
++	} else {
++		dev_err(dev, "cannot get default configuration\n");
++		goto free_info;
++	}
++	sinfo->info = info;
++	sinfo->pdev = pdev;
++
++	strcpy(info->fix.id, sinfo->pdev->name);
++	info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
++	info->pseudo_palette = sinfo->pseudo_palette;
++	info->fbops = &atmel_lcdfb_ops;
++
++	memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
++	info->fix = atmel_lcdfb_fix;
++
++	/* Enable LCDC Clocks */
++	if (cpu_is_at91sam9261() {
++		sinfo->bus_clk = clk_get(dev, "hck1");
++		if (IS_ERR(sinfo->bus_clk)) {
++			ret = PTR_ERR(sinfo->bus_clk);
++			goto free_info;
++		}
++	}
++	sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
++	if (IS_ERR(sinfo->lcdc_clk)) {
++		ret = PTR_ERR(sinfo->lcdc_clk);
++		goto put_bus_clk;
++	}
++	atmel_lcdfb_start_clock(sinfo);
++
++	ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
++			info->monspecs.modedb_len, info->monspecs.modedb,
++			sinfo->default_bpp);
++	if (!ret) {
++		dev_err(dev, "no suitable video mode found\n");
++		goto stop_clk;
++	}
++
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_err(dev, "resources unusable\n");
++		ret = -ENXIO;
++		goto stop_clk;
++	}
++
++	sinfo->irq_base = platform_get_irq(pdev, 0);
++	if (sinfo->irq_base < 0) {
++		dev_err(dev, "unable to get irq\n");
++		ret = sinfo->irq_base;
++		goto stop_clk;
++	}
++
++	/* Initialize video memory */
++	map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++	if (map) {
++		/* use a pre-allocated memory buffer */
++		info->fix.smem_start = map->start;
++		info->fix.smem_len = map->end - map->start + 1;
++		if (!request_mem_region(info->fix.smem_start,
++					info->fix.smem_len, pdev->name)) {
++			ret = -EBUSY;
++			goto stop_clk;
++		}
++
++		info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
++		if (!info->screen_base)
++			goto release_intmem;
++	} else {
++		/* alocate memory buffer */
++		ret = atmel_lcdfb_alloc_video_memory(sinfo);
++		if (ret < 0) {
++			dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
++			goto stop_clk;
++		}
++	}
++
++	/* LCDC registers */
++	info->fix.mmio_start = regs->start;
++	info->fix.mmio_len = regs->end - regs->start + 1;
++
++	if (!request_mem_region(info->fix.mmio_start,
++				info->fix.mmio_len, pdev->name)) {
++		ret = -EBUSY;
++		goto free_fb;
++	}
++
++	sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
++	if (!sinfo->mmio) {
++		dev_err(dev, "cannot map LCDC registers\n");
++		goto release_mem;
++	}
++
++	/* interrupt */
++	ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
++	if (ret) {
++		dev_err(dev, "request_irq failed: %d\n", ret);
++		goto unmap_mmio;
++	}
++
++	ret = atmel_lcdfb_init_fbinfo(sinfo);
++	if (ret < 0) {
++		dev_err(dev, "init fbinfo failed: %d\n", ret);
++		goto unregister_irqs;
++	}
++
++	/*
++	 * This makes sure that our colour bitfield
++	 * descriptors are correctly initialised.
++	 */
++	atmel_lcdfb_check_var(&info->var, info);
++
++	ret = fb_set_var(info, &info->var);
++	if (ret) {
++		dev_warn(dev, "unable to set display parameters\n");
++		goto free_cmap;
++	}
++
++	dev_set_drvdata(dev, info);
++
++	/*
++	 * Tell the world that we're ready to go
++	 */
++	ret = register_framebuffer(info);
++	if (ret < 0) {
++		dev_err(dev, "failed to register framebuffer device: %d\n", ret);
++		goto free_cmap;
++	}
++
++	/* Power up the LCDC screen */
++	if (sinfo->atmel_lcdfb_power_control)
++		sinfo->atmel_lcdfb_power_control(1);
++
++	dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
++		       info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
++
++	return 0;
++
++
++free_cmap:
++	fb_dealloc_cmap(&info->cmap);
++unregister_irqs:
++	free_irq(sinfo->irq_base, info);
++unmap_mmio:
++	iounmap(sinfo->mmio);
++release_mem:
++ 	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
++free_fb:
++	if (map)
++		iounmap(info->screen_base);
++	else
++		atmel_lcdfb_free_video_memory(sinfo);
++
++release_intmem:
++	if (map)
++		release_mem_region(info->fix.smem_start, info->fix.smem_len);
++stop_clk:
++	atmel_lcdfb_stop_clock(sinfo);
++	clk_put(sinfo->lcdc_clk);
++put_bus_clk:
++	if (sinfo->bus_clk)
++		clk_put(sinfo->bus_clk);
++free_info:
++	framebuffer_release(info);
++out:
++	dev_dbg(dev, "%s FAILED\n", __func__);
++	return ret;
++}
++
++static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct fb_info *info = dev_get_drvdata(dev);
++	struct atmel_lcdfb_info *sinfo = info->par;
++
++	if (!sinfo)
++		return 0;
++
++	if (sinfo->atmel_lcdfb_power_control)
++		sinfo->atmel_lcdfb_power_control(0);
++	unregister_framebuffer(info);
++	atmel_lcdfb_stop_clock(sinfo);
++	clk_put(sinfo->lcdc_clk);
++	if (sinfo->bus_clk)
++		clk_put(sinfo->bus_clk);
++	fb_dealloc_cmap(&info->cmap);
++	free_irq(sinfo->irq_base, info);
++	iounmap(sinfo->mmio);
++ 	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
++	if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
++		iounmap(info->screen_base);
++		release_mem_region(info->fix.smem_start, info->fix.smem_len);
++	} else {
++		atmel_lcdfb_free_video_memory(sinfo);
++	}
++
++	dev_set_drvdata(dev, NULL);
++	framebuffer_release(info);
++
++	return 0;
++}
++
++static struct platform_driver atmel_lcdfb_driver = {
++	.remove		= __exit_p(atmel_lcdfb_remove),
++	.driver		= {
++		.name	= "atmel_lcdfb",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_lcdfb_init(void)
++{
++	return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
++}
++
++static void __exit atmel_lcdfb_exit(void)
++{
++	platform_driver_unregister(&atmel_lcdfb_driver);
++}
++
++module_init(atmel_lcdfb_init);
++module_exit(atmel_lcdfb_exit);
++
++MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
++MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@rfo.atmel.com>");
++MODULE_LICENSE("GPL");
+diff -urN -x CVS linux-2.6.21/drivers/video/backlight/Kconfig linux-2.6-stable/drivers/video/backlight/Kconfig
+--- linux-2.6.21/drivers/video/backlight/Kconfig	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/video/backlight/Kconfig	Tue May  8 12:13:31 2007
+@@ -63,3 +63,11 @@
+ 	help
+ 	  If you have a Frontpath ProGear say Y to enable the
+ 	  backlight driver.
++
++config BACKLIGHT_KB920x
++	tristate "KwikByte KB9202 Backlight Driver"
++	depends on BACKLIGHT_CLASS_DEVICE && MACH_KB9200
++	default y
++	help
++	  If you have a KwikByte KB9202 board, say Y to enable the
++	  backlight driver.
+diff -urN -x CVS linux-2.6.21/drivers/video/backlight/Makefile linux-2.6-stable/drivers/video/backlight/Makefile
+--- linux-2.6.21/drivers/video/backlight/Makefile	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/drivers/video/backlight/Makefile	Tue May  8 12:13:31 2007
+@@ -6,3 +6,4 @@
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+ obj-$(CONFIG_BACKLIGHT_LOCOMO)	+= locomolcd.o
+ obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
++obj-$(CONFIG_BACKLIGHT_KB920x)	+= kb920x_bl.o
+diff -urN -x CVS linux-2.6.21/drivers/video/backlight/kb920x_bl.c linux-2.6-stable/drivers/video/backlight/kb920x_bl.c
+--- linux-2.6.21/drivers/video/backlight/kb920x_bl.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/video/backlight/kb920x_bl.c	Tue May  8 12:13:31 2007
+@@ -0,0 +1,164 @@
++/*
++ * Backlight Driver for KB9202
++ *
++ * Copyright (c) 2006 KwikByte
++ *
++ * Based on Sharp's Corgi Backlight Driver
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file "COPYING" in the main directory of this archive
++ * for more details.
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include <linux/fb.h>
++#include <linux/backlight.h>
++
++#include <asm/arch/gpio.h>
++
++/* The backlight is on(1)/off(0) */
++#define	KB9202_DEFAULT_INTENSITY	1
++#define	KB9202_MAX_INTENSITY		1
++
++static int kb9202bl_suspended;
++static int current_intensity = 0;
++static DEFINE_SPINLOCK(bl_lock);
++
++static int kb9202bl_set_intensity(struct backlight_device *bd)
++{
++	unsigned long flags;
++	int intensity = bd->props.brightness;
++
++	if (bd->props.power != FB_BLANK_UNBLANK)
++		intensity = 0;
++	if (bd->props.fb_blank != FB_BLANK_UNBLANK)
++		intensity = 0;
++	if (kb9202bl_suspended)
++		intensity = 0;
++
++	if ((!current_intensity) && (bd->props.power == FB_BLANK_UNBLANK))
++		intensity = 1;
++
++	spin_lock_irqsave(&bl_lock, flags);
++	if (intensity)
++		gpio_set_value(AT91_PIN_PC23, 1);
++	else
++		gpio_set_value(AT91_PIN_PC23, 0);
++	spin_unlock_irqrestore(&bl_lock, flags);
++
++	current_intensity = intensity;
++
++	return 0;
++}
++
++static int kb9202bl_get_intensity(struct backlight_device *bd)
++{
++	return current_intensity;
++}
++
++static struct backlight_ops kb9202bl_ops = {
++	.get_brightness	= kb9202bl_get_intensity,
++	.update_status	= kb9202bl_set_intensity,
++};
++
++static int __init kb9202bl_probe(struct platform_device *pdev)
++{
++	struct backlight_device *bd;
++
++	bd = backlight_device_register ("kb9202-bl", &pdev->dev, NULL, &kb9202bl_ops);
++	if (IS_ERR(bd))
++		return PTR_ERR(bd);
++
++	platform_set_drvdata(pdev, bd);
++
++	bd->props.max_brightness = KB9202_MAX_INTENSITY;
++	bd->props.brightness = KB9202_DEFAULT_INTENSITY;
++	(void) kb9202bl_set_intensity(bd);
++
++	return 0;
++}
++
++static int kb9202bl_remove(struct platform_device *pdev)
++{
++	struct backlight_device *bd = platform_get_drvdata(pdev);
++
++	bd->props.brightness = 0;
++	bd->props.power = 0;
++	(void) kb9202bl_set_intensity(bd);
++
++	backlight_device_unregister(bd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int kb9202bl_suspend(struct platform_device *dev, pm_message_t state)
++{
++	struct backlight_device *bd = platform_get_drvdata(pdev);
++
++	kb9202bl_suspended = 1;
++	(void) kb9202bl_set_intensity(bd);
++	return 0;
++}
++
++static int kb9202bl_resume(struct platform_device *dev)
++{
++	struct backlight_device *bd = platform_get_drvdata(pdev);
++
++	kb9202bl_suspended = 0;
++	(void) kb9202bl_set_intensity(bd);
++	return 0;
++}
++#else
++#define kb9202bl_suspend	NULL
++#define kb9202bl_resume		NULL
++#endif
++
++static struct platform_driver kb9202bl_driver = {
++	.probe		= kb9202bl_probe,
++	.remove		= kb9202bl_remove,
++	.suspend	= kb9202bl_suspend,
++	.resume		= kb9202bl_resume,
++	.driver		= {
++		.name	= "kb9202-bl",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static struct platform_device *kb9202bl_device;
++
++static int __init kb9202bl_init(void)
++{
++	int ret;
++
++	ret = platform_driver_register(&kb9202bl_driver);
++	if (!ret) {
++		kb9202bl_device = platform_device_alloc("kb9202-bl", -1);
++		if (!kb9202bl_device)
++			return -ENOMEM;
++
++		ret = platform_device_add(kb9202bl_device);
++		if (ret) {
++			platform_device_put(kb9202bl_device);
++			platform_driver_unregister(&kb9202bl_driver);
++		}
++	}
++	return ret;
++}
++
++static void __exit kb9202bl_exit(void)
++{
++	platform_device_unregister(kb9202bl_device);
++	platform_driver_unregister(&kb9202bl_driver);
++}
++
++module_init(kb9202bl_init);
++module_exit(kb9202bl_exit);
++
++MODULE_AUTHOR("KwikByte <kb9200_dev@kwikbyte.com>");
++MODULE_DESCRIPTION("KB9202 Backlight Driver");
++MODULE_LICENSE("GPL");
+diff -urN -x CVS linux-2.6.21/drivers/video/s1d15605fb.c linux-2.6-stable/drivers/video/s1d15605fb.c
+--- linux-2.6.21/drivers/video/s1d15605fb.c	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/drivers/video/s1d15605fb.c	Tue May  8 12:13:31 2007
+@@ -0,0 +1,659 @@
++/*
++ *  drivers/video/s1d15605.c
++ *
++ * Adapted from several sources including:
++ * 1) Driver for AT91 LCD Controller
++ *    Copyright (C) 2006 Atmel
++ *
++ * 2) Copyright (C) 2005 S. Kevin Hester
++ *
++ *   This file is subject to the terms and conditions of the GNU General Public
++ *   License. See the file COPYING in the main directory of this archive for
++ *   more details.
++ *
++ *   This is a basic framebuffer driver for the Optrex F-51320 128x64 mono LCD
++ *   display.  This display uses a clone of the common Epson SED 1531 display
++ *   controller.
++ *
++ *   I've heavily borrowed code from the vfb.c driver.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++
++#ifdef DEBUG
++#define MSG(string, args...) printk("s1d15605fb:" string, ##args)
++#else
++#define MSG(string, args...)
++#endif
++
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/interrupt.h>
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++
++#include <asm/uaccess.h>
++
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#ifdef CONFIG_PMAC_BACKLIGHT
++#include <asm/backlight.h>
++#endif
++
++#define VIDEOWIDTH		128
++#define VIDEOHEIGHT		64
++#define VIDEODEPTH		1	/* bits/pixel */
++#define VIDEOWIDTH_BYTES	((VIDEOWIDTH * VIDEODEPTH) / 8)
++
++/* The number of bytes that actually go to the device */
++#define ACTUALVIDEOMEMSIZE	(VIDEOWIDTH_BYTES * VIDEOHEIGHT)
++#define VIDEOMEMSIZE		PAGE_SIZE
++
++static struct fb_var_screeninfo s1d15605_default __initdata = {
++	.xres		= VIDEOWIDTH,
++	.yres		= VIDEOHEIGHT,
++	.xres_virtual	= VIDEOWIDTH,
++	.yres_virtual	= VIDEOHEIGHT,
++	.bits_per_pixel	= VIDEODEPTH,
++	.red		= { 0, 1, 0 },
++	.green		= { 0, 1, 0 },
++	.blue		= { 0, 1, 0 },
++	.activate	= FB_ACTIVATE_NOW,
++	.pixclock	= 20000,
++	.vmode		= FB_VMODE_NONINTERLACED,
++};
++
++static struct fb_fix_screeninfo s1d15605_fix __initdata = {
++	.id		= "s1d15605",
++	.type		= FB_TYPE_PACKED_PIXELS,
++	.visual		= FB_VISUAL_MONO10,
++	.xpanstep	= 0,
++	.ypanstep	= 0,
++	.ywrapstep	= 0,
++	.accel		= FB_ACCEL_NONE,
++};
++
++struct s1d15605fb_info {
++	struct fb_info		*info;
++	char			*mmio;
++	unsigned long		reset_pin;
++	struct platform_device	*pdev;
++};
++
++/*
++ * LCD device interface
++ */
++#define	RESET_DISPLAY		0xE2
++#define	LCD_BIAS_1_9		0xA2
++#define	ADC_SELECT_REVERSE	0xA1
++#define	COMMON_OUTPUT_NORMAL	0xC0
++#define	V5_RESISTOR_RATIO	0x26
++#define	ELECTRONIC_VOLUME_SET	0x81
++#define	ELECTRONIC_VOLUME_INIT	0x20
++#define	POWER_CONTROL_SET	0x28
++#define	VOLTAGE_REGULATOR	0x02
++#define	VOLTAGE_FOLLOWER	0x01
++#define	BOOSTER_CIRCUIT		0x04
++#define	DISPLAY_ON		0xAF
++#define	START_LINE_SET		0x40
++#define	PAGE_ADDRESS_SET	0xB0
++#define	COLUMN_ADDRESS_HIGH	0x10
++#define	COLUMN_ADDRESS_LOW	0x00
++#define	RESISTOR_RATIO_START	0x20
++
++#define	NUM_OF_PAGES		8
++#define	NUM_OF_COLUMNS		128
++
++#define	WRITE_COMMAND(x)	__raw_writeb((x), (sinfo)->mmio)
++#define	READ_COMMAND		__raw_readb((sinfo)->mmio)
++#define	WRITE_DATA(x)		__raw_writeb((x), (sinfo)->mmio + (0x10000))
++#define	READ_DATA		__raw_readb((sinfo)->mmio + (0x10000))
++
++
++/*
++ *	s1d15605fb_resize_framebuffer
++ *
++ *	Free allocated space if different.  Allocate on new of changed.
++ *	Returns -ENOMEM if the new framebuffer can not be allocated,
++ *	zero on success.
++ */
++static int s1d15605fb_resize_framebuffer(struct s1d15605fb_info *sinfo)
++{
++	struct fb_info			*info = sinfo->info;
++	struct fb_fix_screeninfo	*fix = &info->fix;
++	struct fb_var_screeninfo	*var = &info->var;
++	unsigned int			new_size;
++	void				*new_vaddr;
++
++	new_size = ((var->xres_virtual * var->yres_virtual * var->bits_per_pixel) / 8);
++
++	MSG("%s: x (%d) y (%d) bpp (%d): new size 0x%08x\n", __FUNCTION__,
++		var->xres_virtual, var->yres_virtual, var->bits_per_pixel, new_size);
++
++	if (new_size == fix->smem_len)
++		return 0;
++
++	if (fix->smem_len) {
++		kfree(info->screen_base);
++	}
++
++	new_vaddr = kmalloc(new_size, GFP_KERNEL);
++
++	if (!new_vaddr) {
++		fix->smem_len = 0;
++		return -ENOMEM;
++	}
++
++	info->screen_base = new_vaddr;
++	fix->smem_start = (unsigned)new_vaddr;
++	fix->smem_len = new_size;
++	fix->line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
++
++	dev_info(info->device,
++		"%luKiB frame buffer at %08lx (mapped at %p)\n",
++		(unsigned long)info->fix.smem_len / 1024,
++		(unsigned long)info->fix.smem_start,
++		info->screen_base);
++
++	return 0;
++}
++
++
++/*
++ * The s1d15605 seems to be divided into eight 128 pixel wide pages (from top to
++ * bottom) each page seems to be eight pixels high, where these eight pixels are
++ * one byte
++ */
++static void s1d15605_update(struct fb_info *info)
++{
++	struct s1d15605fb_info	*sinfo = info->par;
++	int			page, i, row, colmask;
++	u8			retVal, *rowPtr;
++
++	WRITE_COMMAND(START_LINE_SET);
++	for (page = 0; page < NUM_OF_PAGES; ++page) {
++		WRITE_COMMAND(PAGE_ADDRESS_SET + page);
++		WRITE_COMMAND(COLUMN_ADDRESS_HIGH);
++		WRITE_COMMAND(COLUMN_ADDRESS_LOW);
++
++		for (i = 0; i < NUM_OF_COLUMNS; ++i)
++		{
++			/* point of opportunity: optimization */
++			colmask = (1 << (i & 0x7));
++			rowPtr = (u8*)(info->screen_base);
++			rowPtr += (VIDEOWIDTH_BYTES * 8 * page);
++			rowPtr += (i >> 3);
++			retVal = 0;
++			for (row = 0; row < 8; ++row)
++			{
++				retVal = (retVal >> 1) | (((*rowPtr) & colmask) ? 0x80 : 0);
++				rowPtr += VIDEOWIDTH_BYTES;
++			}
++			WRITE_DATA(retVal);
++		}
++	}
++
++	WRITE_COMMAND(DISPLAY_ON);
++}
++
++
++/*
++ * Setting the video mode has been split into two parts.
++ * First part, xxxfb_check_var, must not write anything
++ * to hardware, it should only verify and adjust var.
++ * This means it doesn't alter par but it does use hardware
++ * data from it to check this var.
++ */
++static int s1d15605_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
++{
++	/*
++	 * Some very basic checks
++	 */
++	if (!var->xres)
++		var->xres = 1;
++	if (!var->yres)
++		var->yres = 1;
++	if (var->xres > var->xres_virtual)
++		var->xres_virtual = var->xres;
++	if (var->yres > var->yres_virtual)
++		var->yres_virtual = var->yres;
++
++	if(var->bits_per_pixel > VIDEODEPTH)
++		return -EINVAL;
++
++	/*
++	 * Memory limit
++	 */
++	if (((var->yres_virtual * var->bits_per_pixel * var->yres_virtual) >> 3) >
++			ACTUALVIDEOMEMSIZE)
++		return -ENOMEM;
++
++	/*
++	 * Now that we checked it we alter var. The reason being is that the video
++	 * mode passed in might not work but slight changes to it might make it
++	 * work. This way we let the user know what is acceptable.
++	 */
++	switch (var->bits_per_pixel) {
++	case 1:
++		var->red.offset = var->green.offset = var->blue.offset = 0;
++		var->red.length = var->green.length = var->blue.length
++			= var->bits_per_pixel;
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	var->xoffset = var->yoffset = 0;
++	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
++		var->transp.msb_right = 0;
++
++	return 0;
++}
++
++
++/*
++ * This routine actually sets the video mode. It's in here where we
++ * the hardware state info->par and fix which can be affected by the
++ * change in par. For this driver it doesn't do much.
++ */
++static int s1d15605_set_par(struct fb_info *info)
++{
++	int	ret;
++
++	MSG("%s:\n", __func__);
++	MSG("  * resolution: %ux%u (%ux%u virtual)\n",
++		 info->var.xres, info->var.yres,
++		 info->var.xres_virtual, info->var.yres_virtual);
++
++	ret = s1d15605fb_resize_framebuffer(info->par);
++
++	info->fix.visual = FB_VISUAL_MONO10;
++	return ret;
++}
++
++
++/*
++ * Set a single color register. The values supplied are already
++ * rounded down to the hardware's capabilities (according to the
++ * entries in the var structure). Return != 0 for invalid regno.
++ */
++static int s1d15605_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
++			u_int transp, struct fb_info *info)
++{
++	if (regno > 1)	/* no. of hw registers - we only do mono now */
++		return 1;
++
++	return 0;
++}
++
++
++/*
++ * Currently, the routine will simply shut-off the backlight and prevent
++ * updates/refreshes.  Modify according to application.
++ *
++ * 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off
++ */
++static int s1d15605_blank(int blank, struct fb_info *info)
++{
++#ifdef CONFIG_PMAC_BACKLIGHT
++	if (blank)
++		pmac_backlight->props.power = FB_BLANK_POWERDOWN;
++	else
++		pmac_backlight->props.power = FB_BLANK_UNBLANK;
++	backlight_update_status(pmac_backlight);
++#endif
++	return 1;
++}
++
++
++/*
++ * Pan or Wrap the Display
++ *
++ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
++ */
++/*
++static int s1d15605_pan_display(struct fb_var_screeninfo *var,
++			struct fb_info *info)
++{
++	if (var->vmode & FB_VMODE_YWRAP) {
++		if (var->yoffset < 0
++		    || var->yoffset >= info->var.yres_virtual
++		    || var->xoffset)
++			return -EINVAL;
++	} else {
++		if (var->xoffset + var->xres > info->var.xres_virtual ||
++		    var->yoffset + var->yres > info->var.yres_virtual)
++			return -EINVAL;
++	}
++	info->var.xoffset = var->xoffset;
++	info->var.yoffset = var->yoffset;
++	if (var->vmode & FB_VMODE_YWRAP)
++		info->var.vmode |= FB_VMODE_YWRAP;
++	else
++		info->var.vmode &= ~FB_VMODE_YWRAP;
++	return 0;
++}
++*/
++
++
++static void s1d15605_copyarea(struct fb_info *info, const struct fb_copyarea *region)
++{
++	cfb_copyarea(info, region);
++	s1d15605_update(info);
++}
++
++
++static void s1d15605_fillrect (struct fb_info *info, const struct fb_fillrect *rect)
++{
++	cfb_fillrect(info, rect);
++	s1d15605_update(info);
++}
++
++
++static void s1d15605_imageblit(struct fb_info *p, const struct fb_image *image)
++{
++	cfb_imageblit(p, image);
++	s1d15605_update(p);
++}
++
++
++/*
++ * Write the users data to our framebuffer, and then trigger a psuedo DMA
++ */
++static ssize_t s1d15605_write(struct file *file, const char *buf,
++			size_t count, loff_t *ppos)
++{
++	unsigned long p = *ppos;
++	struct inode *inode = file->f_dentry->d_inode;
++	int fbidx = iminor(inode);
++	struct fb_info *info = registered_fb[fbidx];
++	int err;
++
++	if (p > info->fix.smem_len)
++		return -ENOSPC;
++	if (count >= info->fix.smem_len)
++		count = info->fix.smem_len;
++	err = 0;
++	if (count + p > info->fix.smem_len) {
++		count = info->fix.smem_len - p;
++		err = -ENOSPC;
++	}
++	if (count) {
++		char *base_addr;
++
++		base_addr = info->screen_base;
++		count -= copy_from_user(base_addr+p, buf, count);
++		*ppos += count;
++		err = -EFAULT;
++	}
++
++	s1d15605_update(info);
++
++	if (count)
++		return count;
++
++	return err;
++}
++
++#ifdef	USE_PRIVATE_VMA_FXS
++static void s1d15605_vma_open(struct vm_area_struct *vma)
++{
++	// FIXME - store stats in the device data via vm_private_data
++}
++
++
++static void s1d15605_vma_close(struct vm_area_struct *vma)
++{
++	// FIXME - store stats in the device data via vm_private_data
++}
++
++
++static struct page *s1d15605_vma_nopage(struct vm_area_struct *vma,
++				unsigned long address, int *type)
++{
++	struct page *page;
++	struct fb_info *info = vma->vm_private_data;
++
++	page = virt_to_page(info->screen_base);
++	get_page(page);
++
++	// FIXME - now someone has a link to our page, start periodically blitting
++	// latest updates to the actual device.
++
++	return page;
++}
++
++
++static struct vm_operations_struct s1d15605_vm_ops = {
++	.open	= s1d15605_vma_open,
++	.close	= s1d15605_vma_close,
++	.nopage	= s1d15605_vma_nopage
++};
++
++
++/* We don't do much here - because we have special vm_ops */
++static int s1d15605_mmap(struct fb_info *info, struct vm_area_struct *vma)
++{
++	vma->vm_ops = &s1d15605_vm_ops;
++	vma->vm_flags |= VM_RESERVED;
++	vma->vm_private_data = info;
++	s1d15605_vma_open(vma);
++
++	return 0;
++}
++#endif /* USE_PRIVATE_VMA_FXS */
++
++
++static struct fb_ops s1d15605fb_ops = {
++	.owner		= THIS_MODULE,
++	.fb_check_var	= s1d15605_check_var,
++	.fb_set_par	= s1d15605_set_par,
++	.fb_setcolreg	= s1d15605_setcolreg,
++	.fb_blank	= s1d15605_blank,
++//	.fb_pan_display	= s1d15605_pan_display,
++	.fb_fillrect	= s1d15605_fillrect,
++	.fb_copyarea	= s1d15605_copyarea,
++	.fb_imageblit	= s1d15605_imageblit,
++	.fb_write	= s1d15605_write,
++#ifdef	USE_PRIVATE_VMA_FXS
++	.fb_mmap	= s1d15605_mmap,
++#endif
++};
++
++
++static void s1d15605_device_init(struct s1d15605fb_info *sinfo) {
++
++	char	value;
++
++	/* release the reset line by reading the device - proto hardware */
++	value = READ_COMMAND;
++	value = READ_COMMAND;
++
++#ifdef CONFIG_MACH_KB9200
++	/* new boards have dedicated reset line */
++	gpio_set_value(sinfo->reset_pin, 1);
++#endif
++
++	/* initialize the device within 5ms */
++	WRITE_COMMAND(RESET_DISPLAY);
++	WRITE_COMMAND(LCD_BIAS_1_9);
++	WRITE_COMMAND(ADC_SELECT_REVERSE);
++	WRITE_COMMAND(COMMON_OUTPUT_NORMAL);
++	WRITE_COMMAND(V5_RESISTOR_RATIO);
++	WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
++	WRITE_COMMAND(ELECTRONIC_VOLUME_INIT);
++	WRITE_COMMAND(POWER_CONTROL_SET | VOLTAGE_REGULATOR | VOLTAGE_FOLLOWER | BOOSTER_CIRCUIT);
++	WRITE_COMMAND(DISPLAY_ON);
++
++	WRITE_COMMAND(RESISTOR_RATIO_START + 4);
++	WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
++	WRITE_COMMAND(0x33);
++}
++
++
++static int s1d15605fb_probe(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct fb_info *info;
++	struct s1d15605fb_info *sinfo;
++	int ret;
++
++	MSG("%s\n", __func__);
++
++	if (!(info = framebuffer_alloc(sizeof(struct s1d15605fb_info), dev))) {
++		dev_err(dev, "Cannot allocate framebuffer struct\n");
++		return -ENOMEM;
++	}
++
++	sinfo = info->par;
++	sinfo->info = info;
++	sinfo->pdev = pdev;
++
++	if (pdev->num_resources < 2) {
++		dev_err(dev, "Resources unusable\n");
++		ret = -ENODEV;
++		goto free_info;
++	}
++
++	info->fbops = &s1d15605fb_ops;
++	strcpy(info->fix.id, pdev->name);
++
++	info->fix.mmio_start = pdev->resource[0].start;
++	info->fix.mmio_len = pdev->resource[0].end - pdev->resource[0].start + 1;
++	sinfo->reset_pin = pdev->resource[1].start;
++
++	ret = s1d15605fb_resize_framebuffer(sinfo);
++	if (ret < 0) {
++		dev_err(dev, "Cannot resize framebuffer: %d\n", ret);
++		goto free_fb;
++	}
++
++	if (!request_mem_region(info->fix.mmio_start,
++				info->fix.mmio_len, pdev->name)) {
++		ret = -EBUSY;
++		goto free_fb;
++	}
++
++	sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
++	if (!sinfo->mmio) {
++		dev_err(dev, "Cannot map LCD memory region\n");
++		goto release_mem;
++	}
++
++	s1d15605_device_init(sinfo);
++
++	ret = fb_find_mode(&info->var, info, NULL, NULL, 0, NULL, 1);
++
++	if (!ret || (ret == 4))
++		info->var = s1d15605_default;
++
++	info->fix = s1d15605_fix;
++	info->flags = FBINFO_FLAG_DEFAULT |
++/*		FBINFO_HWACCEL_YPAN | */
++		FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
++
++	ret = register_framebuffer(info);
++	if (ret < 0) {
++		dev_err(dev, "Failed to register framebuffer device: %d\n", ret);
++		goto unmap_mmio;
++	}
++
++	dev_set_drvdata(dev, info);
++
++	memset(info->screen_base, 0, info->fix.smem_len);
++	info->var.activate |= FB_ACTIVATE_NOW;
++	ret = fb_set_var(info, &info->var);
++	if (ret) {
++		dev_warn(dev, "Unable to set display parameters\n");
++	}
++
++	info->var.activate &= ~(FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW);
++
++	dev_dbg(dev, "%s SUCCESS\n", __func__);
++
++	dev_info(dev, "Driver $Revision: 1.1 $\n");
++
++	return 0;
++
++unmap_mmio:
++	iounmap(sinfo->mmio);
++release_mem:
++	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
++free_fb:
++	kfree(info->screen_base);
++
++free_info:
++	framebuffer_release(info);
++
++	dev_dbg(dev, "%s FAILED\n", __func__);
++	return ret;
++}
++
++
++static int s1d15605fb_remove(struct platform_device *pdev)
++{
++	struct device *dev = &pdev->dev;
++	struct fb_info *info = dev_get_drvdata(dev);
++	struct s1d15605fb_info *sinfo = info->par;
++
++	if (!sinfo)
++		return 0;
++
++	unregister_framebuffer(info);
++
++	iounmap(sinfo->mmio);
++	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
++
++	kfree(info->screen_base);
++
++	dev_set_drvdata(dev, NULL);
++	framebuffer_release(info);
++	return 0;
++}
++
++
++static struct platform_driver s1d15605fb_driver = {
++	.probe		= s1d15605fb_probe,
++	.remove		= s1d15605fb_remove,
++	.driver		= {
++		.name	= "s1d15605fb",
++		.owner	= THIS_MODULE,
++	},
++};
++
++
++static int __init s1d15605fb_init(void)
++{
++	return platform_driver_register(&s1d15605fb_driver);
++}
++
++
++static void __exit s1d15605fb_exit(void)
++{
++	platform_driver_unregister(&s1d15605fb_driver);
++}
++
++
++module_init(s1d15605fb_init);
++module_exit(s1d15605fb_exit);
++
++
++MODULE_AUTHOR("KwikByte");
++MODULE_DESCRIPTION("Epson S1D15605 LCD Controller framebuffer driver");
++MODULE_LICENSE("GPL");
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_adc.h linux-2.6-stable/include/asm-arm/arch-at91/at91_adc.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91_adc.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91_adc.h	Tue May  8 12:13:31 2007
+@@ -0,0 +1,61 @@
++/*
++ * include/asm-arm/arch-at91/at91_adc.h
++ *
++ * Copyright (C) SAN People
++ *
++ * Analog-to-Digital Converter (ADC) registers.
++ * Based on AT91SAM9260 datasheet revision D.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++
++#ifndef AT91_ADC_H
++#define AT91_ADC_H
++
++#define AT91_ADC_CR		0x00		/* Control Register */
++#define		AT91_ADC_SWRST		(1 << 0)	/* Software Reset */
++#define		AT91_ADC_START		(1 << 1)	/* Start Conversion */
++
++#define AT91_ADC_MR		0x04		/* Mode Register */
++#define		AT91_ADC_TRGEN		(1 << 0)	/* Trigger Enable */
++#define		AT91_ADC_TRGSEL		(7 << 1)	/* Trigger Selection */
++#define			AT91_ADC_TRGSEL_TC0		(0 << 1)
++#define			AT91_ADC_TRGSEL_TC1		(1 << 1)
++#define			AT91_ADC_TRGSEL_TC2		(2 << 1)
++#define			AT91_ADC_TRGSEL_EXTERNAL	(6 << 1)
++#define		AT91_ADC_LOWRES		(1 << 4)	/* Low Resolution */
++#define		AT91_ADC_SLEEP		(1 << 5)	/* Sleep Mode */
++#define		AT91_ADC_PRESCAL	(0x3f << 8)	/* Prescalar Rate Selection */
++#define			AT91_ADC_PRESCAL_(x)	((x) << 8)
++#define		AT91_ADC_STARTUP	(0x1f << 16)	/* Startup Up Time */
++#define			AT91_ADC_STARTUP_(x)	((x) << 16)
++#define		AT91_ADC_SHTIM		(0xf  << 24)	/* Sample & Hold Time */
++#define			AT91_ADC_SHTIM_(x)	((x) << 24)
++
++#define AT91_ADC_CHER		0x10		/* Channel Enable Register */
++#define AT91_ADC_CHDR		0x14		/* Channel Disable Register */
++#define AT91_ADC_CHSR		0x18		/* Channel Status Register */
++#define		AT91_ADC_CH(n)		(1 << (n))	/* Channel Number */
++
++#define AT91_ADC_SR		0x1C		/* Status Register */
++#define		AT91_ADC_EOC(n)		(1 << (n))	/* End of Conversion on Channel N */
++#define		AT91_ADC_OVRE(n)	(1 << ((n) + 8))/* Overrun Error on Channel N */
++#define		AT91_ADC_DRDY		(1 << 16)	/* Data Ready */
++#define		AT91_ADC_GOVRE		(1 << 17)	/* General Overrun Error */
++#define		AT91_ADC_ENDRX		(1 << 18)	/* End of RX Buffer */
++#define		AT91_ADC_RXFUFF		(1 << 19)	/* RX Buffer Full */
++
++#define AT91_ADC_LCDR		0x20		/* Last Converted Data Register */
++#define		AT91_ADC_LDATA		(0x3ff)
++
++#define AT91_ADC_IER		0x24		/* Interrupt Enable Register */
++#define AT91_ADC_IDR		0x28		/* Interrupt Disable Register */
++#define AT91_ADC_IMR		0x2C		/* Interrupt Mask Register */
++
++#define AT91_ADC_CHR(n)		(0x30 + ((n) * 4)	/* Channel Data Register N */
++#define		AT91_ADC_DATA		(0x3ff)
++
++#endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_mci.h linux-2.6-stable/include/asm-arm/arch-at91/at91_mci.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91_mci.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91_mci.h	Tue May  8 12:13:31 2007
+@@ -26,6 +26,9 @@
+ #define AT91_MCI_MR		0x04		/* Mode Register */
+ #define		AT91_MCI_CLKDIV		(0xff  <<  0)	/* Clock Divider */
+ #define		AT91_MCI_PWSDIV		(7     <<  8)	/* Power Saving Divider */
++#define		AT91_MCI_RDPROOF	(1     << 11)	/* Read Proof Enable [SAM926[03] only] */
++#define		AT91_MCI_WRPROOF	(1     << 12)	/* Write Proof Enable [SAM926[03] only] */
++#define		AT91_MCI_PDCFBYTE	(1     << 13)	/* PDC Force Byte Transfer [SAM926[03] only] */
+ #define		AT91_MCI_PDCPADV	(1     << 14)	/* PDC Padding Value */
+ #define		AT91_MCI_PDCMODE	(1     << 15)	/* PDC-orientated Mode */
+ #define		AT91_MCI_BLKLEN		(0xfff << 18)	/* Data Block Length */
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91_pmc.h linux-2.6-stable/include/asm-arm/arch-at91/at91_pmc.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91_pmc.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91_pmc.h	Fri May 11 16:45:00 2007
+@@ -37,7 +37,9 @@
+ #define	AT91_PMC_PCDR		(AT91_PMC + 0x14)	/* Peripheral Clock Disable Register */
+ #define	AT91_PMC_PCSR		(AT91_PMC + 0x18)	/* Peripheral Clock Status Register */
+ 
+-#define	AT91_CKGR_MOR		(AT91_PMC + 0x20)	/* Main Oscillator Register */
++#define AT91_CKGR_UCKR		(AT91_PMC + 0x1C)	/* UTMI Clock Register [SAM9RL only] */
++
++#define	AT91_CKGR_MOR		(AT91_PMC + 0x20)	/* Main Oscillator Register [not on SAM9RL] */
+ #define		AT91_PMC_MOSCEN		(1    << 0)		/* Main Oscillator Enable */
+ #define		AT91_PMC_OSCBYPASS	(1    << 1)		/* Oscillator Bypass [AT91SAM926x only] */
+ #define		AT91_PMC_OSCOUNT	(0xff << 8)		/* Main Oscillator Start-up Time */
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91rm9200.h linux-2.6-stable/include/asm-arm/arch-at91/at91rm9200.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91rm9200.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91rm9200.h	Tue May  8 12:56:33 2007
+@@ -107,185 +107,4 @@
+ #define AT91RM9200_UHP_BASE	0x00300000	/* USB Host controller */
+ 
+ 
+-#if 0
+-/*
+- * PIO pin definitions (peripheral A/B multiplexing).
+- */
+-#define AT91_PA0_MISO		(1 <<  0)	/* A: SPI Master-In Slave-Out */
+-#define AT91_PA0_PCK3		(1 <<  0)	/* B: PMC Programmable Clock Output 3 */
+-#define AT91_PA1_MOSI		(1 <<  1)	/* A: SPI Master-Out Slave-In */
+-#define AT91_PA1_PCK0		(1 <<  1)	/* B: PMC Programmable Clock Output 0 */
+-#define AT91_PA2_SPCK		(1 <<  2)	/* A: SPI Serial Clock */
+-#define AT91_PA2_IRQ4		(1 <<  2)	/* B: External Interrupt 4 */
+-#define AT91_PA3_NPCS0		(1 <<  3)	/* A: SPI Peripheral Chip Select 0 */
+-#define AT91_PA3_IRQ5		(1 <<  3)	/* B: External Interrupt 5 */
+-#define AT91_PA4_NPCS1		(1 <<  4)	/* A: SPI Peripheral Chip Select 1 */
+-#define AT91_PA4_PCK1		(1 <<  4)	/* B: PMC Programmable Clock Output 1 */
+-#define AT91_PA5_NPCS2		(1 <<  5)	/* A: SPI Peripheral Chip Select 2 */
+-#define AT91_PA5_TXD3		(1 <<  5)	/* B: USART Transmit Data 3 */
+-#define AT91_PA6_NPCS3		(1 <<  6)	/* A: SPI Peripheral Chip Select 3 */
+-#define AT91_PA6_RXD3		(1 <<  6)	/* B: USART Receive Data 3 */
+-#define AT91_PA7_ETXCK_EREFCK	(1 <<  7)	/* A: Ethernet Reference Clock / Transmit Clock */
+-#define AT91_PA7_PCK2		(1 <<  7)	/* B: PMC Programmable Clock Output 2 */
+-#define AT91_PA8_ETXEN		(1 <<  8)	/* A: Ethernet Transmit Enable */
+-#define AT91_PA8_MCCDB		(1 <<  8)	/* B: MMC Multimedia Card B Command */
+-#define AT91_PA9_ETX0		(1 <<  9)	/* A: Ethernet Transmit Data 0 */
+-#define AT91_PA9_MCDB0		(1 <<  9)	/* B: MMC Multimedia Card B Data 0 */
+-#define AT91_PA10_ETX1		(1 << 10)	/* A: Ethernet Transmit Data 1 */
+-#define AT91_PA10_MCDB1		(1 << 10)	/* B: MMC Multimedia Card B Data 1 */
+-#define AT91_PA11_ECRS_ECRSDV	(1 << 11)	/* A: Ethernet Carrier Sense / Data Valid */
+-#define AT91_PA11_MCDB2		(1 << 11)	/* B: MMC Multimedia Card B Data 2 */
+-#define AT91_PA12_ERX0		(1 << 12)	/* A: Ethernet Receive Data 0 */
+-#define AT91_PA12_MCDB3		(1 << 12)	/* B: MMC Multimedia Card B Data 3 */
+-#define AT91_PA13_ERX1		(1 << 13)	/* A: Ethernet Receive Data 1 */
+-#define AT91_PA13_TCLK0		(1 << 13)	/* B: TC External Clock Input 0 */
+-#define AT91_PA14_ERXER		(1 << 14)	/* A: Ethernet Receive Error */
+-#define AT91_PA14_TCLK1		(1 << 14)	/* B: TC External Clock Input 1 */
+-#define AT91_PA15_EMDC		(1 << 15)	/* A: Ethernet Management Data Clock */
+-#define AT91_PA15_TCLK2		(1 << 15)	/* B: TC External Clock Input 2 */
+-#define AT91_PA16_EMDIO		(1 << 16)	/* A: Ethernet Management Data I/O */
+-#define AT91_PA16_IRQ6		(1 << 16)	/* B: External Interrupt 6 */
+-#define AT91_PA17_TXD0		(1 << 17)	/* A: USART Transmit Data 0 */
+-#define AT91_PA17_TIOA0		(1 << 17)	/* B: TC I/O Line A 0 */
+-#define AT91_PA18_RXD0		(1 << 18)	/* A: USART Receive Data 0 */
+-#define AT91_PA18_TIOB0		(1 << 18)	/* B: TC I/O Line B 0 */
+-#define AT91_PA19_SCK0		(1 << 19)	/* A: USART Serial Clock 0 */
+-#define AT91_PA19_TIOA1		(1 << 19)	/* B: TC I/O Line A 1 */
+-#define AT91_PA20_CTS0		(1 << 20)	/* A: USART Clear To Send 0 */
+-#define AT91_PA20_TIOB1		(1 << 20)	/* B: TC I/O Line B 1 */
+-#define AT91_PA21_RTS0		(1 << 21)	/* A: USART Ready To Send 0 */
+-#define AT91_PA21_TIOA2		(1 << 21)	/* B: TC I/O Line A 2 */
+-#define AT91_PA22_RXD2		(1 << 22)	/* A: USART Receive Data 2 */
+-#define AT91_PA22_TIOB2		(1 << 22)	/* B: TC I/O Line B 2 */
+-#define AT91_PA23_TXD2		(1 << 23)	/* A: USART Transmit Data 2 */
+-#define AT91_PA23_IRQ3		(1 << 23)	/* B: External Interrupt 3 */
+-#define AT91_PA24_SCK2		(1 << 24)	/* A: USART Serial Clock 2 */
+-#define AT91_PA24_PCK1		(1 << 24)	/* B: PMC Programmable Clock Output 1 */
+-#define AT91_PA25_TWD		(1 << 25)	/* A: TWI Two-wire Serial Data */
+-#define AT91_PA25_IRQ2		(1 << 25)	/* B: External Interrupt 2 */
+-#define AT91_PA26_TWCK		(1 << 26)	/* A: TWI Two-wire Serial Clock */
+-#define AT91_PA26_IRQ1		(1 << 26)	/* B: External Interrupt 1 */
+-#define AT91_PA27_MCCK		(1 << 27)	/* A: MMC Multimedia Card Clock */
+-#define AT91_PA27_TCLK3		(1 << 27)	/* B: TC External Clock Input 3 */
+-#define AT91_PA28_MCCDA		(1 << 28)	/* A: MMC Multimedia Card A Command */
+-#define AT91_PA28_TCLK4		(1 << 28)	/* B: TC External Clock Input 4 */
+-#define AT91_PA29_MCDA0		(1 << 29)	/* A: MMC Multimedia Card A Data 0 */
+-#define AT91_PA29_TCLK5		(1 << 29)	/* B: TC External Clock Input 5 */
+-#define AT91_PA30_DRXD		(1 << 30)	/* A: DBGU Receive Data */
+-#define AT91_PA30_CTS2		(1 << 30)	/* B: USART Clear To Send 2 */
+-#define AT91_PA31_DTXD		(1 << 31)	/* A: DBGU Transmit Data */
+-#define AT91_PA31_RTS2		(1 << 31)	/* B: USART Ready To Send 2 */
+-
+-#define AT91_PB0_TF0		(1 <<  0)	/* A: SSC Transmit Frame Sync 0 */
+-#define AT91_PB0_RTS3		(1 <<  0)	/* B: USART Ready To Send 3 */
+-#define AT91_PB1_TK0		(1 <<  1)	/* A: SSC Transmit Clock 0 */
+-#define AT91_PB1_CTS3		(1 <<  1)	/* B: USART Clear To Send 3 */
+-#define AT91_PB2_TD0		(1 <<  2)	/* A: SSC Transmit Data 0 */
+-#define AT91_PB2_SCK3		(1 <<  2)	/* B: USART Serial Clock 3 */
+-#define AT91_PB3_RD0		(1 <<  3)	/* A: SSC Receive Data 0 */
+-#define AT91_PB3_MCDA1		(1 <<  3)	/* B: MMC Multimedia Card A Data 1 */
+-#define AT91_PB4_RK0		(1 <<  4)	/* A: SSC Receive Clock 0 */
+-#define AT91_PB4_MCDA2		(1 <<  4)	/* B: MMC Multimedia Card A Data 2 */
+-#define AT91_PB5_RF0		(1 <<  5)	/* A: SSC Receive Frame Sync 0 */
+-#define AT91_PB5_MCDA3		(1 <<  5)	/* B: MMC Multimedia Card A Data 3 */
+-#define AT91_PB6_TF1		(1 <<  6)	/* A: SSC Transmit Frame Sync 1 */
+-#define AT91_PB6_TIOA3		(1 <<  6)	/* B: TC I/O Line A 3 */
+-#define AT91_PB7_TK1		(1 <<  7)	/* A: SSC Transmit Clock 1 */
+-#define AT91_PB7_TIOB3		(1 <<  7)	/* B: TC I/O Line B 3 */
+-#define AT91_PB8_TD1		(1 <<  8)	/* A: SSC Transmit Data 1 */
+-#define AT91_PB8_TIOA4		(1 <<  8)	/* B: TC I/O Line A 4 */
+-#define AT91_PB9_RD1		(1 <<  9)	/* A: SSC Receive Data 1 */
+-#define AT91_PB9_TIOB4		(1 <<  9)	/* B: TC I/O Line B 4 */
+-#define AT91_PB10_RK1		(1 << 10)	/* A: SSC Receive Clock 1 */
+-#define AT91_PB10_TIOA5		(1 << 10)	/* B: TC I/O Line A 5 */
+-#define AT91_PB11_RF1		(1 << 11)	/* A: SSC Receive Frame Sync 1 */
+-#define AT91_PB11_TIOB5		(1 << 11)	/* B: TC I/O Line B 5 */
+-#define AT91_PB12_TF2		(1 << 12)	/* A: SSC Transmit Frame Sync 2 */
+-#define AT91_PB12_ETX2		(1 << 12)	/* B: Ethernet Transmit Data 2 */
+-#define AT91_PB13_TK2		(1 << 13)	/* A: SSC Transmit Clock 3 */
+-#define AT91_PB13_ETX3		(1 << 13)	/* B: Ethernet Transmit Data 3 */
+-#define AT91_PB14_TD2		(1 << 14)	/* A: SSC Transmit Data 2 */
+-#define AT91_PB14_ETXER		(1 << 14)	/* B: Ethernet Transmit Coding Error */
+-#define AT91_PB15_RD2		(1 << 15)	/* A: SSC Receive Data 2 */
+-#define AT91_PB15_ERX2		(1 << 15)	/* B: Ethernet Receive Data 2 */
+-#define AT91_PB16_RK2		(1 << 16)	/* A: SSC Receive Clock 2 */
+-#define AT91_PB16_ERX3		(1 << 16)	/* B: Ethernet Receive Data 3 */
+-#define AT91_PB17_RF2		(1 << 17)	/* A: SSC Receive Frame Sync 2 */
+-#define AT91_PB17_ERXDV		(1 << 17)	/* B: Ethernet Receive Data Valid */
+-#define AT91_PB18_RI1		(1 << 18)	/* A: USART Ring Indicator 1 */
+-#define AT91_PB18_ECOL		(1 << 18)	/* B: Ethernet Collision Detected */
+-#define AT91_PB19_DTR1		(1 << 19)	/* A: USART Data Terminal Ready 1 */
+-#define AT91_PB19_ERXCK		(1 << 19)	/* B: Ethernet Receive Clock */
+-#define AT91_PB20_TXD1		(1 << 20)	/* A: USART Transmit Data 1 */
+-#define AT91_PB21_RXD1		(1 << 21)	/* A: USART Receive Data 1 */
+-#define AT91_PB22_SCK1		(1 << 22)	/* A: USART Serial Clock 1 */
+-#define AT91_PB23_DCD1		(1 << 23)	/* A: USART Data Carrier Detect 1 */
+-#define AT91_PB24_CTS1		(1 << 24)	/* A: USART Clear To Send 1 */
+-#define AT91_PB25_DSR1		(1 << 25)	/* A: USART Data Set Ready 1 */
+-#define AT91_PB25_EF100		(1 << 25)	/* B: Ethernet Force 100 Mbit */
+-#define AT91_PB26_RTS1		(1 << 26)	/* A: USART Ready To Send 1 */
+-#define AT91_PB27_PCK0		(1 << 27)	/* B: PMC Programmable Clock Output 0 */
+-#define AT91_PB28_FIQ		(1 << 28)	/* A: Fast Interrupt */
+-#define AT91_PB29_IRQ0		(1 << 29)	/* A: External Interrupt 0 */
+-
+-#define AT91_PC0_BFCK		(1 <<  0)	/* A: Burst Flash Clock */
+-#define AT91_PC1_BFRDY_SMOE	(1 <<  1)	/* A: Burst Flash Ready / SmartMedia Output Enable */
+-#define AT91_PC2_BFAVD		(1 <<  2)	/* A: Burst Flash Address Valid */
+-#define AT91_PC3_BFBAA_SMWE	(1 <<  3)	/* A: Burst Flash Address Advance / SmartMedia Write Enable */
+-#define AT91_PC4_BFOE		(1 <<  4)	/* A: Burst Flash Output Enable */
+-#define AT91_PC5_BFWE		(1 <<  5)	/* A: Burst Flash Write Enable */
+-#define AT91_PC6_NWAIT		(1 <<  6)	/* A: SMC Wait Signal */
+-#define AT91_PC7_A23		(1 <<  7)	/* A: Address Bus 23 */
+-#define AT91_PC8_A24		(1 <<  8)	/* A: Address Bus 24 */
+-#define AT91_PC9_A25_CFRNW	(1 <<  9)	/* A: Address Bus 25 / Compact Flash Read Not Write */
+-#define AT91_PC10_NCS4_CFCS	(1 << 10)	/* A: SMC Chip Select 4 / Compact Flash Chip Select */
+-#define AT91_PC11_NCS5_CFCE1	(1 << 11)	/* A: SMC Chip Select 5 / Compact Flash Chip Enable 1 */
+-#define AT91_PC12_NCS6_CFCE2	(1 << 12)	/* A: SMC Chip Select 6 / Compact Flash Chip Enable 2 */
+-#define AT91_PC13_NCS7		(1 << 13)	/* A: Chip Select 7 */
+-
+-#define AT91_PD0_ETX0		(1 <<  0)	/* A: Ethernet Transmit Data 0 */
+-#define AT91_PD1_ETX1		(1 <<  1)	/* A: Ethernet Transmit Data 1 */
+-#define AT91_PD2_ETX2		(1 <<  2)	/* A: Ethernet Transmit Data 2 */
+-#define AT91_PD3_ETX3		(1 <<  3)	/* A: Ethernet Transmit Data 3 */
+-#define AT91_PD4_ETXEN		(1 <<  4)	/* A: Ethernet Transmit Enable */
+-#define AT91_PD5_ETXER		(1 <<  5)	/* A: Ethernet Transmit Coding Error */
+-#define AT91_PD6_DTXD		(1 <<  6)	/* A: DBGU Transmit Data */
+-#define AT91_PD7_PCK0		(1 <<  7)	/* A: PMC Programmable Clock Output 0 */
+-#define AT91_PD7_TSYNC		(1 <<  7)	/* B: ETM Trace Synchronization Signal */
+-#define AT91_PD8_PCK1		(1 <<  8)	/* A: PMC Programmable Clock Output 1 */
+-#define AT91_PD8_TCLK		(1 <<  8)	/* B: ETM Trace Clock */
+-#define AT91_PD9_PCK2		(1 <<  9)	/* A: PMC Programmable Clock Output 2 */
+-#define AT91_PD9_TPS0		(1 <<  9)	/* B: ETM Trace ARM Pipeline Status 0 */
+-#define AT91_PD10_PCK3		(1 << 10)	/* A: PMC Programmable Clock Output 3 */
+-#define AT91_PD10_TPS1		(1 << 10)	/* B: ETM Trace ARM Pipeline Status 1 */
+-#define AT91_PD11_TPS2		(1 << 11)	/* B: ETM Trace ARM Pipeline Status 2 */
+-#define AT91_PD12_TPK0		(1 << 12)	/* B: ETM Trace Packet Port 0 */
+-#define AT91_PD13_TPK1		(1 << 13)	/* B: ETM Trace Packet Port 1 */
+-#define AT91_PD14_TPK2		(1 << 14)	/* B: ETM Trace Packet Port 2 */
+-#define AT91_PD15_TD0		(1 << 15)	/* A: SSC Transmit Data 0 */
+-#define AT91_PD15_TPK3		(1 << 15)	/* B: ETM Trace Packet Port 3 */
+-#define AT91_PD16_TD1		(1 << 16)	/* A: SSC Transmit Data 1 */
+-#define AT91_PD16_TPK4		(1 << 16)	/* B: ETM Trace Packet Port 4 */
+-#define AT91_PD17_TD2		(1 << 17)	/* A: SSC Transmit Data 2 */
+-#define AT91_PD17_TPK5		(1 << 17)	/* B: ETM Trace Packet Port 5 */
+-#define AT91_PD18_NPCS1		(1 << 18)	/* A: SPI Peripheral Chip Select 1 */
+-#define AT91_PD18_TPK6		(1 << 18)	/* B: ETM Trace Packet Port 6 */
+-#define AT91_PD19_NPCS2		(1 << 19)	/* A: SPI Peripheral Chip Select 2 */
+-#define AT91_PD19_TPK7		(1 << 19)	/* B: ETM Trace Packet Port 7 */
+-#define AT91_PD20_NPCS3		(1 << 20)	/* A: SPI Peripheral Chip Select 3 */
+-#define AT91_PD20_TPK8		(1 << 20)	/* B: ETM Trace Packet Port 8 */
+-#define AT91_PD21_RTS0		(1 << 21)	/* A: USART Ready To Send 0 */
+-#define AT91_PD21_TPK9		(1 << 21)	/* B: ETM Trace Packet Port 9 */
+-#define AT91_PD22_RTS1		(1 << 22)	/* A: USART Ready To Send 1 */
+-#define AT91_PD22_TPK10		(1 << 22)	/* B: ETM Trace Packet Port 10 */
+-#define AT91_PD23_RTS2		(1 << 23)	/* A: USART Ready To Send 2 */
+-#define AT91_PD23_TPK11		(1 << 23)	/* B: ETM Trace Packet Port 11 */
+-#define AT91_PD24_RTS3		(1 << 24)	/* A: USART Ready To Send 3 */
+-#define AT91_PD24_TPK12		(1 << 24)	/* B: ETM Trace Packet Port 12 */
+-#define AT91_PD25_DTR1		(1 << 25)	/* A: USART Data Terminal Ready 1 */
+-#define AT91_PD25_TPK13		(1 << 25)	/* B: ETM Trace Packet Port 13 */
+-#define AT91_PD26_TPK14		(1 << 26)	/* B: ETM Trace Packet Port 14 */
+-#define AT91_PD27_TPK15		(1 << 27)	/* B: ETM Trace Packet Port 15 */
+-#endif
+-
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9260.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9260.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260.h	Tue May  8 12:56:33 2007
+@@ -117,13 +117,4 @@
+ #define AT91SAM9XE_SRAM_BASE	0x00300000	/* Internal SRAM base address */
+ 
+ 
+-#if 0
+-/*
+- * PIO pin definitions (peripheral A/B multiplexing).
+- */
+-
+-// TODO: Add
+-
+-#endif
+-
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9260_matrix.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260_matrix.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9260_matrix.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9260_matrix.h	Fri May 11 16:20:33 2007
+@@ -67,7 +67,7 @@
+ #define		AT91_MATRIX_CS4A		(1 << 4)	/* Chip Select 4 Assignment */
+ #define			AT91_MATRIX_CS4A_SMC		(0 << 4)
+ #define			AT91_MATRIX_CS4A_SMC_CF1	(1 << 4)
+-#define		AT91_MATRIX_CS5A		(1 << 5 )	/* Chip Select 5 Assignment */
++#define		AT91_MATRIX_CS5A		(1 << 5)	/* Chip Select 5 Assignment */
+ #define			AT91_MATRIX_CS5A_SMC		(0 << 5)
+ #define			AT91_MATRIX_CS5A_SMC_CF2	(1 << 5)
+ #define		AT91_MATRIX_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9261.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9261.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9261.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9261.h	Tue May  8 12:56:33 2007
+@@ -98,195 +98,4 @@
+ #define AT91SAM9261_LCDC_BASE	0x00600000	/* LDC controller */
+ 
+ 
+-#if 0
+-/*
+- * PIO pin definitions (peripheral A/B multiplexing).
+- */
+-#define AT91_PA0_SPI0_MISO	(1 <<  0)	/* A: SPI0 Master In Slave */
+-#define AT91_PA0_MCDA0		(1 <<  0)	/* B: Multimedia Card A Data 0 */
+-#define AT91_PA1_SPI0_MOSI	(1 <<  1)	/* A: SPI0 Master Out Slave */
+-#define AT91_PA1_MCCDA		(1 <<  1)	/* B: Multimedia Card A Command */
+-#define AT91_PA2_SPI0_SPCK	(1 <<  2)	/* A: SPI0 Serial Clock */
+-#define AT91_PA2_MCCK		(1 <<  2)	/* B: Multimedia Card Clock */
+-#define AT91_PA3_SPI0_NPCS0	(1 <<  3)	/* A: SPI0 Peripheral Chip Select 0 */
+-#define AT91_PA4_SPI0_NPCS1	(1 <<  4)	/* A: SPI0 Peripheral Chip Select 1 */
+-#define AT91_PA4_MCDA1		(1 <<  4)	/* B: Multimedia Card A Data 1 */
+-#define AT91_PA5_SPI0_NPCS2	(1 <<  5)	/* A: SPI0 Peripheral Chip Select 2 */
+-#define AT91_PA5_MCDA2		(1 <<  5)	/* B: Multimedia Card A Data 2 */
+-#define AT91_PA6_SPI0_NPCS3	(1 <<  6)	/* A: SPI0 Peripheral Chip Select 3 */
+-#define AT91_PA6_MCDA3		(1 <<  6)	/* B: Multimedia Card A Data 3 */
+-#define AT91_PA7_TWD		(1 <<  7)	/* A: TWI Two-wire Serial Data */
+-#define AT91_PA7_PCK0		(1 <<  7)	/* B: PMC Programmable clock Output 0 */
+-#define AT91_PA8_TWCK		(1 <<  8)	/* A: TWI Two-wire Serial Clock */
+-#define AT91_PA8_PCK1		(1 <<  8)	/* B: PMC Programmable clock Output 1 */
+-#define AT91_PA9_DRXD		(1 <<  9)	/* A: DBGU Debug Receive Data */
+-#define AT91_PA9_PCK2		(1 <<  9)	/* B: PMC Programmable clock Output 2 */
+-#define AT91_PA10_DTXD		(1 << 10)	/* A: DBGU Debug Transmit Data */
+-#define AT91_PA10_PCK3		(1 << 10)	/* B: PMC Programmable clock Output 3 */
+-#define AT91_PA11_TSYNC		(1 << 11)	/* A: Trace Synchronization Signal */
+-#define AT91_PA11_SCK1		(1 << 11)	/* B: USART1 Serial Clock */
+-#define AT91_PA12_TCLK		(1 << 12)	/* A: Trace Clock */
+-#define AT91_PA12_RTS1		(1 << 12)	/* B: USART1 Ready To Send */
+-#define AT91_PA13_TPS0		(1 << 13)	/* A: Trace ARM Pipeline Status 0 */
+-#define AT91_PA13_CTS1		(1 << 13)	/* B: USART1 Clear To Send */
+-#define AT91_PA14_TPS1		(1 << 14)	/* A: Trace ARM Pipeline Status 1 */
+-#define AT91_PA14_SCK2		(1 << 14)	/* B: USART2 Serial Clock */
+-#define AT91_PA15_TPS2		(1 << 15)	/* A: Trace ARM Pipeline Status 2 */
+-#define AT91_PA15_RTS2		(1 << 15)	/* B: USART2 Ready To Send */
+-#define AT91_PA16_TPK0		(1 << 16)	/* A: Trace Packet Port 0 */
+-#define AT91_PA16_CTS2		(1 << 16)	/* B: USART2 Clear To Send */
+-#define AT91_PA17_TPK1		(1 << 17)	/* A: Trace Packet Port 1 */
+-#define AT91_PA17_TF1		(1 << 17)	/* B: SSC1 Transmit Frame Sync */
+-#define AT91_PA18_TPK2		(1 << 18)	/* A: Trace Packet Port 2 */
+-#define AT91_PA18_TK1		(1 << 18)	/* B: SSC1 Transmit Clock */
+-#define AT91_PA19_TPK3		(1 << 19)	/* A: Trace Packet Port 3 */
+-#define AT91_PA19_TD1		(1 << 19)	/* B: SSC1 Transmit Data */
+-#define AT91_PA20_TPK4		(1 << 20)	/* A: Trace Packet Port 4 */
+-#define AT91_PA20_RD1		(1 << 20)	/* B: SSC1 Receive Data */
+-#define AT91_PA21_TPK5		(1 << 21)	/* A: Trace Packet Port 5 */
+-#define AT91_PA21_RK1		(1 << 21)	/* B: SSC1 Receive Clock */
+-#define AT91_PA22_TPK6		(1 << 22)	/* A: Trace Packet Port 6 */
+-#define AT91_PA22_RF1		(1 << 22)	/* B: SSC1 Receive Frame Sync */
+-#define AT91_PA23_TPK7		(1 << 23)	/* A: Trace Packet Port 7 */
+-#define AT91_PA23_RTS0		(1 << 23)	/* B: USART0 Ready To Send */
+-#define AT91_PA24_TPK8		(1 << 24)	/* A: Trace Packet Port 8 */
+-#define AT91_PA24_SPI1_NPCS1	(1 << 24)	/* B: SPI1 Peripheral Chip Select 1 */
+-#define AT91_PA25_TPK9		(1 << 25)	/* A: Trace Packet Port 9 */
+-#define AT91_PA25_SPI1_NPCS2	(1 << 25)	/* B: SPI1 Peripheral Chip Select 2 */
+-#define AT91_PA26_TPK10		(1 << 26)	/* A: Trace Packet Port 10 */
+-#define AT91_PA26_SPI1_NPCS3	(1 << 26)	/* B: SPI1 Peripheral Chip Select 3 */
+-#define AT91_PA27_TPK11		(1 << 27)	/* A: Trace Packet Port 11 */
+-#define AT91_PA27_SPI0_NPCS1	(1 << 27)	/* B: SPI0 Peripheral Chip Select 1 */
+-#define AT91_PA28_TPK12		(1 << 28)	/* A: Trace Packet Port 12 */
+-#define AT91_PA28_SPI0_NPCS2	(1 << 28)	/* B: SPI0 Peripheral Chip Select 2 */
+-#define AT91_PA29_TPK13		(1 << 29)	/* A: Trace Packet Port 13 */
+-#define AT91_PA29_SPI0_NPCS3	(1 << 29)	/* B: SPI0 Peripheral Chip Select 3 */
+-#define AT91_PA30_TPK14		(1 << 30)	/* A: Trace Packet Port 14 */
+-#define AT91_PA30_A23		(1 << 30)	/* B: Address Bus bit 23 */
+-#define AT91_PA31_TPK15		(1 << 31)	/* A: Trace Packet Port 15 */
+-#define AT91_PA31_A24		(1 << 31)	/* B: Address Bus bit 24 */
+-
+-#define AT91_PB0_LCDVSYNC	(1 <<  0)	/* A: LCD Vertical Synchronization */
+-#define AT91_PB1_LCDHSYNC	(1 <<  1)	/* A: LCD Horizontal Synchronization */
+-#define AT91_PB2_LCDDOTCK	(1 <<  2)	/* A: LCD Dot Clock */
+-#define AT91_PB2_PCK0		(1 <<  2)	/* B: PMC Programmable clock Output 0 */
+-#define AT91_PB3_LCDDEN		(1 <<  3)	/* A: LCD Data Enable */
+-#define AT91_PB4_LCDCC		(1 <<  4)	/* A: LCD Contrast Control */
+-#define AT91_PB4_LCDD2		(1 <<  4)	/* B: LCD Data Bus Bit 2 */
+-#define AT91_PB5_LCDD0		(1 <<  5)	/* A: LCD Data Bus Bit 0 */
+-#define AT91_PB5_LCDD3		(1 <<  5)	/* B: LCD Data Bus Bit 3 */
+-#define AT91_PB6_LCDD1		(1 <<  6)	/* A: LCD Data Bus Bit 1 */
+-#define AT91_PB6_LCDD4		(1 <<  6)	/* B: LCD Data Bus Bit 4 */
+-#define AT91_PB7_LCDD2		(1 <<  7)	/* A: LCD Data Bus Bit 2 */
+-#define AT91_PB7_LCDD5		(1 <<  7)	/* B: LCD Data Bus Bit 5 */
+-#define AT91_PB8_LCDD3		(1 <<  8)	/* A: LCD Data Bus Bit 3 */
+-#define AT91_PB8_LCDD6		(1 <<  8)	/* B: LCD Data Bus Bit 6 */
+-#define AT91_PB9_LCDD4		(1 <<  9)	/* A: LCD Data Bus Bit 4 */
+-#define AT91_PB9_LCDD7		(1 <<  9)	/* B: LCD Data Bus Bit 7 */
+-#define AT91_PB10_LCDD5		(1 << 10)	/* A: LCD Data Bus Bit 5 */
+-#define AT91_PB10_LCDD10	(1 << 10)	/* B: LCD Data Bus Bit 10 */
+-#define AT91_PB11_LCDD6		(1 << 11)	/* A: LCD Data Bus Bit 6 */
+-#define AT91_PB11_LCDD11	(1 << 11)	/* B: LCD Data Bus Bit 11 */
+-#define AT91_PB12_LCDD7		(1 << 12)	/* A: LCD Data Bus Bit 7 */
+-#define AT91_PB12_LCDD12	(1 << 12)	/* B: LCD Data Bus Bit 12 */
+-#define AT91_PB13_LCDD8		(1 << 13)	/* A: LCD Data Bus Bit 8 */
+-#define AT91_PB13_LCDD13	(1 << 13)	/* B: LCD Data Bus Bit 13 */
+-#define AT91_PB14_LCDD9		(1 << 14)	/* A: LCD Data Bus Bit 9 */
+-#define AT91_PB14_LCDD14	(1 << 14)	/* B: LCD Data Bus Bit 14 */
+-#define AT91_PB15_LCDD10	(1 << 15)	/* A: LCD Data Bus Bit 10 */
+-#define AT91_PB15_LCDD15	(1 << 15)	/* B: LCD Data Bus Bit 15 */
+-#define AT91_PB16_LCDD11	(1 << 16)	/* A: LCD Data Bus Bit 11 */
+-#define AT91_PB16_LCDD19	(1 << 16)	/* B: LCD Data Bus Bit 19 */
+-#define AT91_PB17_LCDD12	(1 << 17)	/* A: LCD Data Bus Bit 12 */
+-#define AT91_PB17_LCDD20	(1 << 17)	/* B: LCD Data Bus Bit 20 */
+-#define AT91_PB18_LCDD13	(1 << 18)	/* A: LCD Data Bus Bit 13 */
+-#define AT91_PB18_LCDD21	(1 << 18)	/* B: LCD Data Bus Bit 21 */
+-#define AT91_PB19_LCDD14	(1 << 19)	/* A: LCD Data Bus Bit 14 */
+-#define AT91_PB19_LCDD22	(1 << 19)	/* B: LCD Data Bus Bit 22 */
+-#define AT91_PB20_LCDD15	(1 << 20)	/* A: LCD Data Bus Bit 15 */
+-#define AT91_PB20_LCDD23	(1 << 20)	/* B: LCD Data Bus Bit 23 */
+-#define AT91_PB21_TF0		(1 << 21)	/* A: SSC0 Transmit Frame Sync */
+-#define AT91_PB21_LCDD16	(1 << 21)	/* B: LCD Data Bus Bit 16 */
+-#define AT91_PB22_TK0		(1 << 22)	/* A: SSC0 Transmit Clock */
+-#define AT91_PB22_LCDD17	(1 << 22)	/* B: LCD Data Bus Bit 17 */
+-#define AT91_PB23_TD0		(1 << 23)	/* A: SSC0 Transmit Data */
+-#define AT91_PB23_LCDD18	(1 << 23)	/* B: LCD Data Bus Bit 18 */
+-#define AT91_PB24_RD0		(1 << 24)	/* A: SSC0 Receive Data */
+-#define AT91_PB24_LCDD19	(1 << 24)	/* B: LCD Data Bus Bit 19 */
+-#define AT91_PB25_RK0		(1 << 25)	/* A: SSC0 Receive Clock */
+-#define AT91_PB25_LCDD20	(1 << 25)	/* B: LCD Data Bus Bit 20 */
+-#define AT91_PB26_RF0		(1 << 26)	/* A: SSC0 Receive Frame Sync */
+-#define AT91_PB26_LCDD21	(1 << 26)	/* B: LCD Data Bus Bit 21 */
+-#define AT91_PB27_SPI1_NPCS1	(1 << 27)	/* A: SPI1 Peripheral Chip Select 1 */
+-#define AT91_PB27_LCDD22	(1 << 27)	/* B: LCD Data Bus Bit 22 */
+-#define AT91_PB28_SPI1_NPCS0	(1 << 28)	/* A: SPI1 Peripheral Chip Select 0 */
+-#define AT91_PB28_LCDD23	(1 << 28)	/* B: LCD Data Bus Bit 23 */
+-#define AT91_PB29_SPI1_SPCK	(1 << 29)	/* A: SPI1 Serial Clock */
+-#define AT91_PB29_IRQ2		(1 << 29)	/* B: Interrupt input 2 */
+-#define AT91_PB30_SPI1_MISO	(1 << 30)	/* A: SPI1 Master In Slave */
+-#define AT91_PB30_IRQ1		(1 << 30)	/* B: Interrupt input 1 */
+-#define AT91_PB31_SPI1_MOSI	(1 << 31)	/* A: SPI1 Master Out Slave */
+-#define AT91_PB31_PCK2		(1 << 31)	/* B: PMC Programmable clock Output 2 */
+-
+-#define AT91_PC0_SMOE		(1 << 0)	/* A: SmartMedia Output Enable */
+-#define AT91_PC0_NCS6		(1 << 0)	/* B: Chip Select 6 */
+-#define AT91_PC1_SMWE		(1 << 1)	/* A: SmartMedia Write Enable */
+-#define AT91_PC1_NCS7		(1 << 1)	/* B: Chip Select 7 */
+-#define AT91_PC2_NWAIT		(1 << 2)	/* A: NWAIT */
+-#define AT91_PC2_IRQ0		(1 << 2)	/* B: Interrupt input 0 */
+-#define AT91_PC3_A25_CFRNW	(1 << 3)	/* A: Address Bus[25] / Compact Flash Read Not Write */
+-#define AT91_PC4_NCS4_CFCS0	(1 << 4)	/* A: Chip Select 4 / CompactFlash Chip Select 0 */
+-#define AT91_PC5_NCS5_CFCS1	(1 << 5)	/* A: Chip Select 5 / CompactFlash Chip Select 1 */
+-#define AT91_PC6_CFCE1		(1 << 6)	/* A: CompactFlash Chip Enable 1 */
+-#define AT91_PC7_CFCE2		(1 << 7)	/* A: CompactFlash Chip Enable 2 */
+-#define AT91_PC8_TXD0		(1 << 8)	/* A: USART0 Transmit Data */
+-#define AT91_PC8_PCK2		(1 << 8)	/* B: PMC Programmable clock Output 2 */
+-#define AT91_PC9_RXD0		(1 << 9)	/* A: USART0 Receive Data */
+-#define AT91_PC9_PCK3		(1 << 9)	/* B: PMC Programmable clock Output 3 */
+-#define AT91_PC10_RTS0		(1 << 10)	/* A: USART0 Ready To Send */
+-#define AT91_PC10_SCK0		(1 << 10)	/* B: USART0 Serial Clock */
+-#define AT91_PC11_CTS0		(1 << 11)	/* A: USART0 Clear To Send */
+-#define AT91_PC11_FIQ		(1 << 11)	/* B: AIC Fast Interrupt Input */
+-#define AT91_PC12_TXD1		(1 << 12)	/* A: USART1 Transmit Data */
+-#define AT91_PC12_NCS6		(1 << 12)	/* B: Chip Select 6 */
+-#define AT91_PC13_RXD1		(1 << 13)	/* A: USART1 Receive Data */
+-#define AT91_PC13_NCS7		(1 << 13)	/* B: Chip Select 7 */
+-#define AT91_PC14_TXD2		(1 << 14)	/* A: USART2 Transmit Data */
+-#define AT91_PC14_SPI1_NPCS2	(1 << 14)	/* B: SPI1 Peripheral Chip Select 2 */
+-#define AT91_PC15_RXD2		(1 << 15)	/* A: USART2 Receive Data */
+-#define AT91_PC15_SPI1_NPCS3	(1 << 15)	/* B: SPI1 Peripheral Chip Select 3 */
+-#define AT91_PC16_D16		(1 << 16)	/* A: Data Bus [16] */
+-#define AT91_PC16_TCLK0		(1 << 16)	/* B: Timer Counter 0 external clock input */
+-#define AT91_PC17_D17		(1 << 17)	/* A: Data Bus [17] */
+-#define AT91_PC17_TCLK1		(1 << 17)	/* B: Timer Counter 1 external clock input */
+-#define AT91_PC18_D18		(1 << 18)	/* A: Data Bus [18] */
+-#define AT91_PC18_TCLK2		(1 << 18)	/* B: Timer Counter 2 external clock input */
+-#define AT91_PC19_D19		(1 << 19)	/* A: Data Bus [19] */
+-#define AT91_PC19_TIOA0		(1 << 19)	/* B: Timer Counter 0 Multipurpose Timer I/O Pin A */
+-#define AT91_PC20_D20		(1 << 20)	/* A: Data Bus [20] */
+-#define AT91_PC20_TIOB0		(1 << 20)	/* B: Timer Counter 0 Multipurpose Timer I/O Pin B */
+-#define AT91_PC21_D21		(1 << 21)	/* A: Data Bus [21] */
+-#define AT91_PC21_TIOA1		(1 << 21)	/* B: Timer Counter 1 Multipurpose Timer I/O Pin A */
+-#define AT91_PC22_D22		(1 << 22)	/* A: Data Bus [22] */
+-#define AT91_PC22_TIOB1		(1 << 22)	/* B: Timer Counter 1 Multipurpose Timer I/O Pin B */
+-#define AT91_PC23_D23		(1 << 23)	/* A: Data Bus [23] */
+-#define AT91_PC23_TIOA2		(1 << 23)	/* B: Timer Counter 2 Multipurpose Timer I/O Pin A */
+-#define AT91_PC24_D24		(1 << 24)	/* A: Data Bus [24] */
+-#define AT91_PC24_TIOB2		(1 << 24)	/* B: Timer Counter 2 Multipurpose Timer I/O Pin B */
+-#define AT91_PC25_D25		(1 << 25)	/* A: Data Bus [25] */
+-#define AT91_PC25_TF2		(1 << 25)	/* B: SSC2 Transmit Frame Sync */
+-#define AT91_PC26_D26		(1 << 26)	/* A: Data Bus [26] */
+-#define AT91_PC26_TK2		(1 << 26)	/* B: SSC2 Transmit Clock */
+-#define AT91_PC27_D27		(1 << 27)	/* A: Data Bus [27] */
+-#define AT91_PC27_TD2		(1 << 27)	/* B: SSC2 Transmit Data */
+-#define AT91_PC28_D28		(1 << 28)	/* A: Data Bus [28] */
+-#define AT91_PC28_RD2		(1 << 28)	/* B: SSC2 Receive Data */
+-#define AT91_PC29_D29		(1 << 29)	/* A: Data Bus [29] */
+-#define AT91_PC29_RK2		(1 << 29)	/* B: SSC2 Receive Clock */
+-#define AT91_PC30_D30		(1 << 30)	/* A: Data Bus [30] */
+-#define AT91_PC30_RF2		(1 << 30)	/* B: SSC2 Receive Frame Sync */
+-#define AT91_PC31_D31		(1 << 31)	/* A: Data Bus [31] */
+-#define AT91_PC31_PCK1		(1 << 31)	/* B: PMC Programmable clock Output 1 */
+-#endif
+-
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9263.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9263.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9263.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9263.h	Tue May  8 12:56:33 2007
+@@ -119,13 +119,5 @@
+ #define AT91SAM9263_DMAC_BASE	0x00800000	/* DMA Controller */
+ #define AT91SAM9263_UHP_BASE	0x00a00000	/* USB Host controller */
+ 
+-#if 0
+-/*
+- * PIO pin definitions (peripheral A/B multiplexing).
+- */
+-
+-// TODO: Add
+-
+-#endif
+ 
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl.h	Fri May 11 14:53:48 2007
+@@ -0,0 +1,110 @@
++/*
++ * include/asm-arm/arch-at91/at91sam9260.h
++ *
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * Common definitions.
++ * Based on AT91SAM9RL datasheet revision A. (Preliminary)
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#ifndef AT91SAM9RL_H
++#define AT91SAM9RL_H
++
++/*
++ * Peripheral identifiers/interrupts.
++ */
++#define AT91_ID_FIQ		0	/* Advanced Interrupt Controller (FIQ) */
++#define AT91_ID_SYS		1	/* System Controller */
++#define AT91SAM9RL_ID_PIOA	2	/* Parallel IO Controller A */
++#define AT91SAM9RL_ID_PIOB	3	/* Parallel IO Controller B */
++#define AT91SAM9RL_ID_PIOC	4	/* Parallel IO Controller C */
++#define AT91SAM9RL_ID_PIOD	5	/* Parallel IO Controller D */
++#define AT91SAM9RL_ID_US0	6	/* USART 0 */
++#define AT91SAM9RL_ID_US1	7	/* USART 1 */
++#define AT91SAM9RL_ID_US2	8	/* USART 2 */
++#define AT91SAM9RL_ID_US3	9	/* USART 3 */
++#define AT91SAM9RL_ID_MCI	10	/* Multimedia Card Interface */
++#define AT91SAM9RL_ID_TWI0	11	/* TWI 0 */
++#define AT91SAM9RL_ID_TWI1	12	/* TWI 1 */
++#define AT91SAM9RL_ID_SPI	13	/* Serial Peripheral Interface */
++#define AT91SAM9RL_ID_SSC0	14	/* Serial Synchronous Controller 0 */
++#define AT91SAM9RL_ID_SSC1	15	/* Serial Synchronous Controller 1 */
++#define AT91SAM9RL_ID_TC0	16	/* Timer Counter 0 */
++#define AT91SAM9RL_ID_TC1	17	/* Timer Counter 1 */
++#define AT91SAM9RL_ID_TC2	18	/* Timer Counter 2 */
++#define AT91SAM9RL_ID_PWMC	19	/* Pulse Width Modulation Controller */
++#define AT91SAM9RL_ID_TSC	20	/* Touch Screen Controller */
++#define AT91SAM9RL_ID_DMA	21	/* DMA Controller */
++#define AT91SAM9RL_ID_UDPHS	22	/* USB Device HS */
++#define AT91SAM9RL_ID_LCDC	23	/* LCD Controller */
++#define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
++#define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) */
++
++
++/*
++ * User Peripheral physical base addresses.
++ */
++#define AT91SAM9RL_BASE_TCB0	0xfffa0000
++#define AT91SAM9RL_BASE_TC0	0xfffa0000
++#define AT91SAM9RL_BASE_TC1	0xfffa0040
++#define AT91SAM9RL_BASE_TC2	0xfffa0080
++#define AT91SAM9RL_BASE_MCI	0xfffa4000
++#define AT91SAM9RL_BASE_TWI0	0xfffa8000
++#define AT91SAM9RL_BASE_TWI1	0xfffac000
++#define AT91SAM9RL_BASE_US0	0xfffb0000
++#define AT91SAM9RL_BASE_US1	0xfffb4000
++#define AT91SAM9RL_BASE_US2	0xfffb8000
++#define AT91SAM9RL_BASE_US3	0xfffbc000
++#define AT91SAM9RL_BASE_SSC0	0xfffc0000
++#define AT91SAM9RL_BASE_SSC1	0xfffc4000
++#define AT91SAM9RL_BASE_PWMC	0xfffc8000
++#define AT91SAM9RL_BASE_SPI	0xfffcc000
++#define AT91SAM9RL_BASE_TSC	0xfffd0000
++#define AT91SAM9RL_BASE_UDPHS	0xfffd4000
++#define AT91SAM9RL_BASE_AC97C	0xfffd8000
++#define AT91_BASE_SYS		0xffffc000
++
++
++/*
++ * System Peripherals (offset from AT91_BASE_SYS)
++ */
++#define AT91_DMA	(0xffffe600 - AT91_BASE_SYS)
++#define AT91_ECC	(0xffffe800 - AT91_BASE_SYS)
++#define AT91_SDRAMC	(0xffffea00 - AT91_BASE_SYS)
++#define AT91_SMC	(0xffffec00 - AT91_BASE_SYS)
++#define AT91_MATRIX	(0xffffee00 - AT91_BASE_SYS)
++#define AT91_CCFG	(0xffffef10 - AT91_BASE_SYS)
++#define AT91_AIC	(0xfffff000 - AT91_BASE_SYS)
++#define AT91_DBGU	(0xfffff200 - AT91_BASE_SYS)
++#define AT91_PIOA	(0xfffff400 - AT91_BASE_SYS)
++#define AT91_PIOB	(0xfffff600 - AT91_BASE_SYS)
++#define AT91_PIOC	(0xfffff800 - AT91_BASE_SYS)
++#define AT91_PIOD	(0xfffffa00 - AT91_BASE_SYS)
++#define AT91_PMC	(0xfffffc00 - AT91_BASE_SYS)
++#define AT91_RSTC	(0xfffffd00 - AT91_BASE_SYS)
++#define AT91_SHDWC	(0xfffffd10 - AT91_BASE_SYS)
++#define AT91_RTT	(0xfffffd20 - AT91_BASE_SYS)
++#define AT91_PIT	(0xfffffd30 - AT91_BASE_SYS)
++#define AT91_WDT	(0xfffffd40 - AT91_BASE_SYS)
++#define AT91_SCKCR	(0xfffffd50 - AT91_BASE_SYS)
++#define AT91_GPBR	(0xfffffd60 - AT91_BASE_SYS)
++#define AT91_RTC	(0xfffffe00 - AT91_BASE_SYS)
++
++
++/*
++ * Internal Memory.
++ */
++#define AT91SAM9RL_SRAM_BASE	0x00300000	/* Internal SRAM base address */
++#define AT91SAM9RL_SRAM_SIZE	SZ_16K		/* Internal SRAM size (16Kb) */
++
++#define AT91SAM9RL_ROM_BASE	0x00400000	/* Internal ROM base address */
++#define AT91SAM9RL_ROM_SIZE	(2 * SZ_16K)	/* Internal ROM size (32Kb) */
++
++#define AT91SAM9RL_LCDC_BASE	0x00500000	/* LCD Controller */
++#define AT91SAM9RL_UDPHS_BASE	0x00600000	/* USB Device HS controller */
++
++#endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl_matrix.h linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl_matrix.h
+--- linux-2.6.21/include/asm-arm/arch-at91/at91sam9rl_matrix.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/include/asm-arm/arch-at91/at91sam9rl_matrix.h	Fri May 11 16:18:45 2007
+@@ -0,0 +1,96 @@
++/*
++ * include/asm-arm/arch-at91/at91sam9rl_matrix.h
++ *
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * Memory Controllers (MATRIX, EBI) - System peripherals registers.
++ * Based on AT91SAM9RL datasheet revision A. (Preliminary)
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License.  See the file COPYING in the main directory of this archive for
++ * more details.
++ */
++
++#ifndef AT91SAM9RL_MATRIX_H
++#define AT91SAM9RL_MATRIX_H
++
++#define AT91_MATRIX_MCFG0	(AT91_MATRIX + 0x00)	/* Master Configuration Register 0 */
++#define AT91_MATRIX_MCFG1	(AT91_MATRIX + 0x04)	/* Master Configuration Register 1 */
++#define AT91_MATRIX_MCFG2	(AT91_MATRIX + 0x08)	/* Master Configuration Register 2 */
++#define AT91_MATRIX_MCFG3	(AT91_MATRIX + 0x0C)	/* Master Configuration Register 3 */
++#define AT91_MATRIX_MCFG4	(AT91_MATRIX + 0x10)	/* Master Configuration Register 4 */
++#define AT91_MATRIX_MCFG5	(AT91_MATRIX + 0x14)	/* Master Configuration Register 5 */
++#define		AT91_MATRIX_ULBT	(7 << 0)	/* Undefined Length Burst Type */
++#define			AT91_MATRIX_ULBT_INFINITE	(0 << 0)
++#define			AT91_MATRIX_ULBT_SINGLE		(1 << 0)
++#define			AT91_MATRIX_ULBT_FOUR		(2 << 0)
++#define			AT91_MATRIX_ULBT_EIGHT		(3 << 0)
++#define			AT91_MATRIX_ULBT_SIXTEEN	(4 << 0)
++
++#define AT91_MATRIX_SCFG0	(AT91_MATRIX + 0x40)	/* Slave Configuration Register 0 */
++#define AT91_MATRIX_SCFG1	(AT91_MATRIX + 0x44)	/* Slave Configuration Register 1 */
++#define AT91_MATRIX_SCFG2	(AT91_MATRIX + 0x48)	/* Slave Configuration Register 2 */
++#define AT91_MATRIX_SCFG3	(AT91_MATRIX + 0x4C)	/* Slave Configuration Register 3 */
++#define AT91_MATRIX_SCFG4	(AT91_MATRIX + 0x50)	/* Slave Configuration Register 4 */
++#define AT91_MATRIX_SCFG5	(AT91_MATRIX + 0x54)	/* Slave Configuration Register 5 */
++#define		AT91_MATRIX_SLOT_CYCLE		(0xff << 0)	/* Maximum Number of Allowed Cycles for a Burst */
++#define		AT91_MATRIX_DEFMSTR_TYPE	(3    << 16)	/* Default Master Type */
++#define			AT91_MATRIX_DEFMSTR_TYPE_NONE	(0 << 16)
++#define			AT91_MATRIX_DEFMSTR_TYPE_LAST	(1 << 16)
++#define			AT91_MATRIX_DEFMSTR_TYPE_FIXED	(2 << 16)
++#define		AT91_MATRIX_FIXED_DEFMSTR	(7    << 18)	/* Fixed Index of Default Master */
++#define		AT91_MATRIX_ARBT		(3    << 24)	/* Arbitration Type */
++#define			AT91_MATRIX_ARBT_ROUND_ROBIN	(0 << 24)
++#define			AT91_MATRIX_ARBT_FIXED_PRIORITY	(1 << 24)
++
++#define AT91_MATRIX_PRAS0	(AT91_MATRIX + 0x80)	/* Priority Register A for Slave 0 */
++#define AT91_MATRIX_PRAS1	(AT91_MATRIX + 0x88)	/* Priority Register A for Slave 1 */
++#define AT91_MATRIX_PRAS2	(AT91_MATRIX + 0x90)	/* Priority Register A for Slave 2 */
++#define AT91_MATRIX_PRAS3	(AT91_MATRIX + 0x98)	/* Priority Register A for Slave 3 */
++#define AT91_MATRIX_PRAS4	(AT91_MATRIX + 0xA0)	/* Priority Register A for Slave 4 */
++#define AT91_MATRIX_PRAS5	(AT91_MATRIX + 0xA8)	/* Priority Register A for Slave 5 */
++#define		AT91_MATRIX_M0PR		(3 << 0)	/* Master 0 Priority */
++#define		AT91_MATRIX_M1PR		(3 << 4)	/* Master 1 Priority */
++#define		AT91_MATRIX_M2PR		(3 << 8)	/* Master 2 Priority */
++#define		AT91_MATRIX_M3PR		(3 << 12)	/* Master 3 Priority */
++#define		AT91_MATRIX_M4PR		(3 << 16)	/* Master 4 Priority */
++#define		AT91_MATRIX_M5PR		(3 << 20)	/* Master 5 Priority */
++
++#define AT91_MATRIX_MRCR	(AT91_MATRIX + 0x100)	/* Master Remap Control Register */
++#define		AT91_MATRIX_RCB0		(1 << 0)	/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
++#define		AT91_MATRIX_RCB1		(1 << 1)	/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
++#define		AT91_MATRIX_RCB2		(1 << 2)
++#define		AT91_MATRIX_RCB3		(1 << 3)
++#define		AT91_MATRIX_RCB4		(1 << 4)
++#define		AT91_MATRIX_RCB5		(1 << 5)
++
++#define AT91_MATRIX_TCMR	(AT91_MATRIX + 0x114)	/* TCM Configuration Register */
++#define		AT91_MATRIX_ITCM_SIZE		(0xf << 0)	/* Size of ITCM enabled memory block */
++#define			AT91_MATRIX_ITCM_0		(0 << 0)
++#define			AT91_MATRIX_ITCM_16		(5 << 0)
++#define			AT91_MATRIX_ITCM_32		(6 << 0)
++#define		AT91_MATRIX_DTCM_SIZE		(0xf << 4)	/* Size of DTCM enabled memory block */
++#define			AT91_MATRIX_DTCM_0		(0 << 4)
++#define			AT91_MATRIX_DTCM_16		(5 << 4)
++#define			AT91_MATRIX_DTCM_32		(6 << 4)
++
++#define AT91_MATRIX_EBICSA	(AT91_MATRIX + 0x120)	/* EBI0 Chip Select Assignment Register */
++#define		AT91_MATRIX_CS1A		(1 << 1)	/* Chip Select 1 Assignment */
++#define			AT91_MATRIX_CS1A_SMC		(0 << 1)
++#define			AT91_MATRIX_CS1A_SDRAMC		(1 << 1)
++#define		AT91_MATRIX_CS3A		(1 << 3)	/* Chip Select 3 Assignment */
++#define			AT91_MATRIX_CS3A_SMC		(0 << 3)
++#define			AT91_MATRIX_CS3A_SMC_SMARTMEDIA	(1 << 3)
++#define		AT91_MATRIX_CS4A		(1 << 4)	/* Chip Select 4 Assignment */
++#define			AT91_MATRIX_CS4A_SMC		(0 << 4)
++#define			AT91_MATRIX_CS4A_SMC_CF1	(1 << 4)
++#define		AT91_MATRIX_CS5A		(1 << 5)	/* Chip Select 5 Assignment */
++#define			AT91_MATRIX_CS5A_SMC		(0 << 5)
++#define			AT91_MATRIX_CS5A_SMC_CF2	(1 << 5)
++#define		AT91_MATRIX_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
++#define		AT91_MATRIX_VDDIOMSEL		(1 << 16)	/* Memory voltage selection */
++#define			AT91_MATRIX_VDDIOMSEL_1_8V	(0 << 16)
++#define			AT91_MATRIX_VDDIOMSEL_3_3V	(1 << 16)
++
++
++#endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/board.h linux-2.6-stable/include/asm-arm/arch-at91/board.h
+--- linux-2.6.21/include/asm-arm/arch-at91/board.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/board.h	Thu May 10 12:21:10 2007
+@@ -62,7 +62,7 @@
+ };
+ extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data);
+ 
+- /* Ethernet */
++ /* Ethernet (EMAC & MACB) */
+ struct at91_eth_data {
+ 	u8		phy_irq_pin;	/* PHY IRQ */
+ 	u8		is_rmii;	/* using RMII interface? */
+@@ -114,9 +114,31 @@
+ };
+ extern void __init at91_add_device_serial(void);
+ 
++ /* LCD Controller */
++struct atmel_lcdfb_info;
++extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data);
++
++ /* AC97 */
++struct atmel_ac97_data {
++	u8		reset_pin;	/* reset */
++};
++extern void __init at91_add_device_ac97(struct atmel_ac97_data *data);
++
++ /* ISI */
++extern void __init at91_add_device_isi(void);
++
+  /* LEDs */
+ extern u8 at91_leds_cpu;
+ extern u8 at91_leds_timer;
+ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
+ 
++struct at91_gpio_led {
++	u8		index;		/* index of LED */
++	char*		name;		/* name of LED */
++	u8		gpio;		/* AT91_PIN_xx */
++	u8		flags;		/* 1=active-high */
++	char*		trigger;	/* default trigger */
++};
++extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr);
++
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/cpu.h linux-2.6-stable/include/asm-arm/arch-at91/cpu.h
+--- linux-2.6.21/include/asm-arm/arch-at91/cpu.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/cpu.h	Wed May  9 10:20:54 2007
+@@ -26,6 +26,8 @@
+ #define ARCH_ID_AT91SAM9XE256	0x329a93a0
+ #define ARCH_ID_AT91SAM9XE512	0x329aa3a0
+ 
++#define ARCH_ID_AT91SAM9RL64	0x019b03a0
++
+ static inline unsigned long at91_cpu_identify(void)
+ {
+ 	return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
+@@ -68,4 +70,10 @@
+ #define cpu_is_at91sam9263()	(0)
+ #endif
+ 
++#ifdef CONFIG_ARCH_AT91SAM9RL
++#define cpu_is_at91sam9rl()	(at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
++#else
++#define cpu_is_at91sam9rl()	(0)
++#endif
++
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/hardware.h linux-2.6-stable/include/asm-arm/arch-at91/hardware.h
+--- linux-2.6.21/include/asm-arm/arch-at91/hardware.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/hardware.h	Fri May 11 14:45:12 2007
+@@ -24,6 +24,8 @@
+ #include <asm/arch/at91sam9261.h>
+ #elif defined(CONFIG_ARCH_AT91SAM9263)
+ #include <asm/arch/at91sam9263.h>
++#elif defined(CONFIG_ARCH_AT91SAM9RL)
++#include <asm/arch/at91sam9rl.h>
+ #else
+ #error "Unsupported AT91 processor"
+ #endif
+@@ -69,22 +71,5 @@
+ /* Clocks */
+ #define AT91_SLOW_CLOCK		32768		/* slow clock */
+ 
+-#ifndef __ASSEMBLY__
+-#include <asm/io.h>
+-
+-static inline unsigned int at91_sys_read(unsigned int reg_offset)
+-{
+-	void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
+-
+-	return __raw_readl(addr + reg_offset);
+-}
+-
+-static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
+-{
+-	void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
+-
+-	__raw_writel(value, addr + reg_offset);
+-}
+-#endif
+ 
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/ics1523.h linux-2.6-stable/include/asm-arm/arch-at91/ics1523.h
+--- linux-2.6.21/include/asm-arm/arch-at91/ics1523.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/include/asm-arm/arch-at91/ics1523.h	Tue May  8 12:13:31 2007
+@@ -0,0 +1,154 @@
++//*----------------------------------------------------------------------------
++//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
++//*----------------------------------------------------------------------------
++//* The software is delivered "AS IS" without warranty or condition of any
++//* kind, either express, implied or statutory. This includes without
++//* limitation any warranty or condition with respect to merchantability or
++//* fitness for any particular purpose, or against the infringements of
++//* intellectual property rights of others.
++//*----------------------------------------------------------------------------
++//* File Name           : ics1523.h
++//* Object              : Clock Generator Prototyping File.
++//*
++//* 1.0 08/28/02 ED     : Creation
++//* 1.2 13/01/03 FB		: Update on lib V3
++//*----------------------------------------------------------------------------
++
++#ifndef ics1523_h
++#define ics1523_h
++
++/*-------------------------------------------*/
++/* ICS1523 TWI Serial Clock Definition       */
++/*-------------------------------------------*/
++
++#define		ICS_MIN_CLOCK		100		/* Min Frequency Access Clock KHz */
++#define		ICS_MAX_CLOCK		400		/* Max Frequency Access Clock KHz */
++#define		ICS_TRANSFER_RATE	ICS_MAX_CLOCK	/* Transfer speed to apply */
++
++#define		ICS_WRITE_CLK_PNB	30		/* TWCK Clock Periods required to write */
++#define		ICS_READ_CLK_PNB	40		/* TWCK Clock Periods required to read */
++
++/*-------------------------------------------*/
++/* ICS1523 Write Operation Definition        */
++/*-------------------------------------------*/
++
++#define		ICS1523_ACCESS_OK	0		/* OK */
++#define		ICS1523_ACCESS_ERROR	-1		/* NOK */
++
++/*-------------------------------------------*/
++/* ICS1523 Device Addresses Definition       */
++/*-------------------------------------------*/
++
++#define		ICS_ADDR		0x26		/* Device Address */
++
++/*--------------------------------------------------*/
++/* ICS1523 Registers Internal Addresses Definition  */
++/*--------------------------------------------------*/
++
++#define		ICS_ICR			0x0		/* Input Control Register */
++#define		ICS_LCR			0x1		/* Loop Control Register */
++#define		ICS_FD0			0x2		/* PLL FeedBack Divider LSBs */
++#define		ICS_FD1			0x3		/* PLL FeedBack Divider MSBs */
++#define		ICS_DPAO		0x4		/* Dynamic Phase Aligner Offset */
++#define		ICS_DPAC		0x5		/* Dynamic Phase Aligner Resolution */
++#define		ICS_OE			0x6		/* Output Enables Register */
++#define		ICS_OD			0x7		/* Osc Divider Register */
++#define		ICS_SWRST		0x8		/* DPA & PLL Reset Register */
++#define		ICS_VID			0x10		/* Chip Version Register */
++#define		ICS_RID			0x11		/* Chip Revision Register */
++#define		ICS_SR			0x12		/* Status Register */
++
++/*------------------------------------------------------*/
++/* ICS1523 Input Control Register Bits Definition       */
++/*------------------------------------------------------*/
++
++#define		ICS_PDEN		0x1		/* Phase Detector Enable */
++#define		ICS_PDPOL		0x2		/* Phase Detector Enable Polarity */
++#define		ICS_REFPOL		0x4		/* External Reference Polarity */
++#define		ICS_FBKPOL		0x8		/* External Feedback Polarity */
++#define		ICS_FBKSEL		0x10		/* External Feedback Select */
++#define		ICS_FUNCSEL		0x20		/* Function Out Select */
++#define		ICS_ENPLS		0x40		/* Enable PLL Lock/Ref Status Output */
++#define		ICS_ENDLS		0x80		/* Enable DPA Lock/Ref Status Output */
++
++/*-----------------------------------------------------*/
++/* ICS1523 Loop Control Register Bits Definition       */
++/*-----------------------------------------------------*/
++
++#define		ICS_PFD			0x7		/* Phase Detector Gain */
++#define		ICS_PSD			0x30		/* Post-Scaler Divider */
++
++/*----------------------------------------------------*/
++/* ICS1523 PLL FeedBack Divider LSBs Definition       */
++/*----------------------------------------------------*/
++
++#define		ICS_FBDL		0xFF		/* PLL FeedBack Divider LSBs */
++
++/*----------------------------------------------------*/
++/* ICS1523 PLL FeedBack Divider MSBs Definition       */
++/*----------------------------------------------------*/
++
++#define		ICS_FBDM		0xF		/* PLL FeedBack Divider MSBs */
++
++/*------------------------------------------------------------*/
++/* ICS1523 Dynamic Phase Aligner Offset Bits Definition       */
++/*------------------------------------------------------------*/
++
++#define		ICS_DPAOS		0x2F		/* Dynamic Phase Aligner Offset */
++#define		ICS_FILSEL		0x80		/* Loop Filter Select */
++
++/*----------------------------------------------------------------*/
++/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition       */
++/*----------------------------------------------------------------*/
++
++#define		ICS_DPARES		0x3		/* Dynamic Phase Aligner Resolution */
++#define		ICS_MMREV		0xFC		/* Metal Mask Revision Number */
++
++/*-------------------------------------------------------*/
++/* ICS1523 Output Enables Register Bits Definition       */
++/*-------------------------------------------------------*/
++
++#define		ICS_OEPCK		0x1		/* Output Enable for PECL PCLK Outputs */
++#define		ICS_OETCK		0x2		/* Output Enable for STTL CLK Output */
++#define		ICS_OEP2		0x4		/* Output Enable for PECL CLK/2 Outputs */
++#define		ICS_OET2		0x8		/* Output Enable for STTL CLK/2 Output */
++#define		ICS_OEF			0x10		/* Output Enable for STTL FUNC Output */
++#define		ICS_CLK2INV		0x20		/* CLK/2 Invert */
++#define		ICS_OSCL		0xC0		/* SSTL Clock Scaler */
++
++/*----------------------------------------------------*/
++/* ICS1523 Osc Divider Register Bits Definition       */
++/*----------------------------------------------------*/
++
++#define		ICS_OSCDIV		0x7F		/* Oscillator Divider Modulus */
++#define		ICS_INSEL		0x80		/* Input Select */
++
++/*---------------------------------------------------*/
++/* ICS1523 DPA & PLL Reset Register Definition       */
++/*---------------------------------------------------*/
++
++#define		ICS_DPAR		0x0A		/* DPA Reset Command */
++#define		ICS_PLLR		0x50		/* PLL Reset Command */
++
++/*------------------------------------------------*/
++/* ICS1523 Chip Version Register Definition       */
++/*------------------------------------------------*/
++
++#define		ICS_CHIPV		0xFF		/* Chip Version */
++
++/*-------------------------------------------------*/
++/* ICS1523 Chip Revision Register Definition       */
++/*-------------------------------------------------*/
++
++#define		ICS_CHIPR		0xFF		/* Chip Revision */
++
++/*------------------------------------------*/
++/* ICS1523 Status Register Definition       */
++/*------------------------------------------*/
++
++#define		ICS_DPALOCK		0x1		/* DPA Lock Status */
++#define		ICS_PLLLOCK		0x2		/* PLL Lock Status */
++
++int at91_ics1523_init(void);
++
++#endif /* ics1523_h */
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/io.h linux-2.6-stable/include/asm-arm/arch-at91/io.h
+--- linux-2.6.21/include/asm-arm/arch-at91/io.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/io.h	Fri May 11 14:45:12 2007
+@@ -29,4 +29,22 @@
+ #define __mem_pci(a)		(a)
+ 
+ 
++#ifndef __ASSEMBLY__
++
++static inline unsigned int at91_sys_read(unsigned int reg_offset)
++{
++	void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
++
++	return __raw_readl(addr + reg_offset);
++}
++
++static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
++{
++	void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
++
++	__raw_writel(value, addr + reg_offset);
++}
++
++#endif
++
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/irqs.h linux-2.6-stable/include/asm-arm/arch-at91/irqs.h
+--- linux-2.6.21/include/asm-arm/arch-at91/irqs.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/irqs.h	Fri May 11 14:45:12 2007
+@@ -21,6 +21,7 @@
+ #ifndef __ASM_ARCH_IRQS_H
+ #define __ASM_ARCH_IRQS_H
+ 
++#include <asm/io.h>
+ #include <asm/arch/at91_aic.h>
+ 
+ #define NR_AIC_IRQS 32
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/spi.h linux-2.6-stable/include/asm-arm/arch-at91/spi.h
+--- linux-2.6.21/include/asm-arm/arch-at91/spi.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/include/asm-arm/arch-at91/spi.h	Tue May  8 14:31:24 2007
+@@ -0,0 +1,54 @@
++/*
++ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200
++ *
++ * (c) SAN People (Pty) Ltd
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#ifndef AT91_LEGACY_SPI_H
++#define AT91_LEGACY_SPI_H
++
++#define SPI_MAJOR		153	/* registered device number */
++
++#define DEFAULT_SPI_CLK		6000000
++
++
++/* Maximum number of buffers in a single SPI transfer.
++ *  DataFlash uses maximum of 2
++ *  spidev interface supports up to 8.
++ */
++#define MAX_SPI_TRANSFERS	8
++#define NR_SPI_DEVICES		4	/* number of devices on SPI bus */
++
++/*
++ * Describes the buffers for a SPI transfer.
++ * A transmit & receive buffer must be specified for each transfer
++ */
++struct spi_transfer_list {
++	void* tx[MAX_SPI_TRANSFERS];	/* transmit */
++	int txlen[MAX_SPI_TRANSFERS];
++	void* rx[MAX_SPI_TRANSFERS];	/* receive */
++	int rxlen[MAX_SPI_TRANSFERS];
++	int nr_transfers;		/* number of transfers */
++	int curr;			/* current transfer */
++};
++
++struct spi_local {
++	unsigned int pcs;		/* Peripheral Chip Select value */
++
++	struct spi_transfer_list *xfers;	/* current transfer list */
++	dma_addr_t tx, rx;		/* DMA address for current transfer */
++	dma_addr_t txnext, rxnext;	/* DMA address for next transfer */
++};
++
++
++/* Exported functions */
++extern void spi_access_bus(short device);
++extern void spi_release_bus(short device);
++extern int spi_transfer(struct spi_transfer_list* list);
++
++#endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/timex.h linux-2.6-stable/include/asm-arm/arch-at91/timex.h
+--- linux-2.6.21/include/asm-arm/arch-at91/timex.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/timex.h	Wed May  9 10:20:53 2007
+@@ -37,6 +37,11 @@
+ #define AT91SAM9_MASTER_CLOCK	99959500
+ #define CLOCK_TICK_RATE		(AT91SAM9_MASTER_CLOCK/16)
+ 
++#elif defined(CONFIG_ARCH_AT91SAM9RL)
++
++#define AT91SAM9_MASTER_CLOCK	100000000
++#define CLOCK_TICK_RATE		(AT91SAM9_MASTER_CLOCK/16)
++
+ #endif
+ 
+ #endif
+diff -urN -x CVS linux-2.6.21/include/asm-arm/arch-at91/uncompress.h linux-2.6-stable/include/asm-arm/arch-at91/uncompress.h
+--- linux-2.6.21/include/asm-arm/arch-at91/uncompress.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/asm-arm/arch-at91/uncompress.h	Fri May 11 14:45:12 2007
+@@ -21,7 +21,7 @@
+ #ifndef __ASM_ARCH_UNCOMPRESS_H
+ #define __ASM_ARCH_UNCOMPRESS_H
+ 
+-#include <asm/hardware.h>
++#include <asm/io.h>
+ #include <asm/arch/at91_dbgu.h>
+ 
+ /*
+diff -urN -x CVS linux-2.6.21/include/linux/clk.h linux-2.6-stable/include/linux/clk.h
+--- linux-2.6.21/include/linux/clk.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/linux/clk.h	Tue May  8 12:13:31 2007
+@@ -121,4 +121,24 @@
+  */
+ struct clk *clk_get_parent(struct clk *clk);
+ 
++/**
++ * clk_must_disable - report whether a clock's users must disable it
++ * @clk: one node in the clock tree
++ *
++ * This routine returns true only if the upcoming system state requires
++ * disabling the specified clock.
++ *
++ * It's common for platform power states to constrain certain clocks (and
++ * their descendants) to be unavailable, while other states allow that
++ * clock to be active.  A platform's power states often include an "all on"
++ * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and
++ * operating states which sacrifice functionality for lower power usage.
++ *
++ * The constraint value is commonly tested in device driver suspend(), to
++ * leave clocks active if they are needed for features like wakeup events.
++ * On platforms that support reduced functionality operating states, the
++ * constraint may also need to be tested during resume() and probe() calls.
++ */
++int clk_must_disable(struct clk *clk);
++
+ #endif
+diff -urN -x CVS linux-2.6.21/include/linux/i2c-id.h linux-2.6-stable/include/linux/i2c-id.h
+--- linux-2.6.21/include/linux/i2c-id.h	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/include/linux/i2c-id.h	Tue May  8 12:13:31 2007
+@@ -202,6 +202,7 @@
+ 
+ /* --- PCA 9564 based algorithms */
+ #define I2C_HW_A_ISA		0x1a0000 /* generic ISA Bus interface card */
++#define I2C_HW_A_PLAT		0x1a0001 /* generic platform_bus interface */
+ 
+ /* --- ACPI Embedded controller algorithms                              */
+ #define I2C_HW_ACPI_EC          0x1f0000
+diff -urN -x CVS linux-2.6.21/include/video/atmel_lcdc.h linux-2.6-stable/include/video/atmel_lcdc.h
+--- linux-2.6.21/include/video/atmel_lcdc.h	Thu Jan  1 02:00:00 1970
++++ linux-2.6-stable/include/video/atmel_lcdc.h	Thu May 10 12:34:01 2007
+@@ -0,0 +1,196 @@
++/*
++ *  Header file for AT91/AT32 LCD Controller
++ *
++ *  Data structure and register user interface
++ *
++ *  Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
++ */
++#ifndef __ATMEL_LCDC_H__
++#define __ATMEL_LCDC_H__
++
++ /* LCD Controller info data structure */
++struct atmel_lcdfb_info {
++	spinlock_t		lock;
++	struct fb_info		*info;
++	void __iomem		*mmio;
++	unsigned long		irq_base;
++
++	unsigned int		guard_time;
++	struct platform_device	*pdev;
++	struct clk		*bus_clk;
++	struct clk		*lcdc_clk;
++	unsigned int		default_bpp;
++	unsigned int		default_lcdcon2;
++	unsigned int		default_dmacon;
++	void (*atmel_lcdfb_power_control)(int on);
++	struct fb_monspecs	*default_monspecs;
++	u32			pseudo_palette[16];
++};
++
++#define ATMEL_LCDC_DMABADDR1	0x00
++#define ATMEL_LCDC_DMABADDR2	0x04
++#define ATMEL_LCDC_DMAFRMPT1	0x08
++#define ATMEL_LCDC_DMAFRMPT2	0x0c
++#define ATMEL_LCDC_DMAFRMADD1	0x10
++#define ATMEL_LCDC_DMAFRMADD2	0x14
++
++#define ATMEL_LCDC_DMAFRMCFG	0x18
++#define	ATMEL_LCDC_FRSIZE	(0x7fffff <<  0)
++#define	ATMEL_LCDC_BLENGTH_OFFSET	24
++#define	ATMEL_LCDC_BLENGTH	(0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)
++
++#define ATMEL_LCDC_DMACON	0x1c
++#define	ATMEL_LCDC_DMAEN	(0x1 << 0)
++#define	ATMEL_LCDC_DMARST	(0x1 << 1)
++#define	ATMEL_LCDC_DMABUSY	(0x1 << 2)
++#define		ATMEL_LCDC_DMAUPDT	(0x1 << 3)
++#define		ATMEL_LCDC_DMA2DEN	(0x1 << 4)
++
++#define ATMEL_LCDC_DMA2DCFG	0x20
++#define		ATMEL_LCDC_ADDRINC_OFFSET	0
++#define		ATMEL_LCDC_ADDRINC		(0xffff)
++#define		ATMEL_LCDC_PIXELOFF_OFFSET	24
++#define		ATMEL_LCDC_PIXELOFF		(0x1f << 24)
++
++#define ATMEL_LCDC_LCDCON1	0x0800
++#define	ATMEL_LCDC_BYPASS	(1     <<  0)
++#define	ATMEL_LCDC_CLKVAL_OFFSET	12
++#define	ATMEL_LCDC_CLKVAL	(0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
++#define	ATMEL_LCDC_LINCNT	(0x7ff << 21)
++
++#define ATMEL_LCDC_LCDCON2	0x0804
++#define	ATMEL_LCDC_DISTYPE	(3 << 0)
++#define		ATMEL_LCDC_DISTYPE_STNMONO	(0 << 0)
++#define		ATMEL_LCDC_DISTYPE_STNCOLOR	(1 << 0)
++#define		ATMEL_LCDC_DISTYPE_TFT		(2 << 0)
++#define	ATMEL_LCDC_SCANMOD	(1 << 2)
++#define		ATMEL_LCDC_SCANMOD_SINGLE	(0 << 2)
++#define		ATMEL_LCDC_SCANMOD_DUAL		(1 << 2)
++#define	ATMEL_LCDC_IFWIDTH	(3 << 3)
++#define		ATMEL_LCDC_IFWIDTH_4		(0 << 3)
++#define		ATMEL_LCDC_IFWIDTH_8		(1 << 3)
++#define		ATMEL_LCDC_IFWIDTH_16		(2 << 3)
++#define	ATMEL_LCDC_PIXELSIZE	(7 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_1		(0 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_2		(1 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_4		(2 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_8		(3 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_16		(4 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_24		(5 << 5)
++#define		ATMEL_LCDC_PIXELSIZE_32		(6 << 5)
++#define	ATMEL_LCDC_INVVD	(1 << 8)
++#define		ATMEL_LCDC_INVVD_NORMAL		(0 << 8)
++#define		ATMEL_LCDC_INVVD_INVERTED	(1 << 8)
++#define	ATMEL_LCDC_INVFRAME	(1 << 9 )
++#define		ATMEL_LCDC_INVFRAME_NORMAL	(0 << 9)
++#define		ATMEL_LCDC_INVFRAME_INVERTED	(1 << 9)
++#define	ATMEL_LCDC_INVLINE	(1 << 10)
++#define		ATMEL_LCDC_INVLINE_NORMAL	(0 << 10)
++#define		ATMEL_LCDC_INVLINE_INVERTED	(1 << 10)
++#define	ATMEL_LCDC_INVCLK	(1 << 11)
++#define		ATMEL_LCDC_INVCLK_NORMAL	(0 << 11)
++#define		ATMEL_LCDC_INVCLK_INVERTED	(1 << 11)
++#define	ATMEL_LCDC_INVDVAL	(1 << 12)
++#define		ATMEL_LCDC_INVDVAL_NORMAL	(0 << 12)
++#define		ATMEL_LCDC_INVDVAL_INVERTED	(1 << 12)
++#define	ATMEL_LCDC_CLKMOD	(1 << 15)
++#define		ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY	(0 << 15)
++#define		ATMEL_LCDC_CLKMOD_ALWAYSACTIVE	(1 << 15)
++#define	ATMEL_LCDC_MEMOR	(1 << 31)
++#define		ATMEL_LCDC_MEMOR_BIG		(0 << 31)
++#define		ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)
++
++#define ATMEL_LCDC_TIM1		0x0808
++#define	ATMEL_LCDC_VFP		(0xff <<  0)
++#define	ATMEL_LCDC_VBP_OFFSET		8
++#define	ATMEL_LCDC_VBP		(0xff <<  ATMEL_LCDC_VBP_OFFSET)
++#define	ATMEL_LCDC_VPW_OFFSET		16
++#define	ATMEL_LCDC_VPW		(0x3f << ATMEL_LCDC_VPW_OFFSET)
++#define	ATMEL_LCDC_VHDLY_OFFSET		24
++#define	ATMEL_LCDC_VHDLY	(0xf  << ATMEL_LCDC_VHDLY_OFFSET)
++
++#define ATMEL_LCDC_TIM2		0x080c
++#define	ATMEL_LCDC_HBP		(0xff  <<  0)
++#define	ATMEL_LCDC_HPW_OFFSET		8
++#define	ATMEL_LCDC_HPW		(0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
++#define	ATMEL_LCDC_HFP_OFFSET		21
++#define	ATMEL_LCDC_HFP		(0x7ff << ATMEL_LCDC_HFP_OFFSET)
++
++#define ATMEL_LCDC_LCDFRMCFG	0x0810
++#define	ATMEL_LCDC_LINEVAL	(0x7ff <<  0)
++#define	ATMEL_LCDC_HOZVAL_OFFSET	21
++#define	ATMEL_LCDC_HOZVAL	(0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
++
++#define ATMEL_LCDC_FIFO		0x0814
++#define	ATMEL_LCDC_FIFOTH	(0xffff)
++
++#define ATMEL_LCDC_MVAL		0x0818
++
++#define ATMEL_LCDC_DP1_2	0x081c
++#define ATMEL_LCDC_DP4_7	0x0820
++#define ATMEL_LCDC_DP3_5	0x0824
++#define ATMEL_LCDC_DP2_3	0x0828
++#define ATMEL_LCDC_DP5_7	0x082c
++#define ATMEL_LCDC_DP3_4	0x0830
++#define ATMEL_LCDC_DP4_5	0x0834
++#define ATMEL_LCDC_DP6_7	0x0838
++#define	ATMEL_LCDC_DP1_2_VAL	(0xff)
++#define	ATMEL_LCDC_DP4_7_VAL	(0xfffffff)
++#define	ATMEL_LCDC_DP3_5_VAL	(0xfffff)
++#define	ATMEL_LCDC_DP2_3_VAL	(0xfff)
++#define	ATMEL_LCDC_DP5_7_VAL	(0xfffffff)
++#define	ATMEL_LCDC_DP3_4_VAL	(0xffff)
++#define	ATMEL_LCDC_DP4_5_VAL	(0xfffff)
++#define	ATMEL_LCDC_DP6_7_VAL	(0xfffffff)
++
++#define ATMEL_LCDC_PWRCON	0x083c
++#define	ATMEL_LCDC_PWR		(1    <<  0)
++#define	ATMEL_LCDC_GUARDT_OFFSET	1
++#define	ATMEL_LCDC_GUARDT	(0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
++#define	ATMEL_LCDC_BUSY		(1    << 31)
++
++#define ATMEL_LCDC_CONTRAST_CTR	0x0840
++#define	ATMEL_LCDC_PS		(3 << 0)
++#define		ATMEL_LCDC_PS_DIV1		(0 << 0)
++#define		ATMEL_LCDC_PS_DIV2		(1 << 0)
++#define		ATMEL_LCDC_PS_DIV4		(2 << 0)
++#define		ATMEL_LCDC_PS_DIV8		(3 << 0)
++#define	ATMEL_LCDC_POL		(1 << 2)
++#define		ATMEL_LCDC_POL_NEGATIVE		(0 << 2)
++#define		ATMEL_LCDC_POL_POSITIVE		(1 << 2)
++#define	ATMEL_LCDC_ENA		(1 << 3)
++#define		ATMEL_LCDC_ENA_PWMDISABLE	(0 << 3)
++#define		ATMEL_LCDC_ENA_PWMENABLE	(1 << 3)
++
++#define ATMEL_LCDC_CONTRAST_VAL	0x0844
++#define	ATMEL_LCDC_CVAL	(0xff)
++
++#define ATMEL_LCDC_IER		0x0848
++#define ATMEL_LCDC_IDR		0x084c
++#define ATMEL_LCDC_IMR		0x0850
++#define ATMEL_LCDC_ISR		0x0854
++#define ATMEL_LCDC_ICR		0x0858
++#define	ATMEL_LCDC_LNI		(1 << 0)
++#define	ATMEL_LCDC_LSTLNI	(1 << 1)
++#define	ATMEL_LCDC_EOFI		(1 << 2)
++#define	ATMEL_LCDC_UFLWI	(1 << 4)
++#define	ATMEL_LCDC_OWRI		(1 << 5)
++#define	ATMEL_LCDC_MERI		(1 << 6)
++
++#define ATMEL_LCDC_LUT(n)	(0x0c00 + ((n)*4))
++
++#endif /* __ATMEL_LCDC_H__ */
+diff -urN -x CVS linux-2.6.21/sound/soc/at91/eti_b1_wm8731.c linux-2.6-stable/sound/soc/at91/eti_b1_wm8731.c
+--- linux-2.6.21/sound/soc/at91/eti_b1_wm8731.c	Thu Apr 26 05:08:32 2007
++++ linux-2.6-stable/sound/soc/at91/eti_b1_wm8731.c	Tue May  8 12:13:58 2007
+@@ -34,8 +34,7 @@
+ #include <sound/soc.h>
+ #include <sound/soc-dapm.h>
+ 
+-#include <asm/arch/hardware.h>
+-#include <asm/arch/at91_pio.h>
++#include <asm/hardware.h>
+ #include <asm/arch/gpio.h>
+ 
+ #include "../codecs/wm8731.h"
+@@ -48,13 +47,6 @@
+ #define	DBG(x...)
+ #endif
+ 
+-#define AT91_PIO_TF1	(1 << (AT91_PIN_PB6 - PIN_BASE) % 32)
+-#define AT91_PIO_TK1	(1 << (AT91_PIN_PB7 - PIN_BASE) % 32)
+-#define AT91_PIO_TD1	(1 << (AT91_PIN_PB8 - PIN_BASE) % 32)
+-#define AT91_PIO_RD1	(1 << (AT91_PIN_PB9 - PIN_BASE) % 32)
+-#define AT91_PIO_RK1	(1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
+-#define AT91_PIO_RF1	(1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
+-
+ static struct clk *pck1_clk;
+ static struct clk *pllb_clk;
+ 
+@@ -277,7 +269,6 @@
+ static int __init eti_b1_init(void)
+ {
+ 	int ret;
+-	u32 ssc_pio_lines;
+ 	struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
+ 
+ 	if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
+@@ -311,19 +302,12 @@
+ 		goto fail_io_unmap;
+ 	}
+ 
+- 	ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
+-			| AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1;
+-
+-	/* Reset all PIO registers and assign lines to peripheral A */
+- 	at91_sys_write(AT91_PIOB + PIO_PDR,  ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_ODR,  ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_IDR,  ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_ASR,  ssc_pio_lines);
+- 	at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines);
++ 	at91_set_A_periph(AT91_PIN_PB6, 0);	/* TF1 */
++ 	at91_set_A_periph(AT91_PIN_PB7, 0);	/* TK1 */
++ 	at91_set_A_periph(AT91_PIN_PB8, 0);	/* TD1 */
++ 	at91_set_A_periph(AT91_PIN_PB9, 0);	/* RD1 */
++/* 	at91_set_A_periph(AT91_PIN_PB10, 0);*/	/* RK1 */ 	
++ 	at91_set_A_periph(AT91_PIN_PB11, 0);	/* RF1 */
+ 
+ 	/*
+ 	 * Set PCK1 parent to PLLB and its rate to 12 Mhz.
diff --git a/target/device/Atmel/Linux/kernel-patches-2.6.21.1/linux-2.6.21.1-at91-1-update.patch b/target/device/Atmel/Linux/kernel-patches-2.6.21.1/linux-2.6.21.1-at91-1-update.patch
new file mode 100644
index 000000000..7809c2463
--- /dev/null
+++ b/target/device/Atmel/Linux/kernel-patches-2.6.21.1/linux-2.6.21.1-at91-1-update.patch
@@ -0,0 +1,36 @@
+diff -urN linux-2.6.21.1-0rig/drivers/video/atmel_lcdfb.c linux-2.6.21.1/drivers/video/atmel_lcdfb.c
+--- linux-2.6.21.1-0rig/drivers/video/atmel_lcdfb.c	2007-05-12 13:28:34.000000000 +0200
++++ linux-2.6.21.1/drivers/video/atmel_lcdfb.c	2007-05-12 19:41:45.000000000 +0200
+@@ -540,7 +540,7 @@
+ 	info->fix = atmel_lcdfb_fix;
+ 
+ 	/* Enable LCDC Clocks */
+-	if (cpu_is_at91sam9261() {
++	if (cpu_is_at91sam9261()) {
+ 		sinfo->bus_clk = clk_get(dev, "hck1");
+ 		if (IS_ERR(sinfo->bus_clk)) {
+ 			ret = PTR_ERR(sinfo->bus_clk);
+diff -urN linux-2.6.21.1-0rig/include/asm-arm/arch-at91/cpu.h linux-2.6.21.1/include/asm-arm/arch-at91/cpu.h
+--- linux-2.6.21.1-0rig/include/asm-arm/arch-at91/cpu.h	2007-05-12 13:28:34.000000000 +0200
++++ linux-2.6.21.1/include/asm-arm/arch-at91/cpu.h	2007-05-12 13:27:28.000000000 +0200
+@@ -17,7 +17,7 @@
+ #include <asm/arch/at91_dbgu.h>
+ 
+ 
+-#define ARCH_ID_AT91RM9200	0x09290780
++#define ARCH_ID_AT91RM9200		0x09290780
+ #define ARCH_ID_AT91SAM9260	0x019803a0
+ #define ARCH_ID_AT91SAM9261	0x019703a0
+ #define ARCH_ID_AT91SAM9263	0x019607a0
+@@ -76,4 +76,11 @@
+ #define cpu_is_at91sam9rl()	(0)
+ #endif
+ 
++#define cpu_is_at32ap7000()	(0)
++#define cpu_is_at32ap7001()	(0)
++#define cpu_is_at32ap7002()	(0)
++#define cpu_is_at32ap7200()	(0)
++#define cpu_is_at32ap7010()	(0)
++#define cpu_is_at32ap7020()	(0)
++
+ #endif
diff --git a/target/device/Atmel/Makefile.in b/target/device/Atmel/Makefile.in
index a649f97c2..570941182 100644
--- a/target/device/Atmel/Makefile.in
+++ b/target/device/Atmel/Makefile.in
@@ -3,34 +3,34 @@
 ifeq ($(strip $(BR2_TARGET_ATMEL)),y)
 ATMEL_PATH:=target/device/Atmel
 
-BOARD_NAME:=$(strip $(subst ",, $(BR2_BOARD_NAME)))
+BOARD_NAME:=$(strip  $(subst ",, $(BR2_BOARD_NAME)))
 #"))
-BOARD_PATH:=$(strip $(subst ",, $(BR2_BOARD_PATH)))
+BOARD_PATH:=$(strip  $(subst ",, $(BR2_BOARD_PATH)))
 #"))
 
 ATMEL_TARGET:=$(ATMEL_PATH)/root
-TARGET_SKELETON:=$(ATMEL_TARGET)/target_skeleton
+TARGET_SKELETON:=$(BOARD_PATH)/target_skeleton
 TARGET_DEVICE_TABLE:=$(ATMEL_TARGET)/device_table.txt
 TARGET_SKELETON_LINKS:=$(ATMEL_TARGET)/skel.tar.gz
 
-TARGET_ATMEL_COPYTO:=$(strip $(subst ",, $(BR2_TARGET_ATMEL_COPYTO)))
+TARGET_ATMEL_COPYTO:=$(strip  $(subst ",, $(BR2_TARGET_ATMEL_COPYTO)))
 
 # These are set by Config.in
-DOWNLOAD_LINUX26_VERSION:=$(strip $(subst ",, $(BR2_DOWNLOAD_LINUX26_VERSION)))
+DOWNLOAD_LINUX26_VERSION:=$(strip  $(subst ",, $(BR2_DOWNLOAD_LINUX26_VERSION)))
 #"))
 ifeq ($(DOWNLOAD_LINUX26_VERSION),)
 DOWNLOAD_LINUX26_VERSION=$(LINUX_HEADERS_VERSION)
 endif
 
-LINUX26_VERSION:=$(strip $(subst ",, $(BR2_LINUX26_VERSION)))
+LINUX26_VERSION:=$(strip  $(subst ",, $(BR2_LINUX26_VERSION)))
 #"))
 ifeq ($(LINUX26_VERSION),)
 LINUX26_VERSION=$(LINUX_HEADERS_VERSION)
 endif
 
-LINUX26_RC_PATCH:=$(strip $(subst ",, $(BR2_LINUX26_RC_PATCH)))
+LINUX26_RC_PATCH:=$(strip  $(subst ",, $(BR2_LINUX26_RC_PATCH)))
 #"))
-LINUX_BSP_PATCH:=$(strip $(subst ",, $(BR2_LINUX_BSP_ATMEL_PATCH)))
+LINUX_BSP_PATCH:=$(strip  $(subst ",, $(BR2_LINUX_BSP_ATMEL_PATCH)))
 #"))
 
 # These are set by "new" Config.in
@@ -39,31 +39,15 @@ LINUX26_KCONFIG:=$(BOARD_PATH)/$(BOARD_NAME)-linux-$(LINUX26_VERSION).config
 # This should be part of target/linux/Makefile.in
 LINUX26_BUILD_DIR:=$(PROJECT_BUILD_DIR)
 
-#LINUX26_BINLOC=$(LINUX26_FORMAT)
+LINUX26_BINLOC=$(LINUX26_FORMAT)
 #LINUX26_BINLOC:=$(BINARIES_DIR)/$(LINUX26_KERNEL)
-ifeq ($(BR2_avr32),y)
-AVR32_FORMAT:=$(strip $(subst ",,$(BR2_PACKAGE_LINUX_FORMAT)))
-#"))
-ifeq ($(AVR32_FORMAT),uImage)
-LINUX26_BINLOC=arch/$(KERNEL_ARCH)/boot/images/$(AVR32_FORMAT)
-endif
+ifeq ($(strip $(BR2_avr32)),y)
+LINUX26_BINLOC:=arch/$(KERNEL_ARCH)/boot/images/$(BR2_PACKAGE_LINUX_FORMAT)
 endif
 
-
 LINUX26_COPYTO:=/tftpboot
 
-ifeq ($(DEFAULT_KERNEL_HEADERS),2.6.22.1)
-KERNEL_HEADERS_PATCH_DIR:=target/device/Atmel/linux/kernel-patches-$(LINUX26_VERSION)
-else
-# Patch during kernel header build
-ifeq ($(BR2_avr32),y)
-KERNEL_HEADERS_PATCH_DIR:=target/device/Atmel/arch-avr32/kernel-patches-$(LINUX26_VERSION)
-endif
-# Patch during kernel build
-ifeq ($(BR2_arm),y)
-KERNEL_HEADERS_PATCH_DIR:=target/device/Atmel/arch-arm/kernel-patches-$(LINUX26_VERSION)
-endif
-endif
+LINUX26_PATCH_DIR:=$(BOARD_PATH)/kernel-patches
 
 # The board specific Makefile.in can redefine BOARD_NAME's
 LINUX_BOARD_NAME:=$(BOARD_NAME)
@@ -72,7 +56,6 @@ DFB_BOARD_NAME:=$(BOARD_NAME)
 
 BR2_PACKAGE_BUSYBOX_CONFIG:=$(BR2_BOARD_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config
 
-#LINUX26_KERNEL=$(BINARIES_DIR)/$(PROJECT)-linux-$(LINUX26_VERSION)-$(DATE)
 
 # Update things in board specific makefiles
 include target/device/Atmel/*/Makefile.in
@@ -83,7 +66,7 @@ UBOOT_CONFIG:=$(UBOOT_BOARD_NAME)_config
 UBOOT_CONFIG_FILE:=$(BOARD_PATH)/u-boot/$(UBOOT_BOARD_NAME).h
 
 ifeq ($(strip $(BR2_PACKAGE_LINUX)),y)
-include $(ATMEL_PATH)/linux/linux.mk
+#include $(ATMEL_PATH)/Linux/linux.mk
 endif
 
 ifeq ($(strip $(BR2_TARGET_UBOOT)),y)
@@ -98,4 +81,15 @@ ifeq ($(strip $(BR2_TARGET_AT91BOOTSTRAP)),y)
 include $(ATMEL_PATH)/at91bootstrap/at91bootstrap.mk
 endif
 
+atmel_status:
+	@echo PROJECT_BUILD_DIR=$(PROJECT_BUILD_DIR)
+	@echo BOARD_NAME=$(BOARD_NAME)
+	@echo BR2_BOARD_PATH=$(BR2_BOARD_PATH)
+	@echo BR2_MAJOR_MINOR=$(BR2_LINUX_MAJOR_VERSION)$(BR2_LINUX_MINOR_VERSION)
+	@echo MAJOR_MINOR=$(LINUX_MAJOR_VER)$(LINUX_MINOR_VER)
+	@echo DOWNLOAD_LINUX26_VERSION=$(DOWNLOAD_LINUX26_VERSION)
+	@echo LINUX_SOURCE=$(LINUX_SOURCE)
+	@echo TARGETS=$(TARGETS)
+
+#TARGETS+=atmel_status
 endif
diff --git a/target/device/Atmel/at91bootstrap/Config.in b/target/device/Atmel/at91bootstrap/Config.in
index 3e53d3e6b..6d6d6e205 100644
--- a/target/device/Atmel/at91bootstrap/Config.in
+++ b/target/device/Atmel/at91bootstrap/Config.in
@@ -1,5 +1,5 @@
 config BR2_TARGET_AT91BOOTSTRAP
-	depends on BR2_TARGET_AT91SAM9260EK || BR2_TARGET_AT91SAM9260DFC || BR2_TARGET_AT91SAM9260PF || \
+	depends on BR2_TARGET_AT91SAM9260EK || BR2_TARGET_AT91SAM9260DFC || \
 	BR2_TARGET_AT91SAM9261EK || BR2_TARGET_AT91SAM9263EK || BR2_TARGET_AT91SAM9XEEK
 	bool "Build AT91 Bootstrap for selected chip"
 
@@ -26,8 +26,8 @@ config BR2_TARGET_AT91BOOT_NANDFLASH
 	bool "NAND Flash"
 
 config BR2_TARGET_AT91BOOT_FLASH
-        depends on BR2_TARGET_AT91SAM9XEEK || BR2_TARGET_AT91SAM9260PF
-	bool "Internal Flash or external parallel flash"
+        depends on BR2_TARGET_AT91SAM9XEEK
+	bool "Internal Flash"
 
 endchoice
 
@@ -37,48 +37,3 @@ config BR2_TARGET_AT91BOOTSTRAP_MEMORY
 	default	"dataflashcard"	if	BR2_TARGET_AT91BOOT_DATAFLASHCARD
 	default	"nandflash"	if	BR2_TARGET_AT91BOOT_NANDFLASH
 	default	"flash"		if	BR2_TARGET_AT91BOOT_FLASH
-
-config	BR2_AT91BOOTSTRAP_IMG_SIZE
-	string	"Image Size to copy to SDRAM"
-	default	"0x32000"	if	BR2_TARGET_AT91BOOT_DATAFLASH || BR2_TARGET_AT91BOOT_DATAFLASHCARD
-	default	"0x30000"	if	BR2_TARGET_AT91BOOT_NANDFLASH
-	default	"0x100000"	if	BR2_TARGET_AT91BOOT_FLASH
-	depends BR2_TARGET_AT91BOOTSTRAP
-	help
-	  Select the size of your application
-	  AT91 Bootstrap will copy this amount from flash to SDRAM
-
-choice	
-	prompt "Start address of application"
-	default BR2_AT91BOOTSTRAP_JUMP_TO_DEFAULT
-	depends on BR2_TARGET_AT91BOOTSTRAP
-	help
-	  Select Chip for which AT91 bootstrap should be built
-	  Currently supports AT91SAM9260EK, AT91SAM9261EK, AT91SAM9XEEK, AT91SAM9263EK
-
-config	BR2_AT91BOOTSTRAP_JUMP_TO_DEFAULT
-	bool "Copy to the default U-Boot start location in the SDRAM"
-	help
-	  This is where you copy the U-Boot boot loader
-
-config	BR2_AT91BOOTSTRAP_JUMP_TO_HIGH_SDRAM
-	bool "Copy to the last Megabyte of the SDRAM"
-	help
-	  This is where you copy a boot loader
-
-config	BR2_AT91BOOTSTRAP_JUMP_TO_START_OF_SDRAM
-	bool "Copy to the start of the SDRAM"
-	help
-	  This is where you copy a standalone application
-endchoice
-
-config	BR2_AT91BOOTSTRAP_JUMP_ADDR
-	string
-	default	"0x23F00000" if BR2_AT91BOOTSTRAP_JUMP_TO_DEFAULT
-	default	"0x23F00000" if BR2_AT91BOOTSTRAP_JUMP_TO_HIGH_SDRAM	
-	default "0x20000000" if BR2_AT91BOOTSTRAP_JUMP_TO_START_OF_SDRAM
-	depends on BR2_TARGET_AT91BOOTSTRAP
-
-comment "It will be copied to $(BR2_AT91BOOTSTRAP_JUMP_ADDR)"
-	depends on BR2_TARGET_AT91BOOTSTRAP
-
diff --git a/target/device/Atmel/at91bootstrap/at91bootstrap.mk b/target/device/Atmel/at91bootstrap/at91bootstrap.mk
index a21e3378c..ccf1bb716 100644
--- a/target/device/Atmel/at91bootstrap/at91bootstrap.mk
+++ b/target/device/Atmel/at91bootstrap/at91bootstrap.mk
@@ -3,38 +3,21 @@
 # at91bootstrap
 #
 #############################################################
-AT91BOOTSTRAP_VERSION:=2.4
-AT91BOOTSTRAP_PATCH_LEVEL:=
-AT91BOOTSTRAP_PATCHED_VERSION:=$(AT91BOOTSTRAP_VERSION)$(AT91BOOTSTRAP_PATCH_LEVEL)
+AT91BOOTSTRAP_VERSION:=2.3
 AT91BOOTSTRAP_NAME:=at91bootstrap-$(AT91BOOTSTRAP_VERSION)
-ATMEL_MIRROR:=$(strip $(subst ",, $(BR2_ATMEL_MIRROR)))
-#"))
-AT91BOOTSTRAP_SITE:=$(ATMEL_MIRROR)
+ATMEL_MIRROR:=$(strip  $(subst ",, $(BR2_ATMEL_MIRROR)))
+AT91BOOTSTRAP_SITE:=$(ATMEL_MIRROR)/Source
 AT91BOOTSTRAP_SOURCE:=$(AT91BOOTSTRAP_NAME).tar.bz2
 AT91BOOTSTRAP_DIR:=$(PROJECT_BUILD_DIR)/$(AT91BOOTSTRAP_NAME)
-AT91BOOTSTRAP:=$(strip $(subst ",, $(BR2_AT91BOOTSTRAP)))
-#"))
-AT91BOOTSTRAP_ZCAT:=$(BZCAT)
+AT91BOOTSTRAP:=$(strip  $(subst ",, $(BR2_AT91BOOTSTRAP)))
+AT91BOOTSTRAP_ZCAT:=bzcat
 
-AT91BOOTSTRAP_MEMORY:=$(strip $(subst ",, $(BR2_TARGET_AT91BOOTSTRAP_MEMORY)))
-#"))
+AT91BOOTSTRAP_MEMORY:=$(strip  $(subst ",, $(BR2_TARGET_AT91BOOTSTRAP_MEMORY)))
 
-AT91BOOTSTRAP_BINARY:=$(BOARD_NAME)-$(AT91BOOTSTRAP_MEMORY)boot-$(AT91BOOTSTRAP_PATCHED_VERSION).bin
 
-AT91BOOTSTRAP_TARGET:=$(AT91BOOTSTRAP_DIR)/binaries/$(AT91BOOTSTRAP_BINARY)
-
-AT91BOOTSTRAP_JUMP_ADDR:=$(strip $(subst ",, $(BR2_AT91BOOTSTRAP_JUMP_ADDR)))
-#"))
-AT91BOOTSTRAP_IMG_SIZE:=$(strip $(subst ",, $(BR2_AT91BOOTSTRAP_IMG_SIZE)))
-#"))
+AT91BOOTSTRAP_BINARY:=$(BOARD_NAME)-$(AT91BOOTSTRAP_MEMORY)boot-$(AT91BOOTSTRAP_VERSION).bin
 
-AT91_CUSTOM_FLAGS:=
-ifneq ($(AT91BOOTSTRAP_JUMP_ADDR),)
-AT91_CUSTOM_FLAGS+=-DJUMP_ADDR=$(AT91BOOTSTRAP_JUMP_ADDR)
-endif
-ifneq ($(AT91BOOTSTRAP_IMG_SIZE),)
-AT91_CUSTOM_FLAGS+=-DIMG_SIZE=$(AT91BOOTSTRAP_IMG_SIZE)
-endif
+AT91BOOTSTRAP_TARGET:=$(AT91BOOTSTRAP_DIR)/binaries/$(AT91BOOTSTRAP_BINARY)
 
 $(DL_DIR)/$(AT91BOOTSTRAP_SOURCE):
 	 $(WGET) -P $(DL_DIR) $(AT91BOOTSTRAP_SITE)/$(AT91BOOTSTRAP_SOURCE)
@@ -42,45 +25,38 @@ $(DL_DIR)/$(AT91BOOTSTRAP_SOURCE):
 $(AT91BOOTSTRAP_DIR)/.unpacked: $(DL_DIR)/$(AT91BOOTSTRAP_SOURCE)
 	mkdir -p $(PROJECT_BUILD_DIR)
 	$(AT91BOOTSTRAP_ZCAT) $(DL_DIR)/$(AT91BOOTSTRAP_SOURCE) | tar -C $(PROJECT_BUILD_DIR) $(TAR_OPTIONS) -
-	toolchain/patch-kernel.sh $(AT91BOOTSTRAP_DIR) target/device/Atmel/at91bootstrap/ at91bootstrap-$(AT91BOOTSTRAP_VERSION)\*.patch
-	touch $@
+	touch $(AT91BOOTSTRAP_DIR)/.unpacked
 
 $(AT91BOOTSTRAP_DIR)/.configured: $(AT91BOOTSTRAP_DIR)/.unpacked .config
-	$(MAKE) \
-		MEMORY=$(AT91BOOTSTRAP_MEMORY) \
-		CROSS_COMPILE=$(TARGET_CROSS) \
-		-C $(AT91BOOTSTRAP_DIR) \
+	$(MAKE)					\
+		MEMORY=$(AT91BOOTSTRAP_MEMORY)	\
+		CROSS_COMPILE=$(TARGET_CROSS)	\
+		-C $(AT91BOOTSTRAP_DIR)		\
 		$(BOARD_NAME)_defconfig
-	touch $@
+	touch	$(AT91BOOTSTRAP_DIR)/.configured
 
 $(AT91BOOTSTRAP_TARGET): $(AT91BOOTSTRAP_DIR)/.configured
-	$(MAKE) \
-		MEMORY=$(AT91BOOTSTRAP_MEMORY) \
-		CROSS_COMPILE=$(TARGET_CROSS) \
-		AT91_CUSTOM_FLAGS="$(AT91_CUSTOM_FLAGS)" \
+	$(MAKE)					\
+		MEMORY=$(AT91BOOTSTRAP_MEMORY)	\
+		CROSS_COMPILE=$(TARGET_CROSS)	\
 		-C $(AT91BOOTSTRAP_DIR)
 
-$(BINARIES_DIR)/$(AT91BOOTSTRAP_BINARY): $(AT91BOOTSTRAP_TARGET)
-	mkdir -p $(BINARIES_DIR)
-	cp $(AT91BOOTSTRAP_TARGET) $(BINARIES_DIR)/$(AT91BOOTSTRAP_BINARY)
-	cp $(AT91BOOTSTRAP_TARGET) /tftpboot/$(AT91BOOTSTRAP_BINARY)
-
-.PHONY: at91bootstrap at91bootstrap-source
-
-at91bootstrap: $(BINARIES_DIR)/$(AT91BOOTSTRAP_BINARY)
-
 at91bootstrap-source: $(DL_DIR)/$(AT91BOOTSTRAP_SOURCE)
 
-at91bootstrap-unpacked: $(AT91BOOTSTRAP_DIR)/.unpacked
-
-.PHONY: at91bootstrap-clean at91bootstrap-dirclean
-
 at91bootstrap-clean:
 	make -C $(AT91BOOTSTRAP_DIR) clean
 
 at91bootstrap-dirclean:
 	rm -rf $(AT91BOOTSTRAP_DIR)
 
+at91bootstrap:	$(BINARIES_DIR)/$(AT91BOOTSTRAP_BINARY)
+
+$(BINARIES_DIR)/$(AT91BOOTSTRAP_BINARY):	$(AT91BOOTSTRAP_TARGET)
+	mkdir -p $(BINARIES_DIR)
+	cp $(AT91BOOTSTRAP_TARGET)	$(BINARIES_DIR)/$(AT91BOOTSTRAP_BINARY)
+	cp $(AT91BOOTSTRAP_TARGET)	/tftpboot/$(AT91BOOTSTRAP_BINARY)
+
+.PHONY:	at91bootstrap
 #############################################################
 #
 # Toplevel Makefile options
diff --git a/target/device/Atmel/at91rm9200df/Makefile.in b/target/device/Atmel/at91rm9200df/Makefile.in
index 5d4fa0b25..1ec25badd 100644
--- a/target/device/Atmel/at91rm9200df/Makefile.in
+++ b/target/device/Atmel/at91rm9200df/Makefile.in
@@ -1,10 +1,5 @@
-ifeq ($(BOARD_NAME),at91rm9200df)
+ifeq ($(strip$(BOARD_NAME)),at91rm9200df)
 LINUX_BOARD_NAME=at91rm9200ek
-BR2_PACKAGE_BUSYBOX_CONFIG:=$(BOARD_PATH)/busybox-1.7.1.config
 endif
 
 
-ifeq ($(BOARD_NAME),at91rm9200ek)
-BR2_PACKAGE_BUSYBOX_CONFIG:=$(BOARD_PATH)/busybox-1.7.1.config
-endif
-
diff --git a/target/device/Atmel/at91rm9200df/busybox-1.6.0.config b/target/device/Atmel/at91rm9200df/busybox-1.6.0.config
index 143a1116e..0dd6ecad8 100644
--- a/target/device/Atmel/at91rm9200df/busybox-1.6.0.config
+++ b/target/device/Atmel/at91rm9200df/busybox-1.6.0.config
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Busybox version: 1.7.1
-# Wed Sep 26 23:56:32 2007
+# Busybox version: 1.5.0
+# Wed Mar 14 13:42:28 2007
 #
 CONFIG_HAVE_DOT_CONFIG=y
 
@@ -25,15 +25,14 @@ CONFIG_FEATURE_INSTALLER=y
 CONFIG_GETOPT_LONG=y
 CONFIG_FEATURE_DEVPTS=y
 CONFIG_FEATURE_CLEAN_UP=y
-# CONFIG_FEATURE_PIDFILE is not set
 CONFIG_FEATURE_SUID=y
+CONFIG_FEATURE_SYSLOG=y
 # CONFIG_FEATURE_SUID_CONFIG is not set
 # CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_FEATURE_HAVE_RPC is not set
 # CONFIG_SELINUX is not set
-# CONFIG_FEATURE_PREFER_APPLETS is not set
+# CONFIG_FEATURE_EXEC_PREFER_APPLETS is not set
 CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
-CONFIG_FEATURE_SYSLOG=y
-# CONFIG_FEATURE_HAVE_RPC is not set
 
 #
 # Build Options
@@ -42,7 +41,7 @@ CONFIG_FEATURE_SYSLOG=y
 # CONFIG_BUILD_LIBBUSYBOX is not set
 # CONFIG_FEATURE_FULL_LIBBUSYBOX is not set
 # CONFIG_FEATURE_SHARED_BUSYBOX is not set
-CONFIG_LFS=y
+# CONFIG_LFS is not set
 CONFIG_BUILD_AT_ONCE=y
 
 #
@@ -50,7 +49,7 @@ CONFIG_BUILD_AT_ONCE=y
 #
 # CONFIG_DEBUG is not set
 # CONFIG_WERROR is not set
-CONFIG_NO_DEBUG_LIB=y
+# CONFIG_NO_DEBUG_LIB is not set
 # CONFIG_DMALLOC is not set
 # CONFIG_EFENCE is not set
 CONFIG_INCLUDE_SUSv2=y
@@ -62,17 +61,14 @@ CONFIG_INCLUDE_SUSv2=y
 CONFIG_INSTALL_APPLET_SYMLINKS=y
 # CONFIG_INSTALL_APPLET_HARDLINKS is not set
 # CONFIG_INSTALL_APPLET_DONT is not set
-CONFIG_PREFIX="/home/ulf/projects/Buildroot/20070926/buildroot/project_build_arm_wchar/at91rm9200df/root"
+CONFIG_PREFIX="./_install"
 
 #
 # Busybox Library Tuning
 #
 CONFIG_PASSWORD_MINLEN=6
 CONFIG_MD5_SIZE_VS_SPEED=2
-# CONFIG_FEATURE_FAST_TOP is not set
-# CONFIG_FEATURE_ETC_NETWORKS is not set
 CONFIG_FEATURE_EDITING=y
-CONFIG_FEATURE_EDITING_MAX_LEN=1024
 CONFIG_FEATURE_EDITING_FANCY_KEYS=y
 CONFIG_FEATURE_EDITING_VI=y
 CONFIG_FEATURE_EDITING_HISTORY=999
@@ -80,8 +76,6 @@ CONFIG_FEATURE_EDITING_SAVEHISTORY=y
 CONFIG_FEATURE_TAB_COMPLETION=y
 # CONFIG_FEATURE_USERNAME_COMPLETION is not set
 CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
-CONFIG_MONOTONIC_SYSCALL=y
-CONFIG_IOCTL_HEX2STR_ERROR=y
 
 #
 # Applets
@@ -102,7 +96,6 @@ CONFIG_GUNZIP=y
 CONFIG_GZIP=y
 # CONFIG_RPM2CPIO is not set
 # CONFIG_RPM is not set
-# CONFIG_FEATURE_RPM_BZ2 is not set
 CONFIG_TAR=y
 CONFIG_FEATURE_TAR_CREATE=y
 CONFIG_FEATURE_TAR_BZIP2=y
@@ -111,7 +104,6 @@ CONFIG_FEATURE_TAR_FROM=y
 CONFIG_FEATURE_TAR_GZIP=y
 # CONFIG_FEATURE_TAR_COMPRESS is not set
 # CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set
-# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
 CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
 CONFIG_FEATURE_TAR_LONG_OPTIONS=y
 # CONFIG_UNCOMPRESS is not set
@@ -139,6 +131,7 @@ CONFIG_CHMOD=y
 CONFIG_CHOWN=y
 CONFIG_CHROOT=y
 CONFIG_CKSUM=y
+CONFIG_CMP=y
 # CONFIG_COMM is not set
 CONFIG_CP=y
 CONFIG_CUT=y
@@ -148,6 +141,10 @@ CONFIG_DD=y
 CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
 CONFIG_FEATURE_DD_IBS_OBS=y
 CONFIG_DF=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+# CONFIG_FEATURE_DIFF_MINIMAL is not set
 CONFIG_DIRNAME=y
 CONFIG_DOS2UNIX=y
 CONFIG_UNIX2DOS=y
@@ -157,8 +154,6 @@ CONFIG_ECHO=y
 CONFIG_FEATURE_FANCY_ECHO=y
 CONFIG_ENV=y
 # CONFIG_FEATURE_ENV_LONG_OPTIONS is not set
-# CONFIG_EXPAND is not set
-# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
 CONFIG_EXPR=y
 CONFIG_EXPR_MATH_SUPPORT_64=y
 CONFIG_FALSE=y
@@ -194,8 +189,6 @@ CONFIG_OD=y
 CONFIG_PRINTENV=y
 CONFIG_PRINTF=y
 CONFIG_PWD=y
-CONFIG_READLINK=y
-CONFIG_FEATURE_READLINK_FOLLOW=y
 CONFIG_REALPATH=y
 CONFIG_RM=y
 CONFIG_RMDIR=y
@@ -205,8 +198,6 @@ CONFIG_SLEEP=y
 # CONFIG_FEATURE_FANCY_SLEEP is not set
 CONFIG_SORT=y
 CONFIG_FEATURE_SORT_BIG=y
-# CONFIG_SPLIT is not set
-# CONFIG_FEATURE_SPLIT_FANCY is not set
 # CONFIG_STAT is not set
 # CONFIG_FEATURE_STAT_FORMAT is not set
 CONFIG_STTY=y
@@ -225,12 +216,11 @@ CONFIG_FEATURE_TR_EQUIV=y
 CONFIG_TRUE=y
 CONFIG_TTY=y
 CONFIG_UNAME=y
-# CONFIG_UNEXPAND is not set
-# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
 CONFIG_UNIQ=y
 CONFIG_USLEEP=y
 CONFIG_UUDECODE=y
 CONFIG_UUENCODE=y
+CONFIG_WATCH=y
 CONFIG_WC=y
 # CONFIG_FEATURE_WC_LARGE is not set
 CONFIG_WHO=y
@@ -280,9 +270,10 @@ CONFIG_SETLOGCONS=y
 #
 CONFIG_MKTEMP=y
 CONFIG_PIPE_PROGRESS=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
 CONFIG_RUN_PARTS=y
 CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
-# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
 CONFIG_START_STOP_DAEMON=y
 CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
 CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
@@ -293,16 +284,10 @@ CONFIG_WHICH=y
 #
 CONFIG_AWK=y
 CONFIG_FEATURE_AWK_MATH=y
-CONFIG_CMP=y
-CONFIG_DIFF=y
-CONFIG_FEATURE_DIFF_BINARY=y
-CONFIG_FEATURE_DIFF_DIR=y
-# CONFIG_FEATURE_DIFF_MINIMAL is not set
 # CONFIG_ED is not set
 CONFIG_PATCH=y
 CONFIG_SED=y
 CONFIG_VI=y
-CONFIG_FEATURE_VI_MAX_LEN=1024
 CONFIG_FEATURE_VI_COLON=y
 CONFIG_FEATURE_VI_YANKMARK=y
 CONFIG_FEATURE_VI_SEARCH=y
@@ -325,21 +310,11 @@ CONFIG_FEATURE_FIND_MMIN=y
 CONFIG_FEATURE_FIND_PERM=y
 CONFIG_FEATURE_FIND_TYPE=y
 CONFIG_FEATURE_FIND_XDEV=y
-CONFIG_FEATURE_FIND_MAXDEPTH=y
 CONFIG_FEATURE_FIND_NEWER=y
 # CONFIG_FEATURE_FIND_INUM is not set
 CONFIG_FEATURE_FIND_EXEC=y
 CONFIG_FEATURE_FIND_USER=y
-CONFIG_FEATURE_FIND_GROUP=y
 CONFIG_FEATURE_FIND_NOT=y
-CONFIG_FEATURE_FIND_DEPTH=y
-CONFIG_FEATURE_FIND_PAREN=y
-CONFIG_FEATURE_FIND_SIZE=y
-CONFIG_FEATURE_FIND_PRUNE=y
-# CONFIG_FEATURE_FIND_DELETE is not set
-CONFIG_FEATURE_FIND_PATH=y
-CONFIG_FEATURE_FIND_REGEX=y
-# CONFIG_FEATURE_FIND_CONTEXT is not set
 CONFIG_GREP=y
 CONFIG_FEATURE_GREP_EGREP_ALIAS=y
 CONFIG_FEATURE_GREP_FGREP_ALIAS=y
@@ -371,23 +346,17 @@ CONFIG_FEATURE_SHADOWPASSWDS=y
 # CONFIG_USE_BB_SHADOW is not set
 # CONFIG_USE_BB_PWD_GRP is not set
 CONFIG_ADDGROUP=y
-# CONFIG_FEATURE_ADDUSER_TO_GROUP is not set
 CONFIG_DELGROUP=y
-# CONFIG_FEATURE_DEL_USER_FROM_GROUP is not set
 CONFIG_ADDUSER=y
 CONFIG_DELUSER=y
 CONFIG_GETTY=y
 CONFIG_FEATURE_UTMP=y
 CONFIG_FEATURE_WTMP=y
 CONFIG_LOGIN=y
-# CONFIG_PAM is not set
 # CONFIG_LOGIN_SCRIPTS is not set
-CONFIG_FEATURE_NOLOGIN=y
 CONFIG_FEATURE_SECURETTY=y
 CONFIG_PASSWD=y
 CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
-# CONFIG_CRYPTPW is not set
-# CONFIG_CHPASSWD is not set
 CONFIG_SU=y
 CONFIG_FEATURE_SU_SYSLOG=y
 CONFIG_FEATURE_SU_CHECKS_SHELLS=y
@@ -437,7 +406,7 @@ CONFIG_FDFLUSH=y
 CONFIG_FDFORMAT=y
 # CONFIG_FDISK is not set
 CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
-# CONFIG_FEATURE_FDISK_WRITABLE is not set
+CONFIG_FEATURE_FDISK_WRITABLE=y
 # CONFIG_FEATURE_AIX_LABEL is not set
 # CONFIG_FEATURE_SGI_LABEL is not set
 # CONFIG_FEATURE_SUN_LABEL is not set
@@ -458,7 +427,6 @@ CONFIG_LOSETUP=y
 CONFIG_MDEV=y
 CONFIG_FEATURE_MDEV_CONF=y
 CONFIG_FEATURE_MDEV_EXEC=y
-# CONFIG_FEATURE_MDEV_LOAD_FIRMWARE is not set
 CONFIG_MKSWAP=y
 # CONFIG_FEATURE_MKSWAP_V0 is not set
 CONFIG_MORE=y
@@ -520,6 +488,7 @@ CONFIG_MAKEDEVS=y
 CONFIG_FEATURE_MAKEDEVS_TABLE=y
 CONFIG_MOUNTPOINT=y
 CONFIG_MT=y
+# CONFIG_NMETER is not set
 # CONFIG_RAIDAUTORUN is not set
 # CONFIG_READAHEAD is not set
 CONFIG_RUNLEVEL=y
@@ -529,13 +498,12 @@ CONFIG_SETSID=y
 CONFIG_TASKSET=y
 CONFIG_FEATURE_TASKSET_FANCY=y
 CONFIG_TIME=y
-# CONFIG_TTYSIZE is not set
 CONFIG_WATCHDOG=y
 
 #
 # Networking Utilities
 #
-CONFIG_FEATURE_IPV6=y
+# CONFIG_FEATURE_IPV6 is not set
 # CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
 # CONFIG_ARP is not set
 CONFIG_ARPING=y
@@ -547,7 +515,6 @@ CONFIG_ETHER_WAKE=y
 # CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
 CONFIG_HOSTNAME=y
 # CONFIG_HTTPD is not set
-# CONFIG_FEATURE_HTTPD_USE_SENDFILE is not set
 # CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP is not set
 # CONFIG_FEATURE_HTTPD_SETUID is not set
 # CONFIG_FEATURE_HTTPD_BASIC_AUTH is not set
@@ -557,7 +524,6 @@ CONFIG_HOSTNAME=y
 # CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR is not set
 # CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV is not set
 # CONFIG_FEATURE_HTTPD_ENCODE_URL_STR is not set
-# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
 CONFIG_IFCONFIG=y
 CONFIG_FEATURE_IFCONFIG_STATUS=y
 CONFIG_FEATURE_IFCONFIG_SLIP=y
@@ -565,14 +531,13 @@ CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ=y
 CONFIG_FEATURE_IFCONFIG_HW=y
 # CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
 CONFIG_IFUPDOWN=y
-CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
 CONFIG_FEATURE_IFUPDOWN_IP=y
 # CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
 # CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN is not set
 CONFIG_FEATURE_IFUPDOWN_IPV4=y
 # CONFIG_FEATURE_IFUPDOWN_IPV6 is not set
+# CONFIG_FEATURE_IFUPDOWN_IPX is not set
 CONFIG_FEATURE_IFUPDOWN_MAPPING=y
-# CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP is not set
 CONFIG_INETD=y
 CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
 CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
@@ -600,14 +565,11 @@ CONFIG_NAMEIF=y
 # CONFIG_NC_SERVER is not set
 # CONFIG_NC_EXTRA is not set
 CONFIG_NETSTAT=y
-# CONFIG_FEATURE_NETSTAT_WIDE is not set
 CONFIG_NSLOOKUP=y
 CONFIG_PING=y
 # CONFIG_PING6 is not set
-# CONFIG_PSCAN is not set
 CONFIG_FEATURE_FANCY_PING=y
 CONFIG_ROUTE=y
-# CONFIG_SLATTACH is not set
 CONFIG_TELNET=y
 CONFIG_FEATURE_TELNET_TTYPE=y
 CONFIG_FEATURE_TELNET_AUTOLOGIN=y
@@ -625,8 +587,8 @@ CONFIG_TRACEROUTE=y
 CONFIG_APP_UDHCPD=y
 CONFIG_APP_DHCPRELAY=y
 CONFIG_APP_DUMPLEASES=y
-# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
 CONFIG_APP_UDHCPC=y
+CONFIG_FEATURE_UDHCP_SYSLOG=y
 # CONFIG_FEATURE_UDHCP_DEBUG is not set
 # CONFIG_FEATURE_RFC3397 is not set
 CONFIG_VCONFIG=y
@@ -644,7 +606,6 @@ CONFIG_FUSER=y
 CONFIG_KILL=y
 CONFIG_KILLALL=y
 CONFIG_KILLALL5=y
-# CONFIG_NMETER is not set
 CONFIG_PIDOF=y
 CONFIG_FEATURE_PIDOF_SINGLE=y
 CONFIG_FEATURE_PIDOF_OMIT=y
@@ -654,10 +615,7 @@ CONFIG_RENICE=y
 CONFIG_BB_SYSCTL=y
 CONFIG_TOP=y
 CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
-CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
-# CONFIG_FEATURE_TOP_DECIMALS is not set
 CONFIG_UPTIME=y
-CONFIG_WATCH=y
 
 #
 # Shells
@@ -687,12 +645,6 @@ CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
 CONFIG_ASH_RANDOM_SUPPORT=y
 CONFIG_ASH_EXPAND_PRMT=y
 # CONFIG_HUSH is not set
-# CONFIG_HUSH_HELP is not set
-# CONFIG_HUSH_INTERACTIVE is not set
-# CONFIG_HUSH_JOB is not set
-# CONFIG_HUSH_TICK is not set
-# CONFIG_HUSH_IF is not set
-# CONFIG_HUSH_LOOPS is not set
 # CONFIG_LASH is not set
 # CONFIG_MSH is not set
 
@@ -700,8 +652,7 @@ CONFIG_ASH_EXPAND_PRMT=y
 # Bourne Shell Options
 #
 CONFIG_FEATURE_SH_EXTRA_QUIET=y
-# CONFIG_FEATURE_SH_STANDALONE is not set
-# CONFIG_CTTYHACK is not set
+# CONFIG_FEATURE_SH_STANDALONE_SHELL is not set
 
 #
 # System Logging Utilities
@@ -732,18 +683,8 @@ CONFIG_LOGGER=y
 # CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
 # CONFIG_GETENFORCE is not set
 # CONFIG_GETSEBOOL is not set
-# CONFIG_LOAD_POLICY is not set
 # CONFIG_MATCHPATHCON is not set
-# CONFIG_RESTORECON is not set
 # CONFIG_RUNCON is not set
 # CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
 # CONFIG_SELINUXENABLED is not set
 # CONFIG_SETENFORCE is not set
-# CONFIG_SETFILES is not set
-# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
-
-#
-# ipsvd utilities
-#
-# CONFIG_TCPSVD is not set
-# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/at91sam9260dfc/Makefile.in b/target/device/Atmel/at91sam9260dfc/Makefile.in
index 7b095df1b..c4839bf0e 100644
--- a/target/device/Atmel/at91sam9260dfc/Makefile.in
+++ b/target/device/Atmel/at91sam9260dfc/Makefile.in
@@ -1,4 +1,5 @@
-ifeq ($(BOARD_NAME),at91sam9260dfc)
+ifeq ($(strip$(BOARD_NAME)),at91sam9260dfc)
 LINUX26_BOARD_NAME=at91sam9260ek
-BR2_PACKAGE_BUSYBOX_CONFIG:=$(BR2_BOARD_PATH)/busybox-1.6.0.config
 endif
+
+
diff --git a/target/device/Atmel/at91sam9261ek/Makefile.in b/target/device/Atmel/at91sam9261ek/Makefile.in
index 0d716ba4b..64b87f79b 100644
--- a/target/device/Atmel/at91sam9261ek/Makefile.in
+++ b/target/device/Atmel/at91sam9261ek/Makefile.in
@@ -1,3 +1,2 @@
-ifeq ($(BOARD_NAME),at91sam9261ek)
-BR2_PACKAGE_BUSYBOX_CONFIG:=$(BR2_BOARD_PATH)/busybox-1.6.0.config
+ifeq ($(strip $(BOARD_NAME)),at91sam9261ek)
 endif
diff --git a/target/device/Atmel/at91sam9263ek/Makefile.in b/target/device/Atmel/at91sam9263ek/Makefile.in
index d21e38787..16019f521 100644
--- a/target/device/Atmel/at91sam9263ek/Makefile.in
+++ b/target/device/Atmel/at91sam9263ek/Makefile.in
@@ -1,3 +1,2 @@
-ifeq ($(BOARD_NAME),at91sam9263ek)
-BR2_PACKAGE_BUSYBOX_CONFIG:=$(BR2_BOARD_PATH)/busybox-1.6.0.config
+ifeq ($(strip $(BOARD_NAME)),at91sam9263ek)
 endif
diff --git a/target/device/Atmel/atngw100-base/Makefile.in b/target/device/Atmel/atngw100-base/Makefile.in
new file mode 100644
index 000000000..b74e4984b
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/Makefile.in
@@ -0,0 +1,6 @@
+ifeq ($(strip $(BR2_TARGET_AVR32_ATNGW100_BASE)),y)
+ATNGW100_BASE_PATH=target/device/Atmel/atngw100-base
+
+TARGET_SKELETON=$(ATNGW100_BASE_PATH)/target_skeleton
+TARGET_DEVICE_TABLE=$(ATNGW100_BASE_PATH)/device_table.txt
+endif
diff --git a/target/device/Atmel/atngw100-base/atngw100-base-linux-2.6.23.config b/target/device/Atmel/atngw100-base/atngw100-base-linux-2.6.23.config
new file mode 100644
index 000000000..0cbe476d7
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/atngw100-base-linux-2.6.23.config
@@ -0,0 +1,858 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+# CONFIG_TASK_XACCT is not set
+# CONFIG_USER_NS is not set
+CONFIG_AUDIT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_CPU_AT32AP7001 is not set
+# CONFIG_CPU_AT32AP7002 is not set
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_GPIO_DEV=y
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+CONFIG_DW_DMAC=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_CMDLINE=""
+
+#
+# Power managment options
+#
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x80000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=y
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+CONFIG_USB_G_SERIAL=y
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_ATMELMCI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=y
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+CONFIG_CONFIGFS_FS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_ECB is not set
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_AUDIT_GENERIC=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atngw100-base/atngw100-base-linux-2.6.24.config b/target/device/Atmel/atngw100-base/atngw100-base-linux-2.6.24.config
new file mode 100644
index 000000000..06046074d
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/atngw100-base-linux-2.6.24.config
@@ -0,0 +1,1147 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc7
+# Wed Jan  9 23:20:41 2008
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_CMDLINE=""
+
+#
+# Power management options
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_STAT is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_AT32AP=y
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+CONFIG_NF_CONNTRACK_ENABLED=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+CONFIG_NF_CT_PROTO_GRE=m
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x80000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=y
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_SPI=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=y
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=m
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+CONFIG_INSTRUMENTATION=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_KPROBES=y
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_FORCED_INLINING is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atngw100-base/busybox-1.7.2.config b/target/device/Atmel/atngw100-base/busybox-1.7.2.config
new file mode 100644
index 000000000..585827282
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/busybox-1.7.2.config
@@ -0,0 +1,741 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.7.2
+# Wed Oct 31 15:54:13 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+# CONFIG_STATIC is not set
+# CONFIG_BUILD_LIBBUSYBOX is not set
+# CONFIG_FEATURE_FULL_LIBBUSYBOX is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+CONFIG_BUILD_AT_ONCE=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+CONFIG_PREFIX="/home/avr23/buildroot/project_build_avr32_nofpu/atngw100-base/root"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=15
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+# CONFIG_FEATURE_EDITING_FANCY_PROMPT is not set
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+# CONFIG_AR is not set
+# CONFIG_FEATURE_AR_LONG_FILENAMES is not set
+# CONFIG_BUNZIP2 is not set
+# CONFIG_CPIO is not set
+# CONFIG_DPKG is not set
+# CONFIG_DPKG_DEB is not set
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+# CONFIG_GUNZIP is not set
+# CONFIG_FEATURE_GUNZIP_UNCOMPRESS is not set
+# CONFIG_GZIP is not set
+# CONFIG_RPM2CPIO is not set
+# CONFIG_RPM is not set
+# CONFIG_FEATURE_RPM_BZ2 is not set
+# CONFIG_TAR is not set
+# CONFIG_FEATURE_TAR_CREATE is not set
+# CONFIG_FEATURE_TAR_BZIP2 is not set
+# CONFIG_FEATURE_TAR_LZMA is not set
+# CONFIG_FEATURE_TAR_FROM is not set
+# CONFIG_FEATURE_TAR_GZIP is not set
+# CONFIG_FEATURE_TAR_COMPRESS is not set
+# CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set
+# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
+# CONFIG_FEATURE_TAR_GNU_EXTENSIONS is not set
+# CONFIG_FEATURE_TAR_LONG_OPTIONS is not set
+# CONFIG_UNCOMPRESS is not set
+# CONFIG_UNLZMA is not set
+# CONFIG_FEATURE_LZMA_FAST is not set
+# CONFIG_UNZIP is not set
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+# CONFIG_FEATURE_DEB_TAR_GZ is not set
+# CONFIG_FEATURE_DEB_TAR_BZ2 is not set
+# CONFIG_FEATURE_DEB_TAR_LZMA is not set
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+# CONFIG_CATV is not set
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+# CONFIG_CKSUM is not set
+# CONFIG_COMM is not set
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+# CONFIG_FEATURE_DD_SIGNAL_HANDLING is not set
+# CONFIG_FEATURE_DD_IBS_OBS is not set
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+# CONFIG_FEATURE_ENV_LONG_OPTIONS is not set
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+# CONFIG_FOLD is not set
+CONFIG_HEAD=y
+# CONFIG_FEATURE_FANCY_HEAD is not set
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+# CONFIG_FEATURE_INSTALL_LONG_OPTIONS is not set
+# CONFIG_LENGTH is not set
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+# CONFIG_FEATURE_MKDIR_LONG_OPTIONS is not set
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+# CONFIG_FEATURE_MV_LONG_OPTIONS is not set
+CONFIG_NICE=y
+# CONFIG_NOHUP is not set
+# CONFIG_OD is not set
+# CONFIG_PRINTENV is not set
+# CONFIG_PRINTF is not set
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+# CONFIG_REALPATH is not set
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+# CONFIG_FEATURE_FANCY_SLEEP is not set
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+# CONFIG_SPLIT is not set
+# CONFIG_FEATURE_SPLIT_FANCY is not set
+# CONFIG_STAT is not set
+# CONFIG_FEATURE_STAT_FORMAT is not set
+CONFIG_STTY=y
+# CONFIG_SUM is not set
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+# CONFIG_TR is not set
+# CONFIG_FEATURE_TR_CLASSES is not set
+# CONFIG_FEATURE_TR_EQUIV is not set
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+# CONFIG_FEATURE_WC_LARGE is not set
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+# CONFIG_DUMPKMAP is not set
+# CONFIG_LOADFONT is not set
+# CONFIG_LOADKMAP is not set
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+# CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS is not set
+# CONFIG_SETKEYCODES is not set
+# CONFIG_SETLOGCONS is not set
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+# CONFIG_AWK is not set
+# CONFIG_FEATURE_AWK_MATH is not set
+# CONFIG_CMP is not set
+# CONFIG_DIFF is not set
+# CONFIG_FEATURE_DIFF_BINARY is not set
+# CONFIG_FEATURE_DIFF_DIR is not set
+# CONFIG_FEATURE_DIFF_MINIMAL is not set
+# CONFIG_ED is not set
+# CONFIG_PATCH is not set
+# CONFIG_SED is not set
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+# CONFIG_XARGS is not set
+# CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION is not set
+# CONFIG_FEATURE_XARGS_SUPPORT_QUOTES is not set
+# CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT is not set
+# CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM is not set
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+# CONFIG_MESG is not set
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+# CONFIG_FEATURE_WTMP is not set
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+# CONFIG_CHATTR is not set
+# CONFIG_FSCK is not set
+# CONFIG_LSATTR is not set
+
+#
+# Linux Module Utilities
+#
+# CONFIG_INSMOD is not set
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL is not set
+# CONFIG_RMMOD is not set
+# CONFIG_LSMOD is not set
+# CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT is not set
+# CONFIG_MODPROBE is not set
+# CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS is not set
+# CONFIG_FEATURE_MODPROBE_FANCY_ALIAS is not set
+# CONFIG_FEATURE_CHECK_TAINTED_MODULE is not set
+# CONFIG_FEATURE_2_4_MODULES is not set
+# CONFIG_FEATURE_2_6_MODULES is not set
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+# CONFIG_FBSET is not set
+# CONFIG_FEATURE_FBSET_FANCY is not set
+# CONFIG_FEATURE_FBSET_READMODE is not set
+# CONFIG_FDFLUSH is not set
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+# CONFIG_LOSETUP is not set
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+# CONFIG_FEATURE_MDEV_LOAD_FIRMWARE is not set
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+# CONFIG_READPROFILE is not set
+# CONFIG_SETARCH is not set
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+# CONFIG_FEATURE_MTAB_SUPPORT is not set
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+# CONFIG_BBCONFIG is not set
+# CONFIG_CHRT is not set
+# CONFIG_CROND is not set
+# CONFIG_DEBUG_CROND_OPTION is not set
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+# CONFIG_CRONTAB is not set
+# CONFIG_DC is not set
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+# CONFIG_LAST is not set
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+# CONFIG_FEATURE_LESS_BRACKETS is not set
+# CONFIG_FEATURE_LESS_FLAGS is not set
+# CONFIG_FEATURE_LESS_FLAGCS is not set
+# CONFIG_FEATURE_LESS_MARKS is not set
+CONFIG_FEATURE_LESS_REGEXP=y
+# CONFIG_HDPARM is not set
+# CONFIG_FEATURE_HDPARM_GET_IDENTITY is not set
+# CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set
+# CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA is not set
+# CONFIG_MAKEDEVS is not set
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+# CONFIG_FEATURE_MAKEDEVS_TABLE is not set
+# CONFIG_MOUNTPOINT is not set
+# CONFIG_MT is not set
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+# CONFIG_RUNLEVEL is not set
+CONFIG_RX=y
+CONFIG_STRINGS=y
+# CONFIG_SETSID is not set
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+# CONFIG_TTYSIZE is not set
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+# CONFIG_DNSD is not set
+# CONFIG_ETHER_WAKE is not set
+# CONFIG_FAKEIDENTD is not set
+# CONFIG_FTPGET is not set
+# CONFIG_FTPPUT is not set
+# CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
+CONFIG_HOSTNAME=y
+# CONFIG_HTTPD is not set
+# CONFIG_FEATURE_HTTPD_USE_SENDFILE is not set
+# CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP is not set
+# CONFIG_FEATURE_HTTPD_SETUID is not set
+# CONFIG_FEATURE_HTTPD_BASIC_AUTH is not set
+# CONFIG_FEATURE_HTTPD_AUTH_MD5 is not set
+# CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES is not set
+# CONFIG_FEATURE_HTTPD_CGI is not set
+# CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR is not set
+# CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV is not set
+# CONFIG_FEATURE_HTTPD_ENCODE_URL_STR is not set
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+# CONFIG_INETD is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN is not set
+# CONFIG_FEATURE_INETD_RPC is not set
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+# CONFIG_PSCAN is not set
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+# CONFIG_FEATURE_TELNET_AUTOLOGIN is not set
+# CONFIG_TELNETD is not set
+# CONFIG_FEATURE_TELNETD_STANDALONE is not set
+# CONFIG_TFTP is not set
+# CONFIG_FEATURE_TFTP_GET is not set
+# CONFIG_FEATURE_TFTP_PUT is not set
+# CONFIG_FEATURE_TFTP_BLOCKSIZE is not set
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+# CONFIG_APP_UDHCPD is not set
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+# CONFIG_FUSER is not set
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+# CONFIG_NMETER is not set
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+# CONFIG_RENICE is not set
+# CONFIG_BB_SYSCTL is not set
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+# CONFIG_FEATURE_TOP_DECIMALS is not set
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+# CONFIG_ASH_GETOPTS is not set
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-base/busybox-1.8.0.config b/target/device/Atmel/atngw100-base/busybox-1.8.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/busybox-1.8.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-base/busybox-1.9.0.config b/target/device/Atmel/atngw100-base/busybox-1.9.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/busybox-1.9.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-base/busybox-1.9.1.config b/target/device/Atmel/atngw100-base/busybox-1.9.1.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/busybox-1.9.1.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-base/device_table.txt b/target/device/Atmel/atngw100-base/device_table.txt
new file mode 100644
index 000000000..56616edd6
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/device_table.txt
@@ -0,0 +1,56 @@
+# When building a target filesystem, it is desirable to not have to become
+# root and then run 'mknod' a thousand times. Using a device table you can
+# create device nodes and directories "on the fly".
+#
+# This is a sample device table file for use with genext2fs. You can do all
+# sorts of interesting things with a device table file.  For example, if you
+# want to adjust the permissions on a particular file you can just add an
+# entry like:
+#   /sbin/foobar        f       2755    0       0       -       -       -       -       -
+# and (assuming the file /sbin/foobar exists) it will be made setuid root
+# (regardless of what its permissions are on the host filesystem.
+# Furthermore, you can use a single table entry to create a many device
+# minors. For example, if I wanted to create /dev/hda and /dev/hda[0-15] I
+# could just use the following two table entries:
+#   /dev/hda    b       640     0       0       3       0       0       0       -
+#   /dev/hda    b       640     0       0       3       1       1       1       15
+#
+# Device table entries take the form of:
+# <name>    <type>      <mode>  <uid>   <gid>   <major> <minor> <start> <inc>   <count>
+# where name is the file name,  type can be one of:
+#       f       A regular file
+#       d       Directory
+#       c       Character special device file
+#       b       Block special device file
+#       p       Fifo (named pipe)
+# uid is the user id for the target file, gid is the group id for the target
+# file.  The rest of the entries (major, minor, etc) apply only to device
+# special files.
+
+#<name>		<type>	<mode>	<uid>	<gid>	<major>	<minor>	<start>	<inc>	<count>
+/dev		d	755	0	0	-	-	-	-	-
+/dev/null	c	666	0	0	1	3	0	0	-
+/dev/console	c	666	0	0	5	1	-	-	-
+
+/tmp		d	1777	0	0	-	-	-	-	-
+/etc		d	755	0	0	-	-	-	-	-
+/sys		d	755	0	0	-	-	-	-	-
+/config		d	755	0	0	-	-	-	-	-
+/proc		d	755	0	0	-	-	-	-	-
+/lost+found	d	700	0	0	-	-	-	-	-
+/var/lock	d	1777	0	0	-	-	-	-	-
+/var/log	d	755	0	0	-	-	-	-	-
+/var/run	d	1777	0	0	-	-	-	-	-
+/var/tmp	d	1777	0	0	-	-	-	-	-
+/home/default	d	2755	1000	1000	-	-	-	-	-
+/media		d	755	0	0	-	-	-	-	-
+/www		d	755	0	0	-	-	-	-	-
+
+#<name>					<type>	<mode>	<uid>	<gid>	<major>	<minor>	<start>	<inc>	<count>
+/bin/busybox				f	4755	0	0	-	-	-	-	-
+/etc/shadow				f	600	0	0	-	-	-	-	-
+/etc/passwd				f	644	0	0	-	-	-	-	-
+/etc/network/if-up.d			d	755	0	0	-	-	-	-	-
+/etc/network/if-pre-up.d		d	755	0	0	-	-	-	-	-
+/etc/network/if-down.d			d	755	0	0	-	-	-	-	-
+/etc/network/if-post-down.d		d	755	0	0	-	-	-	-	-
diff --git a/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
new file mode 100644
index 000000000..1f0a5f542
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
@@ -0,0 +1,19857 @@
+ MAINTAINERS                                |    7 +
+ Makefile                                   |    2 +-
+ arch/avr32/Kconfig                         |   34 +-
+ arch/avr32/Makefile                        |    3 +-
+ arch/avr32/boards/atngw100/Kconfig         |   12 +
+ arch/avr32/boards/atngw100/flash.c         |    5 +-
+ arch/avr32/boards/atngw100/setup.c         |   26 +-
+ arch/avr32/boards/atstk1000/Kconfig        |   82 +-
+ arch/avr32/boards/atstk1000/Makefile       |    2 +
+ arch/avr32/boards/atstk1000/atstk1000.h    |    2 +
+ arch/avr32/boards/atstk1000/atstk1002.c    |  148 ++-
+ arch/avr32/boards/atstk1000/atstk1003.c    |  181 +++
+ arch/avr32/boards/atstk1000/atstk1004.c    |  152 +++
+ arch/avr32/boards/atstk1000/flash.c        |    5 +-
+ arch/avr32/boards/atstk1000/setup.c        |   64 +
+ arch/avr32/configs/atngw100_defconfig      |  210 +++-
+ arch/avr32/configs/atstk1002_defconfig     |  482 +++++--
+ arch/avr32/configs/atstk1003_defconfig     | 1045 ++++++++++++++
+ arch/avr32/configs/atstk1004_defconfig     |  722 ++++++++++
+ arch/avr32/drivers/Makefile                |    1 +
+ arch/avr32/drivers/dw-dmac.c               |  761 +++++++++++
+ arch/avr32/drivers/dw-dmac.h               |   42 +
+ arch/avr32/kernel/Makefile                 |    6 +-
+ arch/avr32/kernel/dma-controller.c         |   34 +
+ arch/avr32/kernel/entry-avr32b.S           |   26 +-
+ arch/avr32/kernel/setup.c                  |    2 +-
+ arch/avr32/kernel/vmlinux.lds.S            |  143 ++
+ arch/avr32/kernel/vmlinux.lds.c            |  142 --
+ arch/avr32/mach-at32ap/Kconfig             |   19 +-
+ arch/avr32/mach-at32ap/Makefile            |    5 +-
+ arch/avr32/mach-at32ap/at32ap7000.c        | 1324 ------------------
+ arch/avr32/mach-at32ap/at32ap700x.c        | 1754 ++++++++++++++++++++++++
+ arch/avr32/mach-at32ap/clock.c             |  116 ++
+ arch/avr32/mach-at32ap/gpio-dev.c          |  573 ++++++++
+ arch/avr32/mach-at32ap/hsmc.c              |  129 ++-
+ arch/avr32/mach-at32ap/pio.c               |   80 ++
+ arch/avr32/mach-at32ap/pm.h                |    8 +
+ arch/avr32/mm/dma-coherent.c               |    7 +
+ arch/avr32/mm/init.c                       |   12 +-
+ drivers/char/watchdog/Kconfig              |    2 +-
+ drivers/char/watchdog/at32ap700x_wdt.c     |   69 +-
+ drivers/i2c/busses/Kconfig                 |    8 +
+ drivers/i2c/busses/Makefile                |    1 +
+ drivers/i2c/busses/i2c-atmeltwi.c          |  436 ++++++
+ drivers/i2c/busses/i2c-atmeltwi.h          |  117 ++
+ drivers/misc/Kconfig                       |    9 +
+ drivers/misc/Makefile                      |    1 +
+ drivers/misc/atmel-ssc.c                   |  174 +++
+ drivers/mmc/host/Kconfig                   |   10 +
+ drivers/mmc/host/Makefile                  |    1 +
+ drivers/mmc/host/atmel-mci.c               | 1176 ++++++++++++++++
+ drivers/mmc/host/atmel-mci.h               |  192 +++
+ drivers/mtd/chips/cfi_cmdset_0001.c        |   43 +
+ drivers/mtd/chips/cfi_cmdset_0002.c        |    6 +-
+ drivers/pcmcia/Kconfig                     |    7 +
+ drivers/pcmcia/Makefile                    |    1 +
+ drivers/pcmcia/at32_cf.c                   |  531 ++++++++
+ drivers/pcmcia/cistpl.c                    |   48 +-
+ drivers/spi/atmel_spi.c                    |    4 +-
+ drivers/usb/gadget/Kconfig                 |   26 +-
+ drivers/usb/gadget/Makefile                |    1 +
+ drivers/usb/gadget/atmel_usba_udc.c        | 2038 ++++++++++++++++++++++++++++
+ drivers/usb/gadget/atmel_usba_udc.h        |  350 +++++
+ drivers/video/atmel_lcdfb.c                |    6 +-
+ drivers/video/backlight/Kconfig            |   12 +
+ drivers/video/backlight/Makefile           |    2 +
+ drivers/video/backlight/ltv350qv.c         |  339 +++++
+ drivers/video/backlight/ltv350qv.h         |   95 ++
+ include/asm-avr32/arch-at32ap/at32ap7000.h |   35 -
+ include/asm-avr32/arch-at32ap/at32ap700x.h |   35 +
+ include/asm-avr32/arch-at32ap/board.h      |   39 +
+ include/asm-avr32/arch-at32ap/cpu.h        |    2 +-
+ include/asm-avr32/arch-at32ap/io.h         |    4 +-
+ include/asm-avr32/arch-at32ap/portmux.h    |   13 +
+ include/asm-avr32/arch-at32ap/smc.h        |   51 +-
+ include/asm-avr32/dma-controller.h         |  166 +++
+ include/asm-avr32/dma-mapping.h            |   17 +-
+ include/asm-avr32/system.h                 |   13 +-
+ include/asm-avr32/unistd.h                 |   13 +
+ include/linux/atmel-ssc.h                  |  312 +++++
+ include/linux/spi/at73c213.h               |   25 +
+ include/pcmcia/cs_types.h                  |    2 +-
+ init/do_mounts.c                           |    8 +-
+ scripts/checkstack.pl                      |    5 +
+ sound/Kconfig                              |    6 +
+ sound/Makefile                             |    3 +-
+ sound/avr32/Kconfig                        |   11 +
+ sound/avr32/Makefile                       |    3 +
+ sound/avr32/ac97c.c                        |  914 +++++++++++++
+ sound/avr32/ac97c.h                        |   71 +
+ sound/oss/Kconfig                          |    4 +
+ sound/oss/Makefile                         |    1 +
+ sound/oss/at32_abdac.c                     |  722 ++++++++++
+ sound/oss/at32_abdac.h                     |   59 +
+ sound/spi/Kconfig                          |   31 +
+ sound/spi/Makefile                         |    5 +
+ sound/spi/at73c213.c                       | 1121 +++++++++++++++
+ sound/spi/at73c213.h                       |  119 ++
+ 98 files changed, 16057 insertions(+), 1826 deletions(-)
+ create mode 100644 arch/avr32/boards/atngw100/Kconfig
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c
+ create mode 100644 arch/avr32/configs/atstk1003_defconfig
+ create mode 100644 arch/avr32/configs/atstk1004_defconfig
+ create mode 100644 arch/avr32/drivers/Makefile
+ create mode 100644 arch/avr32/drivers/dw-dmac.c
+ create mode 100644 arch/avr32/drivers/dw-dmac.h
+ create mode 100644 arch/avr32/kernel/dma-controller.c
+ create mode 100644 arch/avr32/kernel/vmlinux.lds.S
+ delete mode 100644 arch/avr32/kernel/vmlinux.lds.c
+ delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c
+ create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c
+ create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h
+ create mode 100644 drivers/misc/atmel-ssc.c
+ create mode 100644 drivers/mmc/host/atmel-mci.c
+ create mode 100644 drivers/mmc/host/atmel-mci.h
+ create mode 100644 drivers/pcmcia/at32_cf.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.h
+ create mode 100644 drivers/video/backlight/ltv350qv.c
+ create mode 100644 drivers/video/backlight/ltv350qv.h
+ delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h
+ create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h
+ create mode 100644 include/asm-avr32/dma-controller.h
+ create mode 100644 include/linux/atmel-ssc.h
+ create mode 100644 include/linux/spi/at73c213.h
+ create mode 100644 sound/avr32/Kconfig
+ create mode 100644 sound/avr32/Makefile
+ create mode 100644 sound/avr32/ac97c.c
+ create mode 100644 sound/avr32/ac97c.h
+ create mode 100644 sound/oss/at32_abdac.c
+ create mode 100644 sound/oss/at32_abdac.h
+ create mode 100644 sound/spi/Kconfig
+ create mode 100644 sound/spi/Makefile
+ create mode 100644 sound/spi/at73c213.c
+ create mode 100644 sound/spi/at73c213.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 9a91d9e..587afe3 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -669,6 +669,13 @@ P:	Haavard Skinnemoen
+ M:	hskinnemoen@atmel.com
+ S:	Supported
+ 
++ATMEL USBA UDC DRIVER
++P:	Haavard Skinnemoen
++M:	hskinnemoen@atmel.com
++L:	kernel@avr32linux.org
++W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
++S:	Supported
++
+ ATMEL WIRELESS DRIVER
+ P:	Simon Kelley
+ M:	simon@thekelleys.org.uk
+diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
+index d12346a..62913a4 100644
+--- a/arch/avr32/Kconfig
++++ b/arch/avr32/Kconfig
+@@ -87,19 +87,36 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
++config CPU_AT32AP700X
++	bool
++	select PLATFORM_AT32AP
++
+ choice
+ 	prompt "AVR32 CPU type"
+ 	default CPU_AT32AP7000
+ 
+ config CPU_AT32AP7000
+ 	bool "AT32AP7000"
+-	select PLATFORM_AT32AP
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7001
++	bool "AT32AP7001"
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7002
++	bool "AT32AP7002"
++	select CPU_AT32AP700X
++
+ endchoice
+ 
+ #
+ # CPU Daughterboards for ATSTK1000
+ config BOARD_ATSTK1002
+ 	bool
++config BOARD_ATSTK1003
++	bool
++config BOARD_ATSTK1004
++	bool
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -108,6 +125,8 @@ choice
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+ 	select BOARD_ATSTK1002 if CPU_AT32AP7000
++	select BOARD_ATSTK1003 if CPU_AT32AP7001
++	select BOARD_ATSTK1004 if CPU_AT32AP7002
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
+@@ -116,6 +135,9 @@ endchoice
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -129,15 +151,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -175,6 +197,10 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
+index dc6bc01..96f0030 100644
+--- a/arch/avr32/Makefile
++++ b/arch/avr32/Makefile
+@@ -16,7 +16,7 @@ AFLAGS		+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ CFLAGS		+= $(cpuflags-y)
+ AFLAGS		+= $(cpuflags-y)
+@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/avr32/boards/atngw100/
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
+new file mode 100644
+index 0000000..5d922df
+--- /dev/null
++++ b/arch/avr32/boards/atngw100/Kconfig
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
+index f9b32a8..b07ae63 100644
+--- a/arch/avr32/boards/atngw100/flash.c
++++ b/arch/avr32/boards/atngw100/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+index ef80156..2a5f587 100644
+--- a/arch/avr32/boards/atngw100/setup.c
++++ b/arch/avr32/boards/atngw100/setup.c
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = {
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+-	.sda_pin	= GPIO_PIN_PA(6),
+-	.scl_pin	= GPIO_PIN_PA(7),
++	.sda_pin		= GPIO_PIN_PA(6),
++	.scl_pin		= GPIO_PIN_PA(7),
++	.sda_is_open_drain	= 1,
++	.scl_is_open_drain	= 1,
++	.udelay			= 2,	/* close to 100 kHz */
+ };
+ 
+ static struct platform_device i2c_gpio_device = {
+@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = {
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -154,6 +164,8 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
++	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+@@ -161,9 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
+-	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
+-	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
++	at32_select_gpio(i2c_gpio_data.sda_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
++	at32_select_gpio(i2c_gpio_data.scl_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 718578f..aac73a6 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -1,34 +1,34 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +36,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +66,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile
+index 8e09922..beead86 100644
+--- a/arch/avr32/boards/atstk1000/Makefile
++++ b/arch/avr32/boards/atstk1000/Makefile
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h
+index 9a49ed0..9392d32 100644
+--- a/arch/avr32/boards/atstk1000/atstk1000.h
++++ b/arch/avr32/boards/atstk1000/atstk1000.h
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index c9981b7..d30de89 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -11,17 +11,17 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+ #include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -48,8 +48,24 @@ static struct eth_platform_data __initdata eth_data[2] = {
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
+ 	{
+ 		/* QVGA display */
+ 		.modalias	= "ltv350qv",
+@@ -60,12 +76,30 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_NONE,
++	.wp_pin		= GPIO_PIN_NONE,
++};
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -121,68 +155,44 @@ static void __init set_hw_addr(struct platform_device *pdev)
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
+ }
+-
+ #else
+-static void setup_j2_leds(void)
++static void __init atstk1002_setup_extdac(void)
+ {
++
+ }
+-#endif
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -219,7 +229,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -229,23 +239,35 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, &mci0_data);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+ 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
+ 			     fbmem_start, fbmem_size);
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 
+-	setup_j2_leds();
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+new file mode 100644
+index 0000000..1842b7c
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1002_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1002_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1002_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+new file mode 100644
+index 0000000..96015dd
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
+index aac4300..3d0a102 100644
+--- a/arch/avr32/boards/atstk1000/flash.c
++++ b/arch/avr32/boards/atstk1000/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
+index c9af409..8bedf93 100644
+--- a/arch/avr32/boards/atstk1000/setup.c
++++ b/arch/avr32/boards/atstk1000/setup.c
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
+index b799a68..ca4538b 100644
+--- a/arch/avr32/configs/atngw100_defconfig
++++ b/arch/avr32/configs/atngw100_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.22.atmel.1
++# Thu Jul 12 17:49:20 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -111,17 +111,22 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
++# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -145,6 +150,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -153,6 +159,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -187,13 +214,8 @@ CONFIG_NET_KEY=y
+ # CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ CONFIG_IP_MULTICAST=y
+-CONFIG_IP_ADVANCED_ROUTER=y
+-CONFIG_ASK_IP_FIB_HASH=y
+-# CONFIG_IP_FIB_TRIE is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
+ CONFIG_IP_FIB_HASH=y
+-# CONFIG_IP_MULTIPLE_TABLES is not set
+-# CONFIG_IP_ROUTE_MULTIPATH is not set
+-# CONFIG_IP_ROUTE_VERBOSE is not set
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+@@ -240,6 +262,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -284,6 +307,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -359,13 +383,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -521,7 +551,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # Misc devices
+ #
+-# CONFIG_BLINK is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -545,13 +574,26 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ 
+ #
+ # Ethernet (10 or 100Mbit)
+ #
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -625,7 +667,15 @@ CONFIG_UNIX98_PTYS=y
+ # IPMI
+ #
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++CONFIG_AT32AP700X_WDT_TIMEOUT=2
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+@@ -636,7 +686,42 @@ CONFIG_UNIX98_PTYS=y
+ # TPM devices
+ #
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_ATMELTWI_BAUDRATE=100000
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,7 +740,7 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
+ 
+ #
+ # Dallas's 1-wire bus
+@@ -706,8 +791,41 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
+ 
+ #
+ # LED devices
+@@ -727,27 +845,62 @@ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+ 
++#
++# InfiniBand support
++#
+ 
+ #
+-# LED drivers
++# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+ #
+ 
+ #
+-# LED Triggers
++# Real Time Clock
+ #
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -781,7 +934,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -936,7 +1090,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+-# CONFIG_DEBUG_FS is not set
++CONFIG_DEBUG_FS=y
+ # CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
+index 3b977fd..c3d4c33 100644
+--- a/arch/avr32/configs/atstk1002_defconfig
++++ b/arch/avr32/configs/atstk1002_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.23.atmel.1
++# Tue Oct 16 12:57:22 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -18,20 +18,15 @@ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+@@ -39,7 +34,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
+ CONFIG_TASKSTATS=y
+ CONFIG_TASK_DELAY_ACCT=y
+ # CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
+ CONFIG_AUDIT=y
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
+@@ -63,7 +58,6 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+@@ -74,24 +68,17 @@ CONFIG_SLUB=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+-# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+-# CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
++CONFIG_KMOD=y
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +86,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -114,17 +101,27 @@ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002_CUSTOM is not set
++# CONFIG_BOARD_ATSTK1002_SPI1 is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1002_J2_RGB is not set
++# CONFIG_BOARD_ATSTK1002_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1002_CF_HACKS is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -147,7 +144,9 @@ CONFIG_FLAT_NODE_MEM_MAP=y
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -156,6 +155,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -163,7 +183,16 @@ CONFIG_CMDLINE=""
+ #
+ # PCCARD (PCMCIA/CardBus) support
+ #
+-# CONFIG_PCCARD is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++# CONFIG_PCMCIA_LOAD_CIS is not set
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
+ 
+ #
+ # Executable file formats
+@@ -251,6 +280,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -265,10 +295,6 @@ CONFIG_STANDALONE=y
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -327,6 +353,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +373,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,11 +385,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -381,29 +395,34 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ CONFIG_DUMMY=y
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++CONFIG_LXT_PHY=y
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -413,6 +432,7 @@ CONFIG_MACB=y
+ #
+ # CONFIG_WLAN_PRE80211 is not set
+ # CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
+ # CONFIG_WAN is not set
+ CONFIG_PPP=m
+ # CONFIG_PPP_MULTILINK is not set
+@@ -423,27 +443,56 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_TSDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,34 +521,88 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# IPMI
++# Watchdog Device Drivers
+ #
+-# CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+-# CONFIG_RAW_DRIVER is not set
+ 
+ #
+-# TPM devices
++# PCMCIA character devices
+ #
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
+ 
+ #
+@@ -517,26 +620,110 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+ # CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
+-# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
+ 
+ #
+ # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+@@ -545,34 +732,108 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=m
+ 
+ #
+-# LED devices
++# LED Triggers
+ #
+-# CONFIG_NEW_LEDS is not set
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# LED Triggers
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# InfiniBand support
++# SPI RTC drivers
+ #
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# Platform RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# Real Time Clock
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -588,13 +849,21 @@ CONFIG_UNIX98_PTYS=y
+ #
+ 
+ #
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
+ # File systems
+ #
+-CONFIG_EXT2_FS=m
++CONFIG_EXT2_FS=y
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +878,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -638,7 +907,7 @@ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+ CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++CONFIG_CONFIGFS_FS=y
+ 
+ #
+ # Miscellaneous filesystems
+@@ -683,12 +952,17 @@ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+ # CONFIG_RPCSEC_GSS_KRB5 is not set
+ # CONFIG_RPCSEC_GSS_SPKM3 is not set
+-# CONFIG_SMB_FS is not set
+-# CONFIG_CIFS is not set
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+@@ -758,6 +1032,7 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+@@ -782,10 +1057,6 @@ CONFIG_FORCED_INLINING=y
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+ # CONFIG_CRYPTO is not set
+ 
+ #
+@@ -796,6 +1067,7 @@ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+ # CONFIG_CRC_ITU_T is not set
+ CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
+new file mode 100644
+index 0000000..0dc834f
+--- /dev/null
++++ b/arch/avr32/configs/atstk1003_defconfig
+@@ -0,0 +1,1045 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 10:58:37 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++CONFIG_DEFAULT_NOOP=y
++CONFIG_DEFAULT_IOSCHED="noop"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++CONFIG_CPU_AT32AP7001=y
++# CONFIG_CPU_AT32AP7002 is not set
++CONFIG_BOARD_ATSTK1003=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++CONFIG_PCMCIA_LOAD_CIS=y
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++# CONFIG_BLK_DEV_SD is not set
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++
++#
++# PCMCIA character devices
++#
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++CONFIG_SOUND_PRIME=m
++# CONFIG_SOUND_MSNDCLAS is not set
++# CONFIG_SOUND_MSNDPIN is not set
++CONFIG_SOUND_AT32_ABDAC=m
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=y
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++# CONFIG_NFS_FS is not set
++# CONFIG_NFSD is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_KPROBES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
+new file mode 100644
+index 0000000..b002a46
+--- /dev/null
++++ b/arch/avr32/configs/atstk1004_defconfig
+@@ -0,0 +1,722 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 11:07:19 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++# CONFIG_CPU_AT32AP7001 is not set
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1004=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_BLK_DEV is not set
++# CONFIG_MISC_DEVICES is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_WATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4DEV_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++# CONFIG_MSDOS_FS is not set
++# CONFIG_VFAT_FS is not set
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile
+new file mode 100644
+index 0000000..b429b75
+--- /dev/null
++++ b/arch/avr32/drivers/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c
+new file mode 100644
+index 0000000..224eb30
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.c
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h
+new file mode 100644
+index 0000000..1f67921
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.h
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
+index 90e5aff..1aedaeb 100644
+--- a/arch/avr32/kernel/Makefile
++++ b/arch/avr32/kernel/Makefile
+@@ -9,10 +9,6 @@ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+ obj-y				+= setup.o traps.o semaphore.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+-
+-USE_STANDARD_AS_RULE		:= true
+-
+-%.lds: %.lds.c FORCE
+-	$(call if_changed_dep,cpp_lds_S)
+diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c
+new file mode 100644
+index 0000000..fb654b3
+--- /dev/null
++++ b/arch/avr32/kernel/dma-controller.c
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
+index 42657f1..ccadfd9 100644
+--- a/arch/avr32/kernel/entry-avr32b.S
++++ b/arch/avr32/kernel/entry-avr32b.S
+@@ -159,11 +159,18 @@ handle_vmalloc_miss:
+ 
+ 	.section .scall.text,"ax",@progbits
+ system_call:
++#ifdef CONFIG_PREEMPT
++	mask_interrupts
++#endif
+ 	pushm	r12		/* r12_orig */
+ 	stmts	--sp, r0-lr
+-	zero_fp
++
+ 	mfsr	r0, SYSREG_RAR_SUP
+ 	mfsr	r1, SYSREG_RSR_SUP
++#ifdef CONFIG_PREEMPT
++	unmask_interrupts
++#endif
++	zero_fp
+ 	stm	--sp, r0-r1
+ 
+ 	/* check for syscall tracing */
+@@ -638,6 +645,13 @@ irq_level\level:
+ 	stmts	--sp,r0-lr
+ 	mfsr	r8, rar_int\level
+ 	mfsr	r9, rsr_int\level
++
++#ifdef CONFIG_PREEMPT
++	sub	r11, pc, (. - system_call)
++	cp.w	r11, r8
++	breq	4f
++#endif
++
+ 	pushm	r8-r9
+ 
+ 	mov	r11, sp
+@@ -668,6 +682,16 @@ irq_level\level:
+ 	sub	sp, -4		/* ignore r12_orig */
+ 	rete
+ 
++#ifdef CONFIG_PREEMPT
++4:	mask_interrupts
++	mfsr	r8, rsr_int\level
++	sbr	r8, 16
++	mtsr	rsr_int\level, r8
++	ldmts	sp++, r0-lr
++	sub	sp, -4		/* ignore r12_orig */
++	rete
++#endif
++
+ 2:	get_thread_info	r0
+ 	ld.w	r1, r0[TI_flags]
+ 	bld	r1, TIF_CPU_GOING_TO_SLEEP
+diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
+index d08b0bc..4b4c188 100644
+--- a/arch/avr32/kernel/setup.c
++++ b/arch/avr32/kernel/setup.c
+@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
+ 
+ 	fbmem_size = memparse(p, &p);
+ 	if (*p == '@') {
+-		fbmem_start = memparse(p, &p);
++		fbmem_start = memparse(p + 1, &p);
+ 		ret = add_reserved_region(fbmem_start,
+ 					  fbmem_start + fbmem_size - 1,
+ 					  "Framebuffer");
+diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S
+new file mode 100644
+index 0000000..ce9ac96
+--- /dev/null
++++ b/arch/avr32/kernel/vmlinux.lds.S
+@@ -0,0 +1,143 @@
++/*
++ * AVR32 linker script for the Linux kernel
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#define LOAD_OFFSET 0x00000000
++#include <asm-generic/vmlinux.lds.h>
++#include <asm/cache.h>
++#include <asm/thread_info.h>
++
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++/* Big endian */
++jiffies = jiffies_64 + 4;
++
++SECTIONS
++{
++	. = CONFIG_ENTRY_ADDRESS;
++	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
++		_stext = .;
++		__init_begin = .;
++			_sinittext = .;
++			*(.text.reset)
++			*(.init.text)
++			/*
++			 * .exit.text is discarded at runtime, not
++			 * link time, to deal with references from
++			 * __bug_table
++			 */
++			*(.exit.text)
++			_einittext = .;
++		. = ALIGN(4);
++		__tagtable_begin = .;
++			*(.taglist.init)
++		__tagtable_end = .;
++			*(.init.data)
++		. = ALIGN(16);
++		__setup_start = .;
++			*(.init.setup)
++		__setup_end = .;
++		. = ALIGN(4);
++		__initcall_start = .;
++			INITCALLS
++		__initcall_end = .;
++		__con_initcall_start = .;
++			*(.con_initcall.init)
++		__con_initcall_end = .;
++		__security_initcall_start = .;
++			*(.security_initcall.init)
++		__security_initcall_end = .;
++#ifdef CONFIG_BLK_DEV_INITRD
++		. = ALIGN(32);
++		__initramfs_start = .;
++			*(.init.ramfs)
++		__initramfs_end = .;
++#endif
++		. = ALIGN(PAGE_SIZE);
++		__init_end = .;
++	}
++
++	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
++		_evba = .;
++		_text = .;
++		*(.ex.text)
++		. = 0x50;
++		*(.tlbx.ex.text)
++		. = 0x60;
++		*(.tlbr.ex.text)
++		. = 0x70;
++		*(.tlbw.ex.text)
++		. = 0x100;
++		*(.scall.text)
++		*(.irq.text)
++		TEXT_TEXT
++		SCHED_TEXT
++		LOCK_TEXT
++		KPROBES_TEXT
++		*(.fixup)
++		*(.gnu.warning)
++		_etext = .;
++	} = 0xd703d703
++
++	. = ALIGN(4);
++	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
++		__start___ex_table = .;
++		*(__ex_table)
++		__stop___ex_table = .;
++	}
++
++	BUG_TABLE
++
++	RODATA
++
++	. = ALIGN(THREAD_SIZE);
++
++	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
++		_data = .;
++		_sdata = .;
++		/*
++		 * First, the init task union, aligned to an 8K boundary.
++		 */
++		*(.data.init_task)
++
++		/* Then, the cacheline aligned data */
++		. = ALIGN(L1_CACHE_BYTES);
++		*(.data.cacheline_aligned)
++
++		/* And the rest... */
++		*(.data.rel*)
++		DATA_DATA
++		CONSTRUCTORS
++
++		_edata = .;
++	}
++
++
++	. = ALIGN(8);
++	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
++		__bss_start = .;
++		*(.bss)
++		*(COMMON)
++		. = ALIGN(8);
++		__bss_stop = .;
++		_end = .;
++	}
++
++	/* When something in the kernel is NOT compiled as a module, the module
++	 * cleanup code and data are put into these segments. Both can then be
++	 * thrown away, as cleanup code is never called unless it's a module.
++	 */
++	/DISCARD/       	: {
++		*(.exit.data)
++		*(.exitcall.exit)
++	}
++
++	DWARF_DEBUG
++}
+diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
+deleted file mode 100644
+index db0438f..0000000
+--- a/arch/avr32/kernel/vmlinux.lds.c
++++ /dev/null
+@@ -1,142 +0,0 @@
+-/*
+- * AVR32 linker script for the Linux kernel
+- *
+- * Copyright (C) 2004-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#define LOAD_OFFSET 0x00000000
+-#include <asm-generic/vmlinux.lds.h>
+-
+-OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+-OUTPUT_ARCH(avr32)
+-ENTRY(_start)
+-
+-/* Big endian */
+-jiffies = jiffies_64 + 4;
+-
+-SECTIONS
+-{
+-	. = CONFIG_ENTRY_ADDRESS;
+-	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
+-		_stext = .;
+-		__init_begin = .;
+-			_sinittext = .;
+-			*(.text.reset)
+-			*(.init.text)
+-			/*
+-			 * .exit.text is discarded at runtime, not
+-			 * link time, to deal with references from
+-			 * __bug_table
+-			 */
+-			*(.exit.text)
+-			_einittext = .;
+-		. = ALIGN(4);
+-		__tagtable_begin = .;
+-			*(.taglist.init)
+-		__tagtable_end = .;
+-			*(.init.data)
+-		. = ALIGN(16);
+-		__setup_start = .;
+-			*(.init.setup)
+-		__setup_end = .;
+-		. = ALIGN(4);
+-		__initcall_start = .;
+-			INITCALLS
+-		__initcall_end = .;
+-		__con_initcall_start = .;
+-			*(.con_initcall.init)
+-		__con_initcall_end = .;
+-		__security_initcall_start = .;
+-			*(.security_initcall.init)
+-		__security_initcall_end = .;
+-#ifdef CONFIG_BLK_DEV_INITRD
+-		. = ALIGN(32);
+-		__initramfs_start = .;
+-			*(.init.ramfs)
+-		__initramfs_end = .;
+-#endif
+-		. = ALIGN(4096);
+-		__init_end = .;
+-	}
+-
+-	. = ALIGN(8192);
+-	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
+-		_evba = .;
+-		_text = .;
+-		*(.ex.text)
+-		. = 0x50;
+-		*(.tlbx.ex.text)
+-		. = 0x60;
+-		*(.tlbr.ex.text)
+-		. = 0x70;
+-		*(.tlbw.ex.text)
+-		. = 0x100;
+-		*(.scall.text)
+-		*(.irq.text)
+-		TEXT_TEXT
+-		SCHED_TEXT
+-		LOCK_TEXT
+-		KPROBES_TEXT
+-		*(.fixup)
+-		*(.gnu.warning)
+-		_etext = .;
+-	} = 0xd703d703
+-
+-	. = ALIGN(4);
+-	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
+-		__start___ex_table = .;
+-		*(__ex_table)
+-		__stop___ex_table = .;
+-	}
+-
+-	BUG_TABLE
+-
+-	RODATA
+-
+-	. = ALIGN(8192);
+-
+-	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
+-		_data = .;
+-		_sdata = .;
+-		/*
+-		 * First, the init task union, aligned to an 8K boundary.
+-		 */
+-		*(.data.init_task)
+-
+-		/* Then, the cacheline aligned data */
+-		. = ALIGN(32);
+-		*(.data.cacheline_aligned)
+-
+-		/* And the rest... */
+-		*(.data.rel*)
+-		DATA_DATA
+-		CONSTRUCTORS
+-
+-		_edata = .;
+-	}
+-
+-
+-	. = ALIGN(8);
+-	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
+-		__bss_start = .;
+-		*(.bss)
+-		*(COMMON)
+-		. = ALIGN(8);
+-		__bss_stop = .;
+-		_end = .;
+-	}
+-
+-	/* When something in the kernel is NOT compiled as a module, the module
+-	 * cleanup code and data are put into these segments. Both can then be
+-	 * thrown away, as cleanup code is never called unless it's a module.
+-	 */
+-	/DISCARD/       	: {
+-		*(.exit.data)
+-		*(.exitcall.exit)
+-	}
+-
+-	DWARF_DEBUG
+-}
+diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
+index eb30783..0eb590a 100644
+--- a/arch/avr32/mach-at32ap/Kconfig
++++ b/arch/avr32/mach-at32ap/Kconfig
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
+index a8b4450..0f6162e 100644
+--- a/arch/avr32/mach-at32ap/Makefile
++++ b/arch/avr32/mach-at32ap/Makefile
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
+deleted file mode 100644
+index 64cc558..0000000
+--- a/arch/avr32/mach-at32ap/at32ap7000.c
++++ /dev/null
+@@ -1,1324 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-/*
+- * We can reduce the code size a bit by using a constant here. Since
+- * this file is completely chip-specific, it's safe to not use
+- * ioremap. Generic drivers should of course never do this.
+- */
+-#define AT32_PM_BASE	0xfff00000
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000bf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+new file mode 100644
+index 0000000..7fd93a5
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -0,0 +1,1754 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 4);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
+index 0f8c89c..4642117 100644
+--- a/arch/avr32/mach-at32ap/clock.c
++++ b/arch/avr32/mach-at32ap/clock.c
+@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
+ 	return clk->parent;
+ }
+ EXPORT_SYMBOL(clk_get_parent);
++
++
++
++#ifdef CONFIG_DEBUG_FS
++
++/* /sys/kernel/debug/at32ap_clk */
++
++#include <linux/io.h>
++#include <linux/debugfs.h>
++#include <linux/seq_file.h>
++#include "pm.h"
++
++
++#define	NEST_DELTA	2
++#define	NEST_MAX	6
++
++struct clkinf {
++	struct seq_file	*s;
++	unsigned	nest;
++};
++
++static void
++dump_clock(struct clk *parent, struct clkinf *r)
++{
++	unsigned	nest = r->nest;
++	char		buf[16 + NEST_MAX];
++	struct clk	*clk;
++	unsigned	i;
++
++	/* skip clocks coupled to devices that aren't registered */
++	if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
++		return;
++
++	/* <nest spaces> name <pad to end> */
++	memset(buf, ' ', sizeof(buf) - 1);
++	buf[sizeof(buf) - 1] = 0;
++	i = strlen(parent->name);
++	memcpy(buf + nest, parent->name,
++			min(i, (unsigned)(sizeof(buf) - 1 - nest)));
++
++	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
++		buf, parent->set_parent ? '*' : ' ',
++		parent->users,
++		parent->users ? "on" : "off",	/* NOTE: not-paranoid!! */
++		clk_get_rate(parent));
++	if (parent->dev)
++		seq_printf(r->s, ", for %s", parent->dev->bus_id);
++	seq_printf(r->s, "\n");
++
++	/* cost of this scan is small, but not linear... */
++	r->nest = nest + NEST_DELTA;
++	for (i = 3; i < at32_nr_clocks; i++) {
++		clk = at32_clock_list[i];
++		if (clk->parent == parent)
++			dump_clock(clk, r);
++	}
++	r->nest = nest;
++}
++
++static int clk_show(struct seq_file *s, void *unused)
++{
++	struct clkinf	r;
++	int		i;
++
++	/* show all the power manager registers */
++	seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
++	seq_printf(s, "CKSEL   = %8x\n", pm_readl(CKSEL));
++	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
++	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
++	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
++	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
++	seq_printf(s, "PLL0    = %8x\n", pm_readl(PLL0));
++	seq_printf(s, "PLL1    = %8x\n", pm_readl(PLL1));
++	seq_printf(s, "IMR     = %8x\n", pm_readl(IMR));
++	for (i = 0; i < 8; i++) {
++		if (i == 5)
++			continue;
++		seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
++	}
++
++	seq_printf(s, "\n");
++
++	/* show clock tree as derived from the three oscillators
++	 * we "know" are at the head of the list
++	 */
++	r.s = s;
++	r.nest = 0;
++	dump_clock(at32_clock_list[0], &r);
++	dump_clock(at32_clock_list[1], &r);
++	dump_clock(at32_clock_list[2], &r);
++
++	return 0;
++}
++
++static int clk_open(struct inode *inode, struct file *file)
++{
++	return single_open(file, clk_show, NULL);
++}
++
++static const struct file_operations clk_operations = {
++	.open		= clk_open,
++	.read		= seq_read,
++	.llseek		= seq_lseek,
++	.release	= single_release,
++};
++
++static int __init clk_debugfs_init(void)
++{
++	(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
++			NULL, NULL, &clk_operations);
++
++	return 0;
++}
++postcore_initcall(clk_debugfs_init);
++
++#endif
+diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c
+new file mode 100644
+index 0000000..8cf6d11
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/gpio-dev.c
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
+index 5e22a75..704607f 100644
+--- a/arch/avr32/mach-at32ap/hsmc.c
++++ b/arch/avr32/mach-at32ap/hsmc.c
+@@ -29,16 +29,25 @@ struct hsmc {
+ 
+ static struct hsmc *hsmc;
+ 
+-int smc_set_configuration(int cs, const struct smc_config *config)
++void smc_set_timing(struct smc_config *config,
++		    const struct smc_timing *timing)
+ {
++	int recover;
++	int cycle;
++
+ 	unsigned long mul;
+-	unsigned long offset;
+-	u32 setup, pulse, cycle, mode;
+ 
+-	if (!hsmc)
+-		return -ENODEV;
+-	if (cs >= NR_CHIP_SELECTS)
+-		return -EINVAL;
++	/* Reset all SMC timings */
++	config->ncs_read_setup	= 0;
++	config->nrd_setup	= 0;
++	config->ncs_write_setup	= 0;
++	config->nwe_setup	= 0;
++	config->ncs_read_pulse	= 0;
++	config->nrd_pulse	= 0;
++	config->ncs_write_pulse	= 0;
++	config->nwe_pulse	= 0;
++	config->read_cycle	= 0;
++	config->write_cycle	= 0;
+ 
+ 	/*
+ 	 * cycles = x / T = x * f
+@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
+ 
+ #define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
+ 
+-	setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup))
+-		 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup))
+-		 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup))
+-		 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup)));
+-	pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse))
+-		 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse))
+-		 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse))
+-		 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse)));
+-	cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle))
+-		 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle)));
++	if (timing->ncs_read_setup > 0)
++		config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
++
++	if (timing->nrd_setup > 0)
++		config->nrd_setup = ns2cyc(timing->nrd_setup);
++
++	if (timing->ncs_write_setup > 0)
++		config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
++
++	if (timing->nwe_setup > 0)
++		config->nwe_setup = ns2cyc(timing->nwe_setup);
++
++	if (timing->ncs_read_pulse > 0)
++		config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
++
++	if (timing->nrd_pulse > 0)
++		config->nrd_pulse = ns2cyc(timing->nrd_pulse);
++
++	if (timing->ncs_write_pulse > 0)
++		config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
++
++	if (timing->nwe_pulse > 0)
++		config->nwe_pulse = ns2cyc(timing->nwe_pulse);
++
++	if (timing->read_cycle > 0)
++		config->read_cycle = ns2cyc(timing->read_cycle);
++
++	if (timing->write_cycle > 0)
++		config->write_cycle = ns2cyc(timing->write_cycle);
++
++	/* Extend read cycle in needed */
++	if (timing->ncs_read_recover > 0)
++		recover = ns2cyc(timing->ncs_read_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend read cycle in needed */
++	if (timing->nrd_recover > 0)
++		recover = ns2cyc(timing->nrd_recover);
++	else
++		recover = 1;
++
++	cycle = config->nrd_setup + config->nrd_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->ncs_write_recover > 0)
++		recover = ns2cyc(timing->ncs_write_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->nwe_recover > 0)
++		recover = ns2cyc(timing->nwe_recover);
++	else
++		recover = 1;
++
++	cycle = config->nwe_setup + config->nwe_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++}
++EXPORT_SYMBOL(smc_set_timing);
++
++int smc_set_configuration(int cs, const struct smc_config *config)
++{
++	unsigned long offset;
++	u32 setup, pulse, cycle, mode;
++
++	if (!hsmc)
++		return -ENODEV;
++	if (cs >= NR_CHIP_SELECTS)
++		return -EINVAL;
++
++	setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
++		 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
++		 | HSMC_BF(NRD_SETUP, config->nrd_setup)
++		 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
++	pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
++		 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
++		 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
++		 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
++	cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
++		 | HSMC_BF(NRD_CYCLE, config->read_cycle));
+ 
+ 	switch (config->bus_width) {
+ 	case 1:
+diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
+index 1eb99b8..c978c36 100644
+--- a/arch/avr32/mach-at32ap/pio.c
++++ b/arch/avr32/mach-at32ap/pio.c
+@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
+ 			pio_writel(pio, SODR, mask);
+ 		else
+ 			pio_writel(pio, CODR, mask);
++		if (flags & AT32_GPIOF_MULTIDRV)
++			pio_writel(pio, MDER, mask);
++		else
++			pio_writel(pio, MDDR, mask);
+ 		pio_writel(pio, PUDR, mask);
+ 		pio_writel(pio, OER, mask);
+ 	} else {
+@@ -158,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
+index a1f8ace..47efd0d 100644
+--- a/arch/avr32/mach-at32ap/pm.h
++++ b/arch/avr32/mach-at32ap/pm.h
+@@ -4,6 +4,14 @@
+ #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
+ #define __ARCH_AVR32_MACH_AT32AP_PM_H__
+ 
++/*
++ * We can reduce the code size a bit by using a constant here. Since
++ * this file is only used on AVR32 AP CPUs with segmentation enabled,
++ * it's safe to not use ioremap. Generic drivers should of course
++ * never do this.
++ */
++#define AT32_PM_BASE	0xfff00000
++
+ /* PM register offsets */
+ #define PM_MCCTRL				0x0000
+ #define PM_CKSEL				0x0004
+diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
+index 099212d..26f29c6 100644
+--- a/arch/avr32/mm/dma-coherent.c
++++ b/arch/avr32/mm/dma-coherent.c
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size,
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
+index 82cf708..480760b 100644
+--- a/arch/avr32/mm/init.c
++++ b/arch/avr32/mm/init.c
+@@ -224,19 +224,9 @@ void free_initmem(void)
+ 
+ #ifdef CONFIG_BLK_DEV_INITRD
+ 
+-static int keep_initrd;
+-
+ void free_initrd_mem(unsigned long start, unsigned long end)
+ {
+-	if (!keep_initrd)
+-		free_area(start, end, "initrd");
+-}
+-
+-static int __init keepinitrd_setup(char *__unused)
+-{
+-	keep_initrd = 1;
+-	return 1;
++	free_area(start, end, "initrd");
+ }
+ 
+-__setup("keepinitrd", keepinitrd_setup);
+ #endif
+diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
+index 37bddc1..8c30dec 100644
+--- a/drivers/char/watchdog/Kconfig
++++ b/drivers/char/watchdog/Kconfig
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c
+index 54a5161..fb5ed64 100644
+--- a/drivers/char/watchdog/at32ap700x_wdt.c
++++ b/drivers/char/watchdog/at32ap700x_wdt.c
+@@ -6,6 +6,19 @@
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
++ *
++ *
++ * Errata: WDT Clear is blocked after WDT Reset
++ *
++ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR
++ * register, preventing the program to clear the next Watchdog Timer Reset.
++ *
++ * If you still want to use the WDT after a WDT reset a small code can be
++ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset
++ * and use a GPIO pin to reset the system. This method requires that one of the
++ * GPIO pins are available and connected externally to the RESET_N pin. After
++ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave
++ * the pin tristated with pullup.
+  */
+ 
+ #include <linux/init.h>
+@@ -44,6 +57,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+ 
+ #define WDT_CLR			0x04
+ 
++#define WDT_RCAUSE		0x10
++#define WDT_RCAUSE_POR		   0
++#define WDT_RCAUSE_EXT		   2
++#define WDT_RCAUSE_WDT		   3
++#define WDT_RCAUSE_JTAG		   4
++#define WDT_RCAUSE_SERP		   5
++
+ #define WDT_BIT(name)		(1 << WDT_##name)
+ #define WDT_BF(name, value)	((value) << WDT_##name)
+ 
+@@ -56,6 +76,7 @@ struct wdt_at32ap700x {
+ 	void __iomem		*regs;
+ 	spinlock_t		io_lock;
+ 	int			timeout;
++	int			boot_status;
+ 	unsigned long		users;
+ 	struct miscdevice	miscdev;
+ };
+@@ -126,7 +147,7 @@ static int at32_wdt_close(struct inode *inode, struct file *file)
+ 		at32_wdt_stop();
+ 	} else {
+ 		dev_dbg(wdt->miscdev.parent,
+-			"Unexpected close, not stopping watchdog!\n");
++			"unexpected close, not stopping watchdog!\n");
+ 		at32_wdt_pat();
+ 	}
+ 	clear_bit(1, &wdt->users);
+@@ -154,6 +175,33 @@ static int at32_wdt_settimeout(int time)
+ 	return 0;
+ }
+ 
++/*
++ * Get the watchdog status.
++ */
++static int at32_wdt_get_status(void)
++{
++	int rcause;
++	int status = 0;
++
++	rcause = wdt_readl(wdt, RCAUSE);
++
++	switch (rcause) {
++	case WDT_BIT(RCAUSE_EXT):
++		status = WDIOF_EXTERN1;
++		break;
++	case WDT_BIT(RCAUSE_WDT):
++		status = WDIOF_CARDRESET;
++		break;
++	case WDT_BIT(RCAUSE_POR):  /* fall through */
++	case WDT_BIT(RCAUSE_JTAG): /* fall through */
++	case WDT_BIT(RCAUSE_SERP): /* fall through */
++	default:
++		break;
++	}
++
++	return status;
++}
++
+ static struct watchdog_info at32_wdt_info = {
+ 	.identity	= "at32ap700x watchdog",
+ 	.options	= WDIOF_SETTIMEOUT |
+@@ -194,10 +242,12 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file,
+ 	case WDIOC_GETTIMEOUT:
+ 		ret = put_user(wdt->timeout, p);
+ 		break;
+-	case WDIOC_GETSTATUS: /* fall through */
+-	case WDIOC_GETBOOTSTATUS:
++	case WDIOC_GETSTATUS:
+ 		ret = put_user(0, p);
+ 		break;
++	case WDIOC_GETBOOTSTATUS:
++		ret = put_user(wdt->boot_status, p);
++		break;
+ 	case WDIOC_SETOPTIONS:
+ 		ret = get_user(time, p);
+ 		if (ret)
+@@ -282,8 +332,19 @@ static int __init at32_wdt_probe(struct platform_device *pdev)
+ 		dev_dbg(&pdev->dev, "could not map I/O memory\n");
+ 		goto err_free;
+ 	}
++
+ 	spin_lock_init(&wdt->io_lock);
+-	wdt->users = 0;
++	wdt->boot_status = at32_wdt_get_status();
++
++	/* Work-around for watchdog silicon errata. */
++	if (wdt->boot_status & WDIOF_CARDRESET) {
++		dev_info(&pdev->dev, "CPU must be reset with external "
++				"reset or POR due to silicon errata.\n");
++		ret = -EIO;
++		goto err_iounmap;
++	} else {
++		wdt->users = 0;
++	}
+ 	wdt->miscdev.minor = WATCHDOG_MINOR;
+ 	wdt->miscdev.name = "watchdog";
+ 	wdt->miscdev.fops = &at32_wdt_fops;
+diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
+index 9f3a4cd..6f5bcd6 100644
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -80,6 +80,14 @@ config I2C_AT91
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
+index 5b752e4..e4644a8 100644
+--- a/drivers/i2c/busses/Makefile
++++ b/drivers/i2c/busses/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c
+new file mode 100644
+index 0000000..3f78b31
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.c
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h
+new file mode 100644
+index 0000000..1aca065
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.h
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 73e248f..9e848cc 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY
+ 
+ 	  If you are not sure, say Y here.
+ 
++config ATMEL_SSC
++	tristate "Device driver for Atmel SSC peripheral"
++	depends on AVR32 || ARCH_AT91
++	---help---
++	  This option enables device driver support for Atmel Syncronized
++	  Serial Communication peripheral (SSC).
++
++	  The SSC peripheral supports a wide variety of serial frame based
++	  communications, i.e. I2S, SPI, etc.
+ 
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index b5ce0e3..40d8ed1 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
+ obj-$(CONFIG_SONY_LAPTOP)	+= sony-laptop.o
+ obj-$(CONFIG_THINKPAD_ACPI)	+= thinkpad_acpi.o
+ obj-$(CONFIG_EEPROM_93CX6)	+= eeprom_93cx6.o
++obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
+new file mode 100644
+index 0000000..058ccac
+--- /dev/null
++++ b/drivers/misc/atmel-ssc.c
+@@ -0,0 +1,174 @@
++/*
++ * Atmel SSC driver
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/list.h>
++#include <linux/spinlock.h>
++#include <linux/atmel-ssc.h>
++
++/* Serialize access to ssc_list and user count */
++static DEFINE_SPINLOCK(user_lock);
++static LIST_HEAD(ssc_list);
++
++struct ssc_device *ssc_request(unsigned int ssc_num)
++{
++	int ssc_valid = 0;
++	struct ssc_device *ssc;
++
++	spin_lock(&user_lock);
++	list_for_each_entry(ssc, &ssc_list, list) {
++		if (ssc->pdev->id == ssc_num) {
++			ssc_valid = 1;
++			break;
++		}
++	}
++
++	if (!ssc_valid) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "could not find requested device\n");
++		return ERR_PTR(-ENODEV);
++	}
++
++	if (ssc->user) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "module busy\n");
++		return ERR_PTR(-EBUSY);
++	}
++	ssc->user++;
++	spin_unlock(&user_lock);
++
++	clk_enable(ssc->clk);
++
++	return ssc;
++}
++EXPORT_SYMBOL(ssc_request);
++
++void ssc_free(struct ssc_device *ssc)
++{
++	spin_lock(&user_lock);
++	if (ssc->user) {
++		ssc->user--;
++		clk_disable(ssc->clk);
++	} else {
++		dev_dbg(&ssc->pdev->dev, "device already free\n");
++	}
++	spin_unlock(&user_lock);
++}
++EXPORT_SYMBOL(ssc_free);
++
++static int __init ssc_probe(struct platform_device *pdev)
++{
++	int retval = 0;
++	struct resource *regs;
++	struct ssc_device *ssc;
++
++	ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL);
++	if (!ssc) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		retval = -ENOMEM;
++		goto out;
++	}
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resource defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->clk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(ssc->clk)) {
++		dev_dbg(&pdev->dev, "no pclk clock defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->pdev = pdev;
++	ssc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!ssc->regs) {
++		dev_dbg(&pdev->dev, "ioremap failed\n");
++		retval = -EINVAL;
++		goto out_clk;
++	}
++
++	/* disable all interrupts */
++	clk_enable(ssc->clk);
++	ssc_writel(ssc->regs, IDR, ~0UL);
++	ssc_readl(ssc->regs, SR);
++	clk_disable(ssc->clk);
++
++	ssc->irq = platform_get_irq(pdev, 0);
++	if (!ssc->irq) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		retval = -ENXIO;
++		goto out_unmap;
++	}
++
++	spin_lock(&user_lock);
++	list_add_tail(&ssc->list, &ssc_list);
++	spin_unlock(&user_lock);
++
++	platform_set_drvdata(pdev, ssc);
++
++	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
++			ssc->regs, ssc->irq);
++
++	goto out;
++
++out_unmap:
++	iounmap(ssc->regs);
++out_clk:
++	clk_put(ssc->clk);
++out_free:
++	kfree(ssc);
++out:
++	return retval;
++}
++
++static int __devexit ssc_remove(struct platform_device *pdev)
++{
++	struct ssc_device *ssc = platform_get_drvdata(pdev);
++
++	spin_lock(&user_lock);
++	iounmap(ssc->regs);
++	clk_put(ssc->clk);
++	list_del(&ssc->list);
++	kfree(ssc);
++	spin_unlock(&user_lock);
++
++	return 0;
++}
++
++static struct platform_driver ssc_driver = {
++	.remove		= __devexit_p(ssc_remove),
++	.driver		= {
++		.name		= "ssc",
++	},
++};
++
++static int __init ssc_init(void)
++{
++	return platform_driver_probe(&ssc_driver, ssc_probe);
++}
++module_init(ssc_init);
++
++static void __exit ssc_exit(void)
++{
++	platform_driver_unregister(&ssc_driver);
++}
++module_exit(ssc_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index e23082f..1de1716 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -74,6 +74,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
+index 6685f64..4b8e6e2 100644
+--- a/drivers/mmc/host/Makefile
++++ b/drivers/mmc/host/Makefile
+@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ 
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+new file mode 100644
+index 0000000..6792ad9
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = MMC_ERR_NONE;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = MMC_ERR_TIMEOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = MMC_ERR_BADCRC;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = MMC_ERR_FAILED;
++
++	if (cmd->error != MMC_ERR_NONE) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = MMC_ERR_INVALID;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = MMC_ERR_BADCRC;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = MMC_ERR_TIMEOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = MMC_ERR_FIFO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = MMC_ERR_TIMEOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = MMC_ERR_TIMEOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = MMC_ERR_TIMEOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h
+new file mode 100644
+index 0000000..60d15c4
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.h
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
+index 2f19fa7..94304ca 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0001.c
++++ b/drivers/mtd/chips/cfi_cmdset_0001.c
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
+index 1f64458..205977b 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = {
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
+index c0c77f8..7623315 100644
+--- a/drivers/pcmcia/Kconfig
++++ b/drivers/pcmcia/Kconfig
+@@ -271,6 +271,13 @@ config AT91_CF
+ 	  Say Y here to support the CompactFlash controller on AT91 chips.
+ 	  Or choose M to compile the driver as a module named "at91_cf".
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
+index 4276965..08d7ffa 100644
+--- a/drivers/pcmcia/Makefile
++++ b/drivers/pcmcia/Makefile
+@@ -37,6 +37,7 @@ obj-$(CONFIG_PCMCIA_VRC4171)			+= vrc4171_card.o
+ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc4173_cardu.o
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c
+new file mode 100644
+index 0000000..ebe1495
+--- /dev/null
++++ b/drivers/pcmcia/at32_cf.c
+@@ -0,0 +1,531 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin)
++		cf->vcc_pin = request_pin(pdev, board->reset_pin,
++					  "cf_vcc");
++	if (board->ready_pin)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c
+index d154dee..06a85d7 100644
+--- a/drivers/pcmcia/cistpl.c
++++ b/drivers/pcmcia/cistpl.c
+@@ -25,6 +25,7 @@
+ #include <linux/ioport.h>
+ #include <asm/io.h>
+ #include <asm/byteorder.h>
++#include <asm/unaligned.h>
+ 
+ #include <pcmcia/cs_types.h>
+ #include <pcmcia/ss.h>
+@@ -401,6 +402,15 @@ EXPORT_SYMBOL(pcmcia_replace_cis);
+     
+ ======================================================================*/
+ 
++static inline u16 cis_get_u16(void *ptr)
++{
++	return le16_to_cpu(get_unaligned((__le16 *) ptr));
++}
++static inline u32 cis_get_u32(void *ptr)
++{
++	return le32_to_cpu(get_unaligned((__le32 *) ptr));
++}
++
+ typedef struct tuple_flags {
+     u_int		link_space:4;
+     u_int		has_link:1;
+@@ -461,7 +471,7 @@ static int follow_link(struct pcmcia_socket *s, tuple_t *tuple)
+ 	/* Get indirect link from the MFC tuple */
+ 	read_cis_cache(s, LINK_SPACE(tuple->Flags),
+ 		       tuple->LinkOffset, 5, link);
+-	ofs = le32_to_cpu(*(__le32 *)(link+1));
++	ofs = cis_get_u32(link + 1);
+ 	SPACE(tuple->Flags) = (link[0] == CISTPL_MFC_ATTR);
+ 	/* Move to the next indirect link */
+ 	tuple->LinkOffset += 5;
+@@ -668,10 +678,10 @@ static int parse_checksum(tuple_t *tuple, cistpl_checksum_t *csum)
+     u_char *p;
+     if (tuple->TupleDataLen < 5)
+ 	return CS_BAD_TUPLE;
+-    p = (u_char *)tuple->TupleData;
+-    csum->addr = tuple->CISOffset+(short)le16_to_cpu(*(__le16 *)p)-2;
+-    csum->len = le16_to_cpu(*(__le16 *)(p + 2));
+-    csum->sum = *(p+4);
++    p = (u_char *) tuple->TupleData;
++    csum->addr = tuple->CISOffset + cis_get_u16(p) - 2;
++    csum->len = cis_get_u16(p + 2);
++    csum->sum = *(p + 4);
+     return CS_SUCCESS;
+ }
+ 
+@@ -681,7 +691,7 @@ static int parse_longlink(tuple_t *tuple, cistpl_longlink_t *link)
+ {
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    link->addr = le32_to_cpu(*(__le32 *)tuple->TupleData);
++    link->addr = cis_get_u32(tuple->TupleData);
+     return CS_SUCCESS;
+ }
+ 
+@@ -700,7 +710,8 @@ static int parse_longlink_mfc(tuple_t *tuple,
+ 	return CS_BAD_TUPLE;
+     for (i = 0; i < link->nfn; i++) {
+ 	link->fn[i].space = *p; p++;
+-	link->fn[i].addr = le32_to_cpu(*(__le32 *)p); p += 4;
++	link->fn[i].addr = cis_get_u32(p);
++	p += 4;
+     }
+     return CS_SUCCESS;
+ }
+@@ -787,12 +798,10 @@ static int parse_jedec(tuple_t *tuple, cistpl_jedec_t *jedec)
+ 
+ static int parse_manfid(tuple_t *tuple, cistpl_manfid_t *m)
+ {
+-    __le16 *p;
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    p = (__le16 *)tuple->TupleData;
+-    m->manf = le16_to_cpu(p[0]);
+-    m->card = le16_to_cpu(p[1]);
++    m->manf = cis_get_u16(tuple->TupleData);
++    m->card = cis_get_u16(tuple->TupleData + 2);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1091,7 +1100,7 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x20:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
+ 	entry->mem.win[0].card_addr = 0;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 2;
+@@ -1099,9 +1108,8 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x40:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
+-	entry->mem.win[0].card_addr =
+-	    le16_to_cpu(*(__le16 *)(p+2)) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
++	entry->mem.win[0].card_addr = cis_get_u16(p + 2) << 8;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 4;
+ 	if (p > q) return CS_BAD_TUPLE;
+@@ -1138,7 +1146,7 @@ static int parse_bar(tuple_t *tuple, cistpl_bar_t *bar)
+     p = (u_char *)tuple->TupleData;
+     bar->attr = *p;
+     p += 2;
+-    bar->size = le32_to_cpu(*(__le32 *)p);
++    bar->size = cis_get_u32(p);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1151,7 +1159,7 @@ static int parse_config_cb(tuple_t *tuple, cistpl_config_t *config)
+ 	return CS_BAD_TUPLE;
+     config->last_idx = *(++p);
+     p++;
+-    config->base = le32_to_cpu(*(__le32 *)p);
++    config->base = cis_get_u32(p);
+     config->subtuples = tuple->TupleDataLen - 6;
+     return CS_SUCCESS;
+ }
+@@ -1267,7 +1275,7 @@ static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2)
+ 
+     v2->vers = p[0];
+     v2->comply = p[1];
+-    v2->dindex = le16_to_cpu(*(__le16 *)(p+2));
++    v2->dindex = cis_get_u16(p +2 );
+     v2->vspec8 = p[6];
+     v2->vspec9 = p[7];
+     v2->nhdr = p[8];
+@@ -1308,8 +1316,8 @@ static int parse_format(tuple_t *tuple, cistpl_format_t *fmt)
+ 
+     fmt->type = p[0];
+     fmt->edc = p[1];
+-    fmt->offset = le32_to_cpu(*(__le32 *)(p+2));
+-    fmt->length = le32_to_cpu(*(__le32 *)(p+6));
++    fmt->offset = cis_get_u32(p + 2);
++    fmt->length = cis_get_u32(p + 6);
+ 
+     return CS_SUCCESS;
+ }
+diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
+index b046974..bc90604 100644
+--- a/drivers/spi/atmel_spi.c
++++ b/drivers/spi/atmel_spi.c
+@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi)
+ 		csr |= SPI_BIT(NCPHA);
+ 
+ 	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
+index 767aed5..f81d08d 100644
+--- a/drivers/usb/gadget/Kconfig
++++ b/drivers/usb/gadget/Kconfig
+@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES
+ 	   driver on a new board.   Enable these files by choosing "Y"
+ 	   here.  If in doubt, or to conserve kernel memory, say "N".
+ 
++config USB_GADGET_DEBUG_FS
++	boolean "Debugging information files in debugfs"
++	depends on USB_GADGET && DEBUG_FS
++	help
++	   Some of the drivers in the "gadget" framework can expose
++	   debugging information in files under /sys/kernel/debug/.
++	   The information in these files may help when you're
++	   troubleshooting or bringing up a driver on a new board.
++	   Enable these files by choosing "Y" here.  If in doubt, or
++	   to conserve kernel memory, say "N".
++
+ config	USB_GADGET_SELECTED
+ 	boolean
+ 
+@@ -103,6 +114,20 @@ config USB_AMD5536UDC
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
++config USB_GADGET_ATMEL_USBA
++	boolean "Atmel USBA"
++	select USB_GADGET_DUALSPEED
++	depends on AVR32
++	help
++	  USBA is the integrated high-speed USB Device controller on
++	  the AT32AP700x processors from Atmel.
++
++config USB_ATMEL_USBA
++	tristate
++	depends on USB_GADGET_ATMEL_USBA
++	default USB_GADGET
++	select USB_GADGET_SELECTED
++
+ config USB_GADGET_FSL_USB2
+ 	boolean "Freescale Highspeed USB DR Peripheral Controller"
+ 	depends on MPC834x || PPC_MPC831x
+@@ -228,7 +253,6 @@ config USB_LH7A40X
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
+-
+ config USB_GADGET_OMAP
+ 	boolean "OMAP USB Device Controller"
+ 	depends on ARCH_OMAP
+diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
+index 1bc0f03..904e57b 100644
+--- a/drivers/usb/gadget/Makefile
++++ b/drivers/usb/gadget/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
+ obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
+ obj-$(CONFIG_USB_S3C2410)	+= s3c2410_udc.o
+ obj-$(CONFIG_USB_AT91)		+= at91_udc.o
++obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
+ obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
+ obj-$(CONFIG_USB_M66592)	+= m66592-udc.o
+ 
+diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
+new file mode 100644
+index 0000000..e35362d
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.c
+@@ -0,0 +1,2038 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/list.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ch9.h>
++#include <linux/usb_gadget.h>
++#include <linux/delay.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
++
++#include "atmel_usba_udc.h"
++
++
++static struct usba_udc the_udc;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/uaccess.h>
++
++static int queue_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_ep *ep = inode->i_private;
++	struct usba_request *req, *req_copy;
++	struct list_head *queue_data;
++
++	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
++	if (!queue_data)
++		return -ENOMEM;
++	INIT_LIST_HEAD(queue_data);
++
++	spin_lock_irq(&ep->udc->lock);
++	list_for_each_entry(req, &ep->queue, queue) {
++		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
++		if (!req_copy)
++			goto fail;
++		memcpy(req_copy, req, sizeof(*req_copy));
++		list_add_tail(&req_copy->queue, queue_data);
++	}
++	spin_unlock_irq(&ep->udc->lock);
++
++	file->private_data = queue_data;
++	return 0;
++
++fail:
++	spin_unlock_irq(&ep->udc->lock);
++	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return -ENOMEM;
++}
++
++/*
++ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
++ *
++ * b: buffer address
++ * l: buffer length
++ * I/i: interrupt/no interrupt
++ * Z/z: zero/no zero
++ * S/s: short ok/short not ok
++ * s: status
++ * n: nr_packets
++ * F/f: submitted/not submitted to FIFO
++ * D/d: using/not using DMA
++ * L/l: last transaction/not last transaction
++ */
++static ssize_t queue_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct list_head *queue = file->private_data;
++	struct usba_request *req, *tmp_req;
++	size_t len, remaining, actual = 0;
++	char tmpbuf[38];
++
++	if (!access_ok(VERIFY_WRITE, buf, nbytes))
++		return -EFAULT;
++
++	mutex_lock(&file->f_dentry->d_inode->i_mutex);
++	list_for_each_entry_safe(req, tmp_req, queue, queue) {
++		len = snprintf(tmpbuf, sizeof(tmpbuf),
++				"%8p %08x %c%c%c %5d %c%c%c\n",
++				req->req.buf, req->req.length,
++				req->req.no_interrupt ? 'i' : 'I',
++				req->req.zero ? 'Z' : 'z',
++				req->req.short_not_ok ? 's' : 'S',
++				req->req.status,
++				req->submitted ? 'F' : 'f',
++				req->using_dma ? 'D' : 'd',
++				req->last_transaction ? 'L' : 'l');
++		len = min(len, sizeof(tmpbuf));
++		if (len > nbytes)
++			break;
++
++		list_del(&req->queue);
++		kfree(req);
++
++		remaining = __copy_to_user(buf, tmpbuf, len);
++		actual += len - remaining;
++		if (remaining)
++			break;
++
++		nbytes -= len;
++		buf += len;
++	}
++	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
++
++	return actual;
++}
++
++static int queue_dbg_release(struct inode *inode, struct file *file)
++{
++	struct list_head *queue_data = file->private_data;
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return 0;
++}
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_udc *udc;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	udc = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&udc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(udc->regs + i * 4);
++	spin_unlock_irq(&udc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++			file->private_data,
++			file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++const struct file_operations queue_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= queue_dbg_open,
++	.llseek		= no_llseek,
++	.read		= queue_dbg_read,
++	.release	= queue_dbg_release,
++};
++
++const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void usba_ep_init_debugfs(struct usba_udc *udc,
++		struct usba_ep *ep)
++{
++	struct dentry *ep_root;
++
++	ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
++	if (!ep_root)
++		goto err_root;
++	ep->debugfs_dir = ep_root;
++
++	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
++						ep, &queue_dbg_fops);
++	if (!ep->debugfs_queue)
++		goto err_queue;
++
++	if (ep->can_dma) {
++		ep->debugfs_dma_status
++			= debugfs_create_u32("dma_status", 0400, ep_root,
++					&ep->last_dma_status);
++		if (!ep->debugfs_dma_status)
++			goto err_dma_status;
++	}
++	if (ep_is_control(ep)) {
++		ep->debugfs_state
++			= debugfs_create_u32("state", 0400, ep_root,
++					&ep->state);
++		if (!ep->debugfs_state)
++			goto err_state;
++	}
++
++	return;
++
++err_state:
++	if (ep->can_dma)
++		debugfs_remove(ep->debugfs_dma_status);
++err_dma_status:
++	debugfs_remove(ep->debugfs_queue);
++err_queue:
++	debugfs_remove(ep_root);
++err_root:
++	dev_err(&ep->udc->pdev->dev,
++		"failed to create debugfs directory for %s\n", ep->ep.name);
++}
++
++static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++	debugfs_remove(ep->debugfs_queue);
++	debugfs_remove(ep->debugfs_dma_status);
++	debugfs_remove(ep->debugfs_state);
++	debugfs_remove(ep->debugfs_dir);
++	ep->debugfs_dma_status = NULL;
++	ep->debugfs_dir = NULL;
++}
++
++static void usba_init_debugfs(struct usba_udc *udc)
++{
++	struct dentry *root, *regs;
++	struct resource *regs_resource;
++
++	root = debugfs_create_dir(udc->gadget.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	udc->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
++				CTRL_IOMEM_ID);
++	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
++	udc->debugfs_regs = regs;
++
++	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
++
++	return;
++
++err_regs:
++	debugfs_remove(root);
++err_root:
++	udc->debugfs_root = NULL;
++	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++}
++
++static void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
++	debugfs_remove(udc->debugfs_regs);
++	debugfs_remove(udc->debugfs_root);
++	udc->debugfs_regs = NULL;
++	udc->debugfs_root = NULL;
++}
++#else
++static inline void usba_ep_init_debugfs(struct usba_udc *udc,
++					 struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_init_debugfs(struct usba_udc *udc)
++{
++
++}
++
++static inline void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++
++}
++#endif
++
++static int vbus_is_present(struct usba_udc *udc)
++{
++	if (udc->vbus_pin != -1)
++		return gpio_get_value(udc->vbus_pin);
++
++	/* No Vbus detection: Assume always present */
++	return 1;
++}
++
++static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
++{
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
++	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
++		tmp = *(unsigned long *)buf;
++		if (len >= 4) {
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++			__raw_writel(tmp, fifo);
++		} else {
++			do {
++				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
++				__raw_writeb(tmp >> 24, fifo);
++				fifo++;
++				tmp <<= 8;
++			} while (--len);
++			break;
++		}
++	}
++}
++
++static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++{
++	union {
++		unsigned long *w;
++		unsigned char *b;
++	} p;
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
++	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
++		if (len >= 4) {
++			tmp = __raw_readl(fifo);
++			*p.w = tmp;
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++		} else {
++			do {
++				tmp = __raw_readb(fifo);
++				*p.b = tmp;
++				DBG(DBG_FIFO, " -> %02lx\n", tmp);
++				fifo++, p.b++;
++			} while (--len);
++		}
++	}
++}
++
++static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
++{
++	unsigned int transaction_len;
++
++	transaction_len = req->req.length - req->req.actual;
++	req->last_transaction = 1;
++	if (transaction_len > ep->ep.maxpacket) {
++		transaction_len = ep->ep.maxpacket;
++		req->last_transaction = 0;
++	} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
++		req->last_transaction = 0;
++
++	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
++		ep->ep.name, req, transaction_len,
++		req->last_transaction ? ", done" : "");
++
++	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	req->req.actual += transaction_len;
++}
++
++static void submit_request(struct usba_ep *ep, struct usba_request *req)
++{
++	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
++		ep->ep.name, req, req->req.length);
++
++	req->req.actual = 0;
++	req->submitted = 1;
++
++	if (req->using_dma) {
++		if (req->req.length == 0) {
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++			return;
++		}
++
++		if (req->req.zero)
++			usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
++		else
++			usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
++
++		usba_dma_writel(ep, ADDRESS, req->req.dma);
++		usba_dma_writel(ep, CONTROL, req->ctrl);
++	} else {
++		next_fifo_transaction(ep, req);
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		} else {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		}
++	}
++}
++
++static void submit_next_request(struct usba_ep *ep)
++{
++	struct usba_request *req;
++
++	if (list_empty(&ep->queue)) {
++		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
++		return;
++	}
++
++	req = list_entry(ep->queue.next, struct usba_request, queue);
++	if (!req->submitted)
++		submit_request(ep, req);
++}
++
++static void send_status(struct usba_udc *udc, struct usba_ep *ep)
++{
++	ep->state = STATUS_STAGE_IN;
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++}
++
++static void receive_data(struct usba_ep *ep)
++{
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req;
++	unsigned long status;
++	unsigned int bytecount, nr_busy;
++	int is_complete = 0;
++
++	status = usba_ep_readl(ep, STA);
++	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
++
++	while (nr_busy > 0) {
++		if (list_empty(&ep->queue)) {
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			break;
++		}
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++		bytecount = USBA_BFEXT(BYTE_COUNT, status);
++
++		if (status & (1 << 31))
++			is_complete = 1;
++		if (req->req.actual + bytecount >= req->req.length) {
++			is_complete = 1;
++			bytecount = req->req.length - req->req.actual;
++		}
++
++		copy_from_fifo(req->req.buf + req->req.actual,
++				ep->fifo, bytecount);
++		req->req.actual += bytecount;
++
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++
++		if (is_complete) {
++			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
++			req->req.status = 0;
++			list_del_init(&req->queue);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			spin_unlock(&udc->lock);
++			req->req.complete(&ep->ep, &req->req);
++			spin_lock(&udc->lock);
++		}
++
++		status = usba_ep_readl(ep, STA);
++		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++		if (is_complete && ep_is_control(ep)) {
++			send_status(udc, ep);
++			break;
++		}
++	}
++}
++
++static void
++request_complete(struct usba_ep *ep, struct usba_request *req, int status)
++{
++	struct usba_udc *udc = ep->udc;
++
++	WARN_ON(!list_empty(&req->queue));
++
++	if (req->req.status == -EINPROGRESS)
++		req->req.status = status;
++
++	if (req->mapped) {
++		dma_unmap_single(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->req.dma = DMA_ADDR_INVALID;
++		req->mapped = 0;
++	}
++
++	DBG(DBG_GADGET | DBG_REQ,
++		"%s: req %p complete: status %d, actual %u\n",
++		ep->ep.name, req, req->req.status, req->req.actual);
++
++	spin_unlock(&udc->lock);
++	req->req.complete(&ep->ep, &req->req);
++	spin_lock(&udc->lock);
++}
++
++static void
++request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
++{
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, list, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, status);
++	}
++}
++
++static int
++usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags, ept_cfg, maxpacket;
++	unsigned int nr_trans;
++
++	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
++
++	maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
++
++	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
++			|| ep->index == 0
++			|| desc->bDescriptorType != USB_DT_ENDPOINT
++			|| maxpacket == 0
++			|| maxpacket > ep->fifo_size) {
++		DBG(DBG_ERR, "ep_enable: Invalid argument");
++		return -EINVAL;
++	}
++
++	ep->is_isoc = 0;
++	ep->is_in = 0;
++
++	if (maxpacket <= 8)
++		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
++	else
++		/* LSB is bit 1, not 0 */
++		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
++
++	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
++			ep->ep.name, ept_cfg, maxpacket);
++
++	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
++		ep->is_in = 1;
++		ept_cfg |= USBA_EPT_DIR_IN;
++	}
++
++	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
++	case USB_ENDPOINT_XFER_CONTROL:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
++		break;
++	case USB_ENDPOINT_XFER_ISOC:
++		if (!ep->can_isoc) {
++			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
++					ep->ep.name);
++			return -EINVAL;
++		}
++
++		/*
++		 * Bits 11:12 specify number of _additional_
++		 * transactions per microframe.
++		 */
++		nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
++		if (nr_trans > 3)
++			return -EINVAL;
++
++		ep->is_isoc = 1;
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
++
++		/*
++		 * Do triple-buffering on high-bandwidth iso endpoints.
++		 */
++		if (nr_trans > 1 && ep->nr_banks == 3)
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
++		else
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
++		break;
++	case USB_ENDPOINT_XFER_BULK:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	case USB_ENDPOINT_XFER_INT:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	}
++
++	spin_lock_irqsave(&ep->udc->lock, flags);
++
++	if (ep->desc) {
++		spin_unlock_irqrestore(&ep->udc->lock, flags);
++		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
++		return -EBUSY;
++	}
++
++	ep->desc = desc;
++	ep->ep.maxpacket = maxpacket;
++
++	usba_ep_writel(ep, CFG, ept_cfg);
++	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++
++	if (ep->can_dma) {
++		u32 ctrl;
++
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)
++					| USBA_BF(DMA_INT, 1 << ep->index)));
++		ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
++		usba_ep_writel(ep, CTL_ENB, ctrl);
++	} else {
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)));
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
++			(unsigned long)usba_ep_readl(ep, CFG));
++	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
++			(unsigned long)usba_readl(udc, INT_ENB));
++
++	return 0;
++}
++
++static int usba_ep_disable(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	LIST_HEAD(req_list);
++	unsigned long flags;
++
++	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (!ep->desc) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
++		return -EINVAL;
++	}
++	ep->desc = NULL;
++
++	list_splice_init(&ep->queue, &req_list);
++	if (ep->can_dma) {
++		usba_dma_writel(ep, CONTROL, 0);
++		usba_dma_writel(ep, ADDRESS, 0);
++		usba_dma_readl(ep, STATUS);
++	}
++	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
++	usba_writel(udc, INT_ENB,
++			usba_readl(udc, INT_ENB)
++			& ~USBA_BF(EPT_INT, 1 << ep->index));
++
++	request_complete_list(ep, &req_list, -ESHUTDOWN);
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static struct usb_request *
++usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
++{
++	struct usba_request *req;
++
++	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
++
++	req = kzalloc(sizeof(*req), gfp_flags);
++	if (!req)
++		return NULL;
++
++	INIT_LIST_HEAD(&req->queue);
++	req->req.dma = DMA_ADDR_INVALID;
++
++	return &req->req;
++}
++
++static void
++usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_request *req = to_usba_req(_req);
++
++	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
++
++	kfree(req);
++}
++
++static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
++		struct usba_request *req, gfp_t gfp_flags)
++{
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
++		ep->ep.name, req->req.length, req->req.dma,
++		req->req.zero ? 'Z' : 'z',
++		req->req.short_not_ok ? 'S' : 's',
++		req->req.no_interrupt ? 'I' : 'i');
++
++	if (req->req.length > 0x10000) {
++		/* Lengths from 0 to 65536 (inclusive) are supported */
++		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
++		return -EINVAL;
++	}
++
++	req->using_dma = 1;
++
++	if (req->req.dma == DMA_ADDR_INVALID) {
++		req->req.dma = dma_map_single(
++			&udc->pdev->dev, req->req.buf, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 1;
++	} else {
++		dma_sync_single_for_device(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 0;
++	}
++
++	req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
++			| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
++			| USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
++
++	if (ep->is_in)
++		req->ctrl |= USBA_DMA_END_BUF_EN;
++
++	/*
++	 * Add this request to the queue and submit for DMA if
++	 * possible. Check if we're still alive first -- we may have
++	 * received a reset since last time we checked.
++	 */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		if (list_empty(&ep->queue))
++			submit_request(ep, req);
++
++		list_add_tail(&req->queue, &ep->queue);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int
++usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
++{
++	struct usba_request *req = to_usba_req(_req);
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
++			ep->ep.name, req, _req->length);
++
++	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
++		return -ESHUTDOWN;
++
++	req->submitted = 0;
++	req->using_dma = 0;
++	req->last_transaction = 0;
++
++	_req->status = -EINPROGRESS;
++	_req->actual = 0;
++
++	if (ep->can_dma)
++		return queue_dma(udc, ep, req, gfp_flags);
++
++	/* May have received a reset since last time we checked */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		list_add_tail(&req->queue, &ep->queue);
++
++		if (ep->is_in || (ep_is_control(ep)
++				&& (ep->state == DATA_STAGE_IN
++					|| ep->state == STATUS_STAGE_IN)))
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		else
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static void
++usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
++{
++	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
++}
++
++static int stop_dma(struct usba_ep *ep, u32 *pstatus)
++{
++	unsigned int timeout;
++	u32 status;
++
++	/*
++	 * Stop the DMA controller. When writing both CH_EN
++	 * and LINK to 0, the other bits are not affected.
++	 */
++	usba_dma_writel(ep, CONTROL, 0);
++
++	/* Wait for the FIFO to empty */
++	for (timeout = 40; timeout; --timeout) {
++		status = usba_dma_readl(ep, STATUS);
++		if (!(status & USBA_DMA_CH_EN))
++			break;
++		udelay(1);
++	}
++
++	if (pstatus)
++		*pstatus = status;
++
++	if (timeout == 0) {
++		dev_err(&ep->udc->pdev->dev,
++			"%s: timed out waiting for DMA FIFO to empty\n",
++			ep->ep.name);
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req = to_usba_req(_req);
++	unsigned long flags;
++	u32 status;
++
++	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
++			ep->ep.name, req);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (req->using_dma) {
++		/*
++		 * If this request is currently being transferred,
++		 * stop the DMA controller and reset the FIFO.
++		 */
++		if (ep->queue.next == &req->queue) {
++			status = usba_dma_readl(ep, STATUS);
++			if (status & USBA_DMA_CH_EN)
++				stop_dma(ep, &status);
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++			ep->last_dma_status = status;
++#endif
++
++			usba_writel(udc, EPT_RST, 1 << ep->index);
++
++			usba_update_req(ep, req, status);
++		}
++	}
++
++	/*
++	 * Errors should stop the queue from advancing until the
++	 * completion function returns.
++	 */
++	list_del_init(&req->queue);
++
++	request_complete(ep, req, -ECONNRESET);
++
++	/* Process the next request if any */
++	submit_next_request(ep);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static int usba_ep_set_halt(struct usb_ep *_ep, int value)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret = 0;
++
++	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
++			value ? "set" : "clear");
++
++	if (!ep->desc) {
++		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
++				ep->ep.name);
++		return -ENODEV;
++	}
++	if (ep->is_isoc) {
++		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
++				ep->ep.name);
++		return -ENOTTY;
++	}
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	/*
++	 * We can't halt IN endpoints while there are still data to be
++	 * transferred
++	 */
++	if (!list_empty(&ep->queue)
++			|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
++					& USBA_BF(BUSY_BANKS, -1L))))) {
++		ret = -EAGAIN;
++	} else {
++		if (value)
++			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++		else
++			usba_ep_writel(ep, CLR_STA,
++					USBA_FORCE_STALL | USBA_TOGGLE_CLR);
++		usba_ep_readl(ep, STA);
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int usba_ep_fifo_status(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++
++	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++}
++
++static void usba_ep_fifo_flush(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++
++	usba_writel(udc, EPT_RST, 1 << ep->index);
++}
++
++static const struct usb_ep_ops usba_ep_ops = {
++	.enable		= usba_ep_enable,
++	.disable	= usba_ep_disable,
++	.alloc_request	= usba_ep_alloc_request,
++	.free_request	= usba_ep_free_request,
++	.queue		= usba_ep_queue,
++	.dequeue	= usba_ep_dequeue,
++	.set_halt	= usba_ep_set_halt,
++	.fifo_status	= usba_ep_fifo_status,
++	.fifo_flush	= usba_ep_fifo_flush,
++};
++
++static int usba_udc_get_frame(struct usb_gadget *gadget)
++{
++	struct usba_udc *udc = to_usba_udc(gadget);
++
++	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
++}
++
++static const struct usb_gadget_ops usba_udc_ops = {
++	.get_frame	= usba_udc_get_frame,
++};
++
++#define EP(nam, idx, maxpkt, maxbk, dma, isoc)			\
++{								\
++	.ep	= {						\
++		.ops		= &usba_ep_ops,			\
++		.name		= nam,				\
++		.maxpacket	= maxpkt,			\
++	},							\
++	.udc		= &the_udc,				\
++	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
++	.fifo_size	= maxpkt,				\
++	.nr_banks	= maxbk,				\
++	.index		= idx,					\
++	.can_dma	= dma,					\
++	.can_isoc	= isoc,					\
++}
++
++static struct usba_ep usba_ep[] = {
++	EP("ep0", 0, 64, 1, 0, 0),
++	EP("ep1in-bulk", 1, 512, 2, 1, 1),
++	EP("ep2out-bulk", 2, 512, 2, 1, 1),
++	EP("ep3in-int", 3, 64, 3, 1, 0),
++	EP("ep4out-int", 4, 64, 3, 1, 0),
++	EP("ep5in-iso", 5, 1024, 3, 1, 1),
++	EP("ep6out-iso", 6, 1024, 3, 1, 1),
++};
++#undef EP
++
++static struct usb_endpoint_descriptor usba_ep0_desc = {
++	.bLength = USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType = USB_DT_ENDPOINT,
++	.bEndpointAddress = 0,
++	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
++	.wMaxPacketSize = __constant_cpu_to_le16(64),
++	/* FIXME: I have no idea what to put here */
++	.bInterval = 1,
++};
++
++static void nop_release(struct device *dev)
++{
++
++}
++
++static struct usba_udc the_udc = {
++	.gadget	= {
++		.ops		= &usba_udc_ops,
++		.ep0		= &usba_ep[0].ep,
++		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
++		.is_dualspeed	= 1,
++		.name		= "atmel_usba_udc",
++		.dev	= {
++			.bus_id		= "gadget",
++			.release	= nop_release,
++		},
++	},
++
++	.lock	= SPIN_LOCK_UNLOCKED,
++};
++
++/*
++ * Called with interrupts disabled and udc->lock held.
++ */
++static void reset_all_endpoints(struct usba_udc *udc)
++{
++	struct usba_ep *ep;
++	struct usba_request *req, *tmp_req;
++
++	usba_writel(udc, EPT_RST, ~0UL);
++
++	ep = to_usba_ep(udc->gadget.ep0);
++	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, -ECONNRESET);
++	}
++
++	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
++		if (ep->desc)
++			usba_ep_disable(&ep->ep);
++	}
++}
++
++static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
++{
++	struct usba_ep *ep;
++
++	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
++		return to_usba_ep(udc->gadget.ep0);
++
++	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
++		u8 bEndpointAddress;
++
++		if (!ep->desc)
++			continue;
++		bEndpointAddress = ep->desc->bEndpointAddress;
++		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
++			continue;
++		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
++				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
++			return ep;
++	}
++
++	return NULL;
++}
++
++/* Called with interrupts disabled and udc->lock held */
++static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
++{
++	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++	ep->state = WAIT_FOR_SETUP;
++}
++
++static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
++{
++	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
++		return 1;
++	return 0;
++}
++
++static inline void set_address(struct usba_udc *udc, unsigned int addr)
++{
++	u32 regval;
++
++	DBG(DBG_BUS, "setting address %u...\n", addr);
++	regval = usba_readl(udc, CTRL);
++	regval = USBA_BFINS(DEV_ADDR, addr, regval);
++	usba_writel(udc, CTRL, regval);
++}
++
++static int do_test_mode(struct usba_udc *udc)
++{
++	static const char test_packet_buffer[] = {
++		/* JKJKJKJK * 9 */
++		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++		/* JJKKJJKK * 8 */
++		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
++		/* JJKKJJKK * 8 */
++		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
++		/* JJJJJJJKKKKKKK * 8 */
++		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		/* JJJJJJJK * 8 */
++		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
++		/* {JKKKKKKK * 10}, JK */
++		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
++	};
++	struct usba_ep *ep;
++	struct device *dev = &udc->pdev->dev;
++	int test_mode;
++
++	test_mode = udc->test_mode;
++
++	/* Start from a clean slate */
++	reset_all_endpoints(udc);
++
++	switch (test_mode) {
++	case 0x0100:
++		/* Test_J */
++		usba_writel(udc, TST, USBA_TST_J_MODE);
++		dev_info(dev, "Entering Test_J mode...\n");
++		break;
++	case 0x0200:
++		/* Test_K */
++		usba_writel(udc, TST, USBA_TST_K_MODE);
++		dev_info(dev, "Entering Test_K mode...\n");
++		break;
++	case 0x0300:
++		/*
++		 * Test_SE0_NAK: Force high-speed mode and set up ep0
++		 * for Bulk IN transfers
++		 */
++		ep = &usba_ep[0];
++		usba_writel(udc, TST,
++				USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
++		}
++		break;
++	case 0x0400:
++		/* Test_Packet */
++		ep = &usba_ep[0];
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_Packet: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			usba_writel(udc, TST, USBA_TST_PKT_MODE);
++			copy_to_fifo(ep->fifo, test_packet_buffer,
++					sizeof(test_packet_buffer));
++			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++			dev_info(dev, "Entering Test_Packet mode...\n");
++		}
++		break;
++	default:
++		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++/* Avoid overly long expressions */
++static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
++		return true;
++	return false;
++}
++
++static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
++		struct usb_ctrlrequest *crq)
++{
++	int retval = 0;;
++
++	switch (crq->bRequest) {
++	case USB_REQ_GET_STATUS: {
++		u16 status;
++
++		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
++			/* Self-powered, no remote wakeup */
++			status = __constant_cpu_to_le16(1 << 0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
++			status = __constant_cpu_to_le16(0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
++			struct usba_ep *target;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			status = 0;
++			if (is_stalled(udc, target))
++				status |= __constant_cpu_to_le16(1);
++		} else
++			goto delegate;
++
++		/* Write directly to the FIFO. No queueing is done. */
++		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
++			goto stall;
++		ep->state = DATA_STAGE_IN;
++		__raw_writew(status, ep->fifo);
++		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++		break;
++	}
++
++	case USB_REQ_CLEAR_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				/* Can't CLEAR_FEATURE TEST_MODE */
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
++			if (target->index != 0)
++				usba_ep_writel(target, CLR_STA,
++						USBA_TOGGLE_CLR);
++		} else {
++			goto delegate;
++		}
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_test_mode(crq)) {
++				send_status(udc, ep);
++				ep->state = STATUS_STAGE_TEST;
++				udc->test_mode = le16_to_cpu(crq->wIndex);
++				return 0;
++			} else if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
++		} else
++			goto delegate;
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_ADDRESS:
++		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
++			goto delegate;
++
++		set_address(udc, le16_to_cpu(crq->wValue));
++		send_status(udc, ep);
++		ep->state = STATUS_STAGE_ADDR;
++		break;
++
++	default:
++delegate:
++		spin_unlock(&udc->lock);
++		retval = udc->driver->setup(&udc->gadget, crq);
++		spin_lock(&udc->lock);
++	}
++
++	return retval;
++
++stall:
++	printk(KERN_ERR
++		"udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
++		"halting endpoint...\n",
++		ep->ep.name, crq->bRequestType, crq->bRequest,
++		le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
++		le16_to_cpu(crq->wLength));
++	set_protocol_stall(udc, ep);
++	return -1;
++}
++
++static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++restart:
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
++			ep->ep.name, ep->state, epstatus, epctrl);
++
++	req = NULL;
++	if (!list_empty(&ep->queue))
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		if (req->submitted)
++			next_fifo_transaction(ep, req);
++		else
++			submit_request(ep, req);
++
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		}
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
++		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
++
++		switch (ep->state) {
++		case DATA_STAGE_IN:
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = STATUS_STAGE_OUT;
++			break;
++		case STATUS_STAGE_ADDR:
++			/* Activate our new address */
++			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
++						| USBA_FADDR_EN));
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_IN:
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++				submit_next_request(ep);
++			}
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_TEST:
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			if (do_test_mode(udc))
++				set_protocol_stall(udc, ep);
++			break;
++		default:
++			printk(KERN_ERR
++				"udc: %s: TXCOMP: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		switch (ep->state) {
++		case STATUS_STAGE_OUT:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++			}
++			ep->state = WAIT_FOR_SETUP;
++			break;
++
++		case DATA_STAGE_OUT:
++			receive_data(ep);
++			break;
++
++		default:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			printk(KERN_ERR
++				"udc: %s: RXRDY: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if (epstatus & USBA_RX_SETUP) {
++		union {
++			struct usb_ctrlrequest crq;
++			unsigned long data[2];
++		} crq;
++		unsigned int pkt_len;
++		int ret;
++
++		if (ep->state != WAIT_FOR_SETUP) {
++			/*
++			 * Didn't expect a SETUP packet at this
++			 * point. Clean up any pending requests (which
++			 * may be successful).
++			 */
++			int status = -EPROTO;
++
++			/*
++			 * RXRDY and TXCOMP are dropped when SETUP
++			 * packets arrive.  Just pretend we received
++			 * the status packet.
++			 */
++			if (ep->state == STATUS_STAGE_OUT
++					|| ep->state == STATUS_STAGE_IN) {
++				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++				status = 0;
++			}
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, status);
++			}
++		}
++
++		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
++		if (pkt_len != sizeof(crq)) {
++			printk(KERN_WARNING "udc: Invalid packet length %u "
++				"(expected %lu)\n", pkt_len, sizeof(crq));
++			set_protocol_stall(udc, ep);
++			return;
++		}
++
++		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
++		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
++
++		/* Free up one bank in the FIFO so that we can
++		 * generate or receive a reply right away. */
++		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
++
++		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
++			ep->state, crq.crq.bRequestType,
++			crq.crq.bRequest); */
++
++		if (crq.crq.bRequestType & USB_DIR_IN) {
++			/*
++			 * The USB 2.0 spec states that "if wLength is
++			 * zero, there is no data transfer phase."
++			 * However, testusb #14 seems to actually
++			 * expect a data phase even if wLength = 0...
++			 */
++			ep->state = DATA_STAGE_IN;
++		} else {
++			if (crq.crq.wLength != __constant_cpu_to_le16(0))
++				ep->state = DATA_STAGE_OUT;
++			else
++				ep->state = STATUS_STAGE_IN;
++		}
++
++		ret = -1;
++		if (ep->index == 0)
++			ret = handle_ep0_setup(udc, ep, &crq.crq);
++		else {
++			spin_unlock(&udc->lock);
++			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++			spin_lock(&udc->lock);
++		}
++
++		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
++			crq.crq.bRequestType, crq.crq.bRequest,
++			le16_to_cpu(crq.crq.wLength), ep->state, ret);
++
++		if (ret < 0) {
++			/* Let the host know that we failed */
++			set_protocol_stall(udc, ep);
++		}
++	}
++}
++
++static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
++
++	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
++
++		if (list_empty(&ep->queue)) {
++			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			return;
++		}
++
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++
++		if (req->using_dma) {
++			/* Send a zero-length packet */
++			usba_ep_writel(ep, SET_STA,
++					USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_DIS,
++					USBA_TX_PK_RDY);
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		} else {
++			if (req->submitted)
++				next_fifo_transaction(ep, req);
++			else
++				submit_request(ep, req);
++
++			if (req->last_transaction) {
++				list_del_init(&req->queue);
++				submit_next_request(ep);
++				request_complete(ep, req, 0);
++			}
++		}
++
++		epstatus = usba_ep_readl(ep, STA);
++		epctrl = usba_ep_readl(ep, CTL);
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
++		receive_data(ep);
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++	}
++}
++
++static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 status, control, pending;
++
++	status = usba_dma_readl(ep, STATUS);
++	control = usba_dma_readl(ep, CONTROL);
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	ep->last_dma_status = status;
++#endif
++	pending = status & control;
++	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
++
++	if (status & USBA_DMA_CH_EN) {
++		dev_err(&udc->pdev->dev,
++			"DMA_CH_EN is set after transfer is finished!\n");
++		dev_err(&udc->pdev->dev,
++			"status=%#08x, pending=%#08x, control=%#08x\n",
++			status, pending, control);
++
++		/*
++		 * try to pretend nothing happened. We might have to
++		 * do something here...
++		 */
++	}
++
++	if (list_empty(&ep->queue))
++		/* Might happen if a reset comes along at the right moment */
++		return;
++
++	if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++		usba_update_req(ep, req, status);
++
++		list_del_init(&req->queue);
++		submit_next_request(ep);
++		request_complete(ep, req, 0);
++	}
++}
++
++static irqreturn_t usba_udc_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	u32 status;
++	u32 dma_status;
++	u32 ep_status;
++
++	spin_lock(&udc->lock);
++
++	status = usba_readl(udc, INT_STA);
++	DBG(DBG_INT, "irq, status=%#08x\n", status);
++
++	if (status & USBA_DET_SUSPEND) {
++		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
++		DBG(DBG_BUS, "Suspend detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->suspend) {
++			spin_unlock(&udc->lock);
++			udc->driver->suspend(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	if (status & USBA_WAKE_UP) {
++		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
++		DBG(DBG_BUS, "Wake Up CPU detected\n");
++	}
++
++	if (status & USBA_END_OF_RESUME) {
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
++		DBG(DBG_BUS, "Resume detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->resume) {
++			spin_unlock(&udc->lock);
++			udc->driver->resume(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	dma_status = USBA_BFEXT(DMA_INT, status);
++	if (dma_status) {
++		int i;
++
++		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
++			if (dma_status & (1 << i))
++				usba_dma_irq(udc, &usba_ep[i]);
++	}
++
++	ep_status = USBA_BFEXT(EPT_INT, status);
++	if (ep_status) {
++		int i;
++
++		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
++			if (ep_status & (1 << i)) {
++				if (ep_is_control(&usba_ep[i]))
++					usba_control_irq(udc, &usba_ep[i]);
++				else
++					usba_ep_irq(udc, &usba_ep[i]);
++			}
++	}
++
++	if (status & USBA_END_OF_RESET) {
++		struct usba_ep *ep0;
++
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
++		reset_all_endpoints(udc);
++
++		if (status & USBA_HIGH_SPEED) {
++			DBG(DBG_BUS, "High-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_HIGH;
++		} else {
++			DBG(DBG_BUS, "Full-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_FULL;
++		}
++
++		ep0 = &usba_ep[0];
++		ep0->desc = &usba_ep0_desc;
++		ep0->state = WAIT_FOR_SETUP;
++		usba_ep_writel(ep0, CFG,
++				(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
++				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
++		usba_ep_writel(ep0, CTL_ENB,
++				USBA_EPT_ENABLE | USBA_RX_SETUP);
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++				| USBA_BF(EPT_INT, 1)
++				| USBA_DET_SUSPEND
++				| USBA_END_OF_RESUME));
++
++		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
++			dev_warn(&udc->pdev->dev,
++				 "WARNING: EP0 configuration is invalid!\n");
++	}
++
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t usba_vbus_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	int vbus;
++
++	/* debounce */
++	udelay(10);
++
++	spin_lock(&udc->lock);
++
++	/* May happen if Vbus pin toggles during probe() */
++	if (!udc->driver)
++		goto out;
++
++	vbus = gpio_get_value(udc->vbus_pin);
++	if (vbus != udc->vbus_prev) {
++		if (vbus) {
++			usba_writel(udc, CTRL, USBA_EN_USBA);
++			usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++		} else {
++			udc->gadget.speed = USB_SPEED_UNKNOWN;
++			reset_all_endpoints(udc);
++			usba_writel(udc, CTRL, 0);
++			spin_unlock(&udc->lock);
++			udc->driver->disconnect(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++		udc->vbus_prev = vbus;
++	}
++
++out:
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++int usb_gadget_register_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++	int ret;
++
++	if (!udc->pdev)
++		return -ENODEV;
++
++	spin_lock_irqsave(&udc->lock, flags);
++	if (udc->driver) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		return -EBUSY;
++	}
++
++	udc->driver = driver;
++	udc->gadget.dev.driver = &driver->driver;
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	clk_enable(udc->pclk);
++	clk_enable(udc->hclk);
++
++	ret = driver->bind(&udc->gadget);
++	if (ret) {
++		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
++			driver->driver.name, ret);
++		goto err_driver_bind;
++	}
++
++	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++
++	udc->vbus_prev = 0;
++	if (udc->vbus_pin != -1)
++		enable_irq(gpio_to_irq(udc->vbus_pin));
++
++	/* If Vbus is present, enable the controller and wait for reset */
++	spin_lock_irqsave(&udc->lock, flags);
++	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
++		usba_writel(udc, CTRL, USBA_EN_USBA);
++		usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++
++err_driver_bind:
++	udc->driver = NULL;
++	udc->gadget.dev.driver = NULL;
++	return ret;
++}
++EXPORT_SYMBOL(usb_gadget_register_driver);
++
++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++
++	if (!udc->pdev)
++		return -ENODEV;
++	if (driver != udc->driver)
++		return -EINVAL;
++
++	if (udc->vbus_pin != -1)
++		disable_irq(gpio_to_irq(udc->vbus_pin));
++
++	spin_lock_irqsave(&udc->lock, flags);
++	udc->gadget.speed = USB_SPEED_UNKNOWN;
++	reset_all_endpoints(udc);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	/* This will also disable the DP pullup */
++	usba_writel(udc, CTRL, 0);
++
++	driver->unbind(&udc->gadget);
++	udc->gadget.dev.driver = NULL;
++	udc->driver = NULL;
++
++	clk_disable(udc->hclk);
++	clk_disable(udc->pclk);
++
++	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++
++	return 0;
++}
++EXPORT_SYMBOL(usb_gadget_unregister_driver);
++
++static int __init usba_udc_probe(struct platform_device *pdev)
++{
++	struct usba_platform_data *pdata = pdev->dev.platform_data;
++	struct resource *regs, *fifo;
++	struct clk *pclk, *hclk;
++	struct usba_udc *udc = &the_udc;
++	int irq, ret, i;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
++	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
++	if (!regs || !fifo)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto err_get_hclk;
++	}
++
++	udc->pdev = pdev;
++	udc->pclk = pclk;
++	udc->hclk = hclk;
++	udc->vbus_pin = -1;
++
++	ret = -ENOMEM;
++	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!udc->regs) {
++		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
++		goto err_map_regs;
++	}
++	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
++		 (unsigned long)regs->start, udc->regs);
++	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
++	if (!udc->fifo) {
++		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
++		goto err_map_fifo;
++	}
++	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
++		 (unsigned long)fifo->start, udc->fifo);
++
++	device_initialize(&udc->gadget.dev);
++	udc->gadget.dev.parent = &pdev->dev;
++	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
++
++	platform_set_drvdata(pdev, udc);
++
++	/* Make sure we start from a clean slate */
++	clk_enable(pclk);
++	usba_writel(udc, CTRL, 0);
++	clk_disable(pclk);
++
++	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
++	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
++	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
++	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
++		struct usba_ep *ep = &usba_ep[i];
++
++		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
++		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
++		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
++
++		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
++	}
++
++	ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
++	if (ret) {
++		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
++			irq, ret);
++		goto err_request_irq;
++	}
++	udc->irq = irq;
++
++	ret = device_add(&udc->gadget.dev);
++	if (ret) {
++		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
++		goto err_device_add;
++	}
++
++	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
++		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
++			udc->vbus_pin = pdata->vbus_pin;
++
++			ret = request_irq(gpio_to_irq(udc->vbus_pin),
++					usba_vbus_irq, 0,
++					"atmel_usba_udc", udc);
++			if (ret) {
++				gpio_free(udc->vbus_pin);
++				udc->vbus_pin = -1;
++				dev_warn(&udc->pdev->dev,
++					 "failed to request vbus irq; "
++					 "assuming always on\n");
++			} else {
++				disable_irq(gpio_to_irq(udc->vbus_pin));
++			}
++		}
++	}
++
++	usba_init_debugfs(udc);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_init_debugfs(udc, &usba_ep[i]);
++
++	return 0;
++
++err_device_add:
++	free_irq(irq, udc);
++err_request_irq:
++	iounmap(udc->fifo);
++err_map_fifo:
++	iounmap(udc->regs);
++err_map_regs:
++	clk_put(hclk);
++err_get_hclk:
++	clk_put(pclk);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return ret;
++}
++
++static int __exit usba_udc_remove(struct platform_device *pdev)
++{
++	struct usba_udc *udc;
++	int i;
++
++	udc = platform_get_drvdata(pdev);
++
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_cleanup_debugfs(&usba_ep[i]);
++	usba_cleanup_debugfs(udc);
++
++	if (udc->vbus_pin != -1)
++		gpio_free(udc->vbus_pin);
++
++	free_irq(udc->irq, udc);
++	iounmap(udc->fifo);
++	iounmap(udc->regs);
++	clk_put(udc->hclk);
++	clk_put(udc->pclk);
++
++	device_unregister(&udc->gadget.dev);
++
++	return 0;
++}
++
++static struct platform_driver udc_driver = {
++	.remove		= __exit_p(usba_udc_remove),
++	.driver		= {
++		.name		= "atmel_usba_udc",
++	},
++};
++
++static int __init udc_init(void)
++{
++	return platform_driver_probe(&udc_driver, usba_udc_probe);
++}
++module_init(udc_init);
++
++static void __exit udc_exit(void)
++{
++	platform_driver_unregister(&udc_driver);
++}
++module_exit(udc_exit);
++
++MODULE_DESCRIPTION("Atmel USBA UDC driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h
+new file mode 100644
+index 0000000..f4f0f8b
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.h
+@@ -0,0 +1,350 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
++#define __LINUX_USB_GADGET_USBA_UDC_H__
++
++/* USB register offsets */
++#define USBA_CTRL				0x0000
++#define USBA_FNUM				0x0004
++#define USBA_INT_ENB				0x0010
++#define USBA_INT_STA				0x0014
++#define USBA_INT_CLR				0x0018
++#define USBA_EPT_RST				0x001c
++#define USBA_TST				0x00e0
++
++/* USB endpoint register offsets */
++#define USBA_EPT_CFG				0x0000
++#define USBA_EPT_CTL_ENB			0x0004
++#define USBA_EPT_CTL_DIS			0x0008
++#define USBA_EPT_CTL				0x000c
++#define USBA_EPT_SET_STA			0x0014
++#define USBA_EPT_CLR_STA			0x0018
++#define USBA_EPT_STA				0x001c
++
++/* USB DMA register offsets */
++#define USBA_DMA_NXT_DSC			0x0000
++#define USBA_DMA_ADDRESS			0x0004
++#define USBA_DMA_CONTROL			0x0008
++#define USBA_DMA_STATUS				0x000c
++
++/* Bitfields in CTRL */
++#define USBA_DEV_ADDR_OFFSET			0
++#define USBA_DEV_ADDR_SIZE			7
++#define USBA_FADDR_EN				(1 <<  7)
++#define USBA_EN_USBA				(1 <<  8)
++#define USBA_DETACH				(1 <<  9)
++#define USBA_REMOTE_WAKE_UP			(1 << 10)
++
++/* Bitfields in FNUM */
++#define USBA_MICRO_FRAME_NUM_OFFSET		0
++#define USBA_MICRO_FRAME_NUM_SIZE		3
++#define USBA_FRAME_NUMBER_OFFSET		3
++#define USBA_FRAME_NUMBER_SIZE			11
++#define USBA_FRAME_NUM_ERROR			(1 << 31)
++
++/* Bitfields in INT_ENB/INT_STA/INT_CLR */
++#define USBA_HIGH_SPEED				(1 <<  0)
++#define USBA_DET_SUSPEND			(1 <<  1)
++#define USBA_MICRO_SOF				(1 <<  2)
++#define USBA_SOF				(1 <<  3)
++#define USBA_END_OF_RESET			(1 <<  4)
++#define USBA_WAKE_UP				(1 <<  5)
++#define USBA_END_OF_RESUME			(1 <<  6)
++#define USBA_UPSTREAM_RESUME			(1 <<  7)
++#define USBA_EPT_INT_OFFSET			8
++#define USBA_EPT_INT_SIZE			16
++#define USBA_DMA_INT_OFFSET			24
++#define USBA_DMA_INT_SIZE			8
++
++/* Bitfields in EPT_RST */
++#define USBA_RST_OFFSET				0
++#define USBA_RST_SIZE				16
++
++/* Bitfields in USBA_TST */
++#define USBA_SPEED_CFG_OFFSET			0
++#define USBA_SPEED_CFG_SIZE			2
++#define USBA_TST_J_MODE				(1 <<  2)
++#define USBA_TST_K_MODE				(1 <<  3)
++#define USBA_TST_PKT_MODE			(1 <<  4)
++#define USBA_OPMODE2				(1 <<  5)
++
++/* Bitfields in EPT_CFG */
++#define USBA_EPT_SIZE_OFFSET			0
++#define USBA_EPT_SIZE_SIZE			3
++#define USBA_EPT_DIR_IN				(1 <<  3)
++#define USBA_EPT_TYPE_OFFSET			4
++#define USBA_EPT_TYPE_SIZE			2
++#define USBA_BK_NUMBER_OFFSET			6
++#define USBA_BK_NUMBER_SIZE			2
++#define USBA_NB_TRANS_OFFSET			8
++#define USBA_NB_TRANS_SIZE			2
++#define USBA_EPT_MAPPED				(1 << 31)
++
++/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
++#define USBA_EPT_ENABLE				(1 <<  0)
++#define USBA_AUTO_VALID				(1 <<  1)
++#define USBA_INTDIS_DMA				(1 <<  3)
++#define USBA_NYET_DIS				(1 <<  4)
++#define USBA_DATAX_RX				(1 <<  6)
++#define USBA_MDATA_RX				(1 <<  7)
++/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
++#define USBA_BUSY_BANK_IE			(1 << 18)
++
++/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
++#define USBA_FORCE_STALL			(1 <<  5)
++#define USBA_TOGGLE_CLR				(1 <<  6)
++#define USBA_TOGGLE_SEQ_OFFSET			6
++#define USBA_TOGGLE_SEQ_SIZE			2
++#define USBA_ERR_OVFLW				(1 <<  8)
++#define USBA_RX_BK_RDY				(1 <<  9)
++#define USBA_KILL_BANK				(1 <<  9)
++#define USBA_TX_COMPLETE			(1 << 10)
++#define USBA_TX_PK_RDY				(1 << 11)
++#define USBA_ISO_ERR_TRANS			(1 << 11)
++#define USBA_RX_SETUP				(1 << 12)
++#define USBA_ISO_ERR_FLOW			(1 << 12)
++#define USBA_STALL_SENT				(1 << 13)
++#define USBA_ISO_ERR_CRC			(1 << 13)
++#define USBA_ISO_ERR_NBTRANS			(1 << 13)
++#define USBA_NAK_IN				(1 << 14)
++#define USBA_ISO_ERR_FLUSH			(1 << 14)
++#define USBA_NAK_OUT				(1 << 15)
++#define USBA_CURRENT_BANK_OFFSET		16
++#define USBA_CURRENT_BANK_SIZE			2
++#define USBA_BUSY_BANKS_OFFSET			18
++#define USBA_BUSY_BANKS_SIZE			2
++#define USBA_BYTE_COUNT_OFFSET			20
++#define USBA_BYTE_COUNT_SIZE			11
++#define USBA_SHORT_PACKET			(1 << 31)
++
++/* Bitfields in DMA_CONTROL */
++#define USBA_DMA_CH_EN				(1 <<  0)
++#define USBA_DMA_LINK				(1 <<  1)
++#define USBA_DMA_END_TR_EN			(1 <<  2)
++#define USBA_DMA_END_BUF_EN			(1 <<  3)
++#define USBA_DMA_END_TR_IE			(1 <<  4)
++#define USBA_DMA_END_BUF_IE			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_IE			(1 <<  6)
++#define USBA_DMA_BURST_LOCK			(1 <<  7)
++#define USBA_DMA_BUF_LEN_OFFSET			16
++#define USBA_DMA_BUF_LEN_SIZE			16
++
++/* Bitfields in DMA_STATUS */
++#define USBA_DMA_CH_ACTIVE			(1 <<  1)
++#define USBA_DMA_END_TR_ST			(1 <<  4)
++#define USBA_DMA_END_BUF_ST			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_ST			(1 <<  6)
++
++/* Constants for SPEED_CFG */
++#define USBA_SPEED_CFG_NORMAL			0
++#define USBA_SPEED_CFG_FORCE_HIGH		2
++#define USBA_SPEED_CFG_FORCE_FULL		3
++
++/* Constants for EPT_SIZE */
++#define USBA_EPT_SIZE_8				0
++#define USBA_EPT_SIZE_16			1
++#define USBA_EPT_SIZE_32			2
++#define USBA_EPT_SIZE_64			3
++#define USBA_EPT_SIZE_128			4
++#define USBA_EPT_SIZE_256			5
++#define USBA_EPT_SIZE_512			6
++#define USBA_EPT_SIZE_1024			7
++
++/* Constants for EPT_TYPE */
++#define USBA_EPT_TYPE_CONTROL			0
++#define USBA_EPT_TYPE_ISO			1
++#define USBA_EPT_TYPE_BULK			2
++#define USBA_EPT_TYPE_INT			3
++
++/* Constants for BK_NUMBER */
++#define USBA_BK_NUMBER_ZERO			0
++#define USBA_BK_NUMBER_ONE			1
++#define USBA_BK_NUMBER_DOUBLE			2
++#define USBA_BK_NUMBER_TRIPLE			3
++
++/* Bit manipulation macros */
++#define USBA_BF(name, value)					\
++	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
++	 << USBA_##name##_OFFSET)
++#define USBA_BFEXT(name, value)					\
++	(((value) >> USBA_##name##_OFFSET)			\
++	 & ((1 << USBA_##name##_SIZE) - 1))
++#define USBA_BFINS(name, value, old)				\
++	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
++		    << USBA_##name##_OFFSET))			\
++	 | USBA_BF(name, value))
++
++/* Register access macros */
++#define usba_readl(udc, reg)					\
++	__raw_readl((udc)->regs + USBA_##reg)
++#define usba_writel(udc, reg, value)				\
++	__raw_writel((value), (udc)->regs + USBA_##reg)
++#define usba_ep_readl(ep, reg)					\
++	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
++#define usba_ep_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
++#define usba_dma_readl(ep, reg)					\
++	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
++#define usba_dma_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
++
++/* Calculate base address for a given endpoint or DMA controller */
++#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
++#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
++#define USBA_FIFO_BASE(x)	((x) << 16)
++
++/* Synth parameters */
++#define USBA_NR_ENDPOINTS	7
++
++#define EP0_FIFO_SIZE		64
++#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
++#define EP0_NR_BANKS		1
++
++/*
++ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to
++ * provide this information?
++ */
++#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++
++#define FIFO_IOMEM_ID	0
++#define CTRL_IOMEM_ID	1
++
++#ifdef DEBUG
++#define DBG_ERR		0x0001	/* report all error returns */
++#define DBG_HW		0x0002	/* debug hardware initialization */
++#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
++#define DBG_INT		0x0008	/* interrupts */
++#define DBG_BUS		0x0010	/* report changes in bus state */
++#define DBG_QUEUE	0x0020  /* debug request queue processing */
++#define DBG_FIFO	0x0040  /* debug FIFO contents */
++#define DBG_DMA		0x0080  /* debug DMA handling */
++#define DBG_REQ		0x0100	/* print out queued request length */
++#define DBG_ALL		0xffff
++#define DBG_NONE	0x0000
++
++#define DEBUG_LEVEL	(DBG_ERR)
++#define DBG(level, fmt, ...)					\
++	do {							\
++		if ((level) & DEBUG_LEVEL)			\
++			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
++	} while (0)
++#else
++#define DBG(level, fmt...)
++#endif
++
++enum usba_ctrl_state {
++	WAIT_FOR_SETUP,
++	DATA_STAGE_IN,
++	DATA_STAGE_OUT,
++	STATUS_STAGE_IN,
++	STATUS_STAGE_OUT,
++	STATUS_STAGE_ADDR,
++	STATUS_STAGE_TEST,
++};
++/*
++  EP_STATE_IDLE,
++  EP_STATE_SETUP,
++  EP_STATE_IN_DATA,
++  EP_STATE_OUT_DATA,
++  EP_STATE_SET_ADDR_STATUS,
++  EP_STATE_RX_STATUS,
++  EP_STATE_TX_STATUS,
++  EP_STATE_HALT,
++*/
++
++struct usba_dma_desc {
++	dma_addr_t next;
++	dma_addr_t addr;
++	u32 ctrl;
++};
++
++struct usba_ep {
++	int					state;
++	void __iomem				*ep_regs;
++	void __iomem				*dma_regs;
++	void __iomem				*fifo;
++	struct usb_ep				ep;
++	struct usba_udc				*udc;
++
++	struct list_head			queue;
++	const struct usb_endpoint_descriptor	*desc;
++
++	u16					fifo_size;
++	u8					nr_banks;
++	u8					index;
++	unsigned int				can_dma:1;
++	unsigned int				can_isoc:1;
++	unsigned int				is_isoc:1;
++	unsigned int				is_in:1;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	u32					last_dma_status;
++	struct dentry				*debugfs_dir;
++	struct dentry				*debugfs_queue;
++	struct dentry				*debugfs_dma_status;
++	struct dentry				*debugfs_state;
++#endif
++};
++
++struct usba_request {
++	struct usb_request			req;
++	struct list_head			queue;
++
++	u32					ctrl;
++
++	unsigned int				submitted:1;
++	unsigned int				last_transaction:1;
++	unsigned int				using_dma:1;
++	unsigned int				mapped:1;
++};
++
++struct usba_udc {
++	/* Protect hw registers from concurrent modifications */
++	spinlock_t lock;
++
++	void __iomem *regs;
++	void __iomem *fifo;
++
++	struct usb_gadget gadget;
++	struct usb_gadget_driver *driver;
++	struct platform_device *pdev;
++	int irq;
++	int vbus_pin;
++	struct clk *pclk;
++	struct clk *hclk;
++
++	int test_mode;
++	int vbus_prev;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	struct dentry *debugfs_root;
++	struct dentry *debugfs_regs;
++#endif
++};
++
++static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
++{
++	return container_of(ep, struct usba_ep, ep);
++}
++
++static inline struct usba_request *to_usba_req(struct usb_request *req)
++{
++	return container_of(req, struct usba_request, req);
++}
++
++static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
++{
++	return container_of(gadget, struct usba_udc, gadget);
++}
++
++#define ep_is_control(ep)	((ep)->index == 0)
++#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
++
++#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
+diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
+index 235b618..bb361ab 100644
+--- a/drivers/video/atmel_lcdfb.c
++++ b/drivers/video/atmel_lcdfb.c
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 2580f5f..b6f936a 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE
+ 	  To have support for your specific LCD panel you will have to
+ 	  select the proper drivers which depend on this option.
+ 
++config LCD_LTV350QV
++	tristate "Samsung LTV350QV LCD Panel"
++	depends on LCD_CLASS_DEVICE && SPI_MASTER
++	default n
++	help
++	  If you have a Samsung LTV350QV LCD panel, say y to include a
++	  power control driver for it.  The panel starts up in power
++	  off state, so you need this driver in order to see any
++	  output.
++
++	  The LTV350QV panel is present on all ATSTK1000 boards.
++
+ #
+ # Backlight
+ #
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index c6e2266..965a78b 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -1,6 +1,8 @@
+ # Backlight & LCD drivers
+ 
+ obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
++obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
++
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c
+new file mode 100644
+index 0000000..751dc53
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.c
+@@ -0,0 +1,339 @@
++/*
++ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/lcd.h>
++#include <linux/module.h>
++#include <linux/spi/spi.h>
++
++#include "ltv350qv.h"
++
++#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++
++struct ltv350qv {
++	struct spi_device	*spi;
++	u8			*buffer;
++	int			power;
++	struct lcd_device	*ld;
++};
++
++/*
++ * The power-on and power-off sequences are taken from the
++ * LTV350QV-F04 data sheet from Samsung. The register definitions are
++ * taken from the S6F2002 command list also from Samsung. Both
++ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
++ *
++ * There's still some voodoo going on here, but it's a lot better than
++ * in the first incarnation of the driver where all we had was the raw
++ * numbers from the initialization sequence.
++ */
++static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++{
++	struct spi_message msg;
++	struct spi_transfer index_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++	struct spi_transfer value_xfer = {
++		.len		= 3,
++	};
++
++	spi_message_init(&msg);
++
++	/* register index */
++	lcd->buffer[0] = LTV_OPC_INDEX;
++	lcd->buffer[1] = 0x00;
++	lcd->buffer[2] = reg & 0x7f;
++	index_xfer.tx_buf = lcd->buffer;
++	spi_message_add_tail(&index_xfer, &msg);
++
++	/* register value */
++	lcd->buffer[4] = LTV_OPC_DATA;
++	lcd->buffer[5] = val >> 8;
++	lcd->buffer[6] = val;
++	value_xfer.tx_buf = lcd->buffer + 4;
++	spi_message_add_tail(&value_xfer, &msg);
++
++	return spi_sync(lcd->spi, &msg);
++}
++
++/* The comments are taken straight from the data sheet */
++static int ltv350qv_power_on(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Power On Reset Display off State */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
++		goto err;
++	msleep(15);
++
++	/* Power Setting Function 1 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
++		goto err;
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
++		goto err_power1;
++
++	/* Power Setting Function 2 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			       | LTV_SUPPLY_CURRENT(5)))
++		goto err_power2;
++
++	msleep(55);
++
++	/* Instruction Setting */
++	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
++				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
++	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
++				  LTV_DS_SAME | LTV_CHS_480
++				  | LTV_DF_RGB | LTV_RGB_BGR);
++	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
++				  LTV_VSPL_ACTIVE_LOW
++				  | LTV_HSPL_ACTIVE_LOW
++				  | LTV_DPL_SAMPLE_RISING
++				  | LTV_EPL_ACTIVE_LOW
++				  | LTV_SS_RIGHT_TO_LEFT);
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
++	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
++	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
++	if (ret)
++		goto err_settings;
++
++	/* Wait more than 2 frames */
++	msleep(20);
++
++	/* Display On Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
++				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
++	if (ret)
++		goto err_disp_on;
++
++	/* Display should now be ON. Phew. */
++	return 0;
++
++err_disp_on:
++	/*
++	 * Try to recover. Error handling probably isn't very useful
++	 * at this point, just make a best effort to switch the panel
++	 * off.
++	 */
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			   | LTV_SUPPLY_CURRENT(5));
++	ltv350qv_write_reg(lcd, LTV_GATECTL2,
++			   LTV_NW_INV_1LINE | LTV_FWI(3));
++err_settings:
++err_power2:
++err_power1:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++	msleep(1);
++err:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++	return -EIO;
++}
++
++static int ltv350qv_power_off(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Display Off Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE
++				 | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++
++	/* Power down setting 1 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++
++	/* Wait at least 1 ms */
++	msleep(1);
++
++	/* Power down setting 2 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++
++	/*
++	 * No point in trying to recover here. If we can't switch the
++	 * panel off, what are we supposed to do other than inform the
++	 * user about the failure?
++	 */
++	if (ret)
++		return -EIO;
++
++	/* Display power should now be OFF */
++	return 0;
++}
++
++static int ltv350qv_power(struct ltv350qv *lcd, int power)
++{
++	int ret = 0;
++
++	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_on(lcd);
++	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_off(lcd);
++
++	if (!ret)
++		lcd->power = power;
++
++	return ret;
++}
++
++static int ltv350qv_set_power(struct lcd_device *ld, int power)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return ltv350qv_power(lcd, power);
++}
++
++static int ltv350qv_get_power(struct lcd_device *ld)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return lcd->power;
++}
++
++static struct lcd_ops ltv_ops = {
++	.get_power	= ltv350qv_get_power,
++	.set_power	= ltv350qv_set_power,
++};
++
++static int __devinit ltv350qv_probe(struct spi_device *spi)
++{
++	struct ltv350qv *lcd;
++	struct lcd_device *ld;
++	int ret;
++
++	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
++	if (!lcd)
++		return -ENOMEM;
++
++	lcd->spi = spi;
++	lcd->power = FB_BLANK_POWERDOWN;
++	lcd->buffer = kzalloc(8, GFP_KERNEL);
++
++	ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops);
++	if (IS_ERR(ld)) {
++		ret = PTR_ERR(ld);
++		goto out_free_lcd;
++	}
++	lcd->ld = ld;
++
++	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	if (ret)
++		goto out_unregister;
++
++	dev_set_drvdata(&spi->dev, lcd);
++
++	return 0;
++
++out_unregister:
++	lcd_device_unregister(ld);
++out_free_lcd:
++	kfree(lcd);
++	return ret;
++}
++
++static int __devexit ltv350qv_remove(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	lcd_device_unregister(lcd->ld);
++	kfree(lcd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int ltv350qv_suspend(struct spi_device *spi,
++			    pm_message_t state, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == SUSPEND_POWER_DOWN)
++		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++
++	return 0;
++}
++
++static int ltv350qv_resume(struct spi_device *spi, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == RESUME_POWER_ON)
++		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++
++	return 0;
++}
++#else
++#define ltv350qv_suspend	NULL
++#define ltv350qv_resume		NULL
++#endif
++
++/* Power down all displays on reboot, poweroff or halt */
++static void ltv350qv_shutdown(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++}
++
++static struct spi_driver ltv350qv_driver = {
++	.driver = {
++		.name		= "ltv350qv",
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++
++	.probe		= ltv350qv_probe,
++	.remove		= __devexit_p(ltv350qv_remove),
++	.shutdown	= ltv350qv_shutdown,
++	.suspend	= ltv350qv_suspend,
++	.resume		= ltv350qv_resume,
++};
++
++static int __init ltv350qv_init(void)
++{
++	return spi_register_driver(&ltv350qv_driver);
++}
++
++static void __exit ltv350qv_exit(void)
++{
++	spi_unregister_driver(&ltv350qv_driver);
++}
++module_init(ltv350qv_init);
++module_exit(ltv350qv_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h
+new file mode 100644
+index 0000000..189112e
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.h
+@@ -0,0 +1,95 @@
++/*
++ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LTV350QV_H
++#define __LTV350QV_H
++
++#define LTV_OPC_INDEX	0x74
++#define LTV_OPC_DATA	0x76
++
++#define LTV_ID		0x00		/* ID Read */
++#define LTV_IFCTL	0x01		/* Display Interface Control */
++#define LTV_DATACTL	0x02		/* Display Data Control */
++#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
++#define LTV_GATECTL1	0x04		/* Gate Control 1 */
++#define LTV_GATECTL2	0x05		/* Gate Control 2 */
++#define LTV_VBP		0x06		/* Vertical Back Porch */
++#define LTV_HBP		0x07		/* Horizontal Back Porch */
++#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
++#define LTV_PWRCTL1	0x09		/* Power Control 1 */
++#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
++#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
++
++/* Bit definitions for LTV_IFCTL */
++#define LTV_IM			(1 << 15)
++#define LTV_NMD			(1 << 14)
++#define LTV_SSMD		(1 << 13)
++#define LTV_REV			(1 <<  7)
++#define LTV_NL(x)		(((x) & 0x001f) << 0)
++
++/* Bit definitions for LTV_DATACTL */
++#define LTV_DS_SAME		(0 << 12)
++#define LTV_DS_D_TO_S		(1 << 12)
++#define LTV_DS_S_TO_D		(2 << 12)
++#define LTV_CHS_384		(0 <<  9)
++#define LTV_CHS_480		(1 <<  9)
++#define LTV_CHS_492		(2 <<  9)
++#define LTV_DF_RGB		(0 <<  6)
++#define LTV_DF_RGBX		(1 <<  6)
++#define LTV_DF_XRGB		(2 <<  6)
++#define LTV_RGB_RGB		(0 <<  2)
++#define LTV_RGB_BGR		(1 <<  2)
++#define LTV_RGB_GRB		(2 <<  2)
++#define LTV_RGB_RBG		(3 <<  2)
++
++/* Bit definitions for LTV_ENTRY_MODE */
++#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
++#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
++#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
++#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
++#define LTV_DPL_SAMPLE_RISING	(0 << 13)
++#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
++#define LTV_EPL_ACTIVE_LOW	(0 << 12)
++#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
++#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
++#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
++#define LTV_STB			(1 <<  1)
++
++/* Bit definitions for LTV_GATECTL1 */
++#define LTV_CLW(x)		(((x) & 0x0007) << 12)
++#define LTV_GAON		(1 <<  5)
++#define LTV_SDR			(1 <<  3)
++
++/* Bit definitions for LTV_GATECTL2 */
++#define LTV_NW_INV_FRAME	(0 << 14)
++#define LTV_NW_INV_1LINE	(1 << 14)
++#define LTV_NW_INV_2LINE	(2 << 14)
++#define LTV_DSC			(1 << 12)
++#define LTV_GIF			(1 <<  8)
++#define LTV_FHN			(1 <<  7)
++#define LTV_FTI(x)		(((x) & 0x0003) << 4)
++#define LTV_FWI(x)		(((x) & 0x0003) << 0)
++
++/* Bit definitions for LTV_SOTCTL */
++#define LTV_SDT(x)		(((x) & 0x0007) << 10)
++#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
++
++/* Bit definitions for LTV_PWRCTL1 */
++#define LTV_VCOM_DISABLE	(1 << 14)
++#define LTV_VCOMOUT_ENABLE	(1 << 11)
++#define LTV_POWER_ON		(1 <<  9)
++#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
++#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
++
++/* Bit definitions for LTV_PWRCTL2 */
++#define LTV_VCOML_ENABLE	(1 << 13)
++#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
++#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
++
++#endif /* __LTV350QV_H */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h
+deleted file mode 100644
+index 3914d7b..0000000
+--- a/include/asm-avr32/arch-at32ap/at32ap7000.h
++++ /dev/null
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h
+new file mode 100644
+index 0000000..99684d6
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap/at32ap700x.h
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 0215965..7aa1c29 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -6,6 +6,8 @@
+ 
+ #include <linux/types.h>
+ 
++#define GPIO_PIN_NONE	(-1)
++
+ /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
+ void at32_add_system_devices(void);
+ 
+@@ -31,11 +33,26 @@ struct spi_board_info;
+ struct platform_device *
+ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
+ struct atmel_lcdfb_info;
+ struct platform_device *
+ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ 		     unsigned long fbmem_start, unsigned long fbmem_len);
+ 
++struct usba_platform_data {
++	int vbus_pin;
++};
++struct platform_device *
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
++
++struct ide_platform_data {
++	u8      cs;
++};
++struct platform_device *
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -50,4 +67,26 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++struct platform_device *at32_add_device_ac97c(unsigned int id);
++struct platform_device *at32_add_device_abdac(unsigned int id);
++
++struct cf_platform_data {
++	int	detect_pin;
++	int	reset_pin;
++	int	vcc_pin;
++	int	ready_pin;
++	u8	cs;
++};
++struct platform_device *
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		struct cf_platform_data *data);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
+index a762f42..0dc2026 100644
+--- a/include/asm-avr32/arch-at32ap/cpu.h
++++ b/include/asm-avr32/arch-at32ap/cpu.h
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h
+index ee59e40..4ec6abc 100644
+--- a/include/asm-avr32/arch-at32ap/io.h
++++ b/include/asm-avr32/arch-at32ap/io.h
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
+index 9930871..135e034 100644
+--- a/include/asm-avr32/arch-at32ap/portmux.h
++++ b/include/asm-avr32/arch-at32ap/portmux.h
+@@ -19,10 +19,23 @@
+ #define AT32_GPIOF_OUTPUT	0x00000002	/* (OUT) Enable output driver */
+ #define AT32_GPIOF_HIGH		0x00000004	/* (OUT) Set output high */
+ #define AT32_GPIOF_DEGLITCH	0x00000008	/* (IN) Filter glitches */
++#define AT32_GPIOF_MULTIDRV	0x00000010	/* Enable multidriver option */
+ 
+ void at32_select_periph(unsigned int pin, unsigned int periph,
+ 			unsigned long flags);
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
+index 07152b7..c98eea4 100644
+--- a/include/asm-avr32/arch-at32ap/smc.h
++++ b/include/asm-avr32/arch-at32ap/smc.h
+@@ -15,22 +15,50 @@
+ /*
+  * All timing parameters are in nanoseconds.
+  */
++struct smc_timing {
++	/* Delay from address valid to assertion of given strobe */
++	int ncs_read_setup;
++	int nrd_setup;
++	int ncs_write_setup;
++	int nwe_setup;
++
++	/* Pulse length of given strobe */
++	int ncs_read_pulse;
++	int nrd_pulse;
++	int ncs_write_pulse;
++	int nwe_pulse;
++
++	/* Total cycle length of given operation */
++	int read_cycle;
++	int write_cycle;
++
++	/* Minimal recovery times, will extend cycle if needed */
++	int ncs_read_recover;
++	int nrd_recover;
++	int ncs_write_recover;
++	int nwe_recover;
++};
++
++/*
++ * All timing parameters are in clock cycles.
++ */
+ struct smc_config {
++
+ 	/* Delay from address valid to assertion of given strobe */
+-	u16		ncs_read_setup;
+-	u16		nrd_setup;
+-	u16		ncs_write_setup;
+-	u16		nwe_setup;
++	u8		ncs_read_setup;
++	u8		nrd_setup;
++	u8		ncs_write_setup;
++	u8		nwe_setup;
+ 
+ 	/* Pulse length of given strobe */
+-	u16		ncs_read_pulse;
+-	u16		nrd_pulse;
+-	u16		ncs_write_pulse;
+-	u16		nwe_pulse;
++	u8		ncs_read_pulse;
++	u8		nrd_pulse;
++	u8		ncs_write_pulse;
++	u8		nwe_pulse;
+ 
+ 	/* Total cycle length of given operation */
+-	u16		read_cycle;
+-	u16		write_cycle;
++	u8		read_cycle;
++	u8		write_cycle;
+ 
+ 	/* Bus width in bytes */
+ 	u8		bus_width;
+@@ -76,6 +104,9 @@ struct smc_config {
+ 	unsigned int	tdf_mode:1;
+ };
+ 
++extern void smc_set_timing(struct smc_config *config,
++			   const struct smc_timing *timing);
++
+ extern int smc_set_configuration(int cs, const struct smc_config *config);
+ extern struct smc_config *smc_get_configuration(int cs);
+ 
+diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h
+new file mode 100644
+index 0000000..56a4965
+--- /dev/null
++++ b/include/asm-avr32/dma-controller.h
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
+index 21bb60b..81e3426 100644
+--- a/include/asm-avr32/dma-mapping.h
++++ b/include/asm-avr32/dma-mapping.h
+@@ -264,7 +264,11 @@ static inline void
+ dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ 			size_t size, enum dma_data_direction direction)
+ {
+-	dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+@@ -309,12 +313,11 @@ static inline void
+ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ 		    int nents, enum dma_data_direction direction)
+ {
+-	int i;
+-
+-	for (i = 0; i < nents; i++) {
+-		dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
+-			       sg[i].length, direction);
+-	}
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h
+index a8236ba..dc2d527 100644
+--- a/include/asm-avr32/system.h
++++ b/include/asm-avr32/system.h
+@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
+ 
+ extern void __xchg_called_with_bad_pointer(void);
+ 
+-#ifdef __CHECKER__
+-extern unsigned long __builtin_xchg(void *ptr, unsigned long x);
+-#endif
++static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
++{
++	u32 ret;
+ 
+-#define xchg_u32(val, m) __builtin_xchg((void *)m, val)
++	asm volatile("xchg %[ret], %[m], %[val]"
++			: [ret] "=&r"(ret), "=m"(*m)
++			: "m"(*m), [m] "r"(m), [val] "r"(val)
++			: "memory");
++	return ret;
++}
+ 
+ static inline unsigned long __xchg(unsigned long x,
+ 				       volatile void *ptr,
+diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
+index 3b4e35b..de09009 100644
+--- a/include/asm-avr32/unistd.h
++++ b/include/asm-avr32/unistd.h
+@@ -303,6 +303,19 @@
+ #ifdef __KERNEL__
+ #define NR_syscalls		282
+ 
++/* Old stuff */
++#define __IGNORE_uselib
++#define __IGNORE_mmap
++
++/* NUMA stuff */
++#define __IGNORE_mbind
++#define __IGNORE_get_mempolicy
++#define __IGNORE_set_mempolicy
++#define __IGNORE_migrate_pages
++#define __IGNORE_move_pages
++
++/* SMP stuff */
++#define __IGNORE_getcpu
+ 
+ #define __ARCH_WANT_IPC_PARSE_VERSION
+ #define __ARCH_WANT_STAT64
+diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
+new file mode 100644
+index 0000000..0602339
+--- /dev/null
++++ b/include/linux/atmel-ssc.h
+@@ -0,0 +1,312 @@
++#ifndef __INCLUDE_ATMEL_SSC_H
++#define __INCLUDE_ATMEL_SSC_H
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++
++struct ssc_device {
++	struct list_head	list;
++	void __iomem		*regs;
++	struct platform_device	*pdev;
++	struct clk		*clk;
++	int			user;
++	int			irq;
++};
++
++struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
++void ssc_free(struct ssc_device *ssc);
++
++/* SSC register offsets */
++
++/* SSC Control Register */
++#define SSC_CR				0x00000000
++#define SSC_CR_RXDIS_SIZE			 1
++#define SSC_CR_RXDIS_OFFSET			 1
++#define SSC_CR_RXEN_SIZE			 1
++#define SSC_CR_RXEN_OFFSET			 0
++#define SSC_CR_SWRST_SIZE			 1
++#define SSC_CR_SWRST_OFFSET			15
++#define SSC_CR_TXDIS_SIZE			 1
++#define SSC_CR_TXDIS_OFFSET			 9
++#define SSC_CR_TXEN_SIZE			 1
++#define SSC_CR_TXEN_OFFSET			 8
++
++/* SSC Clock Mode Register */
++#define SSC_CMR				0x00000004
++#define SSC_CMR_DIV_SIZE			12
++#define SSC_CMR_DIV_OFFSET			 0
++
++/* SSC Receive Clock Mode Register */
++#define SSC_RCMR			0x00000010
++#define SSC_RCMR_CKG_SIZE			 2
++#define SSC_RCMR_CKG_OFFSET			 6
++#define SSC_RCMR_CKI_SIZE			 1
++#define SSC_RCMR_CKI_OFFSET			 5
++#define SSC_RCMR_CKO_SIZE			 3
++#define SSC_RCMR_CKO_OFFSET			 2
++#define SSC_RCMR_CKS_SIZE			 2
++#define SSC_RCMR_CKS_OFFSET			 0
++#define SSC_RCMR_PERIOD_SIZE			 8
++#define SSC_RCMR_PERIOD_OFFSET			24
++#define SSC_RCMR_START_SIZE			 4
++#define SSC_RCMR_START_OFFSET			 8
++#define SSC_RCMR_STOP_SIZE			 1
++#define SSC_RCMR_STOP_OFFSET			12
++#define SSC_RCMR_STTDLY_SIZE			 8
++#define SSC_RCMR_STTDLY_OFFSET			16
++
++/* SSC Receive Frame Mode Register */
++#define SSC_RFMR			0x00000014
++#define SSC_RFMR_DATLEN_SIZE			 5
++#define SSC_RFMR_DATLEN_OFFSET			 0
++#define SSC_RFMR_DATNB_SIZE			 4
++#define SSC_RFMR_DATNB_OFFSET			 8
++#define SSC_RFMR_FSEDGE_SIZE			 1
++#define SSC_RFMR_FSEDGE_OFFSET			24
++#define SSC_RFMR_FSLEN_SIZE			 4
++#define SSC_RFMR_FSLEN_OFFSET			16
++#define SSC_RFMR_FSOS_SIZE			 4
++#define SSC_RFMR_FSOS_OFFSET			20
++#define SSC_RFMR_LOOP_SIZE			 1
++#define SSC_RFMR_LOOP_OFFSET			 5
++#define SSC_RFMR_MSBF_SIZE			 1
++#define SSC_RFMR_MSBF_OFFSET			 7
++
++/* SSC Transmit Clock Mode Register */
++#define SSC_TCMR			0x00000018
++#define SSC_TCMR_CKG_SIZE			 2
++#define SSC_TCMR_CKG_OFFSET			 6
++#define SSC_TCMR_CKI_SIZE			 1
++#define SSC_TCMR_CKI_OFFSET			 5
++#define SSC_TCMR_CKO_SIZE			 3
++#define SSC_TCMR_CKO_OFFSET			 2
++#define SSC_TCMR_CKS_SIZE			 2
++#define SSC_TCMR_CKS_OFFSET			 0
++#define SSC_TCMR_PERIOD_SIZE			 8
++#define SSC_TCMR_PERIOD_OFFSET			24
++#define SSC_TCMR_START_SIZE			 4
++#define SSC_TCMR_START_OFFSET			 8
++#define SSC_TCMR_STTDLY_SIZE			 8
++#define SSC_TCMR_STTDLY_OFFSET			16
++
++/* SSC Transmit Frame Mode Register */
++#define SSC_TFMR			0x0000001c
++#define SSC_TFMR_DATDEF_SIZE			 1
++#define SSC_TFMR_DATDEF_OFFSET			 5
++#define SSC_TFMR_DATLEN_SIZE			 5
++#define SSC_TFMR_DATLEN_OFFSET			 0
++#define SSC_TFMR_DATNB_SIZE			 4
++#define SSC_TFMR_DATNB_OFFSET			 8
++#define SSC_TFMR_FSDEN_SIZE			 1
++#define SSC_TFMR_FSDEN_OFFSET			23
++#define SSC_TFMR_FSEDGE_SIZE			 1
++#define SSC_TFMR_FSEDGE_OFFSET			24
++#define SSC_TFMR_FSLEN_SIZE			 4
++#define SSC_TFMR_FSLEN_OFFSET			16
++#define SSC_TFMR_FSOS_SIZE			 3
++#define SSC_TFMR_FSOS_OFFSET			20
++#define SSC_TFMR_MSBF_SIZE			 1
++#define SSC_TFMR_MSBF_OFFSET			 7
++
++/* SSC Receive Hold Register */
++#define SSC_RHR				0x00000020
++#define SSC_RHR_RDAT_SIZE			32
++#define SSC_RHR_RDAT_OFFSET			 0
++
++/* SSC Transmit Hold Register */
++#define SSC_THR				0x00000024
++#define SSC_THR_TDAT_SIZE			32
++#define SSC_THR_TDAT_OFFSET			 0
++
++/* SSC Receive Sync. Holding Register */
++#define SSC_RSHR			0x00000030
++#define SSC_RSHR_RSDAT_SIZE			16
++#define SSC_RSHR_RSDAT_OFFSET			 0
++
++/* SSC Transmit Sync. Holding Register */
++#define SSC_TSHR			0x00000034
++#define SSC_TSHR_TSDAT_SIZE			16
++#define SSC_TSHR_RSDAT_OFFSET			 0
++
++/* SSC Receive Compare 0 Register */
++#define SSC_RC0R			0x00000038
++#define SSC_RC0R_CP0_SIZE			16
++#define SSC_RC0R_CP0_OFFSET			 0
++
++/* SSC Receive Compare 1 Register */
++#define SSC_RC1R			0x0000003c
++#define SSC_RC1R_CP1_SIZE			16
++#define SSC_RC1R_CP1_OFFSET			 0
++
++/* SSC Status Register */
++#define SSC_SR				0x00000040
++#define SSC_SR_CP0_SIZE				 1
++#define SSC_SR_CP0_OFFSET			 8
++#define SSC_SR_CP1_SIZE				 1
++#define SSC_SR_CP1_OFFSET			 9
++#define SSC_SR_ENDRX_SIZE			 1
++#define SSC_SR_ENDRX_OFFSET			 6
++#define SSC_SR_ENDTX_SIZE			 1
++#define SSC_SR_ENDTX_OFFSET			 2
++#define SSC_SR_OVRUN_SIZE			 1
++#define SSC_SR_OVRUN_OFFSET			 5
++#define SSC_SR_RXBUFF_SIZE			 1
++#define SSC_SR_RXBUFF_OFFSET			 7
++#define SSC_SR_RXEN_SIZE			 1
++#define SSC_SR_RXEN_OFFSET			17
++#define SSC_SR_RXRDY_SIZE			 1
++#define SSC_SR_RXRDY_OFFSET			 4
++#define SSC_SR_RXSYN_SIZE			 1
++#define SSC_SR_RXSYN_OFFSET			11
++#define SSC_SR_TXBUFE_SIZE			 1
++#define SSC_SR_TXBUFE_OFFSET			 3
++#define SSC_SR_TXEMPTY_SIZE			 1
++#define SSC_SR_TXEMPTY_OFFSET			 1
++#define SSC_SR_TXEN_SIZE			 1
++#define SSC_SR_TXEN_OFFSET			16
++#define SSC_SR_TXRDY_SIZE			 1
++#define SSC_SR_TXRDY_OFFSET			 0
++#define SSC_SR_TXSYN_SIZE			 1
++#define SSC_SR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Enable Register */
++#define SSC_IER				0x00000044
++#define SSC_IER_CP0_SIZE			 1
++#define SSC_IER_CP0_OFFSET			 8
++#define SSC_IER_CP1_SIZE			 1
++#define SSC_IER_CP1_OFFSET			 9
++#define SSC_IER_ENDRX_SIZE			 1
++#define SSC_IER_ENDRX_OFFSET			 6
++#define SSC_IER_ENDTX_SIZE			 1
++#define SSC_IER_ENDTX_OFFSET			 2
++#define SSC_IER_OVRUN_SIZE			 1
++#define SSC_IER_OVRUN_OFFSET			 5
++#define SSC_IER_RXBUFF_SIZE			 1
++#define SSC_IER_RXBUFF_OFFSET			 7
++#define SSC_IER_RXRDY_SIZE			 1
++#define SSC_IER_RXRDY_OFFSET			 4
++#define SSC_IER_RXSYN_SIZE			 1
++#define SSC_IER_RXSYN_OFFSET			11
++#define SSC_IER_TXBUFE_SIZE			 1
++#define SSC_IER_TXBUFE_OFFSET			 3
++#define SSC_IER_TXEMPTY_SIZE			 1
++#define SSC_IER_TXEMPTY_OFFSET			 1
++#define SSC_IER_TXRDY_SIZE			 1
++#define SSC_IER_TXRDY_OFFSET			 0
++#define SSC_IER_TXSYN_SIZE			 1
++#define SSC_IER_TXSYN_OFFSET			10
++
++/* SSC Interrupt Disable Register */
++#define SSC_IDR				0x00000048
++#define SSC_IDR_CP0_SIZE			 1
++#define SSC_IDR_CP0_OFFSET			 8
++#define SSC_IDR_CP1_SIZE			 1
++#define SSC_IDR_CP1_OFFSET			 9
++#define SSC_IDR_ENDRX_SIZE			 1
++#define SSC_IDR_ENDRX_OFFSET			 6
++#define SSC_IDR_ENDTX_SIZE			 1
++#define SSC_IDR_ENDTX_OFFSET			 2
++#define SSC_IDR_OVRUN_SIZE			 1
++#define SSC_IDR_OVRUN_OFFSET			 5
++#define SSC_IDR_RXBUFF_SIZE			 1
++#define SSC_IDR_RXBUFF_OFFSET			 7
++#define SSC_IDR_RXRDY_SIZE			 1
++#define SSC_IDR_RXRDY_OFFSET			 4
++#define SSC_IDR_RXSYN_SIZE			 1
++#define SSC_IDR_RXSYN_OFFSET			11
++#define SSC_IDR_TXBUFE_SIZE			 1
++#define SSC_IDR_TXBUFE_OFFSET			 3
++#define SSC_IDR_TXEMPTY_SIZE			 1
++#define SSC_IDR_TXEMPTY_OFFSET			 1
++#define SSC_IDR_TXRDY_SIZE			 1
++#define SSC_IDR_TXRDY_OFFSET			 0
++#define SSC_IDR_TXSYN_SIZE			 1
++#define SSC_IDR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Mask Register */
++#define SSC_IMR				0x0000004c
++#define SSC_IMR_CP0_SIZE			 1
++#define SSC_IMR_CP0_OFFSET			 8
++#define SSC_IMR_CP1_SIZE			 1
++#define SSC_IMR_CP1_OFFSET			 9
++#define SSC_IMR_ENDRX_SIZE			 1
++#define SSC_IMR_ENDRX_OFFSET			 6
++#define SSC_IMR_ENDTX_SIZE			 1
++#define SSC_IMR_ENDTX_OFFSET			 2
++#define SSC_IMR_OVRUN_SIZE			 1
++#define SSC_IMR_OVRUN_OFFSET			 5
++#define SSC_IMR_RXBUFF_SIZE			 1
++#define SSC_IMR_RXBUFF_OFFSET			 7
++#define SSC_IMR_RXRDY_SIZE			 1
++#define SSC_IMR_RXRDY_OFFSET			 4
++#define SSC_IMR_RXSYN_SIZE			 1
++#define SSC_IMR_RXSYN_OFFSET			11
++#define SSC_IMR_TXBUFE_SIZE			 1
++#define SSC_IMR_TXBUFE_OFFSET			 3
++#define SSC_IMR_TXEMPTY_SIZE			 1
++#define SSC_IMR_TXEMPTY_OFFSET			 1
++#define SSC_IMR_TXRDY_SIZE			 1
++#define SSC_IMR_TXRDY_OFFSET			 0
++#define SSC_IMR_TXSYN_SIZE			 1
++#define SSC_IMR_TXSYN_OFFSET			10
++
++/* SSC PDC Receive Pointer Register */
++#define SSC_PDC_RPR			0x00000100
++
++/* SSC PDC Receive Counter Register */
++#define SSC_PDC_RCR			0x00000104
++
++/* SSC PDC Transmit Pointer Register */
++#define SSC_PDC_TPR			0x00000108
++
++/* SSC PDC Receive Next Pointer Register */
++#define SSC_PDC_RNPR			0x00000110
++
++/* SSC PDC Receive Next Counter Register */
++#define SSC_PDC_RNCR			0x00000114
++
++/* SSC PDC Transmit Counter Register */
++#define SSC_PDC_TCR			0x0000010c
++
++/* SSC PDC Transmit Next Pointer Register */
++#define SSC_PDC_TNPR			0x00000118
++
++/* SSC PDC Transmit Next Counter Register */
++#define SSC_PDC_TNCR			0x0000011c
++
++/* SSC PDC Transfer Control Register */
++#define SSC_PDC_PTCR			0x00000120
++#define SSC_PDC_PTCR_RXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_RXTDIS_OFFSET		 1
++#define SSC_PDC_PTCR_RXTEN_SIZE			 1
++#define SSC_PDC_PTCR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTCR_TXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_TXTDIS_OFFSET		 9
++#define SSC_PDC_PTCR_TXTEN_SIZE			 1
++#define SSC_PDC_PTCR_TXTEN_OFFSET		 8
++
++/* SSC PDC Transfer Status Register */
++#define SSC_PDC_PTSR			0x00000124
++#define SSC_PDC_PTSR_RXTEN_SIZE			 1
++#define SSC_PDC_PTSR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTSR_TXTEN_SIZE			 1
++#define SSC_PDC_PTSR_TXTEN_OFFSET		 8
++
++/* Bit manipulation macros */
++#define SSC_BIT(name)					\
++	(1 << SSC_##name##_OFFSET)
++#define SSC_BF(name, value)				\
++	(((value) & ((1 << SSC_##name##_SIZE) - 1))	\
++	 << SSC_##name##_OFFSET)
++#define SSC_BFEXT(name, value)				\
++	(((value) >> SSC_##name##_OFFSET)		\
++	 & ((1 << SSC_##name##_SIZE) - 1))
++#define SSC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << SSC_##name##_SIZE) - 1)	\
++	<< SSC_##name##_OFFSET)) | SSC_BF(name, value))
++
++/* Register access macros */
++#define ssc_readl(base, reg)		__raw_readl(base + SSC_##reg)
++#define ssc_writel(base, reg, value)	__raw_writel((value), base + SSC_##reg)
++
++#endif /* __INCLUDE_ATMEL_SSC_H */
+diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h
+new file mode 100644
+index 0000000..0f20a70
+--- /dev/null
++++ b/include/linux/spi/at73c213.h
+@@ -0,0 +1,25 @@
++/*
++ * Board-specific data used to set up AT73c213 audio DAC driver.
++ */
++
++#ifndef __LINUX_SPI_AT73C213_H
++#define __LINUX_SPI_AT73C213_H
++
++/**
++ * at73c213_board_info - how the external DAC is wired to the device.
++ *
++ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio.
++ * @dac_clk: the external clock used to provide master clock to the DAC.
++ * @shortname: a short discription for the DAC, seen by userspace tools.
++ *
++ * This struct contains the configuration of the hardware connection to the
++ * external DAC. The DAC needs a master clock and a I2S audio stream. It also
++ * provides a name which is used to identify it in userspace tools.
++ */
++struct at73c213_board_info {
++	int		ssc_id;
++	struct clk	*dac_clk;
++	char		shortname[32];
++};
++
++#endif /* __LINUX_SPI_AT73C213_H */
+diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h
+index c1d1629..5f38803 100644
+--- a/include/pcmcia/cs_types.h
++++ b/include/pcmcia/cs_types.h
+@@ -21,7 +21,7 @@
+ #include <sys/types.h>
+ #endif
+ 
+-#if defined(__arm__) || defined(__mips__)
++#if defined(__arm__) || defined(__mips__) || defined(__avr32__)
+ /* This (ioaddr_t) is exposed to userspace & hence cannot be changed. */
+ typedef u_int   ioaddr_t;
+ #else
+diff --git a/init/do_mounts.c b/init/do_mounts.c
+index 4efa1e5..0e88ed1 100644
+--- a/init/do_mounts.c
++++ b/init/do_mounts.c
+@@ -219,8 +219,14 @@ __setup("root=", root_dev_setup);
+ 
+ static int __init rootwait_setup(char *str)
+ {
+-	if (*str)
++	if (*str && *str != '=')
+ 		return 0;
++
++	if (*str)
++		printk(KERN_WARNING
++			"WARNING: \"rootwait=1\" is deprecated, "
++			"use \"rootwait\" instead.\n");
++
+ 	root_wait = 1;
+ 	return 1;
+ }
+diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
+index f7844f6..6631586 100755
+--- a/scripts/checkstack.pl
++++ b/scripts/checkstack.pl
+@@ -12,6 +12,7 @@
+ #	sh64 port by Paul Mundt
+ #	Random bits by Matt Mackall <mpm@selenic.com>
+ #	M68k port by Geert Uytterhoeven and Andreas Schwab
++#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
+ #
+ #	Usage:
+ #	objdump -d vmlinux | stackcheck.pl [arch]
+@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs);
+ 	if ($arch eq 'arm') {
+ 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
+ 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
++	} elsif ($arch eq 'avr32') {
++		#8000008a:       20 1d           sub sp,4
++		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
++		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
+ 	} elsif ($arch =~ /^i[3456]86$/) {
+ 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
+ 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
+diff --git a/sound/Kconfig b/sound/Kconfig
+index e48b9b3..29a9979 100644
+--- a/sound/Kconfig
++++ b/sound/Kconfig
+@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
++if SPI
++source "sound/spi/Kconfig"
++endif
++
+ source "sound/mips/Kconfig"
+ 
+ source "sound/sh/Kconfig"
+diff --git a/sound/Makefile b/sound/Makefile
+index 3ead922..e655df7 100644
+--- a/sound/Makefile
++++ b/sound/Makefile
+@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o
+ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/
++obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig
+new file mode 100644
+index 0000000..17d1d91
+--- /dev/null
++++ b/sound/avr32/Kconfig
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile
+new file mode 100644
+index 0000000..5d87d0e
+--- /dev/null
++++ b/sound/avr32/Makefile
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+new file mode 100644
+index 0000000..0ec0b1c
+--- /dev/null
++++ b/sound/avr32/ac97c.c
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h
+new file mode 100644
+index 0000000..96246e7
+--- /dev/null
++++ b/sound/avr32/ac97c.h
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
+index af37cd0..e3cc557 100644
+--- a/sound/oss/Kconfig
++++ b/sound/oss/Kconfig
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff --git a/sound/oss/Makefile b/sound/oss/Makefile
+index 1200670..fafc246 100644
+--- a/sound/oss/Makefile
++++ b/sound/oss/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o ad1848.o
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
+diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c
+new file mode 100644
+index 0000000..cb997d7
+--- /dev/null
++++ b/sound/oss/at32_abdac.c
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h
+new file mode 100644
+index 0000000..3c88e25
+--- /dev/null
++++ b/sound/oss/at32_abdac.h
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig
+new file mode 100644
+index 0000000..0d08c29
+--- /dev/null
++++ b/sound/spi/Kconfig
+@@ -0,0 +1,31 @@
++#SPI drivers
++
++menu "SPI devices"
++	depends on SND != n
++
++config SND_AT73C213
++	tristate "Atmel AT73C213 DAC driver"
++	depends on ATMEL_SSC
++	select SND_PCM
++	help
++	  Say Y here if you want to use the Atmel AT73C213 external DAC. This
++	  DAC can be found on Atmel development boards.
++
++	  This driver requires the Atmel SSC driver for sound sink, a
++	  peripheral found on most AT91 and AVR32 microprocessors.
++
++	  To compile this driver as a module, choose M here: the module will be
++	  called snd-at73c213.
++
++config SND_AT73C213_TARGET_BITRATE
++	int "Target bitrate for AT73C213"
++	depends on SND_AT73C213
++	default "48000"
++	range 8000 50000
++	help
++	  Sets the target bitrate for the bitrate calculator in the driver.
++	  Limited by hardware to be between 8000 Hz and 50000 Hz.
++
++	  Set to 48000 Hz by default.
++
++endmenu
+diff --git a/sound/spi/Makefile b/sound/spi/Makefile
+new file mode 100644
+index 0000000..026fb73
+--- /dev/null
++++ b/sound/spi/Makefile
+@@ -0,0 +1,5 @@
++# Makefile for SPI drivers
++
++snd-at73c213-objs		:= at73c213.o
++
++obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
+diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c
+new file mode 100644
+index 0000000..f514f47
+--- /dev/null
++++ b/sound/spi/at73c213.c
+@@ -0,0 +1,1121 @@
++/*
++ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
++ *
++ * Copyright (C) 2006-2007 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++
++/*#define DEBUG*/
++
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/initval.h>
++#include <sound/control.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++
++#include <linux/atmel-ssc.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
++
++#include "at73c213.h"
++
++#define BITRATE_MIN	 8000 /* Hardware limit? */
++#define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
++#define BITRATE_MAX	50000 /* Hardware limit. */
++
++/* Initial (hardware reset) AT73C213 register values. */
++static u8 snd_at73c213_original_image[18] =
++{
++	0x00,	/* 00 - CTRL    */
++	0x05,	/* 01 - LLIG    */
++	0x05,	/* 02 - RLIG    */
++	0x08,	/* 03 - LPMG    */
++	0x08,	/* 04 - RPMG    */
++	0x00,	/* 05 - LLOG    */
++	0x00,	/* 06 - RLOG    */
++	0x22,	/* 07 - OLC     */
++	0x09,	/* 08 - MC      */
++	0x00,	/* 09 - CSFC    */
++	0x00,	/* 0A - MISC    */
++	0x00,	/* 0B -         */
++	0x00,	/* 0C - PRECH   */
++	0x05,	/* 0D - AUXG    */
++	0x00,	/* 0E -         */
++	0x00,	/* 0F -         */
++	0x00,	/* 10 - RST     */
++	0x00,	/* 11 - PA_CTRL */
++};
++
++struct snd_at73c213 {
++	struct snd_card			*card;
++	struct snd_pcm			*pcm;
++	struct snd_pcm_substream	*substream;
++	struct at73c213_board_info	*board;
++	int				irq;
++	int				period;
++	unsigned long			bitrate;
++	struct clk			*bitclk;
++	struct ssc_device		*ssc;
++	struct spi_device		*spi;
++	u8				spi_wbuffer[2];
++	u8				spi_rbuffer[2];
++	/* Image of the SPI registers in AT73C213. */
++	u8				reg_image[18];
++	/* Protect registers against concurrent access. */
++	spinlock_t			lock;
++};
++
++#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
++
++static int
++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
++{
++	struct spi_message msg;
++	struct spi_transfer msg_xfer = {
++		.len		= 2,
++		.cs_change	= 0,
++	};
++	int retval;
++
++	spi_message_init(&msg);
++
++	chip->spi_wbuffer[0] = reg;
++	chip->spi_wbuffer[1] = val;
++
++	msg_xfer.tx_buf = chip->spi_wbuffer;
++	msg_xfer.rx_buf = chip->spi_rbuffer;
++	spi_message_add_tail(&msg_xfer, &msg);
++
++	retval = spi_sync(chip->spi, &msg);
++
++	if (!retval)
++		chip->reg_image[reg] = val;
++
++	return retval;
++}
++
++static struct snd_pcm_hardware snd_at73c213_playback_hw = {
++	.info		= SNDRV_PCM_INFO_INTERLEAVED |
++			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
++	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
++	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
++	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
++	.channels_min	= 2,
++	.channels_max	= 2,
++	.buffer_bytes_max = 64 * 1024 - 1,
++	.period_bytes_min = 512,
++	.period_bytes_max = 64 * 1024 - 1,
++	.periods_min	= 4,
++	.periods_max	= 1024,
++};
++
++/*
++ * Calculate and set bitrate and divisions.
++ */
++static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
++{
++	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
++	unsigned long dac_rate_new, ssc_div, status;
++	unsigned long ssc_div_max, ssc_div_min;
++	int max_tries;
++
++	/*
++	 * We connect two clocks here, picking divisors so the I2S clocks
++	 * out data at the same rate the DAC clocks it in ... and as close
++	 * as practical to the desired target rate.
++	 *
++	 * The DAC master clock (MCLK) is programmable, and is either 256
++	 * or (not here) 384 times the I2S output clock (BCLK).
++	 */
++
++	/* SSC clock / (bitrate * stereo * 16-bit). */
++	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
++	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
++	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
++	max_tries = (ssc_div_max - ssc_div_min) / 2;
++
++	if (max_tries < 1)
++		max_tries = 1;
++
++	/* ssc_div must be a power of 2. */
++	ssc_div = (ssc_div + 1) & ~1UL;
++
++	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
++		ssc_div -= 2;
++		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
++			return -ENXIO;
++	}
++
++	/* Search for a possible bitrate. */
++	do {
++		/* SSC clock / (ssc divider * 16-bit * stereo). */
++		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
++			return -ENXIO;
++
++		/* 256 / (2 * 16) = 8 */
++		dac_rate_new = 8 * (ssc_rate / ssc_div);
++
++		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
++		if (status < 0)
++			return status;
++
++		/* Ignore difference smaller than 256 Hz. */
++		if ((status/256) == (dac_rate_new/256))
++			goto set_rate;
++
++		ssc_div += 2;
++	} while (--max_tries);
++
++	/* Not able to find a valid bitrate. */
++	return -ENXIO;
++
++set_rate:
++	status = clk_set_rate(chip->board->dac_clk, status);
++	if (status < 0)
++		return status;
++
++	/* Set divider in SSC device. */
++	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
++
++	/* SSC clock / (ssc divider * 16-bit * stereo). */
++	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
++
++	dev_info(&chip->spi->dev,
++			"at73c213: supported bitrate is %lu (%lu divider)\n",
++			chip->bitrate, ssc_div);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	snd_at73c213_playback_hw.rate_min = chip->bitrate;
++	snd_at73c213_playback_hw.rate_max = chip->bitrate;
++	runtime->hw = snd_at73c213_playback_hw;
++	chip->substream = substream;
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	chip->substream = NULL;
++	return 0;
++}
++
++static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
++				 struct snd_pcm_hw_params *hw_params)
++{
++	return snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++}
++
++static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size;
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++
++	chip->period = 0;
++
++	ssc_writel(chip->ssc->regs, PDC_TPR,
++			(long)runtime->dma_addr);
++	ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2);
++	ssc_writel(chip->ssc->regs, PDC_TNPR,
++			(long)runtime->dma_addr + block_size);
++	ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
++				   int cmd)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	int retval = 0;
++
++	spin_lock(&chip->lock);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
++		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
++		break;
++	default:
++		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
++		retval = -EINVAL;
++		break;
++	}
++
++	spin_unlock(&chip->lock);
++
++	return retval;
++}
++
++static snd_pcm_uframes_t
++snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
++		- (unsigned long)runtime->dma_addr;
++
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++static struct snd_pcm_ops at73c213_playback_ops = {
++	.open		= snd_at73c213_pcm_open,
++	.close		= snd_at73c213_pcm_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_at73c213_pcm_hw_params,
++	.hw_free	= snd_at73c213_pcm_hw_free,
++	.prepare	= snd_at73c213_pcm_prepare,
++	.trigger	= snd_at73c213_pcm_trigger,
++	.pointer	= snd_at73c213_pcm_pointer,
++};
++
++static void snd_at73c213_pcm_free(struct snd_pcm *pcm)
++{
++	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
++	if (chip->pcm) {
++		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
++		chip->pcm = NULL;
++	}
++}
++
++static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
++{
++	struct snd_pcm *pcm;
++	int retval;
++
++	retval = snd_pcm_new(chip->card, chip->card->shortname,
++			device, 1, 0, &pcm);
++	if (retval < 0)
++		goto out;
++
++	pcm->private_data = chip;
++	pcm->private_free = snd_at73c213_pcm_free;
++	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
++	strcpy(pcm->name, "at73c213");
++	chip->pcm = pcm;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
++
++	retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm,
++			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
++			64 * 1024, 64 * 1024);
++out:
++	return retval;
++}
++
++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
++{
++	struct snd_at73c213 *chip = dev_id;
++	struct snd_pcm_runtime *runtime = chip->substream->runtime;
++	u32 status;
++	int offset;
++	int block_size;
++	int next_period;
++	int retval = IRQ_NONE;
++
++	spin_lock(&chip->lock);
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++	status = ssc_readl(chip->ssc->regs, IMR);
++
++	if (status & SSC_BIT(IMR_ENDTX)) {
++		chip->period++;
++		if (chip->period == runtime->periods)
++			chip->period = 0;
++		next_period = chip->period + 1;
++		if (next_period == runtime->periods)
++			next_period = 0;
++
++		offset = block_size * next_period;
++
++		ssc_writel(chip->ssc->regs, PDC_TNPR,
++				(long)runtime->dma_addr + offset);
++		ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++		retval = IRQ_HANDLED;
++	}
++
++	ssc_readl(chip->ssc->regs, IMR);
++	spin_unlock(&chip->lock);
++
++	if (status & SSC_BIT(IMR_ENDTX))
++		snd_pcm_period_elapsed(chip->substream);
++
++	return retval;
++}
++
++/*
++ * Mixer functions.
++ */
++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	val = (ucontrol->value.integer.value[0] & mask);
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
++	change = val != chip->reg_image[reg];
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++
++	if (mask == 1)
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	else
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++
++	uinfo->count = 2;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] =
++		(chip->reg_image[left_reg] >> shift_left) & mask;
++	ucontrol->value.integer.value[1] =
++		(chip->reg_image[right_reg] >> shift_right) & mask;
++
++	if (invert) {
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++		ucontrol->value.integer.value[1] =
++			(mask - ucontrol->value.integer.value[1]);
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++	int change, retval;
++	unsigned short val1, val2;
++
++	val1 = ucontrol->value.integer.value[0] & mask;
++	val2 = ucontrol->value.integer.value[1] & mask;
++	if (invert) {
++		val1 = mask - val1;
++		val2 = mask - val2;
++	}
++	val1 <<= shift_left;
++	val2 <<= shift_right;
++
++	spin_lock_irq(&chip->lock);
++
++	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
++	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
++	change = val1 != chip->reg_image[left_reg]
++		|| val2 != chip->reg_image[right_reg];
++	retval = snd_at73c213_write_reg(chip, left_reg, val1);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++	retval = snd_at73c213_write_reg(chip, right_reg, val2);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(0x01 - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	if (ucontrol->value.integer.value[0])
++		val = mask;
++	else
++		val = 0;
++
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val |= (chip->reg_image[reg] & ~(mask << shift));
++	change = val != chip->reg_image[reg];
++
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
++
++	return 0;
++}
++
++static int snd_at73c213_line_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++static int snd_at73c213_aux_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_mono_switch_info,				\
++	.get = snd_at73c213_mono_switch_get,				\
++	.put = snd_at73c213_mono_switch_put,				\
++	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
++}
++
++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_stereo_info,				\
++	.get = snd_at73c213_stereo_get,					\
++	.put = snd_at73c213_stereo_put,					\
++	.private_value = (left_reg | (right_reg << 8)			\
++			| (shift_left << 16) | (shift_right << 19)	\
++			| (mask << 24) | (invert << 22))		\
++}
++
++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "PA Playback Volume",
++	.index	= 0,
++	.info	= snd_at73c213_pa_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Aux Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_aux_capture_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Line Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_line_capture_volume_info,
++	.get	= snd_at73c213_stereo_get,
++	.put	= snd_at73c213_stereo_put,
++	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
++		| (0x1f << 24) | (1 << 22),
++},
++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
++};
++
++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
++{
++	struct snd_card *card;
++	int errval, idx;
++
++	if (chip == NULL || chip->pcm == NULL)
++		return -EINVAL;
++
++	card = chip->card;
++
++	strcpy(card->mixername, chip->pcm->name);
++
++	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
++		errval = snd_ctl_add(card,
++				snd_ctl_new1(&snd_at73c213_controls[idx],
++					chip));
++		if (errval < 0)
++			goto cleanup;
++	}
++
++	return 0;
++
++cleanup:
++	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
++		struct snd_kcontrol *kctl;
++		kctl = snd_ctl_find_numid(card, idx);
++		if (kctl)
++			snd_ctl_remove(card, kctl);
++	}
++	return errval;
++}
++
++/*
++ * Device functions
++ */
++static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
++{
++	/*
++	 * Continuous clock output.
++	 * Starts on falling TF.
++	 * Delay 1 cycle (1 bit).
++	 * Periode is 16 bit (16 - 1).
++	 */
++	ssc_writel(chip->ssc->regs, TCMR,
++			SSC_BF(TCMR_CKO, 1)
++			| SSC_BF(TCMR_START, 4)
++			| SSC_BF(TCMR_STTDLY, 1)
++			| SSC_BF(TCMR_PERIOD, 16 - 1));
++	/*
++	 * Data length is 16 bit (16 - 1).
++	 * Transmit MSB first.
++	 * Transmit 2 words each transfer.
++	 * Frame sync length is 16 bit (16 - 1).
++	 * Frame starts on negative pulse.
++	 */
++	ssc_writel(chip->ssc->regs, TFMR,
++			SSC_BF(TFMR_DATLEN, 16 - 1)
++			| SSC_BIT(TFMR_MSBF)
++			| SSC_BF(TFMR_DATNB, 1)
++			| SSC_BF(TFMR_FSLEN, 16 - 1)
++			| SSC_BF(TFMR_FSOS, 1));
++
++	return 0;
++}
++
++static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
++{
++	int retval;
++	unsigned char dac_ctrl = 0;
++
++	retval = snd_at73c213_set_bitrate(chip);
++	if (retval)
++		goto out;
++
++	/* Enable DAC master clock. */
++	clk_enable(chip->board->dac_clk);
++
++	/* Initialize at73c213 on SPI bus. */
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
++	if (retval)
++		goto out_clk;
++	msleep(1);
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
++	if (retval)
++		goto out_clk;
++
++	/* Precharge everything. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
++			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
++	if (retval)
++		goto out_clk;
++
++	msleep(50);
++
++	/* Stop precharging PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL,
++			(1<<PA_CTRL_APALP) | 0x0f);
++	if (retval)
++		goto out_clk;
++
++	msleep(450);
++
++	/* Stop precharging DAC, turn on master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
++	if (retval)
++		goto out_clk;
++
++	msleep(1);
++
++	/* Turn on DAC. */
++	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
++		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
++
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
++	if (retval)
++		goto out_clk;
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out_clk;
++
++	/* Enable I2S device, i.e. clock output. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	goto out;
++
++out_clk:
++	clk_disable(chip->board->dac_clk);
++out:
++	return retval;
++}
++
++static int snd_at73c213_dev_free(struct snd_device *device)
++{
++	struct snd_at73c213 *chip = device->device_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	if (chip->irq >= 0) {
++		free_irq(chip->irq, chip);
++		chip->irq = -1;
++	}
++
++	return 0;
++}
++
++static int __devinit snd_at73c213_dev_init(struct snd_card *card,
++					 struct spi_device *spi)
++{
++	static struct snd_device_ops ops = {
++		.dev_free	= snd_at73c213_dev_free,
++	};
++	struct snd_at73c213 *chip = get_chip(card);
++	int irq, retval;
++
++	irq = chip->ssc->irq;
++	if (irq < 0)
++		return irq;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->irq = -1;
++
++	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
++	if (retval) {
++		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
++		goto out;
++	}
++	chip->irq = irq;
++
++	memcpy(&chip->reg_image, &snd_at73c213_original_image,
++			sizeof(snd_at73c213_original_image));
++
++	retval = snd_at73c213_ssc_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_chip_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_pcm_new(chip, 0);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_mixer(chip);
++	if (retval)
++		goto out_snd_dev;
++
++	snd_card_set_dev(card, &spi->dev);
++
++	goto out;
++
++out_snd_dev:
++	snd_device_free(card, chip);
++out_irq:
++	free_irq(chip->irq, chip);
++	chip->irq = -1;
++out:
++	return retval;
++}
++
++static int snd_at73c213_probe(struct spi_device *spi)
++{
++	struct snd_card			*card;
++	struct snd_at73c213		*chip;
++	struct at73c213_board_info	*board;
++	int				retval;
++	char				id[16];
++
++	board = spi->dev.platform_data;
++	if (!board) {
++		dev_dbg(&spi->dev, "no platform_data\n");
++		return -ENXIO;
++	}
++
++	if (!board->dac_clk) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return -ENXIO;
++	}
++
++	if (IS_ERR(board->dac_clk)) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return PTR_ERR(board->dac_clk);
++	}
++
++	retval = -ENOMEM;
++
++	/* Allocate "card" using some unused identifiers. */
++	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
++	card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
++	if (!card)
++		goto out;
++
++	chip = card->private_data;
++	chip->spi = spi;
++	chip->board = board;
++
++	chip->ssc = ssc_request(board->ssc_id);
++	if (IS_ERR(chip->ssc)) {
++		dev_dbg(&spi->dev, "could not get ssc%d device\n",
++				board->ssc_id);
++		retval = PTR_ERR(chip->ssc);
++		goto out_card;
++	}
++
++	retval = snd_at73c213_dev_init(card, spi);
++	if (retval)
++		goto out_ssc;
++
++	strcpy(card->driver, "at73c213");
++	strcpy(card->shortname, board->shortname);
++	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
++
++	retval = snd_card_register(card);
++	if (retval)
++		goto out_ssc;
++
++	dev_set_drvdata(&spi->dev, card);
++
++	goto out;
++
++out_ssc:
++	ssc_free(chip->ssc);
++out_card:
++	snd_card_free(card);
++out:
++	return retval;
++}
++
++static int __devexit snd_at73c213_remove(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++	int retval;
++
++	/* Stop playback. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out;
++
++	/* Turn off PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f));
++	if (retval)
++		goto out;
++	msleep(10);
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f);
++	if (retval)
++		goto out;
++
++	/* Turn off external DAC. */
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
++	if (retval)
++		goto out;
++	msleep(2);
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
++	if (retval)
++		goto out;
++
++	/* Turn off master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
++	if (retval)
++		goto out;
++
++out:
++	/* Stop DAC master clock. */
++	clk_disable(chip->board->dac_clk);
++
++	ssc_free(chip->ssc);
++	snd_card_free(card);
++	dev_set_drvdata(&spi->dev, NULL);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	clk_disable(chip->board->dac_clk);
++
++	return 0;
++}
++
++static int snd_at73c213_resume(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	clk_enable(chip->board->dac_clk);
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	return 0;
++}
++#else
++#define snd_at73c213_suspend NULL
++#define snd_at73c213_resume NULL
++#endif
++
++static struct spi_driver at73c213_driver = {
++	.driver		= {
++		.name	= "at73c213",
++	},
++	.probe		= snd_at73c213_probe,
++	.suspend	= snd_at73c213_suspend,
++	.resume		= snd_at73c213_resume,
++	.remove		= __devexit_p(snd_at73c213_remove),
++};
++
++static int __init at73c213_init(void)
++{
++	return spi_register_driver(&at73c213_driver);
++}
++module_init(at73c213_init);
++
++static void __exit at73c213_exit(void)
++{
++	spi_unregister_driver(&at73c213_driver);
++}
++module_exit(at73c213_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h
+new file mode 100644
+index 0000000..fd8b372
+--- /dev/null
++++ b/sound/spi/at73c213.h
+@@ -0,0 +1,119 @@
++/*
++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 - 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++
++#ifndef _SND_AT73C213_H
++#define _SND_AT73C213_H
++
++/* DAC control register */
++#define DAC_CTRL		0x00
++#define DAC_CTRL_ONPADRV	7
++#define DAC_CTRL_ONAUXIN	6
++#define DAC_CTRL_ONDACR		5
++#define DAC_CTRL_ONDACL		4
++#define DAC_CTRL_ONLNOR		3
++#define DAC_CTRL_ONLNOL		2
++#define DAC_CTRL_ONLNIR		1
++#define DAC_CTRL_ONLNIL		0
++
++/* DAC left line in gain register */
++#define DAC_LLIG		0x01
++#define DAC_LLIG_LLIG		0
++
++/* DAC right line in gain register */
++#define DAC_RLIG		0x02
++#define DAC_RLIG_RLIG		0
++
++/* DAC Left Master Playback Gain Register */
++#define DAC_LMPG		0x03
++#define DAC_LMPG_LMPG		0
++
++/* DAC Right Master Playback Gain Register */
++#define DAC_RMPG		0x04
++#define DAC_RMPG_RMPG		0
++
++/* DAC Left Line Out Gain Register */
++#define DAC_LLOG		0x05
++#define DAC_LLOG_LLOG		0
++
++/* DAC Right Line Out Gain Register */
++#define DAC_RLOG		0x06
++#define DAC_RLOG_RLOG		0
++
++/* DAC Output Level Control Register */
++#define DAC_OLC			0x07
++#define DAC_OLC_RSHORT		7
++#define DAC_OLC_ROLC		4
++#define DAC_OLC_LSHORT		3
++#define DAC_OLC_LOLC		0
++
++/* DAC Mixer Control Register */
++#define DAC_MC			0x08
++#define DAC_MC_INVR		5
++#define DAC_MC_INVL		4
++#define DAC_MC_RMSMIN2		3
++#define DAC_MC_RMSMIN1		2
++#define DAC_MC_LMSMIN2		1
++#define DAC_MC_LMSMIN1		0
++
++/* DAC Clock and Sampling Frequency Control Register */
++#define DAC_CSFC		0x09
++#define DAC_CSFC_OVRSEL		4
++
++/* DAC Miscellaneous Register */
++#define DAC_MISC		0x0A
++#define DAC_MISC_VCMCAPSEL	7
++#define DAC_MISC_DINTSEL	4
++#define DAC_MISC_DITHEN		3
++#define DAC_MISC_DEEMPEN	2
++#define DAC_MISC_NBITS		0
++
++/* DAC Precharge Control Register */
++#define DAC_PRECH		0x0C
++#define DAC_PRECH_PRCHGPDRV	7
++#define DAC_PRECH_PRCHGAUX1	6
++#define DAC_PRECH_PRCHGLNOR	5
++#define DAC_PRECH_PRCHGLNOL	4
++#define DAC_PRECH_PRCHGLNIR	3
++#define DAC_PRECH_PRCHGLNIL	2
++#define DAC_PRECH_PRCHG		1
++#define DAC_PRECH_ONMSTR	0
++
++/* DAC Auxiliary Input Gain Control Register */
++#define DAC_AUXG		0x0D
++#define DAC_AUXG_AUXG		0
++
++/* DAC Reset Register */
++#define DAC_RST			0x10
++#define DAC_RST_RESMASK		2
++#define DAC_RST_RESFILZ		1
++#define DAC_RST_RSTZ		0
++
++/* Power Amplifier Control Register */
++#define PA_CTRL			0x11
++#define PA_CTRL_APAON		6
++#define PA_CTRL_APAPRECH	5
++#define PA_CTRL_APALP		4
++#define PA_CTRL_APAGAIN		0
++
++#endif /* _SND_AT73C213_H */
diff --git a/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch
new file mode 100644
index 000000000..99a9d149b
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch
@@ -0,0 +1,11 @@
+--- a/arch/avr32/boards/atngw100/setup.c	2007-11-02 10:47:52.000000000 +0100
++++ b/arch/avr32/boards/atngw100/setup.c	2007-11-02 10:48:00.000000000 +0100
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
diff --git a/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.24-100-avr32-git.1.patch b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
new file mode 100644
index 000000000..173000063
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
@@ -0,0 +1,16922 @@
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/Kconfig linux-avr32/arch/avr32/boards/atngw100/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atngw100/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-avr32/arch/avr32/boards/atngw100/setup.c
+--- linux-2.6.24/arch/avr32/boards/atngw100/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+ 	.sda_pin		= GPIO_PIN_PA(6),
+ 	.scl_pin		= GPIO_PIN_PA(7),
+@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -157,6 +164,7 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+@@ -165,11 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ 	at32_select_gpio(i2c_gpio_data.sda_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	at32_select_gpio(i2c_gpio_data.scl_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h	2008-02-01 14:51:35.000000000 -0500
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c	2008-02-01 14:51:35.000000000 -0500
+@@ -11,7 +11,6 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+@@ -22,7 +21,7 @@
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -49,18 +48,16 @@ static struct eth_platform_data __initda
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static struct at73c213_board_info at73c213_data = {
+ 	.ssc_id		= 0,
+ 	.shortname	= "AVR32 STK1000 external DAC",
+ };
+ #endif
+-#endif
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ 	{
+ 		/* AT73C213 */
+ 		.modalias	= "at73c213",
+@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
+-{
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
+-}
+-
+-#else
+-static void setup_j2_leds(void)
+-{
+-}
+-#endif
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-static void __init at73c213_set_clk(struct at73c213_board_info *info)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+ 	struct clk *gclk;
+ 	struct clk *pll;
+@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru
+ 	}
+ 
+ 	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
+-	info->dac_clk = gclk;
++	at73c213_data.dac_clk = gclk;
+ 
+ err_set_clk:
+ 	clk_put(pll);
+@@ -229,12 +179,16 @@ err_pll:
+ err_gclk:
+ 	return;
+ }
+-#endif
+-#endif
++#else
++static void __init atstk1002_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -271,7 +225,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -281,12 +235,16 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+@@ -294,17 +252,18 @@ static int __init atstk1002_init(void)
+ 			     fbmem_start, fbmem_size);
+ #endif
+ 	at32_add_device_usba(0, NULL);
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
++	at32_add_device_cf(0, 2, &cf0_data);
+ 
+-	setup_j2_leds();
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-	at73c213_set_clk(&at73c213_data);
+-#endif
+-#endif
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig linux-avr32/arch/avr32/boards/atstk1000/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,34 +1,53 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++choice
++	prompt "ATSTK1000 CPU daughterboard type"
++	default BOARD_ATSTK1002
++
++config BOARD_ATSTK1002
++	bool "ATSTK1002"
++	select CPU_AT32AP7000
++
++config BOARD_ATSTK1003
++	bool "ATSTK1003"
++	select CPU_AT32AP7001
++
++config BOARD_ATSTK1004
++	bool "ATSTK1004"
++	select CPU_AT32AP7002
++
++endchoice
++
++
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +85,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Makefile linux-avr32/arch/avr32/boards/atstk1000/Makefile
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/setup.c linux-avr32/arch/avr32/boards/atstk1000/setup.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff -Nrup linux-2.6.24/arch/avr32/configs/atngw100_defconfig linux-avr32/arch/avr32/configs/atngw100_defconfig
+--- linux-2.6.24/arch/avr32/configs/atngw100_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atngw100_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,46 +1,51 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:20:41 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+ CONFIG_BSD_PROCESS_ACCT_V3=y
+ # CONFIG_TASKSTATS is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
+ # CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
+ CONFIG_BLK_DEV_INITRD=y
+@@ -61,35 +66,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ CONFIG_KMOD=y
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -111,6 +109,7 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
+@@ -119,9 +118,9 @@ CONFIG_LOADER_U_BOOT=y
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -141,9 +140,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -153,13 +154,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -213,6 +232,7 @@ CONFIG_INET_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_TRANSPORT=y
+ CONFIG_INET_XFRM_MODE_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+@@ -240,6 +260,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -252,6 +273,7 @@ CONFIG_NF_CONNTRACK_MARK=y
+ # CONFIG_NF_CONNTRACK_EVENTS is not set
+ CONFIG_NF_CT_PROTO_GRE=m
+ # CONFIG_NF_CT_PROTO_SCTP is not set
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
+ CONFIG_NF_CONNTRACK_AMANDA=m
+ CONFIG_NF_CONNTRACK_FTP=m
+ CONFIG_NF_CONNTRACK_H323=m
+@@ -269,9 +291,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m
+ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+ CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+ # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+ CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+ CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+ CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+ # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+@@ -284,6 +308,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -292,6 +317,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m
+ CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+ CONFIG_NETFILTER_XT_MATCH_STRING=m
+ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+ CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+ 
+ #
+@@ -359,13 +386,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -373,10 +406,6 @@ CONFIG_VLAN_8021Q=m
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ CONFIG_NET_CLS_ROUTE=y
+ 
+@@ -384,6 +413,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -397,6 +427,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -405,16 +436,13 @@ CONFIG_NET_CLS_ROUTE=y
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -434,6 +462,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -493,20 +522,8 @@ CONFIG_MTD_DATAFLASH=y
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -517,11 +534,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++# CONFIG_MISC_DEVICES is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -529,30 +542,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ # CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -571,21 +596,14 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ CONFIG_PPP_MPPE=m
+ CONFIG_PPPOE=m
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+@@ -620,23 +638,50 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
+-
+-#
+-# TPM devices
+-#
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,13 +700,25 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# Watchdog Device Drivers
+ #
+-# CONFIG_W1 is not set
+-# CONFIG_HWMON is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -678,23 +735,21 @@ CONFIG_SPI_ATMEL=y
+ #
+ # Graphics support
+ #
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
+ # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
+ 
+ #
+ # Sound
+ #
+ # CONFIG_SOUND is not set
+-
+-#
+-# USB support
+-#
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -706,12 +761,47 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
+ 
+ #
+-# LED devices
++# MMC/SD Host Controller Drivers
+ #
++CONFIG_MMC_SPI=m
+ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ 
+@@ -726,53 +816,71 @@ CONFIG_LEDS_GPIO=y
+ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+-
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
+-#
+-
+-#
+-# LED Triggers
+-#
+-
+-#
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+ #
+-CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS=m
+ # CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
+-CONFIG_JBD=y
+-# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD=m
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -781,7 +889,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -814,8 +923,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=y
++CONFIG_CONFIGFS_FS=m
+ 
+ #
+ # Miscellaneous filesystems
+@@ -830,10 +938,12 @@ CONFIG_CONFIGFS_FS=y
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+ CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -842,19 +952,21 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+ # CONFIG_NFS_V4 is not set
+ # CONFIG_NFS_DIRECTIO is not set
+-# CONFIG_NFSD is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++# CONFIG_NFSD_V4 is not set
++CONFIG_NFSD_TCP=y
+ CONFIG_ROOT_NFS=y
+ CONFIG_LOCKD=y
+ CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
+ CONFIG_NFS_COMMON=y
+ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+@@ -871,23 +983,18 @@ CONFIG_CIFS=m
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+-CONFIG_NLS=y
++CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+-# CONFIG_NLS_CODEPAGE_437 is not set
++CONFIG_NLS_CODEPAGE_437=m
+ # CONFIG_NLS_CODEPAGE_737 is not set
+ # CONFIG_NLS_CODEPAGE_775 is not set
+-CONFIG_NLS_CODEPAGE_850=y
++CONFIG_NLS_CODEPAGE_850=m
+ # CONFIG_NLS_CODEPAGE_852 is not set
+ # CONFIG_NLS_CODEPAGE_855 is not set
+ # CONFIG_NLS_CODEPAGE_857 is not set
+@@ -908,7 +1015,7 @@ CONFIG_NLS_CODEPAGE_850=y
+ # CONFIG_NLS_CODEPAGE_1250 is not set
+ # CONFIG_NLS_CODEPAGE_1251 is not set
+ # CONFIG_NLS_ASCII is not set
+-CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_ISO8859_2 is not set
+ # CONFIG_NLS_ISO8859_3 is not set
+ # CONFIG_NLS_ISO8859_4 is not set
+@@ -921,18 +1028,19 @@ CONFIG_NLS_ISO8859_1=y
+ # CONFIG_NLS_ISO8859_15 is not set
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+-CONFIG_NLS_UTF8=y
+-
+-#
+-# Distributed Lock Manager
+-#
++CONFIG_NLS_UTF8=m
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -941,12 +1049,17 @@ CONFIG_MAGIC_SYSRQ=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -954,21 +1067,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ # CONFIG_FORCED_INLINING is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+ CONFIG_CRYPTO=y
+ CONFIG_CRYPTO_ALGAPI=y
+ CONFIG_CRYPTO_BLKCIPHER=y
+@@ -989,6 +1102,7 @@ CONFIG_CRYPTO_ECB=m
+ CONFIG_CRYPTO_CBC=y
+ CONFIG_CRYPTO_PCBC=m
+ # CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
+ # CONFIG_CRYPTO_CRYPTD is not set
+ CONFIG_CRYPTO_DES=y
+ # CONFIG_CRYPTO_FCRYPT is not set
+@@ -1002,15 +1116,14 @@ CONFIG_CRYPTO_DES=y
+ CONFIG_CRYPTO_ARC4=m
+ # CONFIG_CRYPTO_KHAZAD is not set
+ # CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
+ CONFIG_CRYPTO_DEFLATE=y
+ # CONFIG_CRYPTO_MICHAEL_MIC is not set
+ # CONFIG_CRYPTO_CRC32C is not set
+ # CONFIG_CRYPTO_CAMELLIA is not set
+ # CONFIG_CRYPTO_TEST is not set
+-
+-#
+-# Hardware crypto devices
+-#
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
+ 
+ #
+ # Library routines
+@@ -1018,8 +1131,9 @@ CONFIG_CRYPTO_DEFLATE=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1002_defconfig linux-avr32/arch/avr32/configs/atstk1002_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1002_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1002_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,48 +1,48 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:07:43 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+-CONFIG_BSD_PROCESS_ACCT=y
+-CONFIG_BSD_PROCESS_ACCT_V3=y
+-CONFIG_TASKSTATS=y
+-CONFIG_TASK_DELAY_ACCT=y
+-# CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
+-CONFIG_AUDIT=y
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ CONFIG_RELAY=y
+ CONFIG_BLK_DEV_INITRD=y
+@@ -63,35 +63,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ # CONFIG_MODULE_FORCE_UNLOAD is not set
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ # CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +92,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -113,18 +106,27 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+-CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++CONFIG_BOARD_ATSTK1002=y
++# CONFIG_BOARD_ATSTK1003 is not set
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -144,9 +146,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -156,13 +160,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -182,7 +204,12 @@ CONFIG_NET=y
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+ CONFIG_UNIX=y
+-# CONFIG_NET_KEY is not set
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++CONFIG_NET_KEY=m
++# CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ # CONFIG_IP_MULTICAST is not set
+ # CONFIG_IP_ADVANCED_ROUTER is not set
+@@ -191,36 +218,52 @@ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+ # CONFIG_IP_PNP_RARP is not set
+-# CONFIG_NET_IPIP is not set
+-# CONFIG_NET_IPGRE is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
+ # CONFIG_ARPD is not set
+ # CONFIG_SYN_COOKIES is not set
+-# CONFIG_INET_AH is not set
+-# CONFIG_INET_ESP is not set
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
+ # CONFIG_INET_IPCOMP is not set
+ # CONFIG_INET_XFRM_TUNNEL is not set
+-# CONFIG_INET_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_BEET is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+ CONFIG_TCP_CONG_CUBIC=y
+ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_TCP_MD5SIG is not set
+-# CONFIG_IPV6 is not set
+-# CONFIG_INET6_XFRM_TUNNEL is not set
+-# CONFIG_INET6_TUNNEL is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
+ # CONFIG_NETWORK_SECMARK is not set
+ # CONFIG_NETFILTER is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ # CONFIG_VLAN_8021Q is not set
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -228,16 +271,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ 
+ #
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -251,6 +291,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -259,16 +300,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -288,6 +326,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -327,6 +366,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +386,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,42 +398,87 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+ # SCSI device support
+ #
+ # CONFIG_RAID_ATTRS is not set
+-# CONFIG_SCSI is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
+ # CONFIG_SCSI_NETLINK is not set
+-# CONFIG_ATA is not set
++# CONFIG_SCSI_PROC_FS is not set
+ 
+ #
+-# Multi-device support (RAID and LVM)
++# SCSI support type (disk, tape, CD-ROM)
+ #
+-# CONFIG_MD is not set
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
+ 
+ #
+-# Network device support
++# SCSI Transports
+ #
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_LOWLEVEL is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
+ CONFIG_NETDEVICES=y
+-CONFIG_DUMMY=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -423,27 +497,54 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,35 +573,87 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+-# TPM devices
++# SPI support
+ #
+-# CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
+ 
+ #
+-# SPI support
++# SPI Master Controller Drivers
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -517,23 +670,94 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++# CONFIG_SND_VERBOSE_PROCFS is not set
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -545,47 +769,116 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
+-
+-#
+-# LED devices
+-#
+-# CONFIG_NEW_LEDS is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
+ 
+ #
+ # LED drivers
+ #
++CONFIG_LEDS_GPIO=m
+ 
+ #
+ # LED Triggers
+ #
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+@@ -593,8 +886,11 @@ CONFIG_UNIX98_PTYS=y
+ CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +905,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -637,8 +933,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++# CONFIG_CONFIGFS_FS is not set
+ 
+ #
+ # Miscellaneous filesystems
+@@ -652,11 +947,12 @@ CONFIG_CONFIGFS_FS=m
+ # CONFIG_EFS_FS is not set
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+-CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -665,10 +961,7 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+@@ -688,17 +981,12 @@ CONFIG_SUNRPC=y
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+ CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+ CONFIG_NLS_CODEPAGE_437=m
+@@ -739,17 +1027,18 @@ CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+ CONFIG_NLS_UTF8=m
+-
+-#
+-# Distributed Lock Manager
+-#
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -758,12 +1047,17 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -771,22 +1065,63 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+-# CONFIG_CRYPTO is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=m
++CONFIG_CRYPTO_BLKCIPHER=m
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_MANAGER=m
++CONFIG_CRYPTO_HMAC=m
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=m
++CONFIG_CRYPTO_SHA1=m
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_WP512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_ECB is not set
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_TEST is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_HW is not set
+ 
+ #
+ # Library routines
+@@ -794,10 +1129,10 @@ CONFIG_FORCED_INLINING=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+-CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+ CONFIG_PLIST=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1003_defconfig linux-avr32/arch/avr32/configs/atstk1003_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1003_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1003_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1015 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 22:54:34 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7001=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++CONFIG_BOARD_ATSTK1003=y
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=m
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++CONFIG_CRC7=m
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1004_defconfig linux-avr32/arch/avr32/configs/atstk1004_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1004_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1004_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,621 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:04:20 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++# CONFIG_BLOCK is not set
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++# CONFIG_BOARD_ATSTK1003 is not set
++CONFIG_BOARD_ATSTK1004=y
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_MISC_DEVICES is not set
++
++#
++# SCSI device support
++#
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_NEW_LEDS is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++# CONFIG_INSTRUMENTATION is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.c linux-avr32/arch/avr32/drivers/dw-dmac.c
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.h linux-avr32/arch/avr32/drivers/dw-dmac.h
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.h	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff -Nrup linux-2.6.24/arch/avr32/drivers/Makefile linux-avr32/arch/avr32/drivers/Makefile
+--- linux-2.6.24/arch/avr32/drivers/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig linux-avr32/arch/avr32/Kconfig
+--- linux-2.6.24/arch/avr32/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32
+ config ARCH_HAS_ILOG2_U64
+ 	def_bool n
+ 
++config ARCH_SUPPORTS_OPROFILE
++	def_bool y
++
+ config GENERIC_HWEIGHT
+ 	def_bool y
+ 
+@@ -81,19 +84,23 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
+-choice
+-	prompt "AVR32 CPU type"
+-	default CPU_AT32AP7000
++#
++# CPU types
++#
+ 
+-config CPU_AT32AP7000
+-	bool "AT32AP7000"
++# AP7000 derivatives
++config CPU_AT32AP700X
++	bool
+ 	select PLATFORM_AT32AP
+-endchoice
+-
+-#
+-# CPU Daughterboards for ATSTK1000
+-config BOARD_ATSTK1002
++config CPU_AT32AP7000
++	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7001
+ 	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7002
++	bool
++	select CPU_AT32AP700X
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -101,15 +108,18 @@ choice
+ 
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+-	select BOARD_ATSTK1002 if CPU_AT32AP7000
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
++	select CPU_AT32AP7000
+ endchoice
+ 
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config NMI_DEBUGGING
++	bool "NMI Debugging"
++	default n
++	help
++	  Say Y here and pass the nmi_debug command-line parameter to
++	  the kernel to turn on NMI debugging. Depending on the value
++	  of the nmi_debug option, various pieces of information will
++	  be dumped to the console when a Non-Maskable Interrupt
++	  happens.
++
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+@@ -219,6 +243,8 @@ source "drivers/Kconfig"
+ 
+ source "fs/Kconfig"
+ 
++source "kernel/Kconfig.instrumentation"
++
+ source "arch/avr32/Kconfig.debug"
+ 
+ source "security/Kconfig"
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig.debug linux-avr32/arch/avr32/Kconfig.debug
+--- linux-2.6.24/arch/avr32/Kconfig.debug	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig.debug	2008-02-01 14:51:35.000000000 -0500
+@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT
+ 
+ source "lib/Kconfig.debug"
+ 
+-config KPROBES
+-	bool "Kprobes"
+-	depends on DEBUG_KERNEL
+-	help
+-	  Kprobes allows you to trap at almost any kernel address and
+-          execute a callback function.  register_kprobe() establishes
+-          a probepoint and specifies the callback.  Kprobes is useful
+-          for kernel debugging, non-intrusive instrumentation and testing.
+-          If in doubt, say "N".
+-
+ endmenu
+diff -Nrup linux-2.6.24/arch/avr32/kernel/cpu.c linux-avr32/arch/avr32/kernel/cpu.c
+--- linux-2.6.24/arch/avr32/kernel/cpu.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/cpu.c	2008-02-01 14:51:35.000000000 -0500
+@@ -13,6 +13,7 @@
+ #include <linux/percpu.h>
+ #include <linux/param.h>
+ #include <linux/errno.h>
++#include <linux/clk.h>
+ 
+ #include <asm/setup.h>
+ #include <asm/sysreg.h>
+@@ -187,9 +188,20 @@ static int __init topology_init(void)
+ 
+ subsys_initcall(topology_init);
+ 
++struct chip_id_map {
++	u16	mid;
++	u16	pn;
++	const char *name;
++};
++
++static const struct chip_id_map chip_names[] = {
++	{ .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
++};
++#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
++
+ static const char *cpu_names[] = {
+ 	"Morgan",
+-	"AP7000",
++	"AP7",
+ };
+ #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
+ 
+@@ -206,12 +218,32 @@ static const char *mmu_types[] = {
+ 	"MPU"
+ };
+ 
++static const char *cpu_feature_flags[] = {
++	"rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
++};
++
++static const char *get_chip_name(struct avr32_cpuinfo *cpu)
++{
++	unsigned int i;
++	unsigned int mid = avr32_get_manufacturer_id(cpu);
++	unsigned int pn = avr32_get_product_number(cpu);
++
++	for (i = 0; i < NR_CHIP_NAMES; i++) {
++		if (chip_names[i].mid == mid && chip_names[i].pn == pn)
++			return chip_names[i].name;
++	}
++
++	return "(unknown)";
++}
++
+ void __init setup_processor(void)
+ {
+ 	unsigned long config0, config1;
+ 	unsigned long features;
+ 	unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
++	unsigned device_id;
+ 	unsigned tmp;
++	unsigned i;
+ 
+ 	config0 = sysreg_read(CONFIG0);
+ 	config1 = sysreg_read(CONFIG1);
+@@ -221,11 +253,14 @@ void __init setup_processor(void)
+ 	arch_rev = SYSREG_BFEXT(AR, config0);
+ 	mmu_type = SYSREG_BFEXT(MMUT, config0);
+ 
++	device_id = ocd_read(DID);
++
+ 	boot_cpu_data.arch_type = arch_id;
+ 	boot_cpu_data.cpu_type = cpu_id;
+ 	boot_cpu_data.arch_revision = arch_rev;
+ 	boot_cpu_data.cpu_revision = cpu_rev;
+ 	boot_cpu_data.tlb_config = mmu_type;
++	boot_cpu_data.device_id = device_id;
+ 
+ 	tmp = SYSREG_BFEXT(ILSZ, config1);
+ 	if (tmp) {
+@@ -247,41 +282,34 @@ void __init setup_processor(void)
+ 		return;
+ 	}
+ 
+-	printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
++	printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
++	printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
+ 		cpu_names[cpu_id], cpu_id, cpu_rev,
+ 		arch_names[arch_id], arch_rev);
+ 	printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
+ 
+ 	printk ("CPU: features:");
+ 	features = 0;
+-	if (config0 & SYSREG_BIT(CONFIG0_R)) {
++	if (config0 & SYSREG_BIT(CONFIG0_R))
+ 		features |= AVR32_FEATURE_RMW;
+-		printk(" rmw");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_D)) {
++	if (config0 & SYSREG_BIT(CONFIG0_D))
+ 		features |= AVR32_FEATURE_DSP;
+-		printk(" dsp");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_S)) {
++	if (config0 & SYSREG_BIT(CONFIG0_S))
+ 		features |= AVR32_FEATURE_SIMD;
+-		printk(" simd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_O)) {
++	if (config0 & SYSREG_BIT(CONFIG0_O))
+ 		features |= AVR32_FEATURE_OCD;
+-		printk(" ocd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_P)) {
++	if (config0 & SYSREG_BIT(CONFIG0_P))
+ 		features |= AVR32_FEATURE_PCTR;
+-		printk(" perfctr");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_J)) {
++	if (config0 & SYSREG_BIT(CONFIG0_J))
+ 		features |= AVR32_FEATURE_JAVA;
+-		printk(" java");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_F)) {
++	if (config0 & SYSREG_BIT(CONFIG0_F))
+ 		features |= AVR32_FEATURE_FPU;
+-		printk(" fpu");
+-	}
++
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (features & (1 << i))
++			printk(" %s", cpu_feature_flags[i]);
++
+ 	printk("\n");
+ 	boot_cpu_data.features = features;
+ }
+@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo
+ {
+ 	unsigned int icache_size, dcache_size;
+ 	unsigned int cpu = smp_processor_id();
++	unsigned int freq;
++	unsigned int i;
+ 
+ 	icache_size = boot_cpu_data.icache.ways *
+ 		boot_cpu_data.icache.sets *
+@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo
+ 
+ 	seq_printf(m, "processor\t: %d\n", cpu);
+ 
++	seq_printf(m, "chip type\t: %s revision %c\n",
++			get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
+ 	if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
+-		seq_printf(m, "cpu family\t: %s revision %d\n",
++		seq_printf(m, "cpu arch\t: %s revision %d\n",
+ 			   arch_names[boot_cpu_data.arch_type],
+ 			   boot_cpu_data.arch_revision);
+ 	if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
+-		seq_printf(m, "cpu type\t: %s revision %d\n",
++		seq_printf(m, "cpu core\t: %s revision %d\n",
+ 			   cpu_names[boot_cpu_data.cpu_type],
+ 			   boot_cpu_data.cpu_revision);
+ 
++	freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
++	seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
++
+ 	seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
+ 		   icache_size >> 10,
+ 		   boot_cpu_data.icache.ways,
+@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo
+ 		   boot_cpu_data.dcache.ways,
+ 		   boot_cpu_data.dcache.sets,
+ 		   boot_cpu_data.dcache.linesz);
+-	seq_printf(m, "bogomips\t: %lu.%02lu\n",
++
++	seq_printf(m, "features\t:");
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (boot_cpu_data.features & (1 << i))
++			seq_printf(m, " %s", cpu_feature_flags[i]);
++
++	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
+ 		   boot_cpu_data.loops_per_jiffy / (500000/HZ),
+ 		   (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
+ 
+@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v
+ 
+ }
+ 
+-struct seq_operations cpuinfo_op = {
++const struct seq_operations cpuinfo_op = {
+ 	.start	= c_start,
+ 	.next	= c_next,
+ 	.stop	= c_stop,
+diff -Nrup linux-2.6.24/arch/avr32/kernel/dma-controller.c linux-avr32/arch/avr32/kernel/dma-controller.c
+--- linux-2.6.24/arch/avr32/kernel/dma-controller.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/dma-controller.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/irq.c linux-avr32/arch/avr32/kernel/irq.c
+--- linux-2.6.24/arch/avr32/kernel/irq.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/irq.c	2008-02-01 14:51:35.000000000 -0500
+@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq)
+ 	printk("unexpected IRQ %u\n", irq);
+ }
+ 
++/* May be overridden by platform code */
++int __weak nmi_enable(void)
++{
++	return -ENOSYS;
++}
++
++void __weak nmi_disable(void)
++{
++
++}
++
+ #ifdef CONFIG_PROC_FS
+ int show_interrupts(struct seq_file *p, void *v)
+ {
+diff -Nrup linux-2.6.24/arch/avr32/kernel/kprobes.c linux-avr32/arch/avr32/kernel/kprobes.c
+--- linux-2.6.24/arch/avr32/kernel/kprobes.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/kprobes.c	2008-02-01 14:51:35.000000000 -0500
+@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct
+ void __kprobes arch_arm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("arming kprobe at %p\n", p->addr);
++	ocd_enable(NULL);
+ 	*p->addr = BREAKPOINT_INSTRUCTION;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp
+ void __kprobes arch_disarm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("disarming kprobe at %p\n", p->addr);
++	ocd_disable(NULL);
+ 	*p->addr = p->opcode;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru
+ 
+ int __init arch_init_kprobes(void)
+ {
+-	printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
+-	ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
+-
+ 	/* TODO: Register kretprobe trampoline */
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/kernel/Makefile linux-avr32/arch/avr32/kernel/Makefile
+--- linux-2.6.24/arch/avr32/kernel/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -6,9 +6,11 @@ extra-y				:= head.o vmlinux.lds
+ 
+ obj-$(CONFIG_SUBARCH_AVR32B)	+= entry-avr32b.o
+ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+-obj-y				+= setup.o traps.o semaphore.o ptrace.o
++obj-y				+= setup.o traps.o semaphore.o ocd.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+ obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
++obj-$(CONFIG_NMI_DEBUGGING)	+= nmi_debug.o
+diff -Nrup linux-2.6.24/arch/avr32/kernel/nmi_debug.c linux-avr32/arch/avr32/kernel/nmi_debug.c
+--- linux-2.6.24/arch/avr32/kernel/nmi_debug.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/nmi_debug.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/kdebug.h>
++#include <linux/notifier.h>
++#include <linux/sched.h>
++
++#include <asm/irq.h>
++
++enum nmi_action {
++	NMI_SHOW_STATE	= 1 << 0,
++	NMI_SHOW_REGS	= 1 << 1,
++	NMI_DIE		= 1 << 2,
++	NMI_DEBOUNCE	= 1 << 3,
++};
++
++static unsigned long nmi_actions;
++
++static int nmi_debug_notify(struct notifier_block *self,
++		unsigned long val, void *data)
++{
++	struct die_args *args = data;
++
++	if (likely(val != DIE_NMI))
++		return NOTIFY_DONE;
++
++	if (nmi_actions & NMI_SHOW_STATE)
++		show_state();
++	if (nmi_actions & NMI_SHOW_REGS)
++		show_regs(args->regs);
++	if (nmi_actions & NMI_DEBOUNCE)
++		mdelay(10);
++	if (nmi_actions & NMI_DIE)
++		return NOTIFY_BAD;
++
++	return NOTIFY_OK;
++}
++
++static struct notifier_block nmi_debug_nb = {
++	.notifier_call = nmi_debug_notify,
++};
++
++static int __init nmi_debug_setup(char *str)
++{
++	char *p, *sep;
++
++	register_die_notifier(&nmi_debug_nb);
++	if (nmi_enable()) {
++		printk(KERN_WARNING "Unable to enable NMI.\n");
++		return 0;
++	}
++
++	if (*str != '=')
++		return 0;
++
++	for (p = str + 1; *p; p = sep + 1) {
++		sep = strchr(p, ',');
++		if (sep)
++			*sep = 0;
++		if (strcmp(p, "state") == 0)
++			nmi_actions |= NMI_SHOW_STATE;
++		else if (strcmp(p, "regs") == 0)
++			nmi_actions |= NMI_SHOW_REGS;
++		else if (strcmp(p, "debounce") == 0)
++			nmi_actions |= NMI_DEBOUNCE;
++		else if (strcmp(p, "die") == 0)
++			nmi_actions |= NMI_DIE;
++		else
++			printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
++				p);
++		if (!sep)
++			break;
++	}
++
++	return 0;
++}
++__setup("nmi_debug", nmi_debug_setup);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ocd.c linux-avr32/arch/avr32/kernel/ocd.c
+--- linux-2.6.24/arch/avr32/kernel/ocd.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ocd.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,163 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/spinlock.h>
++
++#include <asm/ocd.h>
++
++static long ocd_count;
++static spinlock_t ocd_lock;
++
++/**
++ * ocd_enable - enable on-chip debugging
++ * @child: task to be debugged
++ *
++ * If @child is non-NULL, ocd_enable() first checks if debugging has
++ * already been enabled for @child, and if it has, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging
++ * has not already been enabled for it, ocd_enable() increments the
++ * reference count and enables the debugging hardware.
++ */
++void ocd_enable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (child)
++		pr_debug("ocd_enable: child=%s [%u]\n",
++				child->comm, child->pid);
++	else
++		pr_debug("ocd_enable (no child)\n");
++
++	if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count++;
++		dc = ocd_read(DC);
++		dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
++		ocd_write(DC, dc);
++		spin_unlock(&ocd_lock);
++	}
++}
++
++/**
++ * ocd_disable - disable on-chip debugging
++ * @child: task that was being debugged, but isn't anymore
++ *
++ * If @child is non-NULL, ocd_disable() checks if debugging is enabled
++ * for @child, and if it isn't, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging is
++ * enabled, ocd_disable() decrements the reference count, and if it
++ * reaches zero, disables the debugging hardware.
++ */
++void ocd_disable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (!child)
++		pr_debug("ocd_disable (no child)\n");
++	else if (test_tsk_thread_flag(child, TIF_DEBUG))
++		pr_debug("ocd_disable: child=%s [%u]\n",
++				child->comm, child->pid);
++
++	if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count--;
++
++		WARN_ON(ocd_count < 0);
++
++		if (ocd_count <= 0) {
++			dc = ocd_read(DC);
++			dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
++			ocd_write(DC, dc);
++		}
++		spin_unlock(&ocd_lock);
++	}
++}
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/module.h>
++
++static struct dentry *ocd_debugfs_root;
++static struct dentry *ocd_debugfs_DC;
++static struct dentry *ocd_debugfs_DS;
++static struct dentry *ocd_debugfs_count;
++
++static u64 ocd_DC_get(void *data)
++{
++	return ocd_read(DC);
++}
++static void ocd_DC_set(void *data, u64 val)
++{
++	ocd_write(DC, val);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
++
++static u64 ocd_DS_get(void *data)
++{
++	return ocd_read(DS);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
++
++static u64 ocd_count_get(void *data)
++{
++	return ocd_count;
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
++
++static void ocd_debugfs_init(void)
++{
++	struct dentry *root;
++
++	root = debugfs_create_dir("ocd", NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	ocd_debugfs_root = root;
++
++	ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
++				root, NULL, &fops_DC);
++	if (!ocd_debugfs_DC)
++		goto err_DC;
++
++	ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
++				NULL, &fops_DS);
++	if (!ocd_debugfs_DS)
++		goto err_DS;
++
++	ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
++				NULL, &fops_count);
++	if (!ocd_debugfs_count)
++		goto err_count;
++
++	return;
++
++err_count:
++	debugfs_remove(ocd_debugfs_DS);
++err_DS:
++	debugfs_remove(ocd_debugfs_DC);
++err_DC:
++	debugfs_remove(ocd_debugfs_root);
++err_root:
++	printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
++}
++#else
++static inline void ocd_debugfs_init(void)
++{
++
++}
++#endif
++
++static int __init ocd_init(void)
++{
++	spin_lock_init(&ocd_lock);
++	ocd_debugfs_init();
++	return 0;
++}
++arch_initcall(ocd_init);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/process.c linux-avr32/arch/avr32/kernel/process.c
+--- linux-2.6.24/arch/avr32/kernel/process.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/process.c	2008-02-01 14:51:35.000000000 -0500
+@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread);
+  */
+ void exit_thread(void)
+ {
+-	/* nothing to do */
++	ocd_disable(current);
+ }
+ 
+ void flush_thread(void)
+@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long cl
+ 	p->thread.cpu_context.ksp = (unsigned long)childregs;
+ 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
+ 
++	if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
++		ocd_enable(p);
++
+ 	return 0;
+ }
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ptrace.c linux-avr32/arch/avr32/kernel/ptrace.c
+--- linux-2.6.24/arch/avr32/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ptrace.c	2008-02-01 14:51:35.000000000 -0500
+@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *
+ {
+ 	clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
+ 	clear_tsk_thread_flag(child, TIF_BREAKPOINT);
++	ocd_disable(child);
+ }
+ 
+ /*
+@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi
+ {
+ 	int ret;
+ 
+-	pr_debug("ptrace: Enabling monitor mode...\n");
+-	ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
+-			| (1 << OCD_DC_DBE_BIT));
+-
+ 	switch (request) {
+ 	/* Read the word at location addr in the child process */
+ 	case PTRACE_PEEKTEXT:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/setup.c linux-avr32/arch/avr32/kernel/setup.c
+--- linux-2.6.24/arch/avr32/kernel/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char
+ 			printk(KERN_WARNING
+ 			       "Failed to allocate framebuffer memory\n");
+ 			fbmem_size = 0;
++		} else {
++			memset(__va(fbmem_start), 0, fbmem_size);
+ 		}
+ 	}
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/signal.c linux-avr32/arch/avr32/kernel/signal.c
+--- linux-2.6.24/arch/avr32/kernel/signal.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/signal.c	2008-02-01 14:51:35.000000000 -0500
+@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs
+ 	if (!user_mode(regs))
+ 		return 0;
+ 
+-	if (try_to_freeze()) {
+-		signr = 0;
+-		if (!signal_pending(current))
+-			goto no_signal;
+-	}
+-
+ 	if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ 		oldset = &current->saved_sigmask;
+ 	else if (!oldset)
+ 		oldset = &current->blocked;
+ 
+ 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+-no_signal:
+ 	if (syscall) {
+ 		switch (regs->r12) {
+ 		case -ERESTART_RESTARTBLOCK:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/traps.c linux-avr32/arch/avr32/kernel/traps.c
+--- linux-2.6.24/arch/avr32/kernel/traps.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/traps.c	2008-02-01 14:51:35.000000000 -0500
+@@ -9,6 +9,7 @@
+ #include <linux/bug.h>
+ #include <linux/init.h>
+ #include <linux/kallsyms.h>
++#include <linux/kdebug.h>
+ #include <linux/module.h>
+ #include <linux/notifier.h>
+ #include <linux/sched.h>
+@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re
+ 
+ asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
+ {
+-	printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
+-	show_regs_log_lvl(regs, KERN_ALERT);
+-	show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
++	int ret;
++
++	nmi_enter();
++
++	ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
++	switch (ret) {
++	case NOTIFY_OK:
++	case NOTIFY_STOP:
++		return;
++	case NOTIFY_BAD:
++		die("Fatal Non-Maskable Interrupt", regs, SIGINT);
++	default:
++		break;
++	}
++
++	printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
++	nmi_disable();
+ }
+ 
+ asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c	1969-12-31 19:00:00.000000000 -0500
+@@ -1,1730 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000cf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-static struct resource dmaca0_resource[] = {
+-	{
+-		.start	= 0xff200000,
+-		.end	= 0xff20ffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(2),
+-};
+-DEFINE_DEV(dmaca, 0);
+-DEV_CLK(hclk, dmaca0, hsb, 10);
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-	platform_device_register(&dmaca0_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 3);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  TWI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_twi0_resource[] __initdata = {
+-	PBMEM(0xffe00800),
+-	IRQ(5),
+-};
+-static struct clk atmel_twi0_pclk = {
+-	.name		= "twi_pclk",
+-	.parent		= &pba_clk,
+-	.mode		= pba_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 2,
+-};
+-
+-struct platform_device *__init at32_add_device_twi(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_twi", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_twi0_resource,
+-				ARRAY_SIZE(atmel_twi0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
+-	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
+-
+-	atmel_twi0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * MMC
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_mci0_resource[] __initdata = {
+-	PBMEM(0xfff02400),
+-	IRQ(28),
+-};
+-static struct clk atmel_mci0_pclk = {
+-	.name		= "mci_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 9,
+-};
+-
+-struct platform_device *__init at32_add_device_mci(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_mci", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_mci0_resource,
+-				ARRAY_SIZE(atmel_mci0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
+-	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
+-	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
+-	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
+-	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
+-	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
+-
+-	atmel_mci0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USB Device Controller
+- * -------------------------------------------------------------------- */
+-static struct resource usba0_resource[] __initdata = {
+-	{
+-		.start		= 0xff300000,
+-		.end		= 0xff3fffff,
+-		.flags		= IORESOURCE_MEM,
+-	}, {
+-		.start		= 0xfff03000,
+-		.end		= 0xfff033ff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(31),
+-};
+-static struct clk usba0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 12,
+-};
+-static struct clk usba0_hclk = {
+-	.name		= "hclk",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_usba_udc", 0);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, usba0_resource,
+-					  ARRAY_SIZE(usba0_resource)))
+-		goto out_free_pdev;
+-
+-	if (data) {
+-		if (platform_device_add_data(pdev, data, sizeof(*data)))
+-			goto out_free_pdev;
+-
+-		if (data->vbus_pin != GPIO_PIN_NONE)
+-			at32_select_gpio(data->vbus_pin, 0);
+-	}
+-
+-	usba0_pclk.dev = &pdev->dev;
+-	usba0_hclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-
+-	return pdev;
+-
+-out_free_pdev:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * IDE / CompactFlash
+- * -------------------------------------------------------------------- */
+-static struct resource at32_smc_cs4_resource[] __initdata = {
+-	{
+-		.start	= 0x04000000,
+-		.end	= 0x07ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-static struct resource at32_smc_cs5_resource[] __initdata = {
+-	{
+-		.start	= 0x20000000,
+-		.end	= 0x23ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-
+-static int __init at32_init_ide_or_cf(struct platform_device *pdev,
+-		unsigned int cs, unsigned int extint)
+-{
+-	static unsigned int extint_pin_map[4] __initdata = {
+-		GPIO_PIN_PB(25),
+-		GPIO_PIN_PB(26),
+-		GPIO_PIN_PB(27),
+-		GPIO_PIN_PB(28),
+-	};
+-	static bool common_pins_initialized __initdata = false;
+-	unsigned int extint_pin;
+-	int ret;
+-
+-	if (extint >= ARRAY_SIZE(extint_pin_map))
+-		return -EINVAL;
+-	extint_pin = extint_pin_map[extint];
+-
+-	switch (cs) {
+-	case 4:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs4_resource,
+-				ARRAY_SIZE(at32_smc_cs4_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
+-		break;
+-	case 5:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs5_resource,
+-				ARRAY_SIZE(at32_smc_cs5_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-
+-	if (!common_pins_initialized) {
+-		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
+-		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
+-		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
+-		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
+-		common_pins_initialized = true;
+-	}
+-
+-	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
+-
+-	pdev->resource[1].start = EIM_IRQ_BASE + extint;
+-	pdev->resource[1].end = pdev->resource[1].start;
+-
+-	return 0;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_ide(unsigned int id, unsigned int extint,
+-		    struct ide_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_ide", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct ide_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_cf(unsigned int id, unsigned int extint,
+-		    struct cf_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_cf", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct cf_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	if (data->detect_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
+-	if (data->reset_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->reset_pin, 0);
+-	if (data->vcc_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->vcc_pin, 0);
+-	/* READY is used as extint, so we can't select it as gpio */
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * AC97C
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_ac97c0_resource[] __initdata = {
+-	PBMEM(0xfff02800),
+-	IRQ(29),
+-};
+-static struct clk atmel_ac97c0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 10,
+-};
+-
+-struct platform_device *__init at32_add_device_ac97c(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_ac97c", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
+-				ARRAY_SIZE(atmel_ac97c0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
+-	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
+-	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
+-	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
+-
+-	atmel_ac97c0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * ABDAC
+- * -------------------------------------------------------------------- */
+-static struct resource abdac0_resource[] __initdata = {
+-	PBMEM(0xfff02000),
+-	IRQ(27),
+-};
+-static struct clk abdac0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 8,
+-};
+-static struct clk abdac0_sample_clk = {
+-	.name		= "sample_clk",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init at32_add_device_abdac(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("abdac", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, abdac0_resource,
+-				ARRAY_SIZE(abdac0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
+-	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
+-	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
+-	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
+-
+-	abdac0_pclk.dev = &pdev->dev;
+-	abdac0_sample_clk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&dmaca0_hclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_twi0_pclk,
+-	&atmel_mci0_pclk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&usba0_hclk,
+-	&usba0_pclk,
+-	&atmel_ac97c0_pclk,
+-	&abdac0_pclk,
+-	&abdac0_sample_clk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-	genclk_init_parent(&abdac0_sample_clk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1809 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 3);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  PWM
++ * -------------------------------------------------------------------- */
++static struct resource atmel_pwm0_resource[] __initdata = {
++	PBMEM(0xfff01400),
++	IRQ(24),
++};
++static struct clk atmel_pwm0_mck = {
++	.name		= "mck",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 5,
++};
++
++struct platform_device *__init at32_add_device_pwm(u32 mask)
++{
++	struct platform_device *pdev;
++
++	if (!mask)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_pwm", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_pwm0_resource,
++				ARRAY_SIZE(atmel_pwm0_resource)))
++		goto out_free_pdev;
++
++	if (platform_device_add_data(pdev, &mask, sizeof(mask)))
++		goto out_free_pdev;
++
++	if (mask & (1 << 0))
++		select_peripheral(PA(28), PERIPH_A, 0);
++	if (mask & (1 << 1))
++		select_peripheral(PA(29), PERIPH_A, 0);
++	if (mask & (1 << 2))
++		select_peripheral(PA(21), PERIPH_B, 0);
++	if (mask & (1 << 3))
++		select_peripheral(PA(22), PERIPH_B, 0);
++
++	atmel_pwm0_mck.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++	&atmel_pwm0_mck,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/extint.c linux-avr32/arch/avr32/mach-at32ap/extint.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/extint.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/extint.c	2008-02-01 14:51:35.000000000 -0500
+@@ -26,16 +26,10 @@
+ #define EIC_MODE				0x0014
+ #define EIC_EDGE				0x0018
+ #define EIC_LEVEL				0x001c
+-#define EIC_TEST				0x0020
+ #define EIC_NMIC				0x0024
+ 
+-/* Bitfields in TEST */
+-#define EIC_TESTEN_OFFSET			31
+-#define EIC_TESTEN_SIZE				1
+-
+ /* Bitfields in NMIC */
+-#define EIC_EN_OFFSET				0
+-#define EIC_EN_SIZE				1
++#define EIC_NMIC_ENABLE				(1 << 0)
+ 
+ /* Bit manipulation macros */
+ #define EIC_BIT(name)					\
+@@ -63,6 +57,9 @@ struct eic {
+ 	unsigned int first_irq;
+ };
+ 
++static struct eic *nmi_eic;
++static bool nmi_enabled;
++
+ static void eic_ack_irq(unsigned int irq)
+ {
+ 	struct eic *eic = get_irq_chip_data(irq);
+@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int
+ 		eic_writel(eic, EDGE, edge);
+ 		eic_writel(eic, LEVEL, level);
+ 
+-		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
+ 			flow_type |= IRQ_LEVEL;
++			__set_irq_handler_unlocked(irq, handle_level_irq);
++		} else
++			__set_irq_handler_unlocked(irq, handle_edge_irq);
+ 		desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ 		desc->status |= flow_type;
+ 	}
+@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = {
+ static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
+ {
+ 	struct eic *eic = desc->handler_data;
+-	struct irq_desc *ext_desc;
+ 	unsigned long status, pending;
+-	unsigned int i, ext_irq;
++	unsigned int i;
+ 
+ 	status = eic_readl(eic, ISR);
+ 	pending = status & eic_readl(eic, IMR);
+@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i
+ 		i = fls(pending) - 1;
+ 		pending &= ~(1 << i);
+ 
+-		ext_irq = i + eic->first_irq;
+-		ext_desc = irq_desc + ext_irq;
+-		if (ext_desc->status & IRQ_LEVEL)
+-			handle_level_irq(ext_irq, ext_desc);
+-		else
+-			handle_edge_irq(ext_irq, ext_desc);
++		generic_handle_irq(i + eic->first_irq);
+ 	}
+ }
+ 
++int nmi_enable(void)
++{
++	nmi_enabled = true;
++
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
++
++	return 0;
++}
++
++void nmi_disable(void)
++{
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, 0);
++
++	nmi_enabled = false;
++}
++
+ static int __init eic_probe(struct platform_device *pdev)
+ {
+ 	struct eic *eic;
+@@ -214,14 +226,13 @@ static int __init eic_probe(struct platf
+ 	pattern = eic_readl(eic, MODE);
+ 	nr_irqs = fls(pattern);
+ 
+-	/* Trigger on falling edge unless overridden by driver */
+-	eic_writel(eic, MODE, 0UL);
++	/* Trigger on low level unless overridden by driver */
+ 	eic_writel(eic, EDGE, 0UL);
++	eic_writel(eic, LEVEL, 0UL);
+ 
+ 	eic->chip = &eic_chip;
+ 
+ 	for (i = 0; i < nr_irqs; i++) {
+-		/* NOTE the handler we set here is ignored by the demux */
+ 		set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
+ 					 handle_level_irq);
+ 		set_irq_chip_data(eic->first_irq + i, eic);
+@@ -230,6 +241,16 @@ static int __init eic_probe(struct platf
+ 	set_irq_chained_handler(int_irq, demux_eic_irq);
+ 	set_irq_data(int_irq, eic);
+ 
++	if (pdev->id == 0) {
++		nmi_eic = eic;
++		if (nmi_enabled)
++			/*
++			 * Someone tried to enable NMI before we were
++			 * ready. Do it now.
++			 */
++			nmi_enable();
++	}
++
+ 	dev_info(&pdev->dev,
+ 		 "External Interrupt Controller at 0x%p, IRQ %u\n",
+ 		 eic->regs, int_irq);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Kconfig linux-avr32/arch/avr32/mach-at32ap/Kconfig
+--- linux-2.6.24/arch/avr32/mach-at32ap/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Makefile linux-avr32/arch/avr32/mach-at32ap/Makefile
+--- linux-2.6.24/arch/avr32/mach-at32ap/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/pio.c linux-avr32/arch/avr32/mach-at32ap/pio.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/pio.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/pio.c	2008-02-01 14:51:35.000000000 -0500
+@@ -162,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff -Nrup linux-2.6.24/arch/avr32/Makefile linux-avr32/arch/avr32/Makefile
+--- linux-2.6.24/arch/avr32/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -16,7 +16,7 @@ KBUILD_AFLAGS	+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ KBUILD_CFLAGS	+= $(cpuflags-y)
+ KBUILD_AFLAGS	+= $(cpuflags-y)
+@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/a
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-$(CONFIG_OPROFILE)		+= arch/avr32/oprofile/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff -Nrup linux-2.6.24/arch/avr32/mm/dma-coherent.c linux-avr32/arch/avr32/mm/dma-coherent.c
+--- linux-2.6.24/arch/avr32/mm/dma-coherent.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/dma-coherent.c	2008-02-01 14:51:35.000000000 -0500
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff -Nrup linux-2.6.24/arch/avr32/mm/tlb.c linux-avr32/arch/avr32/mm/tlb.c
+--- linux-2.6.24/arch/avr32/mm/tlb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/tlb.c	2008-02-01 14:51:35.000000000 -0500
+@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb
+ 	return 0;
+ }
+ 
+-static struct seq_operations tlb_ops = {
++static const struct seq_operations tlb_ops = {
+ 	.start		= tlb_start,
+ 	.next		= tlb_next,
+ 	.stop		= tlb_stop,
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/Makefile linux-avr32/arch/avr32/oprofile/Makefile
+--- linux-2.6.24/arch/avr32/oprofile/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,8 @@
++obj-$(CONFIG_OPROFILE) += oprofile.o
++
++oprofile-y		:= $(addprefix ../../../drivers/oprofile/,	\
++				oprof.o cpu_buffer.o buffer_sync.o	\
++				event_buffer.o oprofile_files.o		\
++				oprofilefs.o oprofile_stats.o		\
++				timer_int.o)
++oprofile-y		+= op_model_avr32.o
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c linux-avr32/arch/avr32/oprofile/op_model_avr32.c
+--- linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/op_model_avr32.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,235 @@
++/*
++ * AVR32 Performance Counter Driver
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/oprofile.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++
++#include <asm/intc.h>
++#include <asm/sysreg.h>
++#include <asm/system.h>
++
++#define AVR32_PERFCTR_IRQ_GROUP	0
++#define AVR32_PERFCTR_IRQ_LINE	1
++
++enum { PCCNT, PCNT0, PCNT1, NR_counter };
++
++struct avr32_perf_counter {
++	unsigned long	enabled;
++	unsigned long	event;
++	unsigned long	count;
++	unsigned long	unit_mask;
++	unsigned long	kernel;
++	unsigned long	user;
++
++	u32		ie_mask;
++	u32		flag_mask;
++};
++
++static struct avr32_perf_counter counter[NR_counter] = {
++	{
++		.ie_mask	= SYSREG_BIT(IEC),
++		.flag_mask	= SYSREG_BIT(FC),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE0),
++		.flag_mask	= SYSREG_BIT(F0),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE1),
++		.flag_mask	= SYSREG_BIT(F1),
++	},
++};
++
++static void avr32_perf_counter_reset(void)
++{
++	/* Reset all counter and disable/clear all interrupts */
++	sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
++				| SYSREG_BIT(PCCR_C)
++				| SYSREG_BIT(FC)
++				| SYSREG_BIT(F0)
++				| SYSREG_BIT(F1)));
++}
++
++static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
++{
++	struct avr32_perf_counter *ctr = dev_id;
++	struct pt_regs *regs;
++	u32 pccr;
++
++	if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
++					& (1 << AVR32_PERFCTR_IRQ_LINE))))
++		return IRQ_NONE;
++
++	regs = get_irq_regs();
++	pccr = sysreg_read(PCCR);
++
++	/* Clear the interrupt flags we're about to handle */
++	sysreg_write(PCCR, pccr);
++
++	/* PCCNT */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCCNT, -ctr->count);
++		oprofile_add_sample(regs, PCCNT);
++	}
++	ctr++;
++	/* PCNT0 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT0, -ctr->count);
++		oprofile_add_sample(regs, PCNT0);
++	}
++	ctr++;
++	/* PCNT1 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT1, -ctr->count);
++		oprofile_add_sample(regs, PCNT1);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int avr32_perf_counter_create_files(struct super_block *sb,
++		struct dentry *root)
++{
++	struct dentry *dir;
++	unsigned int i;
++	char filename[4];
++
++	for (i = 0; i < NR_counter; i++) {
++		snprintf(filename, sizeof(filename), "%u", i);
++		dir = oprofilefs_mkdir(sb, root, filename);
++
++		oprofilefs_create_ulong(sb, dir, "enabled",
++				&counter[i].enabled);
++		oprofilefs_create_ulong(sb, dir, "event",
++				&counter[i].event);
++		oprofilefs_create_ulong(sb, dir, "count",
++				&counter[i].count);
++
++		/* Dummy entries */
++		oprofilefs_create_ulong(sb, dir, "kernel",
++				&counter[i].kernel);
++		oprofilefs_create_ulong(sb, dir, "user",
++				&counter[i].user);
++		oprofilefs_create_ulong(sb, dir, "unit_mask",
++				&counter[i].unit_mask);
++	}
++
++	return 0;
++}
++
++static int avr32_perf_counter_setup(void)
++{
++	struct avr32_perf_counter *ctr;
++	u32 pccr;
++	int ret;
++	int i;
++
++	pr_debug("avr32_perf_counter_setup\n");
++
++	if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
++		printk(KERN_ERR
++			"oprofile: setup: perf counter already enabled\n");
++		return -EBUSY;
++	}
++
++	ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
++			avr32_perf_counter_interrupt, IRQF_SHARED,
++			"oprofile", counter);
++	if (ret)
++		return ret;
++
++	avr32_perf_counter_reset();
++
++	pccr = 0;
++	for (i = PCCNT; i < NR_counter; i++) {
++		ctr = &counter[i];
++		if (!ctr->enabled)
++			continue;
++
++		pr_debug("enabling counter %d...\n", i);
++
++		pccr |= ctr->ie_mask;
++
++		switch (i) {
++		case PCCNT:
++			/* PCCNT always counts cycles, so no events */
++			sysreg_write(PCCNT, -ctr->count);
++			break;
++		case PCNT0:
++			pccr |= SYSREG_BF(CONF0, ctr->event);
++			sysreg_write(PCNT0, -ctr->count);
++			break;
++		case PCNT1:
++			pccr |= SYSREG_BF(CONF1, ctr->event);
++			sysreg_write(PCNT1, -ctr->count);
++			break;
++		}
++	}
++
++	pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
++
++	sysreg_write(PCCR, pccr);
++
++	return 0;
++}
++
++static void avr32_perf_counter_shutdown(void)
++{
++	pr_debug("avr32_perf_counter_shutdown\n");
++
++	avr32_perf_counter_reset();
++	free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
++}
++
++static int avr32_perf_counter_start(void)
++{
++	pr_debug("avr32_perf_counter_start\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
++
++	return 0;
++}
++
++static void avr32_perf_counter_stop(void)
++{
++	pr_debug("avr32_perf_counter_stop\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
++}
++
++static struct oprofile_operations avr32_perf_counter_ops __initdata = {
++	.create_files	= avr32_perf_counter_create_files,
++	.setup		= avr32_perf_counter_setup,
++	.shutdown	= avr32_perf_counter_shutdown,
++	.start		= avr32_perf_counter_start,
++	.stop		= avr32_perf_counter_stop,
++	.cpu_type	= "avr32",
++};
++
++int __init oprofile_arch_init(struct oprofile_operations *ops)
++{
++	if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
++		return -ENODEV;
++
++	memcpy(ops, &avr32_perf_counter_ops,
++			sizeof(struct oprofile_operations));
++
++	printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
++
++	return 0;
++}
++
++void oprofile_arch_exit(void)
++{
++
++}
+diff -Nrup linux-2.6.24/Documentation/kernel-parameters.txt linux-avr32/Documentation/kernel-parameters.txt
+--- linux-2.6.24/Documentation/kernel-parameters.txt	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/Documentation/kernel-parameters.txt	2008-02-01 14:51:34.000000000 -0500
+@@ -34,6 +34,7 @@ parameter is applicable:
+ 	ALSA	ALSA sound support is enabled.
+ 	APIC	APIC support is enabled.
+ 	APM	Advanced Power Management support is enabled.
++	AVR32	AVR32 architecture is enabled.
+ 	AX25	Appropriate AX.25 support is enabled.
+ 	BLACKFIN Blackfin architecture is enabled.
+ 	DRM	Direct Rendering Management support is enabled.
+@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. 
+ 			of returning the full 64-bit number.
+ 			The default is to return 64-bit inode numbers.
+ 
++	nmi_debug=	[KNL,AVR32] Specify one or more actions to take
++			when a NMI is triggered.
++			Format: [state][,regs][,debounce][,die]
++
+ 	nmi_watchdog=	[KNL,BUGS=X86-32] Debugging features for SMP kernels
+ 
+ 	no387		[BUGS=X86-32] Tells the kernel to use the 387 maths
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "twi_pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Kconfig linux-avr32/drivers/i2c/busses/Kconfig
+--- linux-2.6.24/drivers/i2c/busses/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Kconfig	2008-02-01 14:51:37.000000000 -0500
+@@ -88,6 +88,14 @@ config I2C_AT91
+ 	  to support combined I2C messages.  Use the i2c-gpio driver
+ 	  unless your system can cope with those limitations.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Makefile linux-avr32/drivers/i2c/busses/Makefile
+--- linux-2.6.24/drivers/i2c/busses/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Makefile	2008-02-01 14:51:37.000000000 -0500
+@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff -Nrup linux-2.6.24/drivers/leds/Kconfig linux-avr32/drivers/leds/Kconfig
+--- linux-2.6.24/drivers/leds/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Kconfig	2008-02-01 14:51:38.000000000 -0500
+@@ -18,6 +18,13 @@ config LEDS_CLASS
+ 
+ comment "LED drivers"
+ 
++config LEDS_ATMEL_PWM
++	tristate "LED Support using Atmel PWM outputs"
++	depends on LEDS_CLASS && ATMEL_PWM
++	help
++	  This option enables support for LEDs driven using outputs
++	  of the dedicated PWM controller found on newer Atmel SOCs.
++
+ config LEDS_CORGI
+ 	tristate "LED Support for the Sharp SL-C7x0 series"
+ 	depends on LEDS_CLASS && PXA_SHARP_C7xx
+diff -Nrup linux-2.6.24/drivers/leds/leds-atmel-pwm.c linux-avr32/drivers/leds/leds-atmel-pwm.c
+--- linux-2.6.24/drivers/leds/leds-atmel-pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/leds/leds-atmel-pwm.c	2008-02-01 14:51:38.000000000 -0500
+@@ -0,0 +1,157 @@
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++#include <linux/io.h>
++#include <linux/atmel_pwm.h>
++
++
++struct pwmled {
++	struct led_classdev	cdev;
++	struct pwm_channel	pwmc;
++	struct gpio_led		*desc;
++	u32			mult;
++	u8			active_low;
++};
++
++
++/*
++ * For simplicity, we use "brightness" as if it were a linear function
++ * of PWM duty cycle.  However, a logarithmic function of duty cycle is
++ * probably a better match for perceived brightness: two is half as bright
++ * as four, four is half as bright as eight, etc
++ */
++static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
++{
++	struct pwmled		 *led;
++
++	/* update the duty cycle for the *next* period */
++	led = container_of(cdev, struct pwmled, cdev);
++	pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
++}
++
++/*
++ * NOTE:  we reuse the platform_data structure of GPIO leds,
++ * but repurpose its "gpio" number as a PWM channel number.
++ */
++static int __init pwmled_probe(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++	int					status;
++
++	pdata = pdev->dev.platform_data;
++	if (!pdata || pdata->num_leds < 1)
++		return -ENODEV;
++
++	leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
++	if (!leds)
++		return -ENOMEM;
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++		const struct gpio_led	*dat = pdata->leds + i;
++		u32			tmp;
++
++		led->cdev.name = dat->name;
++		led->cdev.brightness = LED_OFF;
++		led->cdev.brightness_set = pwmled_brightness;
++		led->cdev.default_trigger = dat->default_trigger;
++
++		led->active_low = dat->active_low;
++
++		status = pwm_channel_alloc(dat->gpio, &led->pwmc);
++		if (status < 0)
++			goto err;
++
++		/*
++		 * Prescale clock by 2^x, so PWM counts in low MHz.
++		 * Start each cycle with the LED active, so increasing
++		 * the duty cycle gives us more time on (== brighter).
++		 */
++		tmp = 5;
++		if (!led->active_low)
++			tmp |= PWM_CPR_CPOL;
++		pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
++
++		/*
++		 * Pick a period so PWM cycles at 100+ Hz; and a multiplier
++		 * for scaling duty cycle:  brightness * mult.
++		 */
++		tmp = (led->pwmc.mck / (1 << 5)) / 100;
++		tmp /= 255;
++		led->mult = tmp;
++		pwm_channel_writel(&led->pwmc, PWM_CDTY,
++				led->cdev.brightness * 255);
++		pwm_channel_writel(&led->pwmc, PWM_CPRD,
++				LED_FULL * tmp);
++
++		pwm_channel_enable(&led->pwmc);
++
++		/* Hand it over to the LED framework */
++		status = led_classdev_register(&pdev->dev, &led->cdev);
++		if (status < 0) {
++			pwm_channel_free(&led->pwmc);
++			goto err;
++		}
++	}
++
++	platform_set_drvdata(pdev, leds);
++	return 0;
++
++err:
++	if (i > 0) {
++		for (i = i - 1; i >= 0; i--) {
++			led_classdev_unregister(&leds[i].cdev);
++			pwm_channel_free(&leds[i].pwmc);
++		}
++	}
++	kfree(leds);
++
++	return status;
++}
++
++static int __exit pwmled_remove(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++
++	pdata = pdev->dev.platform_data;
++	leds = platform_get_drvdata(pdev);
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++
++		led_classdev_unregister(&led->cdev);
++		pwm_channel_free(&led->pwmc);
++	}
++
++	kfree(leds);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver pwmled_driver = {
++	.driver = {
++		.name =		"leds-atmel-pwm",
++		.owner =	THIS_MODULE,
++	},
++	/* REVISIT add suspend() and resume() methods */
++	.remove =	__exit_p(pwmled_remove),
++};
++
++static int __init modinit(void)
++{
++	return platform_driver_probe(&pwmled_driver, pwmled_probe);
++}
++module_init(modinit);
++
++static void __exit modexit(void)
++{
++	platform_driver_unregister(&pwmled_driver);
++}
++module_exit(modexit);
++
++MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/leds/Makefile linux-avr32/drivers/leds/Makefile
+--- linux-2.6.24/drivers/leds/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Makefile	2008-02-01 14:51:38.000000000 -0500
+@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS)		+= led-class.o
+ obj-$(CONFIG_LEDS_TRIGGERS)		+= led-triggers.o
+ 
+ # LED Platform Drivers
++obj-$(CONFIG_LEDS_ATMEL_PWM)		+= leds-atmel-pwm.o
+ obj-$(CONFIG_LEDS_CORGI)		+= leds-corgi.o
+ obj-$(CONFIG_LEDS_LOCOMO)		+= leds-locomo.o
+ obj-$(CONFIG_LEDS_SPITZ)		+= leds-spitz.o
+diff -Nrup linux-2.6.24/drivers/misc/atmel_pwm.c linux-avr32/drivers/misc/atmel_pwm.c
+--- linux-2.6.24/drivers/misc/atmel_pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/misc/atmel_pwm.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,409 @@
++#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/atmel_pwm.h>
++
++
++/*
++ * This is a simple driver for the PWM controller found in various newer
++ * Atmel SOCs, including the AVR32 series and the AT91sam9263.
++ *
++ * Chips with current Linux ports have only 4 PWM channels, out of max 32.
++ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
++ * Docs are inconsistent about the width of the channel counter registers;
++ * it's at least 16 bits, but several places say 20 bits.
++ */
++#define	PWM_NCHAN	4		/* max 32 */
++
++struct pwm {
++	spinlock_t		lock;
++	struct platform_device	*pdev;
++	u32			mask;
++	int			irq;
++	void __iomem		*base;
++	struct clk		*clk;
++	struct pwm_channel	*channel[PWM_NCHAN];
++	void			(*handler[PWM_NCHAN])(struct pwm_channel *);
++};
++
++
++/* global PWM controller registers */
++#define PWM_MR		0x00
++#define PWM_ENA		0x04
++#define PWM_DIS		0x08
++#define PWM_SR		0x0c
++#define PWM_IER		0x10
++#define PWM_IDR		0x14
++#define PWM_IMR		0x18
++#define PWM_ISR		0x1c
++
++static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
++{
++	__raw_writel(val, p->base + offset);
++}
++
++static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
++{
++	return __raw_readl(p->base + offset);
++}
++
++static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
++{
++	return p->base + 0x200 + index * 0x20;
++}
++
++static struct pwm *pwm;
++
++static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
++{
++	struct device	*dev = &pwm->pdev->dev;
++
++	dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
++		tag,
++		pwm_readl(pwm, PWM_MR),
++		pwm_readl(pwm, PWM_SR),
++		pwm_readl(pwm, PWM_IMR));
++	dev_dbg(dev,
++		"pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
++		ch->index,
++		pwm_channel_readl(ch, PWM_CMR),
++		pwm_channel_readl(ch, PWM_CDTY),
++		pwm_channel_readl(ch, PWM_CPRD),
++		pwm_channel_readl(ch, PWM_CCNT));
++}
++
++
++/**
++ * pwm_channel_alloc - allocate an unused PWM channel
++ * @index: identifies the channel
++ * @ch: structure to be initialized
++ *
++ * Drivers allocate PWM channels according to the board's wiring, and
++ * matching board-specific setup code.  Returns zero or negative errno.
++ */
++int pwm_channel_alloc(int index, struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		status = 0;
++
++	/* insist on PWM init, with this signal pinned out */
++	if (!pwm || !(pwm->mask & 1 << index))
++		return -ENODEV;
++
++	if (index < 0 || index >= PWM_NCHAN || !ch)
++		return -EINVAL;
++	memset(ch, 0, sizeof *ch);
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	if (pwm->channel[index])
++		status = -EBUSY;
++	else {
++		clk_enable(pwm->clk);
++
++		ch->regs = pwmc_regs(pwm, index);
++		ch->index = index;
++
++		/* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
++		ch->mck = clk_get_rate(pwm->clk);
++
++		pwm->channel[index] = ch;
++		pwm->handler[index] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << index);
++		pwm_writel(pwm, PWM_IDR, 1 << index);
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return status;
++}
++EXPORT_SYMBOL(pwm_channel_alloc);
++
++static int pwmcheck(struct pwm_channel *ch)
++{
++	int		index;
++
++	if (!pwm)
++		return -ENODEV;
++	if (!ch)
++		return -EINVAL;
++	index = ch->index;
++	if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
++		return -EINVAL;
++
++	return index;
++}
++
++/**
++ * pwm_channel_free - release a previously allocated channel
++ * @ch: the channel being released
++ *
++ * The channel is completely shut down (counter and IRQ disabled),
++ * and made available for re-use.  Returns zero, or negative errno.
++ */
++int pwm_channel_free(struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->channel[t] = NULL;
++		pwm->handler[t] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << t);
++		pwm_writel(pwm, PWM_IDR, 1 << t);
++
++		clk_disable(pwm->clk);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_free);
++
++int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
++{
++	unsigned long	flags;
++	int		t;
++
++	/* OMITTED FUNCTIONALITY:  starting several channels in synch */
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
++		t = 0;
++		pwm_dumpregs(ch, enabled ? "enable" : "disable");
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(__pwm_channel_onoff);
++
++/**
++ * pwm_clk_alloc - allocate and configure CLKA or CLKB
++ * @prescale: from 0..10, the power of two used to divide MCK
++ * @div: from 1..255, the linear divisor to use
++ *
++ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno.  The allocated
++ * clock will run with a period of (2^prescale * div) / MCK, or twice as
++ * long if center aligned PWM output is used.  The clock must later be
++ * deconfigured using pwm_clk_free().
++ */
++int pwm_clk_alloc(unsigned prescale, unsigned div)
++{
++	unsigned long	flags;
++	u32		mr;
++	u32		val = (prescale << 8) | div;
++	int		ret = -EBUSY;
++
++	if (prescale >= 10 || div == 0 || div > 255)
++		return -EINVAL;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if ((mr & 0xffff) == 0) {
++		mr |= val;
++		ret = PWM_CPR_CLKA;
++	}
++	if ((mr & (0xffff << 16)) == 0) {
++		mr |= val << 16;
++		ret = PWM_CPR_CLKB;
++	}
++	if (ret > 0)
++		pwm_writel(pwm, PWM_MR, mr);
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return ret;
++}
++EXPORT_SYMBOL(pwm_clk_alloc);
++
++/**
++ * pwm_clk_free - deconfigure and release CLKA or CLKB
++ *
++ * Reverses the effect of pwm_clk_alloc().
++ */
++void pwm_clk_free(unsigned clk)
++{
++	unsigned long	flags;
++	u32		mr;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if (clk == PWM_CPR_CLKA)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
++	if (clk == PWM_CPR_CLKB)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
++	spin_unlock_irqrestore(&pwm->lock, flags);
++}
++EXPORT_SYMBOL(pwm_clk_free);
++
++/**
++ * pwm_channel_handler - manage channel's IRQ handler
++ * @ch: the channel
++ * @handler: the handler to use, possibly NULL
++ *
++ * If the handler is non-null, the handler will be called after every
++ * period of this PWM channel.  If the handler is null, this channel
++ * won't generate an IRQ.
++ */
++int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch))
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->handler[t] = handler;
++		pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_handler);
++
++static irqreturn_t pwm_irq(int id, void *_pwm)
++{
++	struct pwm	*p = _pwm;
++	irqreturn_t	handled = IRQ_NONE;
++	u32		irqstat;
++	int		index;
++
++	spin_lock(&p->lock);
++
++	/* ack irqs, then handle them */
++	irqstat = pwm_readl(pwm, PWM_ISR);
++
++	while (irqstat) {
++		struct pwm_channel *ch;
++		void (*handler)(struct pwm_channel *ch);
++
++		index = ffs(irqstat) - 1;
++		irqstat &= ~(1 << index);
++		ch = pwm->channel[index];
++		handler = pwm->handler[index];
++		if (handler && ch) {
++			spin_unlock(&p->lock);
++			handler(ch);
++			spin_lock(&p->lock);
++			handled = IRQ_HANDLED;
++		}
++	}
++
++	spin_unlock(&p->lock);
++	return handled;
++}
++
++static int __init pwm_probe(struct platform_device *pdev)
++{
++	struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	int irq = platform_get_irq(pdev, 0);
++	u32 *mp = pdev->dev.platform_data;
++	struct pwm *p;
++	int status = -EIO;
++
++	if (pwm)
++		return -EBUSY;
++	if (!r || irq < 0 || !mp || !*mp)
++		return -ENODEV;
++	if (*mp & ~((1<<PWM_NCHAN)-1)) {
++		dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
++			*mp, PWM_NCHAN);
++		return -EINVAL;
++	}
++
++	p = kzalloc(sizeof(*p), GFP_KERNEL);
++	if (!p)
++		return -ENOMEM;
++
++	spin_lock_init(&p->lock);
++	p->pdev = pdev;
++	p->mask = *mp;
++	p->irq = irq;
++	p->base = ioremap(r->start, r->end - r->start + 1);
++	if (!p->base)
++		goto fail;
++	p->clk = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(p->clk)) {
++		status = PTR_ERR(p->clk);
++		p->clk = NULL;
++		goto fail;
++	}
++
++	status = request_irq(irq, pwm_irq, 0, pdev->name, p);
++	if (status < 0)
++		goto fail;
++
++	pwm = p;
++	platform_set_drvdata(pdev, p);
++
++	return 0;
++
++fail:
++	if (p->clk)
++		clk_put(p->clk);
++	if (p->base)
++		iounmap(p->base);
++
++	kfree(p);
++	return status;
++}
++
++static int __exit pwm_remove(struct platform_device *pdev)
++{
++	struct pwm *p = platform_get_drvdata(pdev);
++
++	if (p != pwm)
++		return -EINVAL;
++
++	clk_enable(pwm->clk);
++	pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
++	pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
++	clk_disable(pwm->clk);
++
++	pwm = NULL;
++
++	free_irq(p->irq, p);
++	clk_put(p->clk);
++	iounmap(p->base);
++	kfree(p);
++
++	return 0;
++}
++
++static struct platform_driver atmel_pwm_driver = {
++	.driver = {
++		.name = "atmel_pwm",
++		.owner = THIS_MODULE,
++	},
++	.remove = __exit_p(pwm_remove),
++
++	/* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
++	 * and all AT91sam9263 states, albeit at reduced clock rate if
++	 * MCK becomes the slow clock (i.e. what Linux labels STR).
++	 */
++};
++
++static int __init pwm_init(void)
++{
++	return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
++}
++module_init(pwm_init);
++
++static void __exit pwm_exit(void)
++{
++	platform_driver_unregister(&atmel_pwm_driver);
++}
++module_exit(pwm_exit);
++
++MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/misc/Kconfig linux-avr32/drivers/misc/Kconfig
+--- linux-2.6.24/drivers/misc/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES
+ 
+ if MISC_DEVICES
+ 
++config ATMEL_PWM
++	tristate "Atmel AT32/AT91 PWM support"
++	depends on (AVR32 || AT91) && EXPERIMENTAL
++	help
++	  This option enables device driver support for the PWM channels
++	  on certain Atmel prcoessors.  Pulse Width Modulation is used for
++	  purposes including software controlled power-efficent backlights
++	  on LCD displays, motor control, and waveform generation.
++
+ config IBM_ASM
+ 	tristate "Device driver for IBM RSA service processor"
+ 	depends on X86 && PCI && INPUT && EXPERIMENTAL
+diff -Nrup linux-2.6.24/drivers/misc/Makefile linux-avr32/drivers/misc/Makefile
+--- linux-2.6.24/drivers/misc/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM)		+= ibmasm/
+ obj-$(CONFIG_HDPU_FEATURES)	+= hdpuftrs/
+ obj-$(CONFIG_MSI_LAPTOP)     += msi-laptop.o
+ obj-$(CONFIG_ASUS_LAPTOP)     += asus-laptop.o
++obj-$(CONFIG_ATMEL_PWM)		+= atmel_pwm.o
+ obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+ obj-$(CONFIG_LKDTM)		+= lkdtm.o
+ obj-$(CONFIG_TIFM_CORE)       	+= tifm_core.o
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.c linux-avr32/drivers/mmc/host/atmel-mci.c
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = 0;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = -ETIMEDOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = -EILSEQ;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = -EIO;
++
++	if (cmd->error) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = -EIO;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = -EILSEQ;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = -ETIMEDOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = -EIO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ETIMEDOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ETIMEDOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ETIMEDOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.h linux-avr32/drivers/mmc/host/atmel-mci.h
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.h	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff -Nrup linux-2.6.24/drivers/mmc/host/Kconfig linux-avr32/drivers/mmc/host/Kconfig
+--- linux-2.6.24/drivers/mmc/host/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -91,6 +91,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff -Nrup linux-2.6.24/drivers/mmc/host/Makefile linux-avr32/drivers/mmc/host/Makefile
+--- linux-2.6.24/drivers/mmc/host/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ obj-$(CONFIG_MMC_SPI)		+= mmc_spi.o
+ 
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c	2008-02-01 14:51:39.000000000 -0500
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c	2008-02-01 14:51:39.000000000 -0500
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(stru
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct 
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff -Nrup linux-2.6.24/drivers/pcmcia/at32_cf.c linux-avr32/drivers/pcmcia/at32_cf.c
+--- linux-2.6.24/drivers/pcmcia/at32_cf.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/pcmcia/at32_cf.c	2008-02-01 14:51:42.000000000 -0500
+@@ -0,0 +1,533 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin != GPIO_PIN_NONE)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin != GPIO_PIN_NONE)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin != GPIO_PIN_NONE)
++		cf->vcc_pin = request_pin(pdev, board->vcc_pin,
++					  "cf_vcc");
++	if (board->ready_pin != GPIO_PIN_NONE)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	cf->present = at32_cf_present(cf);
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff -Nrup linux-2.6.24/drivers/pcmcia/Kconfig linux-avr32/drivers/pcmcia/Kconfig
+--- linux-2.6.24/drivers/pcmcia/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Kconfig	2008-02-01 14:51:42.000000000 -0500
+@@ -276,6 +276,13 @@ config ELECTRA_CF
+ 	  Say Y here to support the CompactFlash controller on the
+ 	  PA Semi Electra eval board.
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff -Nrup linux-2.6.24/drivers/pcmcia/Makefile linux-avr32/drivers/pcmcia/Makefile
+--- linux-2.6.24/drivers/pcmcia/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Makefile	2008-02-01 14:51:42.000000000 -0500
+@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc417
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
+ obj-$(CONFIG_ELECTRA_CF)			+= electra_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff -Nrup linux-2.6.24/drivers/spi/atmel_spi.c linux-avr32/drivers/spi/atmel_spi.c
+--- linux-2.6.24/drivers/spi/atmel_spi.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/spi/atmel_spi.c	2008-02-01 14:51:43.000000000 -0500
+@@ -51,7 +51,9 @@ struct atmel_spi {
+ 	u8			stopping;
+ 	struct list_head	queue;
+ 	struct spi_transfer	*current_transfer;
+-	unsigned long		remaining_bytes;
++	unsigned long		current_remaining_bytes;
++	struct spi_transfer	*next_transfer;
++	unsigned long		next_remaining_bytes;
+ 
+ 	void			*buffer;
+ 	dma_addr_t		buffer_dma;
+@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_s
+ 		gpio_set_value(gpio, !active);
+ }
+ 
++static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
++					struct spi_transfer *xfer)
++{
++	return msg->transfers.prev == &xfer->transfer_list;
++}
++
++static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
++{
++	return xfer->delay_usecs == 0 && !xfer->cs_change;
++}
++
++static void atmel_spi_next_xfer_data(struct spi_master *master,
++				struct spi_transfer *xfer,
++				dma_addr_t *tx_dma,
++				dma_addr_t *rx_dma,
++				u32 *plen)
++{
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	u32			len = *plen;
++
++	/* use scratch buffer only when rx or tx data is unspecified */
++	if (xfer->rx_buf)
++		*rx_dma = xfer->rx_dma + xfer->len - len;
++	else {
++		*rx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++	}
++	if (xfer->tx_buf)
++		*tx_dma = xfer->tx_dma + xfer->len - len;
++	else {
++		*tx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++		memset(as->buffer, 0, len);
++		dma_sync_single_for_device(&as->pdev->dev,
++				as->buffer_dma, len, DMA_TO_DEVICE);
++	}
++
++	*plen = len;
++}
++
+ /*
+  * Submit next transfer for DMA.
+  * lock is held, spi irq is blocked
+@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct s
+ {
+ 	struct atmel_spi	*as = spi_master_get_devdata(master);
+ 	struct spi_transfer	*xfer;
+-	u32			len;
++	u32			len, remaining, total;
+ 	dma_addr_t		tx_dma, rx_dma;
+ 
+-	xfer = as->current_transfer;
+-	if (!xfer || as->remaining_bytes == 0) {
+-		if (xfer)
+-			xfer = list_entry(xfer->transfer_list.next,
+-					struct spi_transfer, transfer_list);
+-		else
+-			xfer = list_entry(msg->transfers.next,
+-					struct spi_transfer, transfer_list);
+-		as->remaining_bytes = xfer->len;
+-		as->current_transfer = xfer;
++	if (!as->current_transfer)
++		xfer = list_entry(msg->transfers.next,
++				struct spi_transfer, transfer_list);
++	else if (!as->next_transfer)
++		xfer = list_entry(as->current_transfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++	else
++		xfer = NULL;
++
++	if (xfer) {
++		len = xfer->len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		remaining = xfer->len - len;
++
++		spi_writel(as, RPR, rx_dma);
++		spi_writel(as, TPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RCR, len);
++		spi_writel(as, TCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		xfer = as->next_transfer;
++		remaining = as->next_remaining_bytes;
+ 	}
+ 
+-	len = as->remaining_bytes;
++	as->current_transfer = xfer;
++	as->current_remaining_bytes = remaining;
+ 
+-	tx_dma = xfer->tx_dma + xfer->len - len;
+-	rx_dma = xfer->rx_dma + xfer->len - len;
++	if (remaining > 0)
++		len = remaining;
++	else if (!atmel_spi_xfer_is_last(msg, xfer)
++			&& atmel_spi_xfer_can_be_chained(xfer)) {
++		xfer = list_entry(xfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++		len = xfer->len;
++	} else
++		xfer = NULL;
+ 
+-	/* use scratch buffer only when rx or tx data is unspecified */
+-	if (!xfer->rx_buf) {
+-		rx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-	}
+-	if (!xfer->tx_buf) {
+-		tx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-		memset(as->buffer, 0, len);
+-		dma_sync_single_for_device(&as->pdev->dev,
+-				as->buffer_dma, len, DMA_TO_DEVICE);
+-	}
++	as->next_transfer = xfer;
+ 
+-	spi_writel(as, RPR, rx_dma);
+-	spi_writel(as, TPR, tx_dma);
++	if (xfer) {
++		total = len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		as->next_remaining_bytes = total - len;
++
++		spi_writel(as, RNPR, rx_dma);
++		spi_writel(as, TNPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RNCR, len);
++		spi_writel(as, TNCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		spi_writel(as, RNCR, 0);
++		spi_writel(as, TNCR, 0);
++	}
+ 
+-	as->remaining_bytes -= len;
+-	if (msg->spi->bits_per_word > 8)
+-		len >>= 1;
+-
+-	/* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
+-	 * mechanism might help avoid the IRQ latency between transfers
+-	 * (and improve the nCS0 errata handling on at91rm9200 chips)
+-	 *
+-	 * We're also waiting for ENDRX before we start the next
++	/* REVISIT: We're waiting for ENDRX before we start the next
+ 	 * transfer because we need to handle some difficult timing
+ 	 * issues otherwise. If we wait for ENDTX in one transfer and
+ 	 * then starts waiting for ENDRX in the next, it's difficult
+@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct s
+ 	 *
+ 	 * It should be doable, though. Just not now...
+ 	 */
+-	spi_writel(as, TNCR, 0);
+-	spi_writel(as, RNCR, 0);
+ 	spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
+-
+-	dev_dbg(&msg->spi->dev,
+-		"  start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
+-		xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
+-		xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
+-
+-	spi_writel(as, RCR, len);
+-	spi_writel(as, TCR, len);
+ 	spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
+ }
+ 
+@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *ma
+ 	spin_lock(&as->lock);
+ 
+ 	as->current_transfer = NULL;
++	as->next_transfer = NULL;
+ 
+ 	/* continue if needed */
+ 	if (list_empty(&as->queue) || as->stopping)
+@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 
+ 		spi_writel(as, IDR, pending);
+ 
+-		if (as->remaining_bytes == 0) {
++		if (as->current_remaining_bytes == 0) {
+ 			msg->actual_length += xfer->len;
+ 
+ 			if (!msg->is_dma_mapped)
+@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 			if (xfer->delay_usecs)
+ 				udelay(xfer->delay_usecs);
+ 
+-			if (msg->transfers.prev == &xfer->transfer_list) {
++			if (atmel_spi_xfer_is_last(msg, xfer)) {
+ 				/* report completed message */
+ 				atmel_spi_msg_done(master, as, msg, 0,
+ 						xfer->cs_change);
+@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_de
+ 	if (!(spi->mode & SPI_CPHA))
+ 		csr |= SPI_BIT(NCPHA);
+ 
+-	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	/* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
++	 *
++	 * DLYBCT would add delays between words, slowing down transfers.
++	 * It could potentially be useful to cope with DMA bottlenecks, but
++	 * in those cases it's probably best to just use a lower bitrate.
++	 */
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff -Nrup linux-2.6.24/drivers/video/atmel_lcdfb.c linux-avr32/drivers/video/atmel_lcdfb.c
+--- linux-2.6.24/drivers/video/atmel_lcdfb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/atmel_lcdfb.c	2008-02-01 14:51:44.000000000 -0500
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lc
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+@@ -148,6 +150,8 @@ static int atmel_lcdfb_alloc_video_memor
+ 		return -ENOMEM;
+ 	}
+ 
++	memset(info->screen_base, 0, info->fix.smem_len);
++
+ 	return 0;
+ }
+ 
+@@ -203,6 +207,26 @@ static int atmel_lcdfb_check_var(struct 
+ 	var->transp.offset = var->transp.length = 0;
+ 	var->xoffset = var->yoffset = 0;
+ 
++	/* Saturate vertical and horizontal timings at maximum values */
++	var->vsync_len = min_t(u32, var->vsync_len,
++			(ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
++	var->upper_margin = min_t(u32, var->upper_margin,
++			ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
++	var->lower_margin = min_t(u32, var->lower_margin,
++			ATMEL_LCDC_VFP);
++	var->right_margin = min_t(u32, var->right_margin,
++			(ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
++	var->hsync_len = min_t(u32, var->hsync_len,
++			(ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
++	var->left_margin = min_t(u32, var->left_margin,
++			ATMEL_LCDC_HBP + 1);
++
++	/* Some parameters can't be zero */
++	var->vsync_len = max_t(u32, var->vsync_len, 1);
++	var->right_margin = max_t(u32, var->right_margin, 1);
++	var->hsync_len = max_t(u32, var->hsync_len, 1);
++	var->left_margin = max_t(u32, var->left_margin, 1);
++
+ 	switch (var->bits_per_pixel) {
+ 	case 1:
+ 	case 2:
+@@ -516,7 +540,6 @@ static int __init atmel_lcdfb_init_fbinf
+ 	struct fb_info *info = sinfo->info;
+ 	int ret = 0;
+ 
+-	memset_io(info->screen_base, 0, info->fix.smem_len);
+ 	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
+ 
+ 	dev_info(info->device,
+@@ -645,6 +668,11 @@ static int __init atmel_lcdfb_probe(stru
+ 		info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
+ 		if (!info->screen_base)
+ 			goto release_intmem;
++
++		/*
++		 * Don't clear the framebuffer -- someone may have set
++		 * up a splash image.
++		 */
+ 	} else {
+ 		/* alocate memory buffer */
+ 		ret = atmel_lcdfb_alloc_video_memory(sinfo);
+diff -Nrup linux-2.6.24/drivers/video/console/Kconfig linux-avr32/drivers/video/console/Kconfig
+--- linux-2.6.24/drivers/video/console/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/console/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -6,7 +6,7 @@ menu "Console display driver support"
+ 
+ config VGA_CONSOLE
+ 	bool "VGA text console" if EMBEDDED || !X86
+-	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
++	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
+ 	default y
+ 	help
+ 	  Saying Y here will allow you to use Linux in text mode through a
+diff -Nrup linux-2.6.24/drivers/watchdog/Kconfig linux-avr32/drivers/watchdog/Kconfig
+--- linux-2.6.24/drivers/watchdog/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/watchdog/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h	1969-12-31 19:00:00.000000000 -0500
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/board.h linux-avr32/include/asm-avr32/arch-at32ap/board.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/board.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/board.h	2008-02-01 14:51:45.000000000 -0500
+@@ -51,6 +51,9 @@ struct platform_device *
+ at32_add_device_ide(unsigned int id, unsigned int extint,
+ 		    struct ide_platform_data *data);
+ 
++/* mask says which PWM channels to mux */
++struct platform_device *at32_add_device_pwm(u32 mask);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -66,7 +69,13 @@ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
+ struct platform_device *at32_add_device_twi(unsigned int id);
+-struct platform_device *at32_add_device_mci(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
+ struct platform_device *at32_add_device_ac97c(unsigned int id);
+ struct platform_device *at32_add_device_abdac(unsigned int id);
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h linux-avr32/include/asm-avr32/arch-at32ap/cpu.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/cpu.h	2008-02-01 14:51:45.000000000 -0500
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/io.h linux-avr32/include/asm-avr32/arch-at32ap/io.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/io.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/io.h	2008-02-01 14:51:45.000000000 -0500
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h linux-avr32/include/asm-avr32/arch-at32ap/portmux.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/portmux.h	2008-02-01 14:51:45.000000000 -0500
+@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/dma-controller.h linux-avr32/include/asm-avr32/dma-controller.h
+--- linux-2.6.24/include/asm-avr32/dma-controller.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/dma-controller.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/irq.h linux-avr32/include/asm-avr32/irq.h
+--- linux-2.6.24/include/asm-avr32/irq.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/irq.h	2008-02-01 14:51:45.000000000 -0500
+@@ -11,4 +11,9 @@
+ 
+ #define irq_canonicalize(i)	(i)
+ 
++#ifndef __ASSEMBLER__
++int nmi_enable(void);
++void nmi_disable(void);
++#endif
++
+ #endif /* __ASM_AVR32_IOCTLS_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/kdebug.h linux-avr32/include/asm-avr32/kdebug.h
+--- linux-2.6.24/include/asm-avr32/kdebug.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/kdebug.h	2008-02-01 14:51:45.000000000 -0500
+@@ -5,6 +5,7 @@
+ enum die_val {
+ 	DIE_BREAKPOINT,
+ 	DIE_SSTEP,
++	DIE_NMI,
+ };
+ 
+ #endif /* __ASM_AVR32_KDEBUG_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/ocd.h linux-avr32/include/asm-avr32/ocd.h
+--- linux-2.6.24/include/asm-avr32/ocd.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ocd.h	2008-02-01 14:51:45.000000000 -0500
+@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned 
+ #define ocd_read(reg)			__ocd_read(OCD_##reg)
+ #define ocd_write(reg, value)		__ocd_write(OCD_##reg, value)
+ 
++struct task_struct;
++
++void ocd_enable(struct task_struct *child);
++void ocd_disable(struct task_struct *child);
++
+ #endif /* !__ASSEMBLER__ */
+ 
+ #endif /* __ASM_AVR32_OCD_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/processor.h linux-avr32/include/asm-avr32/processor.h
+--- linux-2.6.24/include/asm-avr32/processor.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/processor.h	2008-02-01 14:51:45.000000000 -0500
+@@ -57,11 +57,25 @@ struct avr32_cpuinfo {
+ 	unsigned short cpu_revision;
+ 	enum tlb_config tlb_config;
+ 	unsigned long features;
++	u32 device_id;
+ 
+ 	struct cache_info icache;
+ 	struct cache_info dcache;
+ };
+ 
++static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 1) & 0x7f;
++}
++static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 12) & 0xffff;
++}
++static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 28) & 0x0f;
++}
++
+ extern struct avr32_cpuinfo boot_cpu_data;
+ 
+ #ifdef CONFIG_SMP
+diff -Nrup linux-2.6.24/include/asm-avr32/ptrace.h linux-avr32/include/asm-avr32/ptrace.h
+--- linux-2.6.24/include/asm-avr32/ptrace.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ptrace.h	2008-02-01 14:51:45.000000000 -0500
+@@ -121,7 +121,15 @@ struct pt_regs {
+ };
+ 
+ #ifdef __KERNEL__
+-# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
++
++#include <asm/ocd.h>
++
++#define arch_ptrace_attach(child)       ocd_enable(child)
++
++#define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
++#define instruction_pointer(regs)       ((regs)->pc)
++#define profile_pc(regs)                instruction_pointer(regs)
++
+ extern void show_regs (struct pt_regs *);
+ 
+ static __inline__ int valid_user_regs(struct pt_regs *regs)
+@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st
+ 	return 0;
+ }
+ 
+-#define instruction_pointer(regs) ((regs)->pc)
+-
+-#define profile_pc(regs) instruction_pointer(regs)
+ 
+ #endif /* __KERNEL__ */
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/thread_info.h linux-avr32/include/asm-avr32/thread_info.h
+--- linux-2.6.24/include/asm-avr32/thread_info.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/thread_info.h	2008-02-01 14:51:45.000000000 -0500
+@@ -88,6 +88,7 @@ static inline struct thread_info *curren
+ #define TIF_MEMDIE		6
+ #define TIF_RESTORE_SIGMASK	7	/* restore signal mask in do_signal */
+ #define TIF_CPU_GOING_TO_SLEEP	8	/* CPU is entering sleep 0 mode */
++#define TIF_DEBUG		30	/* debugging enabled */
+ #define TIF_USERSPACE		31      /* true if FS sets userspace */
+ 
+ #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
+diff -Nrup linux-2.6.24/include/linux/atmel_pwm.h linux-avr32/include/linux/atmel_pwm.h
+--- linux-2.6.24/include/linux/atmel_pwm.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/linux/atmel_pwm.h	2008-02-01 14:51:47.000000000 -0500
+@@ -0,0 +1,70 @@
++#ifndef __LINUX_ATMEL_PWM_H
++#define __LINUX_ATMEL_PWM_H
++
++/**
++ * struct pwm_channel - driver handle to a PWM channel
++ * @regs: base of this channel's registers
++ * @index: number of this channel (0..31)
++ * @mck: base clock rate, which can be prescaled and maybe subdivided
++ *
++ * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
++ * Then they configure its clock rate (derived from MCK), alignment,
++ * polarity, and duty cycle by writing directly to the channel registers,
++ * before enabling the channel by calling pwm_channel_enable().
++ *
++ * After emitting a PWM signal for the desired length of time, drivers
++ * may then pwm_channel_disable() or pwm_channel_free().  Both of these
++ * disable the channel, but when it's freed the IRQ is deconfigured and
++ * the channel must later be re-allocated and reconfigured.
++ *
++ * Note that if the period or duty cycle need to be changed while the
++ * PWM channel is operating, drivers must use the PWM_CUPD double buffer
++ * mechanism, either polling until they change or getting implicitly
++ * notified through a once-per-period interrupt handler.
++ */
++struct pwm_channel {
++	void __iomem	*regs;
++	unsigned	index;
++	unsigned long	mck;
++};
++
++extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
++extern int pwm_channel_free(struct pwm_channel *ch);
++
++extern int pwm_clk_alloc(unsigned prescale, unsigned div);
++extern void pwm_clk_free(unsigned clk);
++
++extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
++
++#define pwm_channel_enable(ch)	__pwm_channel_onoff((ch), 1)
++#define pwm_channel_disable(ch)	__pwm_channel_onoff((ch), 0)
++
++/* periodic interrupts, mostly for CUPD changes to period or cycle */
++extern int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch));
++
++/* per-channel registers (banked at pwm_channel->regs) */
++#define PWM_CMR		0x00		/* mode register */
++#define		PWM_CPR_CPD	(1 << 10)	/* set: CUPD modifies period */
++#define		PWM_CPR_CPOL	(1 << 9)	/* set: idle high */
++#define		PWM_CPR_CALG	(1 << 8)	/* set: center align */
++#define		PWM_CPR_CPRE	(0xf << 0)	/* mask: rate is mck/(2^pre) */
++#define		PWM_CPR_CLKA	(0xb << 0)	/* rate CLKA */
++#define		PWM_CPR_CLKB	(0xc << 0)	/* rate CLKB */
++#define PWM_CDTY	0x04		/* duty cycle (max of CPRD) */
++#define PWM_CPRD	0x08		/* period (count up from zero) */
++#define PWM_CCNT	0x0c		/* counter (20 bits?) */
++#define PWM_CUPD	0x10		/* update CPRD (or CDTY) next period */
++
++static inline void
++pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
++{
++	__raw_writel(val, pwmc->regs + offset);
++}
++
++static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
++{
++	return __raw_readl(pwmc->regs + offset);
++}
++
++#endif /* __LINUX_ATMEL_PWM_H */
+diff -Nrup linux-2.6.24/include/video/atmel_lcdc.h linux-avr32/include/video/atmel_lcdc.h
+--- linux-2.6.24/include/video/atmel_lcdc.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/video/atmel_lcdc.h	2008-02-01 14:51:47.000000000 -0500
+@@ -115,20 +115,20 @@ struct atmel_lcdfb_info {
+ #define		ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)
+ 
+ #define ATMEL_LCDC_TIM1		0x0808
+-#define	ATMEL_LCDC_VFP		(0xff <<  0)
++#define	ATMEL_LCDC_VFP		(0xffU <<  0)
+ #define	ATMEL_LCDC_VBP_OFFSET		8
+-#define	ATMEL_LCDC_VBP		(0xff <<  ATMEL_LCDC_VBP_OFFSET)
++#define	ATMEL_LCDC_VBP		(0xffU <<  ATMEL_LCDC_VBP_OFFSET)
+ #define	ATMEL_LCDC_VPW_OFFSET		16
+-#define	ATMEL_LCDC_VPW		(0x3f << ATMEL_LCDC_VPW_OFFSET)
++#define	ATMEL_LCDC_VPW		(0x3fU << ATMEL_LCDC_VPW_OFFSET)
+ #define	ATMEL_LCDC_VHDLY_OFFSET		24
+-#define	ATMEL_LCDC_VHDLY	(0xf  << ATMEL_LCDC_VHDLY_OFFSET)
++#define	ATMEL_LCDC_VHDLY	(0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
+ 
+ #define ATMEL_LCDC_TIM2		0x080c
+-#define	ATMEL_LCDC_HBP		(0xff  <<  0)
++#define	ATMEL_LCDC_HBP		(0xffU  <<  0)
+ #define	ATMEL_LCDC_HPW_OFFSET		8
+-#define	ATMEL_LCDC_HPW		(0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
++#define	ATMEL_LCDC_HPW		(0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
+ #define	ATMEL_LCDC_HFP_OFFSET		21
+-#define	ATMEL_LCDC_HFP		(0x7ff << ATMEL_LCDC_HFP_OFFSET)
++#define	ATMEL_LCDC_HFP		(0x7ffU << ATMEL_LCDC_HFP_OFFSET)
+ 
+ #define ATMEL_LCDC_LCDFRMCFG	0x0810
+ #define	ATMEL_LCDC_LINEVAL	(0x7ff <<  0)
+diff -Nrup linux-2.6.24/kernel/ptrace.c linux-avr32/kernel/ptrace.c
+--- linux-2.6.24/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/kernel/ptrace.c	2008-02-01 14:51:47.000000000 -0500
+@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request,
+ 	lock_kernel();
+ 	if (request == PTRACE_TRACEME) {
+ 		ret = ptrace_traceme();
++		if (!ret)
++			arch_ptrace_attach(current);
+ 		goto out;
+ 	}
+ 
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.c linux-avr32/sound/avr32/ac97c.c
+--- linux-2.6.24/sound/avr32/ac97c.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.c	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.h linux-avr32/sound/avr32/ac97c.h
+--- linux-2.6.24/sound/avr32/ac97c.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.h	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff -Nrup linux-2.6.24/sound/avr32/Kconfig linux-avr32/sound/avr32/Kconfig
+--- linux-2.6.24/sound/avr32/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff -Nrup linux-2.6.24/sound/avr32/Makefile linux-avr32/sound/avr32/Makefile
+--- linux-2.6.24/sound/avr32/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff -Nrup linux-2.6.24/sound/Kconfig linux-avr32/sound/Kconfig
+--- linux-2.6.24/sound/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
+ if SPI
+ source "sound/spi/Kconfig"
+ endif
+diff -Nrup linux-2.6.24/sound/Makefile linux-avr32/sound/Makefile
+--- linux-2.6.24/sound/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+ obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
+-	sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++	sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.c linux-avr32/sound/oss/at32_abdac.c
+--- linux-2.6.24/sound/oss/at32_abdac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.c	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.h linux-avr32/sound/oss/at32_abdac.h
+--- linux-2.6.24/sound/oss/at32_abdac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.h	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff -Nrup linux-2.6.24/sound/oss/Kconfig linux-avr32/sound/oss/Kconfig
+--- linux-2.6.24/sound/oss/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Kconfig	2008-02-01 14:51:49.000000000 -0500
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff -Nrup linux-2.6.24/sound/oss/Makefile linux-avr32/sound/oss/Makefile
+--- linux-2.6.24/sound/oss/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Makefile	2008-02-01 14:51:49.000000000 -0500
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o a
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
diff --git a/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.24-avr32-mmc.patch b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.24-avr32-mmc.patch
new file mode 100644
index 000000000..a7654b5c6
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/kernel-patches/linux-2.6.24-avr32-mmc.patch
@@ -0,0 +1,255 @@
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+index eeac479..7913cd8 100644
+--- a/drivers/mmc/host/atmel-mci.c
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -39,7 +39,6 @@ enum {
+ 	EVENT_STOP_COMPLETE,
+ 	EVENT_DMA_COMPLETE,
+ 	EVENT_DMA_ERROR,
+-	EVENT_CARD_DETECT,
+ };
+ 
+ struct atmel_mci_dma {
+@@ -70,6 +69,9 @@ struct atmel_mci {
+ 	int			detect_pin;
+ 	int			wp_pin;
+ 
++	/* For detect pin debouncing */
++	struct timer_list	detect_timer;
++
+ 	unsigned long		bus_hz;
+ 	unsigned long		mapbase;
+ 	struct clk		*mck;
+@@ -108,8 +110,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_dma_error_is_complete(host)			\
+ 	test_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_card_detect_is_complete(host)			\
+-	test_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Test and clear bit macros for pending events */
+ #define mci_clear_cmd_is_pending(host)			\
+@@ -124,8 +124,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_is_pending(host)		\
+ 	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_is_pending(host)		\
+-	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Test and set bit macros for completed events */
+ #define mci_set_cmd_is_completed(host)			\
+@@ -140,8 +138,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_is_completed(host)		\
+ 	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_is_completed(host)		\
+-	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for completed events */
+ #define mci_set_cmd_complete(host)			\
+@@ -158,8 +154,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_complete(host)		\
+ 	set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_complete(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for pending events */
+ #define mci_set_cmd_pending(host)			\
+@@ -174,8 +168,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_set_dma_error_pending(host)			\
+ 	set_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_set_card_detect_pending(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Clear bit macros for pending events */
+ #define mci_clear_cmd_pending(host)			\
+@@ -190,8 +182,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_pending(host)		\
+ 	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_pending(host)		\
+-	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ 
+ #ifdef CONFIG_DEBUG_FS
+@@ -560,6 +550,21 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
+ 				mci_readl(host, IMR));
+ 
+ 	WARN_ON(host->mrq != NULL);
++
++	/*
++	 * We may "know" the card is gone even though there's still an
++	 * electrical connection. If so, we really need to communicate
++	 * this to the MMC core since there won't be any more
++	 * interrupts as the card is completely removed. Otherwise,
++	 * the MMC core might believe the card is still there even
++	 * though the card was just removed very slowly.
++	 */
++	if (!host->present) {
++		mrq->cmd->error = -ENOMEDIUM;
++		mmc_request_done(mmc, mrq);
++		return;
++	}
++
+ 	host->mrq = mrq;
+ 	host->pending_events = 0;
+ 	host->completed_events = 0;
+@@ -729,6 +734,61 @@ static void atmci_command_complete(struct atmel_mci *host,
+ 	}
+ }
+ 
++static void atmci_detect_change(unsigned long data)
++{
++	struct atmel_mci *host = (struct atmel_mci *)data;
++	struct mmc_request *mrq = host->mrq;
++	int present;
++
++	/*
++	 * atmci_remove() sets detect_pin to -1 before freeing the
++	 * interrupt. We must not re-enable the interrupt if it has
++	 * been freed.
++	 */
++	smp_rmb();
++	if (host->detect_pin < 0)
++		return;
++
++	enable_irq(gpio_to_irq(host->detect_pin));
++	present = !gpio_get_value(host->detect_pin);
++
++	dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
++			present, host->present);
++
++	if (present != host->present) {
++		dev_dbg(&host->mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++
++		/* Reset controller if card is gone */
++		if (!present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ENOMEDIUM;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ENOMEDIUM;
++				atmci_data_complete(host, host->data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ENOMEDIUM;
++
++			host->cmd = NULL;
++			atmci_request_end(host->mmc, mrq);
++		}
++
++		mmc_detect_change(host->mmc, 0);
++	}
++}
++
+ static void atmci_tasklet_func(unsigned long priv)
+ {
+ 	struct mmc_host *mmc = (struct mmc_host *)priv;
+@@ -806,33 +866,6 @@ static void atmci_tasklet_func(unsigned long priv)
+ 		data->bytes_xfered = data->blocks * data->blksz;
+ 		atmci_data_complete(host, data);
+ 	}
+-	if (mci_clear_card_detect_is_pending(host)) {
+-		/* Reset controller if card is gone */
+-		if (!host->present) {
+-			mci_writel(host, CR, MCI_BIT(SWRST));
+-			mci_writel(host, IDR, ~0UL);
+-			mci_writel(host, CR, MCI_BIT(MCIEN));
+-		}
+-
+-		/* Clean up queue if present */
+-		if (mrq) {
+-			if (!mci_cmd_is_complete(host))
+-				mrq->cmd->error = -ETIMEDOUT;
+-			if (mrq->data && !mci_data_is_complete(host)
+-			    && !mci_data_error_is_complete(host)) {
+-				dma_stop_request(host->dma.req.req.dmac,
+-						host->dma.req.req.channel);
+-				host->data->error = -ETIMEDOUT;
+-				atmci_data_complete(host, data);
+-			}
+-			if (mrq->stop && !mci_stop_is_complete(host))
+-				mrq->stop->error = -ETIMEDOUT;
+-
+-			host->cmd = NULL;
+-			atmci_request_end(mmc, mrq);
+-		}
+-		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
+-	}
+ }
+ 
+ static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
+@@ -957,20 +990,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)
+ 	return IRQ_HANDLED;
+ }
+ 
+-static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
+ {
+ 	struct mmc_host *mmc = dev_id;
+ 	struct atmel_mci *host = mmc_priv(mmc);
+ 
+-	int present = !gpio_get_value(irq_to_gpio(irq));
++	/*
++	 * Disable interrupts until the pin has stabilized and check
++	 * the state then. Use mod_timer() since we may be in the
++	 * middle of the timer routine when this interrupt triggers.
++	 */
++	disable_irq_nosync(irq);
++	mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
+ 
+-	if (present != host->present) {
+-		dev_dbg(&mmc->class_dev, "card %s\n",
+-			present ? "inserted" : "removed");
+-		host->present = present;
+-		mci_set_card_detect_pending(host);
+-		tasklet_schedule(&host->tasklet);
+-	}
+ 	return IRQ_HANDLED;
+ }
+ 
+@@ -1079,8 +1111,11 @@ static int __devinit atmci_probe(struct platform_device *pdev)
+ 	mmc_add_host(mmc);
+ 
+ 	if (host->detect_pin >= 0) {
++		setup_timer(&host->detect_timer, atmci_detect_change,
++				(unsigned long)host);
++
+ 		ret = request_irq(gpio_to_irq(host->detect_pin),
+-				  atmci_detect_change,
++				  atmci_detect_interrupt,
+ 				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ 				  DRIVER_NAME, mmc);
+ 		if (ret) {
+@@ -1125,9 +1160,16 @@ static int __devexit atmci_remove(struct platform_device *pdev)
+ 		atmci_cleanup_debugfs(host);
+ 
+ 		if (host->detect_pin >= 0) {
+-			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			int pin = host->detect_pin;
++
++			/* Make sure our timer doesn't enable the interrupt */
++			host->detect_pin = -1;
++			smp_wmb();
++
++			free_irq(gpio_to_irq(pin), host->mmc);
++			del_timer_sync(&host->detect_timer);
+ 			cancel_delayed_work(&host->mmc->detect);
+-			gpio_free(host->detect_pin);
++			gpio_free(pin);
+ 		}
+ 
+ 		mmc_remove_host(host->mmc);
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/TZ b/target/device/Atmel/atngw100-base/target_skeleton/etc/TZ
new file mode 100644
index 000000000..36498c4a7
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/TZ
@@ -0,0 +1 @@
+CET1CDT
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/fstab b/target/device/Atmel/atngw100-base/target_skeleton/etc/fstab
new file mode 100644
index 000000000..fcf1a78cd
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/fstab
@@ -0,0 +1,3 @@
+# /etc/fstab: static file system information.
+#
+# <file system>	<mount pt>	<type>		<options>	<dump>	<pass>
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/group b/target/device/Atmel/atngw100-base/target_skeleton/etc/group
new file mode 100644
index 000000000..cec65da3f
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/group
@@ -0,0 +1,20 @@
+root::0:
+daemon:x:1:
+bin:x:2:
+sys:x:3:
+adm:x:4:
+tty:x:5:
+disk:x:6:
+kmem:x:9:
+wheel:x:10:root
+dialout:x:20:
+utmp:x:43:
+staff:x:50:
+www-data::51:
+ftp::52:
+haldaemon:x:68:
+dbus:x:81:
+audio::101:
+users::500:
+default::1000:
+nogroup::65534:
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/hostname b/target/device/Atmel/atngw100-base/target_skeleton/etc/hostname
new file mode 100644
index 000000000..c4100b512
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/hostname
@@ -0,0 +1 @@
+at32base.example.net
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/hosts b/target/device/Atmel/atngw100-base/target_skeleton/etc/hosts
new file mode 100644
index 000000000..1f2238508
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/hosts
@@ -0,0 +1,12 @@
+127.0.0.1   localhost.localdomain localhost
+127.0.1.1   at32base.example.net at32base
+
+# The following lines are desirable for IPv6 capable hosts
+::1     localhost
+::1     ip6-localhost ip6-loopback
+::1     at32base.example.net at32base
+fe00::0 ip6-localnet
+ff00::0 ip6-mcastprefix
+ff02::1 ip6-allnodes
+ff02::2 ip6-allrouters
+ff02::3 ip6-allhosts
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/K70sendsig b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/K70sendsig
new file mode 100755
index 000000000..1a2485251
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/K70sendsig
@@ -0,0 +1 @@
+#!/bin/sh
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S00mountvirtfs b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S00mountvirtfs
new file mode 100755
index 000000000..d9e5c9249
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S00mountvirtfs
@@ -0,0 +1,74 @@
+#!/bin/sh
+
+MOUNT=/bin/mount
+MKDIR=/bin/mkdir
+
+retval=0
+
+mount_fs()
+{
+	if [ "$1" = "" -o "$2" = "" -o "$3" = "" ]; then
+		return;
+	fi
+
+	if [ "$4" = "" ]; then
+		if ! ${MOUNT} -t $3 $1 $2; then
+			echo "  mount $2 failed"
+			retval=1
+			return 1
+		else
+			echo "  $2 mounted"
+		fi
+	else
+		if ! ${MOUNT} -t $3 -o $4 $1 $2; then
+			echo "  mount $2 failed"
+			retval=1
+			return 1
+		else
+			echo "  $2 mounted"
+		fi
+	fi
+
+	return 0
+}
+
+mkdir_fs()
+{
+	if [ "$1" = "" ]; then
+		return;
+	fi
+
+	if ! ${MKDIR} $1; then
+		echo "  mkdir $1 failed"
+		retval=1
+		return 1
+	else
+		echo "  $1 directory made"
+	fi
+
+	return 0
+}
+
+echo "Mounting virtual filesystems:"
+
+mount_fs proc /proc proc
+mount_fs sys /sys sysfs
+
+if mount_fs dev /dev tmpfs "size=512k,mode=0755"; then
+	mkdir_fs /dev/pts
+	mount_fs pts /dev/pts devpts
+	mkdir_fs /dev/shm
+	# g_serial is not detected by mdev.
+	mknod /dev/ttygserial c 127 0
+fi
+
+mount_fs config /config configfs
+mount_fs tmp /tmp tmpfs
+mount_fs run /var/run tmpfs
+mount_fs log /var/log tmpfs
+
+if [ $retval -ne 0 ]; then
+	echo "  WARNING: not able to mount all virtual file systems"
+fi
+
+exit $retval
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S01hotplug b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S01hotplug
new file mode 100755
index 000000000..a30f06a09
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S01hotplug
@@ -0,0 +1,14 @@
+#! /bin/sh
+
+echo -n "Setting up mdev: "
+set -e
+trap 'echo "failed"' EXIT
+/bin/ln -s /proc/self/fd /dev/fd
+/bin/ln -s /proc/self/fd/0 /dev/stdin
+/bin/ln -s /proc/self/fd/1 /dev/stdout
+/bin/ln -s /proc/self/fd/2 /dev/stderr
+/bin/ln -s /proc/kcore /dev/core
+/bin/echo /sbin/mdev > /proc/sys/kernel/hotplug
+/sbin/mdev -s
+trap - EXIT
+echo "done"
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S02hostname b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S02hostname
new file mode 100755
index 000000000..083d41dc4
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S02hostname
@@ -0,0 +1,47 @@
+#!/bin/sh
+
+PROGRAM=/bin/hostname
+
+echo -n "Setting hostname: "
+[ -x ${PROGRAM} ] || (echo "missing"; exit 0)
+
+if [ -f /etc/hostname ]; then
+	HOST="$(cat /etc/hostname)"
+else
+	HOST="localhost.localdomain"
+fi
+
+start() {
+	if ${PROGRAM} "${HOST}"; then
+		echo "'${HOST}'"
+	else
+		echo "failed"
+		exit 1
+	fi
+}
+
+stop() {
+	return 0
+}
+
+restart() {
+	stop
+	start
+}
+
+case "$1" in
+  start)
+        start
+        ;;
+  stop)
+        stop
+        ;;
+  restart|reload)
+        restart
+        ;;
+  *)
+        echo $"Usage: $0 {start|stop|restart}"
+        exit 1
+esac
+
+exit $?
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S08syslog b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S08syslog
new file mode 100755
index 000000000..58b05925d
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S08syslog
@@ -0,0 +1,24 @@
+#!/bin/sh
+
+SYSLOGD=/sbin/syslogd
+
+echo -n "Starting syslogd: "
+if [ ! -x "${SYSLOGD}" ]; then
+	echo "missing"
+	exit 1
+fi
+
+if ${SYSLOGD}; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
+
+echo -n "Log messages to syslog: "
+if echo 4 4 1 7 > /proc/sys/kernel/printk; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S09klog b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S09klog
new file mode 100755
index 000000000..1b0028a08
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/S09klog
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+KLOGD=/sbin/klogd
+
+echo -n "Starting klogd: "
+if [ ! -x "${KLOGD}" ]; then
+	echo "missing"
+	exit 1
+fi
+
+if ${KLOGD}; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/rcK b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/rcK
new file mode 100755
index 000000000..1db1400fa
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/rcK
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+echo "Shutting down ..."
+for k in /etc/init.d/K*; do
+	$k stop
+done
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/rcS b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/rcS
new file mode 100755
index 000000000..4d80c251b
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/init.d/rcS
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+for s in /etc/init.d/S*; do
+	if [ -x $s ]; then
+		$s start
+	fi
+done
+
+echo
+echo "NGW100 ready"
+echo
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/inittab b/target/device/Atmel/atngw100-base/target_skeleton/etc/inittab
new file mode 100644
index 000000000..539edb7fb
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/inittab
@@ -0,0 +1,27 @@
+# Inittab for the ATNGW100 development board
+#
+# Note: BusyBox init doesn't support runlevels.  The runlevels field is
+# completely ignored by BusyBox init. If you want runlevels, use sysvinit.
+#
+# Format for each entry: <id>:<runlevels>:<action>:<process>
+#
+# id        == tty to run on, or empty for /dev/console
+# runlevels == ignored
+# action    == one of sysinit, respawn, askfirst, wait, and once
+# process   == program to run
+
+# Run the rcS script after kernel is booted.
+::sysinit:/etc/init.d/rcS
+
+# Run a shell on the first serial port. Comment out if you want a getty instead.
+ttyS0::respawn:-/bin/sh
+
+# Run a shell on the g_serial port (USB gadget device)? This shell will spawn
+# error message if the device is not connected.
+#ttygserial::respawn:-/bin/sh
+
+# Uncomment this to run a getty on the first serial port.
+#ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100
+
+# Run a script on shutdown.
+::shutdown:/etc/init.d/rcK
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/mdev.conf b/target/device/Atmel/atngw100-base/target_skeleton/etc/mdev.conf
new file mode 100644
index 000000000..7c91ea749
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/mdev.conf
@@ -0,0 +1,49 @@
+# mdev.conf for ATNGW100
+#
+# Syntax:
+#  <regexp> <UID>:<GID> <PERM> [{@,$,*} <CMD>]
+#    @: run <CMD> after creating
+#    $: run <CMD> before removal
+#    *: like @ and $ at the same time
+#    <CMD> is run inside /dev using system()
+
+full	0:0	666
+null	0:0	777
+zero	0:0	666
+
+random	0:0	444
+urandom	0:0	444
+
+console	0:5	0600
+kmem	0:9	000
+mem	0:9	0640
+ptmx	0:5	0660
+
+sda.*	0:6	0660
+sdb.*	0:6	0660
+hda.*	0:6	0660
+hdb.*	0:6	0660
+mtd.*	0:6	0660
+mmc.*	0:6	0660
+
+# Move input devices to input directory
+event.*	0:0	0660	@(mkdir -p input&&mv $MDEV input)
+mice	0:0	0660	@(mkdir -p input&&mv $MDEV input)
+mouse.*	0:0	0660	@(mkdir -p input&&mv $MDEV input)
+
+# Move sound devices to sound directory
+pcm.*		0:101	0660	@(mkdir -p snd&&mv $MDEV snd)
+seq		0:101	0660	@(mkdir -p snd&&mv $MDEV snd)
+timer		0:101	0660	@(mkdir -p snd&&mv $MDEV snd)
+control.*	0:101	0660	@(mkdir -p snd&&mv $MDEV snd)
+
+tty	0:5	0660
+tty0.*	0:5	0660
+tty1.*	0:5	0660
+tty2.*	0:5	0660
+tty3.*	0:5	0660
+tty4.*	0:5	0660
+tty5.*	0:5	0660
+tty6.*	0:5	0660
+
+ttyS.*	0:20	640
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/mtab b/target/device/Atmel/atngw100-base/target_skeleton/etc/mtab
new file mode 120000
index 000000000..e1c204547
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/mtab
@@ -0,0 +1 @@
+../proc/mounts
\ No newline at end of file
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/network/interfaces b/target/device/Atmel/atngw100-base/target_skeleton/etc/network/interfaces
new file mode 100644
index 000000000..add67ee3d
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/network/interfaces
@@ -0,0 +1,7 @@
+# Configure Loopback
+auto lo
+iface lo inet loopback
+
+# Configure Ethernet 0
+#auto eth0
+iface eth0 inet dhcp
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/passwd b/target/device/Atmel/atngw100-base/target_skeleton/etc/passwd
new file mode 100644
index 000000000..1a68e7b8e
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/passwd
@@ -0,0 +1,17 @@
+root:x:0:0:root:/:/bin/sh
+daemon:x:1:1:daemon:/usr/sbin:/bin/sh
+bin:x:2:2:bin:/bin:/bin/sh
+sys:x:3:3:sys:/dev:/bin/sh
+sync:x:4:100:sync:/bin:/bin/sync
+mail:x:8:8:mail:/var/spool/mail:/bin/sh
+proxy:x:13:13:proxy:/bin:/bin/sh
+www-data:x:33:33:www-data:/var/www:/bin/sh
+backup:x:34:34:backup:/var/backups:/bin/sh
+operator:x:37:37:Operator:/var:/bin/sh
+haldaemon:x:68:68:hald:/:/bin/sh
+dbus:x:81:81:dbus:/var/run/dbus:/bin/sh
+ftp:x:50:50:Anonymous FTP user:/home/ftp:/bin/ash
+dnsmasq:x:52:52:dnsmasq:/var/lib/dnsmasq:/bin/false
+sshd:x:110:65534:Operator:/var/run/sshd:/bin/false
+nobody:x:65534:65534:nobody:/nonexistent:/bin/false
+default:x:1000:1000:Default non-root user:/home/default:/bin/sh
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/protocols b/target/device/Atmel/atngw100-base/target_skeleton/etc/protocols
new file mode 100644
index 000000000..1521f3980
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/protocols
@@ -0,0 +1,149 @@
+# /etc/protocols:
+# $Id: protocols,v 1.3 2001/07/07 07:07:15 nalin Exp $
+#
+# Internet (IP) protocols
+#
+#	from: @(#)protocols	5.1 (Berkeley) 4/17/89
+#
+# Updated for NetBSD based on RFC 1340, Assigned Numbers (July 1992).
+#
+# See also http://www.iana.org/assignments/protocol-numbers
+
+ip	0	IP		# internet protocol, pseudo protocol number
+#hopopt	0	HOPOPT		# hop-by-hop options for ipv6
+icmp	1	ICMP		# internet control message protocol
+igmp	2	IGMP		# internet group management protocol
+ggp	3	GGP		# gateway-gateway protocol
+ipencap	4	IP-ENCAP	# IP encapsulated in IP (officially ``IP'')
+st	5	ST		# ST datagram mode
+tcp	6	TCP		# transmission control protocol
+cbt	7	CBT		# CBT, Tony Ballardie <A.Ballardie@cs.ucl.ac.uk>
+egp	8	EGP		# exterior gateway protocol
+igp	9	IGP		# any private interior gateway (Cisco: for IGRP)
+bbn-rcc	10	BBN-RCC-MON	# BBN RCC Monitoring
+nvp	11	NVP-II		# Network Voice Protocol
+pup	12	PUP		# PARC universal packet protocol
+argus	13	ARGUS		# ARGUS
+emcon	14	EMCON		# EMCON
+xnet	15	XNET		# Cross Net Debugger
+chaos	16	CHAOS		# Chaos
+udp	17	UDP		# user datagram protocol
+mux	18	MUX		# Multiplexing protocol
+dcn	19	DCN-MEAS	# DCN Measurement Subsystems
+hmp	20	HMP		# host monitoring protocol
+prm	21	PRM		# packet radio measurement protocol
+xns-idp	22	XNS-IDP		# Xerox NS IDP
+trunk-1	23	TRUNK-1		# Trunk-1
+trunk-2	24	TRUNK-2		# Trunk-2
+leaf-1	25	LEAF-1		# Leaf-1
+leaf-2	26	LEAF-2		# Leaf-2
+rdp	27	RDP		# "reliable datagram" protocol
+irtp	28	IRTP		# Internet Reliable Transaction Protocol
+iso-tp4	29	ISO-TP4		# ISO Transport Protocol Class 4
+netblt	30	NETBLT		# Bulk Data Transfer Protocol
+mfe-nsp	31	MFE-NSP		# MFE Network Services Protocol
+merit-inp	32	MERIT-INP	# MERIT Internodal Protocol
+sep	33	SEP		# Sequential Exchange Protocol
+3pc	34	3PC		# Third Party Connect Protocol
+idpr	35	IDPR		# Inter-Domain Policy Routing Protocol
+xtp	36	XTP		# Xpress Tranfer Protocol
+ddp	37	DDP		# Datagram Delivery Protocol
+idpr-cmtp	38	IDPR-CMTP	# IDPR Control Message Transport Proto
+tp++	39	TP++		# TP++ Transport Protocol
+il	40	IL		# IL Transport Protocol
+ipv6	41	IPv6		# IPv6
+sdrp	42	SDRP		# Source Demand Routing Protocol
+ipv6-route	43	IPv6-Route 	# Routing Header for IPv6
+ipv6-frag	44	IPv6-Frag	# Fragment Header for IPv6
+idrp	45	IDRP		# Inter-Domain Routing Protocol
+rsvp	46	RSVP		# Resource ReSerVation Protocol
+gre	47	GRE		# Generic Routing Encapsulation
+mhrp	48	MHRP		# Mobile Host Routing Protocol
+bna	49	BNA		# BNA
+ipv6-crypt	50	IPv6-Crypt	# Encryption Header for IPv6
+ipv6-auth	51	IPv6-Auth	# Authentication Header for IPv6
+i-nlsp	52	I-NLSP		# Integrated Net Layer Security TUBA
+swipe	53	SWIPE		# IP with Encryption
+narp	54	NARP		# NBMA Address Resolution Protocol
+mobile	55	MOBILE		# IP Mobility
+tlsp	56	TLSP		# Transport Layer Security Protocol
+skip	57	SKIP		# SKIP
+ipv6-icmp	58	IPv6-ICMP	# ICMP for IPv6
+ipv6-nonxt	59	IPv6-NoNxt	# No Next Header for IPv6
+ipv6-opts	60	IPv6-Opts	# Destination Options for IPv6
+#	61			# any host internal protocol
+cftp	62	CFTP		# CFTP
+#	63			# any local network
+sat-expak	64	SAT-EXPAK	# SATNET and Backroom EXPAK
+kryptolan	65	KRYPTOLAN	# Kryptolan
+rvd	66	RVD		# MIT Remote Virtual Disk Protocol
+ippc	67	IPPC		# Internet Pluribus Packet Core
+#	68			# any distributed file system
+sat-mon	69	SAT-MON		# SATNET Monitoring
+visa	70	VISA		# VISA Protocol
+ipcv	71	IPCV		# Internet Packet Core Utility
+cpnx	72	CPNX		# Computer Protocol Network Executive
+cphb	73	CPHB		# Computer Protocol Heart Beat
+wsn	74	WSN		# Wang Span Network
+pvp	75	PVP		# Packet Video Protocol
+br-sat-mon	76	BR-SAT-MON	# Backroom SATNET Monitoring
+sun-nd	77	SUN-ND		# SUN ND PROTOCOL-Temporary
+wb-mon	78	WB-MON		# WIDEBAND Monitoring
+wb-expak	79	WB-EXPAK	# WIDEBAND EXPAK
+iso-ip	80	ISO-IP		# ISO Internet Protocol
+vmtp	81	VMTP		# Versatile Message Transport
+secure-vmtp	82	SECURE-VMTP	# SECURE-VMTP
+vines	83	VINES		# VINES
+ttp	84	TTP		# TTP
+nsfnet-igp	85	NSFNET-IGP	# NSFNET-IGP
+dgp	86	DGP		# Dissimilar Gateway Protocol
+tcf	87	TCF		# TCF
+eigrp	88	EIGRP		# Enhanced Interior Routing Protocol (Cisco)
+ospf	89	OSPFIGP		# Open Shortest Path First IGP
+sprite-rpc	90	Sprite-RPC	# Sprite RPC Protocol
+larp	91	LARP		# Locus Address Resolution Protocol
+mtp	92	MTP		# Multicast Transport Protocol
+ax.25	93	AX.25		# AX.25 Frames
+ipip	94	IPIP		# Yet Another IP encapsulation
+micp	95	MICP		# Mobile Internetworking Control Pro.
+scc-sp	96	SCC-SP		# Semaphore Communications Sec. Pro.
+etherip	97	ETHERIP		# Ethernet-within-IP Encapsulation
+encap	98	ENCAP		# Yet Another IP encapsulation
+#	99			# any private encryption scheme
+gmtp	100	GMTP		# GMTP
+ifmp	101	IFMP		# Ipsilon Flow Management Protocol
+pnni	102	PNNI		# PNNI over IP
+pim	103	PIM		# Protocol Independent Multicast
+aris	104	ARIS		# ARIS
+scps	105	SCPS		# SCPS
+qnx	106	QNX		# QNX
+a/n	107	A/N		# Active Networks
+ipcomp	108	IPComp		# IP Payload Compression Protocol
+snp	109	SNP		# Sitara Networks Protocol
+compaq-peer	110	Compaq-Peer	# Compaq Peer Protocol
+ipx-in-ip	111	IPX-in-IP	# IPX in IP
+vrrp	112	VRRP		# Virtual Router Redundancy Protocol
+pgm	113	PGM		# PGM Reliable Transport Protocol
+#	114			# any 0-hop protocol
+l2tp	115	L2TP		# Layer Two Tunneling Protocol
+ddx	116	DDX		# D-II Data Exchange
+iatp	117	IATP		# Interactive Agent Transfer Protocol
+stp	118	STP		# Schedule Transfer
+srp	119	SRP		# SpectraLink Radio Protocol
+uti	120	UTI		# UTI
+smp	121	SMP		# Simple Message Protocol
+sm	122	SM		# SM
+ptp	123	PTP		# Performance Transparency Protocol
+isis	124	ISIS		# ISIS over IPv4
+fire	125	FIRE
+crtp	126	CRTP		# Combat Radio Transport Protocol
+crdup	127	CRUDP		# Combat Radio User Datagram
+sscopmce	128	SSCOPMCE
+iplt	129	IPLT
+sps	130	SPS		# Secure Packet Shield
+pipe	131	PIPE		# Private IP Encapsulation within IP
+sctp	132	SCTP		# Stream Control Transmission Protocol
+fc	133	FC		# Fibre Channel
+# rsvp-e2e-ignore	134	RSVP-E2E-IGNORE
+#	134-254			# Unassigned
+#	255			# Reserved
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/resolv.conf b/target/device/Atmel/atngw100-base/target_skeleton/etc/resolv.conf
new file mode 120000
index 000000000..71f6f9657
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/resolv.conf
@@ -0,0 +1 @@
+../tmp/resolv.conf
\ No newline at end of file
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/services b/target/device/Atmel/atngw100-base/target_skeleton/etc/services
new file mode 100644
index 000000000..e2ffd3df5
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/services
@@ -0,0 +1,2117 @@
+#
+# Network services, Internet style
+#
+# Note that it is presently the policy of IANA to assign a single well-known
+# port number for both TCP and UDP; hence, most entries here have two entries
+# even if the protocol doesn't support UDP operations.
+#
+# The latest IANA port assignments can be gotten from
+#
+#	http://www.iana.org/assignments/port-numbers
+#
+# The Well Known Ports are those from 0 through 1023.
+# The Registered Ports are those from 1024 through 49151
+# The Dynamic and/or Private Ports are those from 49152 through 65535
+#
+# Kerberos services are for Kerberos v4, and are unofficial.  Sites running
+# v5 should uncomment v5 entries and comment v4 entries.
+#
+# $FreeBSD: src/etc/services,v 1.102.8.1 2006/01/29 11:32:48 maxim Exp $
+#	From: @(#)services	5.8 (Berkeley) 5/9/91
+#
+# WELL KNOWN PORT NUMBERS
+#
+rtmp		  1/ddp	   #Routing Table Maintenance Protocol
+tcpmux		  1/tcp	   #TCP Port Service Multiplexer
+tcpmux		  1/udp	   #TCP Port Service Multiplexer
+nbp		  2/ddp	   #Name Binding Protocol
+compressnet	  2/tcp	   #Management Utility
+compressnet	  2/udp	   #Management Utility
+compressnet	  3/tcp	   #Compression Process
+compressnet	  3/udp	   #Compression Process
+echo		  4/ddp	   #AppleTalk Echo Protocol
+rje		  5/tcp	   #Remote Job Entry
+rje		  5/udp	   #Remote Job Entry
+zip		  6/ddp	   #Zone Information Protocol
+echo		  7/tcp
+echo		  7/udp
+discard		  9/tcp	   sink null
+discard		  9/udp	   sink null
+systat		 11/tcp	   users	#Active Users
+systat		 11/udp	   users	#Active Users
+daytime		 13/tcp
+daytime		 13/udp
+qotd		 17/tcp	   quote	#Quote of the Day
+qotd		 17/udp	   quote	#Quote of the Day
+msp		 18/tcp	   #Message Send Protocol
+msp		 18/udp	   #Message Send Protocol
+chargen		 19/tcp	   ttytst source	#Character Generator
+chargen		 19/udp	   ttytst source	#Character Generator
+ftp-data	 20/tcp	   #File Transfer [Default Data]
+ftp-data	 20/udp	   #File Transfer [Default Data]
+ftp		 21/tcp	   #File Transfer [Control]
+ftp		 21/udp	   #File Transfer [Control]
+ssh		 22/tcp	   #Secure Shell Login
+ssh		 22/udp	   #Secure Shell Login
+telnet		 23/tcp
+telnet		 23/udp
+#		 24/tcp	   any private mail system
+#		 24/udp	   any private mail system
+smtp		 25/tcp	   mail		#Simple Mail Transfer
+smtp		 25/udp	   mail		#Simple Mail Transfer
+nsw-fe		 27/tcp	   #NSW User System FE
+nsw-fe		 27/udp	   #NSW User System FE
+msg-icp		 29/tcp	   #MSG ICP
+msg-icp		 29/udp	   #MSG ICP
+msg-auth	 31/tcp	   #MSG Authentication
+msg-auth	 31/udp	   #MSG Authentication
+dsp		 33/tcp	   #Display Support Protocol
+dsp		 33/udp	   #Display Support Protocol
+#		 35/tcp	   any private printer server
+#		 35/udp	   any private printer server
+time		 37/tcp	   timserver
+time		 37/udp	   timserver
+rap		 38/tcp	   #Route Access Protocol
+rap		 38/udp	   #Route Access Protocol
+rlp		 39/tcp	   resource	#Resource Location Protocol
+rlp		 39/udp	   resource	#Resource Location Protocol
+graphics	 41/tcp
+graphics	 41/udp
+nameserver	 42/tcp	   name		#Host Name Server
+nameserver	 42/udp	   name		#Host Name Server
+nicname		 43/tcp	   whois
+nicname		 43/udp	   whois
+mpm-flags	 44/tcp	   #MPM FLAGS Protocol
+mpm-flags	 44/udp	   #MPM FLAGS Protocol
+mpm		 45/tcp	   #Message Processing Module [recv]
+mpm		 45/udp	   #Message Processing Module [recv]
+mpm-snd		 46/tcp	   #MPM [default send]
+mpm-snd		 46/udp	   #MPM [default send]
+ni-ftp		 47/tcp	   #NI FTP
+ni-ftp		 47/udp	   #NI FTP
+auditd		 48/tcp	   #Digital Audit Daemon
+auditd		 48/udp	   #Digital Audit Daemon
+tacacs		 49/tcp	   #Login Host Protocol (TACACS)
+tacacs		 49/udp	   #Login Host Protocol (TACACS)
+re-mail-ck	 50/tcp	   #Remote Mail Checking Protocol
+re-mail-ck	 50/udp	   #Remote Mail Checking Protocol
+la-maint	 51/tcp	   #IMP Logical Address Maintenance
+la-maint	 51/udp	   #IMP Logical Address Maintenance
+xns-time	 52/tcp	   #XNS Time Protocol
+xns-time	 52/udp	   #XNS Time Protocol
+domain		 53/tcp	   #Domain Name Server
+domain		 53/udp	   #Domain Name Server
+xns-ch		 54/tcp	   #XNS Clearinghouse
+xns-ch		 54/udp	   #XNS Clearinghouse
+isi-gl		 55/tcp	   #ISI Graphics Language
+isi-gl		 55/udp	   #ISI Graphics Language
+xns-auth	 56/tcp	   #XNS Authentication
+xns-auth	 56/udp	   #XNS Authentication
+mtp		 57/tcp	   # deprecated
+#PROBLEMS!==============================================================
+#		 57/tcp	   any private terminal access
+#PROBLEMS!==============================================================
+#		 57/udp	   any private terminal access
+xns-mail	 58/tcp	   #XNS Mail
+xns-mail	 58/udp	   #XNS Mail
+#		 59/tcp	   any private file service
+#		 59/udp	   any private file service
+ni-mail		 61/tcp	   #NI MAIL
+ni-mail		 61/udp	   #NI MAIL
+acas		 62/tcp	   #ACA Services
+acas		 62/udp	   #ACA Services
+whois++		 63/tcp
+whois++		 63/udp
+covia		 64/tcp	   #Communications Integrator (CI)
+covia		 64/udp	   #Communications Integrator (CI)
+tacacs-ds	 65/tcp	   #TACACS-Database Service
+tacacs-ds	 65/udp	   #TACACS-Database Service
+sql*net		 66/tcp	   #Oracle SQL*NET
+sql*net		 66/udp	   #Oracle SQL*NET
+bootps		 67/tcp	   dhcps	#Bootstrap Protocol Server
+bootps		 67/udp	   dhcps	#Bootstrap Protocol Server
+bootpc		 68/tcp	   dhcpc	#Bootstrap Protocol Client
+bootpc		 68/udp	   dhcpc	#Bootstrap Protocol Client
+tftp		 69/tcp	   #Trivial File Transfer
+tftp		 69/udp	   #Trivial File Transfer
+gopher		 70/tcp
+gopher		 70/udp
+netrjs-1	 71/tcp	   #Remote Job Service
+netrjs-1	 71/udp	   #Remote Job Service
+netrjs-2	 72/tcp	   #Remote Job Service
+netrjs-2	 72/udp	   #Remote Job Service
+netrjs-3	 73/tcp	   #Remote Job Service
+netrjs-3	 73/udp	   #Remote Job Service
+netrjs-4	 74/tcp	   #Remote Job Service
+netrjs-4	 74/udp	   #Remote Job Service
+#		 75/tcp	   any private dial out service
+#		 75/udp	   any private dial out service
+deos		 76/tcp	   #Distributed External Object Store
+deos		 76/udp	   #Distributed External Object Store
+netrjs		 77/tcp
+#PROBLEMS!==============================================================
+#		 77/tcp	   any private RJE service
+#PROBLEMS!==============================================================
+#		 77/udp	   any private RJE service
+vettcp		 78/tcp
+vettcp		 78/udp
+finger		 79/tcp
+finger		 79/udp
+http		 80/tcp	   www www-http	#World Wide Web HTTP
+http		 80/udp	   www www-http	#World Wide Web HTTP
+hosts2-ns	 81/tcp	   #HOSTS2 Name Server
+hosts2-ns	 81/udp	   #HOSTS2 Name Server
+xfer		 82/tcp	   #XFER Utility
+xfer		 82/udp	   #XFER Utility
+mit-ml-dev	 83/tcp	   #MIT ML Device
+mit-ml-dev	 83/udp	   #MIT ML Device
+ctf		 84/tcp	   #Common Trace Facility
+ctf		 84/udp	   #Common Trace Facility
+mit-ml-dev	 85/tcp	   #MIT ML Device
+mit-ml-dev	 85/udp	   #MIT ML Device
+mfcobol		 86/tcp	   #Micro Focus Cobol
+mfcobol		 86/udp	   #Micro Focus Cobol
+ttylink		 87/tcp
+#PROBLEMS!===========================================================
+#		 87/tcp	   any private terminal link
+#PROBLEMS!===========================================================
+#		 87/udp	   any private terminal link
+kerberos-sec	 88/tcp	   kerberos	# krb5	# Kerberos (v5)
+kerberos-sec	 88/udp	   kerberos	# krb5	# Kerberos (v5)
+su-mit-tg	 89/tcp	   #SU/MIT Telnet Gateway
+su-mit-tg	 89/udp	   #SU/MIT Telnet Gateway
+dnsix		 90/tcp	   #DNSIX Securit Attribute Token Map
+dnsix		 90/udp	   #DNSIX Securit Attribute Token Map
+mit-dov		 91/tcp	   #MIT Dover Spooler
+mit-dov		 91/udp	   #MIT Dover Spooler
+npp		 92/tcp	   #Network Printing Protocol
+npp		 92/udp	   #Network Printing Protocol
+dcp		 93/tcp	   #Device Control Protocol
+dcp		 93/udp	   #Device Control Protocol
+objcall		 94/tcp	   #Tivoli Object Dispatcher
+objcall		 94/udp	   #Tivoli Object Dispatcher
+supdup		 95/tcp
+supdup		 95/udp
+dixie		 96/tcp	   #DIXIE Protocol Specification
+dixie		 96/udp	   #DIXIE Protocol Specification
+swift-rvf	 97/tcp	   #Swift Remote Virtural File Protocol
+swift-rvf	 97/udp	   #Swift Remote Virtural File Protocol
+tacnews		 98/tcp	   #TAC News, Unofficial: Red Hat linuxconf
+tacnews		 98/udp	   #TAC News, Unofficial: Red Hat linuxconf
+metagram	 99/tcp	   #Metagram Relay
+metagram	 99/udp	   #Metagram Relay
+newacct		100/tcp	   #[unauthorized use]
+hostname	101/tcp	   hostnames	#NIC Host Name Server
+hostname	101/udp	   hostnames	#NIC Host Name Server
+iso-tsap	102/tcp	   tsap		#ISO-TSAP Class 0
+iso-tsap	102/udp	   tsap		#ISO-TSAP Class 0
+gppitnp		103/tcp	   #Genesis Point-to-Point Trans Net
+gppitnp		103/udp	   #Genesis Point-to-Point Trans Net
+acr-nema	104/tcp	   #ACR-NEMA Digital Imag. & Comm. 300
+acr-nema	104/udp	   #ACR-NEMA Digital Imag. & Comm. 300
+csnet-ns	105/tcp	   cso-ns cso	#Mailbox Name Nameserver
+csnet-ns	105/udp	   cso-ns cso	#Mailbox Name Nameserver
+pop3pw		106/tcp	   3com-tsmux	#Eudora compatible PW changer
+3com-tsmux	106/udp
+rtelnet		107/tcp	   #Remote Telnet Service
+rtelnet		107/udp	   #Remote Telnet Service
+snagas		108/tcp	   #SNA Gateway Access Server
+snagas		108/udp	   #SNA Gateway Access Server
+pop2		109/tcp	   postoffice	#Post Office Protocol - Version 2
+pop2		109/udp	   postoffice	#Post Office Protocol - Version 2
+pop3		110/tcp	   #Post Office Protocol - Version 3
+pop3		110/udp	   #Post Office Protocol - Version 3
+sunrpc		111/tcp	   rpcbind	#SUN Remote Procedure Call
+sunrpc		111/udp	   rpcbind	#SUN Remote Procedure Call
+mcidas		112/tcp	   #McIDAS Data Transmission Protocol
+mcidas		112/udp	   #McIDAS Data Transmission Protocol
+auth		113/tcp	   ident tap	#Authentication Service
+auth		113/udp	   ident tap	#Authentication Service
+audionews	114/tcp	   #Audio News Multicast
+audionews	114/udp	   #Audio News Multicast
+sftp		115/tcp	   #Simple File Transfer Protocol
+sftp		115/udp	   #Simple File Transfer Protocol
+ansanotify	116/tcp	   #ANSA REX Notify
+ansanotify	116/udp	   #ANSA REX Notify
+uucp-path	117/tcp	   #UUCP Path Service
+uucp-path	117/udp	   #UUCP Path Service
+sqlserv		118/tcp	   #SQL Services
+sqlserv		118/udp	   #SQL Services
+nntp		119/tcp	   usenet	#Network News Transfer Protocol
+nntp		119/udp	   usenet	#Network News Transfer Protocol
+cfdptkt		120/tcp
+cfdptkt		120/udp
+erpc		121/tcp	   #Encore Expedited Remote Pro.Call
+erpc		121/udp	   #Encore Expedited Remote Pro.Call
+smakynet	122/tcp
+smakynet	122/udp
+ntp		123/tcp	   #Network Time Protocol
+ntp		123/udp	   #Network Time Protocol
+ansatrader	124/tcp	   #ANSA REX Trader
+ansatrader	124/udp	   #ANSA REX Trader
+locus-map	125/tcp	   #Locus PC-Interface Net Map Ser
+locus-map	125/udp	   #Locus PC-Interface Net Map Ser
+unitary		126/tcp	   #Unisys Unitary Login
+unitary		126/udp	   #Unisys Unitary Login
+locus-con	127/tcp	   #Locus PC-Interface Conn Server
+locus-con	127/udp	   #Locus PC-Interface Conn Server
+gss-xlicen	128/tcp	   #GSS X License Verification
+gss-xlicen	128/udp	   #GSS X License Verification
+pwdgen		129/tcp	   #Password Generator Protocol
+pwdgen		129/udp	   #Password Generator Protocol
+cisco-fna	130/tcp	   #cisco FNATIVE
+cisco-fna	130/udp	   #cisco FNATIVE
+cisco-tna	131/tcp	   #cisco TNATIVE
+cisco-tna	131/udp	   #cisco TNATIVE
+cisco-sys	132/tcp	   #cisco SYSMAINT
+cisco-sys	132/udp	   #cisco SYSMAINT
+statsrv		133/tcp	   #Statistics Service
+statsrv		133/udp	   #Statistics Service
+ingres-net	134/tcp	   #INGRES-NET Service
+ingres-net	134/udp	   #INGRES-NET Service
+loc-srv		135/tcp	   epmap	#Location Service
+loc-srv		135/udp	   epmap	#Location Service
+profile		136/tcp	   #PROFILE Naming System
+profile		136/udp	   #PROFILE Naming System
+netbios-ns	137/tcp	   #NETBIOS Name Service
+netbios-ns	137/udp	   #NETBIOS Name Service
+netbios-dgm	138/tcp	   #NETBIOS Datagram Service
+netbios-dgm	138/udp	   #NETBIOS Datagram Service
+netbios-ssn	139/tcp	   #NETBIOS Session Service
+netbios-ssn	139/udp	   #NETBIOS Session Service
+emfis-data	140/tcp	   #EMFIS Data Service
+emfis-data	140/udp	   #EMFIS Data Service
+emfis-cntl	141/tcp	   #EMFIS Control Service
+emfis-cntl	141/udp	   #EMFIS Control Service
+bl-idm		142/tcp	   #Britton-Lee IDM
+bl-idm		142/udp	   #Britton-Lee IDM
+imap		143/tcp	   imap2 imap4	#Interim Mail Access Protocol v2
+imap		143/udp	   imap2 imap4	#Interim Mail Access Protocol v2
+NeWS		144/tcp	   # Window System
+NeWS		144/udp	   # Window System
+#PROBLEMS!==============================================================
+#uma		144/tcp	   #Universal Management Architecture
+#uma		144/udp	   #Universal Management Architecture
+#PROBLEMS!==============================================================
+uaac		145/tcp	   #UAAC Protocol
+uaac		145/udp	   #UAAC Protocol
+iso-tp0		146/tcp
+iso-tp0		146/udp
+iso-ip		147/tcp
+iso-ip		147/udp
+cronus		148/tcp	   jargon	#CRONUS-SUPPORT
+cronus		148/udp	   jargon	#CRONUS-SUPPORT
+aed-512		149/tcp	   #AED 512 Emulation Service
+aed-512		149/udp	   #AED 512 Emulation Service
+sql-net		150/tcp
+sql-net		150/udp
+hems		151/tcp
+hems		151/udp
+bftp		152/tcp	   #Background File Transfer Program
+bftp		152/udp	   #Background File Transfer Program
+sgmp		153/tcp
+sgmp		153/udp
+netsc-prod	154/tcp
+netsc-prod	154/udp
+netsc-dev	155/tcp
+netsc-dev	155/udp
+sqlsrv		156/tcp	   #SQL Service
+sqlsrv		156/udp	   #SQL Service
+knet-cmp	157/tcp	   #KNET/VM Command/Message Protocol
+knet-cmp	157/udp	   #KNET/VM Command/Message Protocol
+pcmail-srv	158/tcp	   #PCMail Server
+pcmail-srv	158/udp	   #PCMail Server
+nss-routing	159/tcp
+nss-routing	159/udp
+sgmp-traps	160/tcp
+sgmp-traps	160/udp
+snmp		161/tcp
+snmp		161/udp
+snmptrap	162/tcp	   snmp-trap
+snmptrap	162/udp	   snmp-trap
+cmip-man	163/tcp	   #CMIP/TCP Manager
+cmip-man	163/udp	   #CMIP/TCP Manager
+cmip-agent	164/tcp	   #CMIP/TCP Agent
+smip-agent	164/udp	   #CMIP/TCP Agent
+xns-courier	165/tcp	   #Xerox
+xns-courier	165/udp	   #Xerox
+s-net		166/tcp	   #Sirius Systems
+s-net		166/udp	   #Sirius Systems
+namp		167/tcp
+namp		167/udp
+rsvd		168/tcp
+rsvd		168/udp
+send		169/tcp
+send		169/udp
+print-srv	170/tcp	   #Network PostScript
+print-srv	170/udp	   #Network PostScript
+multiplex	171/tcp	   #Network Innovations Multiplex
+multiplex	171/udp	   #Network Innovations Multiplex
+cl/1		172/tcp	   #Network Innovations CL/1
+cl/1		172/udp	   #Network Innovations CL/1
+xyplex-mux	173/tcp
+xyplex-mux	173/udp
+mailq		174/tcp
+mailq		174/udp
+vmnet		175/tcp
+vmnet		175/udp
+genrad-mux	176/tcp
+genrad-mux	176/udp
+xdmcp		177/tcp	   #X Display Manager Control Protocol
+xdmcp		177/udp	   #X Display Manager Control Protocol
+NextStep	178/tcp	   nextstep NeXTStep	#NextStep Window Server
+NextStep	178/udp	   nextstep NeXTStep	#NextStep Window Server
+bgp		179/tcp	   #Border Gateway Protocol
+bgp		179/udp	   #Border Gateway Protocol
+ris		180/tcp	   #Intergraph
+ris		180/udp	   #Intergraph
+unify		181/tcp
+unify		181/udp
+audit		182/tcp	   #Unisys Audit SITP
+audit		182/udp	   #Unisys Audit SITP
+ocbinder	183/tcp
+ocbinder	183/udp
+ocserver	184/tcp
+ocserver	184/udp
+remote-kis	185/tcp
+remote-kis	185/udp
+kis		186/tcp	   #KIS Protocol
+kis		186/udp	   #KIS Protocol
+aci		187/tcp	   #Application Communication Interface
+aci		187/udp	   #Application Communication Interface
+mumps		188/tcp	   #Plus Five's MUMPS
+mumps		188/udp	   #Plus Five's MUMPS
+qft		189/tcp	   #Queued File Transport
+qft		189/udp	   #Queued File Transport
+gacp		190/tcp	   #Gateway Access Control Protocol
+gacp		190/udp	   cacp		#Gateway Access Control Protocol
+prospero	191/tcp	   #Prospero Directory Service
+prospero	191/udp	   #Prospero Directory Service
+osu-nms		192/tcp	   #OSU Network Monitoring System
+osu-nms		192/udp	   #OSU Network Monitoring System
+srmp		193/tcp	   #Spider Remote Monitoring Protocol
+srmp		193/udp	   #Spider Remote Monitoring Protocol
+irc		194/tcp	   #Internet Relay Chat Protocol
+irc		194/udp	   #Internet Relay Chat Protocol
+dn6-nlm-aud	195/tcp	   #DNSIX Network Level Module Audit
+dn6-nlm-aud	195/udp	   #DNSIX Network Level Module Audit
+dn6-smm-red	196/tcp	   #DNSIX Session Mgt Module Audit Redir
+dn6-smm-red	196/udp	   #DNSIX Session Mgt Module Audit Redir
+dls		197/tcp	   #Directory Location Service
+dls		197/udp	   #Directory Location Service
+dls-mon		198/tcp	   #Directory Location Service Monitor
+dls-mon		198/udp	   #Directory Location Service Monitor
+smux		199/tcp
+smux		199/udp
+src		200/tcp	   #IBM System Resource Controller
+src		200/udp	   #IBM System Resource Controller
+at-rtmp		201/tcp	   #AppleTalk Routing Maintenance
+at-rtmp		201/udp	   #AppleTalk Routing Maintenance
+at-nbp		202/tcp	   #AppleTalk Name Binding
+at-nbp		202/udp	   #AppleTalk Name Binding
+at-3		203/tcp	   #AppleTalk Unused
+at-3		203/udp	   #AppleTalk Unused
+at-echo		204/tcp	   #AppleTalk Echo
+at-echo		204/udp	   #AppleTalk Echo
+at-5		205/tcp	   #AppleTalk Unused
+at-5		205/udp	   #AppleTalk Unused
+at-zis		206/tcp	   #AppleTalk Zone Information
+at-zis		206/udp	   #AppleTalk Zone Information
+at-7		207/tcp	   #AppleTalk Unused
+at-7		207/udp	   #AppleTalk Unused
+at-8		208/tcp	   #AppleTalk Unused
+at-8		208/udp	   #AppleTalk Unused
+qmtp		209/tcp	   #The Quick Mail Transfer Protocol
+qmtp		209/udp	   #The Quick Mail Transfer Protocol
+#PROBLEMS!==============================================================
+#tam		209/tcp	   #Trivial Authenticated Mail Protocol
+#tam		209/udp	   #Trivial Authenticated Mail Protocol
+#PROBLEMS!==============================================================
+z39.50		210/tcp	   wais		#ANSI Z39.50
+z39.50		210/udp	   wais		#ANSI Z39.50
+914c/g		211/tcp	   #Texas Instruments 914C/G Terminal
+914c/g		211/udp	   #Texas Instruments 914C/G Terminal
+anet		212/tcp	   #ATEXSSTR
+anet		212/udp	   #ATEXSSTR
+ipx		213/tcp
+ipx		213/udp
+vmpwscs		214/tcp
+vmpwscs		214/udp
+softpc		215/tcp	   #Insignia Solutions
+softpc		215/udp	   #Insignia Solutions
+CAIlic		216/tcp	   atls		#Computer Associates Int'l License Server
+CAIlic		216/udp	   atls		#Computer Associates Int'l License Server
+dbase		217/tcp	   #dBASE Unix
+dbase		217/udp	   #dBASE Unix
+mpp		218/tcp	   #Netix Message Posting Protocol
+mpp		218/udp	   #Netix Message Posting Protocol
+uarps		219/tcp	   #Unisys ARPs
+uarps		219/udp	   #Unisys ARPs
+#imap3@220 was never used and never should have been allocated. See PR 46294.
+#imap3		220/tcp	   #Interactive Mail Access Protocol v3
+#imap3		220/udp	   #Interactive Mail Access Protocol v3
+fln-spx		221/tcp	   #Berkeley rlogind with SPX auth
+fln-spx		221/udp	   #Berkeley rlogind with SPX auth
+rsh-spx		222/tcp	   #Berkeley rshd with SPX auth
+rsh-spx		222/udp	   #Berkeley rshd with SPX auth
+cdc		223/tcp	   #Certificate Distribution Center
+cdc		223/udp	   #Certificate Distribution Center
+direct		242/tcp
+direct		242/udp
+sur-meas	243/tcp	   #Survey Measurement
+sur-meas	243/udp	   #Survey Measurement
+dayna		244/tcp
+dayna		244/udp
+link		245/tcp
+link		245/udp
+dsp3270		246/tcp	   #Display Systems Protocol
+dsp3270		246/udp	   #Display Systems Protocol
+subntbcst_tftp	247/tcp	   #subntbcst_tftp
+subntbcst_tftp	247/udp	   #subntbcst_tftp
+bhfhs		248/tcp
+bhfhs		248/udp
+#		249-255    reserved
+rap		256/tcp
+rap		256/udp
+set		257/tcp	   #secure electronic transaction
+set		257/udp	   #secure electronic transaction
+yak-chat	258/tcp	   #yak winsock personal chat
+yak-chat	258/udp	   #yak winsock personal chat
+esro-gen	259/tcp	   #efficient short remote operations
+esro-gen	259/udp	   #efficient short remote operations
+openport	260/tcp
+openport	260/udp
+nsiiops		261/tcp	   #iiop name service over tls/ssl
+nsiiops		261/udp	   #iiop name service over tls/ssl
+arcisdms	262/tcp
+arcisdms	262/udp
+hdap		263/tcp
+hdap		263/udp
+bgmp		264/tcp
+bgmp		264/udp
+#		265-279	   unassigned
+http-mgmt	280/tcp
+http-mgmt	280/udp
+personal-link	281/tcp
+personal-link	281/udp
+cableport-ax	282/tcp	   #cable port a/x
+cableport-ax	282/udp	   #cable port a/x
+#		283-307    unassigned
+novastorbakcup	308/tcp	   #novastor backup
+novastorbakcup	308/udp	   #novastor backup
+entrusttime	309/tcp
+entrusttime	309/udp
+bhmds		310/tcp
+bhmds		310/udp
+asip-webadmin	311/tcp	   #appleshare ip webadmin
+asip-webadmin	311/udp	   #appleshare ip webadmin
+vslmp		312/tcp
+vslmp		312/udp
+magenta-logic	313/tcp
+magenta-logic	313/udp
+opalis-robot	314/tcp
+opalis-robot	314/udp
+dpsi		315/tcp
+dpsi		315/udp
+decauth		316/tcp
+decauth		316/udp
+zannet		317/tcp
+zannet		317/udp
+#		318-320	   #unassigned
+pip		321/tcp
+pip		321/udp
+#		322-343	   #unassigned
+pdap		344/tcp	   #Prospero Data Access Protocol
+pdap		344/udp	   #Prospero Data Access Protocol
+pawserv		345/tcp	   #Perf Analysis Workbench
+pawserv		345/udp	   #Perf Analysis Workbench
+zserv		346/tcp	   #Zebra server
+zserv		346/udp	   #Zebra server
+fatserv		347/tcp	   #Fatmen Server
+fatserv		347/udp	   #Fatmen Server
+csi-sgwp	348/tcp	   #Cabletron Management Protocol
+csi-sgwp	348/udp	   #Cabletron Management Protocol
+mftp		349/tcp
+mftp		349/udp
+matip-type-a	350/tcp	   #MATIP Type A
+matip-type-a	350/udp
+matip-type-b	351/tcp	   #MATIP Type B
+matip-type-b	351/udp
+bhoetty		351/tcp	   #unassigned but widespread use
+bhoetty		351/udp	   #unassigned but widespread use
+dtag-ste-sb	352/tcp	   #DTAG
+dtag-ste-sb	352/udp	   #DTAG
+bhoedap4	352/tcp	   #unassigned but widespread use
+bhoedap4	352/udp	   #unassigned but widespread use
+ndsauth		353/tcp
+ndsauth		353/udp
+bh611		354/tcp
+bh611		354/udp
+datex-asn	355/tcp
+datex-asn	355/udp
+cloanto-net-1	356/tcp	   #Cloanto Net 1
+cloanto-net-1	356/udp
+bhevent		357/tcp
+bhevent		357/udp
+shrinkwrap	358/tcp
+shrinkwrap	358/udp
+tenebris_nts	359/tcp	   #Tenebris Network Trace Service
+tenebris_nts	359/udp	   #Tenebris Network Trace Service
+scoi2odialog	360/tcp
+scoi2odialog	360/udp
+semantix	361/tcp
+semantix	361/udp
+srssend		362/tcp	   #SRS Send
+srssend		362/udp	   #SRS Send
+rsvp_tunnel	363/tcp
+rsvp_tunnel	363/udp
+aurora-cmgr	364/tcp
+aurora-cmgr	364/udp
+dtk		365/tcp	   #Deception Tool Kit - Fred Cohen <fc@all.net>
+dtk		365/udp	   #Deception Tool Kit - Fred Cohen <fc@all.net>
+odmr		366/tcp
+odmr		366/udp
+mortgageware	367/tcp
+mortgageware	367/udp
+qbikgdp		368/tcp	   #QbikGDP
+qbikgdp		368/udp
+rpc2portmap	369/tcp
+rpc2portmap	369/udp
+codaauth2	370/tcp
+codaauth2	370/udp
+clearcase	371/tcp
+clearcase	371/udp
+ulistserv	372/tcp	   ulistproc	#Unix Listserv
+ulistserv	372/udp	   ulistproc	#Unix Listserv
+legent-1	373/tcp	   #Legent Corporation (now Computer Associates Intl.)
+legent-1	373/udp	   #Legent Corporation (now Computer Associates Intl.)
+legent-2	374/tcp	   #Legent Corporation (now Computer Associates Intl.)
+legent-2	374/udp	   #Legent Corporation (now Computer Associates Intl.)
+hassle		375/tcp
+hassle		375/udp
+nip		376/tcp	   #Amiga Envoy Network Inquiry Proto
+nip		376/udp	   #Amiga Envoy Network Inquiry Proto
+tnETOS		377/tcp	   #NEC Corporation
+tnETOS		377/udp	   #NEC Corporation
+dsETOS		378/tcp	   #NEC Corporation
+dsETOS		378/udp	   #NEC Corporation
+is99c		379/tcp	   #TIA/EIA/IS-99 modem client
+is99c		379/udp	   #TIA/EIA/IS-99 modem client
+is99s		380/tcp	   #TIA/EIA/IS-99 modem server
+is99s		380/udp	   #TIA/EIA/IS-99 modem server
+hp-collector	381/tcp	   #hp performance data collector
+hp-collector	381/udp	   #hp performance data collector
+hp-managed-node	382/tcp	   #hp performance data managed node
+hp-managed-node	382/udp	   #hp performance data managed node
+hp-alarm-mgr	383/tcp	   #hp performance data alarm manager
+hp-alarm-mgr	383/udp	   #hp performance data alarm manager
+arns		384/tcp	   #A Remote Network Server System
+arns		384/udp	   #A Remote Network Server System
+ibm-app		385/tcp	   #IBM Application
+ibm-app		385/udp	   #IBM Application
+asa		386/tcp	   #ASA Message Router Object Def.
+asa		386/udp	   #ASA Message Router Object Def.
+aurp		387/tcp	   #Appletalk Update-Based Routing Pro.
+aurp		387/udp	   #Appletalk Update-Based Routing Pro.
+unidata-ldm	388/tcp	   #Unidata LDM Version 4
+unidata-ldm	388/udp	   #Unidata LDM Version 4
+ldap		389/tcp	   #Lightweight Directory Access Protocol
+ldap		389/udp	   #Lightweight Directory Access Protocol
+uis		390/tcp
+uis		390/udp
+synotics-relay	391/tcp	   #SynOptics SNMP Relay Port
+synotics-relay	391/udp	   #SynOptics SNMP Relay Port
+synotics-broker	392/tcp	   #SynOptics Port Broker Port
+synotics-broker	392/udp	   #SynOptics Port Broker Port
+dis		393/tcp	   #Data Interpretation System
+dis		393/udp	   #Data Interpretation System
+embl-ndt	394/tcp	   #EMBL Nucleic Data Transfer
+embl-ndt	394/udp	   #EMBL Nucleic Data Transfer
+netcp		395/tcp	   #NETscout Control Protocol
+netcp		395/udp	   #NETscout Control Protocol
+netware-ip	396/tcp	   #Novell Netware over IP
+netware-ip	396/udp	   #Novell Netware over IP
+mptn		397/tcp	   #Multi Protocol Trans. Net.
+mptn		397/udp	   #Multi Protocol Trans. Net.
+kryptolan	398/tcp
+kryptolan	398/udp
+iso-tsap-c2	399/tcp	   #ISO-TSAP Class 2
+iso-tsap-c2	399/udp	   #ISO-TSAP Class 2
+work-sol	400/tcp	   #Workstation Solutions
+work-sol	400/udp	   #Workstation Solutions
+ups		401/tcp	   #Uninterruptible Power Supply
+ups		401/udp	   #Uninterruptible Power Supply
+genie		402/tcp	   #Genie Protocol
+genie		402/udp	   #Genie Protocol
+decap		403/tcp
+decap		403/udp
+nced		404/tcp
+nced		404/udp
+ncld		405/tcp
+ncld		405/udp
+imsp		406/tcp	   #Interactive Mail Support Protocol
+imsp		406/udp	   #Interactive Mail Support Protocol
+timbuktu	407/tcp
+timbuktu	407/udp
+prm-sm		408/tcp	   #Prospero Resource Manager Sys. Man.
+prm-sm		408/udp	   #Prospero Resource Manager Sys. Man.
+prm-nm		409/tcp	   #Prospero Resource Manager Node Man.
+prm-nm		409/udp	   #Prospero Resource Manager Node Man.
+decladebug	410/tcp	   #DECLadebug Remote Debug Protocol
+decladebug	410/udp	   #DECLadebug Remote Debug Protocol
+rmt		411/tcp	   #Remote MT Protocol
+rmt		411/udp	   #Remote MT Protocol
+synoptics-trap	412/tcp	   #Trap Convention Port
+synoptics-trap	412/udp	   #Trap Convention Port
+smsp		413/tcp
+smsp		413/udp
+infoseek	414/tcp
+infoseek	414/udp
+bnet		415/tcp
+bnet		415/udp
+silverplatter	416/tcp
+silverplatter	416/udp
+onmux		417/tcp
+onmux		417/udp
+hyper-g		418/tcp
+hyper-g		418/udp
+ariel1		419/tcp
+ariel1		419/udp
+smpte		420/tcp
+smpte		420/udp
+ariel2		421/tcp
+ariel2		421/udp
+ariel3		422/tcp
+ariel3		422/udp
+opc-job-start	423/tcp	   #IBM Operations Planning and Control Start
+opc-job-start	423/udp	   #IBM Operations Planning and Control Start
+opc-job-track	424/tcp	   #IBM Operations Planning and Control Track
+opc-job-track	424/udp	   #IBM Operations Planning and Control Track
+icad-el		425/tcp
+icad-el		425/udp
+smartsdp	426/tcp
+smartsdp	426/udp
+svrloc		427/tcp	   #Server Location
+svrloc		427/udp	   #Server Location
+ocs_cmu		428/tcp
+ocs_cmu		428/udp
+ocs_amu		429/tcp
+ocs_amu		429/udp
+utmpsd		430/tcp
+utmpsd		430/udp
+utmpcd		431/tcp
+utmpcd		431/udp
+iasd		432/tcp
+iasd		432/udp
+nnsp		433/tcp
+nnsp		433/udp
+mobileip-agent	434/tcp
+mobileip-agent	434/udp
+mobilip-mn	435/tcp
+mobilip-mn	435/udp
+dna-cml		436/tcp
+dna-cml		436/udp
+comscm		437/tcp
+comscm		437/udp
+dsfgw		438/tcp
+dsfgw		438/udp
+dasp		439/tcp
+dasp		439/udp
+sgcp		440/tcp
+sgcp		440/udp
+decvms-sysmgt	441/tcp
+decvms-sysmgt	441/udp
+cvc_hostd	442/tcp
+cvc_hostd	442/udp
+https		443/tcp
+https		443/udp
+snpp		444/tcp	   #Simple Network Paging Protocol
+snpp		444/udp	   #Simple Network Paging Protocol
+#			   [RFC1568]
+microsoft-ds	445/tcp
+microsoft-ds	445/udp
+ddm-rdb		446/tcp
+ddm-rdb		446/udp
+ddm-dfm		447/tcp
+ddm-dfm		447/udp
+ddm-ssl		448/tcp	   ddm-byte
+ddm-ssl		448/udp	   ddm-byte
+as-servermap	449/tcp	   #AS Server Mapper
+as-servermap	449/udp	   #AS Server Mapper
+tserver		450/tcp
+tserver		450/udp
+sfs-smp-net	451/tcp	   #Cray Network Semaphore server
+sfs-smp-net	451/udp	   #Cray Network Semaphore server
+sfs-config	452/tcp	   #Cray SFS config server
+sfs-config	452/udp	   #Cray SFS config server
+creativeserver	453/tcp	   #CreativeServer
+creativeserver	453/udp	   #CreativeServer
+contentserver	454/tcp	   #ContentServer
+contentserver	454/udp	   #ContentServer
+creativepartnr	455/tcp	   #CreativePartnr
+creativepartnr	455/udp	   #CreativePartnr
+macon-tcp	456/tcp
+macon-udp	456/udp
+scohelp		457/tcp
+scohelp		457/udp
+appleqtc	458/tcp	   #apple quick time
+appleqtc	458/udp	   #apple quick time
+ampr-rcmd	459/tcp
+ampr-rcmd	459/udp
+skronk		460/tcp
+skronk		460/udp
+datasurfsrv	461/tcp
+datasurfsrv	461/udp
+datasurfsrvsec	462/tcp
+datasurfsrvsec	462/udp
+alpes		463/tcp
+alpes		463/udp
+#
+kpasswd5	464/tcp	   # Kerberos (v5)
+kpasswd5	464/udp	   # Kerberos (v5)
+#PROBLEMS!==============================================================
+# IANA has offically assigned these two ports as ``kpasswd''
+#kpasswd	464/tcp    # Kerberos (v5)
+#kpasswd	464/udp    # Kerberos (v5)
+#PROBLEMS!==============================================================
+smtps		465/tcp	   #smtp protocol over TLS/SSL (was ssmtp)
+smtps		465/udp	   #smtp protocol over TLS/SSL (was ssmtp)
+digital-vrc	466/tcp
+digital-vrc	466/udp
+mylex-mapd	467/tcp
+mylex-mapd	467/udp
+photuris	468/tcp
+photuris	468/udp
+rcp		469/tcp	   #Radio Control Protocol
+rcp		469/udp	   #Radio Control Protocol
+scx-proxy	470/tcp
+scx-proxy	470/udp
+mondex		471/tcp
+mondex		471/udp
+ljk-login	472/tcp
+ljk-login	472/udp
+hybrid-pop	473/tcp
+hybrid-pop	473/udp
+tn-tl-w1	474/tcp
+tn-tl-w2	474/udp
+tcpnethaspsrv	475/tcp
+tcpnethaspsrv	475/udp
+tn-tl-fd1	476/tcp
+tn-tl-fd1	476/udp
+ss7ns		477/tcp
+ss7ns		477/udp
+spsc		478/tcp
+spsc		478/udp
+iafserver	479/tcp
+iafserver	479/udp
+iafdbase	480/tcp
+iafdbase	480/udp
+ph		481/tcp
+ph		481/udp
+bgs-nsi		482/tcp
+bgs-nsi		482/udp
+ulpnet		483/tcp
+ulpnet		483/udp
+integra-sme	484/tcp	   #Integra Software Management Environment
+integra-sme	484/udp	   #Integra Software Management Environment
+powerburst	485/tcp	   #Air Soft Power Burst
+powerburst	485/udp	   #Air Soft Power Burst
+avian		486/tcp
+avian		486/udp
+saft		487/tcp	   #saft Simple Asynchronous File Transfer
+saft		487/udp	   #saft Simple Asynchronous File Transfer
+gss-http	488/tcp
+gss-http	488/udp
+nest-protocol	489/tcp
+nest-protocol	489/udp
+micom-pfs	490/tcp
+micom-pfs	490/udp
+go-login	491/tcp
+go-login	491/udp
+ticf-1		492/tcp	   #Transport Independent Convergence for FNA
+ticf-1		492/udp	   #Transport Independent Convergence for FNA
+ticf-2		493/tcp	   #Transport Independent Convergence for FNA
+ticf-2		493/udp	   #Transport Independent Convergence for FNA
+pov-ray		494/tcp
+pov-ray		494/udp
+intecourier	495/tcp
+intecourier	495/udp
+pim-rp-disc	496/tcp
+pim-rp-disc	496/udp
+dantz		497/tcp
+dantz		497/udp
+siam		498/tcp
+siam		498/udp
+iso-ill		499/tcp	   #ISO ILL Protocol
+iso-ill		499/udp	   #ISO ILL Protocol
+isakmp		500/tcp
+isakmp		500/udp
+stmf		501/tcp
+stmf		501/udp
+asa-appl-proto	502/tcp
+asa-appl-proto	502/udp
+intrinsa	503/tcp
+intrinsa	503/udp
+citadel		504/tcp
+citadel		504/udp
+mailbox-lm	505/tcp
+mailbox-lm	505/udp
+ohimsrv		506/tcp
+ohimsrv		506/udp
+crs		507/tcp
+crs		507/udp
+xvttp		508/tcp
+xvttp		508/udp
+snare		509/tcp
+snare		509/udp
+fcp		510/tcp	   #FirstClass Protocol
+fcp		510/udp	   #FirstClass Protocol
+passgo		511/tcp
+passgo		511/udp
+#
+# Berkeley-specific services
+#
+exec		512/tcp	   #remote process execution;
+#			   authentication performed using
+#			   passwords and UNIX login names
+biff		512/udp	   comsat	#used by mail system to notify users
+#					of new mail received; currently
+#					receives messages only from
+#					processes on the same machine
+login		513/tcp	   #remote login a la telnet;
+#			   automatic authentication performed
+#			   based on priviledged port numbers
+#			   and distributed data bases which
+#			   identify "authentication domains"
+who		513/udp	   whod		#maintains data bases showing who's
+#					logged in to machines on a local
+#					net and the load average of the
+#					machine
+shell		514/tcp	   cmd		#like exec, but automatic
+#					authentication is performed as for
+#					login server
+syslog		514/udp
+printer		515/tcp	   spooler
+printer		515/udp	   spooler
+videotex	516/tcp
+videotex	516/udp
+talk		517/tcp	   #like tenex link, but across
+#			   machine - unfortunately, doesn't
+#			   use link protocol (this is actually
+#			   just a rendezvous port from which a
+#			   tcp connection is established)
+talk		517/udp	   #like tenex link, but across
+#			   machine - unfortunately, doesn't
+#			   use link protocol (this is actually
+#			   just a rendezvous port from which a
+#			   tcp connection is established)
+ntalk		518/tcp
+ntalk		518/udp
+utime		519/tcp	   unixtime
+utime		519/udp	   unixtime
+efs		520/tcp	   #extended file name server
+router		520/udp	   route routed	#local routing process (on site);
+#					   uses variant of Xerox NS routing
+#					   information protocol
+ripng		521/tcp
+ripng		521/udp
+ulp		522/tcp
+ulp		522/udp
+ibm-db2		523/tcp
+ibm-db2		523/udp
+ncp		524/tcp
+ncp		524/udp
+timed		525/tcp	   timeserver
+timed		525/udp	   timeserver
+tempo		526/tcp	   newdate
+tempo		526/udp	   newdate
+stx		527/tcp	   #Stock IXChange
+stx		527/udp	   #Stock IXChange
+custix		528/tcp	   #Customer IXChange
+custix		528/udp	   #Customer IXChange
+irc-serv	529/tcp
+irc-serv	529/udp
+courier		530/tcp	   rpc
+courier		530/udp	   rpc
+conference	531/tcp	   chat
+conference	531/udp	   chat
+netnews		532/tcp	   readnews
+netnews		532/udp	   readnews
+netwall		533/tcp	   #for emergency broadcasts
+netwall		533/udp	   #for emergency broadcasts
+mm-admin	534/tcp	   #MegaMedia Admin
+mm-admin	534/udp	   #MegaMedia Admin
+iiop		535/tcp
+iiop		535/udp
+opalis-rdv	536/tcp
+opalis-rdv	536/udp
+nmsp		537/tcp	   #Networked Media Streaming Protocol
+nmsp		537/udp	   #Networked Media Streaming Protocol
+gdomap		538/tcp
+gdomap		538/udp
+apertus-ldp	539/tcp	   #Apertus Technologies Load Determination
+apertus-ldp	539/udp	   #Apertus Technologies Load Determination
+uucp		540/tcp	   uucpd
+uucp		540/udp	   uucpd
+uucp-rlogin	541/tcp
+uucp-rlogin	541/udp
+commerce	542/tcp
+commerce	542/udp
+klogin		543/tcp	   # Kerberos (v4/v5)
+klogin		543/udp	   # Kerberos (v4/v5)
+kshell		544/tcp	   krcmd	# Kerberos (v4/v5)
+kshell		544/udp	   krcmd	# Kerberos (v4/v5)
+appleqtcsrvr	545/tcp
+appleqtcsrvr	545/udp
+dhcpv6-client	546/tcp	   #DHCPv6 Client
+dhcpv6-client	546/udp	   #DHCPv6 Client
+dhcpv6-server	547/tcp	   #DHCPv6 Server
+dhcpv6-server	547/udp	   #DHCPv6 Server
+afpovertcp	548/tcp	   #AFP over TCP
+afpovertcp	548/udp	   #AFP over TCP
+idfp		549/tcp
+idfp		549/udp
+new-rwho	550/tcp	   new-who
+new-rwho	550/udp	   new-who
+cybercash	551/tcp
+cybercash	551/udp
+deviceshare	552/tcp
+deviceshare	552/udp
+pirp		553/tcp
+pirp		553/udp
+rtsp		554/tcp	   #Real Time Stream Control Protocol
+rtsp		554/udp	   #Real Time Stream Control Protocol
+dsf		555/tcp
+dsf		555/udp
+remotefs	556/tcp	   rfs rfs_server	# Brunhoff remote filesystem
+remotefs	556/udp	   rfs rfs_server	# Brunhoff remote filesystem
+openvms-sysipc	557/tcp
+openvms-sysipc	557/udp
+sdnskmp		558/tcp
+sdnskmp		558/udp
+teedtap		559/tcp
+teedtap		559/udp
+rmonitor	560/tcp	   rmonitord
+rmonitor	560/udp	   rmonitord
+monitor		561/tcp
+monitor		561/udp
+chshell		562/tcp	   chcmd
+chshell		562/udp	   chcmd
+nntps		563/tcp	   snntp	#nntp protocol over TLS/SSL
+nntps		563/udp	   snntp	#nntp protocol over TLS/SSL
+9pfs		564/tcp	   #plan 9 file service
+9pfs		564/udp	   #plan 9 file service
+whoami		565/tcp
+whoami		565/udp
+streettalk	566/tcp
+banyan-rpc	567/tcp
+banyan-rpc	567/udp
+ms-shuttle	568/tcp	   #Microsoft shuttle
+ms-shuttle	568/udp	   #Microsoft shuttle
+ms-rome		569/tcp	   #Microsoft rome
+ms-rome		569/udp	   #Microsoft rome
+meter		570/tcp	   #demon
+meter		570/udp	   #demon
+umeter		571/tcp	   #udemon
+umeter		571/udp	   #udemon
+sonar		572/tcp
+sonar		572/udp
+banyan-vip	573/tcp
+banyan-vip	573/udp
+ftp-agent	574/tcp	   #FTP Software Agent System
+ftp-agent	574/udp	   #FTP Software Agent System
+vemmi		575/tcp
+vemmi		575/udp
+ipcd		576/tcp
+ipcd		576/udp
+vnas		577/tcp
+vnas		577/udp
+ipdd		578/tcp
+ipdd		578/udp
+decbsrv		579/tcp
+decbsrv		579/udp
+sntp-heartbeat	580/tcp
+sntp-heartbeat	580/udp
+bdp		581/tcp	   #Bundle Discovery Protocol
+bdp		581/udp	   #Bundle Discovery Protocol
+scc-security	582/tcp
+scc-security	582/udp
+philips-vc	583/tcp	   #Philips Video-Conferencing
+philips-vc	583/udp	   #Philips Video-Conferencing
+keyserver	584/tcp
+keyserver	584/udp
+#imap4-ssl@585 never should have been allocated. See PR 46294.
+#imap4-ssl	585/tcp	   #IMAP4+SSL (use of 585 is not recommended,
+#imap4-ssl	585/udp	   #		use 993 instead)
+password-chg	586/tcp
+password-chg	586/udp
+submission	587/tcp
+submission	587/udp
+cal		588/tcp
+cal		588/udp
+eyelink		589/tcp
+eyelink		589/udp
+tns-cml		590/tcp
+tns-cml		590/udp
+http-alt	591/tcp	   #FileMaker, Inc. - HTTP Alternate (see Port 80)
+http-alt	591/udp	   #FileMaker, Inc. - HTTP Alternate (see Port 80)
+eudora-set	592/tcp
+eudora-set	592/udp
+http-rpc-epmap	593/tcp	   #HTTP RPC Ep Map
+http-rpc-epmap	593/udp	   #HTTP RPC Ep Map
+tpip		594/tcp
+tpip		594/udp
+cab-protocol	595/tcp
+cab-protocol	595/udp
+smsd		596/tcp
+smsd		596/udp
+ptcnameservice	597/tcp	   #PTC Name Service
+ptcnameservice	597/udp	   #PTC Name Service
+sco-websrvrmg3	598/tcp	   #SCO Web Server Manager 3
+sco-websrvrmg3	598/udp	   #SCO Web Server Manager 3
+acp		599/tcp	   #Aeolon Core Protocol
+acp		599/udp	   #Aeolon Core Protocol
+ipcserver	600/tcp	   #Sun IPC server
+ipcserver	600/udp	   #Sun IPC server
+urm		606/tcp	   #Cray Unified Resource Manager
+urm		606/udp	   #Cray Unified Resource Manager
+nqs		607/tcp
+nqs		607/udp
+sift-uft	608/tcp	   #Sender-Initiated/Unsolicited File Transfer
+sift-uft	608/udp	   #Sender-Initiated/Unsolicited File Transfer
+npmp-trap	609/tcp
+npmp-trap	609/udp
+npmp-local	610/tcp
+npmp-local	610/udp
+npmp-gui	611/tcp
+npmp-gui	611/udp
+sshell		614/tcp	   #SSLshell
+sshell		614/udp
+ipp		631/tcp	   #IPP (Internet Printing Protocol)
+ipp		631/udp	   #IPP (Internet Printing Protocol)
+ginad		634/tcp
+ginad		634/udp
+ldaps		636/tcp	   sldap	#ldap protocol over TLS/SSL
+ldaps		636/udp	   sldap
+aodv		654/tcp	   #Ad-Hoc On-Demand Distance Vector Routing Protocol
+aodv		654/udp	   #Ad-Hoc On-Demand Distance Vector Routing Protocol
+mdqs		666/tcp
+mdqs		666/udp
+#PROBLEMS!===============================================
+doom		666/tcp	   #doom Id Software
+doom		666/udp	   #doom Id Software
+#PROBLEMS!===============================================
+acap		674/tcp	   #Application Configuration Access Protocol
+acap		674/udp	   #Application Configuration Access Protocol
+elcsd		704/tcp	   #errlog copy/server daemon
+elcsd		704/udp	   #errlog copy/server daemon
+entrustmanager	709/tcp	   #EntrustManager
+entrustmanager	709/udp	   #EntrustManager
+netviewdm1	729/tcp	   #IBM NetView DM/6000 Server/Client
+netviewdm1	729/udp	   #IBM NetView DM/6000 Server/Client
+netviewdm2	730/tcp	   #IBM NetView DM/6000 send/tcp
+netviewdm2	730/udp	   #IBM NetView DM/6000 send/tcp
+netviewdm3	731/tcp	   #IBM NetView DM/6000 receive/tcp
+netviewdm3	731/udp	   #IBM NetView DM/6000 receive/tcp
+netgw		741/tcp
+netgw		741/udp
+netrcs		742/tcp	   #Network based Rev. Cont. Sys.
+netrcs		742/udp	   #Network based Rev. Cont. Sys.
+flexlm		744/tcp	   #Flexible License Manager
+flexlm		744/udp	   #Flexible License Manager
+fujitsu-dev	747/tcp	   #Fujitsu Device Control
+fujitsu-dev	747/udp	   #Fujitsu Device Control
+ris-cm		748/tcp	   #Russell Info Sci Calendar Manager
+ris-cm		748/udp	   #Russell Info Sci Calendar Manager
+kerberos-adm	749/tcp	   #Kerberos administration (v5)
+kerberos-adm	749/udp	   #Kerberos administration (v5)
+kerberos-iv	750/udp	   kdc		# Kerberos (v4)
+kerberos-iv	750/tcp	   kdc		# Kerberos (v4)
+#PROBLEMS!========================================================
+#rfile		750/tcp
+#loadav		750/udp
+#PROBLEMS!========================================================
+kerberos_master	751/tcp	   # Kerberos `kadmin' (v4)
+kerberos_master	751/udp	   # Kerberos `kadmin' (v4)
+#PROBLEMS!========================================================
+pump		751/tcp
+pump		751/udp
+#PROBLEMS!========================================================
+qrh		752/tcp
+qrh		752/udp
+rrh		753/tcp
+rrh		753/udp
+krb_prop	754/tcp	   krb5_prop	# kerberos/v5 server propagation
+#PROBLEMS!========================================================
+tell		754/tcp	   #send
+#PROBLEMS!========================================================
+tell		754/udp	   #send
+nlogin		758/tcp
+nlogin		758/udp
+con		759/tcp
+con		759/udp
+krbupdate	760/tcp	   kreg		# Kerberos (v4) registration
+#PROBLEMS!========================================================
+ns		760/tcp
+#PROBLEMS!========================================================
+ns		760/udp
+kpasswd		761/tcp	   kpwd		# Kerberos (v4) "passwd"
+#PROBLEMS!========================================================
+rxe		761/tcp
+#PROBLEMS!========================================================
+rxe		761/udp
+quotad		762/tcp
+quotad		762/udp
+cycleserv	763/tcp
+cycleserv	763/udp
+omserv		764/tcp
+omserv		764/udp
+webster		765/tcp
+webster		765/udp
+phonebook	767/tcp	   #phone
+phonebook	767/udp	   #phone
+vid		769/tcp
+vid		769/udp
+cadlock		770/tcp
+cadlock		770/udp
+rtip		771/tcp
+rtip		771/udp
+cycleserv2	772/tcp
+cycleserv2	772/udp
+submit		773/tcp
+notify		773/udp
+rpasswd		774/tcp
+acmaint_dbd	774/udp
+entomb		775/tcp
+acmaint_transd	775/udp
+wpages		776/tcp
+wpages		776/udp
+wpgs		780/tcp
+wpgs		780/udp
+concert		786/tcp
+concert		786/udp
+mdbs_daemon	800/tcp
+mdbs_daemon	800/udp
+device		801/tcp
+device		801/udp
+supfilesrv	871/tcp	   # for SUP
+rsync		873/tcp
+rsync		873/udp
+accessbuilder	888/tcp
+accessbuilder	888/udp
+swat		901/tcp	   # samba web configuration tool
+rndc		953/tcp	   # named's rndc control socket
+ftps-data	989/tcp	   # ftp protocol, data, over TLS/SSL
+ftps-data	989/udp
+ftps		990/tcp	   # ftp protocol, control, over TLS/SSL
+ftps		990/udp
+telnets		992/tcp	   # telnet protocol over TLS/SSL
+telnets		992/udp
+imaps		993/tcp	   # imap4 protocol over TLS/SSL
+imaps		993/udp
+ircs		994/tcp	   # irc protocol over TLS/SSL
+ircs		994/udp
+pop3s		995/tcp	   spop3	# pop3 protocol over TLS/SSL
+pop3s		995/udp	   spop3
+vsinet		996/tcp
+vsinet		996/udp
+maitrd		997/tcp
+maitrd		997/udp
+busboy		998/tcp
+puparp		998/udp
+garcon		999/tcp
+applix		999/udp	   #Applix ac
+puprouter	999/tcp
+puprouter	999/udp
+cadlock2	1000/tcp
+cadlock2	1000/udp
+#
+# REGISTERED PORT NUMBERS
+#
+blackjack	1025/tcp   #network blackjack
+blackjack	1025/udp   #network blackjack
+iad1		1030/tcp   #BBN IAD
+iad1		1030/udp   #BBN IAD
+iad2		1031/tcp   #BBN IAD
+iad2		1031/udp   #BBN IAD
+iad3		1032/tcp   #BBN IAD
+iad3		1032/udp   #BBN IAD
+nim		1058/tcp
+nim		1058/udp
+nimreg		1059/tcp
+nimreg		1059/udp
+instl_boots	1067/tcp   #Installation Bootstrap Proto. Serv.
+instl_boots	1067/udp   #Installation Bootstrap Proto. Serv.
+instl_bootc	1068/tcp   #Installation Bootstrap Proto. Cli.
+instl_bootc	1068/udp   #Installation Bootstrap Proto. Cli.
+socks		1080/tcp
+socks		1080/udp
+ansoft-lm-1	1083/tcp   #Anasoft License Manager
+ansoft-lm-1	1083/udp   #Anasoft License Manager
+ansoft-lm-2	1084/tcp   #Anasoft License Manager
+ansoft-lm-2	1084/udp   #Anasoft License Manager
+webobjects	1085/tcp   #Web Objects
+webobjects	1085/udp   #Web Objects
+kpop		1109/tcp   #Unofficial
+kpop		1109/udp   #Unofficial
+nfsd-status	1110/tcp   #Cluster status info
+nfsd-keepalive	1110/udp   #Client status info
+supfiledbg	1127/tcp   # for SUP
+nfa		1155/tcp   #Network File Access
+nfa		1155/udp   #Network File Access
+phone		1167/udp   #conference calling
+skkserv		1178/tcp   #SKK (kanji input)
+lupa		1212/tcp
+lupa		1212/udp
+nerv		1222/tcp   #SNI R&D network
+nerv		1222/udp   #SNI R&D network
+hermes		1248/tcp
+hermes		1248/udp
+healthd		1281/tcp   #healthd
+healthd		1281/udp   #healthd
+alta-ana-lm	1346/tcp   #Alta Analytics License Manager
+alta-ana-lm	1346/udp   #Alta Analytics License Manager
+bbn-mmc		1347/tcp   #multi media conferencing
+bbn-mmc		1347/udp   #multi media conferencing
+bbn-mmx		1348/tcp   #multi media conferencing
+bbn-mmx		1348/udp   #multi media conferencing
+sbook		1349/tcp   #Registration Network Protocol
+sbook		1349/udp   #Registration Network Protocol
+editbench	1350/tcp   #Registration Network Protocol
+editbench	1350/udp   #Registration Network Protocol
+equationbuilder	1351/tcp   #Digital Tool Works (MIT)
+equationbuilder	1351/udp   #Digital Tool Works (MIT)
+lotusnote	1352/tcp   #Lotus Note
+lotusnote	1352/udp   #Lotus Note
+relief		1353/tcp   #Relief Consulting
+relief		1353/udp   #Relief Consulting
+rightbrain	1354/tcp   #RightBrain Software
+rightbrain	1354/udp   #RightBrain Software
+intuitive-edge	1355/tcp   #Intuitive Edge
+intuitive-edge	1355/udp   #Intuitive Edge
+cuillamartin	1356/tcp   #CuillaMartin Company
+cuillamartin	1356/udp   #CuillaMartin Company
+pegboard	1357/tcp   #Electronic PegBoard
+pegboard	1357/udp   #Electronic PegBoard
+connlcli	1358/tcp
+connlcli	1358/udp
+ftsrv		1359/tcp
+ftsrv		1359/udp
+mimer		1360/tcp
+mimer		1360/udp
+linx		1361/tcp
+linx		1361/udp
+timeflies	1362/tcp
+timeflies	1362/udp
+ndm-requester	1363/tcp   #Network DataMover Requester
+ndm-requester	1363/udp   #Network DataMover Requester
+ndm-server	1364/tcp   #Network DataMover Server
+ndm-server	1364/udp   #Network DataMover Server
+adapt-sna	1365/tcp   #Network Software Associates
+adapt-sna	1365/udp   #Network Software Associates
+netware-csp	1366/tcp   #Novell NetWare Comm Service Platform
+netware-csp	1366/udp   #Novell NetWare Comm Service Platform
+dcs		1367/tcp
+dcs		1367/udp
+screencast	1368/tcp
+screencast	1368/udp
+gv-us		1369/tcp   #GlobalView to Unix Shell
+gv-us		1369/udp   #GlobalView to Unix Shell
+us-gv		1370/tcp   #Unix Shell to GlobalView
+us-gv		1370/udp   #Unix Shell to GlobalView
+fc-cli		1371/tcp   #Fujitsu Config Protocol
+fc-cli		1371/udp   #Fujitsu Config Protocol
+fc-ser		1372/tcp   #Fujitsu Config Protocol
+fc-ser		1372/udp   #Fujitsu Config Protocol
+chromagrafx	1373/tcp
+chromagrafx	1373/udp
+molly		1374/tcp   #EPI Software Systems
+molly		1374/udp   #EPI Software Systems
+bytex		1375/tcp
+bytex		1375/udp
+ibm-pps		1376/tcp   #IBM Person to Person Software
+ibm-pps		1376/udp   #IBM Person to Person Software
+cichlid		1377/tcp   #Cichlid License Manager
+cichlid		1377/udp   #Cichlid License Manager
+elan		1378/tcp   #Elan License Manager
+elan		1378/udp   #Elan License Manager
+dbreporter	1379/tcp   #Integrity Solutions
+dbreporter	1379/udp   #Integrity Solutions
+telesis-licman	1380/tcp   #Telesis Network License Manager
+telesis-licman	1380/udp   #Telesis Network License Manager
+apple-licman	1381/tcp   #Apple Network License Manager
+apple-licman	1381/udp   #Apple Network License Manager
+#udt_os		1382/tcp
+#udt_os		1382/udp
+gwha		1383/tcp   #GW Hannaway Network License Manager
+gwha		1383/udp   #GW Hannaway Network License Manager
+os-licman	1384/tcp   #Objective Solutions License Manager
+os-licman	1384/udp   #Objective Solutions License Manager
+atex_elmd	1385/tcp   #Atex Publishing License Manager
+atex_elmd	1385/udp   #Atex Publishing License Manager
+checksum	1386/tcp   #CheckSum License Manager
+checksum	1386/udp   #CheckSum License Manager
+cadsi-lm	1387/tcp   #Computer Aided Design Software Inc LM
+cadsi-lm	1387/udp   #Computer Aided Design Software Inc LM
+objective-dbc	1388/tcp   #Objective Solutions DataBase Cache
+objective-dbc	1388/udp   #Objective Solutions DataBase Cache
+iclpv-dm	1389/tcp   #Document Manager
+iclpv-dm	1389/udp   #Document Manager
+iclpv-sc	1390/tcp   #Storage Controller
+iclpv-sc	1390/udp   #Storage Controller
+iclpv-sas	1391/tcp   #Storage Access Server
+iclpv-sas	1391/udp   #Storage Access Server
+iclpv-pm	1392/tcp   #Print Manager
+iclpv-pm	1392/udp   #Print Manager
+iclpv-nls	1393/tcp   #Network Log Server
+iclpv-nls	1393/udp   #Network Log Server
+iclpv-nlc	1394/tcp   #Network Log Client
+iclpv-nlc	1394/udp   #Network Log Client
+iclpv-wsm	1395/tcp   #PC Workstation Manager software
+iclpv-wsm	1395/udp   #PC Workstation Manager software
+dvl-activemail	1396/tcp   #DVL Active Mail
+dvl-activemail	1396/udp   #DVL Active Mail
+audio-activmail	1397/tcp   #Audio Active Mail
+audio-activmail	1397/udp   #Audio Active Mail
+video-activmail	1398/tcp   #Video Active Mail
+video-activmail	1398/udp   #Video Active Mail
+cadkey-licman	1399/tcp   #Cadkey License Manager
+cadkey-licman	1399/udp   #Cadkey License Manager
+cadkey-tablet	1400/tcp   #Cadkey Tablet Daemon
+cadkey-tablet	1400/udp   #Cadkey Tablet Daemon
+goldleaf-licman	1401/tcp   #Goldleaf License Manager
+goldleaf-licman	1401/udp   #Goldleaf License Manager
+prm-sm-np	1402/tcp   #Prospero Resource Manager
+prm-sm-np	1402/udp   #Prospero Resource Manager
+prm-nm-np	1403/tcp   #Prospero Resource Manager
+prm-nm-np	1403/udp   #Prospero Resource Manager
+igi-lm		1404/tcp   #Infinite Graphics License Manager
+igi-lm		1404/udp   #Infinite Graphics License Manager
+ibm-res		1405/tcp   #IBM Remote Execution Starter
+ibm-res		1405/udp   #IBM Remote Execution Starter
+netlabs-lm	1406/tcp   #NetLabs License Manager
+netlabs-lm	1406/udp   #NetLabs License Manager
+dbsa-lm		1407/tcp   #DBSA License Manager
+dbsa-lm		1407/udp   #DBSA License Manager
+sophia-lm	1408/tcp   #Sophia License Manager
+sophia-lm	1408/udp   #Sophia License Manager
+here-lm		1409/tcp   #Here License Manager
+here-lm		1409/udp   #Here License Manager
+hiq		1410/tcp   #HiQ License Manager
+hiq		1410/udp   #HiQ License Manager
+af		1411/tcp   #AudioFile
+af		1411/udp   #AudioFile
+innosys		1412/tcp
+innosys		1412/udp
+innosys-acl	1413/tcp
+innosys-acl	1413/udp
+ibm-mqseries	1414/tcp   #IBM MQSeries
+ibm-mqseries	1414/udp   #IBM MQSeries
+dbstar		1415/tcp
+dbstar		1415/udp
+novell-lu6.2	1416/tcp   #Novell LU6.2
+novell-lu6.2	1416/udp   #Novell LU6.2
+timbuktu-srv1	1417/tcp   #Timbuktu Service 1 Port
+timbuktu-srv1	1417/udp   #Timbuktu Service 1 Port
+timbuktu-srv2	1418/tcp   #Timbuktu Service 2 Port
+timbuktu-srv2	1418/udp   #Timbuktu Service 2 Port
+timbuktu-srv3	1419/tcp   #Timbuktu Service 3 Port
+timbuktu-srv3	1419/udp   #Timbuktu Service 3 Port
+timbuktu-srv4	1420/tcp   #Timbuktu Service 4 Port
+timbuktu-srv4	1420/udp   #Timbuktu Service 4 Port
+gandalf-lm	1421/tcp   #Gandalf License Manager
+gandalf-lm	1421/udp   #Gandalf License Manager
+autodesk-lm	1422/tcp   #Autodesk License Manager
+autodesk-lm	1422/udp   #Autodesk License Manager
+essbase		1423/tcp   #Essbase Arbor Software
+essbase		1423/udp   #Essbase Arbor Software
+hybrid		1424/tcp   #Hybrid Encryption Protocol
+hybrid		1424/udp   #Hybrid Encryption Protocol
+zion-lm		1425/tcp   #Zion Software License Manager
+zion-lm		1425/udp   #Zion Software License Manager
+sas-1		1426/tcp   #Satellite-data Acquisition System 1
+sas-1		1426/udp   #Satellite-data Acquisition System 1
+mloadd		1427/tcp   #mloadd monitoring tool
+mloadd		1427/udp   #mloadd monitoring tool
+informatik-lm	1428/tcp   #Informatik License Manager
+informatik-lm	1428/udp   #Informatik License Manager
+nms		1429/tcp   #Hypercom NMS
+nms		1429/udp   #Hypercom NMS
+tpdu		1430/tcp   #Hypercom TPDU
+tpdu		1430/udp   #Hypercom TPDU
+rgtp		1431/tcp   #Reverse Gossip Transport
+rgtp		1431/udp   #Reverse Gossip Transport
+blueberry-lm	1432/tcp   #Blueberry Software License Manager
+blueberry-lm	1432/udp   #Blueberry Software License Manager
+ms-sql-s	1433/tcp   #Microsoft-SQL-Server
+ms-sql-s	1433/udp   #Microsoft-SQL-Server
+ms-sql-m	1434/tcp   #Microsoft-SQL-Monitor
+ms-sql-m	1434/udp   #Microsoft-SQL-Monitor
+ibm-cics	1435/tcp
+ibm-cics	1435/udp
+sas-2		1436/tcp   #Satellite-data Acquisition System 2
+sas-2		1436/udp   #Satellite-data Acquisition System 2
+tabula		1437/tcp
+tabula		1437/udp
+eicon-server	1438/tcp   #Eicon Security Agent/Server
+eicon-server	1438/udp   #Eicon Security Agent/Server
+eicon-x25	1439/tcp   #Eicon X25/SNA Gateway
+eicon-x25	1439/udp   #Eicon X25/SNA Gateway
+eicon-slp	1440/tcp   #Eicon Service Location Protocol
+eicon-slp	1440/udp   #Eicon Service Location Protocol
+cadis-1		1441/tcp   #Cadis License Management
+cadis-1		1441/udp   #Cadis License Management
+cadis-2		1442/tcp   #Cadis License Management
+cadis-2		1442/udp   #Cadis License Management
+ies-lm		1443/tcp   #Integrated Engineering Software
+ies-lm		1443/udp   #Integrated Engineering Software
+marcam-lm	1444/tcp   #Marcam  License Management
+marcam-lm	1444/udp   #Marcam  License Management
+proxima-lm	1445/tcp   #Proxima License Manager
+proxima-lm	1445/udp   #Proxima License Manager
+ora-lm		1446/tcp   #Optical Research Associates License Manager
+ora-lm		1446/udp   #Optical Research Associates License Manager
+apri-lm		1447/tcp   #Applied Parallel Research LM
+apri-lm		1447/udp   #Applied Parallel Research LM
+oc-lm		1448/tcp   #OpenConnect License Manager
+oc-lm		1448/udp   #OpenConnect License Manager
+peport		1449/tcp
+peport		1449/udp
+dwf		1450/tcp   #Tandem Distributed Workbench Facility
+dwf		1450/udp   #Tandem Distributed Workbench Facility
+infoman		1451/tcp   #IBM Information Management
+infoman		1451/udp   #IBM Information Management
+gtegsc-lm	1452/tcp   #GTE Government Systems License Man
+gtegsc-lm	1452/udp   #GTE Government Systems License Man
+genie-lm	1453/tcp   #Genie License Manager
+genie-lm	1453/udp   #Genie License Manager
+interhdl_elmd	1454/tcp   #interHDL License Manager
+interhdl_elmd	1454/udp   #interHDL License Manager
+esl-lm		1455/tcp   #ESL License Manager
+esl-lm		1455/udp   #ESL License Manager
+dca		1456/tcp
+dca		1456/udp
+valisys-lm	1457/tcp   #Valisys License Manager
+valisys-lm	1457/udp   #Valisys License Manager
+nrcabq-lm	1458/tcp   #Nichols Research Corp.
+nrcabq-lm	1458/udp   #Nichols Research Corp.
+proshare1	1459/tcp   #Proshare Notebook Application
+proshare1	1459/udp   #Proshare Notebook Application
+proshare2	1460/tcp   #Proshare Notebook Application
+proshare2	1460/udp   #Proshare Notebook Application
+ibm_wrless_lan	1461/tcp   #IBM Wireless LAN
+ibm_wrless_lan	1461/udp   #IBM Wireless LAN
+world-lm	1462/tcp   #World License Manager
+world-lm	1462/udp   #World License Manager
+nucleus		1463/tcp
+nucleus		1463/udp
+msl_lmd		1464/tcp   #MSL License Manager
+msl_lmd		1464/udp   #MSL License Manager
+pipes		1465/tcp   #Pipes Platform
+pipes		1465/udp   #Pipes Platform  mfarlin@peerlogic.com
+oceansoft-lm	1466/tcp   #Ocean Software License Manager
+oceansoft-lm	1466/udp   #Ocean Software License Manager
+csdmbase	1467/tcp
+csdmbase	1467/udp
+csdm		1468/tcp
+csdm		1468/udp
+aal-lm		1469/tcp   #Active Analysis Limited License Manager
+aal-lm		1469/udp   #Active Analysis Limited License Manager
+uaiact		1470/tcp   #Universal Analytics
+uaiact		1470/udp   #Universal Analytics
+csdmbase	1471/tcp
+csdmbase	1471/udp
+csdm		1472/tcp
+csdm		1472/udp
+openmath	1473/tcp
+openmath	1473/udp
+telefinder	1474/tcp
+telefinder	1474/udp
+taligent-lm	1475/tcp   #Taligent License Manager
+taligent-lm	1475/udp   #Taligent License Manager
+clvm-cfg	1476/tcp
+clvm-cfg	1476/udp
+ms-sna-server	1477/tcp
+ms-sna-server	1477/udp
+ms-sna-base	1478/tcp
+ms-sna-base	1478/udp
+dberegister	1479/tcp
+dberegister	1479/udp
+pacerforum	1480/tcp
+pacerforum	1480/udp
+airs		1481/tcp
+airs		1481/udp
+miteksys-lm	1482/tcp   #Miteksys License Manager
+miteksys-lm	1482/udp   #Miteksys License Manager
+afs		1483/tcp   #AFS License Manager
+afs		1483/udp   #AFS License Manager
+confluent	1484/tcp   #Confluent License Manager
+confluent	1484/udp   #Confluent License Manager
+lansource	1485/tcp
+lansource	1485/udp
+nms_topo_serv	1486/tcp
+nms_topo_serv	1486/udp
+localinfosrvr	1487/tcp
+localinfosrvr	1487/udp
+docstor		1488/tcp
+docstor		1488/udp
+dmdocbroker	1489/tcp
+dmdocbroker	1489/udp
+insitu-conf	1490/tcp
+insitu-conf	1490/udp
+anynetgateway	1491/tcp
+anynetgateway	1491/udp
+stone-design-1	1492/tcp
+stone-design-1	1492/udp
+netmap_lm	1493/tcp
+netmap_lm	1493/udp
+ica		1494/tcp
+ica		1494/udp
+cvc		1495/tcp
+cvc		1495/udp
+liberty-lm	1496/tcp
+liberty-lm	1496/udp
+rfx-lm		1497/tcp
+rfx-lm		1497/udp
+watcom-sql	1498/tcp
+watcom-sql	1498/udp
+fhc		1499/tcp   #Federico Heinz Consultora
+fhc		1499/udp   #Federico Heinz Consultora
+vlsi-lm		1500/tcp   #VLSI License Manager
+vlsi-lm		1500/udp   #VLSI License Manager
+sas-3		1501/tcp   #Satellite-data Acquisition System 3
+sas-3		1501/udp   #Satellite-data Acquisition System 3
+shivadiscovery	1502/tcp   #Shiva
+shivadiscovery	1502/udp   #Shiva
+imtc-mcs	1503/tcp   #Databeam
+imtc-mcs	1503/udp   #Databeam
+evb-elm		1504/tcp   #EVB Software Engineering License Manager
+evb-elm		1504/udp   #EVB Software Engineering License Manager
+funkproxy	1505/tcp   #Funk Software, Inc.
+funkproxy	1505/udp   #Funk Software, Inc.
+utcd		1506/tcp   #Universal Time daemon (utcd)
+utcd		1506/udp   #Universal Time daemon (utcd)
+symplex		1507/tcp
+symplex		1507/udp
+diagmond	1508/tcp
+diagmond	1508/udp
+robcad-lm	1509/tcp   #Robcad, Ltd. License Manager
+robcad-lm	1509/udp   #Robcad, Ltd. License Manager
+mvx-lm		1510/tcp   #Midland Valley Exploration Ltd. Lic. Man.
+mvx-lm		1510/udp   #Midland Valley Exploration Ltd. Lic. Man.
+3l-l1		1511/tcp
+3l-l1		1511/udp
+wins		1512/tcp   #Microsoft's Windows Internet Name Service
+wins		1512/udp   #Microsoft's Windows Internet Name Service
+fujitsu-dtc	1513/tcp   #Fujitsu Systems Business of America, Inc
+fujitsu-dtc	1513/udp   #Fujitsu Systems Business of America, Inc
+fujitsu-dtcns	1514/tcp   #Fujitsu Systems Business of America, Inc
+fujitsu-dtcns	1514/udp   #Fujitsu Systems Business of America, Inc
+ifor-protocol	1515/tcp
+ifor-protocol	1515/udp
+vpad		1516/tcp   #Virtual Places Audio data
+vpad		1516/udp   #Virtual Places Audio data
+vpac		1517/tcp   #Virtual Places Audio control
+vpac		1517/udp   #Virtual Places Audio control
+vpvd		1518/tcp   #Virtual Places Video data
+vpvd		1518/udp   #Virtual Places Video data
+vpvc		1519/tcp   #Virtual Places Video control
+vpvc		1519/udp   #Virtual Places Video control
+atm-zip-office	1520/tcp   #atm zip office
+atm-zip-office	1520/udp   #atm zip office
+ncube-lm	1521/tcp   #nCube License Manager
+ncube-lm	1521/udp   #nCube License Manager
+rna-lm		1522/tcp   #Ricardo North America License Manager
+rna-lm		1522/udp   #Ricardo North America License Manager
+cichild-lm	1523/tcp
+cichild-lm	1523/udp
+ingreslock	1524/tcp   #ingres
+ingreslock	1524/udp   #ingres
+prospero-np	1525/tcp   #Prospero Directory Service non-priv
+prospero-np	1525/udp   #Prospero Directory Service non-priv
+#PROBLEMS!========================================================
+orasrv		1525/tcp   #oracle
+orasrv		1525/udp   #oracle
+#PROBLEMS!========================================================
+pdap-np		1526/tcp   #Prospero Data Access Prot non-priv
+pdap-np		1526/udp   #Prospero Data Access Prot non-priv
+tlisrv		1527/tcp   #oracle
+tlisrv		1527/udp   #oracle
+mciautoreg	1528/tcp
+mciautoreg	1528/udp
+support		1529/tcp   prmsd gnatsd	# cygnus bug tracker
+coauthor	1529/tcp   #oracle
+coauthor	1529/udp   #oracle
+rap-service	1530/tcp
+rap-service	1530/udp
+rap-listen	1531/tcp
+rap-listen	1531/udp
+miroconnect	1532/tcp
+miroconnect	1532/udp
+virtual-places	1533/tcp   #Virtual Places Software
+virtual-places	1533/udp   #Virtual Places Software
+micromuse-lm	1534/tcp
+micromuse-lm	1534/udp
+ampr-info	1535/tcp
+ampr-info	1535/udp
+ampr-inter	1536/tcp
+ampr-inter	1536/udp
+sdsc-lm		1537/tcp
+sdsc-lm		1537/udp
+3ds-lm		1538/tcp
+3ds-lm		1538/udp
+intellistor-lm	1539/tcp   #Intellistor License Manager
+intellistor-lm	1539/udp   #Intellistor License Manager
+rds		1540/tcp
+rds		1540/udp
+rds2		1541/tcp
+rds2		1541/udp
+gridgen-elmd	1542/tcp
+gridgen-elmd	1542/udp
+simba-cs	1543/tcp
+simba-cs	1543/udp
+aspeclmd	1544/tcp
+aspeclmd	1544/udp
+vistium-share	1545/tcp
+vistium-share	1545/udp
+abbaccuray	1546/tcp
+abbaccuray	1546/udp
+laplink		1547/tcp
+laplink		1547/udp
+axon-lm		1548/tcp   #Axon License Manager
+axon-lm		1548/udp   #Axon License Manager
+shivahose	1549/tcp   #Shiva Hose
+shivasound	1549/udp   #Shiva Sound
+3m-image-lm	1550/tcp   #Image Storage license manager 3M Company
+3m-image-lm	1550/udp   #Image Storage license manager 3M Company
+hecmtl-db	1551/tcp
+hecmtl-db	1551/udp
+pciarray	1552/tcp
+pciarray	1552/udp
+issd		1600/tcp
+issd		1600/udp
+# IMPORTANT NOTE: Ports 1645/1646 are the traditional radius ports used by
+# many vendors without obtaining official IANA assignment.  The official
+# assignment is now ports 1812/1813 and users are encouraged to migrate
+# when possible to these new ports.
+#radius		1645/udp   #RADIUS authentication protocol (old)
+#radacct	1646/udp   #RADIUS accounting protocol (old)
+nkd		1650/tcp
+nkd		1650/udp
+shiva_confsrvr	1651/tcp
+shiva_confsrvr	1651/udp
+xnmp		1652/tcp
+xnmp		1652/udp
+netview-aix-1	1661/tcp
+netview-aix-1	1661/udp
+netview-aix-2	1662/tcp
+netview-aix-2	1662/udp
+netview-aix-3	1663/tcp
+netview-aix-3	1663/udp
+netview-aix-4	1664/tcp
+netview-aix-4	1664/udp
+netview-aix-5	1665/tcp
+netview-aix-5	1665/udp
+netview-aix-6	1666/tcp
+netview-aix-6	1666/udp
+netview-aix-7	1667/tcp
+netview-aix-7	1667/udp
+netview-aix-8	1668/tcp
+netview-aix-8	1668/udp
+netview-aix-9	1669/tcp
+netview-aix-9	1669/udp
+netview-aix-10	1670/tcp
+netview-aix-10	1670/udp
+netview-aix-11	1671/tcp
+netview-aix-11	1671/udp
+netview-aix-12	1672/tcp
+netview-aix-12	1672/udp
+l2f		1701/tcp   #l2f
+l2f		1701/udp   #l2f
+l2tp		1701/tcp   #Layer 2 Tunnelling Protocol
+l2tp		1701/udp   #Layer 2 Tunnelling Protocol
+pptp		1723/tcp   #Point-to-point tunnelling protocol
+# IMPORTANT NOTE: See comments for ports 1645/1646 when using older equipment
+radius		1812/udp   #RADIUS authentication protocol (IANA sanctioned)
+radacct		1813/udp   #RADIUS accounting protocol (IANA sanctioned)
+licensedaemon	1986/tcp   #cisco license management
+licensedaemon	1986/udp   #cisco license management
+tr-rsrb-p1	1987/tcp   #cisco RSRB Priority 1 port
+tr-rsrb-p1	1987/udp   #cisco RSRB Priority 1 port
+tr-rsrb-p2	1988/tcp   #cisco RSRB Priority 2 port
+tr-rsrb-p2	1988/udp   #cisco RSRB Priority 2 port
+tr-rsrb-p3	1989/tcp   #cisco RSRB Priority 3 port
+tr-rsrb-p3	1989/udp   #cisco RSRB Priority 3 port
+#PROBLEMS!===================================================
+mshnet		1989/tcp   #MHSnet system
+mshnet		1989/udp   #MHSnet system
+#PROBLEMS!===================================================
+stun-p1		1990/tcp   #cisco STUN Priority 1 port
+stun-p1		1990/udp   #cisco STUN Priority 1 port
+stun-p2		1991/tcp   #cisco STUN Priority 2 port
+stun-p2		1991/udp   #cisco STUN Priority 2 port
+stun-p3		1992/tcp   #cisco STUN Priority 3 port
+stun-p3		1992/udp   #cisco STUN Priority 3 port
+#PROBLEMS!===================================================
+ipsendmsg	1992/tcp
+ipsendmsg	1992/udp
+#PROBLEMS!===================================================
+snmp-tcp-port	1993/tcp   #cisco SNMP TCP port
+snmp-tcp-port	1993/udp   #cisco SNMP TCP port
+stun-port	1994/tcp   #cisco serial tunnel port
+stun-port	1994/udp   #cisco serial tunnel port
+perf-port	1995/tcp   #cisco perf port
+perf-port	1995/udp   #cisco perf port
+tr-rsrb-port	1996/tcp   #cisco Remote SRB port
+tr-rsrb-port	1996/udp   #cisco Remote SRB port
+gdp-port	1997/tcp   #cisco Gateway Discovery Protocol
+gdp-port	1997/udp   #cisco Gateway Discovery Protocol
+x25-svc-port	1998/tcp   #cisco X.25 service (XOT)
+x25-svc-port	1998/udp   #cisco X.25 service (XOT)
+tcp-id-port	1999/tcp   #cisco identification port
+tcp-id-port	1999/udp   #cisco identification port
+callbook	2000/tcp
+callbook	2000/udp
+dc		2001/tcp
+wizard		2001/udp   #curry
+globe		2002/tcp
+globe		2002/udp
+cfingerd	2003/tcp   #GNU finger
+mailbox		2004/tcp
+emce		2004/udp   #CCWS mm conf
+berknet		2005/tcp
+oracle		2005/udp
+invokator	2006/tcp
+raid-cc		2006/udp   #raid
+dectalk		2007/tcp
+raid-am		2007/udp
+conf		2008/tcp
+terminaldb	2008/udp
+news		2009/tcp
+whosockami	2009/udp
+search		2010/tcp
+pipe_server	2010/udp
+raid-cc		2011/tcp   #raid
+servserv	2011/udp
+ttyinfo		2012/tcp
+raid-ac		2012/udp
+raid-am		2013/tcp
+raid-cd		2013/udp
+troff		2014/tcp
+raid-sf		2014/udp
+cypress		2015/tcp
+raid-cs		2015/udp
+bootserver	2016/tcp
+bootserver	2016/udp
+cypress-stat	2017/tcp
+bootclient	2017/udp
+terminaldb	2018/tcp
+rellpack	2018/udp
+whosockami	2019/tcp
+about		2019/udp
+xinupageserver	2020/tcp
+xinupageserver	2020/udp
+servexec	2021/tcp
+xinuexpansion1	2021/udp
+down		2022/tcp
+xinuexpansion2	2022/udp
+xinuexpansion3	2023/tcp
+xinuexpansion3	2023/udp
+xinuexpansion4	2024/tcp
+xinuexpansion4	2024/udp
+ellpack		2025/tcp
+xribs		2025/udp
+scrabble	2026/tcp
+scrabble	2026/udp
+shadowserver	2027/tcp
+shadowserver	2027/udp
+submitserver	2028/tcp
+submitserver	2028/udp
+device2		2030/tcp
+device2		2030/udp
+blackboard	2032/tcp
+blackboard	2032/udp
+glogger		2033/tcp
+glogger		2033/udp
+scoremgr	2034/tcp
+scoremgr	2034/udp
+imsldoc		2035/tcp
+imsldoc		2035/udp
+objectmanager	2038/tcp
+objectmanager	2038/udp
+lam		2040/tcp
+lam		2040/udp
+interbase	2041/tcp
+interbase	2041/udp
+isis		2042/tcp
+isis		2042/udp
+isis-bcast	2043/tcp
+isis-bcast	2043/udp
+rimsl		2044/tcp
+rimsl		2044/udp
+cdfunc		2045/tcp
+cdfunc		2045/udp
+sdfunc		2046/tcp
+sdfunc		2046/udp
+#dls		2047/tcp
+#dls		2047/udp
+dls-monitor	2048/tcp
+dls-monitor	2048/udp
+nfsd		2049/tcp   nfs		# NFS server daemon
+nfsd		2049/udp   nfs		# NFS server daemon
+#PROBLEMS!=============================================================
+#shilp		2049/tcp
+#shilp		2049/udp
+#PROBLEMS!=============================================================
+dlsrpn		2065/tcp   #Data Link Switch Read Port Number
+dlsrpn		2065/udp   #Data Link Switch Read Port Number
+dlswpn		2067/tcp   #Data Link Switch Write Port Number
+dlswpn		2067/udp   #Data Link Switch Write Port Number
+zephyr-clt	2103/udp   #Zephyr serv-hm connection
+zephyr-hm	2104/udp   #Zephyr hostmanager
+#PROBLEMS!=============================================================
+#zephyr-hm-srv	2105/udp   #Zephyr hm-serv connection
+#PROBLEMS!=============================================================
+eklogin		2105/tcp   #Kerberos (v4) encrypted rlogin
+eklogin		2105/udp   #Kerberos (v4) encrypted rlogin
+ekshell		2106/tcp   #Kerberos (v4) encrypted rshell
+ekshell		2106/udp   #Kerberos (v4) encrypted rshell
+rkinit		2108/tcp   #Kerberos (v4) remote initialization
+rkinit		2108/udp   #Kerberos (v4) remote initialization
+ats		2201/tcp   #Advanced Training System Program
+ats		2201/udp   #Advanced Training System Program
+ivs-video	2232/tcp   #IVS Video default
+ivs-video	2232/udp   #IVS Video default
+ivsd		2241/tcp   #IVS Daemon
+ivsd		2241/udp   #IVS Daemon
+pehelp		2307/tcp
+pehelp		2307/udp
+cvspserver	2401/tcp   #CVS network server
+cvspserver	2401/udp   #CVS network server
+venus		2430/tcp   #venus
+venus		2430/udp   #venus
+venus-se	2431/tcp   #venus-se
+venus-se	2431/udp   #venus-se
+codasrv		2432/tcp   #codasrv
+codasrv		2432/udp   #codasrv
+codasrv-se	2433/tcp   #codasrv-se
+codasrv-se	2433/udp   #codasrv-se
+rtsserv		2500/tcp   #Resource Tracking system server
+rtsserv		2500/udp   #Resource Tracking system server
+rtsclient	2501/tcp   #Resource Tracking system client
+rtsclient	2501/udp   #Resource Tracking system client
+hp-3000-telnet	2564/tcp   #HP 3000 NS/VT block mode telnet
+zebrasrv	2600/tcp   #zebra service
+zebra		2601/tcp   #zebra vty
+ripd		2602/tcp   #RIPd vty
+ripngd		2603/tcp   #RIPngd vty
+ospfd		2604/tcp   #OSPFd vty
+bgpd		2605/tcp   #BGPd vty
+ospf6d		2606/tcp   #OSPF6d vty
+dict		2628/tcp   #RFC 2229
+dict		2628/udp   #RFC 2229
+listen		2766/tcp   #System V listener port
+www-dev		2784/tcp   #world wide web - development
+www-dev		2784/udp   #world wide web - development
+eppc		3031/tcp   #Remote AppleEvents/PPC Toolbox
+eppc		3031/udp   #Remote AppleEvents/PPC Toolbox
+NSWS		3049/tcp
+NSWS		3049/udp
+gds_db		3050/tcp   #InterBase Database Remote Protocol
+gds_db		3050/udp   #InterBase Database Remote Protocol
+sj3		3086/tcp   #SJ3 (kanji input)
+vmodem		3141/tcp
+vmodem		3141/udp
+ccmail		3264/tcp   #cc:mail/lotus
+ccmail		3264/udp   #cc:mail/lotus
+dec-notes	3333/tcp   #DEC Notes
+dec-notes	3333/udp   #DEC Notes
+rdp		3389/tcp   #Microsoft Remote Desktop Protocol
+bmap		3421/tcp   #Bull Apprise portmapper
+bmap		3421/udp   #Bull Apprise portmapper
+prsvp		3455/tcp   #RSVP Port
+prsvp		3455/udp   rsvp-encap	#RSVP Port
+vat		3456/tcp   #VAT default data
+vat		3456/udp   #VAT default data
+vat-control	3457/tcp   #VAT default control
+vat-control	3457/udp   #VAT default control
+nut		3493/tcp   #Network UPS Tools
+nut		3493/udp   #Network UPS Tools
+tsp		3653/tcp   #Tunnel Setup Protocol
+tsp		3653/udp   #Tunnel Setup Protocol
+svn		3690/tcp   #Subversion
+svn		3690/udp   #Subversion
+udt_os		3900/tcp   #Unidata UDT OS
+udt_os		3900/udp   #Unidata UDT OS
+mapper-nodemgr	3984/tcp   #MAPPER network node manager
+mapper-nodemgr	3984/udp   #MAPPER network node manager
+mapper-mapethd	3985/tcp   #MAPPER TCP/IP server
+mapper-mapethd	3985/udp   #MAPPER TCP/IP server
+mapper-ws_ethd	3986/tcp   #MAPPER workstation server
+mapper-ws_ethd	3986/udp   #MAPPER workstation server
+netcheque	4008/tcp   #NetCheque accounting
+netcheque	4008/udp   #NetCheque accounting
+lockd		4045/udp   # NFS lock daemon/manager
+lockd		4045/tcp
+nuts_dem	4132/tcp   #NUTS Daemon
+nuts_dem	4132/udp   #NUTS Daemon
+nuts_bootp	4133/tcp   #NUTS Bootp Server
+nuts_bootp	4133/udp   #NUTS Bootp Server
+rwhois		4321/tcp   #Remote Who Is
+rwhois		4321/udp   #Remote Who Is
+unicall		4343/tcp
+unicall		4343/udp
+krb524		4444/tcp
+krb524		4444/udp
+# PROBLEM krb524 assigned the port,
+# PROBLEM nv used it without an assignment
+nv-video	4444/tcp   #NV Video default
+nv-video	4444/udp   #NV Video default
+sae-urn		4500/tcp
+sae-urn		4500/udp
+fax		4557/tcp   #FAX transmission service
+hylafax		4559/tcp   #HylaFAX client-server protocol
+rfa		4672/tcp   #remote file access server
+rfa		4672/udp   #remote file access server
+commplex-main	5000/tcp
+commplex-main	5000/udp
+commplex-link	5001/tcp
+commplex-link	5001/udp
+rfe		5002/tcp   #radio free ethernet
+rfe		5002/udp   #radio free ethernet
+telelpathstart	5010/tcp
+telelpathstart	5010/udp
+telelpathattack	5011/tcp
+telelpathattack	5011/udp
+mmcc		5050/tcp   #multimedia conference control tool
+mmcc		5050/udp   #multimedia conference control tool
+rmonitor_secure	5145/tcp
+rmonitor_secure	5145/udp
+aol		5190/tcp   #America-Online
+aol		5190/udp   #America-Online
+aol-1		5191/tcp   #AmericaOnline1
+aol-1		5191/udp   #AmericaOnline1
+aol-2		5192/tcp   #AmericaOnline2
+aol-2		5192/udp   #AmericaOnline2
+aol-3		5193/tcp   #AmericaOnline3
+aol-3		5193/udp   #AmericaOnline3
+jabber-client	5222/tcp   #Jabber Client Connection
+jabber-client	5222/udp   #Jabber Client Connection
+padl2sim	5236/tcp
+padl2sim	5236/udp
+jabber-server	5269/tcp   #Jabber Server Connection
+jabber-server	5269/udp   #Jabber Server Connection
+hacl-hb		5300/tcp   # HA cluster heartbeat
+hacl-hb		5300/udp   # HA cluster heartbeat
+hacl-gs		5301/tcp   # HA cluster general services
+hacl-gs		5301/udp   # HA cluster general services
+hacl-cfg	5302/tcp   # HA cluster configuration
+hacl-cfg	5302/udp   # HA cluster configuration
+hacl-probe	5303/tcp   # HA cluster probing
+hacl-probe	5303/udp   # HA cluster probing
+hacl-local	5304/tcp
+hacl-local	5304/udp
+hacl-test	5305/tcp
+hacl-test	5305/udp
+cfengine	5308/tcp
+cfengine	5308/udp
+mdns		5353/tcp   #Multicast DNS
+mdns		5353/udp   #Multicast DNS
+postgresql	5432/tcp   #PostgreSQL Database
+postgresql	5432/udp   #PostgreSQL Database
+rplay		5555/udp
+canna		5680/tcp   #Canna (Japanese Input)
+proshareaudio	5713/tcp   #proshare conf audio
+proshareaudio	5713/udp   #proshare conf audio
+prosharevideo	5714/tcp   #proshare conf video
+prosharevideo	5714/udp   #proshare conf video
+prosharedata	5715/tcp   #proshare conf data
+prosharedata	5715/udp   #proshare conf data
+prosharerequest	5716/tcp   #proshare conf request
+prosharerequest	5716/udp   #proshare conf request
+prosharenotify	5717/tcp   #proshare conf notify
+prosharenotify	5717/udp   #proshare conf notify
+cvsup		5999/tcp   #CVSup file transfer/John Polstra/FreeBSD
+x11		6000/tcp   #6000-6063 are assigned to X Window System
+x11		6000/udp
+x11-ssh		6010/tcp   #Unofficial name, for convenience
+x11-ssh		6010/udp
+softcm		6110/tcp   #HP SoftBench CM
+softcm		6110/udp   #HP SoftBench CM
+spc		6111/tcp   #HP SoftBench Sub-Process Control
+spc		6111/udp   #HP SoftBench Sub-Process Control
+meta-corp	6141/tcp   #Meta Corporation License Manager
+meta-corp	6141/udp   #Meta Corporation License Manager
+aspentec-lm	6142/tcp   #Aspen Technology License Manager
+aspentec-lm	6142/udp   #Aspen Technology License Manager
+watershed-lm	6143/tcp   #Watershed License Manager
+watershed-lm	6143/udp   #Watershed License Manager
+statsci1-lm	6144/tcp   #StatSci License Manager - 1
+statsci1-lm	6144/udp   #StatSci License Manager - 1
+statsci2-lm	6145/tcp   #StatSci License Manager - 2
+statsci2-lm	6145/udp   #StatSci License Manager - 2
+lonewolf-lm	6146/tcp   #Lone Wolf Systems License Manager
+lonewolf-lm	6146/udp   #Lone Wolf Systems License Manager
+montage-lm	6147/tcp   #Montage License Manager
+montage-lm	6147/udp   #Montage License Manager
+ricardo-lm	6148/tcp   #Ricardo North America License Manager
+ricardo-lm	6148/udp   #Ricardo North America License Manager
+xdsxdm		6558/tcp
+xdsxdm		6558/udp
+ircd		6667/tcp   #Internet Relay Chat (unoffical)
+acmsoda		6969/tcp
+acmsoda		6969/udp
+afs3-fileserver	7000/tcp   #file server itself
+afs3-fileserver	7000/udp   #file server itself
+afs3-callback	7001/tcp   #callbacks to cache managers
+afs3-callback	7001/udp   #callbacks to cache managers
+afs3-prserver	7002/tcp   #users & groups database
+afs3-prserver	7002/udp   #users & groups database
+afs3-vlserver	7003/tcp   #volume location database
+afs3-vlserver	7003/udp   #volume location database
+afs3-kaserver	7004/tcp   #AFS/Kerberos authentication service
+afs3-kaserver	7004/udp   #AFS/Kerberos authentication service
+afs3-volser	7005/tcp   #volume management server
+afs3-volser	7005/udp   #volume management server
+afs3-errors	7006/tcp   #error interpretation service
+afs3-errors	7006/udp   #error interpretation service
+afs3-bos	7007/tcp   #basic overseer process
+afs3-bos	7007/udp   #basic overseer process
+afs3-update	7008/tcp   #server-to-server updater
+afs3-update	7008/udp   #server-to-server updater
+afs3-rmtsys	7009/tcp   #remote cache manager service
+afs3-rmtsys	7009/udp   #remote cache manager service
+afs3-resserver	7010/tcp   #MR-AFS residence server
+afs3-resserver	7010/udp   #MR-AFS residence server
+ups-onlinet	7010/tcp   #onlinet uninterruptable power supplies
+ups-onlinet	7010/udp   #onlinet uninterruptable power supplies
+afs3-remio	7011/tcp   #MR-AFS remote IO server
+afs3-remio	7011/udp   #MR-AFS remote IO server
+font-service	7100/tcp   #X Font Service
+font-service	7100/udp   #X Font Service
+fodms		7200/tcp   #FODMS FLIP
+fodms		7200/udp   #FODMS FLIP
+dlip		7201/tcp
+dlip		7201/udp
+ftp-proxy	8021/tcp   # FTP proxy
+natd		8668/divert # Network Address Translation
+jetdirect	9100/tcp   #HP JetDirect card
+git		9418/tcp   # Git Version Control System
+man		9535/tcp
+man		9535/udp
+sd		9876/tcp   #Session Director
+sd		9876/udp   #Session Director
+amanda		10080/udp  #Dump server control
+amandaidx	10082/tcp  #Amanda indexing
+amidxtape	10083/tcp  #Amanda tape indexing
+isode-dua	17007/tcp
+isode-dua	17007/udp
+biimenu		18000/tcp  #Beckman Instruments, Inc.
+biimenu		18000/udp  #Beckman Instruments, Inc.
+wnn4		22273/tcp  wnn6		#Wnn4 (Japanese input)
+wnn4_Cn		22289/tcp  wnn6_Cn	#Wnn4 (Chinese input)
+wnn4_Kr		22305/tcp  wnn6_Kr	#Wnn4 (Korean input)
+wnn4_Tw		22321/tcp  wnn6_Tw	#Wnn4 (Taiwanse input)
+wnn6_DS		26208/tcp  #Wnn6 (Dserver)
+dbbrowse	47557/tcp  #Databeam Corporation
+dbbrowse	47557/udp  #Databeam Corporation
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/shadow b/target/device/Atmel/atngw100-base/target_skeleton/etc/shadow
new file mode 100644
index 000000000..4a416022c
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/shadow
@@ -0,0 +1,17 @@
+root:$1$OJeedGT3$uG0eWkNhkeq0WO6Wldk1Y.:13200:0:99999:7:::
+daemon:!:13200:0:99999:7:::
+bin:!:13200:0:99999:7:::
+sys:!:13200:0:99999:7:::
+sync:!:13200:0:99999:7:::
+mail:!:13200:0:99999:7:::
+proxy:!:13200:0:99999:7:::
+www-data:!:13200:0:99999:7:::
+backup:!:13200:0:99999:7:::
+operator:!:13200:0:99999:7:::
+haldaemon:!:13200:0:99999:7:::
+dbus:!:13200:0:99999:7:::
+ftp:!:13200:0:99999:7:::
+dnsmasq:!:13200:0:99999:7:::
+sshd:!:13200:0:99999:7:::
+nobody:!:13200:0:99999:7:::
+default:!:13200:0:99999:7:::
diff --git a/target/device/Atmel/atngw100-base/target_skeleton/etc/shells b/target/device/Atmel/atngw100-base/target_skeleton/etc/shells
new file mode 100644
index 000000000..6ee110ced
--- /dev/null
+++ b/target/device/Atmel/atngw100-base/target_skeleton/etc/shells
@@ -0,0 +1,8 @@
+# /etc/shells: valid login shells
+/bin/ash
+/bin/sh
+/bin/zsh
+/bin/bash
+/usr/bin/zsh
+/usr/bin/bash
+/usr/bin/screen
diff --git a/target/device/Atmel/atngw100/atngw100small_defconfig b/target/device/Atmel/atngw100-base_defconfig
index 555514070..e75e12fe8 100644
--- a/target/device/Atmel/atngw100/atngw100small_defconfig
+++ b/target/device/Atmel/atngw100-base_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Thu Sep 27 01:49:02 2007
+# Tue Feb 26 08:58:10 2008
 #
 BR2_HAVE_DOT_CONFIG=y
 BR2_VERSION="0.10.0-svn"
@@ -35,14 +35,13 @@ BR2_ENDIAN="BIG"
 #
 # Project Options
 #
-BR2_PROJECT="atngw100"
-BR2_HOSTNAME="ATNGW100"
-BR2_BANNER="Welcome to the Erik's uClibc development environment."
+BR2_PROJECT="atngw100-base"
+BR2_HOSTNAME="atngw100-base.example.net"
+BR2_BANNER="ATNGW100-BASE ($(DATE))"
 
 #
 # Preset Devices
 #
-BR2_PACKAGE_LINUX=y
 BR2_TARGET_ATMEL=y
 
 #
@@ -54,11 +53,13 @@ BR2_TARGET_AT32AP7000=y
 # BR2_TARGET_AT32AP7002 is not set
 
 #
-# Development Board support
+# Development board support
 #
 # BR2_TARGET_AVR32_ATSTK1002 is not set
-BR2_TARGET_AVR32_ATNGW100=y
-BR2_BOARD_NAME="atngw100"
+# BR2_TARGET_AVR32_ATNGW100 is not set
+BR2_TARGET_AVR32_ATNGW100_BASE=y
+# BR2_TARGET_AVR32_ATNGW100_EXPANDED is not set
+BR2_BOARD_NAME="atngw100-base"
 
 #
 # Package support
@@ -67,18 +68,9 @@ BR2_BOARD_NAME="atngw100"
 #
 # Secondary locations
 #
-BR2_TARGET_ATMEL_COPYTO="/tftpboot"
+BR2_TARGET_ATMEL_COPYTO=""
 BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
-BR2_TARGET_UBOOT=y
-BR2_TARGET_UBOOT_SERVERIP="10.175.196.220"
-BR2_TARGET_UBOOT_IPADDR="10.175.196.18"
-BR2_TARGET_UBOOT_GATEWAY="10.175.196.1"
-BR2_TARGET_UBOOT_NETMASK="255.255.255.0"
-BR2_TARGET_UBOOT_ETHADDR="04:25:fe:ed:00:18"
-
-#
-# It will be copied to $(BR2_AT91BOOTSTRAP_JUMP_ADDR)
-#
+# BR2_TARGET_VALKA is not set
 
 #
 # Generic System Support
@@ -90,7 +82,7 @@ BR2_TARGET_UBOOT_ETHADDR="04:25:fe:ed:00:18"
 #
 # Build options
 #
-BR2_WGET="wget --passive-ftp"
+BR2_WGET="wget --passive-ftp --retry-connrefused --waitretry=10"
 BR2_SVN_CO="svn co"
 BR2_SVN_UP="svn up"
 BR2_GIT="git clone"
@@ -103,6 +95,9 @@ BR2_DL_DIR="$(BASE_DIR)/src/dl"
 # Mirrors and Download locations
 #
 BR2_SOURCEFORGE_MIRROR="easynews"
+BR2_KERNEL_MIRROR="http://www.kernel.org/pub/"
+BR2_GNU_MIRROR="http://ftp.gnu.org/pub/gnu"
+BR2_DEBIAN_MIRROR="http://ftp.debian.org"
 
 #
 # Atmel Mirrors
@@ -110,13 +105,17 @@ BR2_SOURCEFORGE_MIRROR="easynews"
 BR2_ATMEL_MIRROR="ftp://at91dist:distrib@81.80.104.162/AT91_Third_Party_Design_Flow/Linux_Host/"
 BR2_AT91_PATCH_MIRROR="http://maxim.org.za/AT91RM9200/2.6/"
 BR2_STAGING_DIR="$(BUILD_DIR)/staging_dir"
+# BR2_FPU_SUFFIX is not set
 BR2_TOPDIR_PREFIX=""
 BR2_TOPDIR_SUFFIX=""
+BR2_ROOTFS_PREFIX="rootfs"
+BR2_ROOTFS_SUFFIX="$(DATE)"
 BR2_GNU_BUILD_SUFFIX="pc-linux-gnu"
 BR2_GNU_TARGET_SUFFIX="linux-uclibc"
-BR2_JLEVEL=2
+BR2_JLEVEL=1
 # BR2_PREFER_IMA is not set
 # BR2_DEPRECATED is not set
+BR2_RECENT=y
 BR2_STRIP_strip=y
 # BR2_STRIP_sstrip is not set
 # BR2_STRIP_none is not set
@@ -128,19 +127,15 @@ BR2_UPDATE_CONFIG=y
 #
 # Toolchain
 #
-# BR2_TOOLCHAIN_BUILDROOT is not set
+BR2_TOOLCHAIN_BUILDROOT=y
 # BR2_TOOLCHAIN_EXTERNAL is not set
-BR2_TOOLCHAIN_EXTERNAL_SOURCE=y
+# BR2_TOOLCHAIN_EXTERNAL_SOURCE is not set
 BR2_TOOLCHAIN_SOURCE=y
-BR2_TOOLCHAIN_ATMEL_AVR32=y
-# BR2_TOOLCHAIN_UNKNOWNVENDOR is not set
-BR2_VENDOR_SITE="$(BR2_ATMEL_MIRROR)/Source"
-BR2_VENDOR_SUFFIX="-avr32"
-BR2_VENDOR_BINUTILS_RELEASE="-2.0"
-BR2_VENDOR_GCC_RELEASE="-2.0"
-BR2_VENDOR_UCLIBC_RELEASE="-2.0"
-BR2_VENDOR_GDB_RELEASE="-2.0"
-BR2_VENDOR_PATCH_DIR="target/device/Atmel/toolchain/avr32"
+BR2_EXT_GCC_VERSION_4_1_2=y
+BR2_EXT_GCC_VERSION_4_2_1=y
+BR2_EXT_BINUTILS_VERSION_2_17=y
+BR2_EXT_UCLIBC_VERSION_0_9_29=y
+BR2_EXT_UCLIBC_VERSION_0_9_28_3=y
 
 #
 # Kernel Header Options
@@ -156,20 +151,19 @@ BR2_VENDOR_PATCH_DIR="target/device/Atmel/toolchain/avr32"
 # BR2_KERNEL_HEADERS_2_6_20 is not set
 # BR2_KERNEL_HEADERS_2_6_21_5 is not set
 # BR2_KERNEL_HEADERS_2_6_21 is not set
-BR2_KERNEL_HEADERS_2_6_22_1=y
+# BR2_KERNEL_HEADERS_2_6_22_1 is not set
+# BR2_KERNEL_HEADERS_2_6_22_10 is not set
 # BR2_KERNEL_HEADERS_2_6_22 is not set
+# BR2_KERNEL_HEADERS_2_6_23 is not set
+BR2_KERNEL_HEADERS_2_6_24=y
 # BR2_KERNEL_HEADERS_SNAP is not set
-# BR2_KERNEL_HEADERS_IPMI is not set
-# BR2_KERNEL_HEADERS_LZMA is not set
-# BR2_KERNEL_HEADERS_RT is not set
-# BR2_KERNEL_HEADERS_PATCH_DIR is not set
-BR2_DEFAULT_KERNEL_HEADERS="2.6.22.1"
+BR2_DEFAULT_KERNEL_HEADERS="2.6.24"
 
 #
 # uClibc Options
 #
-BR2_UCLIBC_VERSION_0_9_28_3=y
-# BR2_UCLIBC_VERSION_0_9_29 is not set
+# BR2_UCLIBC_VERSION_0_9_28_3 is not set
+BR2_UCLIBC_VERSION_0_9_29=y
 # BR2_UCLIBC_VERSION_SNAPSHOT is not set
 BR2_UCLIBC_CONFIG="target/device/Atmel/uClibc.config.avr32"
 # BR2_ENABLE_LOCALE is not set
@@ -177,7 +171,7 @@ BR2_UCLIBC_CONFIG="target/device/Atmel/uClibc.config.avr32"
 # BR2_PTHREADS is not set
 BR2_PTHREADS_OLD=y
 # BR2_PTHREADS_NATIVE is not set
-BR2_PTHREAD_DEBUG=y
+# BR2_PTHREAD_DEBUG is not set
 # BR2_UCLIBC_PROGRAM_INVOCATION is not set
 
 #
@@ -195,17 +189,18 @@ BR2_EXTRA_BINUTILS_CONFIG_OPTIONS=""
 #
 # BR2_GCC_VERSION_3_4_6 is not set
 # BR2_GCC_VERSION_4_0_4 is not set
-BR2_GCC_VERSION_4_1_2=y
+# BR2_GCC_VERSION_4_1_2 is not set
 # BR2_GCC_VERSION_4_2_0 is not set
-# BR2_GCC_VERSION_4_2_1 is not set
-# BR2_GCC_SUPPORTS_SYSROOT is not set
+BR2_GCC_VERSION_4_2_1=y
+BR2_GCC_SUPPORTS_SYSROOT=y
 # BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE is not set
-BR2_GCC_VERSION="4.1.2"
+BR2_GCC_VERSION="4.2.1"
+# BR2_TOOLCHAIN_SYSROOT is not set
 # BR2_GCC_USE_SJLJ_EXCEPTIONS is not set
 BR2_EXTRA_GCC_CONFIG_OPTIONS=""
-# BR2_GCC_CROSS_CXX is not set
+BR2_GCC_CROSS_CXX=y
 # BR2_INSTALL_LIBSTDCPP is not set
-BR2_GCC_SHARED_LIBGCC=y
+# BR2_GCC_SHARED_LIBGCC is not set
 
 #
 # Ccache Options
@@ -235,8 +230,9 @@ BR2_LARGEFILE=y
 BR2_INET_IPV6=y
 BR2_INET_RPC=y
 BR2_USE_WCHAR=y
+BR2_SOFT_FLOAT=y
 BR2_TARGET_OPTIMIZATION="-Os -pipe"
-BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
+# BR2_CROSS_TOOLCHAIN_TARGET_UTILS is not set
 
 #
 # Package Selection for the target
@@ -244,13 +240,14 @@ BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
 BR2_PACKAGE_BUSYBOX=y
 # BR2_BUSYBOX_VERSION_1_2_2_1 is not set
 # BR2_BUSYBOX_VERSION_1_6_1 is not set
-# BR2_BUSYBOX_VERSION_1_7_0 is not set
-BR2_BUSYBOX_VERSION_1_7_1=y
+# BR2_BUSYBOX_VERSION_1_7_X is not set
+# BR2_BUSYBOX_VERSION_1_8_X is not set
+BR2_BUSYBOX_VERSION_1_9_X=y
 # BR2_PACKAGE_BUSYBOX_SNAPSHOT is not set
-BR2_BUSYBOX_VERSION="1.7.1"
+BR2_BUSYBOX_VERSION="1.9.1"
 BR2_PACKAGE_BUSYBOX_INSTALL_SYMLINKS=y
-BR2_PACKAGE_BUSYBOX_CONFIG="target/device/Atmel/uClibc.config.avr32"
-# BR2_PACKAGE_BUSYBOX_HIDE_OTHERS is not set
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_BOARD_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config"
+BR2_PACKAGE_BUSYBOX_HIDE_OTHERS=y
 BR2_PACKAGE_BUSYBOX_SKELETON=y
 
 #
@@ -258,18 +255,10 @@ BR2_PACKAGE_BUSYBOX_SKELETON=y
 #
 # BR2_PACKAGE_BASH is not set
 # BR2_PACKAGE_BZIP2 is not set
-# BR2_PACKAGE_COREUTILS is not set
 # BR2_PACKAGE_DIFFUTILS is not set
-# BR2_PACKAGE_ED is not set
-# BR2_PACKAGE_FINDUTILS is not set
 # BR2_PACKAGE_FLEX is not set
-# BR2_PACKAGE_GAWK is not set
 # BR2_PACKAGE_GCC_TARGET is not set
-# BR2_PACKAGE_GREP is not set
 # BR2_PACKAGE_MAKE is not set
-# BR2_PACKAGE_PATCH is not set
-# BR2_PACKAGE_SED is not set
-# BR2_PACKAGE_TAR is not set
 
 #
 # Other development stuff
@@ -302,9 +291,17 @@ BR2_HOST_FAKEROOT=y
 # BR2_PACKAGE_BSDIFF is not set
 # BR2_PACKAGE_CUSTOMIZE is not set
 # BR2_PACKAGE_DASH is not set
+# BR2_PACKAGE_FCONFIG is not set
 # BR2_PACKAGE_FILE is not set
+# BR2_PACKAGE_FIS is not set
 # BR2_PACKAGE_KEXEC is not set
-# BR2_PACKAGE_LESS is not set
+# BR2_PACKAGE_ICU is not set
+# BR2_PACKAGE_IPKG is not set
+# BR2_PACKAGE_CUPS is not set
+# BR2_PACKAGE_NG_SPICE_REWORK is not set
+# BR2_PACKAGE_GAMIN is not set
+# BR2_PACKAGE_STARTUP_NOTIFICATION is not set
+# BR2_PACKAGE_CLASSPATH is not set
 BR2_PACKAGE_LIBDAEMON=y
 # BR2_PACKAGE_LIBELF is not set
 # BR2_PACKAGE_LIBEVENT is not set
@@ -312,40 +309,41 @@ BR2_PACKAGE_LIBDAEMON=y
 # BR2_PACKAGE_LIBGCRYPT is not set
 # BR2_PACKAGE_LIBGPG_ERROR is not set
 # BR2_PACKAGE_LIBLOCKFILE is not set
-BR2_PACKAGE_LIBSYSFS=y
+# BR2_PACKAGE_LIBSYSFS is not set
 # BR2_PACKAGE_LIBXML2 is not set
+
+#
+# libxslt	- disabled (requires pkgconfig)
+#
 # BR2_PACKAGE_LOCKFILE_PROGS is not set
 # BR2_PACKAGE_LSOF is not set
 # BR2_PACKAGE_LTP-TESTSUITE is not set
+# BR2_PACKAGE_LTRACE is not set
 # BR2_PACKAGE_LTT is not set
-# BR2_PACKAGE_MODULE_INIT_TOOLS is not set
-# BR2_PACKAGE_MODUTILS is not set
-# BR2_PACKAGE_NANO is not set
 # BR2_PACKAGE_PORTAGE is not set
-# BR2_PACKAGE_PROCPS is not set
-# BR2_PACKAGE_PSMISC is not set
 # BR2_PACKAGE_SQLITE is not set
 # BR2_PACKAGE_STRACE is not set
 # BR2_PACKAGE_SUDO is not set
-# BR2_PACKAGE_SYSKLOGD is not set
-# BR2_PACKAGE_SYSVINIT is not set
-# BR2_PACKAGE_TINYLOGIN is not set
-# BR2_PACKAGE_UEMACS is not set
-# BR2_PACKAGE_UTIL-LINUX is not set
-# BR2_PACKAGE_WHICH is not set
 BR2_NETWORK_SUPPORT=y
 
 #
 # Networking applications
 #
-# BR2_PACKAGE_ARGUS is not set
-# BR2_PACKAGE_AVAHI is not set
+
+#
+# argus		- disabled (requires libpcap)
+#
+BR2_PACKAGE_AVAHI=y
+BR2_PACKAGE_AVAHI_AUTOIPD=y
+
+#
+# mDNS/DNS-SD daemon	- disabled (requires expat)
+#
 # BR2_PACKAGE_BOA is not set
 # BR2_PACKAGE_BIND is not set
 # BR2_PACKAGE_BRIDGE is not set
 # BR2_PACKAGE_CURL is not set
 # BR2_PACKAGE_LIBCURL is not set
-# BR2_PACKAGE_ISC_DHCP is not set
 # BR2_PACKAGE_DNSMASQ is not set
 # BR2_PACKAGE_DROPBEAR is not set
 # BR2_PACKAGE_ETHTOOL is not set
@@ -353,11 +351,17 @@ BR2_NETWORK_SUPPORT=y
 # BR2_PACKAGE_IRDA_UTILS is not set
 # BR2_PACKAGE_IPERF is not set
 # BR2_PACKAGE_IPROUTE2 is not set
-# BR2_PACKAGE_IPSEC_TOOLS is not set
+
+#
+# ipsec-tools	- disabled (requires openssl, flex and the flex library (libfl.a) )
+#
 # BR2_PACKAGE_IPTABLES is not set
+# BR2_PACKAGE_KISMET is not set
 # BR2_PACKAGE_L2TP is not set
 # BR2_PACKAGE_LIBCGI is not set
 # BR2_PACKAGE_LIBCGICC is not set
+# BR2_PACKAGE_LIBEXOSIP2 is not set
+# BR2_PACKAGE_LIBOSIP2 is not set
 # BR2_PACKAGE_LIBPCAP is not set
 # BR2_PACKAGE_LINKS is not set
 # BR2_PACKAGE_LRZSZ is not set
@@ -367,7 +371,6 @@ BR2_NETWORK_SUPPORT=y
 # BR2_PACKAGE_MUTT is not set
 # BR2_PACKAGE_NBD is not set
 # BR2_PACKAGE_NCFTP is not set
-# BR2_PACKAGE_NETCAT is not set
 # BR2_PACKAGE_NETKITBASE is not set
 # BR2_PACKAGE_NETKITTELNET is not set
 # BR2_PACKAGE_NETPLUG is not set
@@ -405,96 +408,26 @@ BR2_NETWORK_SUPPORT=y
 # BR2_PACKAGE_TCPDUMP is not set
 # BR2_PACKAGE_DHCPDUMP is not set
 # BR2_PACKAGE_TFTPD is not set
-# BR2_PACKAGE_LIGHTTPD is not set
-# BR2_PACKAGE_THTTPD is not set
-# BR2_PACKAGE_TINYHTTPD is not set
 # BR2_PACKAGE_TN5250 is not set
 # BR2_PACKAGE_TTCP is not set
-# BR2_PACKAGE_VPNC is not set
+
+#
+# vpnc		- disabled (requires libgcrypt and libgpg_error)
+#
 # BR2_PACKAGE_VTUN is not set
-# BR2_PACKAGE_WGET is not set
 # BR2_PACKAGE_WIRELESS_TOOLS is not set
-BR2_BLOCKDEV_SUPPORT=y
-# BR2_PACKAGE_DBUS is not set
-# BR2_PACKAGE_DM is not set
-# BR2_PACKAGE_DMRAID is not set
-# BR2_PACKAGE_E2FSPROGS is not set
-# BR2_PACKAGE_GADGETFS_TEST is not set
-# BR2_PACKAGE_HAL is not set
-# BR2_PACKAGE_HDPARM is not set
-# BR2_PACKAGE_HOTPLUG is not set
-# BR2_PACKAGE_HWDATA is not set
-# BR2_PACKAGE_IOSTAT is not set
-# BR2_PACKAGE_LIBAIO is not set
-# BR2_PACKAGE_LIBRAW1394 is not set
-# BR2_PACKAGE_LIBUSB is not set
-# BR2_PACKAGE_LM_SENSORS is not set
-# BR2_PACKAGE_LVM2 is not set
-# BR2_PACKAGE_MDADM is not set
-# BR2_PACKAGE_MEMTESTER is not set
-# BR2_PACKAGE_MKDOSFS is not set
+# BR2_BLOCKDEV_SUPPORT is not set
 BR2_PACKAGE_MTD=y
-# BR2_PACKAGE_MTD_EXPERIMENTAL is not set
-
-#
-# MTD package selection
-#
-BR2_PACKAGE_MTD_ORIG=y
-# BR2_PACKAGE_MTD_SNAPSHOT is not set
-BR2_PACKAGE_MTD_ORIG_STRING="mtd-utils-1.0.0.tar.gz"
-
-#
-# MTD tools selection
-#
-BR2_PACKAGE_MTD_FLASH_ERASE=y
-BR2_PACKAGE_MTD_FLASH_ERASEALL=y
-# BR2_PACKAGE_MTD_FLASH_INFO is not set
-# BR2_PACKAGE_MTD_FLASH_LOCK is not set
-# BR2_PACKAGE_MTD_FLASH_UNLOCK is not set
-# BR2_PACKAGE_MTD_FLASHCP is not set
-# BR2_PACKAGE_MTD_ERASE is not set
-BR2_PACKAGE_MTD_JFFS2DUMP=y
-# BR2_PACKAGE_MTD_JFFS3DUMP is not set
-# BR2_PACKAGE_MTD_SUMTOOL is not set
-# BR2_PACKAGE_MTD_FTL_CHECK is not set
-# BR2_PACKAGE_MTD_FTL_FORMAT is not set
-# BR2_PACKAGE_MTD_NFTL_FORMAT is not set
-# BR2_PACKAGE_MTD_NFTLDUMP is not set
-BR2_PACKAGE_MTD_MKFSJFFS2=y
-# BR2_PACKAGE_MTD_MKFSJFFS is not set
-# BR2_PACKAGE_MTD_NANDDUMP is not set
-# BR2_PACKAGE_MTD_NANDWRITE is not set
-BR2_PACKAGE_MTD_MTD_DEBUG=y
-# BR2_PACKAGE_MTD_DOCFDISK is not set
-# BR2_PACKAGE_MTD_DOC_LOADBIOS is not set
-# BR2_PACKAGE_PCIUTILS is not set
-# BR2_PACKAGE_PCMCIA is not set
-# BR2_PACKAGE_RAIDTOOLS is not set
-# BR2_PACKAGE_SETSERIAL is not set
-# BR2_PACKAGE_SFDISK is not set
-# BR2_PACKAGE_SMARTMONTOOLS is not set
-BR2_PACKAGE_UDEV=y
-BR2_PACKAGE_UDEV_UTILS=y
-
-#
-# Extra udev tools
-#
-# BR2_PACKAGE_UDEV_VOLUME_ID is not set
-# BR2_PACKAGE_UDEV_SCSI_ID is not set
-# BR2_PACKAGE_USBMOUNT is not set
-# BR2_PACKAGE_USBUTILS is not set
-# BR2_PACKAGE_WIPE is not set
-# BR2_PACKAGE_XFSPROGS is not set
 # BR2_AUDIO_SUPPORT is not set
 # BR2_GRAPHIC_SUPPORT is not set
-BR2_COMPRESSOR_SUPPORT=y
-# BR2_PACKAGE_GZIP is not set
-# BR2_PACKAGE_LZO is not set
-# BR2_PACKAGE_LZMA_TARGET is not set
-# BR2_PACKAGE_LZMA_HOST is not set
-BR2_PACKAGE_ZLIB=y
-# BR2_PACKAGE_ZLIB_TARGET_HEADERS is not set
+# BR2_COMPRESSOR_SUPPORT is not set
 # BR2_SCRIPTING_SUPPORT is not set
+# BR2_GAMES is not set
+
+#
+# Editors
+#
+# BR2_PACKAGE_VIM is not set
 
 #
 # Target filesystem options
@@ -505,82 +438,102 @@ BR2_PACKAGE_ZLIB=y
 #
 # BR2_TARGET_ROOTFS_CRAMFS is not set
 # BR2_TARGET_ROOTFS_CLOOP is not set
-BR2_TARGET_ROOTFS_EXT2=y
-BR2_TARGET_ROOTFS_EXT2_BLOCKS=0
-BR2_TARGET_ROOTFS_EXT2_INODES=0
-BR2_TARGET_ROOTFS_EXT2_RESBLKS=0
-BR2_TARGET_ROOTFS_EXT2_SQUASH=y
-BR2_TARGET_ROOTFS_EXT2_OUTPUT="$(IMAGE).ext2"
-# BR2_TARGET_ROOTFS_EXT2_NONE is not set
-# BR2_TARGET_ROOTFS_EXT2_GZIP is not set
-BR2_TARGET_ROOTFS_EXT2_BZIP2=y
-# BR2_TARGET_ROOTFS_EXT2_LZMA is not set
-BR2_TARGET_ROOTFS_EXT2_COPYTO=""
+# BR2_TARGET_ROOTFS_EXT2 is not set
 BR2_TARGET_ROOTFS_JFFS2=y
-BR2_TARGET_ROOTFS_JFFS2_FLASH=y
-# BR2_TARGET_ROOTFS_JFFS2_DATAFLASH is not set
+# BR2_TARGET_ROOTFS_JFFS2_DATAFLASH_1056 is not set
+# BR2_TARGET_ROOTFS_JFFS2_DATAFLASH_528 is not set
+BR2_TARGET_ROOTFS_JFFS2_FLASH_128=y
+# BR2_TARGET_ROOTFS_JFFS2_FLASH_64 is not set
+# BR2_TARGET_ROOTFS_JFFS2_CUSTOM is not set
 BR2_TARGET_ROOTFS_JFFS2_PAGESIZE=0x1000
-BR2_TARGET_ROOTFS_JFFS2_EBSIZE=0x10000
+BR2_TARGET_ROOTFS_JFFS2_EBSIZE=0x20000
 # BR2_TARGET_ROOTFS_JFFS2_NOCLEANMARKER is not set
 # BR2_JFFS2_TARGET_SREC is not set
-# BR2_TARGET_ROOTFS_JFFS2_PAD is not set
+BR2_TARGET_ROOTFS_JFFS2_PAD=y
+BR2_TARGET_ROOTFS_JFFS2_PADSIZE=0x0
 # BR2_TARGET_ROOTFS_JFFS2_LE is not set
 BR2_TARGET_ROOTFS_JFFS2_BE=y
 # BR2_TARGET_ROOTFS_JFFS2_SQUASH is not set
+# BR2_TARGET_ROOTFS_JFFS2_SUMMARY is not set
 BR2_TARGET_ROOTFS_JFFS2_OUTPUT="$(IMAGE).jffs2"
 BR2_TARGET_ROOTFS_JFFS2_COPYTO=""
 # BR2_TARGET_ROOTFS_SQUASHFS is not set
 BR2_TARGET_ROOTFS_TAR=y
-# BR2_TARGET_ROOTFS_TAR_NONE is not set
+BR2_TARGET_ROOTFS_TAR_NONE=y
 # BR2_TARGET_ROOTFS_TAR_GZIP is not set
-BR2_TARGET_ROOTFS_TAR_BZIP2=y
+# BR2_TARGET_ROOTFS_TAR_BZIP2 is not set
 # BR2_TARGET_ROOTFS_TAR_LZMA is not set
 BR2_TARGET_ROOTFS_TAR_OPTIONS=""
+BR2_TARGET_ROOTFS_TAR_COPYTO=""
 # BR2_TARGET_ROOTFS_CPIO is not set
 # BR2_TARGET_ROOTFS_INITRAMFS is not set
 
 #
 # bootloader for target device
 #
+BR2_TARGET_U_BOOT=y
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE=""
+BR2_TARGET_U_BOOT_CONFIG_BOARD="atngw100_config"
+BR2_TARGET_U_BOOT_SERVERIP=""
+BR2_TARGET_U_BOOT_IPADDR=""
+BR2_TARGET_U_BOOT_ETH0ADDR=""
+BR2_TARGET_U_BOOT_ETH1ADDR=""
+BR2_TARGET_U_BOOT_BOOTARGS="console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2 g_serial.use_acm=1"
+BR2_TARGET_U_BOOT_BOOTCMD="fsload 0x90300000 /boot/uImage; bootm"
 
 #
 # Kernel
 #
 # BR2_KERNEL_none is not set
-BR2_KERNEL_LINUX=y
+BR2_KERNEL_LINUX_ADVANCED=y
+# BR2_KERNEL_LINUX is not set
 # BR2_KERNEL_HURD is not set
-BR2_PACKAGE_LINUX_EXPERIMENTAL_CONFIG=y
-BR2_PACKAGE_LINUX_KCONFIG="$(BOARD_PATH)/$(BOARD_NAME)-linux-$(LINUX26_VERSION).config"
+BR2_PACKAGE_LINUX=y
+BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-2.6.22.5.config"
 BR2_PACKAGE_LINUX_FORMAT="uImage"
-# BR2_LINUX_2_6_SNAP is not set
-# BR2_LINUX_2_6_MM is not set
+BR2_KERNEL_CURRENT_VERSION="2.6.24"
+BR2_KERNEL_THIS_VERSION="2.6.24"
+BR2_KERNEL_SITE="http://ftp.kernel.org/pub/linux/kernel/v2.6/"
+BR2_MM_PATCH_SITE="http://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6"
+BR2_RC_MM_PATCH_DIR="$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)/2.6.$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)-mm$(BR2_KERNEL_MM_LEVEL)"
 # BR2_LINUX_2_6_STABLE is not set
-BR2_LINUX_2_6_22_1=y
+BR2_LINUX_2_6_24=y
+# BR2_LINUX_2_6_23 is not set
+# BR2_LINUX_2_6_22_10 is not set
+# BR2_LINUX_2_6_22_1 is not set
 # BR2_LINUX_2_6_22 is not set
-# BR2_LINUX_2_6_21_6 is not set
-# BR2_LINUX_2_6_21_1 is not set
+# BR2_LINUX_2_6_21_7 is not set
+# BR2_LINUX_2_6_21_5 is not set
 # BR2_LINUX_2_6_21 is not set
-# BR2_LINUX_2_6_20_4 is not set
 # BR2_LINUX_2_6_20 is not set
-# BR2_LINUX_2_6_19_2 is not set
-# BR2_LINUX_2_6_19 is not set
-# BR2_LINUX_2_6_18 is not set
-# BR2_LINUX_2_6_17 is not set
-# BR2_LINUX_2_6_16 is not set
-# BR2_LINUX_2_6_15 is not set
-# BR2_LINUX_2_6_23 is not set
-# BR2_LINUX_CUSTOM is not set
+# BR2_LINUX26_CUSTOM is not set
 
 #
 # Patches
 #
+BR2_KERNEL_ADD_NO_PATCH=y
+# BR2_KERNEL_ADD_LATEST_MINORPATCH is not set
+# BR2_KERNEL_ADD_MINORPATCH is not set
+# BR2_KERNEL_ADD_LATEST_RC_PATCH is not set
+# BR2_KERNEL_ADD_RC_PATCH is not set
+# BR2_KERNEL_ADD_LATEST_SNAPSHOT is not set
+# BR2_KERNEL_ADD_SNAPSHOT is not set
+# BR2_KERNEL_ADD_LATEST_MM_PATCH is not set
+# BR2_KERNEL_ADD_MM_PATCH is not set
+# BR2_KERNEL_ADD_PATCH is not set
 BR2_LINUX_BSP_PATCH=""
-BR2_DOWNLOAD_LINUX26_VERSION="2.6.22.1"
-BR2_LINUX26_VERSION="2.6.22.1"
-BR2_LINUX26_RC_PATCH=""
+# BR2_KERNEL_PREPATCHED is not set
+BR2_KERNEL_BASE=y
+# BR2_KERNEL_LATEST is not set
+BR2_DOWNLOAD_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
+BR2_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
+
+#
+# Linux Kernel Configuration
+#
 BR2_PACKAGE_LINUX_USE_KCONFIG=y
-# BR2_LINUX26_DEFCONFIG is not set
-# BR2_LINUX_CUSTOMIZE is not set
+# BR2_PACKAGE_LINUX_USE_DEFCONFIG is not set
+# BR2_PACKAGE_LINUX_USE_XCONFIG is not set
 # BR2_LINUX_BIN_BZIMAGE is not set
 BR2_LINUX_BIN_UIMAGE=y
 # BR2_LINUX_BIN_VMLINUX is not set
@@ -590,6 +543,7 @@ BR2_LINUX_BIN_UIMAGE=y
 #
 # Destinations for linux kernel binaries
 #
-# BR2_LINUX_IN_ROOTFS is not set
-BR2_LINUX_COPY=y
-BR2_LINUX_COPYTO="/tftpboot"
+BR2_LINUX_COPYTO_ROOTFS=y
+# BR2_LINUX_COPYTO_TFTPBOOT is not set
+BR2_LINUX_COPYTO=""
+# BR2_LINUX_COPY_CONFIGURATION is not set
diff --git a/target/device/Atmel/atngw100-expanded/Makefile.in b/target/device/Atmel/atngw100-expanded/Makefile.in
new file mode 100644
index 000000000..e0534176e
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/Makefile.in
@@ -0,0 +1,6 @@
+ifeq ($(strip $(BR2_TARGET_AVR32_ATNGW100_EXPANDED)),y)
+ATNGW100_EXPANDED_PATH=target/device/Atmel/atngw100-expanded
+
+TARGET_SKELETON=$(ATNGW100_EXPANDED_PATH)/target_skeleton
+TARGET_DEVICE_TABLE=$(ATNGW100_EXPANDED_PATH)/device_table.txt
+endif
diff --git a/target/device/Atmel/atngw100-expanded/atngw100-expanded-linux-2.6.23.config b/target/device/Atmel/atngw100-expanded/atngw100-expanded-linux-2.6.23.config
new file mode 100644
index 000000000..55f71f744
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/atngw100-expanded-linux-2.6.23.config
@@ -0,0 +1,1290 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+# Thu Jan 31 14:02:28 2008
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=m
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_CPU_AT32AP7001 is not set
+# CONFIG_CPU_AT32AP7002 is not set
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_GPIO_DEV=y
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_OWNERSHIP_TRACE=y
+CONFIG_DW_DMAC=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_CMDLINE="4"
+
+#
+# Power managment options
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=m
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_AT32AP=y
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+CONFIG_NF_CONNTRACK_ENABLED=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+CONFIG_NF_CT_PROTO_GRE=m
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_SCH_FIFO=y
+CONFIG_NET_CLS_ROUTE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+CONFIG_CFG80211=m
+CONFIG_WIRELESS_EXT=y
+CONFIG_MAC80211=m
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUGFS is not set
+# CONFIG_MAC80211_DEBUG is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=m
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x80000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_ATMEL_SSC=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_TSDEV=m
+CONFIG_INPUT_TSDEV_SCREEN_X=640
+CONFIG_INPUT_TSDEV_SCREEN_Y=480
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=m
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_UCB1400=m
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_AT32PSIF=y
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_ATMELTWI=m
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=m
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=m
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# AVR32 devices
+#
+CONFIG_SND_ATMEL_AC97=m
+
+#
+# SPI devices
+#
+CONFIG_SND_AT73C213=m
+CONFIG_SND_AT73C213_TARGET_BITRATE=48000
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=m
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+CONFIG_SOUND_AT32_ABDAC=m
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+CONFIG_USB_GADGET_M66592=y
+CONFIG_USB_M66592=y
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_ATMELMCI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=y
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+CONFIG_CONFIGFS_FS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_FORCED_INLINING is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_KPROBES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=m
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atngw100-expanded/atngw100-expanded-linux-2.6.24.config b/target/device/Atmel/atngw100-expanded/atngw100-expanded-linux-2.6.24.config
new file mode 100644
index 000000000..b4ed3ec86
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/atngw100-expanded-linux-2.6.24.config
@@ -0,0 +1,1201 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24
+# Fri Feb  8 10:21:14 2008
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=m
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_GPIO_DEV=y
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+# CONFIG_NMI_DEBUGGING is not set
+CONFIG_DW_DMAC=y
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ=1000
+CONFIG_CMDLINE=""
+
+#
+# Power management options
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_STAT is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+CONFIG_CPU_FREQ_AT32AP=y
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+CONFIG_NF_CONNTRACK_ENABLED=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+CONFIG_NF_CT_PROTO_GRE=m
+# CONFIG_NF_CT_PROTO_SCTP is not set
+CONFIG_NF_CT_PROTO_UDPLITE=m
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_SCH_FIFO=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+CONFIG_CFG80211=m
+CONFIG_NL80211=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_MAC80211=m
+CONFIG_MAC80211_RCSIMPLE=y
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=m
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+CONFIG_MTD_OOPS=y
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x80000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=y
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_MACB=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_DEBUG=y
+# CONFIG_P54_COMMON is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_B43 is not set
+# CONFIG_B43LEGACY is not set
+# CONFIG_RT2X00 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=m
+CONFIG_INPUT_EVBUG=m
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_ADS7846=m
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_UCB1400=m
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+CONFIG_SERIO_AT32PSIF=y
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIO_RAW=y
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_FB_TILEBLITTING=y
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=m
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# AVR32 devices
+#
+CONFIG_SND_ATMEL_AC97=m
+
+#
+# SPI devices
+#
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# Open Sound System
+#
+CONFIG_SOUND_PRIME=m
+# CONFIG_SOUND_MSNDCLAS is not set
+# CONFIG_SOUND_MSNDPIN is not set
+CONFIG_SOUND_AT32_ABDAC=m
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=m
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+CONFIG_SDIO_UART=m
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_ATMELMCI=y
+# CONFIG_MMC_SPI is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_RTC_CLASS is not set
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+# CONFIG_INSTRUMENTATION is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_FORCED_INLINING is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_DEFLATE=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atstk1002/busybox-1.7.2.config b/target/device/Atmel/atngw100-expanded/busybox-1.7.2.config
index bef8649a6..bc1c88cc7 100644
--- a/target/device/Atmel/atstk1002/busybox-1.7.2.config
+++ b/target/device/Atmel/atngw100-expanded/busybox-1.7.2.config
@@ -1,7 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Busybox version: 1.6.1
-# Fri Jul 27 14:57:35 2007
+# Busybox version: 1.7.2
 #
 CONFIG_HAVE_DOT_CONFIG=y
 
@@ -27,13 +26,13 @@ CONFIG_FEATURE_DEVPTS=y
 # CONFIG_FEATURE_CLEAN_UP is not set
 # CONFIG_FEATURE_PIDFILE is not set
 CONFIG_FEATURE_SUID=y
-CONFIG_FEATURE_SYSLOG=y
 # CONFIG_FEATURE_SUID_CONFIG is not set
 # CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
-CONFIG_FEATURE_HAVE_RPC=y
 # CONFIG_SELINUX is not set
 # CONFIG_FEATURE_PREFER_APPLETS is not set
 CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
 
 #
 # Build Options
@@ -62,21 +61,26 @@ CONFIG_INCLUDE_SUSv2=y
 CONFIG_INSTALL_APPLET_SYMLINKS=y
 # CONFIG_INSTALL_APPLET_HARDLINKS is not set
 # CONFIG_INSTALL_APPLET_DONT is not set
-CONFIG_PREFIX="/home/avr32/buildroot/project_build_avr32/atstk1002/root"
+CONFIG_PREFIX="/home/avr32/buildroot/project_build_avr32_nofpu/atngw100/root"
 
 #
 # Busybox Library Tuning
 #
 CONFIG_PASSWORD_MINLEN=6
 CONFIG_MD5_SIZE_VS_SPEED=2
-# CONFIG_FEATURE_EDITING is not set
-# CONFIG_FEATURE_EDITING_FANCY_KEYS is not set
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
 # CONFIG_FEATURE_EDITING_VI is not set
-CONFIG_FEATURE_EDITING_HISTORY=
-# CONFIG_FEATURE_EDITING_SAVEHISTORY is not set
-# CONFIG_FEATURE_TAB_COMPLETION is not set
+CONFIG_FEATURE_EDITING_HISTORY=15
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
 # CONFIG_FEATURE_USERNAME_COMPLETION is not set
 # CONFIG_FEATURE_EDITING_FANCY_PROMPT is not set
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
 
 #
 # Applets
@@ -97,6 +101,7 @@ CONFIG_FEATURE_EDITING_HISTORY=
 # CONFIG_GZIP is not set
 # CONFIG_RPM2CPIO is not set
 # CONFIG_RPM is not set
+# CONFIG_FEATURE_RPM_BZ2 is not set
 CONFIG_TAR=y
 CONFIG_FEATURE_TAR_CREATE=y
 CONFIG_FEATURE_TAR_BZIP2=y
@@ -105,6 +110,7 @@ CONFIG_FEATURE_TAR_LZMA=y
 CONFIG_FEATURE_TAR_GZIP=y
 # CONFIG_FEATURE_TAR_COMPRESS is not set
 # CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set
+# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
 CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
 # CONFIG_FEATURE_TAR_LONG_OPTIONS is not set
 # CONFIG_UNCOMPRESS is not set
@@ -132,7 +138,6 @@ CONFIG_CHMOD=y
 CONFIG_CHOWN=y
 CONFIG_CHROOT=y
 # CONFIG_CKSUM is not set
-CONFIG_CMP=y
 # CONFIG_COMM is not set
 CONFIG_CP=y
 CONFIG_CUT=y
@@ -142,10 +147,6 @@ CONFIG_DD=y
 # CONFIG_FEATURE_DD_SIGNAL_HANDLING is not set
 # CONFIG_FEATURE_DD_IBS_OBS is not set
 CONFIG_DF=y
-# CONFIG_DIFF is not set
-# CONFIG_FEATURE_DIFF_BINARY is not set
-# CONFIG_FEATURE_DIFF_DIR is not set
-# CONFIG_FEATURE_DIFF_MINIMAL is not set
 CONFIG_DIRNAME=y
 CONFIG_DOS2UNIX=y
 CONFIG_UNIX2DOS=y
@@ -155,6 +156,8 @@ CONFIG_ECHO=y
 CONFIG_FEATURE_FANCY_ECHO=y
 CONFIG_ENV=y
 # CONFIG_FEATURE_ENV_LONG_OPTIONS is not set
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
 CONFIG_EXPR=y
 CONFIG_EXPR_MATH_SUPPORT_64=y
 CONFIG_FALSE=y
@@ -190,6 +193,8 @@ CONFIG_NICE=y
 # CONFIG_PRINTENV is not set
 # CONFIG_PRINTF is not set
 CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
 # CONFIG_REALPATH is not set
 CONFIG_RM=y
 CONFIG_RMDIR=y
@@ -219,11 +224,12 @@ CONFIG_TOUCH=y
 CONFIG_TRUE=y
 CONFIG_TTY=y
 CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
 CONFIG_UNIQ=y
 CONFIG_USLEEP=y
 CONFIG_UUDECODE=y
 CONFIG_UUENCODE=y
-# CONFIG_WATCH is not set
 CONFIG_WC=y
 # CONFIG_FEATURE_WC_LARGE is not set
 CONFIG_WHO=y
@@ -273,8 +279,6 @@ CONFIG_SETCONSOLE=y
 #
 CONFIG_MKTEMP=y
 # CONFIG_PIPE_PROGRESS is not set
-CONFIG_READLINK=y
-CONFIG_FEATURE_READLINK_FOLLOW=y
 CONFIG_RUN_PARTS=y
 CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
 # CONFIG_FEATURE_RUN_PARTS_FANCY is not set
@@ -286,12 +290,18 @@ CONFIG_WHICH=y
 #
 # Editors
 #
-# CONFIG_AWK is not set
-# CONFIG_FEATURE_AWK_MATH is not set
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+# CONFIG_CMP is not set
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+# CONFIG_FEATURE_DIFF_MINIMAL is not set
 # CONFIG_ED is not set
 CONFIG_PATCH=y
 CONFIG_SED=y
 CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
 CONFIG_FEATURE_VI_COLON=y
 CONFIG_FEATURE_VI_YANKMARK=y
 CONFIG_FEATURE_VI_SEARCH=y
@@ -314,6 +324,7 @@ CONFIG_FEATURE_FIND_MMIN=y
 CONFIG_FEATURE_FIND_PERM=y
 CONFIG_FEATURE_FIND_TYPE=y
 CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
 CONFIG_FEATURE_FIND_NEWER=y
 CONFIG_FEATURE_FIND_INUM=y
 CONFIG_FEATURE_FIND_EXEC=y
@@ -326,6 +337,8 @@ CONFIG_FEATURE_FIND_SIZE=y
 CONFIG_FEATURE_FIND_PRUNE=y
 CONFIG_FEATURE_FIND_DELETE=y
 CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
 CONFIG_GREP=y
 CONFIG_FEATURE_GREP_EGREP_ALIAS=y
 CONFIG_FEATURE_GREP_FGREP_ALIAS=y
@@ -366,11 +379,14 @@ CONFIG_GETTY=y
 CONFIG_FEATURE_UTMP=y
 # CONFIG_FEATURE_WTMP is not set
 CONFIG_LOGIN=y
+# CONFIG_PAM is not set
 CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
 CONFIG_FEATURE_SECURETTY=y
 CONFIG_PASSWD=y
 CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
 # CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
 CONFIG_SU=y
 CONFIG_FEATURE_SU_SYSLOG=y
 CONFIG_FEATURE_SU_CHECKS_SHELLS=y
@@ -441,6 +457,7 @@ CONFIG_IPCS=y
 CONFIG_MDEV=y
 CONFIG_FEATURE_MDEV_CONF=y
 CONFIG_FEATURE_MDEV_EXEC=y
+# CONFIG_FEATURE_MDEV_LOAD_FIRMWARE is not set
 CONFIG_MKSWAP=y
 # CONFIG_FEATURE_MKSWAP_V0 is not set
 CONFIG_MORE=y
@@ -502,7 +519,6 @@ CONFIG_FEATURE_LESS_REGEXP=y
 # CONFIG_FEATURE_MAKEDEVS_TABLE is not set
 # CONFIG_MOUNTPOINT is not set
 CONFIG_MT=y
-# CONFIG_NMETER is not set
 # CONFIG_RAIDAUTORUN is not set
 # CONFIG_READAHEAD is not set
 # CONFIG_RUNLEVEL is not set
@@ -512,6 +528,7 @@ CONFIG_STRINGS=y
 # CONFIG_TASKSET is not set
 # CONFIG_FEATURE_TASKSET_FANCY is not set
 CONFIG_TIME=y
+# CONFIG_TTYSIZE is not set
 CONFIG_WATCHDOG=y
 
 #
@@ -529,6 +546,7 @@ CONFIG_ARPING=y
 # CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
 CONFIG_HOSTNAME=y
 CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
 CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
 CONFIG_FEATURE_HTTPD_SETUID=y
 CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
@@ -538,6 +556,7 @@ CONFIG_FEATURE_HTTPD_CGI=y
 CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
 CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
 CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
 CONFIG_IFCONFIG=y
 CONFIG_FEATURE_IFCONFIG_STATUS=y
 # CONFIG_FEATURE_IFCONFIG_SLIP is not set
@@ -545,6 +564,7 @@ CONFIG_FEATURE_IFCONFIG_STATUS=y
 CONFIG_FEATURE_IFCONFIG_HW=y
 # CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
 CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
 # CONFIG_FEATURE_IFUPDOWN_IP is not set
 # CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
 CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
@@ -583,8 +603,10 @@ CONFIG_FEATURE_NETSTAT_WIDE=y
 CONFIG_NSLOOKUP=y
 CONFIG_PING=y
 CONFIG_PING6=y
+# CONFIG_PSCAN is not set
 CONFIG_FEATURE_FANCY_PING=y
 CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
 CONFIG_TELNET=y
 CONFIG_FEATURE_TELNET_TTYPE=y
 # CONFIG_FEATURE_TELNET_AUTOLOGIN is not set
@@ -602,8 +624,8 @@ CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
 # CONFIG_APP_UDHCPD is not set
 # CONFIG_APP_DHCPRELAY is not set
 # CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
 CONFIG_APP_UDHCPC=y
-CONFIG_FEATURE_UDHCP_SYSLOG=y
 # CONFIG_FEATURE_UDHCP_DEBUG is not set
 # CONFIG_FEATURE_RFC3397 is not set
 CONFIG_VCONFIG=y
@@ -621,6 +643,7 @@ CONFIG_FREE=y
 CONFIG_KILL=y
 CONFIG_KILLALL=y
 CONFIG_KILLALL5=y
+# CONFIG_NMETER is not set
 CONFIG_PIDOF=y
 CONFIG_FEATURE_PIDOF_SINGLE=y
 CONFIG_FEATURE_PIDOF_OMIT=y
@@ -630,7 +653,10 @@ CONFIG_FEATURE_PS_WIDE=y
 # CONFIG_BB_SYSCTL is not set
 CONFIG_TOP=y
 CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+# CONFIG_FEATURE_TOP_DECIMALS is not set
 CONFIG_UPTIME=y
+CONFIG_WATCH=y
 
 #
 # Shells
@@ -707,10 +733,13 @@ CONFIG_LOGGER=y
 # CONFIG_GETSEBOOL is not set
 # CONFIG_LOAD_POLICY is not set
 # CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
 # CONFIG_RUNCON is not set
 # CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
 # CONFIG_SELINUXENABLED is not set
 # CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
 
 #
 # ipsvd utilities
diff --git a/target/device/Atmel/atngw100-expanded/busybox-1.8.0.config b/target/device/Atmel/atngw100-expanded/busybox-1.8.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/busybox-1.8.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-expanded/busybox-1.9.0.config b/target/device/Atmel/atngw100-expanded/busybox-1.9.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/busybox-1.9.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-expanded/busybox-1.9.1.config b/target/device/Atmel/atngw100-expanded/busybox-1.9.1.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/busybox-1.9.1.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100-expanded/device_table.txt b/target/device/Atmel/atngw100-expanded/device_table.txt
new file mode 100644
index 000000000..618665279
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/device_table.txt
@@ -0,0 +1,181 @@
+# When building a target filesystem, it is desirable to not have to become
+# root and then run 'mknod' a thousand times.  Using a device table you can
+# create device nodes and directories "on the fly".
+#
+# This is a sample device table file for use with genext2fs.  You can do all
+# sorts of interesting things with a device table file.  For example, if you
+# want to adjust the permissions on a particular file you can just add an
+# entry like:
+#   /sbin/foobar        f       2755    0       0       -       -       -       -       -
+# and (assuming the file /sbin/foobar exists) it will be made setuid root
+# (regardless of what its permissions are on the host filesystem.
+# Furthermore, you can use a single table entry to create a many device
+# minors.  For example, if I wanted to create /dev/hda and /dev/hda[0-15] I
+# could just use the following two table entries:
+#   /dev/hda    b       640     0       0       3       0       0       0       -
+#   /dev/hda    b       640     0       0       3       1       1       1       15
+#
+# Device table entries take the form of:
+# <name>    <type>      <mode>  <uid>   <gid>   <major> <minor> <start> <inc>   <count>
+# where name is the file name,  type can be one of:
+#       f       A regular file
+#       d       Directory
+#       c       Character special device file
+#       b       Block special device file
+#       p       Fifo (named pipe)
+# uid is the user id for the target file, gid is the group id for the target
+# file.  The rest of the entries (major, minor, etc) apply only to device
+# special files.
+
+# Have fun
+# -Erik Andersen <andersen@codepoet.org>
+#
+
+#<name>		<type>	<mode>	<uid>	<gid>	<major>	<minor>	<start>	<inc>	<count>
+/dev		d	755	0	0	-	-	-	-	-
+/dev/pts	d	755	0	0	-	-	-	-	-
+/dev/shm	d	755	0	0	-	-	-	-	-
+/tmp		d	1777	0	0	-	-	-	-	-
+/etc		d	755	0	0	-	-	-	-	-
+/sys		d	755	0	0	-	-	-	-	-
+/config		d	755	0	0	-	-	-	-	-
+/proc		d	755	0	0	-	-	-	-	-
+/lost+found	d	700	0	0	-	-	-	-	-
+/var/lock	d	1777	0	0	-	-	-	-	-
+/var/log	d	755	0	0	-	-	-	-	-
+/var/run	d	1777	0	0	-	-	-	-	-
+/var/tmp	d	1777	0	0	-	-	-	-	-
+/home/avr32	d	2755	500	500	-	-	-	-	-
+/home/default	d	2755	1000	1000	-	-	-	-	-
+/media		d	755	0	0	-	-	-	-	-
+/www		d	755	0	0	-	-	-	-	-
+#<name>					<type>	<mode>	<uid>	<gid>	<major>	<minor>	<start>	<inc>	<count>
+/bin/busybox				f	4755	0	0	-	-	-	-	-
+#/etc/shadow				f	600	0	0	-	-	-	-	-
+/etc/passwd				f	644	0	0	-	-	-	-	-
+/etc/network/if-up.d			d	755	0	0	-	-	-	-	-
+/etc/network/if-pre-up.d		d	755	0	0	-	-	-	-	-
+/etc/network/if-down.d			d	755	0	0	-	-	-	-	-
+/etc/network/if-post-down.d		d	755	0	0	-	-	-	-	-
+# uncomment this to allow starting x as non-root
+#/usr/X11R6/bin/Xfbdev		f	4755	0	0	-	-	-	-	-
+# Normal system devices
+#/dev/mem	c	640	0	0	1	1	0	0	-
+#/dev/kmem	c	640	0	0	1	2	0	0	-
+/dev/null	c	666	0	0	1	3	0	0	-
+/dev/zero	c	666	0	0	1	5	0	0	-
+/dev/random	c	666	0	0	1	8	0	0	-
+/dev/urandom	c	666	0	0	1	9	0	0	-
+#/dev/ram	b	640	0	0	1	1	0	0	-
+#/dev/ram	b	640	0	0	1	0	0	1	4
+#/dev/loop	b	640	0	0	7	0	0	1	2
+#/dev/rtc	c	640	0	0	10	135	-	-	-
+/dev/console	c	666	0	0	5	1	-	-	-
+#/dev/tty	c	666	0	0	5	0	-	-	-
+#/dev/tty	c	666	0	0	4	0	0	1	8
+#/dev/ttyp	c	666	0	0	3	0	0	1	10
+#/dev/ptyp	c       666     0       0       2       0       0       1       10
+#/dev/ptmx	c	666	0	0	5	2	-	-	-
+#/dev/ttyP	c	666	0	0	57	0	0	1	4
+/dev/ttyS	c	666	0	0	4	64	0	1	4
+/dev/fb		c	640	0	5	29	0	0	32	4
+#/dev/ttySA	c	666	0	0	204	5	0	1	3
+#/dev/psaux	c	666	0	0	10	1	0	0	-
+#/dev/ppp	c	666	0	0	108	0	-	-	-
+
+# Input stuff
+#/dev/input		d	755	0	0	-	-	-	-	-
+#/dev/input/mice		c	640	0	0	13	63	0	0	-
+#/dev/input/mouse	c	660	0	0	13	32	0	1	4
+#/dev/input/event	c	660	0	0	13	64	0	1	4
+#/dev/input/js		c	660	0	0	13	0	0	1	4
+
+
+# MTD stuff
+#/dev/mtd	c	640	0	0	90	0	0	2	4
+#/dev/mtdblock	b	640	0	0	31	0	0	1	4
+
+#Tun/tap driver
+#/dev/net	d	755	0	0	-	-	-	-	-
+#/dev/net/tun	c	660	0	0	10	200	-	-	-
+
+# Audio stuff
+#/dev/audio	c	666	0	29	14	4	-	-	-
+#/dev/audio1	c	666	0	29	14	20	-	-	-
+#/dev/dsp	c	666	0	29	14	3	-	-	-
+#/dev/dsp1	c	666	0	29	14	19	-	-	-
+#/dev/sndstat	c	666	0	29	14	6	-	-	-
+
+# User-mode Linux stuff
+#/dev/ubda	b	640	0	0	98	0	0	0	-
+#/dev/ubda	b	640	0	0	98	1	1	1	15
+
+# IDE Devices
+#/dev/hda	b	640	0	0	3	0	0	0	-
+#/dev/hda	b	640	0	0	3	1	1	1	15
+#/dev/hdb	b	640	0	0	3	64	0	0	-
+#/dev/hdb	b	640	0	0	3	65	1	1	15
+#/dev/hdc	b	640	0	0	22	0	0	0	-
+#/dev/hdc	b	640	0	0	22	1	1	1	15
+#/dev/hdd	b	640	0	0	22	64	0	0	-
+#/dev/hdd	b	640	0	0	22	65	1	1	15
+#/dev/hde	b	640	0	0	33	0	0	0	-
+#/dev/hde	b	640	0	0	33	1	1	1	15
+#/dev/hdf	b	640	0	0	33	64	0	0	-
+#/dev/hdf	b	640	0	0	33	65	1	1	15
+#/dev/hdg	b	640	0	0	34	0	0	0	-
+#/dev/hdg	b	640	0	0	34	1	1	1	15
+#/dev/hdh	b	640	0	0	34	64	0	0	-
+#/dev/hdh	b	640	0	0	34	65	1	1	15
+
+# SCSI Devices
+#/dev/sda	b	640	0	0	8	0	0	0	-
+#/dev/sda	b	640	0	0	8	1	1	1	15
+#/dev/sdb	b	640	0	0	8	16	0	0	-
+#/dev/sdb	b	640	0	0	8	17	1	1	15
+#/dev/sdc	b	640	0	0	8	32	0	0	-
+#/dev/sdc	b	640	0	0	8	33	1	1	15
+#/dev/sdd	b	640	0	0	8	48	0	0	-
+#/dev/sdd	b	640	0	0	8	49	1	1	15
+#/dev/sde	b	640	0	0	8	64	0	0	-
+#/dev/sde	b	640	0	0	8	65	1	1	15
+#/dev/sdf	b	640	0	0	8	80	0	0	-
+#/dev/sdf	b	640	0	0	8	81	1	1	15
+#/dev/sdg	b	640	0	0	8	96	0	0	-
+#/dev/sdg	b	640	0	0	8	97	1	1	15
+#/dev/sdh	b	640	0	0	8	112	0	0	-
+#/dev/sdh	b	640	0	0	8	113	1	1	15
+#/dev/sg	c	640	0	0	21	0	0	1	15
+#/dev/scd	b	640	0	0	11	0	0	1	15
+#/dev/st	c	640	0	0	9	0	0	1	8
+#/dev/nst	c	640	0	0	9	128	0	1	8
+#/dev/st	c	640	0	0	9	32	1	1	4
+#/dev/st	c	640	0	0	9	64	1	1	4
+#/dev/st	c	640	0	0	9	96	1	1	4
+
+# Floppy disk devices
+#/dev/fd	b	640	0	0	2	0	0	1	2
+#/dev/fd0d360	b	640	0	0	2	4	0	0	-
+#/dev/fd1d360	b	640	0	0	2	5	0	0	-
+#/dev/fd0h1200	b	640	0	0	2	8	0	0	-
+#/dev/fd1h1200	b	640	0	0	2	9	0	0	-
+#/dev/fd0u1440	b	640	0	0	2	28	0	0	-
+#/dev/fd1u1440	b	640	0	0	2	29	0	0	-
+#/dev/fd0u2880	b	640	0	0	2	32	0	0	-
+#/dev/fd1u2880	b	640	0	0	2	33	0	0	-
+
+# All the proprietary cdrom devices in the world
+#/dev/aztcd	b	640	0	0	29	0	0	0	-
+#/dev/bpcd	b	640	0	0	41	0	0	0	-
+#/dev/capi20	c	640	0	0	68	0	0	1	2
+#/dev/cdu31a	b	640	0	0	15	0	0	0	-
+#/dev/cdu535	b	640	0	0	24	0	0	0	-
+#/dev/cm206cd	b	640	0	0	32	0	0	0	-
+#/dev/sjcd	b	640	0	0	18	0	0	0	-
+#/dev/sonycd	b	640	0	0	15	0	0	0	-
+#/dev/gscd	b	640	0	0	16	0	0	0	-
+#/dev/sbpcd	b	640	0	0	25	0	0	0	-
+#/dev/sbpcd	b	640	0	0	25	0	0	1	4
+#/dev/mcd	b	640	0	0	23	0	0	0	-
+#/dev/optcd	b	640	0	0	17	0	0	0	-
+
diff --git a/target/device/Atmel/atngw100-expanded/jffs2_partitions.txt b/target/device/Atmel/atngw100-expanded/jffs2_partitions.txt
new file mode 100644
index 000000000..e7739820d
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/jffs2_partitions.txt
@@ -0,0 +1,7 @@
+# Partition setup for ATNGW100.
+#
+# root is a 8 MB NOR flash.
+# usr is a 8 MB serial DataFlash.
+#
+# <mount point>		<mount name>	<page size>	<erase size>	<cleanmarkers>	<device file>	<pad size>
+/			root		0x1000		0x10000		1		1		0x0
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
new file mode 100644
index 000000000..1f0a5f542
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
@@ -0,0 +1,19857 @@
+ MAINTAINERS                                |    7 +
+ Makefile                                   |    2 +-
+ arch/avr32/Kconfig                         |   34 +-
+ arch/avr32/Makefile                        |    3 +-
+ arch/avr32/boards/atngw100/Kconfig         |   12 +
+ arch/avr32/boards/atngw100/flash.c         |    5 +-
+ arch/avr32/boards/atngw100/setup.c         |   26 +-
+ arch/avr32/boards/atstk1000/Kconfig        |   82 +-
+ arch/avr32/boards/atstk1000/Makefile       |    2 +
+ arch/avr32/boards/atstk1000/atstk1000.h    |    2 +
+ arch/avr32/boards/atstk1000/atstk1002.c    |  148 ++-
+ arch/avr32/boards/atstk1000/atstk1003.c    |  181 +++
+ arch/avr32/boards/atstk1000/atstk1004.c    |  152 +++
+ arch/avr32/boards/atstk1000/flash.c        |    5 +-
+ arch/avr32/boards/atstk1000/setup.c        |   64 +
+ arch/avr32/configs/atngw100_defconfig      |  210 +++-
+ arch/avr32/configs/atstk1002_defconfig     |  482 +++++--
+ arch/avr32/configs/atstk1003_defconfig     | 1045 ++++++++++++++
+ arch/avr32/configs/atstk1004_defconfig     |  722 ++++++++++
+ arch/avr32/drivers/Makefile                |    1 +
+ arch/avr32/drivers/dw-dmac.c               |  761 +++++++++++
+ arch/avr32/drivers/dw-dmac.h               |   42 +
+ arch/avr32/kernel/Makefile                 |    6 +-
+ arch/avr32/kernel/dma-controller.c         |   34 +
+ arch/avr32/kernel/entry-avr32b.S           |   26 +-
+ arch/avr32/kernel/setup.c                  |    2 +-
+ arch/avr32/kernel/vmlinux.lds.S            |  143 ++
+ arch/avr32/kernel/vmlinux.lds.c            |  142 --
+ arch/avr32/mach-at32ap/Kconfig             |   19 +-
+ arch/avr32/mach-at32ap/Makefile            |    5 +-
+ arch/avr32/mach-at32ap/at32ap7000.c        | 1324 ------------------
+ arch/avr32/mach-at32ap/at32ap700x.c        | 1754 ++++++++++++++++++++++++
+ arch/avr32/mach-at32ap/clock.c             |  116 ++
+ arch/avr32/mach-at32ap/gpio-dev.c          |  573 ++++++++
+ arch/avr32/mach-at32ap/hsmc.c              |  129 ++-
+ arch/avr32/mach-at32ap/pio.c               |   80 ++
+ arch/avr32/mach-at32ap/pm.h                |    8 +
+ arch/avr32/mm/dma-coherent.c               |    7 +
+ arch/avr32/mm/init.c                       |   12 +-
+ drivers/char/watchdog/Kconfig              |    2 +-
+ drivers/char/watchdog/at32ap700x_wdt.c     |   69 +-
+ drivers/i2c/busses/Kconfig                 |    8 +
+ drivers/i2c/busses/Makefile                |    1 +
+ drivers/i2c/busses/i2c-atmeltwi.c          |  436 ++++++
+ drivers/i2c/busses/i2c-atmeltwi.h          |  117 ++
+ drivers/misc/Kconfig                       |    9 +
+ drivers/misc/Makefile                      |    1 +
+ drivers/misc/atmel-ssc.c                   |  174 +++
+ drivers/mmc/host/Kconfig                   |   10 +
+ drivers/mmc/host/Makefile                  |    1 +
+ drivers/mmc/host/atmel-mci.c               | 1176 ++++++++++++++++
+ drivers/mmc/host/atmel-mci.h               |  192 +++
+ drivers/mtd/chips/cfi_cmdset_0001.c        |   43 +
+ drivers/mtd/chips/cfi_cmdset_0002.c        |    6 +-
+ drivers/pcmcia/Kconfig                     |    7 +
+ drivers/pcmcia/Makefile                    |    1 +
+ drivers/pcmcia/at32_cf.c                   |  531 ++++++++
+ drivers/pcmcia/cistpl.c                    |   48 +-
+ drivers/spi/atmel_spi.c                    |    4 +-
+ drivers/usb/gadget/Kconfig                 |   26 +-
+ drivers/usb/gadget/Makefile                |    1 +
+ drivers/usb/gadget/atmel_usba_udc.c        | 2038 ++++++++++++++++++++++++++++
+ drivers/usb/gadget/atmel_usba_udc.h        |  350 +++++
+ drivers/video/atmel_lcdfb.c                |    6 +-
+ drivers/video/backlight/Kconfig            |   12 +
+ drivers/video/backlight/Makefile           |    2 +
+ drivers/video/backlight/ltv350qv.c         |  339 +++++
+ drivers/video/backlight/ltv350qv.h         |   95 ++
+ include/asm-avr32/arch-at32ap/at32ap7000.h |   35 -
+ include/asm-avr32/arch-at32ap/at32ap700x.h |   35 +
+ include/asm-avr32/arch-at32ap/board.h      |   39 +
+ include/asm-avr32/arch-at32ap/cpu.h        |    2 +-
+ include/asm-avr32/arch-at32ap/io.h         |    4 +-
+ include/asm-avr32/arch-at32ap/portmux.h    |   13 +
+ include/asm-avr32/arch-at32ap/smc.h        |   51 +-
+ include/asm-avr32/dma-controller.h         |  166 +++
+ include/asm-avr32/dma-mapping.h            |   17 +-
+ include/asm-avr32/system.h                 |   13 +-
+ include/asm-avr32/unistd.h                 |   13 +
+ include/linux/atmel-ssc.h                  |  312 +++++
+ include/linux/spi/at73c213.h               |   25 +
+ include/pcmcia/cs_types.h                  |    2 +-
+ init/do_mounts.c                           |    8 +-
+ scripts/checkstack.pl                      |    5 +
+ sound/Kconfig                              |    6 +
+ sound/Makefile                             |    3 +-
+ sound/avr32/Kconfig                        |   11 +
+ sound/avr32/Makefile                       |    3 +
+ sound/avr32/ac97c.c                        |  914 +++++++++++++
+ sound/avr32/ac97c.h                        |   71 +
+ sound/oss/Kconfig                          |    4 +
+ sound/oss/Makefile                         |    1 +
+ sound/oss/at32_abdac.c                     |  722 ++++++++++
+ sound/oss/at32_abdac.h                     |   59 +
+ sound/spi/Kconfig                          |   31 +
+ sound/spi/Makefile                         |    5 +
+ sound/spi/at73c213.c                       | 1121 +++++++++++++++
+ sound/spi/at73c213.h                       |  119 ++
+ 98 files changed, 16057 insertions(+), 1826 deletions(-)
+ create mode 100644 arch/avr32/boards/atngw100/Kconfig
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c
+ create mode 100644 arch/avr32/configs/atstk1003_defconfig
+ create mode 100644 arch/avr32/configs/atstk1004_defconfig
+ create mode 100644 arch/avr32/drivers/Makefile
+ create mode 100644 arch/avr32/drivers/dw-dmac.c
+ create mode 100644 arch/avr32/drivers/dw-dmac.h
+ create mode 100644 arch/avr32/kernel/dma-controller.c
+ create mode 100644 arch/avr32/kernel/vmlinux.lds.S
+ delete mode 100644 arch/avr32/kernel/vmlinux.lds.c
+ delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c
+ create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c
+ create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h
+ create mode 100644 drivers/misc/atmel-ssc.c
+ create mode 100644 drivers/mmc/host/atmel-mci.c
+ create mode 100644 drivers/mmc/host/atmel-mci.h
+ create mode 100644 drivers/pcmcia/at32_cf.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.h
+ create mode 100644 drivers/video/backlight/ltv350qv.c
+ create mode 100644 drivers/video/backlight/ltv350qv.h
+ delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h
+ create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h
+ create mode 100644 include/asm-avr32/dma-controller.h
+ create mode 100644 include/linux/atmel-ssc.h
+ create mode 100644 include/linux/spi/at73c213.h
+ create mode 100644 sound/avr32/Kconfig
+ create mode 100644 sound/avr32/Makefile
+ create mode 100644 sound/avr32/ac97c.c
+ create mode 100644 sound/avr32/ac97c.h
+ create mode 100644 sound/oss/at32_abdac.c
+ create mode 100644 sound/oss/at32_abdac.h
+ create mode 100644 sound/spi/Kconfig
+ create mode 100644 sound/spi/Makefile
+ create mode 100644 sound/spi/at73c213.c
+ create mode 100644 sound/spi/at73c213.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 9a91d9e..587afe3 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -669,6 +669,13 @@ P:	Haavard Skinnemoen
+ M:	hskinnemoen@atmel.com
+ S:	Supported
+ 
++ATMEL USBA UDC DRIVER
++P:	Haavard Skinnemoen
++M:	hskinnemoen@atmel.com
++L:	kernel@avr32linux.org
++W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
++S:	Supported
++
+ ATMEL WIRELESS DRIVER
+ P:	Simon Kelley
+ M:	simon@thekelleys.org.uk
+diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
+index d12346a..62913a4 100644
+--- a/arch/avr32/Kconfig
++++ b/arch/avr32/Kconfig
+@@ -87,19 +87,36 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
++config CPU_AT32AP700X
++	bool
++	select PLATFORM_AT32AP
++
+ choice
+ 	prompt "AVR32 CPU type"
+ 	default CPU_AT32AP7000
+ 
+ config CPU_AT32AP7000
+ 	bool "AT32AP7000"
+-	select PLATFORM_AT32AP
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7001
++	bool "AT32AP7001"
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7002
++	bool "AT32AP7002"
++	select CPU_AT32AP700X
++
+ endchoice
+ 
+ #
+ # CPU Daughterboards for ATSTK1000
+ config BOARD_ATSTK1002
+ 	bool
++config BOARD_ATSTK1003
++	bool
++config BOARD_ATSTK1004
++	bool
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -108,6 +125,8 @@ choice
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+ 	select BOARD_ATSTK1002 if CPU_AT32AP7000
++	select BOARD_ATSTK1003 if CPU_AT32AP7001
++	select BOARD_ATSTK1004 if CPU_AT32AP7002
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
+@@ -116,6 +135,9 @@ endchoice
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -129,15 +151,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -175,6 +197,10 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
+index dc6bc01..96f0030 100644
+--- a/arch/avr32/Makefile
++++ b/arch/avr32/Makefile
+@@ -16,7 +16,7 @@ AFLAGS		+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ CFLAGS		+= $(cpuflags-y)
+ AFLAGS		+= $(cpuflags-y)
+@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/avr32/boards/atngw100/
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
+new file mode 100644
+index 0000000..5d922df
+--- /dev/null
++++ b/arch/avr32/boards/atngw100/Kconfig
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
+index f9b32a8..b07ae63 100644
+--- a/arch/avr32/boards/atngw100/flash.c
++++ b/arch/avr32/boards/atngw100/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+index ef80156..2a5f587 100644
+--- a/arch/avr32/boards/atngw100/setup.c
++++ b/arch/avr32/boards/atngw100/setup.c
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = {
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+-	.sda_pin	= GPIO_PIN_PA(6),
+-	.scl_pin	= GPIO_PIN_PA(7),
++	.sda_pin		= GPIO_PIN_PA(6),
++	.scl_pin		= GPIO_PIN_PA(7),
++	.sda_is_open_drain	= 1,
++	.scl_is_open_drain	= 1,
++	.udelay			= 2,	/* close to 100 kHz */
+ };
+ 
+ static struct platform_device i2c_gpio_device = {
+@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = {
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -154,6 +164,8 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
++	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+@@ -161,9 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
+-	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
+-	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
++	at32_select_gpio(i2c_gpio_data.sda_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
++	at32_select_gpio(i2c_gpio_data.scl_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 718578f..aac73a6 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -1,34 +1,34 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +36,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +66,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile
+index 8e09922..beead86 100644
+--- a/arch/avr32/boards/atstk1000/Makefile
++++ b/arch/avr32/boards/atstk1000/Makefile
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h
+index 9a49ed0..9392d32 100644
+--- a/arch/avr32/boards/atstk1000/atstk1000.h
++++ b/arch/avr32/boards/atstk1000/atstk1000.h
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index c9981b7..d30de89 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -11,17 +11,17 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+ #include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -48,8 +48,24 @@ static struct eth_platform_data __initdata eth_data[2] = {
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
+ 	{
+ 		/* QVGA display */
+ 		.modalias	= "ltv350qv",
+@@ -60,12 +76,30 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_NONE,
++	.wp_pin		= GPIO_PIN_NONE,
++};
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -121,68 +155,44 @@ static void __init set_hw_addr(struct platform_device *pdev)
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
+ }
+-
+ #else
+-static void setup_j2_leds(void)
++static void __init atstk1002_setup_extdac(void)
+ {
++
+ }
+-#endif
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -219,7 +229,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -229,23 +239,35 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, &mci0_data);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+ 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
+ 			     fbmem_start, fbmem_size);
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 
+-	setup_j2_leds();
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+new file mode 100644
+index 0000000..1842b7c
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1002_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1002_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1002_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+new file mode 100644
+index 0000000..96015dd
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
+index aac4300..3d0a102 100644
+--- a/arch/avr32/boards/atstk1000/flash.c
++++ b/arch/avr32/boards/atstk1000/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
+index c9af409..8bedf93 100644
+--- a/arch/avr32/boards/atstk1000/setup.c
++++ b/arch/avr32/boards/atstk1000/setup.c
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
+index b799a68..ca4538b 100644
+--- a/arch/avr32/configs/atngw100_defconfig
++++ b/arch/avr32/configs/atngw100_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.22.atmel.1
++# Thu Jul 12 17:49:20 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -111,17 +111,22 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
++# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -145,6 +150,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -153,6 +159,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -187,13 +214,8 @@ CONFIG_NET_KEY=y
+ # CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ CONFIG_IP_MULTICAST=y
+-CONFIG_IP_ADVANCED_ROUTER=y
+-CONFIG_ASK_IP_FIB_HASH=y
+-# CONFIG_IP_FIB_TRIE is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
+ CONFIG_IP_FIB_HASH=y
+-# CONFIG_IP_MULTIPLE_TABLES is not set
+-# CONFIG_IP_ROUTE_MULTIPATH is not set
+-# CONFIG_IP_ROUTE_VERBOSE is not set
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+@@ -240,6 +262,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -284,6 +307,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -359,13 +383,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -521,7 +551,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # Misc devices
+ #
+-# CONFIG_BLINK is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -545,13 +574,26 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ 
+ #
+ # Ethernet (10 or 100Mbit)
+ #
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -625,7 +667,15 @@ CONFIG_UNIX98_PTYS=y
+ # IPMI
+ #
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++CONFIG_AT32AP700X_WDT_TIMEOUT=2
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+@@ -636,7 +686,42 @@ CONFIG_UNIX98_PTYS=y
+ # TPM devices
+ #
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_ATMELTWI_BAUDRATE=100000
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,7 +740,7 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
+ 
+ #
+ # Dallas's 1-wire bus
+@@ -706,8 +791,41 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
+ 
+ #
+ # LED devices
+@@ -727,27 +845,62 @@ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+ 
++#
++# InfiniBand support
++#
+ 
+ #
+-# LED drivers
++# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+ #
+ 
+ #
+-# LED Triggers
++# Real Time Clock
+ #
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -781,7 +934,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -936,7 +1090,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+-# CONFIG_DEBUG_FS is not set
++CONFIG_DEBUG_FS=y
+ # CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
+index 3b977fd..c3d4c33 100644
+--- a/arch/avr32/configs/atstk1002_defconfig
++++ b/arch/avr32/configs/atstk1002_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.23.atmel.1
++# Tue Oct 16 12:57:22 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -18,20 +18,15 @@ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+@@ -39,7 +34,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
+ CONFIG_TASKSTATS=y
+ CONFIG_TASK_DELAY_ACCT=y
+ # CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
+ CONFIG_AUDIT=y
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
+@@ -63,7 +58,6 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+@@ -74,24 +68,17 @@ CONFIG_SLUB=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+-# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+-# CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
++CONFIG_KMOD=y
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +86,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -114,17 +101,27 @@ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002_CUSTOM is not set
++# CONFIG_BOARD_ATSTK1002_SPI1 is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1002_J2_RGB is not set
++# CONFIG_BOARD_ATSTK1002_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1002_CF_HACKS is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -147,7 +144,9 @@ CONFIG_FLAT_NODE_MEM_MAP=y
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -156,6 +155,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -163,7 +183,16 @@ CONFIG_CMDLINE=""
+ #
+ # PCCARD (PCMCIA/CardBus) support
+ #
+-# CONFIG_PCCARD is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++# CONFIG_PCMCIA_LOAD_CIS is not set
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
+ 
+ #
+ # Executable file formats
+@@ -251,6 +280,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -265,10 +295,6 @@ CONFIG_STANDALONE=y
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -327,6 +353,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +373,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,11 +385,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -381,29 +395,34 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ CONFIG_DUMMY=y
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++CONFIG_LXT_PHY=y
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -413,6 +432,7 @@ CONFIG_MACB=y
+ #
+ # CONFIG_WLAN_PRE80211 is not set
+ # CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
+ # CONFIG_WAN is not set
+ CONFIG_PPP=m
+ # CONFIG_PPP_MULTILINK is not set
+@@ -423,27 +443,56 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_TSDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,34 +521,88 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# IPMI
++# Watchdog Device Drivers
+ #
+-# CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+-# CONFIG_RAW_DRIVER is not set
+ 
+ #
+-# TPM devices
++# PCMCIA character devices
+ #
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
+ 
+ #
+@@ -517,26 +620,110 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+ # CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
+-# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
+ 
+ #
+ # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+@@ -545,34 +732,108 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=m
+ 
+ #
+-# LED devices
++# LED Triggers
+ #
+-# CONFIG_NEW_LEDS is not set
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# LED Triggers
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# InfiniBand support
++# SPI RTC drivers
+ #
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# Platform RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# Real Time Clock
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -588,13 +849,21 @@ CONFIG_UNIX98_PTYS=y
+ #
+ 
+ #
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
+ # File systems
+ #
+-CONFIG_EXT2_FS=m
++CONFIG_EXT2_FS=y
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +878,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -638,7 +907,7 @@ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+ CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++CONFIG_CONFIGFS_FS=y
+ 
+ #
+ # Miscellaneous filesystems
+@@ -683,12 +952,17 @@ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+ # CONFIG_RPCSEC_GSS_KRB5 is not set
+ # CONFIG_RPCSEC_GSS_SPKM3 is not set
+-# CONFIG_SMB_FS is not set
+-# CONFIG_CIFS is not set
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+@@ -758,6 +1032,7 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+@@ -782,10 +1057,6 @@ CONFIG_FORCED_INLINING=y
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+ # CONFIG_CRYPTO is not set
+ 
+ #
+@@ -796,6 +1067,7 @@ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+ # CONFIG_CRC_ITU_T is not set
+ CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
+new file mode 100644
+index 0000000..0dc834f
+--- /dev/null
++++ b/arch/avr32/configs/atstk1003_defconfig
+@@ -0,0 +1,1045 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 10:58:37 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++CONFIG_DEFAULT_NOOP=y
++CONFIG_DEFAULT_IOSCHED="noop"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++CONFIG_CPU_AT32AP7001=y
++# CONFIG_CPU_AT32AP7002 is not set
++CONFIG_BOARD_ATSTK1003=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++CONFIG_PCMCIA_LOAD_CIS=y
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++# CONFIG_BLK_DEV_SD is not set
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++
++#
++# PCMCIA character devices
++#
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++CONFIG_SOUND_PRIME=m
++# CONFIG_SOUND_MSNDCLAS is not set
++# CONFIG_SOUND_MSNDPIN is not set
++CONFIG_SOUND_AT32_ABDAC=m
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=y
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++# CONFIG_NFS_FS is not set
++# CONFIG_NFSD is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_KPROBES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
+new file mode 100644
+index 0000000..b002a46
+--- /dev/null
++++ b/arch/avr32/configs/atstk1004_defconfig
+@@ -0,0 +1,722 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 11:07:19 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++# CONFIG_CPU_AT32AP7001 is not set
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1004=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_BLK_DEV is not set
++# CONFIG_MISC_DEVICES is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_WATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4DEV_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++# CONFIG_MSDOS_FS is not set
++# CONFIG_VFAT_FS is not set
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile
+new file mode 100644
+index 0000000..b429b75
+--- /dev/null
++++ b/arch/avr32/drivers/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c
+new file mode 100644
+index 0000000..224eb30
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.c
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h
+new file mode 100644
+index 0000000..1f67921
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.h
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
+index 90e5aff..1aedaeb 100644
+--- a/arch/avr32/kernel/Makefile
++++ b/arch/avr32/kernel/Makefile
+@@ -9,10 +9,6 @@ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+ obj-y				+= setup.o traps.o semaphore.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+-
+-USE_STANDARD_AS_RULE		:= true
+-
+-%.lds: %.lds.c FORCE
+-	$(call if_changed_dep,cpp_lds_S)
+diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c
+new file mode 100644
+index 0000000..fb654b3
+--- /dev/null
++++ b/arch/avr32/kernel/dma-controller.c
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
+index 42657f1..ccadfd9 100644
+--- a/arch/avr32/kernel/entry-avr32b.S
++++ b/arch/avr32/kernel/entry-avr32b.S
+@@ -159,11 +159,18 @@ handle_vmalloc_miss:
+ 
+ 	.section .scall.text,"ax",@progbits
+ system_call:
++#ifdef CONFIG_PREEMPT
++	mask_interrupts
++#endif
+ 	pushm	r12		/* r12_orig */
+ 	stmts	--sp, r0-lr
+-	zero_fp
++
+ 	mfsr	r0, SYSREG_RAR_SUP
+ 	mfsr	r1, SYSREG_RSR_SUP
++#ifdef CONFIG_PREEMPT
++	unmask_interrupts
++#endif
++	zero_fp
+ 	stm	--sp, r0-r1
+ 
+ 	/* check for syscall tracing */
+@@ -638,6 +645,13 @@ irq_level\level:
+ 	stmts	--sp,r0-lr
+ 	mfsr	r8, rar_int\level
+ 	mfsr	r9, rsr_int\level
++
++#ifdef CONFIG_PREEMPT
++	sub	r11, pc, (. - system_call)
++	cp.w	r11, r8
++	breq	4f
++#endif
++
+ 	pushm	r8-r9
+ 
+ 	mov	r11, sp
+@@ -668,6 +682,16 @@ irq_level\level:
+ 	sub	sp, -4		/* ignore r12_orig */
+ 	rete
+ 
++#ifdef CONFIG_PREEMPT
++4:	mask_interrupts
++	mfsr	r8, rsr_int\level
++	sbr	r8, 16
++	mtsr	rsr_int\level, r8
++	ldmts	sp++, r0-lr
++	sub	sp, -4		/* ignore r12_orig */
++	rete
++#endif
++
+ 2:	get_thread_info	r0
+ 	ld.w	r1, r0[TI_flags]
+ 	bld	r1, TIF_CPU_GOING_TO_SLEEP
+diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
+index d08b0bc..4b4c188 100644
+--- a/arch/avr32/kernel/setup.c
++++ b/arch/avr32/kernel/setup.c
+@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
+ 
+ 	fbmem_size = memparse(p, &p);
+ 	if (*p == '@') {
+-		fbmem_start = memparse(p, &p);
++		fbmem_start = memparse(p + 1, &p);
+ 		ret = add_reserved_region(fbmem_start,
+ 					  fbmem_start + fbmem_size - 1,
+ 					  "Framebuffer");
+diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S
+new file mode 100644
+index 0000000..ce9ac96
+--- /dev/null
++++ b/arch/avr32/kernel/vmlinux.lds.S
+@@ -0,0 +1,143 @@
++/*
++ * AVR32 linker script for the Linux kernel
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#define LOAD_OFFSET 0x00000000
++#include <asm-generic/vmlinux.lds.h>
++#include <asm/cache.h>
++#include <asm/thread_info.h>
++
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++/* Big endian */
++jiffies = jiffies_64 + 4;
++
++SECTIONS
++{
++	. = CONFIG_ENTRY_ADDRESS;
++	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
++		_stext = .;
++		__init_begin = .;
++			_sinittext = .;
++			*(.text.reset)
++			*(.init.text)
++			/*
++			 * .exit.text is discarded at runtime, not
++			 * link time, to deal with references from
++			 * __bug_table
++			 */
++			*(.exit.text)
++			_einittext = .;
++		. = ALIGN(4);
++		__tagtable_begin = .;
++			*(.taglist.init)
++		__tagtable_end = .;
++			*(.init.data)
++		. = ALIGN(16);
++		__setup_start = .;
++			*(.init.setup)
++		__setup_end = .;
++		. = ALIGN(4);
++		__initcall_start = .;
++			INITCALLS
++		__initcall_end = .;
++		__con_initcall_start = .;
++			*(.con_initcall.init)
++		__con_initcall_end = .;
++		__security_initcall_start = .;
++			*(.security_initcall.init)
++		__security_initcall_end = .;
++#ifdef CONFIG_BLK_DEV_INITRD
++		. = ALIGN(32);
++		__initramfs_start = .;
++			*(.init.ramfs)
++		__initramfs_end = .;
++#endif
++		. = ALIGN(PAGE_SIZE);
++		__init_end = .;
++	}
++
++	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
++		_evba = .;
++		_text = .;
++		*(.ex.text)
++		. = 0x50;
++		*(.tlbx.ex.text)
++		. = 0x60;
++		*(.tlbr.ex.text)
++		. = 0x70;
++		*(.tlbw.ex.text)
++		. = 0x100;
++		*(.scall.text)
++		*(.irq.text)
++		TEXT_TEXT
++		SCHED_TEXT
++		LOCK_TEXT
++		KPROBES_TEXT
++		*(.fixup)
++		*(.gnu.warning)
++		_etext = .;
++	} = 0xd703d703
++
++	. = ALIGN(4);
++	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
++		__start___ex_table = .;
++		*(__ex_table)
++		__stop___ex_table = .;
++	}
++
++	BUG_TABLE
++
++	RODATA
++
++	. = ALIGN(THREAD_SIZE);
++
++	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
++		_data = .;
++		_sdata = .;
++		/*
++		 * First, the init task union, aligned to an 8K boundary.
++		 */
++		*(.data.init_task)
++
++		/* Then, the cacheline aligned data */
++		. = ALIGN(L1_CACHE_BYTES);
++		*(.data.cacheline_aligned)
++
++		/* And the rest... */
++		*(.data.rel*)
++		DATA_DATA
++		CONSTRUCTORS
++
++		_edata = .;
++	}
++
++
++	. = ALIGN(8);
++	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
++		__bss_start = .;
++		*(.bss)
++		*(COMMON)
++		. = ALIGN(8);
++		__bss_stop = .;
++		_end = .;
++	}
++
++	/* When something in the kernel is NOT compiled as a module, the module
++	 * cleanup code and data are put into these segments. Both can then be
++	 * thrown away, as cleanup code is never called unless it's a module.
++	 */
++	/DISCARD/       	: {
++		*(.exit.data)
++		*(.exitcall.exit)
++	}
++
++	DWARF_DEBUG
++}
+diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
+deleted file mode 100644
+index db0438f..0000000
+--- a/arch/avr32/kernel/vmlinux.lds.c
++++ /dev/null
+@@ -1,142 +0,0 @@
+-/*
+- * AVR32 linker script for the Linux kernel
+- *
+- * Copyright (C) 2004-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#define LOAD_OFFSET 0x00000000
+-#include <asm-generic/vmlinux.lds.h>
+-
+-OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+-OUTPUT_ARCH(avr32)
+-ENTRY(_start)
+-
+-/* Big endian */
+-jiffies = jiffies_64 + 4;
+-
+-SECTIONS
+-{
+-	. = CONFIG_ENTRY_ADDRESS;
+-	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
+-		_stext = .;
+-		__init_begin = .;
+-			_sinittext = .;
+-			*(.text.reset)
+-			*(.init.text)
+-			/*
+-			 * .exit.text is discarded at runtime, not
+-			 * link time, to deal with references from
+-			 * __bug_table
+-			 */
+-			*(.exit.text)
+-			_einittext = .;
+-		. = ALIGN(4);
+-		__tagtable_begin = .;
+-			*(.taglist.init)
+-		__tagtable_end = .;
+-			*(.init.data)
+-		. = ALIGN(16);
+-		__setup_start = .;
+-			*(.init.setup)
+-		__setup_end = .;
+-		. = ALIGN(4);
+-		__initcall_start = .;
+-			INITCALLS
+-		__initcall_end = .;
+-		__con_initcall_start = .;
+-			*(.con_initcall.init)
+-		__con_initcall_end = .;
+-		__security_initcall_start = .;
+-			*(.security_initcall.init)
+-		__security_initcall_end = .;
+-#ifdef CONFIG_BLK_DEV_INITRD
+-		. = ALIGN(32);
+-		__initramfs_start = .;
+-			*(.init.ramfs)
+-		__initramfs_end = .;
+-#endif
+-		. = ALIGN(4096);
+-		__init_end = .;
+-	}
+-
+-	. = ALIGN(8192);
+-	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
+-		_evba = .;
+-		_text = .;
+-		*(.ex.text)
+-		. = 0x50;
+-		*(.tlbx.ex.text)
+-		. = 0x60;
+-		*(.tlbr.ex.text)
+-		. = 0x70;
+-		*(.tlbw.ex.text)
+-		. = 0x100;
+-		*(.scall.text)
+-		*(.irq.text)
+-		TEXT_TEXT
+-		SCHED_TEXT
+-		LOCK_TEXT
+-		KPROBES_TEXT
+-		*(.fixup)
+-		*(.gnu.warning)
+-		_etext = .;
+-	} = 0xd703d703
+-
+-	. = ALIGN(4);
+-	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
+-		__start___ex_table = .;
+-		*(__ex_table)
+-		__stop___ex_table = .;
+-	}
+-
+-	BUG_TABLE
+-
+-	RODATA
+-
+-	. = ALIGN(8192);
+-
+-	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
+-		_data = .;
+-		_sdata = .;
+-		/*
+-		 * First, the init task union, aligned to an 8K boundary.
+-		 */
+-		*(.data.init_task)
+-
+-		/* Then, the cacheline aligned data */
+-		. = ALIGN(32);
+-		*(.data.cacheline_aligned)
+-
+-		/* And the rest... */
+-		*(.data.rel*)
+-		DATA_DATA
+-		CONSTRUCTORS
+-
+-		_edata = .;
+-	}
+-
+-
+-	. = ALIGN(8);
+-	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
+-		__bss_start = .;
+-		*(.bss)
+-		*(COMMON)
+-		. = ALIGN(8);
+-		__bss_stop = .;
+-		_end = .;
+-	}
+-
+-	/* When something in the kernel is NOT compiled as a module, the module
+-	 * cleanup code and data are put into these segments. Both can then be
+-	 * thrown away, as cleanup code is never called unless it's a module.
+-	 */
+-	/DISCARD/       	: {
+-		*(.exit.data)
+-		*(.exitcall.exit)
+-	}
+-
+-	DWARF_DEBUG
+-}
+diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
+index eb30783..0eb590a 100644
+--- a/arch/avr32/mach-at32ap/Kconfig
++++ b/arch/avr32/mach-at32ap/Kconfig
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
+index a8b4450..0f6162e 100644
+--- a/arch/avr32/mach-at32ap/Makefile
++++ b/arch/avr32/mach-at32ap/Makefile
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
+deleted file mode 100644
+index 64cc558..0000000
+--- a/arch/avr32/mach-at32ap/at32ap7000.c
++++ /dev/null
+@@ -1,1324 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-/*
+- * We can reduce the code size a bit by using a constant here. Since
+- * this file is completely chip-specific, it's safe to not use
+- * ioremap. Generic drivers should of course never do this.
+- */
+-#define AT32_PM_BASE	0xfff00000
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000bf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+new file mode 100644
+index 0000000..7fd93a5
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -0,0 +1,1754 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 4);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
+index 0f8c89c..4642117 100644
+--- a/arch/avr32/mach-at32ap/clock.c
++++ b/arch/avr32/mach-at32ap/clock.c
+@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
+ 	return clk->parent;
+ }
+ EXPORT_SYMBOL(clk_get_parent);
++
++
++
++#ifdef CONFIG_DEBUG_FS
++
++/* /sys/kernel/debug/at32ap_clk */
++
++#include <linux/io.h>
++#include <linux/debugfs.h>
++#include <linux/seq_file.h>
++#include "pm.h"
++
++
++#define	NEST_DELTA	2
++#define	NEST_MAX	6
++
++struct clkinf {
++	struct seq_file	*s;
++	unsigned	nest;
++};
++
++static void
++dump_clock(struct clk *parent, struct clkinf *r)
++{
++	unsigned	nest = r->nest;
++	char		buf[16 + NEST_MAX];
++	struct clk	*clk;
++	unsigned	i;
++
++	/* skip clocks coupled to devices that aren't registered */
++	if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
++		return;
++
++	/* <nest spaces> name <pad to end> */
++	memset(buf, ' ', sizeof(buf) - 1);
++	buf[sizeof(buf) - 1] = 0;
++	i = strlen(parent->name);
++	memcpy(buf + nest, parent->name,
++			min(i, (unsigned)(sizeof(buf) - 1 - nest)));
++
++	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
++		buf, parent->set_parent ? '*' : ' ',
++		parent->users,
++		parent->users ? "on" : "off",	/* NOTE: not-paranoid!! */
++		clk_get_rate(parent));
++	if (parent->dev)
++		seq_printf(r->s, ", for %s", parent->dev->bus_id);
++	seq_printf(r->s, "\n");
++
++	/* cost of this scan is small, but not linear... */
++	r->nest = nest + NEST_DELTA;
++	for (i = 3; i < at32_nr_clocks; i++) {
++		clk = at32_clock_list[i];
++		if (clk->parent == parent)
++			dump_clock(clk, r);
++	}
++	r->nest = nest;
++}
++
++static int clk_show(struct seq_file *s, void *unused)
++{
++	struct clkinf	r;
++	int		i;
++
++	/* show all the power manager registers */
++	seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
++	seq_printf(s, "CKSEL   = %8x\n", pm_readl(CKSEL));
++	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
++	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
++	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
++	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
++	seq_printf(s, "PLL0    = %8x\n", pm_readl(PLL0));
++	seq_printf(s, "PLL1    = %8x\n", pm_readl(PLL1));
++	seq_printf(s, "IMR     = %8x\n", pm_readl(IMR));
++	for (i = 0; i < 8; i++) {
++		if (i == 5)
++			continue;
++		seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
++	}
++
++	seq_printf(s, "\n");
++
++	/* show clock tree as derived from the three oscillators
++	 * we "know" are at the head of the list
++	 */
++	r.s = s;
++	r.nest = 0;
++	dump_clock(at32_clock_list[0], &r);
++	dump_clock(at32_clock_list[1], &r);
++	dump_clock(at32_clock_list[2], &r);
++
++	return 0;
++}
++
++static int clk_open(struct inode *inode, struct file *file)
++{
++	return single_open(file, clk_show, NULL);
++}
++
++static const struct file_operations clk_operations = {
++	.open		= clk_open,
++	.read		= seq_read,
++	.llseek		= seq_lseek,
++	.release	= single_release,
++};
++
++static int __init clk_debugfs_init(void)
++{
++	(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
++			NULL, NULL, &clk_operations);
++
++	return 0;
++}
++postcore_initcall(clk_debugfs_init);
++
++#endif
+diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c
+new file mode 100644
+index 0000000..8cf6d11
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/gpio-dev.c
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
+index 5e22a75..704607f 100644
+--- a/arch/avr32/mach-at32ap/hsmc.c
++++ b/arch/avr32/mach-at32ap/hsmc.c
+@@ -29,16 +29,25 @@ struct hsmc {
+ 
+ static struct hsmc *hsmc;
+ 
+-int smc_set_configuration(int cs, const struct smc_config *config)
++void smc_set_timing(struct smc_config *config,
++		    const struct smc_timing *timing)
+ {
++	int recover;
++	int cycle;
++
+ 	unsigned long mul;
+-	unsigned long offset;
+-	u32 setup, pulse, cycle, mode;
+ 
+-	if (!hsmc)
+-		return -ENODEV;
+-	if (cs >= NR_CHIP_SELECTS)
+-		return -EINVAL;
++	/* Reset all SMC timings */
++	config->ncs_read_setup	= 0;
++	config->nrd_setup	= 0;
++	config->ncs_write_setup	= 0;
++	config->nwe_setup	= 0;
++	config->ncs_read_pulse	= 0;
++	config->nrd_pulse	= 0;
++	config->ncs_write_pulse	= 0;
++	config->nwe_pulse	= 0;
++	config->read_cycle	= 0;
++	config->write_cycle	= 0;
+ 
+ 	/*
+ 	 * cycles = x / T = x * f
+@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
+ 
+ #define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
+ 
+-	setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup))
+-		 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup))
+-		 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup))
+-		 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup)));
+-	pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse))
+-		 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse))
+-		 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse))
+-		 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse)));
+-	cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle))
+-		 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle)));
++	if (timing->ncs_read_setup > 0)
++		config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
++
++	if (timing->nrd_setup > 0)
++		config->nrd_setup = ns2cyc(timing->nrd_setup);
++
++	if (timing->ncs_write_setup > 0)
++		config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
++
++	if (timing->nwe_setup > 0)
++		config->nwe_setup = ns2cyc(timing->nwe_setup);
++
++	if (timing->ncs_read_pulse > 0)
++		config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
++
++	if (timing->nrd_pulse > 0)
++		config->nrd_pulse = ns2cyc(timing->nrd_pulse);
++
++	if (timing->ncs_write_pulse > 0)
++		config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
++
++	if (timing->nwe_pulse > 0)
++		config->nwe_pulse = ns2cyc(timing->nwe_pulse);
++
++	if (timing->read_cycle > 0)
++		config->read_cycle = ns2cyc(timing->read_cycle);
++
++	if (timing->write_cycle > 0)
++		config->write_cycle = ns2cyc(timing->write_cycle);
++
++	/* Extend read cycle in needed */
++	if (timing->ncs_read_recover > 0)
++		recover = ns2cyc(timing->ncs_read_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend read cycle in needed */
++	if (timing->nrd_recover > 0)
++		recover = ns2cyc(timing->nrd_recover);
++	else
++		recover = 1;
++
++	cycle = config->nrd_setup + config->nrd_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->ncs_write_recover > 0)
++		recover = ns2cyc(timing->ncs_write_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->nwe_recover > 0)
++		recover = ns2cyc(timing->nwe_recover);
++	else
++		recover = 1;
++
++	cycle = config->nwe_setup + config->nwe_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++}
++EXPORT_SYMBOL(smc_set_timing);
++
++int smc_set_configuration(int cs, const struct smc_config *config)
++{
++	unsigned long offset;
++	u32 setup, pulse, cycle, mode;
++
++	if (!hsmc)
++		return -ENODEV;
++	if (cs >= NR_CHIP_SELECTS)
++		return -EINVAL;
++
++	setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
++		 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
++		 | HSMC_BF(NRD_SETUP, config->nrd_setup)
++		 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
++	pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
++		 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
++		 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
++		 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
++	cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
++		 | HSMC_BF(NRD_CYCLE, config->read_cycle));
+ 
+ 	switch (config->bus_width) {
+ 	case 1:
+diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
+index 1eb99b8..c978c36 100644
+--- a/arch/avr32/mach-at32ap/pio.c
++++ b/arch/avr32/mach-at32ap/pio.c
+@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
+ 			pio_writel(pio, SODR, mask);
+ 		else
+ 			pio_writel(pio, CODR, mask);
++		if (flags & AT32_GPIOF_MULTIDRV)
++			pio_writel(pio, MDER, mask);
++		else
++			pio_writel(pio, MDDR, mask);
+ 		pio_writel(pio, PUDR, mask);
+ 		pio_writel(pio, OER, mask);
+ 	} else {
+@@ -158,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
+index a1f8ace..47efd0d 100644
+--- a/arch/avr32/mach-at32ap/pm.h
++++ b/arch/avr32/mach-at32ap/pm.h
+@@ -4,6 +4,14 @@
+ #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
+ #define __ARCH_AVR32_MACH_AT32AP_PM_H__
+ 
++/*
++ * We can reduce the code size a bit by using a constant here. Since
++ * this file is only used on AVR32 AP CPUs with segmentation enabled,
++ * it's safe to not use ioremap. Generic drivers should of course
++ * never do this.
++ */
++#define AT32_PM_BASE	0xfff00000
++
+ /* PM register offsets */
+ #define PM_MCCTRL				0x0000
+ #define PM_CKSEL				0x0004
+diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
+index 099212d..26f29c6 100644
+--- a/arch/avr32/mm/dma-coherent.c
++++ b/arch/avr32/mm/dma-coherent.c
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size,
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
+index 82cf708..480760b 100644
+--- a/arch/avr32/mm/init.c
++++ b/arch/avr32/mm/init.c
+@@ -224,19 +224,9 @@ void free_initmem(void)
+ 
+ #ifdef CONFIG_BLK_DEV_INITRD
+ 
+-static int keep_initrd;
+-
+ void free_initrd_mem(unsigned long start, unsigned long end)
+ {
+-	if (!keep_initrd)
+-		free_area(start, end, "initrd");
+-}
+-
+-static int __init keepinitrd_setup(char *__unused)
+-{
+-	keep_initrd = 1;
+-	return 1;
++	free_area(start, end, "initrd");
+ }
+ 
+-__setup("keepinitrd", keepinitrd_setup);
+ #endif
+diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
+index 37bddc1..8c30dec 100644
+--- a/drivers/char/watchdog/Kconfig
++++ b/drivers/char/watchdog/Kconfig
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c
+index 54a5161..fb5ed64 100644
+--- a/drivers/char/watchdog/at32ap700x_wdt.c
++++ b/drivers/char/watchdog/at32ap700x_wdt.c
+@@ -6,6 +6,19 @@
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
++ *
++ *
++ * Errata: WDT Clear is blocked after WDT Reset
++ *
++ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR
++ * register, preventing the program to clear the next Watchdog Timer Reset.
++ *
++ * If you still want to use the WDT after a WDT reset a small code can be
++ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset
++ * and use a GPIO pin to reset the system. This method requires that one of the
++ * GPIO pins are available and connected externally to the RESET_N pin. After
++ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave
++ * the pin tristated with pullup.
+  */
+ 
+ #include <linux/init.h>
+@@ -44,6 +57,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+ 
+ #define WDT_CLR			0x04
+ 
++#define WDT_RCAUSE		0x10
++#define WDT_RCAUSE_POR		   0
++#define WDT_RCAUSE_EXT		   2
++#define WDT_RCAUSE_WDT		   3
++#define WDT_RCAUSE_JTAG		   4
++#define WDT_RCAUSE_SERP		   5
++
+ #define WDT_BIT(name)		(1 << WDT_##name)
+ #define WDT_BF(name, value)	((value) << WDT_##name)
+ 
+@@ -56,6 +76,7 @@ struct wdt_at32ap700x {
+ 	void __iomem		*regs;
+ 	spinlock_t		io_lock;
+ 	int			timeout;
++	int			boot_status;
+ 	unsigned long		users;
+ 	struct miscdevice	miscdev;
+ };
+@@ -126,7 +147,7 @@ static int at32_wdt_close(struct inode *inode, struct file *file)
+ 		at32_wdt_stop();
+ 	} else {
+ 		dev_dbg(wdt->miscdev.parent,
+-			"Unexpected close, not stopping watchdog!\n");
++			"unexpected close, not stopping watchdog!\n");
+ 		at32_wdt_pat();
+ 	}
+ 	clear_bit(1, &wdt->users);
+@@ -154,6 +175,33 @@ static int at32_wdt_settimeout(int time)
+ 	return 0;
+ }
+ 
++/*
++ * Get the watchdog status.
++ */
++static int at32_wdt_get_status(void)
++{
++	int rcause;
++	int status = 0;
++
++	rcause = wdt_readl(wdt, RCAUSE);
++
++	switch (rcause) {
++	case WDT_BIT(RCAUSE_EXT):
++		status = WDIOF_EXTERN1;
++		break;
++	case WDT_BIT(RCAUSE_WDT):
++		status = WDIOF_CARDRESET;
++		break;
++	case WDT_BIT(RCAUSE_POR):  /* fall through */
++	case WDT_BIT(RCAUSE_JTAG): /* fall through */
++	case WDT_BIT(RCAUSE_SERP): /* fall through */
++	default:
++		break;
++	}
++
++	return status;
++}
++
+ static struct watchdog_info at32_wdt_info = {
+ 	.identity	= "at32ap700x watchdog",
+ 	.options	= WDIOF_SETTIMEOUT |
+@@ -194,10 +242,12 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file,
+ 	case WDIOC_GETTIMEOUT:
+ 		ret = put_user(wdt->timeout, p);
+ 		break;
+-	case WDIOC_GETSTATUS: /* fall through */
+-	case WDIOC_GETBOOTSTATUS:
++	case WDIOC_GETSTATUS:
+ 		ret = put_user(0, p);
+ 		break;
++	case WDIOC_GETBOOTSTATUS:
++		ret = put_user(wdt->boot_status, p);
++		break;
+ 	case WDIOC_SETOPTIONS:
+ 		ret = get_user(time, p);
+ 		if (ret)
+@@ -282,8 +332,19 @@ static int __init at32_wdt_probe(struct platform_device *pdev)
+ 		dev_dbg(&pdev->dev, "could not map I/O memory\n");
+ 		goto err_free;
+ 	}
++
+ 	spin_lock_init(&wdt->io_lock);
+-	wdt->users = 0;
++	wdt->boot_status = at32_wdt_get_status();
++
++	/* Work-around for watchdog silicon errata. */
++	if (wdt->boot_status & WDIOF_CARDRESET) {
++		dev_info(&pdev->dev, "CPU must be reset with external "
++				"reset or POR due to silicon errata.\n");
++		ret = -EIO;
++		goto err_iounmap;
++	} else {
++		wdt->users = 0;
++	}
+ 	wdt->miscdev.minor = WATCHDOG_MINOR;
+ 	wdt->miscdev.name = "watchdog";
+ 	wdt->miscdev.fops = &at32_wdt_fops;
+diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
+index 9f3a4cd..6f5bcd6 100644
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -80,6 +80,14 @@ config I2C_AT91
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
+index 5b752e4..e4644a8 100644
+--- a/drivers/i2c/busses/Makefile
++++ b/drivers/i2c/busses/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c
+new file mode 100644
+index 0000000..3f78b31
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.c
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h
+new file mode 100644
+index 0000000..1aca065
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.h
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 73e248f..9e848cc 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY
+ 
+ 	  If you are not sure, say Y here.
+ 
++config ATMEL_SSC
++	tristate "Device driver for Atmel SSC peripheral"
++	depends on AVR32 || ARCH_AT91
++	---help---
++	  This option enables device driver support for Atmel Syncronized
++	  Serial Communication peripheral (SSC).
++
++	  The SSC peripheral supports a wide variety of serial frame based
++	  communications, i.e. I2S, SPI, etc.
+ 
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index b5ce0e3..40d8ed1 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
+ obj-$(CONFIG_SONY_LAPTOP)	+= sony-laptop.o
+ obj-$(CONFIG_THINKPAD_ACPI)	+= thinkpad_acpi.o
+ obj-$(CONFIG_EEPROM_93CX6)	+= eeprom_93cx6.o
++obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
+new file mode 100644
+index 0000000..058ccac
+--- /dev/null
++++ b/drivers/misc/atmel-ssc.c
+@@ -0,0 +1,174 @@
++/*
++ * Atmel SSC driver
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/list.h>
++#include <linux/spinlock.h>
++#include <linux/atmel-ssc.h>
++
++/* Serialize access to ssc_list and user count */
++static DEFINE_SPINLOCK(user_lock);
++static LIST_HEAD(ssc_list);
++
++struct ssc_device *ssc_request(unsigned int ssc_num)
++{
++	int ssc_valid = 0;
++	struct ssc_device *ssc;
++
++	spin_lock(&user_lock);
++	list_for_each_entry(ssc, &ssc_list, list) {
++		if (ssc->pdev->id == ssc_num) {
++			ssc_valid = 1;
++			break;
++		}
++	}
++
++	if (!ssc_valid) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "could not find requested device\n");
++		return ERR_PTR(-ENODEV);
++	}
++
++	if (ssc->user) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "module busy\n");
++		return ERR_PTR(-EBUSY);
++	}
++	ssc->user++;
++	spin_unlock(&user_lock);
++
++	clk_enable(ssc->clk);
++
++	return ssc;
++}
++EXPORT_SYMBOL(ssc_request);
++
++void ssc_free(struct ssc_device *ssc)
++{
++	spin_lock(&user_lock);
++	if (ssc->user) {
++		ssc->user--;
++		clk_disable(ssc->clk);
++	} else {
++		dev_dbg(&ssc->pdev->dev, "device already free\n");
++	}
++	spin_unlock(&user_lock);
++}
++EXPORT_SYMBOL(ssc_free);
++
++static int __init ssc_probe(struct platform_device *pdev)
++{
++	int retval = 0;
++	struct resource *regs;
++	struct ssc_device *ssc;
++
++	ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL);
++	if (!ssc) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		retval = -ENOMEM;
++		goto out;
++	}
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resource defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->clk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(ssc->clk)) {
++		dev_dbg(&pdev->dev, "no pclk clock defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->pdev = pdev;
++	ssc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!ssc->regs) {
++		dev_dbg(&pdev->dev, "ioremap failed\n");
++		retval = -EINVAL;
++		goto out_clk;
++	}
++
++	/* disable all interrupts */
++	clk_enable(ssc->clk);
++	ssc_writel(ssc->regs, IDR, ~0UL);
++	ssc_readl(ssc->regs, SR);
++	clk_disable(ssc->clk);
++
++	ssc->irq = platform_get_irq(pdev, 0);
++	if (!ssc->irq) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		retval = -ENXIO;
++		goto out_unmap;
++	}
++
++	spin_lock(&user_lock);
++	list_add_tail(&ssc->list, &ssc_list);
++	spin_unlock(&user_lock);
++
++	platform_set_drvdata(pdev, ssc);
++
++	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
++			ssc->regs, ssc->irq);
++
++	goto out;
++
++out_unmap:
++	iounmap(ssc->regs);
++out_clk:
++	clk_put(ssc->clk);
++out_free:
++	kfree(ssc);
++out:
++	return retval;
++}
++
++static int __devexit ssc_remove(struct platform_device *pdev)
++{
++	struct ssc_device *ssc = platform_get_drvdata(pdev);
++
++	spin_lock(&user_lock);
++	iounmap(ssc->regs);
++	clk_put(ssc->clk);
++	list_del(&ssc->list);
++	kfree(ssc);
++	spin_unlock(&user_lock);
++
++	return 0;
++}
++
++static struct platform_driver ssc_driver = {
++	.remove		= __devexit_p(ssc_remove),
++	.driver		= {
++		.name		= "ssc",
++	},
++};
++
++static int __init ssc_init(void)
++{
++	return platform_driver_probe(&ssc_driver, ssc_probe);
++}
++module_init(ssc_init);
++
++static void __exit ssc_exit(void)
++{
++	platform_driver_unregister(&ssc_driver);
++}
++module_exit(ssc_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index e23082f..1de1716 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -74,6 +74,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
+index 6685f64..4b8e6e2 100644
+--- a/drivers/mmc/host/Makefile
++++ b/drivers/mmc/host/Makefile
+@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ 
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+new file mode 100644
+index 0000000..6792ad9
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = MMC_ERR_NONE;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = MMC_ERR_TIMEOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = MMC_ERR_BADCRC;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = MMC_ERR_FAILED;
++
++	if (cmd->error != MMC_ERR_NONE) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = MMC_ERR_INVALID;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = MMC_ERR_BADCRC;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = MMC_ERR_TIMEOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = MMC_ERR_FIFO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = MMC_ERR_TIMEOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = MMC_ERR_TIMEOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = MMC_ERR_TIMEOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h
+new file mode 100644
+index 0000000..60d15c4
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.h
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
+index 2f19fa7..94304ca 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0001.c
++++ b/drivers/mtd/chips/cfi_cmdset_0001.c
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
+index 1f64458..205977b 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = {
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
+index c0c77f8..7623315 100644
+--- a/drivers/pcmcia/Kconfig
++++ b/drivers/pcmcia/Kconfig
+@@ -271,6 +271,13 @@ config AT91_CF
+ 	  Say Y here to support the CompactFlash controller on AT91 chips.
+ 	  Or choose M to compile the driver as a module named "at91_cf".
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
+index 4276965..08d7ffa 100644
+--- a/drivers/pcmcia/Makefile
++++ b/drivers/pcmcia/Makefile
+@@ -37,6 +37,7 @@ obj-$(CONFIG_PCMCIA_VRC4171)			+= vrc4171_card.o
+ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc4173_cardu.o
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c
+new file mode 100644
+index 0000000..ebe1495
+--- /dev/null
++++ b/drivers/pcmcia/at32_cf.c
+@@ -0,0 +1,531 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin)
++		cf->vcc_pin = request_pin(pdev, board->reset_pin,
++					  "cf_vcc");
++	if (board->ready_pin)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c
+index d154dee..06a85d7 100644
+--- a/drivers/pcmcia/cistpl.c
++++ b/drivers/pcmcia/cistpl.c
+@@ -25,6 +25,7 @@
+ #include <linux/ioport.h>
+ #include <asm/io.h>
+ #include <asm/byteorder.h>
++#include <asm/unaligned.h>
+ 
+ #include <pcmcia/cs_types.h>
+ #include <pcmcia/ss.h>
+@@ -401,6 +402,15 @@ EXPORT_SYMBOL(pcmcia_replace_cis);
+     
+ ======================================================================*/
+ 
++static inline u16 cis_get_u16(void *ptr)
++{
++	return le16_to_cpu(get_unaligned((__le16 *) ptr));
++}
++static inline u32 cis_get_u32(void *ptr)
++{
++	return le32_to_cpu(get_unaligned((__le32 *) ptr));
++}
++
+ typedef struct tuple_flags {
+     u_int		link_space:4;
+     u_int		has_link:1;
+@@ -461,7 +471,7 @@ static int follow_link(struct pcmcia_socket *s, tuple_t *tuple)
+ 	/* Get indirect link from the MFC tuple */
+ 	read_cis_cache(s, LINK_SPACE(tuple->Flags),
+ 		       tuple->LinkOffset, 5, link);
+-	ofs = le32_to_cpu(*(__le32 *)(link+1));
++	ofs = cis_get_u32(link + 1);
+ 	SPACE(tuple->Flags) = (link[0] == CISTPL_MFC_ATTR);
+ 	/* Move to the next indirect link */
+ 	tuple->LinkOffset += 5;
+@@ -668,10 +678,10 @@ static int parse_checksum(tuple_t *tuple, cistpl_checksum_t *csum)
+     u_char *p;
+     if (tuple->TupleDataLen < 5)
+ 	return CS_BAD_TUPLE;
+-    p = (u_char *)tuple->TupleData;
+-    csum->addr = tuple->CISOffset+(short)le16_to_cpu(*(__le16 *)p)-2;
+-    csum->len = le16_to_cpu(*(__le16 *)(p + 2));
+-    csum->sum = *(p+4);
++    p = (u_char *) tuple->TupleData;
++    csum->addr = tuple->CISOffset + cis_get_u16(p) - 2;
++    csum->len = cis_get_u16(p + 2);
++    csum->sum = *(p + 4);
+     return CS_SUCCESS;
+ }
+ 
+@@ -681,7 +691,7 @@ static int parse_longlink(tuple_t *tuple, cistpl_longlink_t *link)
+ {
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    link->addr = le32_to_cpu(*(__le32 *)tuple->TupleData);
++    link->addr = cis_get_u32(tuple->TupleData);
+     return CS_SUCCESS;
+ }
+ 
+@@ -700,7 +710,8 @@ static int parse_longlink_mfc(tuple_t *tuple,
+ 	return CS_BAD_TUPLE;
+     for (i = 0; i < link->nfn; i++) {
+ 	link->fn[i].space = *p; p++;
+-	link->fn[i].addr = le32_to_cpu(*(__le32 *)p); p += 4;
++	link->fn[i].addr = cis_get_u32(p);
++	p += 4;
+     }
+     return CS_SUCCESS;
+ }
+@@ -787,12 +798,10 @@ static int parse_jedec(tuple_t *tuple, cistpl_jedec_t *jedec)
+ 
+ static int parse_manfid(tuple_t *tuple, cistpl_manfid_t *m)
+ {
+-    __le16 *p;
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    p = (__le16 *)tuple->TupleData;
+-    m->manf = le16_to_cpu(p[0]);
+-    m->card = le16_to_cpu(p[1]);
++    m->manf = cis_get_u16(tuple->TupleData);
++    m->card = cis_get_u16(tuple->TupleData + 2);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1091,7 +1100,7 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x20:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
+ 	entry->mem.win[0].card_addr = 0;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 2;
+@@ -1099,9 +1108,8 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x40:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
+-	entry->mem.win[0].card_addr =
+-	    le16_to_cpu(*(__le16 *)(p+2)) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
++	entry->mem.win[0].card_addr = cis_get_u16(p + 2) << 8;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 4;
+ 	if (p > q) return CS_BAD_TUPLE;
+@@ -1138,7 +1146,7 @@ static int parse_bar(tuple_t *tuple, cistpl_bar_t *bar)
+     p = (u_char *)tuple->TupleData;
+     bar->attr = *p;
+     p += 2;
+-    bar->size = le32_to_cpu(*(__le32 *)p);
++    bar->size = cis_get_u32(p);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1151,7 +1159,7 @@ static int parse_config_cb(tuple_t *tuple, cistpl_config_t *config)
+ 	return CS_BAD_TUPLE;
+     config->last_idx = *(++p);
+     p++;
+-    config->base = le32_to_cpu(*(__le32 *)p);
++    config->base = cis_get_u32(p);
+     config->subtuples = tuple->TupleDataLen - 6;
+     return CS_SUCCESS;
+ }
+@@ -1267,7 +1275,7 @@ static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2)
+ 
+     v2->vers = p[0];
+     v2->comply = p[1];
+-    v2->dindex = le16_to_cpu(*(__le16 *)(p+2));
++    v2->dindex = cis_get_u16(p +2 );
+     v2->vspec8 = p[6];
+     v2->vspec9 = p[7];
+     v2->nhdr = p[8];
+@@ -1308,8 +1316,8 @@ static int parse_format(tuple_t *tuple, cistpl_format_t *fmt)
+ 
+     fmt->type = p[0];
+     fmt->edc = p[1];
+-    fmt->offset = le32_to_cpu(*(__le32 *)(p+2));
+-    fmt->length = le32_to_cpu(*(__le32 *)(p+6));
++    fmt->offset = cis_get_u32(p + 2);
++    fmt->length = cis_get_u32(p + 6);
+ 
+     return CS_SUCCESS;
+ }
+diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
+index b046974..bc90604 100644
+--- a/drivers/spi/atmel_spi.c
++++ b/drivers/spi/atmel_spi.c
+@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi)
+ 		csr |= SPI_BIT(NCPHA);
+ 
+ 	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
+index 767aed5..f81d08d 100644
+--- a/drivers/usb/gadget/Kconfig
++++ b/drivers/usb/gadget/Kconfig
+@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES
+ 	   driver on a new board.   Enable these files by choosing "Y"
+ 	   here.  If in doubt, or to conserve kernel memory, say "N".
+ 
++config USB_GADGET_DEBUG_FS
++	boolean "Debugging information files in debugfs"
++	depends on USB_GADGET && DEBUG_FS
++	help
++	   Some of the drivers in the "gadget" framework can expose
++	   debugging information in files under /sys/kernel/debug/.
++	   The information in these files may help when you're
++	   troubleshooting or bringing up a driver on a new board.
++	   Enable these files by choosing "Y" here.  If in doubt, or
++	   to conserve kernel memory, say "N".
++
+ config	USB_GADGET_SELECTED
+ 	boolean
+ 
+@@ -103,6 +114,20 @@ config USB_AMD5536UDC
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
++config USB_GADGET_ATMEL_USBA
++	boolean "Atmel USBA"
++	select USB_GADGET_DUALSPEED
++	depends on AVR32
++	help
++	  USBA is the integrated high-speed USB Device controller on
++	  the AT32AP700x processors from Atmel.
++
++config USB_ATMEL_USBA
++	tristate
++	depends on USB_GADGET_ATMEL_USBA
++	default USB_GADGET
++	select USB_GADGET_SELECTED
++
+ config USB_GADGET_FSL_USB2
+ 	boolean "Freescale Highspeed USB DR Peripheral Controller"
+ 	depends on MPC834x || PPC_MPC831x
+@@ -228,7 +253,6 @@ config USB_LH7A40X
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
+-
+ config USB_GADGET_OMAP
+ 	boolean "OMAP USB Device Controller"
+ 	depends on ARCH_OMAP
+diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
+index 1bc0f03..904e57b 100644
+--- a/drivers/usb/gadget/Makefile
++++ b/drivers/usb/gadget/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
+ obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
+ obj-$(CONFIG_USB_S3C2410)	+= s3c2410_udc.o
+ obj-$(CONFIG_USB_AT91)		+= at91_udc.o
++obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
+ obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
+ obj-$(CONFIG_USB_M66592)	+= m66592-udc.o
+ 
+diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
+new file mode 100644
+index 0000000..e35362d
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.c
+@@ -0,0 +1,2038 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/list.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ch9.h>
++#include <linux/usb_gadget.h>
++#include <linux/delay.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
++
++#include "atmel_usba_udc.h"
++
++
++static struct usba_udc the_udc;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/uaccess.h>
++
++static int queue_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_ep *ep = inode->i_private;
++	struct usba_request *req, *req_copy;
++	struct list_head *queue_data;
++
++	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
++	if (!queue_data)
++		return -ENOMEM;
++	INIT_LIST_HEAD(queue_data);
++
++	spin_lock_irq(&ep->udc->lock);
++	list_for_each_entry(req, &ep->queue, queue) {
++		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
++		if (!req_copy)
++			goto fail;
++		memcpy(req_copy, req, sizeof(*req_copy));
++		list_add_tail(&req_copy->queue, queue_data);
++	}
++	spin_unlock_irq(&ep->udc->lock);
++
++	file->private_data = queue_data;
++	return 0;
++
++fail:
++	spin_unlock_irq(&ep->udc->lock);
++	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return -ENOMEM;
++}
++
++/*
++ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
++ *
++ * b: buffer address
++ * l: buffer length
++ * I/i: interrupt/no interrupt
++ * Z/z: zero/no zero
++ * S/s: short ok/short not ok
++ * s: status
++ * n: nr_packets
++ * F/f: submitted/not submitted to FIFO
++ * D/d: using/not using DMA
++ * L/l: last transaction/not last transaction
++ */
++static ssize_t queue_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct list_head *queue = file->private_data;
++	struct usba_request *req, *tmp_req;
++	size_t len, remaining, actual = 0;
++	char tmpbuf[38];
++
++	if (!access_ok(VERIFY_WRITE, buf, nbytes))
++		return -EFAULT;
++
++	mutex_lock(&file->f_dentry->d_inode->i_mutex);
++	list_for_each_entry_safe(req, tmp_req, queue, queue) {
++		len = snprintf(tmpbuf, sizeof(tmpbuf),
++				"%8p %08x %c%c%c %5d %c%c%c\n",
++				req->req.buf, req->req.length,
++				req->req.no_interrupt ? 'i' : 'I',
++				req->req.zero ? 'Z' : 'z',
++				req->req.short_not_ok ? 's' : 'S',
++				req->req.status,
++				req->submitted ? 'F' : 'f',
++				req->using_dma ? 'D' : 'd',
++				req->last_transaction ? 'L' : 'l');
++		len = min(len, sizeof(tmpbuf));
++		if (len > nbytes)
++			break;
++
++		list_del(&req->queue);
++		kfree(req);
++
++		remaining = __copy_to_user(buf, tmpbuf, len);
++		actual += len - remaining;
++		if (remaining)
++			break;
++
++		nbytes -= len;
++		buf += len;
++	}
++	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
++
++	return actual;
++}
++
++static int queue_dbg_release(struct inode *inode, struct file *file)
++{
++	struct list_head *queue_data = file->private_data;
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return 0;
++}
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_udc *udc;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	udc = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&udc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(udc->regs + i * 4);
++	spin_unlock_irq(&udc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++			file->private_data,
++			file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++const struct file_operations queue_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= queue_dbg_open,
++	.llseek		= no_llseek,
++	.read		= queue_dbg_read,
++	.release	= queue_dbg_release,
++};
++
++const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void usba_ep_init_debugfs(struct usba_udc *udc,
++		struct usba_ep *ep)
++{
++	struct dentry *ep_root;
++
++	ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
++	if (!ep_root)
++		goto err_root;
++	ep->debugfs_dir = ep_root;
++
++	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
++						ep, &queue_dbg_fops);
++	if (!ep->debugfs_queue)
++		goto err_queue;
++
++	if (ep->can_dma) {
++		ep->debugfs_dma_status
++			= debugfs_create_u32("dma_status", 0400, ep_root,
++					&ep->last_dma_status);
++		if (!ep->debugfs_dma_status)
++			goto err_dma_status;
++	}
++	if (ep_is_control(ep)) {
++		ep->debugfs_state
++			= debugfs_create_u32("state", 0400, ep_root,
++					&ep->state);
++		if (!ep->debugfs_state)
++			goto err_state;
++	}
++
++	return;
++
++err_state:
++	if (ep->can_dma)
++		debugfs_remove(ep->debugfs_dma_status);
++err_dma_status:
++	debugfs_remove(ep->debugfs_queue);
++err_queue:
++	debugfs_remove(ep_root);
++err_root:
++	dev_err(&ep->udc->pdev->dev,
++		"failed to create debugfs directory for %s\n", ep->ep.name);
++}
++
++static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++	debugfs_remove(ep->debugfs_queue);
++	debugfs_remove(ep->debugfs_dma_status);
++	debugfs_remove(ep->debugfs_state);
++	debugfs_remove(ep->debugfs_dir);
++	ep->debugfs_dma_status = NULL;
++	ep->debugfs_dir = NULL;
++}
++
++static void usba_init_debugfs(struct usba_udc *udc)
++{
++	struct dentry *root, *regs;
++	struct resource *regs_resource;
++
++	root = debugfs_create_dir(udc->gadget.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	udc->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
++				CTRL_IOMEM_ID);
++	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
++	udc->debugfs_regs = regs;
++
++	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
++
++	return;
++
++err_regs:
++	debugfs_remove(root);
++err_root:
++	udc->debugfs_root = NULL;
++	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++}
++
++static void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
++	debugfs_remove(udc->debugfs_regs);
++	debugfs_remove(udc->debugfs_root);
++	udc->debugfs_regs = NULL;
++	udc->debugfs_root = NULL;
++}
++#else
++static inline void usba_ep_init_debugfs(struct usba_udc *udc,
++					 struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_init_debugfs(struct usba_udc *udc)
++{
++
++}
++
++static inline void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++
++}
++#endif
++
++static int vbus_is_present(struct usba_udc *udc)
++{
++	if (udc->vbus_pin != -1)
++		return gpio_get_value(udc->vbus_pin);
++
++	/* No Vbus detection: Assume always present */
++	return 1;
++}
++
++static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
++{
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
++	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
++		tmp = *(unsigned long *)buf;
++		if (len >= 4) {
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++			__raw_writel(tmp, fifo);
++		} else {
++			do {
++				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
++				__raw_writeb(tmp >> 24, fifo);
++				fifo++;
++				tmp <<= 8;
++			} while (--len);
++			break;
++		}
++	}
++}
++
++static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++{
++	union {
++		unsigned long *w;
++		unsigned char *b;
++	} p;
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
++	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
++		if (len >= 4) {
++			tmp = __raw_readl(fifo);
++			*p.w = tmp;
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++		} else {
++			do {
++				tmp = __raw_readb(fifo);
++				*p.b = tmp;
++				DBG(DBG_FIFO, " -> %02lx\n", tmp);
++				fifo++, p.b++;
++			} while (--len);
++		}
++	}
++}
++
++static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
++{
++	unsigned int transaction_len;
++
++	transaction_len = req->req.length - req->req.actual;
++	req->last_transaction = 1;
++	if (transaction_len > ep->ep.maxpacket) {
++		transaction_len = ep->ep.maxpacket;
++		req->last_transaction = 0;
++	} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
++		req->last_transaction = 0;
++
++	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
++		ep->ep.name, req, transaction_len,
++		req->last_transaction ? ", done" : "");
++
++	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	req->req.actual += transaction_len;
++}
++
++static void submit_request(struct usba_ep *ep, struct usba_request *req)
++{
++	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
++		ep->ep.name, req, req->req.length);
++
++	req->req.actual = 0;
++	req->submitted = 1;
++
++	if (req->using_dma) {
++		if (req->req.length == 0) {
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++			return;
++		}
++
++		if (req->req.zero)
++			usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
++		else
++			usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
++
++		usba_dma_writel(ep, ADDRESS, req->req.dma);
++		usba_dma_writel(ep, CONTROL, req->ctrl);
++	} else {
++		next_fifo_transaction(ep, req);
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		} else {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		}
++	}
++}
++
++static void submit_next_request(struct usba_ep *ep)
++{
++	struct usba_request *req;
++
++	if (list_empty(&ep->queue)) {
++		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
++		return;
++	}
++
++	req = list_entry(ep->queue.next, struct usba_request, queue);
++	if (!req->submitted)
++		submit_request(ep, req);
++}
++
++static void send_status(struct usba_udc *udc, struct usba_ep *ep)
++{
++	ep->state = STATUS_STAGE_IN;
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++}
++
++static void receive_data(struct usba_ep *ep)
++{
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req;
++	unsigned long status;
++	unsigned int bytecount, nr_busy;
++	int is_complete = 0;
++
++	status = usba_ep_readl(ep, STA);
++	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
++
++	while (nr_busy > 0) {
++		if (list_empty(&ep->queue)) {
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			break;
++		}
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++		bytecount = USBA_BFEXT(BYTE_COUNT, status);
++
++		if (status & (1 << 31))
++			is_complete = 1;
++		if (req->req.actual + bytecount >= req->req.length) {
++			is_complete = 1;
++			bytecount = req->req.length - req->req.actual;
++		}
++
++		copy_from_fifo(req->req.buf + req->req.actual,
++				ep->fifo, bytecount);
++		req->req.actual += bytecount;
++
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++
++		if (is_complete) {
++			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
++			req->req.status = 0;
++			list_del_init(&req->queue);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			spin_unlock(&udc->lock);
++			req->req.complete(&ep->ep, &req->req);
++			spin_lock(&udc->lock);
++		}
++
++		status = usba_ep_readl(ep, STA);
++		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++		if (is_complete && ep_is_control(ep)) {
++			send_status(udc, ep);
++			break;
++		}
++	}
++}
++
++static void
++request_complete(struct usba_ep *ep, struct usba_request *req, int status)
++{
++	struct usba_udc *udc = ep->udc;
++
++	WARN_ON(!list_empty(&req->queue));
++
++	if (req->req.status == -EINPROGRESS)
++		req->req.status = status;
++
++	if (req->mapped) {
++		dma_unmap_single(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->req.dma = DMA_ADDR_INVALID;
++		req->mapped = 0;
++	}
++
++	DBG(DBG_GADGET | DBG_REQ,
++		"%s: req %p complete: status %d, actual %u\n",
++		ep->ep.name, req, req->req.status, req->req.actual);
++
++	spin_unlock(&udc->lock);
++	req->req.complete(&ep->ep, &req->req);
++	spin_lock(&udc->lock);
++}
++
++static void
++request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
++{
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, list, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, status);
++	}
++}
++
++static int
++usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags, ept_cfg, maxpacket;
++	unsigned int nr_trans;
++
++	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
++
++	maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
++
++	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
++			|| ep->index == 0
++			|| desc->bDescriptorType != USB_DT_ENDPOINT
++			|| maxpacket == 0
++			|| maxpacket > ep->fifo_size) {
++		DBG(DBG_ERR, "ep_enable: Invalid argument");
++		return -EINVAL;
++	}
++
++	ep->is_isoc = 0;
++	ep->is_in = 0;
++
++	if (maxpacket <= 8)
++		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
++	else
++		/* LSB is bit 1, not 0 */
++		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
++
++	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
++			ep->ep.name, ept_cfg, maxpacket);
++
++	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
++		ep->is_in = 1;
++		ept_cfg |= USBA_EPT_DIR_IN;
++	}
++
++	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
++	case USB_ENDPOINT_XFER_CONTROL:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
++		break;
++	case USB_ENDPOINT_XFER_ISOC:
++		if (!ep->can_isoc) {
++			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
++					ep->ep.name);
++			return -EINVAL;
++		}
++
++		/*
++		 * Bits 11:12 specify number of _additional_
++		 * transactions per microframe.
++		 */
++		nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
++		if (nr_trans > 3)
++			return -EINVAL;
++
++		ep->is_isoc = 1;
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
++
++		/*
++		 * Do triple-buffering on high-bandwidth iso endpoints.
++		 */
++		if (nr_trans > 1 && ep->nr_banks == 3)
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
++		else
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
++		break;
++	case USB_ENDPOINT_XFER_BULK:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	case USB_ENDPOINT_XFER_INT:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	}
++
++	spin_lock_irqsave(&ep->udc->lock, flags);
++
++	if (ep->desc) {
++		spin_unlock_irqrestore(&ep->udc->lock, flags);
++		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
++		return -EBUSY;
++	}
++
++	ep->desc = desc;
++	ep->ep.maxpacket = maxpacket;
++
++	usba_ep_writel(ep, CFG, ept_cfg);
++	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++
++	if (ep->can_dma) {
++		u32 ctrl;
++
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)
++					| USBA_BF(DMA_INT, 1 << ep->index)));
++		ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
++		usba_ep_writel(ep, CTL_ENB, ctrl);
++	} else {
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)));
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
++			(unsigned long)usba_ep_readl(ep, CFG));
++	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
++			(unsigned long)usba_readl(udc, INT_ENB));
++
++	return 0;
++}
++
++static int usba_ep_disable(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	LIST_HEAD(req_list);
++	unsigned long flags;
++
++	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (!ep->desc) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
++		return -EINVAL;
++	}
++	ep->desc = NULL;
++
++	list_splice_init(&ep->queue, &req_list);
++	if (ep->can_dma) {
++		usba_dma_writel(ep, CONTROL, 0);
++		usba_dma_writel(ep, ADDRESS, 0);
++		usba_dma_readl(ep, STATUS);
++	}
++	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
++	usba_writel(udc, INT_ENB,
++			usba_readl(udc, INT_ENB)
++			& ~USBA_BF(EPT_INT, 1 << ep->index));
++
++	request_complete_list(ep, &req_list, -ESHUTDOWN);
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static struct usb_request *
++usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
++{
++	struct usba_request *req;
++
++	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
++
++	req = kzalloc(sizeof(*req), gfp_flags);
++	if (!req)
++		return NULL;
++
++	INIT_LIST_HEAD(&req->queue);
++	req->req.dma = DMA_ADDR_INVALID;
++
++	return &req->req;
++}
++
++static void
++usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_request *req = to_usba_req(_req);
++
++	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
++
++	kfree(req);
++}
++
++static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
++		struct usba_request *req, gfp_t gfp_flags)
++{
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
++		ep->ep.name, req->req.length, req->req.dma,
++		req->req.zero ? 'Z' : 'z',
++		req->req.short_not_ok ? 'S' : 's',
++		req->req.no_interrupt ? 'I' : 'i');
++
++	if (req->req.length > 0x10000) {
++		/* Lengths from 0 to 65536 (inclusive) are supported */
++		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
++		return -EINVAL;
++	}
++
++	req->using_dma = 1;
++
++	if (req->req.dma == DMA_ADDR_INVALID) {
++		req->req.dma = dma_map_single(
++			&udc->pdev->dev, req->req.buf, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 1;
++	} else {
++		dma_sync_single_for_device(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 0;
++	}
++
++	req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
++			| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
++			| USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
++
++	if (ep->is_in)
++		req->ctrl |= USBA_DMA_END_BUF_EN;
++
++	/*
++	 * Add this request to the queue and submit for DMA if
++	 * possible. Check if we're still alive first -- we may have
++	 * received a reset since last time we checked.
++	 */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		if (list_empty(&ep->queue))
++			submit_request(ep, req);
++
++		list_add_tail(&req->queue, &ep->queue);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int
++usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
++{
++	struct usba_request *req = to_usba_req(_req);
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
++			ep->ep.name, req, _req->length);
++
++	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
++		return -ESHUTDOWN;
++
++	req->submitted = 0;
++	req->using_dma = 0;
++	req->last_transaction = 0;
++
++	_req->status = -EINPROGRESS;
++	_req->actual = 0;
++
++	if (ep->can_dma)
++		return queue_dma(udc, ep, req, gfp_flags);
++
++	/* May have received a reset since last time we checked */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		list_add_tail(&req->queue, &ep->queue);
++
++		if (ep->is_in || (ep_is_control(ep)
++				&& (ep->state == DATA_STAGE_IN
++					|| ep->state == STATUS_STAGE_IN)))
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		else
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static void
++usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
++{
++	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
++}
++
++static int stop_dma(struct usba_ep *ep, u32 *pstatus)
++{
++	unsigned int timeout;
++	u32 status;
++
++	/*
++	 * Stop the DMA controller. When writing both CH_EN
++	 * and LINK to 0, the other bits are not affected.
++	 */
++	usba_dma_writel(ep, CONTROL, 0);
++
++	/* Wait for the FIFO to empty */
++	for (timeout = 40; timeout; --timeout) {
++		status = usba_dma_readl(ep, STATUS);
++		if (!(status & USBA_DMA_CH_EN))
++			break;
++		udelay(1);
++	}
++
++	if (pstatus)
++		*pstatus = status;
++
++	if (timeout == 0) {
++		dev_err(&ep->udc->pdev->dev,
++			"%s: timed out waiting for DMA FIFO to empty\n",
++			ep->ep.name);
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req = to_usba_req(_req);
++	unsigned long flags;
++	u32 status;
++
++	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
++			ep->ep.name, req);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (req->using_dma) {
++		/*
++		 * If this request is currently being transferred,
++		 * stop the DMA controller and reset the FIFO.
++		 */
++		if (ep->queue.next == &req->queue) {
++			status = usba_dma_readl(ep, STATUS);
++			if (status & USBA_DMA_CH_EN)
++				stop_dma(ep, &status);
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++			ep->last_dma_status = status;
++#endif
++
++			usba_writel(udc, EPT_RST, 1 << ep->index);
++
++			usba_update_req(ep, req, status);
++		}
++	}
++
++	/*
++	 * Errors should stop the queue from advancing until the
++	 * completion function returns.
++	 */
++	list_del_init(&req->queue);
++
++	request_complete(ep, req, -ECONNRESET);
++
++	/* Process the next request if any */
++	submit_next_request(ep);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static int usba_ep_set_halt(struct usb_ep *_ep, int value)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret = 0;
++
++	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
++			value ? "set" : "clear");
++
++	if (!ep->desc) {
++		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
++				ep->ep.name);
++		return -ENODEV;
++	}
++	if (ep->is_isoc) {
++		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
++				ep->ep.name);
++		return -ENOTTY;
++	}
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	/*
++	 * We can't halt IN endpoints while there are still data to be
++	 * transferred
++	 */
++	if (!list_empty(&ep->queue)
++			|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
++					& USBA_BF(BUSY_BANKS, -1L))))) {
++		ret = -EAGAIN;
++	} else {
++		if (value)
++			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++		else
++			usba_ep_writel(ep, CLR_STA,
++					USBA_FORCE_STALL | USBA_TOGGLE_CLR);
++		usba_ep_readl(ep, STA);
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int usba_ep_fifo_status(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++
++	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++}
++
++static void usba_ep_fifo_flush(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++
++	usba_writel(udc, EPT_RST, 1 << ep->index);
++}
++
++static const struct usb_ep_ops usba_ep_ops = {
++	.enable		= usba_ep_enable,
++	.disable	= usba_ep_disable,
++	.alloc_request	= usba_ep_alloc_request,
++	.free_request	= usba_ep_free_request,
++	.queue		= usba_ep_queue,
++	.dequeue	= usba_ep_dequeue,
++	.set_halt	= usba_ep_set_halt,
++	.fifo_status	= usba_ep_fifo_status,
++	.fifo_flush	= usba_ep_fifo_flush,
++};
++
++static int usba_udc_get_frame(struct usb_gadget *gadget)
++{
++	struct usba_udc *udc = to_usba_udc(gadget);
++
++	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
++}
++
++static const struct usb_gadget_ops usba_udc_ops = {
++	.get_frame	= usba_udc_get_frame,
++};
++
++#define EP(nam, idx, maxpkt, maxbk, dma, isoc)			\
++{								\
++	.ep	= {						\
++		.ops		= &usba_ep_ops,			\
++		.name		= nam,				\
++		.maxpacket	= maxpkt,			\
++	},							\
++	.udc		= &the_udc,				\
++	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
++	.fifo_size	= maxpkt,				\
++	.nr_banks	= maxbk,				\
++	.index		= idx,					\
++	.can_dma	= dma,					\
++	.can_isoc	= isoc,					\
++}
++
++static struct usba_ep usba_ep[] = {
++	EP("ep0", 0, 64, 1, 0, 0),
++	EP("ep1in-bulk", 1, 512, 2, 1, 1),
++	EP("ep2out-bulk", 2, 512, 2, 1, 1),
++	EP("ep3in-int", 3, 64, 3, 1, 0),
++	EP("ep4out-int", 4, 64, 3, 1, 0),
++	EP("ep5in-iso", 5, 1024, 3, 1, 1),
++	EP("ep6out-iso", 6, 1024, 3, 1, 1),
++};
++#undef EP
++
++static struct usb_endpoint_descriptor usba_ep0_desc = {
++	.bLength = USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType = USB_DT_ENDPOINT,
++	.bEndpointAddress = 0,
++	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
++	.wMaxPacketSize = __constant_cpu_to_le16(64),
++	/* FIXME: I have no idea what to put here */
++	.bInterval = 1,
++};
++
++static void nop_release(struct device *dev)
++{
++
++}
++
++static struct usba_udc the_udc = {
++	.gadget	= {
++		.ops		= &usba_udc_ops,
++		.ep0		= &usba_ep[0].ep,
++		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
++		.is_dualspeed	= 1,
++		.name		= "atmel_usba_udc",
++		.dev	= {
++			.bus_id		= "gadget",
++			.release	= nop_release,
++		},
++	},
++
++	.lock	= SPIN_LOCK_UNLOCKED,
++};
++
++/*
++ * Called with interrupts disabled and udc->lock held.
++ */
++static void reset_all_endpoints(struct usba_udc *udc)
++{
++	struct usba_ep *ep;
++	struct usba_request *req, *tmp_req;
++
++	usba_writel(udc, EPT_RST, ~0UL);
++
++	ep = to_usba_ep(udc->gadget.ep0);
++	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, -ECONNRESET);
++	}
++
++	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
++		if (ep->desc)
++			usba_ep_disable(&ep->ep);
++	}
++}
++
++static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
++{
++	struct usba_ep *ep;
++
++	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
++		return to_usba_ep(udc->gadget.ep0);
++
++	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
++		u8 bEndpointAddress;
++
++		if (!ep->desc)
++			continue;
++		bEndpointAddress = ep->desc->bEndpointAddress;
++		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
++			continue;
++		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
++				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
++			return ep;
++	}
++
++	return NULL;
++}
++
++/* Called with interrupts disabled and udc->lock held */
++static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
++{
++	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++	ep->state = WAIT_FOR_SETUP;
++}
++
++static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
++{
++	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
++		return 1;
++	return 0;
++}
++
++static inline void set_address(struct usba_udc *udc, unsigned int addr)
++{
++	u32 regval;
++
++	DBG(DBG_BUS, "setting address %u...\n", addr);
++	regval = usba_readl(udc, CTRL);
++	regval = USBA_BFINS(DEV_ADDR, addr, regval);
++	usba_writel(udc, CTRL, regval);
++}
++
++static int do_test_mode(struct usba_udc *udc)
++{
++	static const char test_packet_buffer[] = {
++		/* JKJKJKJK * 9 */
++		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++		/* JJKKJJKK * 8 */
++		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
++		/* JJKKJJKK * 8 */
++		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
++		/* JJJJJJJKKKKKKK * 8 */
++		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		/* JJJJJJJK * 8 */
++		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
++		/* {JKKKKKKK * 10}, JK */
++		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
++	};
++	struct usba_ep *ep;
++	struct device *dev = &udc->pdev->dev;
++	int test_mode;
++
++	test_mode = udc->test_mode;
++
++	/* Start from a clean slate */
++	reset_all_endpoints(udc);
++
++	switch (test_mode) {
++	case 0x0100:
++		/* Test_J */
++		usba_writel(udc, TST, USBA_TST_J_MODE);
++		dev_info(dev, "Entering Test_J mode...\n");
++		break;
++	case 0x0200:
++		/* Test_K */
++		usba_writel(udc, TST, USBA_TST_K_MODE);
++		dev_info(dev, "Entering Test_K mode...\n");
++		break;
++	case 0x0300:
++		/*
++		 * Test_SE0_NAK: Force high-speed mode and set up ep0
++		 * for Bulk IN transfers
++		 */
++		ep = &usba_ep[0];
++		usba_writel(udc, TST,
++				USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
++		}
++		break;
++	case 0x0400:
++		/* Test_Packet */
++		ep = &usba_ep[0];
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_Packet: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			usba_writel(udc, TST, USBA_TST_PKT_MODE);
++			copy_to_fifo(ep->fifo, test_packet_buffer,
++					sizeof(test_packet_buffer));
++			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++			dev_info(dev, "Entering Test_Packet mode...\n");
++		}
++		break;
++	default:
++		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++/* Avoid overly long expressions */
++static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
++		return true;
++	return false;
++}
++
++static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
++		struct usb_ctrlrequest *crq)
++{
++	int retval = 0;;
++
++	switch (crq->bRequest) {
++	case USB_REQ_GET_STATUS: {
++		u16 status;
++
++		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
++			/* Self-powered, no remote wakeup */
++			status = __constant_cpu_to_le16(1 << 0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
++			status = __constant_cpu_to_le16(0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
++			struct usba_ep *target;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			status = 0;
++			if (is_stalled(udc, target))
++				status |= __constant_cpu_to_le16(1);
++		} else
++			goto delegate;
++
++		/* Write directly to the FIFO. No queueing is done. */
++		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
++			goto stall;
++		ep->state = DATA_STAGE_IN;
++		__raw_writew(status, ep->fifo);
++		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++		break;
++	}
++
++	case USB_REQ_CLEAR_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				/* Can't CLEAR_FEATURE TEST_MODE */
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
++			if (target->index != 0)
++				usba_ep_writel(target, CLR_STA,
++						USBA_TOGGLE_CLR);
++		} else {
++			goto delegate;
++		}
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_test_mode(crq)) {
++				send_status(udc, ep);
++				ep->state = STATUS_STAGE_TEST;
++				udc->test_mode = le16_to_cpu(crq->wIndex);
++				return 0;
++			} else if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
++		} else
++			goto delegate;
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_ADDRESS:
++		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
++			goto delegate;
++
++		set_address(udc, le16_to_cpu(crq->wValue));
++		send_status(udc, ep);
++		ep->state = STATUS_STAGE_ADDR;
++		break;
++
++	default:
++delegate:
++		spin_unlock(&udc->lock);
++		retval = udc->driver->setup(&udc->gadget, crq);
++		spin_lock(&udc->lock);
++	}
++
++	return retval;
++
++stall:
++	printk(KERN_ERR
++		"udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
++		"halting endpoint...\n",
++		ep->ep.name, crq->bRequestType, crq->bRequest,
++		le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
++		le16_to_cpu(crq->wLength));
++	set_protocol_stall(udc, ep);
++	return -1;
++}
++
++static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++restart:
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
++			ep->ep.name, ep->state, epstatus, epctrl);
++
++	req = NULL;
++	if (!list_empty(&ep->queue))
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		if (req->submitted)
++			next_fifo_transaction(ep, req);
++		else
++			submit_request(ep, req);
++
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		}
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
++		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
++
++		switch (ep->state) {
++		case DATA_STAGE_IN:
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = STATUS_STAGE_OUT;
++			break;
++		case STATUS_STAGE_ADDR:
++			/* Activate our new address */
++			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
++						| USBA_FADDR_EN));
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_IN:
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++				submit_next_request(ep);
++			}
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_TEST:
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			if (do_test_mode(udc))
++				set_protocol_stall(udc, ep);
++			break;
++		default:
++			printk(KERN_ERR
++				"udc: %s: TXCOMP: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		switch (ep->state) {
++		case STATUS_STAGE_OUT:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++			}
++			ep->state = WAIT_FOR_SETUP;
++			break;
++
++		case DATA_STAGE_OUT:
++			receive_data(ep);
++			break;
++
++		default:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			printk(KERN_ERR
++				"udc: %s: RXRDY: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if (epstatus & USBA_RX_SETUP) {
++		union {
++			struct usb_ctrlrequest crq;
++			unsigned long data[2];
++		} crq;
++		unsigned int pkt_len;
++		int ret;
++
++		if (ep->state != WAIT_FOR_SETUP) {
++			/*
++			 * Didn't expect a SETUP packet at this
++			 * point. Clean up any pending requests (which
++			 * may be successful).
++			 */
++			int status = -EPROTO;
++
++			/*
++			 * RXRDY and TXCOMP are dropped when SETUP
++			 * packets arrive.  Just pretend we received
++			 * the status packet.
++			 */
++			if (ep->state == STATUS_STAGE_OUT
++					|| ep->state == STATUS_STAGE_IN) {
++				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++				status = 0;
++			}
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, status);
++			}
++		}
++
++		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
++		if (pkt_len != sizeof(crq)) {
++			printk(KERN_WARNING "udc: Invalid packet length %u "
++				"(expected %lu)\n", pkt_len, sizeof(crq));
++			set_protocol_stall(udc, ep);
++			return;
++		}
++
++		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
++		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
++
++		/* Free up one bank in the FIFO so that we can
++		 * generate or receive a reply right away. */
++		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
++
++		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
++			ep->state, crq.crq.bRequestType,
++			crq.crq.bRequest); */
++
++		if (crq.crq.bRequestType & USB_DIR_IN) {
++			/*
++			 * The USB 2.0 spec states that "if wLength is
++			 * zero, there is no data transfer phase."
++			 * However, testusb #14 seems to actually
++			 * expect a data phase even if wLength = 0...
++			 */
++			ep->state = DATA_STAGE_IN;
++		} else {
++			if (crq.crq.wLength != __constant_cpu_to_le16(0))
++				ep->state = DATA_STAGE_OUT;
++			else
++				ep->state = STATUS_STAGE_IN;
++		}
++
++		ret = -1;
++		if (ep->index == 0)
++			ret = handle_ep0_setup(udc, ep, &crq.crq);
++		else {
++			spin_unlock(&udc->lock);
++			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++			spin_lock(&udc->lock);
++		}
++
++		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
++			crq.crq.bRequestType, crq.crq.bRequest,
++			le16_to_cpu(crq.crq.wLength), ep->state, ret);
++
++		if (ret < 0) {
++			/* Let the host know that we failed */
++			set_protocol_stall(udc, ep);
++		}
++	}
++}
++
++static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
++
++	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
++
++		if (list_empty(&ep->queue)) {
++			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			return;
++		}
++
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++
++		if (req->using_dma) {
++			/* Send a zero-length packet */
++			usba_ep_writel(ep, SET_STA,
++					USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_DIS,
++					USBA_TX_PK_RDY);
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		} else {
++			if (req->submitted)
++				next_fifo_transaction(ep, req);
++			else
++				submit_request(ep, req);
++
++			if (req->last_transaction) {
++				list_del_init(&req->queue);
++				submit_next_request(ep);
++				request_complete(ep, req, 0);
++			}
++		}
++
++		epstatus = usba_ep_readl(ep, STA);
++		epctrl = usba_ep_readl(ep, CTL);
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
++		receive_data(ep);
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++	}
++}
++
++static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 status, control, pending;
++
++	status = usba_dma_readl(ep, STATUS);
++	control = usba_dma_readl(ep, CONTROL);
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	ep->last_dma_status = status;
++#endif
++	pending = status & control;
++	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
++
++	if (status & USBA_DMA_CH_EN) {
++		dev_err(&udc->pdev->dev,
++			"DMA_CH_EN is set after transfer is finished!\n");
++		dev_err(&udc->pdev->dev,
++			"status=%#08x, pending=%#08x, control=%#08x\n",
++			status, pending, control);
++
++		/*
++		 * try to pretend nothing happened. We might have to
++		 * do something here...
++		 */
++	}
++
++	if (list_empty(&ep->queue))
++		/* Might happen if a reset comes along at the right moment */
++		return;
++
++	if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++		usba_update_req(ep, req, status);
++
++		list_del_init(&req->queue);
++		submit_next_request(ep);
++		request_complete(ep, req, 0);
++	}
++}
++
++static irqreturn_t usba_udc_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	u32 status;
++	u32 dma_status;
++	u32 ep_status;
++
++	spin_lock(&udc->lock);
++
++	status = usba_readl(udc, INT_STA);
++	DBG(DBG_INT, "irq, status=%#08x\n", status);
++
++	if (status & USBA_DET_SUSPEND) {
++		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
++		DBG(DBG_BUS, "Suspend detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->suspend) {
++			spin_unlock(&udc->lock);
++			udc->driver->suspend(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	if (status & USBA_WAKE_UP) {
++		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
++		DBG(DBG_BUS, "Wake Up CPU detected\n");
++	}
++
++	if (status & USBA_END_OF_RESUME) {
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
++		DBG(DBG_BUS, "Resume detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->resume) {
++			spin_unlock(&udc->lock);
++			udc->driver->resume(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	dma_status = USBA_BFEXT(DMA_INT, status);
++	if (dma_status) {
++		int i;
++
++		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
++			if (dma_status & (1 << i))
++				usba_dma_irq(udc, &usba_ep[i]);
++	}
++
++	ep_status = USBA_BFEXT(EPT_INT, status);
++	if (ep_status) {
++		int i;
++
++		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
++			if (ep_status & (1 << i)) {
++				if (ep_is_control(&usba_ep[i]))
++					usba_control_irq(udc, &usba_ep[i]);
++				else
++					usba_ep_irq(udc, &usba_ep[i]);
++			}
++	}
++
++	if (status & USBA_END_OF_RESET) {
++		struct usba_ep *ep0;
++
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
++		reset_all_endpoints(udc);
++
++		if (status & USBA_HIGH_SPEED) {
++			DBG(DBG_BUS, "High-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_HIGH;
++		} else {
++			DBG(DBG_BUS, "Full-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_FULL;
++		}
++
++		ep0 = &usba_ep[0];
++		ep0->desc = &usba_ep0_desc;
++		ep0->state = WAIT_FOR_SETUP;
++		usba_ep_writel(ep0, CFG,
++				(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
++				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
++		usba_ep_writel(ep0, CTL_ENB,
++				USBA_EPT_ENABLE | USBA_RX_SETUP);
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++				| USBA_BF(EPT_INT, 1)
++				| USBA_DET_SUSPEND
++				| USBA_END_OF_RESUME));
++
++		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
++			dev_warn(&udc->pdev->dev,
++				 "WARNING: EP0 configuration is invalid!\n");
++	}
++
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t usba_vbus_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	int vbus;
++
++	/* debounce */
++	udelay(10);
++
++	spin_lock(&udc->lock);
++
++	/* May happen if Vbus pin toggles during probe() */
++	if (!udc->driver)
++		goto out;
++
++	vbus = gpio_get_value(udc->vbus_pin);
++	if (vbus != udc->vbus_prev) {
++		if (vbus) {
++			usba_writel(udc, CTRL, USBA_EN_USBA);
++			usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++		} else {
++			udc->gadget.speed = USB_SPEED_UNKNOWN;
++			reset_all_endpoints(udc);
++			usba_writel(udc, CTRL, 0);
++			spin_unlock(&udc->lock);
++			udc->driver->disconnect(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++		udc->vbus_prev = vbus;
++	}
++
++out:
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++int usb_gadget_register_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++	int ret;
++
++	if (!udc->pdev)
++		return -ENODEV;
++
++	spin_lock_irqsave(&udc->lock, flags);
++	if (udc->driver) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		return -EBUSY;
++	}
++
++	udc->driver = driver;
++	udc->gadget.dev.driver = &driver->driver;
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	clk_enable(udc->pclk);
++	clk_enable(udc->hclk);
++
++	ret = driver->bind(&udc->gadget);
++	if (ret) {
++		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
++			driver->driver.name, ret);
++		goto err_driver_bind;
++	}
++
++	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++
++	udc->vbus_prev = 0;
++	if (udc->vbus_pin != -1)
++		enable_irq(gpio_to_irq(udc->vbus_pin));
++
++	/* If Vbus is present, enable the controller and wait for reset */
++	spin_lock_irqsave(&udc->lock, flags);
++	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
++		usba_writel(udc, CTRL, USBA_EN_USBA);
++		usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++
++err_driver_bind:
++	udc->driver = NULL;
++	udc->gadget.dev.driver = NULL;
++	return ret;
++}
++EXPORT_SYMBOL(usb_gadget_register_driver);
++
++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++
++	if (!udc->pdev)
++		return -ENODEV;
++	if (driver != udc->driver)
++		return -EINVAL;
++
++	if (udc->vbus_pin != -1)
++		disable_irq(gpio_to_irq(udc->vbus_pin));
++
++	spin_lock_irqsave(&udc->lock, flags);
++	udc->gadget.speed = USB_SPEED_UNKNOWN;
++	reset_all_endpoints(udc);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	/* This will also disable the DP pullup */
++	usba_writel(udc, CTRL, 0);
++
++	driver->unbind(&udc->gadget);
++	udc->gadget.dev.driver = NULL;
++	udc->driver = NULL;
++
++	clk_disable(udc->hclk);
++	clk_disable(udc->pclk);
++
++	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++
++	return 0;
++}
++EXPORT_SYMBOL(usb_gadget_unregister_driver);
++
++static int __init usba_udc_probe(struct platform_device *pdev)
++{
++	struct usba_platform_data *pdata = pdev->dev.platform_data;
++	struct resource *regs, *fifo;
++	struct clk *pclk, *hclk;
++	struct usba_udc *udc = &the_udc;
++	int irq, ret, i;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
++	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
++	if (!regs || !fifo)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto err_get_hclk;
++	}
++
++	udc->pdev = pdev;
++	udc->pclk = pclk;
++	udc->hclk = hclk;
++	udc->vbus_pin = -1;
++
++	ret = -ENOMEM;
++	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!udc->regs) {
++		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
++		goto err_map_regs;
++	}
++	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
++		 (unsigned long)regs->start, udc->regs);
++	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
++	if (!udc->fifo) {
++		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
++		goto err_map_fifo;
++	}
++	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
++		 (unsigned long)fifo->start, udc->fifo);
++
++	device_initialize(&udc->gadget.dev);
++	udc->gadget.dev.parent = &pdev->dev;
++	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
++
++	platform_set_drvdata(pdev, udc);
++
++	/* Make sure we start from a clean slate */
++	clk_enable(pclk);
++	usba_writel(udc, CTRL, 0);
++	clk_disable(pclk);
++
++	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
++	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
++	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
++	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
++		struct usba_ep *ep = &usba_ep[i];
++
++		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
++		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
++		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
++
++		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
++	}
++
++	ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
++	if (ret) {
++		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
++			irq, ret);
++		goto err_request_irq;
++	}
++	udc->irq = irq;
++
++	ret = device_add(&udc->gadget.dev);
++	if (ret) {
++		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
++		goto err_device_add;
++	}
++
++	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
++		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
++			udc->vbus_pin = pdata->vbus_pin;
++
++			ret = request_irq(gpio_to_irq(udc->vbus_pin),
++					usba_vbus_irq, 0,
++					"atmel_usba_udc", udc);
++			if (ret) {
++				gpio_free(udc->vbus_pin);
++				udc->vbus_pin = -1;
++				dev_warn(&udc->pdev->dev,
++					 "failed to request vbus irq; "
++					 "assuming always on\n");
++			} else {
++				disable_irq(gpio_to_irq(udc->vbus_pin));
++			}
++		}
++	}
++
++	usba_init_debugfs(udc);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_init_debugfs(udc, &usba_ep[i]);
++
++	return 0;
++
++err_device_add:
++	free_irq(irq, udc);
++err_request_irq:
++	iounmap(udc->fifo);
++err_map_fifo:
++	iounmap(udc->regs);
++err_map_regs:
++	clk_put(hclk);
++err_get_hclk:
++	clk_put(pclk);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return ret;
++}
++
++static int __exit usba_udc_remove(struct platform_device *pdev)
++{
++	struct usba_udc *udc;
++	int i;
++
++	udc = platform_get_drvdata(pdev);
++
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_cleanup_debugfs(&usba_ep[i]);
++	usba_cleanup_debugfs(udc);
++
++	if (udc->vbus_pin != -1)
++		gpio_free(udc->vbus_pin);
++
++	free_irq(udc->irq, udc);
++	iounmap(udc->fifo);
++	iounmap(udc->regs);
++	clk_put(udc->hclk);
++	clk_put(udc->pclk);
++
++	device_unregister(&udc->gadget.dev);
++
++	return 0;
++}
++
++static struct platform_driver udc_driver = {
++	.remove		= __exit_p(usba_udc_remove),
++	.driver		= {
++		.name		= "atmel_usba_udc",
++	},
++};
++
++static int __init udc_init(void)
++{
++	return platform_driver_probe(&udc_driver, usba_udc_probe);
++}
++module_init(udc_init);
++
++static void __exit udc_exit(void)
++{
++	platform_driver_unregister(&udc_driver);
++}
++module_exit(udc_exit);
++
++MODULE_DESCRIPTION("Atmel USBA UDC driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h
+new file mode 100644
+index 0000000..f4f0f8b
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.h
+@@ -0,0 +1,350 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
++#define __LINUX_USB_GADGET_USBA_UDC_H__
++
++/* USB register offsets */
++#define USBA_CTRL				0x0000
++#define USBA_FNUM				0x0004
++#define USBA_INT_ENB				0x0010
++#define USBA_INT_STA				0x0014
++#define USBA_INT_CLR				0x0018
++#define USBA_EPT_RST				0x001c
++#define USBA_TST				0x00e0
++
++/* USB endpoint register offsets */
++#define USBA_EPT_CFG				0x0000
++#define USBA_EPT_CTL_ENB			0x0004
++#define USBA_EPT_CTL_DIS			0x0008
++#define USBA_EPT_CTL				0x000c
++#define USBA_EPT_SET_STA			0x0014
++#define USBA_EPT_CLR_STA			0x0018
++#define USBA_EPT_STA				0x001c
++
++/* USB DMA register offsets */
++#define USBA_DMA_NXT_DSC			0x0000
++#define USBA_DMA_ADDRESS			0x0004
++#define USBA_DMA_CONTROL			0x0008
++#define USBA_DMA_STATUS				0x000c
++
++/* Bitfields in CTRL */
++#define USBA_DEV_ADDR_OFFSET			0
++#define USBA_DEV_ADDR_SIZE			7
++#define USBA_FADDR_EN				(1 <<  7)
++#define USBA_EN_USBA				(1 <<  8)
++#define USBA_DETACH				(1 <<  9)
++#define USBA_REMOTE_WAKE_UP			(1 << 10)
++
++/* Bitfields in FNUM */
++#define USBA_MICRO_FRAME_NUM_OFFSET		0
++#define USBA_MICRO_FRAME_NUM_SIZE		3
++#define USBA_FRAME_NUMBER_OFFSET		3
++#define USBA_FRAME_NUMBER_SIZE			11
++#define USBA_FRAME_NUM_ERROR			(1 << 31)
++
++/* Bitfields in INT_ENB/INT_STA/INT_CLR */
++#define USBA_HIGH_SPEED				(1 <<  0)
++#define USBA_DET_SUSPEND			(1 <<  1)
++#define USBA_MICRO_SOF				(1 <<  2)
++#define USBA_SOF				(1 <<  3)
++#define USBA_END_OF_RESET			(1 <<  4)
++#define USBA_WAKE_UP				(1 <<  5)
++#define USBA_END_OF_RESUME			(1 <<  6)
++#define USBA_UPSTREAM_RESUME			(1 <<  7)
++#define USBA_EPT_INT_OFFSET			8
++#define USBA_EPT_INT_SIZE			16
++#define USBA_DMA_INT_OFFSET			24
++#define USBA_DMA_INT_SIZE			8
++
++/* Bitfields in EPT_RST */
++#define USBA_RST_OFFSET				0
++#define USBA_RST_SIZE				16
++
++/* Bitfields in USBA_TST */
++#define USBA_SPEED_CFG_OFFSET			0
++#define USBA_SPEED_CFG_SIZE			2
++#define USBA_TST_J_MODE				(1 <<  2)
++#define USBA_TST_K_MODE				(1 <<  3)
++#define USBA_TST_PKT_MODE			(1 <<  4)
++#define USBA_OPMODE2				(1 <<  5)
++
++/* Bitfields in EPT_CFG */
++#define USBA_EPT_SIZE_OFFSET			0
++#define USBA_EPT_SIZE_SIZE			3
++#define USBA_EPT_DIR_IN				(1 <<  3)
++#define USBA_EPT_TYPE_OFFSET			4
++#define USBA_EPT_TYPE_SIZE			2
++#define USBA_BK_NUMBER_OFFSET			6
++#define USBA_BK_NUMBER_SIZE			2
++#define USBA_NB_TRANS_OFFSET			8
++#define USBA_NB_TRANS_SIZE			2
++#define USBA_EPT_MAPPED				(1 << 31)
++
++/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
++#define USBA_EPT_ENABLE				(1 <<  0)
++#define USBA_AUTO_VALID				(1 <<  1)
++#define USBA_INTDIS_DMA				(1 <<  3)
++#define USBA_NYET_DIS				(1 <<  4)
++#define USBA_DATAX_RX				(1 <<  6)
++#define USBA_MDATA_RX				(1 <<  7)
++/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
++#define USBA_BUSY_BANK_IE			(1 << 18)
++
++/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
++#define USBA_FORCE_STALL			(1 <<  5)
++#define USBA_TOGGLE_CLR				(1 <<  6)
++#define USBA_TOGGLE_SEQ_OFFSET			6
++#define USBA_TOGGLE_SEQ_SIZE			2
++#define USBA_ERR_OVFLW				(1 <<  8)
++#define USBA_RX_BK_RDY				(1 <<  9)
++#define USBA_KILL_BANK				(1 <<  9)
++#define USBA_TX_COMPLETE			(1 << 10)
++#define USBA_TX_PK_RDY				(1 << 11)
++#define USBA_ISO_ERR_TRANS			(1 << 11)
++#define USBA_RX_SETUP				(1 << 12)
++#define USBA_ISO_ERR_FLOW			(1 << 12)
++#define USBA_STALL_SENT				(1 << 13)
++#define USBA_ISO_ERR_CRC			(1 << 13)
++#define USBA_ISO_ERR_NBTRANS			(1 << 13)
++#define USBA_NAK_IN				(1 << 14)
++#define USBA_ISO_ERR_FLUSH			(1 << 14)
++#define USBA_NAK_OUT				(1 << 15)
++#define USBA_CURRENT_BANK_OFFSET		16
++#define USBA_CURRENT_BANK_SIZE			2
++#define USBA_BUSY_BANKS_OFFSET			18
++#define USBA_BUSY_BANKS_SIZE			2
++#define USBA_BYTE_COUNT_OFFSET			20
++#define USBA_BYTE_COUNT_SIZE			11
++#define USBA_SHORT_PACKET			(1 << 31)
++
++/* Bitfields in DMA_CONTROL */
++#define USBA_DMA_CH_EN				(1 <<  0)
++#define USBA_DMA_LINK				(1 <<  1)
++#define USBA_DMA_END_TR_EN			(1 <<  2)
++#define USBA_DMA_END_BUF_EN			(1 <<  3)
++#define USBA_DMA_END_TR_IE			(1 <<  4)
++#define USBA_DMA_END_BUF_IE			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_IE			(1 <<  6)
++#define USBA_DMA_BURST_LOCK			(1 <<  7)
++#define USBA_DMA_BUF_LEN_OFFSET			16
++#define USBA_DMA_BUF_LEN_SIZE			16
++
++/* Bitfields in DMA_STATUS */
++#define USBA_DMA_CH_ACTIVE			(1 <<  1)
++#define USBA_DMA_END_TR_ST			(1 <<  4)
++#define USBA_DMA_END_BUF_ST			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_ST			(1 <<  6)
++
++/* Constants for SPEED_CFG */
++#define USBA_SPEED_CFG_NORMAL			0
++#define USBA_SPEED_CFG_FORCE_HIGH		2
++#define USBA_SPEED_CFG_FORCE_FULL		3
++
++/* Constants for EPT_SIZE */
++#define USBA_EPT_SIZE_8				0
++#define USBA_EPT_SIZE_16			1
++#define USBA_EPT_SIZE_32			2
++#define USBA_EPT_SIZE_64			3
++#define USBA_EPT_SIZE_128			4
++#define USBA_EPT_SIZE_256			5
++#define USBA_EPT_SIZE_512			6
++#define USBA_EPT_SIZE_1024			7
++
++/* Constants for EPT_TYPE */
++#define USBA_EPT_TYPE_CONTROL			0
++#define USBA_EPT_TYPE_ISO			1
++#define USBA_EPT_TYPE_BULK			2
++#define USBA_EPT_TYPE_INT			3
++
++/* Constants for BK_NUMBER */
++#define USBA_BK_NUMBER_ZERO			0
++#define USBA_BK_NUMBER_ONE			1
++#define USBA_BK_NUMBER_DOUBLE			2
++#define USBA_BK_NUMBER_TRIPLE			3
++
++/* Bit manipulation macros */
++#define USBA_BF(name, value)					\
++	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
++	 << USBA_##name##_OFFSET)
++#define USBA_BFEXT(name, value)					\
++	(((value) >> USBA_##name##_OFFSET)			\
++	 & ((1 << USBA_##name##_SIZE) - 1))
++#define USBA_BFINS(name, value, old)				\
++	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
++		    << USBA_##name##_OFFSET))			\
++	 | USBA_BF(name, value))
++
++/* Register access macros */
++#define usba_readl(udc, reg)					\
++	__raw_readl((udc)->regs + USBA_##reg)
++#define usba_writel(udc, reg, value)				\
++	__raw_writel((value), (udc)->regs + USBA_##reg)
++#define usba_ep_readl(ep, reg)					\
++	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
++#define usba_ep_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
++#define usba_dma_readl(ep, reg)					\
++	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
++#define usba_dma_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
++
++/* Calculate base address for a given endpoint or DMA controller */
++#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
++#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
++#define USBA_FIFO_BASE(x)	((x) << 16)
++
++/* Synth parameters */
++#define USBA_NR_ENDPOINTS	7
++
++#define EP0_FIFO_SIZE		64
++#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
++#define EP0_NR_BANKS		1
++
++/*
++ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to
++ * provide this information?
++ */
++#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++
++#define FIFO_IOMEM_ID	0
++#define CTRL_IOMEM_ID	1
++
++#ifdef DEBUG
++#define DBG_ERR		0x0001	/* report all error returns */
++#define DBG_HW		0x0002	/* debug hardware initialization */
++#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
++#define DBG_INT		0x0008	/* interrupts */
++#define DBG_BUS		0x0010	/* report changes in bus state */
++#define DBG_QUEUE	0x0020  /* debug request queue processing */
++#define DBG_FIFO	0x0040  /* debug FIFO contents */
++#define DBG_DMA		0x0080  /* debug DMA handling */
++#define DBG_REQ		0x0100	/* print out queued request length */
++#define DBG_ALL		0xffff
++#define DBG_NONE	0x0000
++
++#define DEBUG_LEVEL	(DBG_ERR)
++#define DBG(level, fmt, ...)					\
++	do {							\
++		if ((level) & DEBUG_LEVEL)			\
++			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
++	} while (0)
++#else
++#define DBG(level, fmt...)
++#endif
++
++enum usba_ctrl_state {
++	WAIT_FOR_SETUP,
++	DATA_STAGE_IN,
++	DATA_STAGE_OUT,
++	STATUS_STAGE_IN,
++	STATUS_STAGE_OUT,
++	STATUS_STAGE_ADDR,
++	STATUS_STAGE_TEST,
++};
++/*
++  EP_STATE_IDLE,
++  EP_STATE_SETUP,
++  EP_STATE_IN_DATA,
++  EP_STATE_OUT_DATA,
++  EP_STATE_SET_ADDR_STATUS,
++  EP_STATE_RX_STATUS,
++  EP_STATE_TX_STATUS,
++  EP_STATE_HALT,
++*/
++
++struct usba_dma_desc {
++	dma_addr_t next;
++	dma_addr_t addr;
++	u32 ctrl;
++};
++
++struct usba_ep {
++	int					state;
++	void __iomem				*ep_regs;
++	void __iomem				*dma_regs;
++	void __iomem				*fifo;
++	struct usb_ep				ep;
++	struct usba_udc				*udc;
++
++	struct list_head			queue;
++	const struct usb_endpoint_descriptor	*desc;
++
++	u16					fifo_size;
++	u8					nr_banks;
++	u8					index;
++	unsigned int				can_dma:1;
++	unsigned int				can_isoc:1;
++	unsigned int				is_isoc:1;
++	unsigned int				is_in:1;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	u32					last_dma_status;
++	struct dentry				*debugfs_dir;
++	struct dentry				*debugfs_queue;
++	struct dentry				*debugfs_dma_status;
++	struct dentry				*debugfs_state;
++#endif
++};
++
++struct usba_request {
++	struct usb_request			req;
++	struct list_head			queue;
++
++	u32					ctrl;
++
++	unsigned int				submitted:1;
++	unsigned int				last_transaction:1;
++	unsigned int				using_dma:1;
++	unsigned int				mapped:1;
++};
++
++struct usba_udc {
++	/* Protect hw registers from concurrent modifications */
++	spinlock_t lock;
++
++	void __iomem *regs;
++	void __iomem *fifo;
++
++	struct usb_gadget gadget;
++	struct usb_gadget_driver *driver;
++	struct platform_device *pdev;
++	int irq;
++	int vbus_pin;
++	struct clk *pclk;
++	struct clk *hclk;
++
++	int test_mode;
++	int vbus_prev;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	struct dentry *debugfs_root;
++	struct dentry *debugfs_regs;
++#endif
++};
++
++static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
++{
++	return container_of(ep, struct usba_ep, ep);
++}
++
++static inline struct usba_request *to_usba_req(struct usb_request *req)
++{
++	return container_of(req, struct usba_request, req);
++}
++
++static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
++{
++	return container_of(gadget, struct usba_udc, gadget);
++}
++
++#define ep_is_control(ep)	((ep)->index == 0)
++#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
++
++#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
+diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
+index 235b618..bb361ab 100644
+--- a/drivers/video/atmel_lcdfb.c
++++ b/drivers/video/atmel_lcdfb.c
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 2580f5f..b6f936a 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE
+ 	  To have support for your specific LCD panel you will have to
+ 	  select the proper drivers which depend on this option.
+ 
++config LCD_LTV350QV
++	tristate "Samsung LTV350QV LCD Panel"
++	depends on LCD_CLASS_DEVICE && SPI_MASTER
++	default n
++	help
++	  If you have a Samsung LTV350QV LCD panel, say y to include a
++	  power control driver for it.  The panel starts up in power
++	  off state, so you need this driver in order to see any
++	  output.
++
++	  The LTV350QV panel is present on all ATSTK1000 boards.
++
+ #
+ # Backlight
+ #
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index c6e2266..965a78b 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -1,6 +1,8 @@
+ # Backlight & LCD drivers
+ 
+ obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
++obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
++
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c
+new file mode 100644
+index 0000000..751dc53
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.c
+@@ -0,0 +1,339 @@
++/*
++ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/lcd.h>
++#include <linux/module.h>
++#include <linux/spi/spi.h>
++
++#include "ltv350qv.h"
++
++#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++
++struct ltv350qv {
++	struct spi_device	*spi;
++	u8			*buffer;
++	int			power;
++	struct lcd_device	*ld;
++};
++
++/*
++ * The power-on and power-off sequences are taken from the
++ * LTV350QV-F04 data sheet from Samsung. The register definitions are
++ * taken from the S6F2002 command list also from Samsung. Both
++ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
++ *
++ * There's still some voodoo going on here, but it's a lot better than
++ * in the first incarnation of the driver where all we had was the raw
++ * numbers from the initialization sequence.
++ */
++static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++{
++	struct spi_message msg;
++	struct spi_transfer index_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++	struct spi_transfer value_xfer = {
++		.len		= 3,
++	};
++
++	spi_message_init(&msg);
++
++	/* register index */
++	lcd->buffer[0] = LTV_OPC_INDEX;
++	lcd->buffer[1] = 0x00;
++	lcd->buffer[2] = reg & 0x7f;
++	index_xfer.tx_buf = lcd->buffer;
++	spi_message_add_tail(&index_xfer, &msg);
++
++	/* register value */
++	lcd->buffer[4] = LTV_OPC_DATA;
++	lcd->buffer[5] = val >> 8;
++	lcd->buffer[6] = val;
++	value_xfer.tx_buf = lcd->buffer + 4;
++	spi_message_add_tail(&value_xfer, &msg);
++
++	return spi_sync(lcd->spi, &msg);
++}
++
++/* The comments are taken straight from the data sheet */
++static int ltv350qv_power_on(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Power On Reset Display off State */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
++		goto err;
++	msleep(15);
++
++	/* Power Setting Function 1 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
++		goto err;
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
++		goto err_power1;
++
++	/* Power Setting Function 2 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			       | LTV_SUPPLY_CURRENT(5)))
++		goto err_power2;
++
++	msleep(55);
++
++	/* Instruction Setting */
++	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
++				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
++	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
++				  LTV_DS_SAME | LTV_CHS_480
++				  | LTV_DF_RGB | LTV_RGB_BGR);
++	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
++				  LTV_VSPL_ACTIVE_LOW
++				  | LTV_HSPL_ACTIVE_LOW
++				  | LTV_DPL_SAMPLE_RISING
++				  | LTV_EPL_ACTIVE_LOW
++				  | LTV_SS_RIGHT_TO_LEFT);
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
++	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
++	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
++	if (ret)
++		goto err_settings;
++
++	/* Wait more than 2 frames */
++	msleep(20);
++
++	/* Display On Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
++				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
++	if (ret)
++		goto err_disp_on;
++
++	/* Display should now be ON. Phew. */
++	return 0;
++
++err_disp_on:
++	/*
++	 * Try to recover. Error handling probably isn't very useful
++	 * at this point, just make a best effort to switch the panel
++	 * off.
++	 */
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			   | LTV_SUPPLY_CURRENT(5));
++	ltv350qv_write_reg(lcd, LTV_GATECTL2,
++			   LTV_NW_INV_1LINE | LTV_FWI(3));
++err_settings:
++err_power2:
++err_power1:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++	msleep(1);
++err:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++	return -EIO;
++}
++
++static int ltv350qv_power_off(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Display Off Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE
++				 | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++
++	/* Power down setting 1 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++
++	/* Wait at least 1 ms */
++	msleep(1);
++
++	/* Power down setting 2 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++
++	/*
++	 * No point in trying to recover here. If we can't switch the
++	 * panel off, what are we supposed to do other than inform the
++	 * user about the failure?
++	 */
++	if (ret)
++		return -EIO;
++
++	/* Display power should now be OFF */
++	return 0;
++}
++
++static int ltv350qv_power(struct ltv350qv *lcd, int power)
++{
++	int ret = 0;
++
++	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_on(lcd);
++	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_off(lcd);
++
++	if (!ret)
++		lcd->power = power;
++
++	return ret;
++}
++
++static int ltv350qv_set_power(struct lcd_device *ld, int power)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return ltv350qv_power(lcd, power);
++}
++
++static int ltv350qv_get_power(struct lcd_device *ld)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return lcd->power;
++}
++
++static struct lcd_ops ltv_ops = {
++	.get_power	= ltv350qv_get_power,
++	.set_power	= ltv350qv_set_power,
++};
++
++static int __devinit ltv350qv_probe(struct spi_device *spi)
++{
++	struct ltv350qv *lcd;
++	struct lcd_device *ld;
++	int ret;
++
++	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
++	if (!lcd)
++		return -ENOMEM;
++
++	lcd->spi = spi;
++	lcd->power = FB_BLANK_POWERDOWN;
++	lcd->buffer = kzalloc(8, GFP_KERNEL);
++
++	ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops);
++	if (IS_ERR(ld)) {
++		ret = PTR_ERR(ld);
++		goto out_free_lcd;
++	}
++	lcd->ld = ld;
++
++	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	if (ret)
++		goto out_unregister;
++
++	dev_set_drvdata(&spi->dev, lcd);
++
++	return 0;
++
++out_unregister:
++	lcd_device_unregister(ld);
++out_free_lcd:
++	kfree(lcd);
++	return ret;
++}
++
++static int __devexit ltv350qv_remove(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	lcd_device_unregister(lcd->ld);
++	kfree(lcd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int ltv350qv_suspend(struct spi_device *spi,
++			    pm_message_t state, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == SUSPEND_POWER_DOWN)
++		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++
++	return 0;
++}
++
++static int ltv350qv_resume(struct spi_device *spi, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == RESUME_POWER_ON)
++		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++
++	return 0;
++}
++#else
++#define ltv350qv_suspend	NULL
++#define ltv350qv_resume		NULL
++#endif
++
++/* Power down all displays on reboot, poweroff or halt */
++static void ltv350qv_shutdown(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++}
++
++static struct spi_driver ltv350qv_driver = {
++	.driver = {
++		.name		= "ltv350qv",
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++
++	.probe		= ltv350qv_probe,
++	.remove		= __devexit_p(ltv350qv_remove),
++	.shutdown	= ltv350qv_shutdown,
++	.suspend	= ltv350qv_suspend,
++	.resume		= ltv350qv_resume,
++};
++
++static int __init ltv350qv_init(void)
++{
++	return spi_register_driver(&ltv350qv_driver);
++}
++
++static void __exit ltv350qv_exit(void)
++{
++	spi_unregister_driver(&ltv350qv_driver);
++}
++module_init(ltv350qv_init);
++module_exit(ltv350qv_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h
+new file mode 100644
+index 0000000..189112e
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.h
+@@ -0,0 +1,95 @@
++/*
++ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LTV350QV_H
++#define __LTV350QV_H
++
++#define LTV_OPC_INDEX	0x74
++#define LTV_OPC_DATA	0x76
++
++#define LTV_ID		0x00		/* ID Read */
++#define LTV_IFCTL	0x01		/* Display Interface Control */
++#define LTV_DATACTL	0x02		/* Display Data Control */
++#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
++#define LTV_GATECTL1	0x04		/* Gate Control 1 */
++#define LTV_GATECTL2	0x05		/* Gate Control 2 */
++#define LTV_VBP		0x06		/* Vertical Back Porch */
++#define LTV_HBP		0x07		/* Horizontal Back Porch */
++#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
++#define LTV_PWRCTL1	0x09		/* Power Control 1 */
++#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
++#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
++
++/* Bit definitions for LTV_IFCTL */
++#define LTV_IM			(1 << 15)
++#define LTV_NMD			(1 << 14)
++#define LTV_SSMD		(1 << 13)
++#define LTV_REV			(1 <<  7)
++#define LTV_NL(x)		(((x) & 0x001f) << 0)
++
++/* Bit definitions for LTV_DATACTL */
++#define LTV_DS_SAME		(0 << 12)
++#define LTV_DS_D_TO_S		(1 << 12)
++#define LTV_DS_S_TO_D		(2 << 12)
++#define LTV_CHS_384		(0 <<  9)
++#define LTV_CHS_480		(1 <<  9)
++#define LTV_CHS_492		(2 <<  9)
++#define LTV_DF_RGB		(0 <<  6)
++#define LTV_DF_RGBX		(1 <<  6)
++#define LTV_DF_XRGB		(2 <<  6)
++#define LTV_RGB_RGB		(0 <<  2)
++#define LTV_RGB_BGR		(1 <<  2)
++#define LTV_RGB_GRB		(2 <<  2)
++#define LTV_RGB_RBG		(3 <<  2)
++
++/* Bit definitions for LTV_ENTRY_MODE */
++#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
++#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
++#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
++#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
++#define LTV_DPL_SAMPLE_RISING	(0 << 13)
++#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
++#define LTV_EPL_ACTIVE_LOW	(0 << 12)
++#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
++#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
++#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
++#define LTV_STB			(1 <<  1)
++
++/* Bit definitions for LTV_GATECTL1 */
++#define LTV_CLW(x)		(((x) & 0x0007) << 12)
++#define LTV_GAON		(1 <<  5)
++#define LTV_SDR			(1 <<  3)
++
++/* Bit definitions for LTV_GATECTL2 */
++#define LTV_NW_INV_FRAME	(0 << 14)
++#define LTV_NW_INV_1LINE	(1 << 14)
++#define LTV_NW_INV_2LINE	(2 << 14)
++#define LTV_DSC			(1 << 12)
++#define LTV_GIF			(1 <<  8)
++#define LTV_FHN			(1 <<  7)
++#define LTV_FTI(x)		(((x) & 0x0003) << 4)
++#define LTV_FWI(x)		(((x) & 0x0003) << 0)
++
++/* Bit definitions for LTV_SOTCTL */
++#define LTV_SDT(x)		(((x) & 0x0007) << 10)
++#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
++
++/* Bit definitions for LTV_PWRCTL1 */
++#define LTV_VCOM_DISABLE	(1 << 14)
++#define LTV_VCOMOUT_ENABLE	(1 << 11)
++#define LTV_POWER_ON		(1 <<  9)
++#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
++#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
++
++/* Bit definitions for LTV_PWRCTL2 */
++#define LTV_VCOML_ENABLE	(1 << 13)
++#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
++#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
++
++#endif /* __LTV350QV_H */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h
+deleted file mode 100644
+index 3914d7b..0000000
+--- a/include/asm-avr32/arch-at32ap/at32ap7000.h
++++ /dev/null
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h
+new file mode 100644
+index 0000000..99684d6
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap/at32ap700x.h
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 0215965..7aa1c29 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -6,6 +6,8 @@
+ 
+ #include <linux/types.h>
+ 
++#define GPIO_PIN_NONE	(-1)
++
+ /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
+ void at32_add_system_devices(void);
+ 
+@@ -31,11 +33,26 @@ struct spi_board_info;
+ struct platform_device *
+ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
+ struct atmel_lcdfb_info;
+ struct platform_device *
+ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ 		     unsigned long fbmem_start, unsigned long fbmem_len);
+ 
++struct usba_platform_data {
++	int vbus_pin;
++};
++struct platform_device *
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
++
++struct ide_platform_data {
++	u8      cs;
++};
++struct platform_device *
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -50,4 +67,26 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++struct platform_device *at32_add_device_ac97c(unsigned int id);
++struct platform_device *at32_add_device_abdac(unsigned int id);
++
++struct cf_platform_data {
++	int	detect_pin;
++	int	reset_pin;
++	int	vcc_pin;
++	int	ready_pin;
++	u8	cs;
++};
++struct platform_device *
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		struct cf_platform_data *data);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
+index a762f42..0dc2026 100644
+--- a/include/asm-avr32/arch-at32ap/cpu.h
++++ b/include/asm-avr32/arch-at32ap/cpu.h
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h
+index ee59e40..4ec6abc 100644
+--- a/include/asm-avr32/arch-at32ap/io.h
++++ b/include/asm-avr32/arch-at32ap/io.h
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
+index 9930871..135e034 100644
+--- a/include/asm-avr32/arch-at32ap/portmux.h
++++ b/include/asm-avr32/arch-at32ap/portmux.h
+@@ -19,10 +19,23 @@
+ #define AT32_GPIOF_OUTPUT	0x00000002	/* (OUT) Enable output driver */
+ #define AT32_GPIOF_HIGH		0x00000004	/* (OUT) Set output high */
+ #define AT32_GPIOF_DEGLITCH	0x00000008	/* (IN) Filter glitches */
++#define AT32_GPIOF_MULTIDRV	0x00000010	/* Enable multidriver option */
+ 
+ void at32_select_periph(unsigned int pin, unsigned int periph,
+ 			unsigned long flags);
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
+index 07152b7..c98eea4 100644
+--- a/include/asm-avr32/arch-at32ap/smc.h
++++ b/include/asm-avr32/arch-at32ap/smc.h
+@@ -15,22 +15,50 @@
+ /*
+  * All timing parameters are in nanoseconds.
+  */
++struct smc_timing {
++	/* Delay from address valid to assertion of given strobe */
++	int ncs_read_setup;
++	int nrd_setup;
++	int ncs_write_setup;
++	int nwe_setup;
++
++	/* Pulse length of given strobe */
++	int ncs_read_pulse;
++	int nrd_pulse;
++	int ncs_write_pulse;
++	int nwe_pulse;
++
++	/* Total cycle length of given operation */
++	int read_cycle;
++	int write_cycle;
++
++	/* Minimal recovery times, will extend cycle if needed */
++	int ncs_read_recover;
++	int nrd_recover;
++	int ncs_write_recover;
++	int nwe_recover;
++};
++
++/*
++ * All timing parameters are in clock cycles.
++ */
+ struct smc_config {
++
+ 	/* Delay from address valid to assertion of given strobe */
+-	u16		ncs_read_setup;
+-	u16		nrd_setup;
+-	u16		ncs_write_setup;
+-	u16		nwe_setup;
++	u8		ncs_read_setup;
++	u8		nrd_setup;
++	u8		ncs_write_setup;
++	u8		nwe_setup;
+ 
+ 	/* Pulse length of given strobe */
+-	u16		ncs_read_pulse;
+-	u16		nrd_pulse;
+-	u16		ncs_write_pulse;
+-	u16		nwe_pulse;
++	u8		ncs_read_pulse;
++	u8		nrd_pulse;
++	u8		ncs_write_pulse;
++	u8		nwe_pulse;
+ 
+ 	/* Total cycle length of given operation */
+-	u16		read_cycle;
+-	u16		write_cycle;
++	u8		read_cycle;
++	u8		write_cycle;
+ 
+ 	/* Bus width in bytes */
+ 	u8		bus_width;
+@@ -76,6 +104,9 @@ struct smc_config {
+ 	unsigned int	tdf_mode:1;
+ };
+ 
++extern void smc_set_timing(struct smc_config *config,
++			   const struct smc_timing *timing);
++
+ extern int smc_set_configuration(int cs, const struct smc_config *config);
+ extern struct smc_config *smc_get_configuration(int cs);
+ 
+diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h
+new file mode 100644
+index 0000000..56a4965
+--- /dev/null
++++ b/include/asm-avr32/dma-controller.h
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
+index 21bb60b..81e3426 100644
+--- a/include/asm-avr32/dma-mapping.h
++++ b/include/asm-avr32/dma-mapping.h
+@@ -264,7 +264,11 @@ static inline void
+ dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ 			size_t size, enum dma_data_direction direction)
+ {
+-	dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+@@ -309,12 +313,11 @@ static inline void
+ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ 		    int nents, enum dma_data_direction direction)
+ {
+-	int i;
+-
+-	for (i = 0; i < nents; i++) {
+-		dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
+-			       sg[i].length, direction);
+-	}
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h
+index a8236ba..dc2d527 100644
+--- a/include/asm-avr32/system.h
++++ b/include/asm-avr32/system.h
+@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
+ 
+ extern void __xchg_called_with_bad_pointer(void);
+ 
+-#ifdef __CHECKER__
+-extern unsigned long __builtin_xchg(void *ptr, unsigned long x);
+-#endif
++static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
++{
++	u32 ret;
+ 
+-#define xchg_u32(val, m) __builtin_xchg((void *)m, val)
++	asm volatile("xchg %[ret], %[m], %[val]"
++			: [ret] "=&r"(ret), "=m"(*m)
++			: "m"(*m), [m] "r"(m), [val] "r"(val)
++			: "memory");
++	return ret;
++}
+ 
+ static inline unsigned long __xchg(unsigned long x,
+ 				       volatile void *ptr,
+diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
+index 3b4e35b..de09009 100644
+--- a/include/asm-avr32/unistd.h
++++ b/include/asm-avr32/unistd.h
+@@ -303,6 +303,19 @@
+ #ifdef __KERNEL__
+ #define NR_syscalls		282
+ 
++/* Old stuff */
++#define __IGNORE_uselib
++#define __IGNORE_mmap
++
++/* NUMA stuff */
++#define __IGNORE_mbind
++#define __IGNORE_get_mempolicy
++#define __IGNORE_set_mempolicy
++#define __IGNORE_migrate_pages
++#define __IGNORE_move_pages
++
++/* SMP stuff */
++#define __IGNORE_getcpu
+ 
+ #define __ARCH_WANT_IPC_PARSE_VERSION
+ #define __ARCH_WANT_STAT64
+diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
+new file mode 100644
+index 0000000..0602339
+--- /dev/null
++++ b/include/linux/atmel-ssc.h
+@@ -0,0 +1,312 @@
++#ifndef __INCLUDE_ATMEL_SSC_H
++#define __INCLUDE_ATMEL_SSC_H
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++
++struct ssc_device {
++	struct list_head	list;
++	void __iomem		*regs;
++	struct platform_device	*pdev;
++	struct clk		*clk;
++	int			user;
++	int			irq;
++};
++
++struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
++void ssc_free(struct ssc_device *ssc);
++
++/* SSC register offsets */
++
++/* SSC Control Register */
++#define SSC_CR				0x00000000
++#define SSC_CR_RXDIS_SIZE			 1
++#define SSC_CR_RXDIS_OFFSET			 1
++#define SSC_CR_RXEN_SIZE			 1
++#define SSC_CR_RXEN_OFFSET			 0
++#define SSC_CR_SWRST_SIZE			 1
++#define SSC_CR_SWRST_OFFSET			15
++#define SSC_CR_TXDIS_SIZE			 1
++#define SSC_CR_TXDIS_OFFSET			 9
++#define SSC_CR_TXEN_SIZE			 1
++#define SSC_CR_TXEN_OFFSET			 8
++
++/* SSC Clock Mode Register */
++#define SSC_CMR				0x00000004
++#define SSC_CMR_DIV_SIZE			12
++#define SSC_CMR_DIV_OFFSET			 0
++
++/* SSC Receive Clock Mode Register */
++#define SSC_RCMR			0x00000010
++#define SSC_RCMR_CKG_SIZE			 2
++#define SSC_RCMR_CKG_OFFSET			 6
++#define SSC_RCMR_CKI_SIZE			 1
++#define SSC_RCMR_CKI_OFFSET			 5
++#define SSC_RCMR_CKO_SIZE			 3
++#define SSC_RCMR_CKO_OFFSET			 2
++#define SSC_RCMR_CKS_SIZE			 2
++#define SSC_RCMR_CKS_OFFSET			 0
++#define SSC_RCMR_PERIOD_SIZE			 8
++#define SSC_RCMR_PERIOD_OFFSET			24
++#define SSC_RCMR_START_SIZE			 4
++#define SSC_RCMR_START_OFFSET			 8
++#define SSC_RCMR_STOP_SIZE			 1
++#define SSC_RCMR_STOP_OFFSET			12
++#define SSC_RCMR_STTDLY_SIZE			 8
++#define SSC_RCMR_STTDLY_OFFSET			16
++
++/* SSC Receive Frame Mode Register */
++#define SSC_RFMR			0x00000014
++#define SSC_RFMR_DATLEN_SIZE			 5
++#define SSC_RFMR_DATLEN_OFFSET			 0
++#define SSC_RFMR_DATNB_SIZE			 4
++#define SSC_RFMR_DATNB_OFFSET			 8
++#define SSC_RFMR_FSEDGE_SIZE			 1
++#define SSC_RFMR_FSEDGE_OFFSET			24
++#define SSC_RFMR_FSLEN_SIZE			 4
++#define SSC_RFMR_FSLEN_OFFSET			16
++#define SSC_RFMR_FSOS_SIZE			 4
++#define SSC_RFMR_FSOS_OFFSET			20
++#define SSC_RFMR_LOOP_SIZE			 1
++#define SSC_RFMR_LOOP_OFFSET			 5
++#define SSC_RFMR_MSBF_SIZE			 1
++#define SSC_RFMR_MSBF_OFFSET			 7
++
++/* SSC Transmit Clock Mode Register */
++#define SSC_TCMR			0x00000018
++#define SSC_TCMR_CKG_SIZE			 2
++#define SSC_TCMR_CKG_OFFSET			 6
++#define SSC_TCMR_CKI_SIZE			 1
++#define SSC_TCMR_CKI_OFFSET			 5
++#define SSC_TCMR_CKO_SIZE			 3
++#define SSC_TCMR_CKO_OFFSET			 2
++#define SSC_TCMR_CKS_SIZE			 2
++#define SSC_TCMR_CKS_OFFSET			 0
++#define SSC_TCMR_PERIOD_SIZE			 8
++#define SSC_TCMR_PERIOD_OFFSET			24
++#define SSC_TCMR_START_SIZE			 4
++#define SSC_TCMR_START_OFFSET			 8
++#define SSC_TCMR_STTDLY_SIZE			 8
++#define SSC_TCMR_STTDLY_OFFSET			16
++
++/* SSC Transmit Frame Mode Register */
++#define SSC_TFMR			0x0000001c
++#define SSC_TFMR_DATDEF_SIZE			 1
++#define SSC_TFMR_DATDEF_OFFSET			 5
++#define SSC_TFMR_DATLEN_SIZE			 5
++#define SSC_TFMR_DATLEN_OFFSET			 0
++#define SSC_TFMR_DATNB_SIZE			 4
++#define SSC_TFMR_DATNB_OFFSET			 8
++#define SSC_TFMR_FSDEN_SIZE			 1
++#define SSC_TFMR_FSDEN_OFFSET			23
++#define SSC_TFMR_FSEDGE_SIZE			 1
++#define SSC_TFMR_FSEDGE_OFFSET			24
++#define SSC_TFMR_FSLEN_SIZE			 4
++#define SSC_TFMR_FSLEN_OFFSET			16
++#define SSC_TFMR_FSOS_SIZE			 3
++#define SSC_TFMR_FSOS_OFFSET			20
++#define SSC_TFMR_MSBF_SIZE			 1
++#define SSC_TFMR_MSBF_OFFSET			 7
++
++/* SSC Receive Hold Register */
++#define SSC_RHR				0x00000020
++#define SSC_RHR_RDAT_SIZE			32
++#define SSC_RHR_RDAT_OFFSET			 0
++
++/* SSC Transmit Hold Register */
++#define SSC_THR				0x00000024
++#define SSC_THR_TDAT_SIZE			32
++#define SSC_THR_TDAT_OFFSET			 0
++
++/* SSC Receive Sync. Holding Register */
++#define SSC_RSHR			0x00000030
++#define SSC_RSHR_RSDAT_SIZE			16
++#define SSC_RSHR_RSDAT_OFFSET			 0
++
++/* SSC Transmit Sync. Holding Register */
++#define SSC_TSHR			0x00000034
++#define SSC_TSHR_TSDAT_SIZE			16
++#define SSC_TSHR_RSDAT_OFFSET			 0
++
++/* SSC Receive Compare 0 Register */
++#define SSC_RC0R			0x00000038
++#define SSC_RC0R_CP0_SIZE			16
++#define SSC_RC0R_CP0_OFFSET			 0
++
++/* SSC Receive Compare 1 Register */
++#define SSC_RC1R			0x0000003c
++#define SSC_RC1R_CP1_SIZE			16
++#define SSC_RC1R_CP1_OFFSET			 0
++
++/* SSC Status Register */
++#define SSC_SR				0x00000040
++#define SSC_SR_CP0_SIZE				 1
++#define SSC_SR_CP0_OFFSET			 8
++#define SSC_SR_CP1_SIZE				 1
++#define SSC_SR_CP1_OFFSET			 9
++#define SSC_SR_ENDRX_SIZE			 1
++#define SSC_SR_ENDRX_OFFSET			 6
++#define SSC_SR_ENDTX_SIZE			 1
++#define SSC_SR_ENDTX_OFFSET			 2
++#define SSC_SR_OVRUN_SIZE			 1
++#define SSC_SR_OVRUN_OFFSET			 5
++#define SSC_SR_RXBUFF_SIZE			 1
++#define SSC_SR_RXBUFF_OFFSET			 7
++#define SSC_SR_RXEN_SIZE			 1
++#define SSC_SR_RXEN_OFFSET			17
++#define SSC_SR_RXRDY_SIZE			 1
++#define SSC_SR_RXRDY_OFFSET			 4
++#define SSC_SR_RXSYN_SIZE			 1
++#define SSC_SR_RXSYN_OFFSET			11
++#define SSC_SR_TXBUFE_SIZE			 1
++#define SSC_SR_TXBUFE_OFFSET			 3
++#define SSC_SR_TXEMPTY_SIZE			 1
++#define SSC_SR_TXEMPTY_OFFSET			 1
++#define SSC_SR_TXEN_SIZE			 1
++#define SSC_SR_TXEN_OFFSET			16
++#define SSC_SR_TXRDY_SIZE			 1
++#define SSC_SR_TXRDY_OFFSET			 0
++#define SSC_SR_TXSYN_SIZE			 1
++#define SSC_SR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Enable Register */
++#define SSC_IER				0x00000044
++#define SSC_IER_CP0_SIZE			 1
++#define SSC_IER_CP0_OFFSET			 8
++#define SSC_IER_CP1_SIZE			 1
++#define SSC_IER_CP1_OFFSET			 9
++#define SSC_IER_ENDRX_SIZE			 1
++#define SSC_IER_ENDRX_OFFSET			 6
++#define SSC_IER_ENDTX_SIZE			 1
++#define SSC_IER_ENDTX_OFFSET			 2
++#define SSC_IER_OVRUN_SIZE			 1
++#define SSC_IER_OVRUN_OFFSET			 5
++#define SSC_IER_RXBUFF_SIZE			 1
++#define SSC_IER_RXBUFF_OFFSET			 7
++#define SSC_IER_RXRDY_SIZE			 1
++#define SSC_IER_RXRDY_OFFSET			 4
++#define SSC_IER_RXSYN_SIZE			 1
++#define SSC_IER_RXSYN_OFFSET			11
++#define SSC_IER_TXBUFE_SIZE			 1
++#define SSC_IER_TXBUFE_OFFSET			 3
++#define SSC_IER_TXEMPTY_SIZE			 1
++#define SSC_IER_TXEMPTY_OFFSET			 1
++#define SSC_IER_TXRDY_SIZE			 1
++#define SSC_IER_TXRDY_OFFSET			 0
++#define SSC_IER_TXSYN_SIZE			 1
++#define SSC_IER_TXSYN_OFFSET			10
++
++/* SSC Interrupt Disable Register */
++#define SSC_IDR				0x00000048
++#define SSC_IDR_CP0_SIZE			 1
++#define SSC_IDR_CP0_OFFSET			 8
++#define SSC_IDR_CP1_SIZE			 1
++#define SSC_IDR_CP1_OFFSET			 9
++#define SSC_IDR_ENDRX_SIZE			 1
++#define SSC_IDR_ENDRX_OFFSET			 6
++#define SSC_IDR_ENDTX_SIZE			 1
++#define SSC_IDR_ENDTX_OFFSET			 2
++#define SSC_IDR_OVRUN_SIZE			 1
++#define SSC_IDR_OVRUN_OFFSET			 5
++#define SSC_IDR_RXBUFF_SIZE			 1
++#define SSC_IDR_RXBUFF_OFFSET			 7
++#define SSC_IDR_RXRDY_SIZE			 1
++#define SSC_IDR_RXRDY_OFFSET			 4
++#define SSC_IDR_RXSYN_SIZE			 1
++#define SSC_IDR_RXSYN_OFFSET			11
++#define SSC_IDR_TXBUFE_SIZE			 1
++#define SSC_IDR_TXBUFE_OFFSET			 3
++#define SSC_IDR_TXEMPTY_SIZE			 1
++#define SSC_IDR_TXEMPTY_OFFSET			 1
++#define SSC_IDR_TXRDY_SIZE			 1
++#define SSC_IDR_TXRDY_OFFSET			 0
++#define SSC_IDR_TXSYN_SIZE			 1
++#define SSC_IDR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Mask Register */
++#define SSC_IMR				0x0000004c
++#define SSC_IMR_CP0_SIZE			 1
++#define SSC_IMR_CP0_OFFSET			 8
++#define SSC_IMR_CP1_SIZE			 1
++#define SSC_IMR_CP1_OFFSET			 9
++#define SSC_IMR_ENDRX_SIZE			 1
++#define SSC_IMR_ENDRX_OFFSET			 6
++#define SSC_IMR_ENDTX_SIZE			 1
++#define SSC_IMR_ENDTX_OFFSET			 2
++#define SSC_IMR_OVRUN_SIZE			 1
++#define SSC_IMR_OVRUN_OFFSET			 5
++#define SSC_IMR_RXBUFF_SIZE			 1
++#define SSC_IMR_RXBUFF_OFFSET			 7
++#define SSC_IMR_RXRDY_SIZE			 1
++#define SSC_IMR_RXRDY_OFFSET			 4
++#define SSC_IMR_RXSYN_SIZE			 1
++#define SSC_IMR_RXSYN_OFFSET			11
++#define SSC_IMR_TXBUFE_SIZE			 1
++#define SSC_IMR_TXBUFE_OFFSET			 3
++#define SSC_IMR_TXEMPTY_SIZE			 1
++#define SSC_IMR_TXEMPTY_OFFSET			 1
++#define SSC_IMR_TXRDY_SIZE			 1
++#define SSC_IMR_TXRDY_OFFSET			 0
++#define SSC_IMR_TXSYN_SIZE			 1
++#define SSC_IMR_TXSYN_OFFSET			10
++
++/* SSC PDC Receive Pointer Register */
++#define SSC_PDC_RPR			0x00000100
++
++/* SSC PDC Receive Counter Register */
++#define SSC_PDC_RCR			0x00000104
++
++/* SSC PDC Transmit Pointer Register */
++#define SSC_PDC_TPR			0x00000108
++
++/* SSC PDC Receive Next Pointer Register */
++#define SSC_PDC_RNPR			0x00000110
++
++/* SSC PDC Receive Next Counter Register */
++#define SSC_PDC_RNCR			0x00000114
++
++/* SSC PDC Transmit Counter Register */
++#define SSC_PDC_TCR			0x0000010c
++
++/* SSC PDC Transmit Next Pointer Register */
++#define SSC_PDC_TNPR			0x00000118
++
++/* SSC PDC Transmit Next Counter Register */
++#define SSC_PDC_TNCR			0x0000011c
++
++/* SSC PDC Transfer Control Register */
++#define SSC_PDC_PTCR			0x00000120
++#define SSC_PDC_PTCR_RXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_RXTDIS_OFFSET		 1
++#define SSC_PDC_PTCR_RXTEN_SIZE			 1
++#define SSC_PDC_PTCR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTCR_TXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_TXTDIS_OFFSET		 9
++#define SSC_PDC_PTCR_TXTEN_SIZE			 1
++#define SSC_PDC_PTCR_TXTEN_OFFSET		 8
++
++/* SSC PDC Transfer Status Register */
++#define SSC_PDC_PTSR			0x00000124
++#define SSC_PDC_PTSR_RXTEN_SIZE			 1
++#define SSC_PDC_PTSR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTSR_TXTEN_SIZE			 1
++#define SSC_PDC_PTSR_TXTEN_OFFSET		 8
++
++/* Bit manipulation macros */
++#define SSC_BIT(name)					\
++	(1 << SSC_##name##_OFFSET)
++#define SSC_BF(name, value)				\
++	(((value) & ((1 << SSC_##name##_SIZE) - 1))	\
++	 << SSC_##name##_OFFSET)
++#define SSC_BFEXT(name, value)				\
++	(((value) >> SSC_##name##_OFFSET)		\
++	 & ((1 << SSC_##name##_SIZE) - 1))
++#define SSC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << SSC_##name##_SIZE) - 1)	\
++	<< SSC_##name##_OFFSET)) | SSC_BF(name, value))
++
++/* Register access macros */
++#define ssc_readl(base, reg)		__raw_readl(base + SSC_##reg)
++#define ssc_writel(base, reg, value)	__raw_writel((value), base + SSC_##reg)
++
++#endif /* __INCLUDE_ATMEL_SSC_H */
+diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h
+new file mode 100644
+index 0000000..0f20a70
+--- /dev/null
++++ b/include/linux/spi/at73c213.h
+@@ -0,0 +1,25 @@
++/*
++ * Board-specific data used to set up AT73c213 audio DAC driver.
++ */
++
++#ifndef __LINUX_SPI_AT73C213_H
++#define __LINUX_SPI_AT73C213_H
++
++/**
++ * at73c213_board_info - how the external DAC is wired to the device.
++ *
++ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio.
++ * @dac_clk: the external clock used to provide master clock to the DAC.
++ * @shortname: a short discription for the DAC, seen by userspace tools.
++ *
++ * This struct contains the configuration of the hardware connection to the
++ * external DAC. The DAC needs a master clock and a I2S audio stream. It also
++ * provides a name which is used to identify it in userspace tools.
++ */
++struct at73c213_board_info {
++	int		ssc_id;
++	struct clk	*dac_clk;
++	char		shortname[32];
++};
++
++#endif /* __LINUX_SPI_AT73C213_H */
+diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h
+index c1d1629..5f38803 100644
+--- a/include/pcmcia/cs_types.h
++++ b/include/pcmcia/cs_types.h
+@@ -21,7 +21,7 @@
+ #include <sys/types.h>
+ #endif
+ 
+-#if defined(__arm__) || defined(__mips__)
++#if defined(__arm__) || defined(__mips__) || defined(__avr32__)
+ /* This (ioaddr_t) is exposed to userspace & hence cannot be changed. */
+ typedef u_int   ioaddr_t;
+ #else
+diff --git a/init/do_mounts.c b/init/do_mounts.c
+index 4efa1e5..0e88ed1 100644
+--- a/init/do_mounts.c
++++ b/init/do_mounts.c
+@@ -219,8 +219,14 @@ __setup("root=", root_dev_setup);
+ 
+ static int __init rootwait_setup(char *str)
+ {
+-	if (*str)
++	if (*str && *str != '=')
+ 		return 0;
++
++	if (*str)
++		printk(KERN_WARNING
++			"WARNING: \"rootwait=1\" is deprecated, "
++			"use \"rootwait\" instead.\n");
++
+ 	root_wait = 1;
+ 	return 1;
+ }
+diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
+index f7844f6..6631586 100755
+--- a/scripts/checkstack.pl
++++ b/scripts/checkstack.pl
+@@ -12,6 +12,7 @@
+ #	sh64 port by Paul Mundt
+ #	Random bits by Matt Mackall <mpm@selenic.com>
+ #	M68k port by Geert Uytterhoeven and Andreas Schwab
++#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
+ #
+ #	Usage:
+ #	objdump -d vmlinux | stackcheck.pl [arch]
+@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs);
+ 	if ($arch eq 'arm') {
+ 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
+ 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
++	} elsif ($arch eq 'avr32') {
++		#8000008a:       20 1d           sub sp,4
++		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
++		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
+ 	} elsif ($arch =~ /^i[3456]86$/) {
+ 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
+ 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
+diff --git a/sound/Kconfig b/sound/Kconfig
+index e48b9b3..29a9979 100644
+--- a/sound/Kconfig
++++ b/sound/Kconfig
+@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
++if SPI
++source "sound/spi/Kconfig"
++endif
++
+ source "sound/mips/Kconfig"
+ 
+ source "sound/sh/Kconfig"
+diff --git a/sound/Makefile b/sound/Makefile
+index 3ead922..e655df7 100644
+--- a/sound/Makefile
++++ b/sound/Makefile
+@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o
+ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/
++obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig
+new file mode 100644
+index 0000000..17d1d91
+--- /dev/null
++++ b/sound/avr32/Kconfig
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile
+new file mode 100644
+index 0000000..5d87d0e
+--- /dev/null
++++ b/sound/avr32/Makefile
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+new file mode 100644
+index 0000000..0ec0b1c
+--- /dev/null
++++ b/sound/avr32/ac97c.c
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h
+new file mode 100644
+index 0000000..96246e7
+--- /dev/null
++++ b/sound/avr32/ac97c.h
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
+index af37cd0..e3cc557 100644
+--- a/sound/oss/Kconfig
++++ b/sound/oss/Kconfig
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff --git a/sound/oss/Makefile b/sound/oss/Makefile
+index 1200670..fafc246 100644
+--- a/sound/oss/Makefile
++++ b/sound/oss/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o ad1848.o
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
+diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c
+new file mode 100644
+index 0000000..cb997d7
+--- /dev/null
++++ b/sound/oss/at32_abdac.c
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h
+new file mode 100644
+index 0000000..3c88e25
+--- /dev/null
++++ b/sound/oss/at32_abdac.h
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig
+new file mode 100644
+index 0000000..0d08c29
+--- /dev/null
++++ b/sound/spi/Kconfig
+@@ -0,0 +1,31 @@
++#SPI drivers
++
++menu "SPI devices"
++	depends on SND != n
++
++config SND_AT73C213
++	tristate "Atmel AT73C213 DAC driver"
++	depends on ATMEL_SSC
++	select SND_PCM
++	help
++	  Say Y here if you want to use the Atmel AT73C213 external DAC. This
++	  DAC can be found on Atmel development boards.
++
++	  This driver requires the Atmel SSC driver for sound sink, a
++	  peripheral found on most AT91 and AVR32 microprocessors.
++
++	  To compile this driver as a module, choose M here: the module will be
++	  called snd-at73c213.
++
++config SND_AT73C213_TARGET_BITRATE
++	int "Target bitrate for AT73C213"
++	depends on SND_AT73C213
++	default "48000"
++	range 8000 50000
++	help
++	  Sets the target bitrate for the bitrate calculator in the driver.
++	  Limited by hardware to be between 8000 Hz and 50000 Hz.
++
++	  Set to 48000 Hz by default.
++
++endmenu
+diff --git a/sound/spi/Makefile b/sound/spi/Makefile
+new file mode 100644
+index 0000000..026fb73
+--- /dev/null
++++ b/sound/spi/Makefile
+@@ -0,0 +1,5 @@
++# Makefile for SPI drivers
++
++snd-at73c213-objs		:= at73c213.o
++
++obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
+diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c
+new file mode 100644
+index 0000000..f514f47
+--- /dev/null
++++ b/sound/spi/at73c213.c
+@@ -0,0 +1,1121 @@
++/*
++ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
++ *
++ * Copyright (C) 2006-2007 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++
++/*#define DEBUG*/
++
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/initval.h>
++#include <sound/control.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++
++#include <linux/atmel-ssc.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
++
++#include "at73c213.h"
++
++#define BITRATE_MIN	 8000 /* Hardware limit? */
++#define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
++#define BITRATE_MAX	50000 /* Hardware limit. */
++
++/* Initial (hardware reset) AT73C213 register values. */
++static u8 snd_at73c213_original_image[18] =
++{
++	0x00,	/* 00 - CTRL    */
++	0x05,	/* 01 - LLIG    */
++	0x05,	/* 02 - RLIG    */
++	0x08,	/* 03 - LPMG    */
++	0x08,	/* 04 - RPMG    */
++	0x00,	/* 05 - LLOG    */
++	0x00,	/* 06 - RLOG    */
++	0x22,	/* 07 - OLC     */
++	0x09,	/* 08 - MC      */
++	0x00,	/* 09 - CSFC    */
++	0x00,	/* 0A - MISC    */
++	0x00,	/* 0B -         */
++	0x00,	/* 0C - PRECH   */
++	0x05,	/* 0D - AUXG    */
++	0x00,	/* 0E -         */
++	0x00,	/* 0F -         */
++	0x00,	/* 10 - RST     */
++	0x00,	/* 11 - PA_CTRL */
++};
++
++struct snd_at73c213 {
++	struct snd_card			*card;
++	struct snd_pcm			*pcm;
++	struct snd_pcm_substream	*substream;
++	struct at73c213_board_info	*board;
++	int				irq;
++	int				period;
++	unsigned long			bitrate;
++	struct clk			*bitclk;
++	struct ssc_device		*ssc;
++	struct spi_device		*spi;
++	u8				spi_wbuffer[2];
++	u8				spi_rbuffer[2];
++	/* Image of the SPI registers in AT73C213. */
++	u8				reg_image[18];
++	/* Protect registers against concurrent access. */
++	spinlock_t			lock;
++};
++
++#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
++
++static int
++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
++{
++	struct spi_message msg;
++	struct spi_transfer msg_xfer = {
++		.len		= 2,
++		.cs_change	= 0,
++	};
++	int retval;
++
++	spi_message_init(&msg);
++
++	chip->spi_wbuffer[0] = reg;
++	chip->spi_wbuffer[1] = val;
++
++	msg_xfer.tx_buf = chip->spi_wbuffer;
++	msg_xfer.rx_buf = chip->spi_rbuffer;
++	spi_message_add_tail(&msg_xfer, &msg);
++
++	retval = spi_sync(chip->spi, &msg);
++
++	if (!retval)
++		chip->reg_image[reg] = val;
++
++	return retval;
++}
++
++static struct snd_pcm_hardware snd_at73c213_playback_hw = {
++	.info		= SNDRV_PCM_INFO_INTERLEAVED |
++			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
++	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
++	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
++	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
++	.channels_min	= 2,
++	.channels_max	= 2,
++	.buffer_bytes_max = 64 * 1024 - 1,
++	.period_bytes_min = 512,
++	.period_bytes_max = 64 * 1024 - 1,
++	.periods_min	= 4,
++	.periods_max	= 1024,
++};
++
++/*
++ * Calculate and set bitrate and divisions.
++ */
++static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
++{
++	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
++	unsigned long dac_rate_new, ssc_div, status;
++	unsigned long ssc_div_max, ssc_div_min;
++	int max_tries;
++
++	/*
++	 * We connect two clocks here, picking divisors so the I2S clocks
++	 * out data at the same rate the DAC clocks it in ... and as close
++	 * as practical to the desired target rate.
++	 *
++	 * The DAC master clock (MCLK) is programmable, and is either 256
++	 * or (not here) 384 times the I2S output clock (BCLK).
++	 */
++
++	/* SSC clock / (bitrate * stereo * 16-bit). */
++	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
++	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
++	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
++	max_tries = (ssc_div_max - ssc_div_min) / 2;
++
++	if (max_tries < 1)
++		max_tries = 1;
++
++	/* ssc_div must be a power of 2. */
++	ssc_div = (ssc_div + 1) & ~1UL;
++
++	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
++		ssc_div -= 2;
++		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
++			return -ENXIO;
++	}
++
++	/* Search for a possible bitrate. */
++	do {
++		/* SSC clock / (ssc divider * 16-bit * stereo). */
++		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
++			return -ENXIO;
++
++		/* 256 / (2 * 16) = 8 */
++		dac_rate_new = 8 * (ssc_rate / ssc_div);
++
++		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
++		if (status < 0)
++			return status;
++
++		/* Ignore difference smaller than 256 Hz. */
++		if ((status/256) == (dac_rate_new/256))
++			goto set_rate;
++
++		ssc_div += 2;
++	} while (--max_tries);
++
++	/* Not able to find a valid bitrate. */
++	return -ENXIO;
++
++set_rate:
++	status = clk_set_rate(chip->board->dac_clk, status);
++	if (status < 0)
++		return status;
++
++	/* Set divider in SSC device. */
++	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
++
++	/* SSC clock / (ssc divider * 16-bit * stereo). */
++	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
++
++	dev_info(&chip->spi->dev,
++			"at73c213: supported bitrate is %lu (%lu divider)\n",
++			chip->bitrate, ssc_div);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	snd_at73c213_playback_hw.rate_min = chip->bitrate;
++	snd_at73c213_playback_hw.rate_max = chip->bitrate;
++	runtime->hw = snd_at73c213_playback_hw;
++	chip->substream = substream;
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	chip->substream = NULL;
++	return 0;
++}
++
++static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
++				 struct snd_pcm_hw_params *hw_params)
++{
++	return snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++}
++
++static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size;
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++
++	chip->period = 0;
++
++	ssc_writel(chip->ssc->regs, PDC_TPR,
++			(long)runtime->dma_addr);
++	ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2);
++	ssc_writel(chip->ssc->regs, PDC_TNPR,
++			(long)runtime->dma_addr + block_size);
++	ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
++				   int cmd)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	int retval = 0;
++
++	spin_lock(&chip->lock);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
++		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
++		break;
++	default:
++		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
++		retval = -EINVAL;
++		break;
++	}
++
++	spin_unlock(&chip->lock);
++
++	return retval;
++}
++
++static snd_pcm_uframes_t
++snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
++		- (unsigned long)runtime->dma_addr;
++
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++static struct snd_pcm_ops at73c213_playback_ops = {
++	.open		= snd_at73c213_pcm_open,
++	.close		= snd_at73c213_pcm_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_at73c213_pcm_hw_params,
++	.hw_free	= snd_at73c213_pcm_hw_free,
++	.prepare	= snd_at73c213_pcm_prepare,
++	.trigger	= snd_at73c213_pcm_trigger,
++	.pointer	= snd_at73c213_pcm_pointer,
++};
++
++static void snd_at73c213_pcm_free(struct snd_pcm *pcm)
++{
++	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
++	if (chip->pcm) {
++		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
++		chip->pcm = NULL;
++	}
++}
++
++static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
++{
++	struct snd_pcm *pcm;
++	int retval;
++
++	retval = snd_pcm_new(chip->card, chip->card->shortname,
++			device, 1, 0, &pcm);
++	if (retval < 0)
++		goto out;
++
++	pcm->private_data = chip;
++	pcm->private_free = snd_at73c213_pcm_free;
++	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
++	strcpy(pcm->name, "at73c213");
++	chip->pcm = pcm;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
++
++	retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm,
++			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
++			64 * 1024, 64 * 1024);
++out:
++	return retval;
++}
++
++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
++{
++	struct snd_at73c213 *chip = dev_id;
++	struct snd_pcm_runtime *runtime = chip->substream->runtime;
++	u32 status;
++	int offset;
++	int block_size;
++	int next_period;
++	int retval = IRQ_NONE;
++
++	spin_lock(&chip->lock);
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++	status = ssc_readl(chip->ssc->regs, IMR);
++
++	if (status & SSC_BIT(IMR_ENDTX)) {
++		chip->period++;
++		if (chip->period == runtime->periods)
++			chip->period = 0;
++		next_period = chip->period + 1;
++		if (next_period == runtime->periods)
++			next_period = 0;
++
++		offset = block_size * next_period;
++
++		ssc_writel(chip->ssc->regs, PDC_TNPR,
++				(long)runtime->dma_addr + offset);
++		ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++		retval = IRQ_HANDLED;
++	}
++
++	ssc_readl(chip->ssc->regs, IMR);
++	spin_unlock(&chip->lock);
++
++	if (status & SSC_BIT(IMR_ENDTX))
++		snd_pcm_period_elapsed(chip->substream);
++
++	return retval;
++}
++
++/*
++ * Mixer functions.
++ */
++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	val = (ucontrol->value.integer.value[0] & mask);
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
++	change = val != chip->reg_image[reg];
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++
++	if (mask == 1)
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	else
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++
++	uinfo->count = 2;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] =
++		(chip->reg_image[left_reg] >> shift_left) & mask;
++	ucontrol->value.integer.value[1] =
++		(chip->reg_image[right_reg] >> shift_right) & mask;
++
++	if (invert) {
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++		ucontrol->value.integer.value[1] =
++			(mask - ucontrol->value.integer.value[1]);
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++	int change, retval;
++	unsigned short val1, val2;
++
++	val1 = ucontrol->value.integer.value[0] & mask;
++	val2 = ucontrol->value.integer.value[1] & mask;
++	if (invert) {
++		val1 = mask - val1;
++		val2 = mask - val2;
++	}
++	val1 <<= shift_left;
++	val2 <<= shift_right;
++
++	spin_lock_irq(&chip->lock);
++
++	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
++	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
++	change = val1 != chip->reg_image[left_reg]
++		|| val2 != chip->reg_image[right_reg];
++	retval = snd_at73c213_write_reg(chip, left_reg, val1);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++	retval = snd_at73c213_write_reg(chip, right_reg, val2);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(0x01 - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	if (ucontrol->value.integer.value[0])
++		val = mask;
++	else
++		val = 0;
++
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val |= (chip->reg_image[reg] & ~(mask << shift));
++	change = val != chip->reg_image[reg];
++
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
++
++	return 0;
++}
++
++static int snd_at73c213_line_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++static int snd_at73c213_aux_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_mono_switch_info,				\
++	.get = snd_at73c213_mono_switch_get,				\
++	.put = snd_at73c213_mono_switch_put,				\
++	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
++}
++
++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_stereo_info,				\
++	.get = snd_at73c213_stereo_get,					\
++	.put = snd_at73c213_stereo_put,					\
++	.private_value = (left_reg | (right_reg << 8)			\
++			| (shift_left << 16) | (shift_right << 19)	\
++			| (mask << 24) | (invert << 22))		\
++}
++
++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "PA Playback Volume",
++	.index	= 0,
++	.info	= snd_at73c213_pa_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Aux Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_aux_capture_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Line Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_line_capture_volume_info,
++	.get	= snd_at73c213_stereo_get,
++	.put	= snd_at73c213_stereo_put,
++	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
++		| (0x1f << 24) | (1 << 22),
++},
++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
++};
++
++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
++{
++	struct snd_card *card;
++	int errval, idx;
++
++	if (chip == NULL || chip->pcm == NULL)
++		return -EINVAL;
++
++	card = chip->card;
++
++	strcpy(card->mixername, chip->pcm->name);
++
++	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
++		errval = snd_ctl_add(card,
++				snd_ctl_new1(&snd_at73c213_controls[idx],
++					chip));
++		if (errval < 0)
++			goto cleanup;
++	}
++
++	return 0;
++
++cleanup:
++	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
++		struct snd_kcontrol *kctl;
++		kctl = snd_ctl_find_numid(card, idx);
++		if (kctl)
++			snd_ctl_remove(card, kctl);
++	}
++	return errval;
++}
++
++/*
++ * Device functions
++ */
++static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
++{
++	/*
++	 * Continuous clock output.
++	 * Starts on falling TF.
++	 * Delay 1 cycle (1 bit).
++	 * Periode is 16 bit (16 - 1).
++	 */
++	ssc_writel(chip->ssc->regs, TCMR,
++			SSC_BF(TCMR_CKO, 1)
++			| SSC_BF(TCMR_START, 4)
++			| SSC_BF(TCMR_STTDLY, 1)
++			| SSC_BF(TCMR_PERIOD, 16 - 1));
++	/*
++	 * Data length is 16 bit (16 - 1).
++	 * Transmit MSB first.
++	 * Transmit 2 words each transfer.
++	 * Frame sync length is 16 bit (16 - 1).
++	 * Frame starts on negative pulse.
++	 */
++	ssc_writel(chip->ssc->regs, TFMR,
++			SSC_BF(TFMR_DATLEN, 16 - 1)
++			| SSC_BIT(TFMR_MSBF)
++			| SSC_BF(TFMR_DATNB, 1)
++			| SSC_BF(TFMR_FSLEN, 16 - 1)
++			| SSC_BF(TFMR_FSOS, 1));
++
++	return 0;
++}
++
++static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
++{
++	int retval;
++	unsigned char dac_ctrl = 0;
++
++	retval = snd_at73c213_set_bitrate(chip);
++	if (retval)
++		goto out;
++
++	/* Enable DAC master clock. */
++	clk_enable(chip->board->dac_clk);
++
++	/* Initialize at73c213 on SPI bus. */
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
++	if (retval)
++		goto out_clk;
++	msleep(1);
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
++	if (retval)
++		goto out_clk;
++
++	/* Precharge everything. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
++			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
++	if (retval)
++		goto out_clk;
++
++	msleep(50);
++
++	/* Stop precharging PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL,
++			(1<<PA_CTRL_APALP) | 0x0f);
++	if (retval)
++		goto out_clk;
++
++	msleep(450);
++
++	/* Stop precharging DAC, turn on master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
++	if (retval)
++		goto out_clk;
++
++	msleep(1);
++
++	/* Turn on DAC. */
++	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
++		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
++
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
++	if (retval)
++		goto out_clk;
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out_clk;
++
++	/* Enable I2S device, i.e. clock output. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	goto out;
++
++out_clk:
++	clk_disable(chip->board->dac_clk);
++out:
++	return retval;
++}
++
++static int snd_at73c213_dev_free(struct snd_device *device)
++{
++	struct snd_at73c213 *chip = device->device_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	if (chip->irq >= 0) {
++		free_irq(chip->irq, chip);
++		chip->irq = -1;
++	}
++
++	return 0;
++}
++
++static int __devinit snd_at73c213_dev_init(struct snd_card *card,
++					 struct spi_device *spi)
++{
++	static struct snd_device_ops ops = {
++		.dev_free	= snd_at73c213_dev_free,
++	};
++	struct snd_at73c213 *chip = get_chip(card);
++	int irq, retval;
++
++	irq = chip->ssc->irq;
++	if (irq < 0)
++		return irq;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->irq = -1;
++
++	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
++	if (retval) {
++		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
++		goto out;
++	}
++	chip->irq = irq;
++
++	memcpy(&chip->reg_image, &snd_at73c213_original_image,
++			sizeof(snd_at73c213_original_image));
++
++	retval = snd_at73c213_ssc_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_chip_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_pcm_new(chip, 0);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_mixer(chip);
++	if (retval)
++		goto out_snd_dev;
++
++	snd_card_set_dev(card, &spi->dev);
++
++	goto out;
++
++out_snd_dev:
++	snd_device_free(card, chip);
++out_irq:
++	free_irq(chip->irq, chip);
++	chip->irq = -1;
++out:
++	return retval;
++}
++
++static int snd_at73c213_probe(struct spi_device *spi)
++{
++	struct snd_card			*card;
++	struct snd_at73c213		*chip;
++	struct at73c213_board_info	*board;
++	int				retval;
++	char				id[16];
++
++	board = spi->dev.platform_data;
++	if (!board) {
++		dev_dbg(&spi->dev, "no platform_data\n");
++		return -ENXIO;
++	}
++
++	if (!board->dac_clk) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return -ENXIO;
++	}
++
++	if (IS_ERR(board->dac_clk)) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return PTR_ERR(board->dac_clk);
++	}
++
++	retval = -ENOMEM;
++
++	/* Allocate "card" using some unused identifiers. */
++	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
++	card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
++	if (!card)
++		goto out;
++
++	chip = card->private_data;
++	chip->spi = spi;
++	chip->board = board;
++
++	chip->ssc = ssc_request(board->ssc_id);
++	if (IS_ERR(chip->ssc)) {
++		dev_dbg(&spi->dev, "could not get ssc%d device\n",
++				board->ssc_id);
++		retval = PTR_ERR(chip->ssc);
++		goto out_card;
++	}
++
++	retval = snd_at73c213_dev_init(card, spi);
++	if (retval)
++		goto out_ssc;
++
++	strcpy(card->driver, "at73c213");
++	strcpy(card->shortname, board->shortname);
++	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
++
++	retval = snd_card_register(card);
++	if (retval)
++		goto out_ssc;
++
++	dev_set_drvdata(&spi->dev, card);
++
++	goto out;
++
++out_ssc:
++	ssc_free(chip->ssc);
++out_card:
++	snd_card_free(card);
++out:
++	return retval;
++}
++
++static int __devexit snd_at73c213_remove(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++	int retval;
++
++	/* Stop playback. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out;
++
++	/* Turn off PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f));
++	if (retval)
++		goto out;
++	msleep(10);
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f);
++	if (retval)
++		goto out;
++
++	/* Turn off external DAC. */
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
++	if (retval)
++		goto out;
++	msleep(2);
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
++	if (retval)
++		goto out;
++
++	/* Turn off master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
++	if (retval)
++		goto out;
++
++out:
++	/* Stop DAC master clock. */
++	clk_disable(chip->board->dac_clk);
++
++	ssc_free(chip->ssc);
++	snd_card_free(card);
++	dev_set_drvdata(&spi->dev, NULL);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	clk_disable(chip->board->dac_clk);
++
++	return 0;
++}
++
++static int snd_at73c213_resume(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	clk_enable(chip->board->dac_clk);
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	return 0;
++}
++#else
++#define snd_at73c213_suspend NULL
++#define snd_at73c213_resume NULL
++#endif
++
++static struct spi_driver at73c213_driver = {
++	.driver		= {
++		.name	= "at73c213",
++	},
++	.probe		= snd_at73c213_probe,
++	.suspend	= snd_at73c213_suspend,
++	.resume		= snd_at73c213_resume,
++	.remove		= __devexit_p(snd_at73c213_remove),
++};
++
++static int __init at73c213_init(void)
++{
++	return spi_register_driver(&at73c213_driver);
++}
++module_init(at73c213_init);
++
++static void __exit at73c213_exit(void)
++{
++	spi_unregister_driver(&at73c213_driver);
++}
++module_exit(at73c213_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h
+new file mode 100644
+index 0000000..fd8b372
+--- /dev/null
++++ b/sound/spi/at73c213.h
+@@ -0,0 +1,119 @@
++/*
++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 - 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++
++#ifndef _SND_AT73C213_H
++#define _SND_AT73C213_H
++
++/* DAC control register */
++#define DAC_CTRL		0x00
++#define DAC_CTRL_ONPADRV	7
++#define DAC_CTRL_ONAUXIN	6
++#define DAC_CTRL_ONDACR		5
++#define DAC_CTRL_ONDACL		4
++#define DAC_CTRL_ONLNOR		3
++#define DAC_CTRL_ONLNOL		2
++#define DAC_CTRL_ONLNIR		1
++#define DAC_CTRL_ONLNIL		0
++
++/* DAC left line in gain register */
++#define DAC_LLIG		0x01
++#define DAC_LLIG_LLIG		0
++
++/* DAC right line in gain register */
++#define DAC_RLIG		0x02
++#define DAC_RLIG_RLIG		0
++
++/* DAC Left Master Playback Gain Register */
++#define DAC_LMPG		0x03
++#define DAC_LMPG_LMPG		0
++
++/* DAC Right Master Playback Gain Register */
++#define DAC_RMPG		0x04
++#define DAC_RMPG_RMPG		0
++
++/* DAC Left Line Out Gain Register */
++#define DAC_LLOG		0x05
++#define DAC_LLOG_LLOG		0
++
++/* DAC Right Line Out Gain Register */
++#define DAC_RLOG		0x06
++#define DAC_RLOG_RLOG		0
++
++/* DAC Output Level Control Register */
++#define DAC_OLC			0x07
++#define DAC_OLC_RSHORT		7
++#define DAC_OLC_ROLC		4
++#define DAC_OLC_LSHORT		3
++#define DAC_OLC_LOLC		0
++
++/* DAC Mixer Control Register */
++#define DAC_MC			0x08
++#define DAC_MC_INVR		5
++#define DAC_MC_INVL		4
++#define DAC_MC_RMSMIN2		3
++#define DAC_MC_RMSMIN1		2
++#define DAC_MC_LMSMIN2		1
++#define DAC_MC_LMSMIN1		0
++
++/* DAC Clock and Sampling Frequency Control Register */
++#define DAC_CSFC		0x09
++#define DAC_CSFC_OVRSEL		4
++
++/* DAC Miscellaneous Register */
++#define DAC_MISC		0x0A
++#define DAC_MISC_VCMCAPSEL	7
++#define DAC_MISC_DINTSEL	4
++#define DAC_MISC_DITHEN		3
++#define DAC_MISC_DEEMPEN	2
++#define DAC_MISC_NBITS		0
++
++/* DAC Precharge Control Register */
++#define DAC_PRECH		0x0C
++#define DAC_PRECH_PRCHGPDRV	7
++#define DAC_PRECH_PRCHGAUX1	6
++#define DAC_PRECH_PRCHGLNOR	5
++#define DAC_PRECH_PRCHGLNOL	4
++#define DAC_PRECH_PRCHGLNIR	3
++#define DAC_PRECH_PRCHGLNIL	2
++#define DAC_PRECH_PRCHG		1
++#define DAC_PRECH_ONMSTR	0
++
++/* DAC Auxiliary Input Gain Control Register */
++#define DAC_AUXG		0x0D
++#define DAC_AUXG_AUXG		0
++
++/* DAC Reset Register */
++#define DAC_RST			0x10
++#define DAC_RST_RESMASK		2
++#define DAC_RST_RESFILZ		1
++#define DAC_RST_RSTZ		0
++
++/* Power Amplifier Control Register */
++#define PA_CTRL			0x11
++#define PA_CTRL_APAON		6
++#define PA_CTRL_APAPRECH	5
++#define PA_CTRL_APALP		4
++#define PA_CTRL_APAGAIN		0
++
++#endif /* _SND_AT73C213_H */
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch
new file mode 100644
index 000000000..99a9d149b
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch
@@ -0,0 +1,11 @@
+--- a/arch/avr32/boards/atngw100/setup.c	2007-11-02 10:47:52.000000000 +0100
++++ b/arch/avr32/boards/atngw100/setup.c	2007-11-02 10:48:00.000000000 +0100
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-300-atngw100-video.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-300-atngw100-video.patch
new file mode 100644
index 000000000..16d2b9675
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.23-300-atngw100-video.patch
@@ -0,0 +1,175 @@
+diff -Nrup linux-2.6.23/arch/avr32/boards/atngw100/flash.c linux-2.6.23-patched/arch/avr32/boards/atngw100/flash.c
+--- a/arch/avr32/boards/atngw100/flash.c	2008-01-31 10:47:55.000000000 -0500
++++ b/arch/avr32/boards/atngw100/flash.c	2008-01-31 10:21:07.000000000 -0500
+@@ -42,7 +42,6 @@ static struct mtd_partition flash_parts[
+ 		.name           = "u-boot",
+ 		.offset         = 0x00000000,
+ 		.size           = 0x00020000,           /* 128 KiB */
+-		.mask_flags     = MTD_WRITEABLE,
+ 	},
+ 	{
+ 		.name           = "root",
+diff -Nrup linux-2.6.23/arch/avr32/boards/atngw100/setup.c linux-2.6.23-patched/arch/avr32/boards/atngw100/setup.c
+--- a/arch/avr32/boards/atngw100/setup.c	2008-01-31 10:47:55.000000000 -0500
++++ b/arch/avr32/boards/atngw100/setup.c	2008-01-31 10:28:00.000000000 -0500
+@@ -16,6 +16,8 @@
+ #include <linux/types.h>
+ #include <linux/leds.h>
+ #include <linux/spi/spi.h>
++#include <linux/fb.h>
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+@@ -27,6 +29,58 @@
+ 
+ /* Initialized by bootloader-specific startup code. */
+ struct tag *bootloader_tags __initdata;
++static struct fb_videomode __initdata video_modes[] = {
++	{
++		.name		= "640x480@60",
++		.refresh	= 60,
++		.xres		= 640,		.yres		= 480,
++		.pixclock	= KHZ2PICOS(23856),
++
++		.left_margin	= 80,		.right_margin	= 16,
++		.upper_margin	= 13,		.lower_margin	= 1,
++		.hsync_len	= 64,		.vsync_len	= 3,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++	{
++		.name		= "320x240@117",
++		.refresh	= 117,
++		.xres		= 320,		.yres		= 240,
++		.pixclock	= KHZ2PICOS(12074),
++
++		.left_margin	= 40,		.right_margin	= 8,
++		.upper_margin	= 14,		.lower_margin	= 1,
++		.hsync_len	= 32,		.vsync_len	= 3,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs __initdata atngw100_default_monspecs = {
++	.manufacturer		= "ATM",
++	.monitor		= "GENERIC",
++	.modedb			= video_modes,
++	.modedb_len		= ARRAY_SIZE(video_modes),
++	.hfmin			= 14820,
++	.hfmax			= 32000,
++	.vfmin			= 30,
++	.vfmax			= 200,
++	.dclkmax		= 30000000,
++};
++
++struct atmel_lcdfb_info __initdata atngw100_lcdc_data = {
++	.default_bpp		= 16,
++	.default_dmacon		= ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++	.default_lcdcon2	= (ATMEL_LCDC_DISTYPE_TFT
++				   | ATMEL_LCDC_INVCLK 
++				   | ATMEL_LCDC_INVDVAL_NORMAL
++				   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
++				   | ATMEL_LCDC_MEMOR_BIG),
++	.default_monspecs	= &atngw100_default_monspecs,
++	.guard_time		= 2,
++};
+ 
+ struct eth_addr {
+ 	u8 addr[6];
+@@ -156,16 +210,19 @@ static int __init atngw100_init(void)
+ 	 * reserve any pins for it.
+ 	 */
+ 
++	at32_add_device_lcdc(1, &atngw100_lcdc_data, fbmem_start, fbmem_size);
++
+ 	at32_add_system_devices();
+ 
+ 	at32_add_device_usart(0);
+ 
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+-	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
++	//set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ 	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
++	at32_add_device_ac97c(0);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+diff -Nrup linux-2.6.23/arch/avr32/mach-at32ap/at32ap700x.c linux-2.6.23-patched/arch/avr32/mach-at32ap/at32ap700x.c
+--- a/arch/avr32/mach-at32ap/at32ap700x.c	2008-01-31 10:47:55.000000000 -0500
++++ b/arch/avr32/mach-at32ap/at32ap700x.c	2008-01-31 10:29:22.000000000 -0500
+@@ -1116,6 +1116,15 @@ at32_add_device_lcdc(unsigned int id, st
+ 	struct fb_videomode *modedb;
+ 	unsigned int modedb_size;
+ 
++	/*  help to prevent DMA underruns, which causes
++		the screen position to jump around */	 
++	hmatrix_writel(SCFG4, HMATRIX_BIT(ARBT) 
++					| HMATRIX_BF(FIXED_DEFMSTR, 0x5) 
++					| HMATRIX_BF(SLOT_CYCLE, 0x40) 
++					| HMATRIX_BF(DEFMSTR_TYPE
++					, HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT));
++	hmatrix_writel(PRAS4, 0x0FF00000);
++
+ 	/*
+ 	 * Do a deep copy of the fb data, monspecs and modedb. Make
+ 	 * sure all allocations are done before setting up the
+@@ -1133,7 +1142,7 @@ at32_add_device_lcdc(unsigned int id, st
+ 	monspecs->modedb = modedb;
+ 
+ 	switch (id) {
+-	case 0:
++	case 0:		// STK1000 peripheral connections
+ 		pdev = &atmel_lcdfb0_device;
+ 		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+ 		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+@@ -1170,6 +1179,43 @@ at32_add_device_lcdc(unsigned int id, st
+ 		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+ 		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+ 		break;
++	case 1:		// NGW100 peripheral connections
++		pdev = &atmel_lcdfb0_device;
++		//select_peripheral(PC(19), PERIPH_B, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PE(1), PERIPH_B, 0);	/* DVAL	  */
++		select_peripheral(PE(2), PERIPH_B, 0);	/* MODE	  */
++		//select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PE(3), PERIPH_B, 0);	/* DATA0  */
++		select_peripheral(PE(4), PERIPH_B, 0);	/* DATA1  */
++		select_peripheral(PE(5), PERIPH_B, 0);	/* DATA2  */
++		select_peripheral(PE(6), PERIPH_B, 0);	/* DATA3  */
++		select_peripheral(PE(7), PERIPH_B, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PE(8),  PERIPH_B, 0);	/* DATA8  */
++		select_peripheral(PE(9),  PERIPH_B, 0);	/* DATA9  */
++		select_peripheral(PE(10),  PERIPH_B, 0);	/* DATA10 */
++		select_peripheral(PE(11),  PERIPH_B, 0);	/* DATA11 */
++		select_peripheral(PE(12),  PERIPH_B, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PE(13), PERIPH_B, 0);	/* DATA16 */
++		select_peripheral(PE(14), PERIPH_B, 0);	/* DATA17 */
++		select_peripheral(PE(15), PERIPH_B, 0);	/* DATA18 */
++		select_peripheral(PE(16), PERIPH_B, 0);	/* DATA19 */
++		select_peripheral(PE(17), PERIPH_B, 0);	/* DATA20 */
++		select_peripheral(PE(18), PERIPH_B, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
+ 
+ 	default:
+ 		goto err_invalid_id;
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-100-avr32-git.1.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
new file mode 100644
index 000000000..173000063
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
@@ -0,0 +1,16922 @@
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/Kconfig linux-avr32/arch/avr32/boards/atngw100/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atngw100/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-avr32/arch/avr32/boards/atngw100/setup.c
+--- linux-2.6.24/arch/avr32/boards/atngw100/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+ 	.sda_pin		= GPIO_PIN_PA(6),
+ 	.scl_pin		= GPIO_PIN_PA(7),
+@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -157,6 +164,7 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+@@ -165,11 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ 	at32_select_gpio(i2c_gpio_data.sda_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	at32_select_gpio(i2c_gpio_data.scl_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h	2008-02-01 14:51:35.000000000 -0500
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c	2008-02-01 14:51:35.000000000 -0500
+@@ -11,7 +11,6 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+@@ -22,7 +21,7 @@
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -49,18 +48,16 @@ static struct eth_platform_data __initda
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static struct at73c213_board_info at73c213_data = {
+ 	.ssc_id		= 0,
+ 	.shortname	= "AVR32 STK1000 external DAC",
+ };
+ #endif
+-#endif
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ 	{
+ 		/* AT73C213 */
+ 		.modalias	= "at73c213",
+@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
+-{
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
+-}
+-
+-#else
+-static void setup_j2_leds(void)
+-{
+-}
+-#endif
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-static void __init at73c213_set_clk(struct at73c213_board_info *info)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+ 	struct clk *gclk;
+ 	struct clk *pll;
+@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru
+ 	}
+ 
+ 	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
+-	info->dac_clk = gclk;
++	at73c213_data.dac_clk = gclk;
+ 
+ err_set_clk:
+ 	clk_put(pll);
+@@ -229,12 +179,16 @@ err_pll:
+ err_gclk:
+ 	return;
+ }
+-#endif
+-#endif
++#else
++static void __init atstk1002_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -271,7 +225,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -281,12 +235,16 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+@@ -294,17 +252,18 @@ static int __init atstk1002_init(void)
+ 			     fbmem_start, fbmem_size);
+ #endif
+ 	at32_add_device_usba(0, NULL);
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
++	at32_add_device_cf(0, 2, &cf0_data);
+ 
+-	setup_j2_leds();
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-	at73c213_set_clk(&at73c213_data);
+-#endif
+-#endif
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig linux-avr32/arch/avr32/boards/atstk1000/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,34 +1,53 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++choice
++	prompt "ATSTK1000 CPU daughterboard type"
++	default BOARD_ATSTK1002
++
++config BOARD_ATSTK1002
++	bool "ATSTK1002"
++	select CPU_AT32AP7000
++
++config BOARD_ATSTK1003
++	bool "ATSTK1003"
++	select CPU_AT32AP7001
++
++config BOARD_ATSTK1004
++	bool "ATSTK1004"
++	select CPU_AT32AP7002
++
++endchoice
++
++
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +85,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Makefile linux-avr32/arch/avr32/boards/atstk1000/Makefile
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/setup.c linux-avr32/arch/avr32/boards/atstk1000/setup.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff -Nrup linux-2.6.24/arch/avr32/configs/atngw100_defconfig linux-avr32/arch/avr32/configs/atngw100_defconfig
+--- linux-2.6.24/arch/avr32/configs/atngw100_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atngw100_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,46 +1,51 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:20:41 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+ CONFIG_BSD_PROCESS_ACCT_V3=y
+ # CONFIG_TASKSTATS is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
+ # CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
+ CONFIG_BLK_DEV_INITRD=y
+@@ -61,35 +66,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ CONFIG_KMOD=y
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -111,6 +109,7 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
+@@ -119,9 +118,9 @@ CONFIG_LOADER_U_BOOT=y
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -141,9 +140,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -153,13 +154,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -213,6 +232,7 @@ CONFIG_INET_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_TRANSPORT=y
+ CONFIG_INET_XFRM_MODE_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+@@ -240,6 +260,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -252,6 +273,7 @@ CONFIG_NF_CONNTRACK_MARK=y
+ # CONFIG_NF_CONNTRACK_EVENTS is not set
+ CONFIG_NF_CT_PROTO_GRE=m
+ # CONFIG_NF_CT_PROTO_SCTP is not set
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
+ CONFIG_NF_CONNTRACK_AMANDA=m
+ CONFIG_NF_CONNTRACK_FTP=m
+ CONFIG_NF_CONNTRACK_H323=m
+@@ -269,9 +291,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m
+ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+ CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+ # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+ CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+ CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+ CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+ # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+@@ -284,6 +308,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -292,6 +317,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m
+ CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+ CONFIG_NETFILTER_XT_MATCH_STRING=m
+ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+ CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+ 
+ #
+@@ -359,13 +386,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -373,10 +406,6 @@ CONFIG_VLAN_8021Q=m
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ CONFIG_NET_CLS_ROUTE=y
+ 
+@@ -384,6 +413,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -397,6 +427,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -405,16 +436,13 @@ CONFIG_NET_CLS_ROUTE=y
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -434,6 +462,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -493,20 +522,8 @@ CONFIG_MTD_DATAFLASH=y
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -517,11 +534,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++# CONFIG_MISC_DEVICES is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -529,30 +542,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ # CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -571,21 +596,14 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ CONFIG_PPP_MPPE=m
+ CONFIG_PPPOE=m
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+@@ -620,23 +638,50 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
+-
+-#
+-# TPM devices
+-#
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,13 +700,25 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# Watchdog Device Drivers
+ #
+-# CONFIG_W1 is not set
+-# CONFIG_HWMON is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -678,23 +735,21 @@ CONFIG_SPI_ATMEL=y
+ #
+ # Graphics support
+ #
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
+ # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
+ 
+ #
+ # Sound
+ #
+ # CONFIG_SOUND is not set
+-
+-#
+-# USB support
+-#
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -706,12 +761,47 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
+ 
+ #
+-# LED devices
++# MMC/SD Host Controller Drivers
+ #
++CONFIG_MMC_SPI=m
+ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ 
+@@ -726,53 +816,71 @@ CONFIG_LEDS_GPIO=y
+ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+-
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
+-#
+-
+-#
+-# LED Triggers
+-#
+-
+-#
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+ #
+-CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS=m
+ # CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
+-CONFIG_JBD=y
+-# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD=m
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -781,7 +889,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -814,8 +923,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=y
++CONFIG_CONFIGFS_FS=m
+ 
+ #
+ # Miscellaneous filesystems
+@@ -830,10 +938,12 @@ CONFIG_CONFIGFS_FS=y
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+ CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -842,19 +952,21 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+ # CONFIG_NFS_V4 is not set
+ # CONFIG_NFS_DIRECTIO is not set
+-# CONFIG_NFSD is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++# CONFIG_NFSD_V4 is not set
++CONFIG_NFSD_TCP=y
+ CONFIG_ROOT_NFS=y
+ CONFIG_LOCKD=y
+ CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
+ CONFIG_NFS_COMMON=y
+ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+@@ -871,23 +983,18 @@ CONFIG_CIFS=m
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+-CONFIG_NLS=y
++CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+-# CONFIG_NLS_CODEPAGE_437 is not set
++CONFIG_NLS_CODEPAGE_437=m
+ # CONFIG_NLS_CODEPAGE_737 is not set
+ # CONFIG_NLS_CODEPAGE_775 is not set
+-CONFIG_NLS_CODEPAGE_850=y
++CONFIG_NLS_CODEPAGE_850=m
+ # CONFIG_NLS_CODEPAGE_852 is not set
+ # CONFIG_NLS_CODEPAGE_855 is not set
+ # CONFIG_NLS_CODEPAGE_857 is not set
+@@ -908,7 +1015,7 @@ CONFIG_NLS_CODEPAGE_850=y
+ # CONFIG_NLS_CODEPAGE_1250 is not set
+ # CONFIG_NLS_CODEPAGE_1251 is not set
+ # CONFIG_NLS_ASCII is not set
+-CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_ISO8859_2 is not set
+ # CONFIG_NLS_ISO8859_3 is not set
+ # CONFIG_NLS_ISO8859_4 is not set
+@@ -921,18 +1028,19 @@ CONFIG_NLS_ISO8859_1=y
+ # CONFIG_NLS_ISO8859_15 is not set
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+-CONFIG_NLS_UTF8=y
+-
+-#
+-# Distributed Lock Manager
+-#
++CONFIG_NLS_UTF8=m
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -941,12 +1049,17 @@ CONFIG_MAGIC_SYSRQ=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -954,21 +1067,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ # CONFIG_FORCED_INLINING is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+ CONFIG_CRYPTO=y
+ CONFIG_CRYPTO_ALGAPI=y
+ CONFIG_CRYPTO_BLKCIPHER=y
+@@ -989,6 +1102,7 @@ CONFIG_CRYPTO_ECB=m
+ CONFIG_CRYPTO_CBC=y
+ CONFIG_CRYPTO_PCBC=m
+ # CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
+ # CONFIG_CRYPTO_CRYPTD is not set
+ CONFIG_CRYPTO_DES=y
+ # CONFIG_CRYPTO_FCRYPT is not set
+@@ -1002,15 +1116,14 @@ CONFIG_CRYPTO_DES=y
+ CONFIG_CRYPTO_ARC4=m
+ # CONFIG_CRYPTO_KHAZAD is not set
+ # CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
+ CONFIG_CRYPTO_DEFLATE=y
+ # CONFIG_CRYPTO_MICHAEL_MIC is not set
+ # CONFIG_CRYPTO_CRC32C is not set
+ # CONFIG_CRYPTO_CAMELLIA is not set
+ # CONFIG_CRYPTO_TEST is not set
+-
+-#
+-# Hardware crypto devices
+-#
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
+ 
+ #
+ # Library routines
+@@ -1018,8 +1131,9 @@ CONFIG_CRYPTO_DEFLATE=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1002_defconfig linux-avr32/arch/avr32/configs/atstk1002_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1002_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1002_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,48 +1,48 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:07:43 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+-CONFIG_BSD_PROCESS_ACCT=y
+-CONFIG_BSD_PROCESS_ACCT_V3=y
+-CONFIG_TASKSTATS=y
+-CONFIG_TASK_DELAY_ACCT=y
+-# CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
+-CONFIG_AUDIT=y
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ CONFIG_RELAY=y
+ CONFIG_BLK_DEV_INITRD=y
+@@ -63,35 +63,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ # CONFIG_MODULE_FORCE_UNLOAD is not set
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ # CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +92,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -113,18 +106,27 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+-CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++CONFIG_BOARD_ATSTK1002=y
++# CONFIG_BOARD_ATSTK1003 is not set
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -144,9 +146,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -156,13 +160,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -182,7 +204,12 @@ CONFIG_NET=y
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+ CONFIG_UNIX=y
+-# CONFIG_NET_KEY is not set
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++CONFIG_NET_KEY=m
++# CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ # CONFIG_IP_MULTICAST is not set
+ # CONFIG_IP_ADVANCED_ROUTER is not set
+@@ -191,36 +218,52 @@ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+ # CONFIG_IP_PNP_RARP is not set
+-# CONFIG_NET_IPIP is not set
+-# CONFIG_NET_IPGRE is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
+ # CONFIG_ARPD is not set
+ # CONFIG_SYN_COOKIES is not set
+-# CONFIG_INET_AH is not set
+-# CONFIG_INET_ESP is not set
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
+ # CONFIG_INET_IPCOMP is not set
+ # CONFIG_INET_XFRM_TUNNEL is not set
+-# CONFIG_INET_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_BEET is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+ CONFIG_TCP_CONG_CUBIC=y
+ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_TCP_MD5SIG is not set
+-# CONFIG_IPV6 is not set
+-# CONFIG_INET6_XFRM_TUNNEL is not set
+-# CONFIG_INET6_TUNNEL is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
+ # CONFIG_NETWORK_SECMARK is not set
+ # CONFIG_NETFILTER is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ # CONFIG_VLAN_8021Q is not set
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -228,16 +271,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ 
+ #
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -251,6 +291,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -259,16 +300,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -288,6 +326,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -327,6 +366,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +386,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,42 +398,87 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+ # SCSI device support
+ #
+ # CONFIG_RAID_ATTRS is not set
+-# CONFIG_SCSI is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
+ # CONFIG_SCSI_NETLINK is not set
+-# CONFIG_ATA is not set
++# CONFIG_SCSI_PROC_FS is not set
+ 
+ #
+-# Multi-device support (RAID and LVM)
++# SCSI support type (disk, tape, CD-ROM)
+ #
+-# CONFIG_MD is not set
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
+ 
+ #
+-# Network device support
++# SCSI Transports
+ #
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_LOWLEVEL is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
+ CONFIG_NETDEVICES=y
+-CONFIG_DUMMY=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -423,27 +497,54 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,35 +573,87 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+-# TPM devices
++# SPI support
+ #
+-# CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
+ 
+ #
+-# SPI support
++# SPI Master Controller Drivers
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -517,23 +670,94 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++# CONFIG_SND_VERBOSE_PROCFS is not set
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -545,47 +769,116 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
+-
+-#
+-# LED devices
+-#
+-# CONFIG_NEW_LEDS is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
+ 
+ #
+ # LED drivers
+ #
++CONFIG_LEDS_GPIO=m
+ 
+ #
+ # LED Triggers
+ #
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+@@ -593,8 +886,11 @@ CONFIG_UNIX98_PTYS=y
+ CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +905,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -637,8 +933,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++# CONFIG_CONFIGFS_FS is not set
+ 
+ #
+ # Miscellaneous filesystems
+@@ -652,11 +947,12 @@ CONFIG_CONFIGFS_FS=m
+ # CONFIG_EFS_FS is not set
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+-CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -665,10 +961,7 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+@@ -688,17 +981,12 @@ CONFIG_SUNRPC=y
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+ CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+ CONFIG_NLS_CODEPAGE_437=m
+@@ -739,17 +1027,18 @@ CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+ CONFIG_NLS_UTF8=m
+-
+-#
+-# Distributed Lock Manager
+-#
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -758,12 +1047,17 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -771,22 +1065,63 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+-# CONFIG_CRYPTO is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=m
++CONFIG_CRYPTO_BLKCIPHER=m
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_MANAGER=m
++CONFIG_CRYPTO_HMAC=m
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=m
++CONFIG_CRYPTO_SHA1=m
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_WP512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_ECB is not set
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_TEST is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_HW is not set
+ 
+ #
+ # Library routines
+@@ -794,10 +1129,10 @@ CONFIG_FORCED_INLINING=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+-CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+ CONFIG_PLIST=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1003_defconfig linux-avr32/arch/avr32/configs/atstk1003_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1003_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1003_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1015 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 22:54:34 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7001=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++CONFIG_BOARD_ATSTK1003=y
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=m
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++CONFIG_CRC7=m
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1004_defconfig linux-avr32/arch/avr32/configs/atstk1004_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1004_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1004_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,621 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:04:20 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++# CONFIG_BLOCK is not set
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++# CONFIG_BOARD_ATSTK1003 is not set
++CONFIG_BOARD_ATSTK1004=y
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_MISC_DEVICES is not set
++
++#
++# SCSI device support
++#
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_NEW_LEDS is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++# CONFIG_INSTRUMENTATION is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.c linux-avr32/arch/avr32/drivers/dw-dmac.c
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.h linux-avr32/arch/avr32/drivers/dw-dmac.h
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.h	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff -Nrup linux-2.6.24/arch/avr32/drivers/Makefile linux-avr32/arch/avr32/drivers/Makefile
+--- linux-2.6.24/arch/avr32/drivers/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig linux-avr32/arch/avr32/Kconfig
+--- linux-2.6.24/arch/avr32/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32
+ config ARCH_HAS_ILOG2_U64
+ 	def_bool n
+ 
++config ARCH_SUPPORTS_OPROFILE
++	def_bool y
++
+ config GENERIC_HWEIGHT
+ 	def_bool y
+ 
+@@ -81,19 +84,23 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
+-choice
+-	prompt "AVR32 CPU type"
+-	default CPU_AT32AP7000
++#
++# CPU types
++#
+ 
+-config CPU_AT32AP7000
+-	bool "AT32AP7000"
++# AP7000 derivatives
++config CPU_AT32AP700X
++	bool
+ 	select PLATFORM_AT32AP
+-endchoice
+-
+-#
+-# CPU Daughterboards for ATSTK1000
+-config BOARD_ATSTK1002
++config CPU_AT32AP7000
++	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7001
+ 	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7002
++	bool
++	select CPU_AT32AP700X
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -101,15 +108,18 @@ choice
+ 
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+-	select BOARD_ATSTK1002 if CPU_AT32AP7000
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
++	select CPU_AT32AP7000
+ endchoice
+ 
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config NMI_DEBUGGING
++	bool "NMI Debugging"
++	default n
++	help
++	  Say Y here and pass the nmi_debug command-line parameter to
++	  the kernel to turn on NMI debugging. Depending on the value
++	  of the nmi_debug option, various pieces of information will
++	  be dumped to the console when a Non-Maskable Interrupt
++	  happens.
++
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+@@ -219,6 +243,8 @@ source "drivers/Kconfig"
+ 
+ source "fs/Kconfig"
+ 
++source "kernel/Kconfig.instrumentation"
++
+ source "arch/avr32/Kconfig.debug"
+ 
+ source "security/Kconfig"
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig.debug linux-avr32/arch/avr32/Kconfig.debug
+--- linux-2.6.24/arch/avr32/Kconfig.debug	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig.debug	2008-02-01 14:51:35.000000000 -0500
+@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT
+ 
+ source "lib/Kconfig.debug"
+ 
+-config KPROBES
+-	bool "Kprobes"
+-	depends on DEBUG_KERNEL
+-	help
+-	  Kprobes allows you to trap at almost any kernel address and
+-          execute a callback function.  register_kprobe() establishes
+-          a probepoint and specifies the callback.  Kprobes is useful
+-          for kernel debugging, non-intrusive instrumentation and testing.
+-          If in doubt, say "N".
+-
+ endmenu
+diff -Nrup linux-2.6.24/arch/avr32/kernel/cpu.c linux-avr32/arch/avr32/kernel/cpu.c
+--- linux-2.6.24/arch/avr32/kernel/cpu.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/cpu.c	2008-02-01 14:51:35.000000000 -0500
+@@ -13,6 +13,7 @@
+ #include <linux/percpu.h>
+ #include <linux/param.h>
+ #include <linux/errno.h>
++#include <linux/clk.h>
+ 
+ #include <asm/setup.h>
+ #include <asm/sysreg.h>
+@@ -187,9 +188,20 @@ static int __init topology_init(void)
+ 
+ subsys_initcall(topology_init);
+ 
++struct chip_id_map {
++	u16	mid;
++	u16	pn;
++	const char *name;
++};
++
++static const struct chip_id_map chip_names[] = {
++	{ .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
++};
++#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
++
+ static const char *cpu_names[] = {
+ 	"Morgan",
+-	"AP7000",
++	"AP7",
+ };
+ #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
+ 
+@@ -206,12 +218,32 @@ static const char *mmu_types[] = {
+ 	"MPU"
+ };
+ 
++static const char *cpu_feature_flags[] = {
++	"rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
++};
++
++static const char *get_chip_name(struct avr32_cpuinfo *cpu)
++{
++	unsigned int i;
++	unsigned int mid = avr32_get_manufacturer_id(cpu);
++	unsigned int pn = avr32_get_product_number(cpu);
++
++	for (i = 0; i < NR_CHIP_NAMES; i++) {
++		if (chip_names[i].mid == mid && chip_names[i].pn == pn)
++			return chip_names[i].name;
++	}
++
++	return "(unknown)";
++}
++
+ void __init setup_processor(void)
+ {
+ 	unsigned long config0, config1;
+ 	unsigned long features;
+ 	unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
++	unsigned device_id;
+ 	unsigned tmp;
++	unsigned i;
+ 
+ 	config0 = sysreg_read(CONFIG0);
+ 	config1 = sysreg_read(CONFIG1);
+@@ -221,11 +253,14 @@ void __init setup_processor(void)
+ 	arch_rev = SYSREG_BFEXT(AR, config0);
+ 	mmu_type = SYSREG_BFEXT(MMUT, config0);
+ 
++	device_id = ocd_read(DID);
++
+ 	boot_cpu_data.arch_type = arch_id;
+ 	boot_cpu_data.cpu_type = cpu_id;
+ 	boot_cpu_data.arch_revision = arch_rev;
+ 	boot_cpu_data.cpu_revision = cpu_rev;
+ 	boot_cpu_data.tlb_config = mmu_type;
++	boot_cpu_data.device_id = device_id;
+ 
+ 	tmp = SYSREG_BFEXT(ILSZ, config1);
+ 	if (tmp) {
+@@ -247,41 +282,34 @@ void __init setup_processor(void)
+ 		return;
+ 	}
+ 
+-	printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
++	printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
++	printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
+ 		cpu_names[cpu_id], cpu_id, cpu_rev,
+ 		arch_names[arch_id], arch_rev);
+ 	printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
+ 
+ 	printk ("CPU: features:");
+ 	features = 0;
+-	if (config0 & SYSREG_BIT(CONFIG0_R)) {
++	if (config0 & SYSREG_BIT(CONFIG0_R))
+ 		features |= AVR32_FEATURE_RMW;
+-		printk(" rmw");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_D)) {
++	if (config0 & SYSREG_BIT(CONFIG0_D))
+ 		features |= AVR32_FEATURE_DSP;
+-		printk(" dsp");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_S)) {
++	if (config0 & SYSREG_BIT(CONFIG0_S))
+ 		features |= AVR32_FEATURE_SIMD;
+-		printk(" simd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_O)) {
++	if (config0 & SYSREG_BIT(CONFIG0_O))
+ 		features |= AVR32_FEATURE_OCD;
+-		printk(" ocd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_P)) {
++	if (config0 & SYSREG_BIT(CONFIG0_P))
+ 		features |= AVR32_FEATURE_PCTR;
+-		printk(" perfctr");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_J)) {
++	if (config0 & SYSREG_BIT(CONFIG0_J))
+ 		features |= AVR32_FEATURE_JAVA;
+-		printk(" java");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_F)) {
++	if (config0 & SYSREG_BIT(CONFIG0_F))
+ 		features |= AVR32_FEATURE_FPU;
+-		printk(" fpu");
+-	}
++
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (features & (1 << i))
++			printk(" %s", cpu_feature_flags[i]);
++
+ 	printk("\n");
+ 	boot_cpu_data.features = features;
+ }
+@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo
+ {
+ 	unsigned int icache_size, dcache_size;
+ 	unsigned int cpu = smp_processor_id();
++	unsigned int freq;
++	unsigned int i;
+ 
+ 	icache_size = boot_cpu_data.icache.ways *
+ 		boot_cpu_data.icache.sets *
+@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo
+ 
+ 	seq_printf(m, "processor\t: %d\n", cpu);
+ 
++	seq_printf(m, "chip type\t: %s revision %c\n",
++			get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
+ 	if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
+-		seq_printf(m, "cpu family\t: %s revision %d\n",
++		seq_printf(m, "cpu arch\t: %s revision %d\n",
+ 			   arch_names[boot_cpu_data.arch_type],
+ 			   boot_cpu_data.arch_revision);
+ 	if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
+-		seq_printf(m, "cpu type\t: %s revision %d\n",
++		seq_printf(m, "cpu core\t: %s revision %d\n",
+ 			   cpu_names[boot_cpu_data.cpu_type],
+ 			   boot_cpu_data.cpu_revision);
+ 
++	freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
++	seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
++
+ 	seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
+ 		   icache_size >> 10,
+ 		   boot_cpu_data.icache.ways,
+@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo
+ 		   boot_cpu_data.dcache.ways,
+ 		   boot_cpu_data.dcache.sets,
+ 		   boot_cpu_data.dcache.linesz);
+-	seq_printf(m, "bogomips\t: %lu.%02lu\n",
++
++	seq_printf(m, "features\t:");
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (boot_cpu_data.features & (1 << i))
++			seq_printf(m, " %s", cpu_feature_flags[i]);
++
++	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
+ 		   boot_cpu_data.loops_per_jiffy / (500000/HZ),
+ 		   (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
+ 
+@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v
+ 
+ }
+ 
+-struct seq_operations cpuinfo_op = {
++const struct seq_operations cpuinfo_op = {
+ 	.start	= c_start,
+ 	.next	= c_next,
+ 	.stop	= c_stop,
+diff -Nrup linux-2.6.24/arch/avr32/kernel/dma-controller.c linux-avr32/arch/avr32/kernel/dma-controller.c
+--- linux-2.6.24/arch/avr32/kernel/dma-controller.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/dma-controller.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/irq.c linux-avr32/arch/avr32/kernel/irq.c
+--- linux-2.6.24/arch/avr32/kernel/irq.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/irq.c	2008-02-01 14:51:35.000000000 -0500
+@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq)
+ 	printk("unexpected IRQ %u\n", irq);
+ }
+ 
++/* May be overridden by platform code */
++int __weak nmi_enable(void)
++{
++	return -ENOSYS;
++}
++
++void __weak nmi_disable(void)
++{
++
++}
++
+ #ifdef CONFIG_PROC_FS
+ int show_interrupts(struct seq_file *p, void *v)
+ {
+diff -Nrup linux-2.6.24/arch/avr32/kernel/kprobes.c linux-avr32/arch/avr32/kernel/kprobes.c
+--- linux-2.6.24/arch/avr32/kernel/kprobes.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/kprobes.c	2008-02-01 14:51:35.000000000 -0500
+@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct
+ void __kprobes arch_arm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("arming kprobe at %p\n", p->addr);
++	ocd_enable(NULL);
+ 	*p->addr = BREAKPOINT_INSTRUCTION;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp
+ void __kprobes arch_disarm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("disarming kprobe at %p\n", p->addr);
++	ocd_disable(NULL);
+ 	*p->addr = p->opcode;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru
+ 
+ int __init arch_init_kprobes(void)
+ {
+-	printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
+-	ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
+-
+ 	/* TODO: Register kretprobe trampoline */
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/kernel/Makefile linux-avr32/arch/avr32/kernel/Makefile
+--- linux-2.6.24/arch/avr32/kernel/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -6,9 +6,11 @@ extra-y				:= head.o vmlinux.lds
+ 
+ obj-$(CONFIG_SUBARCH_AVR32B)	+= entry-avr32b.o
+ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+-obj-y				+= setup.o traps.o semaphore.o ptrace.o
++obj-y				+= setup.o traps.o semaphore.o ocd.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+ obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
++obj-$(CONFIG_NMI_DEBUGGING)	+= nmi_debug.o
+diff -Nrup linux-2.6.24/arch/avr32/kernel/nmi_debug.c linux-avr32/arch/avr32/kernel/nmi_debug.c
+--- linux-2.6.24/arch/avr32/kernel/nmi_debug.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/nmi_debug.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/kdebug.h>
++#include <linux/notifier.h>
++#include <linux/sched.h>
++
++#include <asm/irq.h>
++
++enum nmi_action {
++	NMI_SHOW_STATE	= 1 << 0,
++	NMI_SHOW_REGS	= 1 << 1,
++	NMI_DIE		= 1 << 2,
++	NMI_DEBOUNCE	= 1 << 3,
++};
++
++static unsigned long nmi_actions;
++
++static int nmi_debug_notify(struct notifier_block *self,
++		unsigned long val, void *data)
++{
++	struct die_args *args = data;
++
++	if (likely(val != DIE_NMI))
++		return NOTIFY_DONE;
++
++	if (nmi_actions & NMI_SHOW_STATE)
++		show_state();
++	if (nmi_actions & NMI_SHOW_REGS)
++		show_regs(args->regs);
++	if (nmi_actions & NMI_DEBOUNCE)
++		mdelay(10);
++	if (nmi_actions & NMI_DIE)
++		return NOTIFY_BAD;
++
++	return NOTIFY_OK;
++}
++
++static struct notifier_block nmi_debug_nb = {
++	.notifier_call = nmi_debug_notify,
++};
++
++static int __init nmi_debug_setup(char *str)
++{
++	char *p, *sep;
++
++	register_die_notifier(&nmi_debug_nb);
++	if (nmi_enable()) {
++		printk(KERN_WARNING "Unable to enable NMI.\n");
++		return 0;
++	}
++
++	if (*str != '=')
++		return 0;
++
++	for (p = str + 1; *p; p = sep + 1) {
++		sep = strchr(p, ',');
++		if (sep)
++			*sep = 0;
++		if (strcmp(p, "state") == 0)
++			nmi_actions |= NMI_SHOW_STATE;
++		else if (strcmp(p, "regs") == 0)
++			nmi_actions |= NMI_SHOW_REGS;
++		else if (strcmp(p, "debounce") == 0)
++			nmi_actions |= NMI_DEBOUNCE;
++		else if (strcmp(p, "die") == 0)
++			nmi_actions |= NMI_DIE;
++		else
++			printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
++				p);
++		if (!sep)
++			break;
++	}
++
++	return 0;
++}
++__setup("nmi_debug", nmi_debug_setup);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ocd.c linux-avr32/arch/avr32/kernel/ocd.c
+--- linux-2.6.24/arch/avr32/kernel/ocd.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ocd.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,163 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/spinlock.h>
++
++#include <asm/ocd.h>
++
++static long ocd_count;
++static spinlock_t ocd_lock;
++
++/**
++ * ocd_enable - enable on-chip debugging
++ * @child: task to be debugged
++ *
++ * If @child is non-NULL, ocd_enable() first checks if debugging has
++ * already been enabled for @child, and if it has, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging
++ * has not already been enabled for it, ocd_enable() increments the
++ * reference count and enables the debugging hardware.
++ */
++void ocd_enable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (child)
++		pr_debug("ocd_enable: child=%s [%u]\n",
++				child->comm, child->pid);
++	else
++		pr_debug("ocd_enable (no child)\n");
++
++	if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count++;
++		dc = ocd_read(DC);
++		dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
++		ocd_write(DC, dc);
++		spin_unlock(&ocd_lock);
++	}
++}
++
++/**
++ * ocd_disable - disable on-chip debugging
++ * @child: task that was being debugged, but isn't anymore
++ *
++ * If @child is non-NULL, ocd_disable() checks if debugging is enabled
++ * for @child, and if it isn't, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging is
++ * enabled, ocd_disable() decrements the reference count, and if it
++ * reaches zero, disables the debugging hardware.
++ */
++void ocd_disable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (!child)
++		pr_debug("ocd_disable (no child)\n");
++	else if (test_tsk_thread_flag(child, TIF_DEBUG))
++		pr_debug("ocd_disable: child=%s [%u]\n",
++				child->comm, child->pid);
++
++	if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count--;
++
++		WARN_ON(ocd_count < 0);
++
++		if (ocd_count <= 0) {
++			dc = ocd_read(DC);
++			dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
++			ocd_write(DC, dc);
++		}
++		spin_unlock(&ocd_lock);
++	}
++}
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/module.h>
++
++static struct dentry *ocd_debugfs_root;
++static struct dentry *ocd_debugfs_DC;
++static struct dentry *ocd_debugfs_DS;
++static struct dentry *ocd_debugfs_count;
++
++static u64 ocd_DC_get(void *data)
++{
++	return ocd_read(DC);
++}
++static void ocd_DC_set(void *data, u64 val)
++{
++	ocd_write(DC, val);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
++
++static u64 ocd_DS_get(void *data)
++{
++	return ocd_read(DS);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
++
++static u64 ocd_count_get(void *data)
++{
++	return ocd_count;
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
++
++static void ocd_debugfs_init(void)
++{
++	struct dentry *root;
++
++	root = debugfs_create_dir("ocd", NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	ocd_debugfs_root = root;
++
++	ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
++				root, NULL, &fops_DC);
++	if (!ocd_debugfs_DC)
++		goto err_DC;
++
++	ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
++				NULL, &fops_DS);
++	if (!ocd_debugfs_DS)
++		goto err_DS;
++
++	ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
++				NULL, &fops_count);
++	if (!ocd_debugfs_count)
++		goto err_count;
++
++	return;
++
++err_count:
++	debugfs_remove(ocd_debugfs_DS);
++err_DS:
++	debugfs_remove(ocd_debugfs_DC);
++err_DC:
++	debugfs_remove(ocd_debugfs_root);
++err_root:
++	printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
++}
++#else
++static inline void ocd_debugfs_init(void)
++{
++
++}
++#endif
++
++static int __init ocd_init(void)
++{
++	spin_lock_init(&ocd_lock);
++	ocd_debugfs_init();
++	return 0;
++}
++arch_initcall(ocd_init);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/process.c linux-avr32/arch/avr32/kernel/process.c
+--- linux-2.6.24/arch/avr32/kernel/process.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/process.c	2008-02-01 14:51:35.000000000 -0500
+@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread);
+  */
+ void exit_thread(void)
+ {
+-	/* nothing to do */
++	ocd_disable(current);
+ }
+ 
+ void flush_thread(void)
+@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long cl
+ 	p->thread.cpu_context.ksp = (unsigned long)childregs;
+ 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
+ 
++	if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
++		ocd_enable(p);
++
+ 	return 0;
+ }
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ptrace.c linux-avr32/arch/avr32/kernel/ptrace.c
+--- linux-2.6.24/arch/avr32/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ptrace.c	2008-02-01 14:51:35.000000000 -0500
+@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *
+ {
+ 	clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
+ 	clear_tsk_thread_flag(child, TIF_BREAKPOINT);
++	ocd_disable(child);
+ }
+ 
+ /*
+@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi
+ {
+ 	int ret;
+ 
+-	pr_debug("ptrace: Enabling monitor mode...\n");
+-	ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
+-			| (1 << OCD_DC_DBE_BIT));
+-
+ 	switch (request) {
+ 	/* Read the word at location addr in the child process */
+ 	case PTRACE_PEEKTEXT:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/setup.c linux-avr32/arch/avr32/kernel/setup.c
+--- linux-2.6.24/arch/avr32/kernel/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char
+ 			printk(KERN_WARNING
+ 			       "Failed to allocate framebuffer memory\n");
+ 			fbmem_size = 0;
++		} else {
++			memset(__va(fbmem_start), 0, fbmem_size);
+ 		}
+ 	}
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/signal.c linux-avr32/arch/avr32/kernel/signal.c
+--- linux-2.6.24/arch/avr32/kernel/signal.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/signal.c	2008-02-01 14:51:35.000000000 -0500
+@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs
+ 	if (!user_mode(regs))
+ 		return 0;
+ 
+-	if (try_to_freeze()) {
+-		signr = 0;
+-		if (!signal_pending(current))
+-			goto no_signal;
+-	}
+-
+ 	if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ 		oldset = &current->saved_sigmask;
+ 	else if (!oldset)
+ 		oldset = &current->blocked;
+ 
+ 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+-no_signal:
+ 	if (syscall) {
+ 		switch (regs->r12) {
+ 		case -ERESTART_RESTARTBLOCK:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/traps.c linux-avr32/arch/avr32/kernel/traps.c
+--- linux-2.6.24/arch/avr32/kernel/traps.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/traps.c	2008-02-01 14:51:35.000000000 -0500
+@@ -9,6 +9,7 @@
+ #include <linux/bug.h>
+ #include <linux/init.h>
+ #include <linux/kallsyms.h>
++#include <linux/kdebug.h>
+ #include <linux/module.h>
+ #include <linux/notifier.h>
+ #include <linux/sched.h>
+@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re
+ 
+ asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
+ {
+-	printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
+-	show_regs_log_lvl(regs, KERN_ALERT);
+-	show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
++	int ret;
++
++	nmi_enter();
++
++	ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
++	switch (ret) {
++	case NOTIFY_OK:
++	case NOTIFY_STOP:
++		return;
++	case NOTIFY_BAD:
++		die("Fatal Non-Maskable Interrupt", regs, SIGINT);
++	default:
++		break;
++	}
++
++	printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
++	nmi_disable();
+ }
+ 
+ asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c	1969-12-31 19:00:00.000000000 -0500
+@@ -1,1730 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000cf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-static struct resource dmaca0_resource[] = {
+-	{
+-		.start	= 0xff200000,
+-		.end	= 0xff20ffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(2),
+-};
+-DEFINE_DEV(dmaca, 0);
+-DEV_CLK(hclk, dmaca0, hsb, 10);
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-	platform_device_register(&dmaca0_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 3);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  TWI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_twi0_resource[] __initdata = {
+-	PBMEM(0xffe00800),
+-	IRQ(5),
+-};
+-static struct clk atmel_twi0_pclk = {
+-	.name		= "twi_pclk",
+-	.parent		= &pba_clk,
+-	.mode		= pba_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 2,
+-};
+-
+-struct platform_device *__init at32_add_device_twi(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_twi", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_twi0_resource,
+-				ARRAY_SIZE(atmel_twi0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
+-	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
+-
+-	atmel_twi0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * MMC
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_mci0_resource[] __initdata = {
+-	PBMEM(0xfff02400),
+-	IRQ(28),
+-};
+-static struct clk atmel_mci0_pclk = {
+-	.name		= "mci_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 9,
+-};
+-
+-struct platform_device *__init at32_add_device_mci(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_mci", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_mci0_resource,
+-				ARRAY_SIZE(atmel_mci0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
+-	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
+-	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
+-	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
+-	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
+-	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
+-
+-	atmel_mci0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USB Device Controller
+- * -------------------------------------------------------------------- */
+-static struct resource usba0_resource[] __initdata = {
+-	{
+-		.start		= 0xff300000,
+-		.end		= 0xff3fffff,
+-		.flags		= IORESOURCE_MEM,
+-	}, {
+-		.start		= 0xfff03000,
+-		.end		= 0xfff033ff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(31),
+-};
+-static struct clk usba0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 12,
+-};
+-static struct clk usba0_hclk = {
+-	.name		= "hclk",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_usba_udc", 0);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, usba0_resource,
+-					  ARRAY_SIZE(usba0_resource)))
+-		goto out_free_pdev;
+-
+-	if (data) {
+-		if (platform_device_add_data(pdev, data, sizeof(*data)))
+-			goto out_free_pdev;
+-
+-		if (data->vbus_pin != GPIO_PIN_NONE)
+-			at32_select_gpio(data->vbus_pin, 0);
+-	}
+-
+-	usba0_pclk.dev = &pdev->dev;
+-	usba0_hclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-
+-	return pdev;
+-
+-out_free_pdev:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * IDE / CompactFlash
+- * -------------------------------------------------------------------- */
+-static struct resource at32_smc_cs4_resource[] __initdata = {
+-	{
+-		.start	= 0x04000000,
+-		.end	= 0x07ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-static struct resource at32_smc_cs5_resource[] __initdata = {
+-	{
+-		.start	= 0x20000000,
+-		.end	= 0x23ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-
+-static int __init at32_init_ide_or_cf(struct platform_device *pdev,
+-		unsigned int cs, unsigned int extint)
+-{
+-	static unsigned int extint_pin_map[4] __initdata = {
+-		GPIO_PIN_PB(25),
+-		GPIO_PIN_PB(26),
+-		GPIO_PIN_PB(27),
+-		GPIO_PIN_PB(28),
+-	};
+-	static bool common_pins_initialized __initdata = false;
+-	unsigned int extint_pin;
+-	int ret;
+-
+-	if (extint >= ARRAY_SIZE(extint_pin_map))
+-		return -EINVAL;
+-	extint_pin = extint_pin_map[extint];
+-
+-	switch (cs) {
+-	case 4:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs4_resource,
+-				ARRAY_SIZE(at32_smc_cs4_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
+-		break;
+-	case 5:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs5_resource,
+-				ARRAY_SIZE(at32_smc_cs5_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-
+-	if (!common_pins_initialized) {
+-		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
+-		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
+-		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
+-		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
+-		common_pins_initialized = true;
+-	}
+-
+-	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
+-
+-	pdev->resource[1].start = EIM_IRQ_BASE + extint;
+-	pdev->resource[1].end = pdev->resource[1].start;
+-
+-	return 0;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_ide(unsigned int id, unsigned int extint,
+-		    struct ide_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_ide", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct ide_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_cf(unsigned int id, unsigned int extint,
+-		    struct cf_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_cf", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct cf_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	if (data->detect_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
+-	if (data->reset_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->reset_pin, 0);
+-	if (data->vcc_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->vcc_pin, 0);
+-	/* READY is used as extint, so we can't select it as gpio */
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * AC97C
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_ac97c0_resource[] __initdata = {
+-	PBMEM(0xfff02800),
+-	IRQ(29),
+-};
+-static struct clk atmel_ac97c0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 10,
+-};
+-
+-struct platform_device *__init at32_add_device_ac97c(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_ac97c", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
+-				ARRAY_SIZE(atmel_ac97c0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
+-	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
+-	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
+-	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
+-
+-	atmel_ac97c0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * ABDAC
+- * -------------------------------------------------------------------- */
+-static struct resource abdac0_resource[] __initdata = {
+-	PBMEM(0xfff02000),
+-	IRQ(27),
+-};
+-static struct clk abdac0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 8,
+-};
+-static struct clk abdac0_sample_clk = {
+-	.name		= "sample_clk",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init at32_add_device_abdac(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("abdac", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, abdac0_resource,
+-				ARRAY_SIZE(abdac0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
+-	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
+-	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
+-	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
+-
+-	abdac0_pclk.dev = &pdev->dev;
+-	abdac0_sample_clk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&dmaca0_hclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_twi0_pclk,
+-	&atmel_mci0_pclk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&usba0_hclk,
+-	&usba0_pclk,
+-	&atmel_ac97c0_pclk,
+-	&abdac0_pclk,
+-	&abdac0_sample_clk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-	genclk_init_parent(&abdac0_sample_clk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1809 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 3);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  PWM
++ * -------------------------------------------------------------------- */
++static struct resource atmel_pwm0_resource[] __initdata = {
++	PBMEM(0xfff01400),
++	IRQ(24),
++};
++static struct clk atmel_pwm0_mck = {
++	.name		= "mck",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 5,
++};
++
++struct platform_device *__init at32_add_device_pwm(u32 mask)
++{
++	struct platform_device *pdev;
++
++	if (!mask)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_pwm", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_pwm0_resource,
++				ARRAY_SIZE(atmel_pwm0_resource)))
++		goto out_free_pdev;
++
++	if (platform_device_add_data(pdev, &mask, sizeof(mask)))
++		goto out_free_pdev;
++
++	if (mask & (1 << 0))
++		select_peripheral(PA(28), PERIPH_A, 0);
++	if (mask & (1 << 1))
++		select_peripheral(PA(29), PERIPH_A, 0);
++	if (mask & (1 << 2))
++		select_peripheral(PA(21), PERIPH_B, 0);
++	if (mask & (1 << 3))
++		select_peripheral(PA(22), PERIPH_B, 0);
++
++	atmel_pwm0_mck.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++	&atmel_pwm0_mck,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/extint.c linux-avr32/arch/avr32/mach-at32ap/extint.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/extint.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/extint.c	2008-02-01 14:51:35.000000000 -0500
+@@ -26,16 +26,10 @@
+ #define EIC_MODE				0x0014
+ #define EIC_EDGE				0x0018
+ #define EIC_LEVEL				0x001c
+-#define EIC_TEST				0x0020
+ #define EIC_NMIC				0x0024
+ 
+-/* Bitfields in TEST */
+-#define EIC_TESTEN_OFFSET			31
+-#define EIC_TESTEN_SIZE				1
+-
+ /* Bitfields in NMIC */
+-#define EIC_EN_OFFSET				0
+-#define EIC_EN_SIZE				1
++#define EIC_NMIC_ENABLE				(1 << 0)
+ 
+ /* Bit manipulation macros */
+ #define EIC_BIT(name)					\
+@@ -63,6 +57,9 @@ struct eic {
+ 	unsigned int first_irq;
+ };
+ 
++static struct eic *nmi_eic;
++static bool nmi_enabled;
++
+ static void eic_ack_irq(unsigned int irq)
+ {
+ 	struct eic *eic = get_irq_chip_data(irq);
+@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int
+ 		eic_writel(eic, EDGE, edge);
+ 		eic_writel(eic, LEVEL, level);
+ 
+-		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
+ 			flow_type |= IRQ_LEVEL;
++			__set_irq_handler_unlocked(irq, handle_level_irq);
++		} else
++			__set_irq_handler_unlocked(irq, handle_edge_irq);
+ 		desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ 		desc->status |= flow_type;
+ 	}
+@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = {
+ static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
+ {
+ 	struct eic *eic = desc->handler_data;
+-	struct irq_desc *ext_desc;
+ 	unsigned long status, pending;
+-	unsigned int i, ext_irq;
++	unsigned int i;
+ 
+ 	status = eic_readl(eic, ISR);
+ 	pending = status & eic_readl(eic, IMR);
+@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i
+ 		i = fls(pending) - 1;
+ 		pending &= ~(1 << i);
+ 
+-		ext_irq = i + eic->first_irq;
+-		ext_desc = irq_desc + ext_irq;
+-		if (ext_desc->status & IRQ_LEVEL)
+-			handle_level_irq(ext_irq, ext_desc);
+-		else
+-			handle_edge_irq(ext_irq, ext_desc);
++		generic_handle_irq(i + eic->first_irq);
+ 	}
+ }
+ 
++int nmi_enable(void)
++{
++	nmi_enabled = true;
++
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
++
++	return 0;
++}
++
++void nmi_disable(void)
++{
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, 0);
++
++	nmi_enabled = false;
++}
++
+ static int __init eic_probe(struct platform_device *pdev)
+ {
+ 	struct eic *eic;
+@@ -214,14 +226,13 @@ static int __init eic_probe(struct platf
+ 	pattern = eic_readl(eic, MODE);
+ 	nr_irqs = fls(pattern);
+ 
+-	/* Trigger on falling edge unless overridden by driver */
+-	eic_writel(eic, MODE, 0UL);
++	/* Trigger on low level unless overridden by driver */
+ 	eic_writel(eic, EDGE, 0UL);
++	eic_writel(eic, LEVEL, 0UL);
+ 
+ 	eic->chip = &eic_chip;
+ 
+ 	for (i = 0; i < nr_irqs; i++) {
+-		/* NOTE the handler we set here is ignored by the demux */
+ 		set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
+ 					 handle_level_irq);
+ 		set_irq_chip_data(eic->first_irq + i, eic);
+@@ -230,6 +241,16 @@ static int __init eic_probe(struct platf
+ 	set_irq_chained_handler(int_irq, demux_eic_irq);
+ 	set_irq_data(int_irq, eic);
+ 
++	if (pdev->id == 0) {
++		nmi_eic = eic;
++		if (nmi_enabled)
++			/*
++			 * Someone tried to enable NMI before we were
++			 * ready. Do it now.
++			 */
++			nmi_enable();
++	}
++
+ 	dev_info(&pdev->dev,
+ 		 "External Interrupt Controller at 0x%p, IRQ %u\n",
+ 		 eic->regs, int_irq);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Kconfig linux-avr32/arch/avr32/mach-at32ap/Kconfig
+--- linux-2.6.24/arch/avr32/mach-at32ap/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Makefile linux-avr32/arch/avr32/mach-at32ap/Makefile
+--- linux-2.6.24/arch/avr32/mach-at32ap/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/pio.c linux-avr32/arch/avr32/mach-at32ap/pio.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/pio.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/pio.c	2008-02-01 14:51:35.000000000 -0500
+@@ -162,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff -Nrup linux-2.6.24/arch/avr32/Makefile linux-avr32/arch/avr32/Makefile
+--- linux-2.6.24/arch/avr32/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -16,7 +16,7 @@ KBUILD_AFLAGS	+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ KBUILD_CFLAGS	+= $(cpuflags-y)
+ KBUILD_AFLAGS	+= $(cpuflags-y)
+@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/a
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-$(CONFIG_OPROFILE)		+= arch/avr32/oprofile/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff -Nrup linux-2.6.24/arch/avr32/mm/dma-coherent.c linux-avr32/arch/avr32/mm/dma-coherent.c
+--- linux-2.6.24/arch/avr32/mm/dma-coherent.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/dma-coherent.c	2008-02-01 14:51:35.000000000 -0500
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff -Nrup linux-2.6.24/arch/avr32/mm/tlb.c linux-avr32/arch/avr32/mm/tlb.c
+--- linux-2.6.24/arch/avr32/mm/tlb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/tlb.c	2008-02-01 14:51:35.000000000 -0500
+@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb
+ 	return 0;
+ }
+ 
+-static struct seq_operations tlb_ops = {
++static const struct seq_operations tlb_ops = {
+ 	.start		= tlb_start,
+ 	.next		= tlb_next,
+ 	.stop		= tlb_stop,
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/Makefile linux-avr32/arch/avr32/oprofile/Makefile
+--- linux-2.6.24/arch/avr32/oprofile/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,8 @@
++obj-$(CONFIG_OPROFILE) += oprofile.o
++
++oprofile-y		:= $(addprefix ../../../drivers/oprofile/,	\
++				oprof.o cpu_buffer.o buffer_sync.o	\
++				event_buffer.o oprofile_files.o		\
++				oprofilefs.o oprofile_stats.o		\
++				timer_int.o)
++oprofile-y		+= op_model_avr32.o
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c linux-avr32/arch/avr32/oprofile/op_model_avr32.c
+--- linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/op_model_avr32.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,235 @@
++/*
++ * AVR32 Performance Counter Driver
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/oprofile.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++
++#include <asm/intc.h>
++#include <asm/sysreg.h>
++#include <asm/system.h>
++
++#define AVR32_PERFCTR_IRQ_GROUP	0
++#define AVR32_PERFCTR_IRQ_LINE	1
++
++enum { PCCNT, PCNT0, PCNT1, NR_counter };
++
++struct avr32_perf_counter {
++	unsigned long	enabled;
++	unsigned long	event;
++	unsigned long	count;
++	unsigned long	unit_mask;
++	unsigned long	kernel;
++	unsigned long	user;
++
++	u32		ie_mask;
++	u32		flag_mask;
++};
++
++static struct avr32_perf_counter counter[NR_counter] = {
++	{
++		.ie_mask	= SYSREG_BIT(IEC),
++		.flag_mask	= SYSREG_BIT(FC),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE0),
++		.flag_mask	= SYSREG_BIT(F0),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE1),
++		.flag_mask	= SYSREG_BIT(F1),
++	},
++};
++
++static void avr32_perf_counter_reset(void)
++{
++	/* Reset all counter and disable/clear all interrupts */
++	sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
++				| SYSREG_BIT(PCCR_C)
++				| SYSREG_BIT(FC)
++				| SYSREG_BIT(F0)
++				| SYSREG_BIT(F1)));
++}
++
++static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
++{
++	struct avr32_perf_counter *ctr = dev_id;
++	struct pt_regs *regs;
++	u32 pccr;
++
++	if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
++					& (1 << AVR32_PERFCTR_IRQ_LINE))))
++		return IRQ_NONE;
++
++	regs = get_irq_regs();
++	pccr = sysreg_read(PCCR);
++
++	/* Clear the interrupt flags we're about to handle */
++	sysreg_write(PCCR, pccr);
++
++	/* PCCNT */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCCNT, -ctr->count);
++		oprofile_add_sample(regs, PCCNT);
++	}
++	ctr++;
++	/* PCNT0 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT0, -ctr->count);
++		oprofile_add_sample(regs, PCNT0);
++	}
++	ctr++;
++	/* PCNT1 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT1, -ctr->count);
++		oprofile_add_sample(regs, PCNT1);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int avr32_perf_counter_create_files(struct super_block *sb,
++		struct dentry *root)
++{
++	struct dentry *dir;
++	unsigned int i;
++	char filename[4];
++
++	for (i = 0; i < NR_counter; i++) {
++		snprintf(filename, sizeof(filename), "%u", i);
++		dir = oprofilefs_mkdir(sb, root, filename);
++
++		oprofilefs_create_ulong(sb, dir, "enabled",
++				&counter[i].enabled);
++		oprofilefs_create_ulong(sb, dir, "event",
++				&counter[i].event);
++		oprofilefs_create_ulong(sb, dir, "count",
++				&counter[i].count);
++
++		/* Dummy entries */
++		oprofilefs_create_ulong(sb, dir, "kernel",
++				&counter[i].kernel);
++		oprofilefs_create_ulong(sb, dir, "user",
++				&counter[i].user);
++		oprofilefs_create_ulong(sb, dir, "unit_mask",
++				&counter[i].unit_mask);
++	}
++
++	return 0;
++}
++
++static int avr32_perf_counter_setup(void)
++{
++	struct avr32_perf_counter *ctr;
++	u32 pccr;
++	int ret;
++	int i;
++
++	pr_debug("avr32_perf_counter_setup\n");
++
++	if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
++		printk(KERN_ERR
++			"oprofile: setup: perf counter already enabled\n");
++		return -EBUSY;
++	}
++
++	ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
++			avr32_perf_counter_interrupt, IRQF_SHARED,
++			"oprofile", counter);
++	if (ret)
++		return ret;
++
++	avr32_perf_counter_reset();
++
++	pccr = 0;
++	for (i = PCCNT; i < NR_counter; i++) {
++		ctr = &counter[i];
++		if (!ctr->enabled)
++			continue;
++
++		pr_debug("enabling counter %d...\n", i);
++
++		pccr |= ctr->ie_mask;
++
++		switch (i) {
++		case PCCNT:
++			/* PCCNT always counts cycles, so no events */
++			sysreg_write(PCCNT, -ctr->count);
++			break;
++		case PCNT0:
++			pccr |= SYSREG_BF(CONF0, ctr->event);
++			sysreg_write(PCNT0, -ctr->count);
++			break;
++		case PCNT1:
++			pccr |= SYSREG_BF(CONF1, ctr->event);
++			sysreg_write(PCNT1, -ctr->count);
++			break;
++		}
++	}
++
++	pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
++
++	sysreg_write(PCCR, pccr);
++
++	return 0;
++}
++
++static void avr32_perf_counter_shutdown(void)
++{
++	pr_debug("avr32_perf_counter_shutdown\n");
++
++	avr32_perf_counter_reset();
++	free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
++}
++
++static int avr32_perf_counter_start(void)
++{
++	pr_debug("avr32_perf_counter_start\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
++
++	return 0;
++}
++
++static void avr32_perf_counter_stop(void)
++{
++	pr_debug("avr32_perf_counter_stop\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
++}
++
++static struct oprofile_operations avr32_perf_counter_ops __initdata = {
++	.create_files	= avr32_perf_counter_create_files,
++	.setup		= avr32_perf_counter_setup,
++	.shutdown	= avr32_perf_counter_shutdown,
++	.start		= avr32_perf_counter_start,
++	.stop		= avr32_perf_counter_stop,
++	.cpu_type	= "avr32",
++};
++
++int __init oprofile_arch_init(struct oprofile_operations *ops)
++{
++	if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
++		return -ENODEV;
++
++	memcpy(ops, &avr32_perf_counter_ops,
++			sizeof(struct oprofile_operations));
++
++	printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
++
++	return 0;
++}
++
++void oprofile_arch_exit(void)
++{
++
++}
+diff -Nrup linux-2.6.24/Documentation/kernel-parameters.txt linux-avr32/Documentation/kernel-parameters.txt
+--- linux-2.6.24/Documentation/kernel-parameters.txt	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/Documentation/kernel-parameters.txt	2008-02-01 14:51:34.000000000 -0500
+@@ -34,6 +34,7 @@ parameter is applicable:
+ 	ALSA	ALSA sound support is enabled.
+ 	APIC	APIC support is enabled.
+ 	APM	Advanced Power Management support is enabled.
++	AVR32	AVR32 architecture is enabled.
+ 	AX25	Appropriate AX.25 support is enabled.
+ 	BLACKFIN Blackfin architecture is enabled.
+ 	DRM	Direct Rendering Management support is enabled.
+@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. 
+ 			of returning the full 64-bit number.
+ 			The default is to return 64-bit inode numbers.
+ 
++	nmi_debug=	[KNL,AVR32] Specify one or more actions to take
++			when a NMI is triggered.
++			Format: [state][,regs][,debounce][,die]
++
+ 	nmi_watchdog=	[KNL,BUGS=X86-32] Debugging features for SMP kernels
+ 
+ 	no387		[BUGS=X86-32] Tells the kernel to use the 387 maths
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "twi_pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Kconfig linux-avr32/drivers/i2c/busses/Kconfig
+--- linux-2.6.24/drivers/i2c/busses/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Kconfig	2008-02-01 14:51:37.000000000 -0500
+@@ -88,6 +88,14 @@ config I2C_AT91
+ 	  to support combined I2C messages.  Use the i2c-gpio driver
+ 	  unless your system can cope with those limitations.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Makefile linux-avr32/drivers/i2c/busses/Makefile
+--- linux-2.6.24/drivers/i2c/busses/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Makefile	2008-02-01 14:51:37.000000000 -0500
+@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff -Nrup linux-2.6.24/drivers/leds/Kconfig linux-avr32/drivers/leds/Kconfig
+--- linux-2.6.24/drivers/leds/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Kconfig	2008-02-01 14:51:38.000000000 -0500
+@@ -18,6 +18,13 @@ config LEDS_CLASS
+ 
+ comment "LED drivers"
+ 
++config LEDS_ATMEL_PWM
++	tristate "LED Support using Atmel PWM outputs"
++	depends on LEDS_CLASS && ATMEL_PWM
++	help
++	  This option enables support for LEDs driven using outputs
++	  of the dedicated PWM controller found on newer Atmel SOCs.
++
+ config LEDS_CORGI
+ 	tristate "LED Support for the Sharp SL-C7x0 series"
+ 	depends on LEDS_CLASS && PXA_SHARP_C7xx
+diff -Nrup linux-2.6.24/drivers/leds/leds-atmel-pwm.c linux-avr32/drivers/leds/leds-atmel-pwm.c
+--- linux-2.6.24/drivers/leds/leds-atmel-pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/leds/leds-atmel-pwm.c	2008-02-01 14:51:38.000000000 -0500
+@@ -0,0 +1,157 @@
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++#include <linux/io.h>
++#include <linux/atmel_pwm.h>
++
++
++struct pwmled {
++	struct led_classdev	cdev;
++	struct pwm_channel	pwmc;
++	struct gpio_led		*desc;
++	u32			mult;
++	u8			active_low;
++};
++
++
++/*
++ * For simplicity, we use "brightness" as if it were a linear function
++ * of PWM duty cycle.  However, a logarithmic function of duty cycle is
++ * probably a better match for perceived brightness: two is half as bright
++ * as four, four is half as bright as eight, etc
++ */
++static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
++{
++	struct pwmled		 *led;
++
++	/* update the duty cycle for the *next* period */
++	led = container_of(cdev, struct pwmled, cdev);
++	pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
++}
++
++/*
++ * NOTE:  we reuse the platform_data structure of GPIO leds,
++ * but repurpose its "gpio" number as a PWM channel number.
++ */
++static int __init pwmled_probe(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++	int					status;
++
++	pdata = pdev->dev.platform_data;
++	if (!pdata || pdata->num_leds < 1)
++		return -ENODEV;
++
++	leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
++	if (!leds)
++		return -ENOMEM;
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++		const struct gpio_led	*dat = pdata->leds + i;
++		u32			tmp;
++
++		led->cdev.name = dat->name;
++		led->cdev.brightness = LED_OFF;
++		led->cdev.brightness_set = pwmled_brightness;
++		led->cdev.default_trigger = dat->default_trigger;
++
++		led->active_low = dat->active_low;
++
++		status = pwm_channel_alloc(dat->gpio, &led->pwmc);
++		if (status < 0)
++			goto err;
++
++		/*
++		 * Prescale clock by 2^x, so PWM counts in low MHz.
++		 * Start each cycle with the LED active, so increasing
++		 * the duty cycle gives us more time on (== brighter).
++		 */
++		tmp = 5;
++		if (!led->active_low)
++			tmp |= PWM_CPR_CPOL;
++		pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
++
++		/*
++		 * Pick a period so PWM cycles at 100+ Hz; and a multiplier
++		 * for scaling duty cycle:  brightness * mult.
++		 */
++		tmp = (led->pwmc.mck / (1 << 5)) / 100;
++		tmp /= 255;
++		led->mult = tmp;
++		pwm_channel_writel(&led->pwmc, PWM_CDTY,
++				led->cdev.brightness * 255);
++		pwm_channel_writel(&led->pwmc, PWM_CPRD,
++				LED_FULL * tmp);
++
++		pwm_channel_enable(&led->pwmc);
++
++		/* Hand it over to the LED framework */
++		status = led_classdev_register(&pdev->dev, &led->cdev);
++		if (status < 0) {
++			pwm_channel_free(&led->pwmc);
++			goto err;
++		}
++	}
++
++	platform_set_drvdata(pdev, leds);
++	return 0;
++
++err:
++	if (i > 0) {
++		for (i = i - 1; i >= 0; i--) {
++			led_classdev_unregister(&leds[i].cdev);
++			pwm_channel_free(&leds[i].pwmc);
++		}
++	}
++	kfree(leds);
++
++	return status;
++}
++
++static int __exit pwmled_remove(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++
++	pdata = pdev->dev.platform_data;
++	leds = platform_get_drvdata(pdev);
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++
++		led_classdev_unregister(&led->cdev);
++		pwm_channel_free(&led->pwmc);
++	}
++
++	kfree(leds);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver pwmled_driver = {
++	.driver = {
++		.name =		"leds-atmel-pwm",
++		.owner =	THIS_MODULE,
++	},
++	/* REVISIT add suspend() and resume() methods */
++	.remove =	__exit_p(pwmled_remove),
++};
++
++static int __init modinit(void)
++{
++	return platform_driver_probe(&pwmled_driver, pwmled_probe);
++}
++module_init(modinit);
++
++static void __exit modexit(void)
++{
++	platform_driver_unregister(&pwmled_driver);
++}
++module_exit(modexit);
++
++MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/leds/Makefile linux-avr32/drivers/leds/Makefile
+--- linux-2.6.24/drivers/leds/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Makefile	2008-02-01 14:51:38.000000000 -0500
+@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS)		+= led-class.o
+ obj-$(CONFIG_LEDS_TRIGGERS)		+= led-triggers.o
+ 
+ # LED Platform Drivers
++obj-$(CONFIG_LEDS_ATMEL_PWM)		+= leds-atmel-pwm.o
+ obj-$(CONFIG_LEDS_CORGI)		+= leds-corgi.o
+ obj-$(CONFIG_LEDS_LOCOMO)		+= leds-locomo.o
+ obj-$(CONFIG_LEDS_SPITZ)		+= leds-spitz.o
+diff -Nrup linux-2.6.24/drivers/misc/atmel_pwm.c linux-avr32/drivers/misc/atmel_pwm.c
+--- linux-2.6.24/drivers/misc/atmel_pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/misc/atmel_pwm.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,409 @@
++#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/atmel_pwm.h>
++
++
++/*
++ * This is a simple driver for the PWM controller found in various newer
++ * Atmel SOCs, including the AVR32 series and the AT91sam9263.
++ *
++ * Chips with current Linux ports have only 4 PWM channels, out of max 32.
++ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
++ * Docs are inconsistent about the width of the channel counter registers;
++ * it's at least 16 bits, but several places say 20 bits.
++ */
++#define	PWM_NCHAN	4		/* max 32 */
++
++struct pwm {
++	spinlock_t		lock;
++	struct platform_device	*pdev;
++	u32			mask;
++	int			irq;
++	void __iomem		*base;
++	struct clk		*clk;
++	struct pwm_channel	*channel[PWM_NCHAN];
++	void			(*handler[PWM_NCHAN])(struct pwm_channel *);
++};
++
++
++/* global PWM controller registers */
++#define PWM_MR		0x00
++#define PWM_ENA		0x04
++#define PWM_DIS		0x08
++#define PWM_SR		0x0c
++#define PWM_IER		0x10
++#define PWM_IDR		0x14
++#define PWM_IMR		0x18
++#define PWM_ISR		0x1c
++
++static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
++{
++	__raw_writel(val, p->base + offset);
++}
++
++static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
++{
++	return __raw_readl(p->base + offset);
++}
++
++static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
++{
++	return p->base + 0x200 + index * 0x20;
++}
++
++static struct pwm *pwm;
++
++static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
++{
++	struct device	*dev = &pwm->pdev->dev;
++
++	dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
++		tag,
++		pwm_readl(pwm, PWM_MR),
++		pwm_readl(pwm, PWM_SR),
++		pwm_readl(pwm, PWM_IMR));
++	dev_dbg(dev,
++		"pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
++		ch->index,
++		pwm_channel_readl(ch, PWM_CMR),
++		pwm_channel_readl(ch, PWM_CDTY),
++		pwm_channel_readl(ch, PWM_CPRD),
++		pwm_channel_readl(ch, PWM_CCNT));
++}
++
++
++/**
++ * pwm_channel_alloc - allocate an unused PWM channel
++ * @index: identifies the channel
++ * @ch: structure to be initialized
++ *
++ * Drivers allocate PWM channels according to the board's wiring, and
++ * matching board-specific setup code.  Returns zero or negative errno.
++ */
++int pwm_channel_alloc(int index, struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		status = 0;
++
++	/* insist on PWM init, with this signal pinned out */
++	if (!pwm || !(pwm->mask & 1 << index))
++		return -ENODEV;
++
++	if (index < 0 || index >= PWM_NCHAN || !ch)
++		return -EINVAL;
++	memset(ch, 0, sizeof *ch);
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	if (pwm->channel[index])
++		status = -EBUSY;
++	else {
++		clk_enable(pwm->clk);
++
++		ch->regs = pwmc_regs(pwm, index);
++		ch->index = index;
++
++		/* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
++		ch->mck = clk_get_rate(pwm->clk);
++
++		pwm->channel[index] = ch;
++		pwm->handler[index] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << index);
++		pwm_writel(pwm, PWM_IDR, 1 << index);
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return status;
++}
++EXPORT_SYMBOL(pwm_channel_alloc);
++
++static int pwmcheck(struct pwm_channel *ch)
++{
++	int		index;
++
++	if (!pwm)
++		return -ENODEV;
++	if (!ch)
++		return -EINVAL;
++	index = ch->index;
++	if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
++		return -EINVAL;
++
++	return index;
++}
++
++/**
++ * pwm_channel_free - release a previously allocated channel
++ * @ch: the channel being released
++ *
++ * The channel is completely shut down (counter and IRQ disabled),
++ * and made available for re-use.  Returns zero, or negative errno.
++ */
++int pwm_channel_free(struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->channel[t] = NULL;
++		pwm->handler[t] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << t);
++		pwm_writel(pwm, PWM_IDR, 1 << t);
++
++		clk_disable(pwm->clk);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_free);
++
++int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
++{
++	unsigned long	flags;
++	int		t;
++
++	/* OMITTED FUNCTIONALITY:  starting several channels in synch */
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
++		t = 0;
++		pwm_dumpregs(ch, enabled ? "enable" : "disable");
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(__pwm_channel_onoff);
++
++/**
++ * pwm_clk_alloc - allocate and configure CLKA or CLKB
++ * @prescale: from 0..10, the power of two used to divide MCK
++ * @div: from 1..255, the linear divisor to use
++ *
++ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno.  The allocated
++ * clock will run with a period of (2^prescale * div) / MCK, or twice as
++ * long if center aligned PWM output is used.  The clock must later be
++ * deconfigured using pwm_clk_free().
++ */
++int pwm_clk_alloc(unsigned prescale, unsigned div)
++{
++	unsigned long	flags;
++	u32		mr;
++	u32		val = (prescale << 8) | div;
++	int		ret = -EBUSY;
++
++	if (prescale >= 10 || div == 0 || div > 255)
++		return -EINVAL;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if ((mr & 0xffff) == 0) {
++		mr |= val;
++		ret = PWM_CPR_CLKA;
++	}
++	if ((mr & (0xffff << 16)) == 0) {
++		mr |= val << 16;
++		ret = PWM_CPR_CLKB;
++	}
++	if (ret > 0)
++		pwm_writel(pwm, PWM_MR, mr);
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return ret;
++}
++EXPORT_SYMBOL(pwm_clk_alloc);
++
++/**
++ * pwm_clk_free - deconfigure and release CLKA or CLKB
++ *
++ * Reverses the effect of pwm_clk_alloc().
++ */
++void pwm_clk_free(unsigned clk)
++{
++	unsigned long	flags;
++	u32		mr;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if (clk == PWM_CPR_CLKA)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
++	if (clk == PWM_CPR_CLKB)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
++	spin_unlock_irqrestore(&pwm->lock, flags);
++}
++EXPORT_SYMBOL(pwm_clk_free);
++
++/**
++ * pwm_channel_handler - manage channel's IRQ handler
++ * @ch: the channel
++ * @handler: the handler to use, possibly NULL
++ *
++ * If the handler is non-null, the handler will be called after every
++ * period of this PWM channel.  If the handler is null, this channel
++ * won't generate an IRQ.
++ */
++int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch))
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->handler[t] = handler;
++		pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_handler);
++
++static irqreturn_t pwm_irq(int id, void *_pwm)
++{
++	struct pwm	*p = _pwm;
++	irqreturn_t	handled = IRQ_NONE;
++	u32		irqstat;
++	int		index;
++
++	spin_lock(&p->lock);
++
++	/* ack irqs, then handle them */
++	irqstat = pwm_readl(pwm, PWM_ISR);
++
++	while (irqstat) {
++		struct pwm_channel *ch;
++		void (*handler)(struct pwm_channel *ch);
++
++		index = ffs(irqstat) - 1;
++		irqstat &= ~(1 << index);
++		ch = pwm->channel[index];
++		handler = pwm->handler[index];
++		if (handler && ch) {
++			spin_unlock(&p->lock);
++			handler(ch);
++			spin_lock(&p->lock);
++			handled = IRQ_HANDLED;
++		}
++	}
++
++	spin_unlock(&p->lock);
++	return handled;
++}
++
++static int __init pwm_probe(struct platform_device *pdev)
++{
++	struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	int irq = platform_get_irq(pdev, 0);
++	u32 *mp = pdev->dev.platform_data;
++	struct pwm *p;
++	int status = -EIO;
++
++	if (pwm)
++		return -EBUSY;
++	if (!r || irq < 0 || !mp || !*mp)
++		return -ENODEV;
++	if (*mp & ~((1<<PWM_NCHAN)-1)) {
++		dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
++			*mp, PWM_NCHAN);
++		return -EINVAL;
++	}
++
++	p = kzalloc(sizeof(*p), GFP_KERNEL);
++	if (!p)
++		return -ENOMEM;
++
++	spin_lock_init(&p->lock);
++	p->pdev = pdev;
++	p->mask = *mp;
++	p->irq = irq;
++	p->base = ioremap(r->start, r->end - r->start + 1);
++	if (!p->base)
++		goto fail;
++	p->clk = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(p->clk)) {
++		status = PTR_ERR(p->clk);
++		p->clk = NULL;
++		goto fail;
++	}
++
++	status = request_irq(irq, pwm_irq, 0, pdev->name, p);
++	if (status < 0)
++		goto fail;
++
++	pwm = p;
++	platform_set_drvdata(pdev, p);
++
++	return 0;
++
++fail:
++	if (p->clk)
++		clk_put(p->clk);
++	if (p->base)
++		iounmap(p->base);
++
++	kfree(p);
++	return status;
++}
++
++static int __exit pwm_remove(struct platform_device *pdev)
++{
++	struct pwm *p = platform_get_drvdata(pdev);
++
++	if (p != pwm)
++		return -EINVAL;
++
++	clk_enable(pwm->clk);
++	pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
++	pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
++	clk_disable(pwm->clk);
++
++	pwm = NULL;
++
++	free_irq(p->irq, p);
++	clk_put(p->clk);
++	iounmap(p->base);
++	kfree(p);
++
++	return 0;
++}
++
++static struct platform_driver atmel_pwm_driver = {
++	.driver = {
++		.name = "atmel_pwm",
++		.owner = THIS_MODULE,
++	},
++	.remove = __exit_p(pwm_remove),
++
++	/* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
++	 * and all AT91sam9263 states, albeit at reduced clock rate if
++	 * MCK becomes the slow clock (i.e. what Linux labels STR).
++	 */
++};
++
++static int __init pwm_init(void)
++{
++	return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
++}
++module_init(pwm_init);
++
++static void __exit pwm_exit(void)
++{
++	platform_driver_unregister(&atmel_pwm_driver);
++}
++module_exit(pwm_exit);
++
++MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/misc/Kconfig linux-avr32/drivers/misc/Kconfig
+--- linux-2.6.24/drivers/misc/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES
+ 
+ if MISC_DEVICES
+ 
++config ATMEL_PWM
++	tristate "Atmel AT32/AT91 PWM support"
++	depends on (AVR32 || AT91) && EXPERIMENTAL
++	help
++	  This option enables device driver support for the PWM channels
++	  on certain Atmel prcoessors.  Pulse Width Modulation is used for
++	  purposes including software controlled power-efficent backlights
++	  on LCD displays, motor control, and waveform generation.
++
+ config IBM_ASM
+ 	tristate "Device driver for IBM RSA service processor"
+ 	depends on X86 && PCI && INPUT && EXPERIMENTAL
+diff -Nrup linux-2.6.24/drivers/misc/Makefile linux-avr32/drivers/misc/Makefile
+--- linux-2.6.24/drivers/misc/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM)		+= ibmasm/
+ obj-$(CONFIG_HDPU_FEATURES)	+= hdpuftrs/
+ obj-$(CONFIG_MSI_LAPTOP)     += msi-laptop.o
+ obj-$(CONFIG_ASUS_LAPTOP)     += asus-laptop.o
++obj-$(CONFIG_ATMEL_PWM)		+= atmel_pwm.o
+ obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+ obj-$(CONFIG_LKDTM)		+= lkdtm.o
+ obj-$(CONFIG_TIFM_CORE)       	+= tifm_core.o
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.c linux-avr32/drivers/mmc/host/atmel-mci.c
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = 0;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = -ETIMEDOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = -EILSEQ;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = -EIO;
++
++	if (cmd->error) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = -EIO;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = -EILSEQ;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = -ETIMEDOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = -EIO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ETIMEDOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ETIMEDOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ETIMEDOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.h linux-avr32/drivers/mmc/host/atmel-mci.h
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.h	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff -Nrup linux-2.6.24/drivers/mmc/host/Kconfig linux-avr32/drivers/mmc/host/Kconfig
+--- linux-2.6.24/drivers/mmc/host/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -91,6 +91,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff -Nrup linux-2.6.24/drivers/mmc/host/Makefile linux-avr32/drivers/mmc/host/Makefile
+--- linux-2.6.24/drivers/mmc/host/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ obj-$(CONFIG_MMC_SPI)		+= mmc_spi.o
+ 
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c	2008-02-01 14:51:39.000000000 -0500
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c	2008-02-01 14:51:39.000000000 -0500
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(stru
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct 
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff -Nrup linux-2.6.24/drivers/pcmcia/at32_cf.c linux-avr32/drivers/pcmcia/at32_cf.c
+--- linux-2.6.24/drivers/pcmcia/at32_cf.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/pcmcia/at32_cf.c	2008-02-01 14:51:42.000000000 -0500
+@@ -0,0 +1,533 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin != GPIO_PIN_NONE)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin != GPIO_PIN_NONE)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin != GPIO_PIN_NONE)
++		cf->vcc_pin = request_pin(pdev, board->vcc_pin,
++					  "cf_vcc");
++	if (board->ready_pin != GPIO_PIN_NONE)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	cf->present = at32_cf_present(cf);
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff -Nrup linux-2.6.24/drivers/pcmcia/Kconfig linux-avr32/drivers/pcmcia/Kconfig
+--- linux-2.6.24/drivers/pcmcia/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Kconfig	2008-02-01 14:51:42.000000000 -0500
+@@ -276,6 +276,13 @@ config ELECTRA_CF
+ 	  Say Y here to support the CompactFlash controller on the
+ 	  PA Semi Electra eval board.
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff -Nrup linux-2.6.24/drivers/pcmcia/Makefile linux-avr32/drivers/pcmcia/Makefile
+--- linux-2.6.24/drivers/pcmcia/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Makefile	2008-02-01 14:51:42.000000000 -0500
+@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc417
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
+ obj-$(CONFIG_ELECTRA_CF)			+= electra_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff -Nrup linux-2.6.24/drivers/spi/atmel_spi.c linux-avr32/drivers/spi/atmel_spi.c
+--- linux-2.6.24/drivers/spi/atmel_spi.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/spi/atmel_spi.c	2008-02-01 14:51:43.000000000 -0500
+@@ -51,7 +51,9 @@ struct atmel_spi {
+ 	u8			stopping;
+ 	struct list_head	queue;
+ 	struct spi_transfer	*current_transfer;
+-	unsigned long		remaining_bytes;
++	unsigned long		current_remaining_bytes;
++	struct spi_transfer	*next_transfer;
++	unsigned long		next_remaining_bytes;
+ 
+ 	void			*buffer;
+ 	dma_addr_t		buffer_dma;
+@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_s
+ 		gpio_set_value(gpio, !active);
+ }
+ 
++static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
++					struct spi_transfer *xfer)
++{
++	return msg->transfers.prev == &xfer->transfer_list;
++}
++
++static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
++{
++	return xfer->delay_usecs == 0 && !xfer->cs_change;
++}
++
++static void atmel_spi_next_xfer_data(struct spi_master *master,
++				struct spi_transfer *xfer,
++				dma_addr_t *tx_dma,
++				dma_addr_t *rx_dma,
++				u32 *plen)
++{
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	u32			len = *plen;
++
++	/* use scratch buffer only when rx or tx data is unspecified */
++	if (xfer->rx_buf)
++		*rx_dma = xfer->rx_dma + xfer->len - len;
++	else {
++		*rx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++	}
++	if (xfer->tx_buf)
++		*tx_dma = xfer->tx_dma + xfer->len - len;
++	else {
++		*tx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++		memset(as->buffer, 0, len);
++		dma_sync_single_for_device(&as->pdev->dev,
++				as->buffer_dma, len, DMA_TO_DEVICE);
++	}
++
++	*plen = len;
++}
++
+ /*
+  * Submit next transfer for DMA.
+  * lock is held, spi irq is blocked
+@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct s
+ {
+ 	struct atmel_spi	*as = spi_master_get_devdata(master);
+ 	struct spi_transfer	*xfer;
+-	u32			len;
++	u32			len, remaining, total;
+ 	dma_addr_t		tx_dma, rx_dma;
+ 
+-	xfer = as->current_transfer;
+-	if (!xfer || as->remaining_bytes == 0) {
+-		if (xfer)
+-			xfer = list_entry(xfer->transfer_list.next,
+-					struct spi_transfer, transfer_list);
+-		else
+-			xfer = list_entry(msg->transfers.next,
+-					struct spi_transfer, transfer_list);
+-		as->remaining_bytes = xfer->len;
+-		as->current_transfer = xfer;
++	if (!as->current_transfer)
++		xfer = list_entry(msg->transfers.next,
++				struct spi_transfer, transfer_list);
++	else if (!as->next_transfer)
++		xfer = list_entry(as->current_transfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++	else
++		xfer = NULL;
++
++	if (xfer) {
++		len = xfer->len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		remaining = xfer->len - len;
++
++		spi_writel(as, RPR, rx_dma);
++		spi_writel(as, TPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RCR, len);
++		spi_writel(as, TCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		xfer = as->next_transfer;
++		remaining = as->next_remaining_bytes;
+ 	}
+ 
+-	len = as->remaining_bytes;
++	as->current_transfer = xfer;
++	as->current_remaining_bytes = remaining;
+ 
+-	tx_dma = xfer->tx_dma + xfer->len - len;
+-	rx_dma = xfer->rx_dma + xfer->len - len;
++	if (remaining > 0)
++		len = remaining;
++	else if (!atmel_spi_xfer_is_last(msg, xfer)
++			&& atmel_spi_xfer_can_be_chained(xfer)) {
++		xfer = list_entry(xfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++		len = xfer->len;
++	} else
++		xfer = NULL;
+ 
+-	/* use scratch buffer only when rx or tx data is unspecified */
+-	if (!xfer->rx_buf) {
+-		rx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-	}
+-	if (!xfer->tx_buf) {
+-		tx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-		memset(as->buffer, 0, len);
+-		dma_sync_single_for_device(&as->pdev->dev,
+-				as->buffer_dma, len, DMA_TO_DEVICE);
+-	}
++	as->next_transfer = xfer;
+ 
+-	spi_writel(as, RPR, rx_dma);
+-	spi_writel(as, TPR, tx_dma);
++	if (xfer) {
++		total = len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		as->next_remaining_bytes = total - len;
++
++		spi_writel(as, RNPR, rx_dma);
++		spi_writel(as, TNPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RNCR, len);
++		spi_writel(as, TNCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		spi_writel(as, RNCR, 0);
++		spi_writel(as, TNCR, 0);
++	}
+ 
+-	as->remaining_bytes -= len;
+-	if (msg->spi->bits_per_word > 8)
+-		len >>= 1;
+-
+-	/* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
+-	 * mechanism might help avoid the IRQ latency between transfers
+-	 * (and improve the nCS0 errata handling on at91rm9200 chips)
+-	 *
+-	 * We're also waiting for ENDRX before we start the next
++	/* REVISIT: We're waiting for ENDRX before we start the next
+ 	 * transfer because we need to handle some difficult timing
+ 	 * issues otherwise. If we wait for ENDTX in one transfer and
+ 	 * then starts waiting for ENDRX in the next, it's difficult
+@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct s
+ 	 *
+ 	 * It should be doable, though. Just not now...
+ 	 */
+-	spi_writel(as, TNCR, 0);
+-	spi_writel(as, RNCR, 0);
+ 	spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
+-
+-	dev_dbg(&msg->spi->dev,
+-		"  start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
+-		xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
+-		xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
+-
+-	spi_writel(as, RCR, len);
+-	spi_writel(as, TCR, len);
+ 	spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
+ }
+ 
+@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *ma
+ 	spin_lock(&as->lock);
+ 
+ 	as->current_transfer = NULL;
++	as->next_transfer = NULL;
+ 
+ 	/* continue if needed */
+ 	if (list_empty(&as->queue) || as->stopping)
+@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 
+ 		spi_writel(as, IDR, pending);
+ 
+-		if (as->remaining_bytes == 0) {
++		if (as->current_remaining_bytes == 0) {
+ 			msg->actual_length += xfer->len;
+ 
+ 			if (!msg->is_dma_mapped)
+@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 			if (xfer->delay_usecs)
+ 				udelay(xfer->delay_usecs);
+ 
+-			if (msg->transfers.prev == &xfer->transfer_list) {
++			if (atmel_spi_xfer_is_last(msg, xfer)) {
+ 				/* report completed message */
+ 				atmel_spi_msg_done(master, as, msg, 0,
+ 						xfer->cs_change);
+@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_de
+ 	if (!(spi->mode & SPI_CPHA))
+ 		csr |= SPI_BIT(NCPHA);
+ 
+-	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	/* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
++	 *
++	 * DLYBCT would add delays between words, slowing down transfers.
++	 * It could potentially be useful to cope with DMA bottlenecks, but
++	 * in those cases it's probably best to just use a lower bitrate.
++	 */
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff -Nrup linux-2.6.24/drivers/video/atmel_lcdfb.c linux-avr32/drivers/video/atmel_lcdfb.c
+--- linux-2.6.24/drivers/video/atmel_lcdfb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/atmel_lcdfb.c	2008-02-01 14:51:44.000000000 -0500
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lc
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+@@ -148,6 +150,8 @@ static int atmel_lcdfb_alloc_video_memor
+ 		return -ENOMEM;
+ 	}
+ 
++	memset(info->screen_base, 0, info->fix.smem_len);
++
+ 	return 0;
+ }
+ 
+@@ -203,6 +207,26 @@ static int atmel_lcdfb_check_var(struct 
+ 	var->transp.offset = var->transp.length = 0;
+ 	var->xoffset = var->yoffset = 0;
+ 
++	/* Saturate vertical and horizontal timings at maximum values */
++	var->vsync_len = min_t(u32, var->vsync_len,
++			(ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
++	var->upper_margin = min_t(u32, var->upper_margin,
++			ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
++	var->lower_margin = min_t(u32, var->lower_margin,
++			ATMEL_LCDC_VFP);
++	var->right_margin = min_t(u32, var->right_margin,
++			(ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
++	var->hsync_len = min_t(u32, var->hsync_len,
++			(ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
++	var->left_margin = min_t(u32, var->left_margin,
++			ATMEL_LCDC_HBP + 1);
++
++	/* Some parameters can't be zero */
++	var->vsync_len = max_t(u32, var->vsync_len, 1);
++	var->right_margin = max_t(u32, var->right_margin, 1);
++	var->hsync_len = max_t(u32, var->hsync_len, 1);
++	var->left_margin = max_t(u32, var->left_margin, 1);
++
+ 	switch (var->bits_per_pixel) {
+ 	case 1:
+ 	case 2:
+@@ -516,7 +540,6 @@ static int __init atmel_lcdfb_init_fbinf
+ 	struct fb_info *info = sinfo->info;
+ 	int ret = 0;
+ 
+-	memset_io(info->screen_base, 0, info->fix.smem_len);
+ 	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
+ 
+ 	dev_info(info->device,
+@@ -645,6 +668,11 @@ static int __init atmel_lcdfb_probe(stru
+ 		info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
+ 		if (!info->screen_base)
+ 			goto release_intmem;
++
++		/*
++		 * Don't clear the framebuffer -- someone may have set
++		 * up a splash image.
++		 */
+ 	} else {
+ 		/* alocate memory buffer */
+ 		ret = atmel_lcdfb_alloc_video_memory(sinfo);
+diff -Nrup linux-2.6.24/drivers/video/console/Kconfig linux-avr32/drivers/video/console/Kconfig
+--- linux-2.6.24/drivers/video/console/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/console/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -6,7 +6,7 @@ menu "Console display driver support"
+ 
+ config VGA_CONSOLE
+ 	bool "VGA text console" if EMBEDDED || !X86
+-	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
++	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
+ 	default y
+ 	help
+ 	  Saying Y here will allow you to use Linux in text mode through a
+diff -Nrup linux-2.6.24/drivers/watchdog/Kconfig linux-avr32/drivers/watchdog/Kconfig
+--- linux-2.6.24/drivers/watchdog/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/watchdog/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h	1969-12-31 19:00:00.000000000 -0500
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/board.h linux-avr32/include/asm-avr32/arch-at32ap/board.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/board.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/board.h	2008-02-01 14:51:45.000000000 -0500
+@@ -51,6 +51,9 @@ struct platform_device *
+ at32_add_device_ide(unsigned int id, unsigned int extint,
+ 		    struct ide_platform_data *data);
+ 
++/* mask says which PWM channels to mux */
++struct platform_device *at32_add_device_pwm(u32 mask);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -66,7 +69,13 @@ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
+ struct platform_device *at32_add_device_twi(unsigned int id);
+-struct platform_device *at32_add_device_mci(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
+ struct platform_device *at32_add_device_ac97c(unsigned int id);
+ struct platform_device *at32_add_device_abdac(unsigned int id);
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h linux-avr32/include/asm-avr32/arch-at32ap/cpu.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/cpu.h	2008-02-01 14:51:45.000000000 -0500
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/io.h linux-avr32/include/asm-avr32/arch-at32ap/io.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/io.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/io.h	2008-02-01 14:51:45.000000000 -0500
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h linux-avr32/include/asm-avr32/arch-at32ap/portmux.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/portmux.h	2008-02-01 14:51:45.000000000 -0500
+@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/dma-controller.h linux-avr32/include/asm-avr32/dma-controller.h
+--- linux-2.6.24/include/asm-avr32/dma-controller.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/dma-controller.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/irq.h linux-avr32/include/asm-avr32/irq.h
+--- linux-2.6.24/include/asm-avr32/irq.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/irq.h	2008-02-01 14:51:45.000000000 -0500
+@@ -11,4 +11,9 @@
+ 
+ #define irq_canonicalize(i)	(i)
+ 
++#ifndef __ASSEMBLER__
++int nmi_enable(void);
++void nmi_disable(void);
++#endif
++
+ #endif /* __ASM_AVR32_IOCTLS_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/kdebug.h linux-avr32/include/asm-avr32/kdebug.h
+--- linux-2.6.24/include/asm-avr32/kdebug.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/kdebug.h	2008-02-01 14:51:45.000000000 -0500
+@@ -5,6 +5,7 @@
+ enum die_val {
+ 	DIE_BREAKPOINT,
+ 	DIE_SSTEP,
++	DIE_NMI,
+ };
+ 
+ #endif /* __ASM_AVR32_KDEBUG_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/ocd.h linux-avr32/include/asm-avr32/ocd.h
+--- linux-2.6.24/include/asm-avr32/ocd.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ocd.h	2008-02-01 14:51:45.000000000 -0500
+@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned 
+ #define ocd_read(reg)			__ocd_read(OCD_##reg)
+ #define ocd_write(reg, value)		__ocd_write(OCD_##reg, value)
+ 
++struct task_struct;
++
++void ocd_enable(struct task_struct *child);
++void ocd_disable(struct task_struct *child);
++
+ #endif /* !__ASSEMBLER__ */
+ 
+ #endif /* __ASM_AVR32_OCD_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/processor.h linux-avr32/include/asm-avr32/processor.h
+--- linux-2.6.24/include/asm-avr32/processor.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/processor.h	2008-02-01 14:51:45.000000000 -0500
+@@ -57,11 +57,25 @@ struct avr32_cpuinfo {
+ 	unsigned short cpu_revision;
+ 	enum tlb_config tlb_config;
+ 	unsigned long features;
++	u32 device_id;
+ 
+ 	struct cache_info icache;
+ 	struct cache_info dcache;
+ };
+ 
++static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 1) & 0x7f;
++}
++static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 12) & 0xffff;
++}
++static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 28) & 0x0f;
++}
++
+ extern struct avr32_cpuinfo boot_cpu_data;
+ 
+ #ifdef CONFIG_SMP
+diff -Nrup linux-2.6.24/include/asm-avr32/ptrace.h linux-avr32/include/asm-avr32/ptrace.h
+--- linux-2.6.24/include/asm-avr32/ptrace.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ptrace.h	2008-02-01 14:51:45.000000000 -0500
+@@ -121,7 +121,15 @@ struct pt_regs {
+ };
+ 
+ #ifdef __KERNEL__
+-# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
++
++#include <asm/ocd.h>
++
++#define arch_ptrace_attach(child)       ocd_enable(child)
++
++#define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
++#define instruction_pointer(regs)       ((regs)->pc)
++#define profile_pc(regs)                instruction_pointer(regs)
++
+ extern void show_regs (struct pt_regs *);
+ 
+ static __inline__ int valid_user_regs(struct pt_regs *regs)
+@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st
+ 	return 0;
+ }
+ 
+-#define instruction_pointer(regs) ((regs)->pc)
+-
+-#define profile_pc(regs) instruction_pointer(regs)
+ 
+ #endif /* __KERNEL__ */
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/thread_info.h linux-avr32/include/asm-avr32/thread_info.h
+--- linux-2.6.24/include/asm-avr32/thread_info.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/thread_info.h	2008-02-01 14:51:45.000000000 -0500
+@@ -88,6 +88,7 @@ static inline struct thread_info *curren
+ #define TIF_MEMDIE		6
+ #define TIF_RESTORE_SIGMASK	7	/* restore signal mask in do_signal */
+ #define TIF_CPU_GOING_TO_SLEEP	8	/* CPU is entering sleep 0 mode */
++#define TIF_DEBUG		30	/* debugging enabled */
+ #define TIF_USERSPACE		31      /* true if FS sets userspace */
+ 
+ #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
+diff -Nrup linux-2.6.24/include/linux/atmel_pwm.h linux-avr32/include/linux/atmel_pwm.h
+--- linux-2.6.24/include/linux/atmel_pwm.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/linux/atmel_pwm.h	2008-02-01 14:51:47.000000000 -0500
+@@ -0,0 +1,70 @@
++#ifndef __LINUX_ATMEL_PWM_H
++#define __LINUX_ATMEL_PWM_H
++
++/**
++ * struct pwm_channel - driver handle to a PWM channel
++ * @regs: base of this channel's registers
++ * @index: number of this channel (0..31)
++ * @mck: base clock rate, which can be prescaled and maybe subdivided
++ *
++ * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
++ * Then they configure its clock rate (derived from MCK), alignment,
++ * polarity, and duty cycle by writing directly to the channel registers,
++ * before enabling the channel by calling pwm_channel_enable().
++ *
++ * After emitting a PWM signal for the desired length of time, drivers
++ * may then pwm_channel_disable() or pwm_channel_free().  Both of these
++ * disable the channel, but when it's freed the IRQ is deconfigured and
++ * the channel must later be re-allocated and reconfigured.
++ *
++ * Note that if the period or duty cycle need to be changed while the
++ * PWM channel is operating, drivers must use the PWM_CUPD double buffer
++ * mechanism, either polling until they change or getting implicitly
++ * notified through a once-per-period interrupt handler.
++ */
++struct pwm_channel {
++	void __iomem	*regs;
++	unsigned	index;
++	unsigned long	mck;
++};
++
++extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
++extern int pwm_channel_free(struct pwm_channel *ch);
++
++extern int pwm_clk_alloc(unsigned prescale, unsigned div);
++extern void pwm_clk_free(unsigned clk);
++
++extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
++
++#define pwm_channel_enable(ch)	__pwm_channel_onoff((ch), 1)
++#define pwm_channel_disable(ch)	__pwm_channel_onoff((ch), 0)
++
++/* periodic interrupts, mostly for CUPD changes to period or cycle */
++extern int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch));
++
++/* per-channel registers (banked at pwm_channel->regs) */
++#define PWM_CMR		0x00		/* mode register */
++#define		PWM_CPR_CPD	(1 << 10)	/* set: CUPD modifies period */
++#define		PWM_CPR_CPOL	(1 << 9)	/* set: idle high */
++#define		PWM_CPR_CALG	(1 << 8)	/* set: center align */
++#define		PWM_CPR_CPRE	(0xf << 0)	/* mask: rate is mck/(2^pre) */
++#define		PWM_CPR_CLKA	(0xb << 0)	/* rate CLKA */
++#define		PWM_CPR_CLKB	(0xc << 0)	/* rate CLKB */
++#define PWM_CDTY	0x04		/* duty cycle (max of CPRD) */
++#define PWM_CPRD	0x08		/* period (count up from zero) */
++#define PWM_CCNT	0x0c		/* counter (20 bits?) */
++#define PWM_CUPD	0x10		/* update CPRD (or CDTY) next period */
++
++static inline void
++pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
++{
++	__raw_writel(val, pwmc->regs + offset);
++}
++
++static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
++{
++	return __raw_readl(pwmc->regs + offset);
++}
++
++#endif /* __LINUX_ATMEL_PWM_H */
+diff -Nrup linux-2.6.24/include/video/atmel_lcdc.h linux-avr32/include/video/atmel_lcdc.h
+--- linux-2.6.24/include/video/atmel_lcdc.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/video/atmel_lcdc.h	2008-02-01 14:51:47.000000000 -0500
+@@ -115,20 +115,20 @@ struct atmel_lcdfb_info {
+ #define		ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)
+ 
+ #define ATMEL_LCDC_TIM1		0x0808
+-#define	ATMEL_LCDC_VFP		(0xff <<  0)
++#define	ATMEL_LCDC_VFP		(0xffU <<  0)
+ #define	ATMEL_LCDC_VBP_OFFSET		8
+-#define	ATMEL_LCDC_VBP		(0xff <<  ATMEL_LCDC_VBP_OFFSET)
++#define	ATMEL_LCDC_VBP		(0xffU <<  ATMEL_LCDC_VBP_OFFSET)
+ #define	ATMEL_LCDC_VPW_OFFSET		16
+-#define	ATMEL_LCDC_VPW		(0x3f << ATMEL_LCDC_VPW_OFFSET)
++#define	ATMEL_LCDC_VPW		(0x3fU << ATMEL_LCDC_VPW_OFFSET)
+ #define	ATMEL_LCDC_VHDLY_OFFSET		24
+-#define	ATMEL_LCDC_VHDLY	(0xf  << ATMEL_LCDC_VHDLY_OFFSET)
++#define	ATMEL_LCDC_VHDLY	(0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
+ 
+ #define ATMEL_LCDC_TIM2		0x080c
+-#define	ATMEL_LCDC_HBP		(0xff  <<  0)
++#define	ATMEL_LCDC_HBP		(0xffU  <<  0)
+ #define	ATMEL_LCDC_HPW_OFFSET		8
+-#define	ATMEL_LCDC_HPW		(0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
++#define	ATMEL_LCDC_HPW		(0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
+ #define	ATMEL_LCDC_HFP_OFFSET		21
+-#define	ATMEL_LCDC_HFP		(0x7ff << ATMEL_LCDC_HFP_OFFSET)
++#define	ATMEL_LCDC_HFP		(0x7ffU << ATMEL_LCDC_HFP_OFFSET)
+ 
+ #define ATMEL_LCDC_LCDFRMCFG	0x0810
+ #define	ATMEL_LCDC_LINEVAL	(0x7ff <<  0)
+diff -Nrup linux-2.6.24/kernel/ptrace.c linux-avr32/kernel/ptrace.c
+--- linux-2.6.24/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/kernel/ptrace.c	2008-02-01 14:51:47.000000000 -0500
+@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request,
+ 	lock_kernel();
+ 	if (request == PTRACE_TRACEME) {
+ 		ret = ptrace_traceme();
++		if (!ret)
++			arch_ptrace_attach(current);
+ 		goto out;
+ 	}
+ 
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.c linux-avr32/sound/avr32/ac97c.c
+--- linux-2.6.24/sound/avr32/ac97c.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.c	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.h linux-avr32/sound/avr32/ac97c.h
+--- linux-2.6.24/sound/avr32/ac97c.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.h	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff -Nrup linux-2.6.24/sound/avr32/Kconfig linux-avr32/sound/avr32/Kconfig
+--- linux-2.6.24/sound/avr32/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff -Nrup linux-2.6.24/sound/avr32/Makefile linux-avr32/sound/avr32/Makefile
+--- linux-2.6.24/sound/avr32/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff -Nrup linux-2.6.24/sound/Kconfig linux-avr32/sound/Kconfig
+--- linux-2.6.24/sound/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
+ if SPI
+ source "sound/spi/Kconfig"
+ endif
+diff -Nrup linux-2.6.24/sound/Makefile linux-avr32/sound/Makefile
+--- linux-2.6.24/sound/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+ obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
+-	sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++	sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.c linux-avr32/sound/oss/at32_abdac.c
+--- linux-2.6.24/sound/oss/at32_abdac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.c	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.h linux-avr32/sound/oss/at32_abdac.h
+--- linux-2.6.24/sound/oss/at32_abdac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.h	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff -Nrup linux-2.6.24/sound/oss/Kconfig linux-avr32/sound/oss/Kconfig
+--- linux-2.6.24/sound/oss/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Kconfig	2008-02-01 14:51:49.000000000 -0500
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff -Nrup linux-2.6.24/sound/oss/Makefile linux-avr32/sound/oss/Makefile
+--- linux-2.6.24/sound/oss/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Makefile	2008-02-01 14:51:49.000000000 -0500
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o a
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-200-atngw100-video.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-200-atngw100-video.patch
new file mode 100644
index 000000000..06677e98e
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-200-atngw100-video.patch
@@ -0,0 +1,175 @@
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/flash.c linux-2.6.24-patched/arch/avr32/boards/atngw100/flash.c
+--- a/arch/avr32/boards/atngw100/flash.c	2008-01-31 10:47:55.000000000 -0500
++++ b/arch/avr32/boards/atngw100/flash.c	2008-01-31 10:21:07.000000000 -0500
+@@ -42,7 +42,6 @@ static struct mtd_partition flash_parts[
+ 		.name           = "u-boot",
+ 		.offset         = 0x00000000,
+ 		.size           = 0x00020000,           /* 128 KiB */
+-		.mask_flags     = MTD_WRITEABLE,
+ 	},
+ 	{
+ 		.name           = "root",
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-2.6.24-patched/arch/avr32/boards/atngw100/setup.c
+--- a/arch/avr32/boards/atngw100/setup.c	2008-01-31 10:47:55.000000000 -0500
++++ b/arch/avr32/boards/atngw100/setup.c	2008-01-31 10:28:00.000000000 -0500
+@@ -16,6 +16,8 @@
+ #include <linux/types.h>
+ #include <linux/leds.h>
+ #include <linux/spi/spi.h>
++#include <linux/fb.h>
++#include <video/atmel_lcdc.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+@@ -27,6 +29,58 @@
+ 
+ /* Initialized by bootloader-specific startup code. */
+ struct tag *bootloader_tags __initdata;
++static struct fb_videomode __initdata video_modes[] = {
++	{
++		.name		= "640x480@60",
++		.refresh	= 60,
++		.xres		= 640,		.yres		= 480,
++		.pixclock	= KHZ2PICOS(23856),
++
++		.left_margin	= 80,		.right_margin	= 16,
++		.upper_margin	= 13,		.lower_margin	= 1,
++		.hsync_len	= 64,		.vsync_len	= 3,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++	{
++		.name		= "320x240@117",
++		.refresh	= 117,
++		.xres		= 320,		.yres		= 240,
++		.pixclock	= KHZ2PICOS(12074),
++
++		.left_margin	= 40,		.right_margin	= 8,
++		.upper_margin	= 14,		.lower_margin	= 1,
++		.hsync_len	= 32,		.vsync_len	= 3,
++
++		.sync		= 0,
++		.vmode		= FB_VMODE_NONINTERLACED,
++	},
++};
++
++static struct fb_monspecs __initdata atngw100_default_monspecs = {
++	.manufacturer		= "ATM",
++	.monitor		= "GENERIC",
++	.modedb			= video_modes,
++	.modedb_len		= ARRAY_SIZE(video_modes),
++	.hfmin			= 14820,
++	.hfmax			= 32000,
++	.vfmin			= 30,
++	.vfmax			= 200,
++	.dclkmax		= 30000000,
++};
++
++struct atmel_lcdfb_info __initdata atngw100_lcdc_data = {
++	.default_bpp		= 16,
++	.default_dmacon		= ATMEL_LCDC_DMAEN | ATMEL_LCDC_DMA2DEN,
++	.default_lcdcon2	= (ATMEL_LCDC_DISTYPE_TFT
++				   | ATMEL_LCDC_INVCLK 
++				   | ATMEL_LCDC_INVDVAL_NORMAL
++				   | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE
++				   | ATMEL_LCDC_MEMOR_BIG),
++	.default_monspecs	= &atngw100_default_monspecs,
++	.guard_time		= 2,
++};
+ 
+ struct eth_addr {
+ 	u8 addr[6];
+@@ -156,16 +210,19 @@ static int __init atngw100_init(void)
+ 	 * reserve any pins for it.
+ 	 */
+ 
++	at32_add_device_lcdc(1, &atngw100_lcdc_data, fbmem_start, fbmem_size);
++
+ 	at32_add_system_devices();
+ 
+ 	at32_add_device_usart(0);
+ 
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+-	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
++	//set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ 	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
++	at32_add_device_ac97c(0);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-2.6.24-patched/arch/avr32/mach-at32ap/at32ap700x.c
+--- a/arch/avr32/mach-at32ap/at32ap700x.c	2008-01-31 10:47:55.000000000 -0500
++++ b/arch/avr32/mach-at32ap/at32ap700x.c	2008-01-31 10:29:22.000000000 -0500
+@@ -1116,6 +1116,15 @@ at32_add_device_lcdc(unsigned int id, st
+ 	struct fb_videomode *modedb;
+ 	unsigned int modedb_size;
+ 
++	/*  help to prevent DMA underruns, which causes
++		the screen position to jump around */	 
++	hmatrix_writel(SCFG4, HMATRIX_BIT(ARBT) 
++					| HMATRIX_BF(FIXED_DEFMSTR, 0x5) 
++					| HMATRIX_BF(SLOT_CYCLE, 0x40) 
++					| HMATRIX_BF(DEFMSTR_TYPE
++					, HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT));
++	hmatrix_writel(PRAS4, 0x0FF00000);
++
+ 	/*
+ 	 * Do a deep copy of the fb data, monspecs and modedb. Make
+ 	 * sure all allocations are done before setting up the
+@@ -1133,7 +1142,7 @@ at32_add_device_lcdc(unsigned int id, st
+ 	monspecs->modedb = modedb;
+ 
+ 	switch (id) {
+-	case 0:
++	case 0:		// STK1000 peripheral connections
+ 		pdev = &atmel_lcdfb0_device;
+ 		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+ 		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+@@ -1170,6 +1179,43 @@ at32_add_device_lcdc(unsigned int id, st
+ 		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+ 		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+ 		break;
++	case 1:		// NGW100 peripheral connections
++		pdev = &atmel_lcdfb0_device;
++		//select_peripheral(PC(19), PERIPH_B, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PE(1), PERIPH_B, 0);	/* DVAL	  */
++		select_peripheral(PE(2), PERIPH_B, 0);	/* MODE	  */
++		//select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PE(3), PERIPH_B, 0);	/* DATA0  */
++		select_peripheral(PE(4), PERIPH_B, 0);	/* DATA1  */
++		select_peripheral(PE(5), PERIPH_B, 0);	/* DATA2  */
++		select_peripheral(PE(6), PERIPH_B, 0);	/* DATA3  */
++		select_peripheral(PE(7), PERIPH_B, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PE(8),  PERIPH_B, 0);	/* DATA8  */
++		select_peripheral(PE(9),  PERIPH_B, 0);	/* DATA9  */
++		select_peripheral(PE(10),  PERIPH_B, 0);	/* DATA10 */
++		select_peripheral(PE(11),  PERIPH_B, 0);	/* DATA11 */
++		select_peripheral(PE(12),  PERIPH_B, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PE(13), PERIPH_B, 0);	/* DATA16 */
++		select_peripheral(PE(14), PERIPH_B, 0);	/* DATA17 */
++		select_peripheral(PE(15), PERIPH_B, 0);	/* DATA18 */
++		select_peripheral(PE(16), PERIPH_B, 0);	/* DATA19 */
++		select_peripheral(PE(17), PERIPH_B, 0);	/* DATA20 */
++		select_peripheral(PE(18), PERIPH_B, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
+ 
+ 	default:
+ 		goto err_invalid_id;
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-300-avr32-psif-2.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-300-avr32-psif-2.patch
new file mode 100644
index 000000000..4f9d652a5
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-300-avr32-psif-2.patch
@@ -0,0 +1,671 @@
+diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
+index b88569e..2df47ed 100644
+--- a/drivers/input/serio/Kconfig
++++ b/drivers/input/serio/Kconfig
+@@ -88,6 +88,17 @@ config SERIO_RPCKBD
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called rpckbd.
+ 
++config SERIO_AT32PSIF
++	tristate "AVR32 PSIF PS/2 keyboard and mouse controller"
++	depends on AVR32
++	default n
++	help
++	  Say Y here if you want to use the PSIF peripheral on AVR32 devices
++	  and connect a PS/2 keyboard and/or mouse to it.
++
++	  To compile this driver as a module, choose M here: the module will
++	  be called at32psif.
++
+ config SERIO_AMBAKMI
+ 	tristate "AMBA KMI keyboard controller"
+ 	depends on ARM_AMBA
+diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
+index 4155197..38b8868 100644
+--- a/drivers/input/serio/Makefile
++++ b/drivers/input/serio/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIO_CT82C710)	+= ct82c710.o
+ obj-$(CONFIG_SERIO_RPCKBD)	+= rpckbd.o
+ obj-$(CONFIG_SERIO_SA1111)	+= sa1111ps2.o
+ obj-$(CONFIG_SERIO_AMBAKMI)	+= ambakmi.o
++obj-$(CONFIG_SERIO_AT32PSIF)	+= at32psif.o
+ obj-$(CONFIG_SERIO_Q40KBD)	+= q40kbd.o
+ obj-$(CONFIG_SERIO_GSCPS2)	+= gscps2.o
+ obj-$(CONFIG_HP_SDC)		+= hp_sdc.o
+diff --git a/drivers/input/serio/at32psif.c b/drivers/input/serio/at32psif.c
+new file mode 100644
+index 0000000..228ab15
+--- /dev/null
++++ b/drivers/input/serio/at32psif.c
+@@ -0,0 +1,342 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * Driver for the AT32AP700X PS/2 controller (PSIF).
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/init.h>
++#include <linux/serio.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++
++#include "at32psif.h"
++
++#define PSIF_BUF_SIZE		16
++
++#define ring_is_empty(_psif)	(_psif->head == _psif->tail)
++#define ring_next_head(_psif)	((_psif->head + 1) & (PSIF_BUF_SIZE - 1))
++#define ring_next_tail(_psif)	((_psif->tail + 1) & (PSIF_BUF_SIZE - 1))
++
++struct psif {
++	struct platform_device	*pdev;
++	struct clk		*pclk;
++	struct serio		*io;
++	void __iomem		*regs;
++	unsigned int		irq;
++	unsigned int		open;
++	/* Prevent concurrent writes to circular buffer. */
++	spinlock_t		lock;
++	unsigned int		head;
++	unsigned int		tail;
++	unsigned char		buffer[PSIF_BUF_SIZE];
++};
++
++static irqreturn_t psif_interrupt(int irq, void *_ptr)
++{
++	struct psif *psif = _ptr;
++	int retval = IRQ_NONE;
++	unsigned int io_flags = 0;
++	unsigned long lock_flags;
++	unsigned long status;
++
++	status = psif_readl(psif, SR);
++
++	if (status & PSIF_BIT(RXRDY)) {
++		unsigned char val = (unsigned char) psif_readl(psif, RHR);
++
++		if (status & PSIF_BIT(PARITY))
++			io_flags |= SERIO_PARITY;
++		if (status & PSIF_BIT(OVRUN))
++			dev_err(&psif->pdev->dev, "overrun read error\n");
++
++		/* TODO: why do we have to wait? Are we too fast for serio? */
++		udelay(100);
++
++		serio_interrupt(psif->io, val, io_flags);
++
++		retval = IRQ_HANDLED;
++	}
++
++	spin_lock_irqsave(&psif->lock, lock_flags);
++
++	if (status & PSIF_BIT(TXEMPTY)) {
++		if (status & PSIF_BIT(NACK))
++			dev_err(&psif->pdev->dev, "NACK error\n");
++		if (ring_is_empty(psif)) {
++			psif_writel(psif, IDR, PSIF_BIT(TXEMPTY));
++		} else {
++			psif_writel(psif, THR, psif->buffer[psif->tail]);
++			psif->tail = ring_next_tail(psif);
++		}
++
++		retval = IRQ_HANDLED;
++	}
++
++	spin_unlock_irqrestore(&psif->lock, lock_flags);
++
++	return retval;
++}
++
++static int psif_write(struct serio *io, unsigned char val)
++{
++	struct psif *psif = io->port_data;
++	unsigned long flags;
++	unsigned int head;
++
++	spin_lock_irqsave(&psif->lock, flags);
++
++	/* Write directly if TX is ready. */
++	if (psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) {
++		psif_writel(psif, THR, val);
++	} else {
++		head = ring_next_head(psif);
++
++		if (head != psif->tail) {
++			psif->buffer[psif->head] = val;
++			psif->head = head;
++		} else {
++			dev_err(&psif->pdev->dev, "underrun write error\n");
++		}
++
++		/* Make sure TXEMPTY interrupt is enabled. */
++		psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
++	}
++
++	spin_unlock_irqrestore(&psif->lock, flags);
++
++	return 0;
++}
++
++static int psif_open(struct serio *io)
++{
++	struct psif *psif = io->port_data;
++	int retval;
++
++	retval = clk_enable(psif->pclk);
++	if (retval)
++		goto out;
++
++	psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN));
++	psif_writel(psif, IER, PSIF_BIT(RXRDY));
++
++	psif->open = 1;
++out:
++	return retval;
++}
++
++static void psif_close(struct serio *io)
++{
++	struct psif *psif = io->port_data;
++
++	psif->open = 0;
++
++	psif_writel(psif, IDR, ~0UL);
++	psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
++
++	clk_disable(psif->pclk);
++}
++
++static void psif_set_prescaler(struct psif *psif)
++{
++	unsigned long prscv;
++	unsigned long rate = clk_get_rate(psif->pclk);
++
++	/* PRSCV = Pulse length (100 uS) * PSIF module frequency. */
++	prscv = 100 * (rate / 1000000);
++
++	if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) {
++		prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1;
++		dev_dbg(&psif->pdev->dev, "pclk too fast, "
++				"prescaler set to max\n");
++	}
++
++	clk_enable(psif->pclk);
++	psif_writel(psif, PSR, prscv);
++	clk_disable(psif->pclk);
++}
++
++static int __init psif_probe(struct platform_device *pdev)
++{
++	struct resource *regs;
++	struct psif *psif;
++	struct serio *io;
++	struct clk *pclk;
++	int irq;
++	int ret;
++
++	psif = kzalloc(sizeof(struct psif), GFP_KERNEL);
++	if (!psif) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		ret = -ENOMEM;
++		goto out;
++	}
++	psif->pdev = pdev;
++
++	io = kzalloc(sizeof(struct serio), GFP_KERNEL);
++	if (!io) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		ret = -ENOMEM;
++		goto out_free_psif;
++	}
++	psif->io = io;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resources defined\n");
++		ret = -ENOMEM;
++		goto out_free_io;
++	}
++
++	psif->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!psif->regs) {
++		ret = -ENOMEM;
++		dev_dbg(&pdev->dev, "could not map I/O memory\n");
++		goto out_free_io;
++	}
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk)) {
++		dev_dbg(&pdev->dev, "could not get peripheral clock\n");
++		ret = PTR_ERR(pclk);
++		goto out_iounmap;
++	}
++	psif->pclk = pclk;
++
++	/* Reset the PSIF to enter at a known state. */
++	ret = clk_enable(pclk);
++	if (ret) {
++		dev_dbg(&pdev->dev, "could not enable pclk\n");
++		goto out_put_clk;
++	}
++	psif_writel(psif, CR, PSIF_BIT(CR_SWRST));
++	clk_disable(pclk);
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		ret = -ENXIO;
++		goto out_put_clk;
++	}
++	ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif);
++	if (ret) {
++		dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
++		goto out_put_clk;
++	}
++	psif->irq = irq;
++
++	io->id.type	= SERIO_8042;
++	io->write	= psif_write;
++	io->open	= psif_open;
++	io->close	= psif_close;
++	strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name));
++	strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys));
++	io->port_data	= psif;
++	io->dev.parent	= &pdev->dev;
++
++	psif_set_prescaler(psif);
++
++	spin_lock_init(&psif->lock);
++	serio_register_port(psif->io);
++	platform_set_drvdata(pdev, psif);
++
++	dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n",
++			(int)psif->regs, psif->irq);
++
++	return 0;
++
++out_put_clk:
++	clk_put(psif->pclk);
++out_iounmap:
++	iounmap(psif->regs);
++out_free_io:
++	kfree(io);
++out_free_psif:
++	kfree(psif);
++out:
++	return ret;
++}
++
++static int __exit psif_remove(struct platform_device *pdev)
++{
++	struct psif *psif = platform_get_drvdata(pdev);
++
++	psif_writel(psif, IDR, ~0UL);
++	psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
++
++	serio_unregister_port(psif->io);
++	iounmap(psif->regs);
++	free_irq(psif->irq, psif);
++	clk_put(psif->pclk);
++	kfree(psif);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int psif_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	struct psif *psif = platform_get_drvdata(pdev);
++
++	if (psif->open) {
++		psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS));
++		clk_disable(psif->pclk);
++	}
++
++	return 0;
++}
++
++static int psif_resume(struct platform_device *pdev)
++{
++	struct psif *psif = platform_get_drvdata(pdev);
++
++	if (psif->open) {
++		clk_enable(psif->pclk);
++		psif_set_prescaler(psif);
++		psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN));
++	}
++
++	return 0;
++}
++#else
++#define psif_suspend	NULL
++#define psif_resume	NULL
++#endif
++
++static struct platform_driver psif_driver = {
++	.remove		= __exit_p(psif_remove),
++	.driver		= {
++		.name	= "atmel_psif",
++	},
++	.suspend	= psif_suspend,
++	.resume		= psif_resume,
++};
++
++static int __init psif_init(void)
++{
++	return platform_driver_probe(&psif_driver, psif_probe);
++}
++
++static void __exit psif_exit(void)
++{
++	platform_driver_unregister(&psif_driver);
++}
++
++module_init(psif_init);
++module_exit(psif_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/input/serio/at32psif.h b/drivers/input/serio/at32psif.h
+new file mode 100644
+index 0000000..b0cc5e4
+--- /dev/null
++++ b/drivers/input/serio/at32psif.h
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * Driver for the AT32AP700X PS/2 controller (PSIF).
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#ifndef _AT32PSIF_H
++#define _AT32PSIF_H
++
++/* PSIF register offsets */
++#define PSIF_CR				0x00
++#define PSIF_RHR			0x04
++#define PSIF_THR			0x08
++#define PSIF_SR				0x10
++#define PSIF_IER			0x14
++#define PSIF_IDR			0x18
++#define PSIF_IMR			0x1c
++#define PSIF_PSR			0x20
++
++/* Bitfields in control register. */
++#define PSIF_CR_RXDIS_OFFSET		1
++#define PSIF_CR_RXDIS_SIZE		1
++#define PSIF_CR_RXEN_OFFSET		0
++#define PSIF_CR_RXEN_SIZE		1
++#define PSIF_CR_SWRST_OFFSET		15
++#define PSIF_CR_SWRST_SIZE		1
++#define PSIF_CR_TXDIS_OFFSET		9
++#define PSIF_CR_TXDIS_SIZE		1
++#define PSIF_CR_TXEN_OFFSET		8
++#define PSIF_CR_TXEN_SIZE		1
++
++/* Bitfields in interrupt disable, enable, mask and status register. */
++#define PSIF_NACK_OFFSET		8
++#define PSIF_NACK_SIZE			1
++#define PSIF_OVRUN_OFFSET		5
++#define PSIF_OVRUN_SIZE			1
++#define PSIF_PARITY_OFFSET		9
++#define PSIF_PARITY_SIZE		1
++#define PSIF_RXRDY_OFFSET		4
++#define PSIF_RXRDY_SIZE			1
++#define PSIF_TXEMPTY_OFFSET		1
++#define PSIF_TXEMPTY_SIZE		1
++#define PSIF_TXRDY_OFFSET		0
++#define PSIF_TXRDY_SIZE			1
++
++/* Bitfields in prescale register. */
++#define PSIF_PSR_PRSCV_OFFSET		0
++#define PSIF_PSR_PRSCV_SIZE		13
++
++/* Bitfields in receive hold register. */
++#define PSIF_RHR_RXDATA_OFFSET		0
++#define PSIF_RHR_RXDATA_SIZE		8
++
++/* Bitfields in transmit hold register. */
++#define PSIF_THR_TXDATA_OFFSET		0
++#define PSIF_THR_TXDATA_SIZE		8
++
++/* Bit manipulation macros */
++#define PSIF_BIT(name)					\
++	(1 << PSIF_##name##_OFFSET)
++#define PSIF_BF(name, value)				\
++	(((value) & ((1 << PSIF_##name##_SIZE) - 1))	\
++	 << PSIF_##name##_OFFSET)
++#define PSIF_BFEXT(name, value)\
++	(((value) >> PSIF_##name##_OFFSET)		\
++	 & ((1 << PSIF_##name##_SIZE) - 1))
++#define PSIF_BFINS(name, value, old)			\
++	(((old) & ~(((1 << PSIF_##name##_SIZE) - 1)	\
++		    << PSIF_##name##_OFFSET))		\
++	 | PSIF_BF(name, value))
++
++/* Register access macros */
++#define psif_readl(port, reg)				\
++	__raw_readl((port)->regs + PSIF_##reg)
++#define psif_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + PSIF_##reg)
++
++#endif /* _AT32PSIF_H */
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 56a8d8e..e125205 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -145,4 +145,17 @@ config BOARD_ATSTK1000_CF_DETECT_PIN
+ 
+ 	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
+ 
++config BOARD_ATSTK100X_ENABLE_PSIF
++	bool "Enable PSIF peripheral (PS/2 support)"
++	default n
++	help
++	  Select this if you want to use the PSIF peripheral to hook up PS/2
++	  devices to your STK1000. This will require a hardware modification to
++	  work correctly, since PS/2 devices require 5 volt power and signals,
++	  while the STK1000 only provides 3.3 volt.
++
++	  Say N if you have not modified the hardware to boost the voltage, say
++	  Y if you have level convertion hardware or a PS/2 device capable of
++	  operating on 3.3 volt.
++
+ endif	# stk 1000
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index f19f54d..2ba37d5 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -261,6 +261,10 @@ static int __init atstk1002_init(void)
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 	at32_add_device_cf(0, 2, &cf0_data);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++#endif
+ 
+ 	atstk1000_setup_j2_leds();
+ 	atstk1002_setup_extdac();
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+index 768d204..2cc0bbc 100644
+--- a/arch/avr32/boards/atstk1000/atstk1003.c
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -172,6 +172,10 @@ static int __init atstk1003_init(void)
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 	at32_add_device_cf(0, 2, &cf0_data);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++#endif
+ 
+ 	atstk1000_setup_j2_leds();
+ 	atstk1003_setup_extdac();
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+index 96015dd..9e8c293 100644
+--- a/arch/avr32/boards/atstk1000/atstk1004.c
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -143,6 +143,10 @@ static int __init atstk1004_init(void)
+ #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++#endif
+ 
+ 	atstk1000_setup_j2_leds();
+ 	atstk1004_setup_extdac();
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+index 3300944..cfec920 100644
+--- a/arch/avr32/mach-at32ap/at32ap700x.c
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -679,6 +679,81 @@ void __init at32_add_system_devices(void)
+ }
+ 
+ /* --------------------------------------------------------------------
++ *  PSIF
++ * -------------------------------------------------------------------- */
++static struct resource atmel_psif0_resource[] __initdata = {
++	{
++		.start	= 0xffe03c00,
++		.end	= 0xffe03cff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(18),
++};
++static struct clk atmel_psif0_pclk = {
++	.name		= "pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 15,
++};
++
++static struct resource atmel_psif1_resource[] __initdata = {
++	{
++		.start	= 0xffe03d00,
++		.end	= 0xffe03dff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(18),
++};
++static struct clk atmel_psif1_pclk = {
++	.name		= "pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 15,
++};
++
++struct platform_device *__init at32_add_device_psif(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (!(id == 0 || id == 1))
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_psif", id);
++	if (!pdev)
++		return NULL;
++
++	switch (id) {
++	case 0:
++		if (platform_device_add_resources(pdev, atmel_psif0_resource,
++					ARRAY_SIZE(atmel_psif0_resource)))
++			goto err_add_resources;
++		atmel_psif0_pclk.dev = &pdev->dev;
++		select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */
++		select_peripheral(PA(9), PERIPH_A, 0); /* DATA  */
++		break;
++	case 1:
++		if (platform_device_add_resources(pdev, atmel_psif1_resource,
++					ARRAY_SIZE(atmel_psif1_resource)))
++			goto err_add_resources;
++		atmel_psif1_pclk.dev = &pdev->dev;
++		select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */
++		select_peripheral(PB(12), PERIPH_A, 0); /* DATA  */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
+  *  USART
+  * -------------------------------------------------------------------- */
+ 
+@@ -1712,6 +1787,8 @@ struct clk *at32_clock_list[] = {
+ 	&pio3_mck,
+ 	&pio4_mck,
+ 	&at32_systc0_pclk,
++	&atmel_psif0_pclk,
++	&atmel_psif1_pclk,
+ 	&atmel_usart0_usart,
+ 	&atmel_usart1_usart,
+ 	&atmel_usart2_usart,
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 1a6e02c..19cfec7 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -93,4 +93,7 @@ struct platform_device *
+ at32_add_device_cf(unsigned int id, unsigned int extint,
+ 		struct cf_platform_data *data);
+ 
++struct platform_device *
++at32_add_device_psif(unsigned int id);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c
+index d95f316..20a7193 100644
+--- a/drivers/char/keyboard.c
++++ b/drivers/char/keyboard.c
+@@ -1000,7 +1000,8 @@ DECLARE_TASKLET_DISABLED(keyboard_tasklet, kbd_bh, 0);
+ #if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) ||\
+     defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) ||\
+     defined(CONFIG_PARISC) || defined(CONFIG_SUPERH) ||\
+-    (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC))
++    (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) ||\
++    defined(CONFIG_AVR32)
+ 
+ #define HW_RAW(dev) (test_bit(EV_MSC, dev->evbit) && test_bit(MSC_RAW, dev->mscbit) &&\
+ 			((dev)->id.bustype == BUS_I8042) && ((dev)->id.vendor == 0x0001) && ((dev)->id.product == 0x0001))
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+--- a/arch/avr32/boards/atngw100/setup.c	2008-01-31 13:38:32.000000000 -0500
++++ b/arch/avr32/boards/atngw100/setup.c	2008-01-31 13:44:09.000000000 -0500
+@@ -224,6 +224,9 @@ static int __init atngw100_init(void)
+ 	at32_add_device_usba(0, NULL);
+ 	at32_add_device_ac97c(0);
+ 
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+ 				AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-500-avr32-ac97-reset.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-500-avr32-ac97-reset.patch
new file mode 100644
index 000000000..eed5f2814
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-500-avr32-ac97-reset.patch
@@ -0,0 +1,289 @@
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+index 0ec0b1c..3a58375 100644
+--- a/sound/avr32/ac97c.c
++++ b/sound/avr32/ac97c.c
+@@ -25,6 +25,8 @@
+ #include <sound/ac97_codec.h>
+ #include <sound/memalloc.h>
+ 
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
+ #include <asm/dma-controller.h>
+ 
+ #include "ac97c.h"
+@@ -37,6 +39,7 @@ struct atmel_ac97_dma_info {
+ 	struct dma_request_cyclic req_rx;
+ 	unsigned short rx_periph_id;
+ 	unsigned short tx_periph_id;
++	unsigned short controller;
+ };
+ 
+ struct atmel_ac97 {
+@@ -51,6 +54,7 @@ struct atmel_ac97 {
+ 	struct snd_ac97_bus *ac97_bus;
+ 	int opened;
+ 	int period;
++	int reset_pin;
+ 	u64 cur_format;
+ 	unsigned int cur_rate;
+ 	struct clk *mck;
+@@ -692,6 +696,12 @@ timed_out:
+ 
+ static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
+ {
++	if (chip->reset_pin >= 0) {
++		gpio_set_value(chip->reset_pin, 0);
++		udelay(5);
++		gpio_set_value(chip->reset_pin, 1);
++	}
++
+ 	ac97c_writel(chip, MR, AC97C_MR_WRST);
+ 	mdelay(1);
+ 	ac97c_writel(chip, MR, AC97C_MR_ENA);
+@@ -727,6 +737,7 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card,
+ 		.read	= snd_atmel_ac97_read,
+ 	};
+ 	struct atmel_ac97 *chip = get_chip(card);
++	struct ac97c_platform_data *pdata;
+ 	struct resource *regs;
+ 	struct clk *mck;
+ 	int err;
+@@ -735,6 +746,29 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card,
+ 	if (!regs)
+ 		return -ENXIO;
+ 
++	pdata = pdev->dev.platform_data;
++	if (pdata) {
++		chip->reset_pin = pdata->reset_pin;
++
++		if (chip->reset_pin >= 0) {
++			if (gpio_request(chip->reset_pin,
++						chip->card->shortname)) {
++				dev_dbg(&pdev->dev,
++						"ac97: reset pin "
++						"not available\n");
++				chip->reset_pin = -1;
++			} else {
++				gpio_direction_output(chip->reset_pin, 1);
++			}
++		}
++
++		chip->dma.rx_periph_id = pdata->dma_rx_periph_id;
++		chip->dma.tx_periph_id = pdata->dma_tx_periph_id;
++		chip->dma.controller = pdata->dma_controller_id;
++	} else {
++		return -ENXIO;
++	}
++
+ 	mck = clk_get(&pdev->dev, "pclk");
+ 	if (IS_ERR(mck))
+ 		return PTR_ERR(mck);
+@@ -789,23 +823,19 @@ static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
+ 	if (err)
+ 		goto out_free_card;
+ 
+-	/* TODO: Get this information from the platform device */
+-	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	chip->dma.req_tx.req.dmac = find_dma_controller(chip->dma.controller);
+ 	if (!chip->dma.req_tx.req.dmac) {
+ 		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
+ 		err = -ENODEV;
+ 		goto out_free_card;
+ 	}
+-	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	chip->dma.req_rx.req.dmac = find_dma_controller(chip->dma.controller);
+ 	if (!chip->dma.req_rx.req.dmac) {
+ 		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
+ 		err = -ENODEV;
+ 		goto out_free_card;
+ 	}
+ 
+-	chip->dma.rx_periph_id = 3;
+-	chip->dma.tx_periph_id = 4;
+-
+ 	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
+ 	if (ch < 0) {
+ 		dev_dbg(&chip->pdev->dev,
+-- 
+1.5.2.5
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+index 06795d0..58f3841 100644
+--- a/arch/avr32/mach-at32ap/at32ap700x.c
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -1552,12 +1552,15 @@ static struct clk atmel_ac97c0_pclk = {
+ 	.index		= 10,
+ };
+ 
+-struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++struct platform_device *__init
++at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data)
+ {
+ 	struct platform_device *pdev;
+ 
+ 	if (id != 0)
+ 		return NULL;
++	if (!data)
++		return NULL;
+ 
+ 	pdev = platform_device_alloc("atmel_ac97c", id);
+ 	if (!pdev)
+@@ -1567,10 +1570,17 @@ struct platform_device *__init at32_add_device_ac97c(unsigned int id)
+ 				ARRAY_SIZE(atmel_ac97c0_resource)))
+ 		goto err_add_resources;
+ 
+-	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
+-	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
+-	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
+-	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ac97c_platform_data)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SCLK	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SDI	*/
++
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
+ 
+ 	atmel_ac97c0_pclk.dev = &pdev->dev;
+ 
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 8816b66..0386a0e 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -76,7 +76,16 @@ struct mci_platform_data {
+ };
+ struct platform_device *
+ at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
+-struct platform_device *at32_add_device_ac97c(unsigned int id);
++
++struct ac97c_platform_data {
++	unsigned short dma_rx_periph_id;
++	unsigned short dma_tx_periph_id;
++	unsigned short dma_controller_id;
++	int reset_pin;
++};
++struct platform_device *
++at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data);
++
+ struct platform_device *at32_add_device_abdac(unsigned int id);
+ 
+ struct cf_platform_data {
+-- 
+1.5.2.5
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index 90436fa..eba6f89 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -151,6 +151,15 @@ static void __init set_hw_addr(struct platform_device *pdev)
+ 	clk_put(pclk);
+ }
+ 
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE,
++};
++#endif
++
+ #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static void __init atstk1002_setup_extdac(void)
+ {
+@@ -253,7 +262,7 @@ static int __init atstk1002_init(void)
+ #endif
+ 	at32_add_device_usba(0, NULL);
+ #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ #else
+ 	at32_add_device_abdac(0);
+ #endif
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+index 768d204..2564e3c 100644
+--- a/arch/avr32/boards/atstk1000/atstk1003.c
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -72,6 +72,15 @@ static struct cf_platform_data __initdata cf0_data = {
+ 	.cs		= 4,
+ };
+ 
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE,
++};
++#endif
++
+ #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static void __init atstk1003_setup_extdac(void)
+ {
+@@ -164,7 +173,7 @@ static int __init atstk1003_init(void)
+ #endif
+ 	at32_add_device_usba(0, NULL);
+ #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ #else
+ 	at32_add_device_abdac(0);
+ #endif
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+index 96015dd..3c25a6f 100644
+--- a/arch/avr32/boards/atstk1000/atstk1004.c
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -64,6 +64,15 @@ static struct spi_board_info spi1_board_info[] __initdata = { {
+ } };
+ #endif
+ 
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE,
++};
++#endif
++
+ #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static void __init atstk1004_setup_extdac(void)
+ {
+@@ -136,7 +145,7 @@ static int __init atstk1004_init(void)
+ 			     fbmem_start, fbmem_size);
+ 	at32_add_device_usba(0, NULL);
+ #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ #else
+ 	at32_add_device_abdac(0);
+ #endif
+-- 
+1.5.2.5
+--- a/arch/avr32/boards/atngw100/setup.c	2008-02-26 12:27:37.000000000 -0500
++++ b/arch/avr32/boards/atngw100/setup.c	2008-02-26 12:26:08.000000000 -0500
+@@ -201,6 +201,13 @@ static struct platform_device i2c_gpio_d
+ };
+ #endif
+ 
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE, // change to whatever pin you want, i.e. GPIO_PIN_PB(18)
++};
++
+ static int __init atngw100_init(void)
+ {
+ 	unsigned	i;
+@@ -222,7 +229,7 @@ static int __init atngw100_init(void)
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ 	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
diff --git a/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-600-avr32-mmc.patch b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-600-avr32-mmc.patch
new file mode 100644
index 000000000..a7654b5c6
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/kernel-patches/linux-2.6.24-600-avr32-mmc.patch
@@ -0,0 +1,255 @@
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+index eeac479..7913cd8 100644
+--- a/drivers/mmc/host/atmel-mci.c
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -39,7 +39,6 @@ enum {
+ 	EVENT_STOP_COMPLETE,
+ 	EVENT_DMA_COMPLETE,
+ 	EVENT_DMA_ERROR,
+-	EVENT_CARD_DETECT,
+ };
+ 
+ struct atmel_mci_dma {
+@@ -70,6 +69,9 @@ struct atmel_mci {
+ 	int			detect_pin;
+ 	int			wp_pin;
+ 
++	/* For detect pin debouncing */
++	struct timer_list	detect_timer;
++
+ 	unsigned long		bus_hz;
+ 	unsigned long		mapbase;
+ 	struct clk		*mck;
+@@ -108,8 +110,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_dma_error_is_complete(host)			\
+ 	test_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_card_detect_is_complete(host)			\
+-	test_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Test and clear bit macros for pending events */
+ #define mci_clear_cmd_is_pending(host)			\
+@@ -124,8 +124,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_is_pending(host)		\
+ 	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_is_pending(host)		\
+-	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Test and set bit macros for completed events */
+ #define mci_set_cmd_is_completed(host)			\
+@@ -140,8 +138,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_is_completed(host)		\
+ 	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_is_completed(host)		\
+-	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for completed events */
+ #define mci_set_cmd_complete(host)			\
+@@ -158,8 +154,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_complete(host)		\
+ 	set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_complete(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for pending events */
+ #define mci_set_cmd_pending(host)			\
+@@ -174,8 +168,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_set_dma_error_pending(host)			\
+ 	set_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_set_card_detect_pending(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Clear bit macros for pending events */
+ #define mci_clear_cmd_pending(host)			\
+@@ -190,8 +182,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_pending(host)		\
+ 	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_pending(host)		\
+-	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ 
+ #ifdef CONFIG_DEBUG_FS
+@@ -560,6 +550,21 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
+ 				mci_readl(host, IMR));
+ 
+ 	WARN_ON(host->mrq != NULL);
++
++	/*
++	 * We may "know" the card is gone even though there's still an
++	 * electrical connection. If so, we really need to communicate
++	 * this to the MMC core since there won't be any more
++	 * interrupts as the card is completely removed. Otherwise,
++	 * the MMC core might believe the card is still there even
++	 * though the card was just removed very slowly.
++	 */
++	if (!host->present) {
++		mrq->cmd->error = -ENOMEDIUM;
++		mmc_request_done(mmc, mrq);
++		return;
++	}
++
+ 	host->mrq = mrq;
+ 	host->pending_events = 0;
+ 	host->completed_events = 0;
+@@ -729,6 +734,61 @@ static void atmci_command_complete(struct atmel_mci *host,
+ 	}
+ }
+ 
++static void atmci_detect_change(unsigned long data)
++{
++	struct atmel_mci *host = (struct atmel_mci *)data;
++	struct mmc_request *mrq = host->mrq;
++	int present;
++
++	/*
++	 * atmci_remove() sets detect_pin to -1 before freeing the
++	 * interrupt. We must not re-enable the interrupt if it has
++	 * been freed.
++	 */
++	smp_rmb();
++	if (host->detect_pin < 0)
++		return;
++
++	enable_irq(gpio_to_irq(host->detect_pin));
++	present = !gpio_get_value(host->detect_pin);
++
++	dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
++			present, host->present);
++
++	if (present != host->present) {
++		dev_dbg(&host->mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++
++		/* Reset controller if card is gone */
++		if (!present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ENOMEDIUM;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ENOMEDIUM;
++				atmci_data_complete(host, host->data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ENOMEDIUM;
++
++			host->cmd = NULL;
++			atmci_request_end(host->mmc, mrq);
++		}
++
++		mmc_detect_change(host->mmc, 0);
++	}
++}
++
+ static void atmci_tasklet_func(unsigned long priv)
+ {
+ 	struct mmc_host *mmc = (struct mmc_host *)priv;
+@@ -806,33 +866,6 @@ static void atmci_tasklet_func(unsigned long priv)
+ 		data->bytes_xfered = data->blocks * data->blksz;
+ 		atmci_data_complete(host, data);
+ 	}
+-	if (mci_clear_card_detect_is_pending(host)) {
+-		/* Reset controller if card is gone */
+-		if (!host->present) {
+-			mci_writel(host, CR, MCI_BIT(SWRST));
+-			mci_writel(host, IDR, ~0UL);
+-			mci_writel(host, CR, MCI_BIT(MCIEN));
+-		}
+-
+-		/* Clean up queue if present */
+-		if (mrq) {
+-			if (!mci_cmd_is_complete(host))
+-				mrq->cmd->error = -ETIMEDOUT;
+-			if (mrq->data && !mci_data_is_complete(host)
+-			    && !mci_data_error_is_complete(host)) {
+-				dma_stop_request(host->dma.req.req.dmac,
+-						host->dma.req.req.channel);
+-				host->data->error = -ETIMEDOUT;
+-				atmci_data_complete(host, data);
+-			}
+-			if (mrq->stop && !mci_stop_is_complete(host))
+-				mrq->stop->error = -ETIMEDOUT;
+-
+-			host->cmd = NULL;
+-			atmci_request_end(mmc, mrq);
+-		}
+-		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
+-	}
+ }
+ 
+ static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
+@@ -957,20 +990,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)
+ 	return IRQ_HANDLED;
+ }
+ 
+-static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
+ {
+ 	struct mmc_host *mmc = dev_id;
+ 	struct atmel_mci *host = mmc_priv(mmc);
+ 
+-	int present = !gpio_get_value(irq_to_gpio(irq));
++	/*
++	 * Disable interrupts until the pin has stabilized and check
++	 * the state then. Use mod_timer() since we may be in the
++	 * middle of the timer routine when this interrupt triggers.
++	 */
++	disable_irq_nosync(irq);
++	mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
+ 
+-	if (present != host->present) {
+-		dev_dbg(&mmc->class_dev, "card %s\n",
+-			present ? "inserted" : "removed");
+-		host->present = present;
+-		mci_set_card_detect_pending(host);
+-		tasklet_schedule(&host->tasklet);
+-	}
+ 	return IRQ_HANDLED;
+ }
+ 
+@@ -1079,8 +1111,11 @@ static int __devinit atmci_probe(struct platform_device *pdev)
+ 	mmc_add_host(mmc);
+ 
+ 	if (host->detect_pin >= 0) {
++		setup_timer(&host->detect_timer, atmci_detect_change,
++				(unsigned long)host);
++
+ 		ret = request_irq(gpio_to_irq(host->detect_pin),
+-				  atmci_detect_change,
++				  atmci_detect_interrupt,
+ 				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ 				  DRIVER_NAME, mmc);
+ 		if (ret) {
+@@ -1125,9 +1160,16 @@ static int __devexit atmci_remove(struct platform_device *pdev)
+ 		atmci_cleanup_debugfs(host);
+ 
+ 		if (host->detect_pin >= 0) {
+-			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			int pin = host->detect_pin;
++
++			/* Make sure our timer doesn't enable the interrupt */
++			host->detect_pin = -1;
++			smp_wmb();
++
++			free_irq(gpio_to_irq(pin), host->mmc);
++			del_timer_sync(&host->detect_timer);
+ 			cancel_delayed_work(&host->mmc->detect);
+-			gpio_free(host->detect_pin);
++			gpio_free(pin);
+ 		}
+ 
+ 		mmc_remove_host(host->mmc);
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/dev/.DEVICES b/target/device/Atmel/atngw100-expanded/target_skeleton/dev/.DEVICES
new file mode 100644
index 000000000..9c0871ffe
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/dev/.DEVICES
@@ -0,0 +1,69 @@
+null c 1 3
+zero c 1 5
+random c 1 8
+urandom c 1 9
+ttyUS0 c 4 64
+ttyUS1 c 4 65
+ttyUS2 c 4 66
+ttyUS3 c 4 67
+tty c 5 0
+ptmx c 5 2
+console c 5 1
+fb0 c 29 0
+spi0 c 153 0
+spi1 c 153 1
+spi2 c 153 2
+spi3 c 153 3
+mmcblk0 b 254 0
+mmcblk0p1 b 254 1
+mmcblk0p2 b 254 2
+mmcblk0p3 b 254 3
+mmcblk0p4 b 254 4
+sequencer c 14 1
+admmidi0 c 14 14
+admmidi1 c 14 30
+admmidi2 c 14 46
+admmidi3 c 14 62
+adsp0 c 14 12
+adsp1 c 14 28
+adsp2 c 14 44
+adsp3 c 14 60
+aloadC0 c 116 0
+aloadC1 c 116 32
+aloadC2 c 116 64
+aloadC3 c 116 96
+aloadSEQ c 116 1
+amidi0 c 14 13
+amidi1 c 14 29
+amidi2 c 14 45
+amidi3 c 14 61
+amixer0 c 14 11
+amixer1 c 14 27
+amixer2 c 14 43
+amixer3 c 14 59
+audio0 c 14 4
+audio1 c 14 20
+audio2 c 14 36
+audio3 c 14 52
+dmfm0 c 14 10
+dmfm1 c 14 26
+dmfm2 c 14 42
+dmfm3 c 14 58
+dmmidi0 c 14 9
+dmmidi1 c 14 25
+dmmidi2 c 14 41
+dmmidi3 c 14 57
+dsp0 c 14 3
+dsp1 c 14 19
+dsp2 c 14 35
+dsp3 c 14 51
+midi00 c 14 2
+midi01 c 14 18
+midi02 c 14 34
+midi03 c 14 50
+mixer0 c 14 0
+mixer1 c 14 18
+mixer2 c 14 34
+mixer3 c 14 48
+music c 14 8
+sndstat c 14 6
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/TZ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/TZ
new file mode 100644
index 000000000..36498c4a7
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/TZ
@@ -0,0 +1 @@
+CET1CDT
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/default/ntpdate b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/default/ntpdate
new file mode 100644
index 000000000..80d8608c2
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/default/ntpdate
@@ -0,0 +1,6 @@
+# servers to check.   (Separate multiple servers with spaces.)
+NTPSERVERS="pool.ntp.org"
+#
+# additional options for ntpdate
+#NTPOPTIONS="-v"
+NTPOPTIONS="-u"
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/dnsmasq.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/dnsmasq.conf
new file mode 100644
index 000000000..036cc1a7b
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/dnsmasq.conf
@@ -0,0 +1,447 @@
+# Configuration file for dnsmasq.
+#
+# Format is one option per line, legal options are the same
+# as the long options legal on the command line. See
+# "/usr/sbin/dnsmasq --help" or "man 8 dnsmasq" for details.
+
+# The following two options make you a better netizen, since they
+# tell dnsmasq to filter out queries which the public DNS cannot
+# answer, and which load the servers (especially the root servers)
+# uneccessarily. If you have a dial-on-demand link they also stop
+# these requests from bringing up the link uneccessarily.
+
+# Never forward plain names (without a dot or domain part)
+domain-needed
+# Never forward addresses in the non-routed address spaces.
+bogus-priv
+
+
+# Uncomment this to filter useless windows-originated DNS requests
+# which can trigger dial-on-demand links needlessly.
+# Note that (amongst other things) this blocks all SRV requests,
+# so don't use it if you use eg Kerberos.
+# This option only affects forwarding, SRV records originating for
+# dnsmasq (via srv-host= lines) are not suppressed by it.
+#filterwin2k
+
+# Change this line if you want dns to get its upstream servers from
+# somewhere other that /etc/resolv.conf
+#resolv-file=
+
+# By  default,  dnsmasq  will  send queries to any of the upstream
+# servers it knows about and tries to favour servers to are  known
+# to  be  up.  Uncommenting this forces dnsmasq to try each query
+# with  each  server  strictly  in  the  order  they   appear   in
+# /etc/resolv.conf
+#strict-order
+
+# If you don't want dnsmasq to read /etc/resolv.conf or any other
+# file, getting its servers from this file instead (see below), then
+# uncomment this
+#no-resolv
+
+# If you don't want dnsmasq to poll /etc/resolv.conf or other resolv
+# files for changes and re-read them then uncomment this.
+#no-poll
+
+# Add other name servers here, with domain specs if they are for
+# non-public domains.
+#server=/localnet/192.168.0.1
+
+# Add local-only domains here, queries in these domains are answered
+# from /etc/hosts or DHCP only.
+#local=/localnet/
+
+# Add domains which you want to force to an IP address here.
+# The example below send any host in doubleclick.net to a local
+# webserver.
+#address=/doubleclick.net/127.0.0.1
+
+# If you want dnsmasq to change uid and gid to something other
+# than the default, edit the following lines.
+user=dnsmasq
+#group=
+
+# If you want dnsmasq to listen for DHCP and DNS requests only on
+# specified interfaces (and the loopback) give the name of the
+# interface (eg eth0) here.
+# Repeat the line for more than one interface.
+interface=eth1
+# Or you can specify which interface _not_ to listen on
+except-interface=eth0
+# Or which to listen on by address (remember to include 127.0.0.1 if
+# you use this.)
+#listen-address=
+# If you want dnsmasq to provide only DNS service on an interface,
+# configure it as shown above, and then use the following line to
+# disable DHCP on it.
+#no-dhcp-interface=
+
+# On systems which support it, dnsmasq binds the wildcard address,
+# even when it is listening on only some interfaces. It then discards
+# requests that it shouldn't reply to. This has the advantage of
+# working even when interfaces come and go and change address. If you
+# want dnsmasq to really bind only the interfaces it is listening on,
+# uncomment this option. About the only time you may need this is when
+# running another nameserver on the same machine.
+#bind-interfaces
+
+# If you don't want dnsmasq to read /etc/hosts, uncomment the
+# following line.
+#no-hosts
+# or if you want it to read another file, as well as /etc/hosts, use
+# this.
+addn-hosts=/etc/hosts.dnsmasq
+
+# Set this (and domain: see below) if you want to have a domain
+# automatically added to simple names in a hosts-file.
+#expand-hosts
+
+# Set the domain for dnsmasq. this is optional, but if it is set, it
+# does the following things.
+# 1) Allows DHCP hosts to have fully qualified domain names, as long
+#     as the domain part matches this setting.
+# 2) Sets the "domain" DHCP option thereby potentially setting the
+#    domain of all systems configured by DHCP
+# 3) Provides the domain part for "expand-hosts"
+domain=example.net
+
+# Uncomment this to enable the integrated DHCP server, you need
+# to supply the range of addresses available for lease and optionally
+# a lease time. If you have more than one network, you will need to
+# repeat this for each network on which you want to supply DHCP
+# service.
+dhcp-range=10.0.0.20,10.0.0.254,72h
+
+# This is an example of a DHCP range where the netmask is given. This
+# is needed for networks we reach the dnsmasq DHCP server via a relay
+# agent. If you don't know what a DHCP relay agent is, you probably
+# don't need to worry about this.
+#dhcp-range=10.0.0.20,10.0.0.254,255.255.255.0,72h
+
+# This is an example of a DHCP range with a network-id, so that
+# some DHCP options may be set only for this network.
+#dhcp-range=red,192.168.0.50,192.168.0.150
+
+# Supply parameters for specified hosts using DHCP. There are lots
+# of valid alternatives, so we will give examples of each. Note that
+# IP addresses DO NOT have to be in the range given above, they just
+# need to be on the same network. The order of the parameters in these
+# do not matter, it's permissble to give name,adddress and MAC in any order
+
+# Always allocate the host with ethernet address 11:22:33:44:55:66
+# The IP address 192.168.0.60
+#dhcp-host=11:22:33:44:55:66,192.168.0.60
+
+# Always set the name of the host with hardware address
+# 11:22:33:44:55:66 to be "fred"
+#dhcp-host=11:22:33:44:55:66,fred
+
+# Always give the host with ethernet address 11:22:33:44:55:66
+# the name fred and IP address 192.168.0.60 and lease time 45 minutes
+#dhcp-host=11:22:33:44:55:66,fred,192.168.0.60,45m
+
+# Give the machine which says it's name is "bert" IP address
+# 192.168.0.70 and an infinite lease
+#dhcp-host=bert,192.168.0.70,infinite
+
+# Always give the host with client identifier 01:02:02:04
+# the IP address 192.168.0.60
+#dhcp-host=id:01:02:02:04,192.168.0.60
+
+# Always give the host with client identifier "marjorie"
+# the IP address 192.168.0.60
+#dhcp-host=id:marjorie,192.168.0.60
+
+# Enable the address given for "judge" in /etc/hosts
+# to be given to a machine presenting the name "judge" when
+# it asks for a DHCP lease.
+#dhcp-host=judge
+
+# Never offer DHCP service to a machine whose ethernet
+# address is 11:22:33:44:55:66
+#dhcp-host=11:22:33:44:55:66,ignore
+
+# Ignore any client-id presented by the machine with ethernet
+# address 11:22:33:44:55:66. This is useful to prevent a machine
+# being treated differently when running under different OS's or
+# between PXE boot and OS boot.
+#dhcp-host=11:22:33:44:55:66,id:*
+
+# Send extra options which are tagged as "red" to
+# the machine with ethernet address 11:22:33:44:55:66
+#dhcp-host=11:22:33:44:55:66,net:red
+
+# Send extra options which are tagged as "red" to
+# any machine with ethernet address starting 11:22:33:
+#dhcp-host=11:22:33:*:*:*,net:red
+
+# Send extra options which are tagged as "red" to any machine whose
+# DHCP vendorclass string includes the substring "Linux"
+#dhcp-vendorclass=red,Linux
+
+# Send extra options which are tagged as "red" to any machine one
+# of whose DHCP userclass strings includes the substring "accounts"
+#dhcp-userclass=red,accounts
+
+# Send extra options which are tagged as "red" to any machine whose
+# MAC address matches the pattern.
+#dhcp-mac=red,00:60:8C:*:*:*
+
+# If this line is uncommented, dnsmasq will read /etc/ethers and act
+# on the ethernet-address/IP pairs found there just as if they had
+# been given as --dhcp-host options. Useful if you keep
+# MAC-address/host mappings there for other purposes.
+read-ethers
+
+# Send options to hosts which ask for a DHCP lease.
+# See RFC 2132 for details of available options.
+# Common options can be given to dnsmasq by name:
+# run "dnsmasq --help dhcp" to get a list.
+# Note that all the common settings, such as netmask and
+# broadcast address, DNS server and default route, are given
+# sane defaults by dnsmasq. You very likely will not need any
+# any dhcp-options. If you use Windows clients and Samba, there
+# are some options which are recommended, they are detailed at the
+# end of this section.
+# For reference, the common options are:
+# subnet mask - 1
+# default router - 3
+# DNS server - 6
+# broadcast address - 28
+
+# Override the default route supplied by dnsmasq, which assumes the
+# router is the same machine as the one running dnsmasq.
+#dhcp-option=3,1.2.3.4
+
+# Do the same thing, but using the option name
+#dhcp-option=option:router,1.2.3.4
+
+# Override the default route supplied by dnsmasq and send no default
+# route at all. Note that this only works for the options sent by
+# default (1, 3, 6, 12, 28) the same line will send a zero-length option
+# for all other option numbers.
+#dhcp-option=3
+
+# Set the NTP time server addresses to 192.168.0.4 and 10.10.0.5
+#dhcp-option=option:ntp-server,192.168.0.4,10.10.0.5
+
+# Set the NTP time server address to be the same machine as
+# is running dnsmasq
+dhcp-option=42,0.0.0.0
+
+# Set the NIS domain name to "welly"
+#dhcp-option=40,welly
+
+# Set the default time-to-live to 50
+#dhcp-option=23,50
+
+# Set the "all subnets are local" flag
+#dhcp-option=27,1
+
+# Send the etherboot magic flag and then etherboot options (a string).
+#dhcp-option=128,e4:45:74:68:00:00
+#dhcp-option=129,NIC=eepro100
+
+# Specify an option which will only be sent to the "red" network
+# (see dhcp-range for the declaration of the "red" network)
+# Note that the net: part must precede the option: part.
+#dhcp-option = net:red, option:ntp-server, 192.168.1.1
+
+# The following DHCP options set up dnsmasq in the same way as is specified
+# for the ISC dhcpcd in
+# http://www.samba.org/samba/ftp/docs/textdocs/DHCP-Server-Configuration.txt
+# adapted for a typical dnsmasq installation where the host running
+# dnsmasq is also the host running samba.
+# you may want to uncomment them if you use Windows clients and Samba.
+dhcp-option=19,0           # option ip-forwarding off
+dhcp-option=44,0.0.0.0     # set netbios-over-TCP/IP nameserver(s) aka WINS server(s)
+dhcp-option=45,0.0.0.0     # netbios datagram distribution server
+dhcp-option=46,8           # netbios node type
+dhcp-option=47             # empty netbios scope.
+
+# Send RFC-3397 DNS domain search DHCP option. WARNING: Your DHCP client
+# probably doesn't support this......
+#dhcp-option=option:domain-search,eng.apple.com,marketing.apple.com
+
+# Send RFC-3442 classless static routes (note the netmask encoding)
+#dhcp-option=121,192.168.1.0/24,1.2.3.4,10.0.0.0/8,5.6.7.8
+
+# Send vendor-class specific options encapsulated in DHCP option 43.
+# The meaning of the options is defined by the vendor-class so
+# options are sent only when the client supplied vendor class
+# matches the class given here. (A substring match is OK, so "MSFT"
+# matches "MSFT" and "MSFT 5.0"). This example sets the
+# mtftp address to 0.0.0.0 for PXEClients.
+#dhcp-option=vendor:PXEClient,1,0.0.0.0
+
+# Send microsoft-specific option to tell windows to release the DHCP lease
+# when it shuts down. Note the "i" flag, to tell dnsmasq to send the
+# value as a four-byte integer - that's what microsoft wants. See
+# http://technet2.microsoft.com/WindowsServer/en/library/a70f1bb7-d2d4-49f0-96d6-4b7414ecfaae1033.mspx?mfr=true
+#dhcp-option=vendor:MSFT,2,1i
+
+# Send the Encapsulated-vendor-class ID needed by some configurations of
+# Etherboot to allow is to recognise the DHCP server.
+#dhcp-option=vendor:Etherboot,60,"Etherboot"
+
+# Send options to PXELinux. Note that we need to send the options even
+# though they don't appear in the parameter request list, so we need
+# to use dhcp-option-force here.
+# See http://syslinux.zytor.com/pxe.php#special for details.
+# Magic number - needed before anything else is recognised
+#dhcp-option-force=208,f1:00:74:7e
+# Configuration file name
+#dhcp-option-force=209,configs/common
+# Path prefix
+#dhcp-option-force=210,/tftpboot/pxelinux/files/
+# Reboot time. (Note 'i' to send 32-bit value)
+#dhcp-option-force=211,30i
+
+# Set the boot filename for BOOTP. You will only need
+# this is you want to boot machines over the network and you will need
+# a TFTP server; either dnsmasq's built in TFTP server or an
+# external one. (See below for how to enable the TFTP server.)
+#dhcp-boot=pxelinux.0
+
+# Enable dnsmasq's built-in TFTP server
+#enable-tftp
+
+# Set the root directory for files availble via FTP.
+#tftp-root=/var/ftpd
+
+# Make the TFTP server more secure: with this set, only files owned by
+# the user dnsmasq is running as will be send over the net.
+#tftp-secure
+
+# Set the boot file name only when the "red" tag is set.
+#dhcp-boot=net:red,pxelinux.red-net
+
+# An example of dhcp-boot with an external server: the name and IP
+# address of the server are given after the filename.
+#dhcp-boot=/var/ftpd/pxelinux.0,boothost,192.168.0.3
+
+# Set the limit on DHCP leases, the default is 150
+#dhcp-lease-max=150
+
+# The DHCP server needs somewhere on disk to keep its lease database.
+# This defaults to a sane location, but if you want to change it, use
+# the line below.
+dhcp-leasefile=/var/lib/misc/dnsmasq.leases
+
+# Set the DHCP server to authoritative mode. In this mode it will barge in
+# and take over the lease for any client which broadcasts on the network,
+# whether it has a record of the lease or not. This avoids long timeouts
+# when a machine wakes up on a new network. DO NOT enable this if there's
+# the slighest chance that you might end up accidentally configuring a DHCP
+# server for your campus/company accidentally. The ISC server uses the same
+# the same option, and this URL provides more information:
+# http://www.isc.org/index.pl?/sw/dhcp/authoritative.php
+dhcp-authoritative
+
+# Run an executable when a DHCP lease is created or destroyed.
+# The arguments sent to the script are "add" or "del",
+# then the MAC address, the IP address and finally the hostname
+# if there is one.
+#dhcp-script=/bin/echo
+
+# Set the cachesize here.
+#cache-size=150
+
+# If you want to disable negative caching, uncomment this.
+#no-negcache
+
+# Normally responses which come form /etc/hosts and the DHCP lease
+# file have Time-To-Live set as zero, which conventionally means
+# do not cache further. If you are happy to trade lower load on the
+# server for potentially stale date, you can set a time-to-live (in
+# seconds) here.
+#local-ttl=
+
+# If you want dnsmasq to detect attempts by Verisign to send queries
+# to unregistered .com and .net hosts to its sitefinder service and
+# have dnsmasq instead return the correct NXDOMAIN response, uncomment
+# this line. You can add similar lines to do the same for other
+# registries which have implemented wildcard A records.
+#bogus-nxdomain=64.94.110.11
+
+# If you want to fix up DNS results from upstream servers, use the
+# alias option. This only works for IPv4.
+# This alias makes a result of 1.2.3.4 appear as 5.6.7.8
+#alias=1.2.3.4,5.6.7.8
+# and this maps 1.2.3.x to 5.6.7.x
+#alias=1.2.3.0,5.6.7.0,255.255.255.0
+
+
+# Change these lines if you want dnsmasq to serve MX records.
+
+# Return an MX record named "maildomain.com" with target
+# servermachine.com and preference 50
+#mx-host=maildomain.com,servermachine.com,50
+
+# Set the default target for MX records created using the localmx option.
+#mx-target=servermachine.com
+
+# Return an MX record pointing to the mx-target for all local
+# machines.
+#localmx
+
+# Return an MX record pointing to itself for all local machines.
+#selfmx
+
+# Change the following lines if you want dnsmasq to serve SRV
+# records.  These are useful if you want to serve ldap requests for
+# Active Directory and other windows-originated DNS requests.
+# See RFC 2782.
+# You may add multiple srv-host lines.
+# The fields are <name>,<target>,<port>,<priority>,<weight>
+# If the domain part if missing from the name (so that is just has the
+# service and protocol sections) then the domain given by the domain=
+# config option is used. (Note that expand-hosts does not need to be
+# set for this to work.)
+
+# A SRV record sending LDAP for the example.com domain to
+# ldapserver.example.com port 289
+#srv-host=_ldap._tcp.example.com,ldapserver.example.com,389
+
+# A SRV record sending LDAP for the example.com domain to
+# ldapserver.example.com port 289 (using domain=)
+#domain=example.com
+#srv-host=_ldap._tcp,ldapserver.example.com,389
+
+# Two SRV records for LDAP, each with different priorities
+#srv-host=_ldap._tcp.example.com,ldapserver.example.com,389,1
+#srv-host=_ldap._tcp.example.com,ldapserver.example.com,389,2
+
+# A SRV record indicating that there is no LDAP server for the domain
+# example.com
+#srv-host=_ldap._tcp.example.com
+
+# The following line shows how to make dnsmasq serve an arbitrary PTR
+# record. This is useful for DNS-SD. (Note that the
+# domain-name expansion done for SRV records _does_not
+# occur for PTR records.)
+#ptr-record=_http._tcp.dns-sd-services,"New Employee Page._http._tcp.dns-sd-services"
+
+# Change the following lines to enable dnsmasq to serve TXT records.
+# These are used for things like SPF and zeroconf. (Note that the
+# domain-name expansion done for SRV records _does_not
+# occur for TXT records.)
+
+#Example SPF.
+#txt-record=example.com,"v=spf1 a -all"
+
+#Example zeroconf
+#txt-record=_http._tcp.example.com,name=value,paper=A4
+
+
+# For debugging purposes, log each DNS query as it passes through
+# dnsmasq.
+#log-queries
+
+# Log lots of extra information about DHCP transactions.
+#log-dhcp
+
+# Include a another lot of configuration options.
+#conf-file=/etc/dnsmasq.more.conf
+#conf-dir=/etc/dnsmasq.d
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/fstab b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/fstab
new file mode 100644
index 000000000..c395973e2
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/fstab
@@ -0,0 +1,14 @@
+# device	mount point	type		options		dump	pass
+#/dev/mtdblock1	/		jffs2		defaults	1	1
+#/dev/mmcblk0p1	/		ext3		defaults	1	1
+/dev/mmcblk0p2  swap	swap		defaults    0   0
+/dev/mmcblk0p3  /mnt/sdcard vfat	defaults	0	0
+proc		/proc		proc		defaults	0	0
+sys			/sys		sysfs		defaults	0	0
+dev			/dev		tmpfs		defaults	0	0
+pts			/dev/pts	devpts		defaults	0	0
+run			/var/run	tmpfs		defaults	0	0
+log			/var/log	tmpfs		defaults	0	0
+samba		/var/lib/samba	tmpfs	defaults	0	0
+tmp			/tmp		tmpfs		defaults	0	0
+config		/config		configfs	defaults	0	0
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/group b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/group
new file mode 100644
index 000000000..cec65da3f
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/group
@@ -0,0 +1,20 @@
+root::0:
+daemon:x:1:
+bin:x:2:
+sys:x:3:
+adm:x:4:
+tty:x:5:
+disk:x:6:
+kmem:x:9:
+wheel:x:10:root
+dialout:x:20:
+utmp:x:43:
+staff:x:50:
+www-data::51:
+ftp::52:
+haldaemon:x:68:
+dbus:x:81:
+audio::101:
+users::500:
+default::1000:
+nogroup::65534:
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hostname b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hostname
new file mode 100644
index 000000000..847cd4784
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hostname
@@ -0,0 +1 @@
+ngw.example.net
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hosts b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hosts
new file mode 100644
index 000000000..9d8c7b8e9
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hosts
@@ -0,0 +1,11 @@
+127.0.0.1   localhost.localdomain localhost
+10.0.0.1    ngw.example.net ngw
+
+# The following lines are desirable for IPv6 capable hosts
+::1     localhost
+::1     ip6-localhost ip6-loopback
+fe00::0 ip6-localnet
+ff00::0 ip6-mcastprefix
+ff02::1 ip6-allnodes
+ff02::2 ip6-allrouters
+ff02::3 ip6-allhosts
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hosts.dnsmasq b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hosts.dnsmasq
new file mode 100644
index 000000000..60bc40119
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/hosts.dnsmasq
@@ -0,0 +1,246 @@
+# Local server
+10.0.0.1 ngw.example.net
+10.0.0.1 hostmaster.example.net
+10.0.0.1 ftp.example.net
+10.0.0.1 ns.example.net
+10.0.0.1 ssh.example.net
+10.0.0.1 samba.example.net
+10.0.0.1 telnet.example.net
+10.0.0.1 www.example.net
+
+# DHCP pool
+10.0.0.20 dhcp-020.example.net
+10.0.0.21 dhcp-021.example.net
+10.0.0.22 dhcp-022.example.net
+10.0.0.23 dhcp-023.example.net
+10.0.0.24 dhcp-024.example.net
+10.0.0.25 dhcp-025.example.net
+10.0.0.26 dhcp-026.example.net
+10.0.0.27 dhcp-027.example.net
+10.0.0.28 dhcp-028.example.net
+10.0.0.29 dhcp-029.example.net
+10.0.0.30 dhcp-030.example.net
+10.0.0.31 dhcp-031.example.net
+10.0.0.32 dhcp-032.example.net
+10.0.0.33 dhcp-033.example.net
+10.0.0.34 dhcp-034.example.net
+10.0.0.35 dhcp-035.example.net
+10.0.0.36 dhcp-036.example.net
+10.0.0.37 dhcp-037.example.net
+10.0.0.38 dhcp-038.example.net
+10.0.0.39 dhcp-039.example.net
+10.0.0.40 dhcp-040.example.net
+10.0.0.41 dhcp-041.example.net
+10.0.0.42 dhcp-042.example.net
+10.0.0.43 dhcp-043.example.net
+10.0.0.44 dhcp-044.example.net
+10.0.0.45 dhcp-045.example.net
+10.0.0.46 dhcp-046.example.net
+10.0.0.47 dhcp-047.example.net
+10.0.0.48 dhcp-048.example.net
+10.0.0.49 dhcp-049.example.net
+10.0.0.50 dhcp-050.example.net
+10.0.0.51 dhcp-051.example.net
+10.0.0.52 dhcp-052.example.net
+10.0.0.53 dhcp-053.example.net
+10.0.0.54 dhcp-054.example.net
+10.0.0.55 dhcp-055.example.net
+10.0.0.56 dhcp-056.example.net
+10.0.0.57 dhcp-057.example.net
+10.0.0.58 dhcp-058.example.net
+10.0.0.59 dhcp-059.example.net
+10.0.0.60 dhcp-060.example.net
+10.0.0.61 dhcp-061.example.net
+10.0.0.62 dhcp-062.example.net
+10.0.0.63 dhcp-063.example.net
+10.0.0.64 dhcp-064.example.net
+10.0.0.65 dhcp-065.example.net
+10.0.0.66 dhcp-066.example.net
+10.0.0.67 dhcp-067.example.net
+10.0.0.68 dhcp-068.example.net
+10.0.0.69 dhcp-069.example.net
+10.0.0.70 dhcp-070.example.net
+10.0.0.71 dhcp-071.example.net
+10.0.0.72 dhcp-072.example.net
+10.0.0.73 dhcp-073.example.net
+10.0.0.74 dhcp-074.example.net
+10.0.0.75 dhcp-075.example.net
+10.0.0.76 dhcp-076.example.net
+10.0.0.77 dhcp-077.example.net
+10.0.0.78 dhcp-078.example.net
+10.0.0.79 dhcp-079.example.net
+10.0.0.80 dhcp-080.example.net
+10.0.0.81 dhcp-081.example.net
+10.0.0.82 dhcp-082.example.net
+10.0.0.83 dhcp-083.example.net
+10.0.0.84 dhcp-084.example.net
+10.0.0.85 dhcp-085.example.net
+10.0.0.86 dhcp-086.example.net
+10.0.0.87 dhcp-087.example.net
+10.0.0.88 dhcp-088.example.net
+10.0.0.89 dhcp-089.example.net
+10.0.0.90 dhcp-090.example.net
+10.0.0.91 dhcp-091.example.net
+10.0.0.92 dhcp-092.example.net
+10.0.0.93 dhcp-093.example.net
+10.0.0.94 dhcp-094.example.net
+10.0.0.95 dhcp-095.example.net
+10.0.0.96 dhcp-096.example.net
+10.0.0.97 dhcp-097.example.net
+10.0.0.98 dhcp-098.example.net
+10.0.0.99 dhcp-099.example.net
+10.0.0.100 dhcp-100.example.net
+10.0.0.101 dhcp-101.example.net
+10.0.0.102 dhcp-102.example.net
+10.0.0.103 dhcp-103.example.net
+10.0.0.104 dhcp-104.example.net
+10.0.0.105 dhcp-105.example.net
+10.0.0.106 dhcp-106.example.net
+10.0.0.107 dhcp-107.example.net
+10.0.0.108 dhcp-108.example.net
+10.0.0.109 dhcp-109.example.net
+10.0.0.110 dhcp-110.example.net
+10.0.0.111 dhcp-111.example.net
+10.0.0.112 dhcp-112.example.net
+10.0.0.113 dhcp-113.example.net
+10.0.0.114 dhcp-114.example.net
+10.0.0.115 dhcp-115.example.net
+10.0.0.116 dhcp-116.example.net
+10.0.0.117 dhcp-117.example.net
+10.0.0.118 dhcp-118.example.net
+10.0.0.119 dhcp-119.example.net
+10.0.0.120 dhcp-120.example.net
+10.0.0.121 dhcp-121.example.net
+10.0.0.122 dhcp-122.example.net
+10.0.0.123 dhcp-123.example.net
+10.0.0.124 dhcp-124.example.net
+10.0.0.125 dhcp-125.example.net
+10.0.0.126 dhcp-126.example.net
+10.0.0.127 dhcp-127.example.net
+10.0.0.128 dhcp-128.example.net
+10.0.0.129 dhcp-129.example.net
+10.0.0.130 dhcp-130.example.net
+10.0.0.131 dhcp-131.example.net
+10.0.0.132 dhcp-132.example.net
+10.0.0.133 dhcp-133.example.net
+10.0.0.134 dhcp-134.example.net
+10.0.0.135 dhcp-135.example.net
+10.0.0.136 dhcp-136.example.net
+10.0.0.137 dhcp-137.example.net
+10.0.0.138 dhcp-138.example.net
+10.0.0.139 dhcp-139.example.net
+10.0.0.140 dhcp-140.example.net
+10.0.0.141 dhcp-141.example.net
+10.0.0.142 dhcp-142.example.net
+10.0.0.143 dhcp-143.example.net
+10.0.0.144 dhcp-144.example.net
+10.0.0.145 dhcp-145.example.net
+10.0.0.146 dhcp-146.example.net
+10.0.0.147 dhcp-147.example.net
+10.0.0.148 dhcp-148.example.net
+10.0.0.149 dhcp-149.example.net
+10.0.0.150 dhcp-150.example.net
+10.0.0.151 dhcp-151.example.net
+10.0.0.152 dhcp-152.example.net
+10.0.0.153 dhcp-153.example.net
+10.0.0.154 dhcp-154.example.net
+10.0.0.155 dhcp-155.example.net
+10.0.0.156 dhcp-156.example.net
+10.0.0.157 dhcp-157.example.net
+10.0.0.158 dhcp-158.example.net
+10.0.0.159 dhcp-159.example.net
+10.0.0.160 dhcp-160.example.net
+10.0.0.161 dhcp-161.example.net
+10.0.0.162 dhcp-162.example.net
+10.0.0.163 dhcp-163.example.net
+10.0.0.164 dhcp-164.example.net
+10.0.0.165 dhcp-165.example.net
+10.0.0.166 dhcp-166.example.net
+10.0.0.167 dhcp-167.example.net
+10.0.0.168 dhcp-168.example.net
+10.0.0.169 dhcp-169.example.net
+10.0.0.170 dhcp-170.example.net
+10.0.0.171 dhcp-171.example.net
+10.0.0.172 dhcp-172.example.net
+10.0.0.173 dhcp-173.example.net
+10.0.0.174 dhcp-174.example.net
+10.0.0.175 dhcp-175.example.net
+10.0.0.176 dhcp-176.example.net
+10.0.0.177 dhcp-177.example.net
+10.0.0.178 dhcp-178.example.net
+10.0.0.179 dhcp-179.example.net
+10.0.0.180 dhcp-180.example.net
+10.0.0.181 dhcp-181.example.net
+10.0.0.182 dhcp-182.example.net
+10.0.0.183 dhcp-183.example.net
+10.0.0.184 dhcp-184.example.net
+10.0.0.185 dhcp-185.example.net
+10.0.0.186 dhcp-186.example.net
+10.0.0.187 dhcp-187.example.net
+10.0.0.188 dhcp-188.example.net
+10.0.0.189 dhcp-189.example.net
+10.0.0.190 dhcp-190.example.net
+10.0.0.191 dhcp-191.example.net
+10.0.0.192 dhcp-192.example.net
+10.0.0.193 dhcp-193.example.net
+10.0.0.194 dhcp-194.example.net
+10.0.0.195 dhcp-195.example.net
+10.0.0.196 dhcp-196.example.net
+10.0.0.197 dhcp-197.example.net
+10.0.0.198 dhcp-198.example.net
+10.0.0.199 dhcp-199.example.net
+10.0.0.200 dhcp-200.example.net
+10.0.0.201 dhcp-201.example.net
+10.0.0.202 dhcp-202.example.net
+10.0.0.203 dhcp-203.example.net
+10.0.0.204 dhcp-204.example.net
+10.0.0.205 dhcp-205.example.net
+10.0.0.206 dhcp-206.example.net
+10.0.0.207 dhcp-207.example.net
+10.0.0.208 dhcp-208.example.net
+10.0.0.209 dhcp-209.example.net
+10.0.0.210 dhcp-210.example.net
+10.0.0.211 dhcp-211.example.net
+10.0.0.212 dhcp-212.example.net
+10.0.0.213 dhcp-213.example.net
+10.0.0.214 dhcp-214.example.net
+10.0.0.215 dhcp-215.example.net
+10.0.0.216 dhcp-216.example.net
+10.0.0.217 dhcp-217.example.net
+10.0.0.218 dhcp-218.example.net
+10.0.0.219 dhcp-219.example.net
+10.0.0.220 dhcp-220.example.net
+10.0.0.221 dhcp-221.example.net
+10.0.0.222 dhcp-222.example.net
+10.0.0.223 dhcp-223.example.net
+10.0.0.224 dhcp-224.example.net
+10.0.0.225 dhcp-225.example.net
+10.0.0.226 dhcp-226.example.net
+10.0.0.227 dhcp-227.example.net
+10.0.0.228 dhcp-228.example.net
+10.0.0.229 dhcp-229.example.net
+10.0.0.230 dhcp-230.example.net
+10.0.0.231 dhcp-231.example.net
+10.0.0.232 dhcp-232.example.net
+10.0.0.233 dhcp-233.example.net
+10.0.0.234 dhcp-234.example.net
+10.0.0.235 dhcp-235.example.net
+10.0.0.236 dhcp-236.example.net
+10.0.0.237 dhcp-237.example.net
+10.0.0.238 dhcp-238.example.net
+10.0.0.239 dhcp-239.example.net
+10.0.0.240 dhcp-240.example.net
+10.0.0.241 dhcp-241.example.net
+10.0.0.242 dhcp-242.example.net
+10.0.0.243 dhcp-243.example.net
+10.0.0.244 dhcp-244.example.net
+10.0.0.245 dhcp-245.example.net
+10.0.0.246 dhcp-246.example.net
+10.0.0.247 dhcp-247.example.net
+10.0.0.248 dhcp-248.example.net
+10.0.0.249 dhcp-249.example.net
+10.0.0.250 dhcp-250.example.net
+10.0.0.251 dhcp-251.example.net
+10.0.0.252 dhcp-252.example.net
+10.0.0.253 dhcp-253.example.net
+10.0.0.254 dhcp-254.example.net
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/httpd.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/httpd.conf
new file mode 100644
index 000000000..640f8150d
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/httpd.conf
@@ -0,0 +1,2 @@
+# Allow all trafic
+A: *
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/inetd.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/inetd.conf
new file mode 100644
index 000000000..02e1b8215
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/inetd.conf
@@ -0,0 +1,3 @@
+#netbios-ssn	stream	tcp nowait	root.root /usr/sbin/smbd smbd
+#netbios-ns	dgram	udp wait	root.root /usr/sbin/nmbd nmbd
+swat		stream	tcp nowait.400	root.root /usr/sbin/swat swat
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K70sendsig b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K70sendsig
new file mode 100755
index 000000000..1a2485251
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K70sendsig
@@ -0,0 +1 @@
+#!/bin/sh
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K80netfs b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K80netfs
new file mode 100755
index 000000000..1a2485251
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K80netfs
@@ -0,0 +1 @@
+#!/bin/sh
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K85network b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K85network
new file mode 100755
index 000000000..d4e8e6139
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K85network
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+IFDOWN=/sbin/ifdown
+
+echo -n "Stopping networking: "
+if ${IFDOWN} -a; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K90localfs b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K90localfs
new file mode 100755
index 000000000..1a2485251
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/K90localfs
@@ -0,0 +1 @@
+#!/bin/sh
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S00mountvirtfs b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S00mountvirtfs
new file mode 100755
index 000000000..a5af059fc
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S00mountvirtfs
@@ -0,0 +1,76 @@
+#!/bin/sh
+
+MOUNT=/bin/mount
+MKDIR=/bin/mkdir
+
+retval=0
+
+mount_fs()
+{
+	if [ "$1" = "" -o "$2" = "" -o "$3" = "" ]; then
+		return;
+	fi
+
+	if [ "$4" = "" ]; then
+		if ! ${MOUNT} -t $3 $1 $2; then
+			echo "  mount $2 failed"
+			retval=1
+			return 1
+		else
+			echo "  $2 mounted"
+		fi
+	else
+		if ! ${MOUNT} -t $3 -o $4 $1 $2; then
+			echo "  mount $2 failed"
+			retval=1
+			return 1
+		else
+			echo "  $2 mounted"
+		fi
+	fi
+
+	return 0
+}
+
+mkdir_fs()
+{
+	if [ "$1" = "" ]; then
+		return;
+	fi
+
+	if ! ${MKDIR} $1; then
+		echo "  mkdir $1 failed"
+		retval=1
+		return 1
+	else
+		echo "  $1 directory made"
+	fi
+
+	return 0
+}
+
+echo "Mounting virtual filesystems:"
+
+mount_fs proc /proc proc
+mount_fs sys /sys sysfs
+
+if mount_fs dev /dev tmpfs "size=512k,mode=0755"; then
+	mkdir_fs /dev/pts
+	mount_fs pts /dev/pts devpts
+	mkdir_fs /dev/shm
+	# g_serial is not detected by mdev.
+	mknod /dev/ttygserial c 127 0
+	mknod /dev/ttyS0 c 4 64
+	mknod /dev/null c 1 3
+fi
+
+mount_fs config /config configfs
+mount_fs tmp /tmp tmpfs
+mount_fs run /var/run tmpfs
+mount_fs log /var/log tmpfs
+
+if [ $retval -ne 0 ]; then
+	echo "  WARNING: not able to mount all virtual file systems"
+fi
+
+exit $retval
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S01hotplug b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S01hotplug
new file mode 100755
index 000000000..a30f06a09
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S01hotplug
@@ -0,0 +1,14 @@
+#! /bin/sh
+
+echo -n "Setting up mdev: "
+set -e
+trap 'echo "failed"' EXIT
+/bin/ln -s /proc/self/fd /dev/fd
+/bin/ln -s /proc/self/fd/0 /dev/stdin
+/bin/ln -s /proc/self/fd/1 /dev/stdout
+/bin/ln -s /proc/self/fd/2 /dev/stderr
+/bin/ln -s /proc/kcore /dev/core
+/bin/echo /sbin/mdev > /proc/sys/kernel/hotplug
+/sbin/mdev -s
+trap - EXIT
+echo "done"
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S02hostname b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S02hostname
new file mode 100755
index 000000000..083d41dc4
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S02hostname
@@ -0,0 +1,47 @@
+#!/bin/sh
+
+PROGRAM=/bin/hostname
+
+echo -n "Setting hostname: "
+[ -x ${PROGRAM} ] || (echo "missing"; exit 0)
+
+if [ -f /etc/hostname ]; then
+	HOST="$(cat /etc/hostname)"
+else
+	HOST="localhost.localdomain"
+fi
+
+start() {
+	if ${PROGRAM} "${HOST}"; then
+		echo "'${HOST}'"
+	else
+		echo "failed"
+		exit 1
+	fi
+}
+
+stop() {
+	return 0
+}
+
+restart() {
+	stop
+	start
+}
+
+case "$1" in
+  start)
+        start
+        ;;
+  stop)
+        stop
+        ;;
+  restart|reload)
+        restart
+        ;;
+  *)
+        echo $"Usage: $0 {start|stop|restart}"
+        exit 1
+esac
+
+exit $?
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S08syslog b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S08syslog
new file mode 100755
index 000000000..58b05925d
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S08syslog
@@ -0,0 +1,24 @@
+#!/bin/sh
+
+SYSLOGD=/sbin/syslogd
+
+echo -n "Starting syslogd: "
+if [ ! -x "${SYSLOGD}" ]; then
+	echo "missing"
+	exit 1
+fi
+
+if ${SYSLOGD}; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
+
+echo -n "Log messages to syslog: "
+if echo 4 4 1 7 > /proc/sys/kernel/printk; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S09klog b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S09klog
new file mode 100755
index 000000000..1b0028a08
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S09klog
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+KLOGD=/sbin/klogd
+
+echo -n "Starting klogd: "
+if [ ! -x "${KLOGD}" ]; then
+	echo "missing"
+	exit 1
+fi
+
+if ${KLOGD}; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S10modules-init b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S10modules-init
new file mode 100755
index 000000000..e2cf4e303
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S10modules-init
@@ -0,0 +1,21 @@
+#!/bin/sh
+
+MODPROBE=/sbin/modprobe
+
+echo -n "Probing modules: "
+if [ ! -x "${MODPROBE}" -o ! -f "/etc/modules" ]; then
+	echo "missing"
+	exit 1
+else
+	echo
+fi
+
+grep '^[^#]' "/etc/modules" | \
+while read module args; do
+	[ "$module" ] || continue
+	if ${MODPROBE} $module $args; then
+		echo "  $module loaded"
+	else
+		echo "  $module failed"
+	fi
+done
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S20network b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S20network
new file mode 100755
index 000000000..06cf8cb00
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S20network
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+IFUP=/sbin/ifup
+
+echo -n "Network interfaces: "
+if ${IFUP} -a; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S41inetd b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S41inetd
new file mode 100755
index 000000000..e485dcc5b
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S41inetd
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+INETD=/usr/sbin/inetd
+
+echo -n "Starting inetd: "
+if [ ! -x "${INETD}" ]; then
+	echo "missing"
+	exit 1
+fi
+
+if ${INETD}; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S42httpd b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S42httpd
new file mode 100755
index 000000000..f8e7813e6
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S42httpd
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+HTTPD=/usr/sbin/httpd
+
+echo -n "Starting httpd: "
+if [ ! -x "${HTTPD}" ]; then
+	echo "missing"
+	exit 1
+fi
+
+if ${HTTPD} -h /www; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S43ntp b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S43ntp
new file mode 100755
index 000000000..69fa4c894
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S43ntp
@@ -0,0 +1,27 @@
+#!/bin/sh
+
+NTPDATE=/usr/bin/ntpdate
+
+if [ -f /etc/default/ntpdate ]; then
+    . /etc/default/ntpdate
+else
+	echo "WARNING: missing /etc/default/ntpdate"
+	exit 1
+fi
+
+echo -n "Starting ntpdate: "
+if [ ! -x ${NTPDATE} ]; then
+	echo "missing"
+	echo -n "  WARNING: could not syncronize clock, "
+	echo "edit NTPSERVERS in /etc/default/ntpdate."
+	exit 1
+fi
+
+if ${NTPDATE} $NTPOPTIONS $NTPSERVERS; then
+	echo "done"
+else
+	echo "failed"
+	echo -n "  WARNING: could not syncronize clock, "
+	echo "edit NTPSERVERS in /etc/default/ntpdate."
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S49netfs b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S49netfs
new file mode 100755
index 000000000..e1e0fbf4f
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S49netfs
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+MOUNT=/bin/mount
+
+echo -n "Mounting remote filesystems: "
+if ${MOUNT} -t nfs -a; then
+	echo "done"
+else
+	echo "failed"
+	exit 1
+fi
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S90firstboot b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S90firstboot
new file mode 100755
index 000000000..4ab20ba92
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/S90firstboot
@@ -0,0 +1,21 @@
+#!/bin/sh
+
+if [ -e /etc/.firstboot ]; then
+	exit 0
+fi
+
+FC_CACHE=`which fc-cache`
+PANGO_QUERY_MODULES=`which pango-querymodules`
+GTK_QUERY_IMMODULES=`which gtk-query-immodules-2.0`
+GDK_PIXBUF_QUERYLOADERS=`which gdk-pixbuf-query-loaders`
+
+echo "Running first-boot configuration."
+echo "This may take a minute."
+
+ 
+${FC_CACHE} -v
+${PANGO_QUERY_MODULES} > /etc/pango/pango.modules
+${GTK_QUERY_IMMODULES} > /etc/gtk-2.0/gtk.immodules
+${GDK_PIXBUF_QUERYLOADERS} > /etc/gtk-2.0/gdk-pixbuf.loaders
+
+touch /etc/.firstboot
\ No newline at end of file
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/rcK b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/rcK
new file mode 100755
index 000000000..1db1400fa
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/rcK
@@ -0,0 +1,6 @@
+#!/bin/sh
+
+echo "Shutting down ..."
+for k in /etc/init.d/K*; do
+	$k stop
+done
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/rcS b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/rcS
new file mode 100755
index 000000000..4d80c251b
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/init.d/rcS
@@ -0,0 +1,11 @@
+#!/bin/sh
+
+for s in /etc/init.d/S*; do
+	if [ -x $s ]; then
+		$s start
+	fi
+done
+
+echo
+echo "NGW100 ready"
+echo
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/inittab b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/inittab
new file mode 100644
index 000000000..539edb7fb
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/inittab
@@ -0,0 +1,27 @@
+# Inittab for the ATNGW100 development board
+#
+# Note: BusyBox init doesn't support runlevels.  The runlevels field is
+# completely ignored by BusyBox init. If you want runlevels, use sysvinit.
+#
+# Format for each entry: <id>:<runlevels>:<action>:<process>
+#
+# id        == tty to run on, or empty for /dev/console
+# runlevels == ignored
+# action    == one of sysinit, respawn, askfirst, wait, and once
+# process   == program to run
+
+# Run the rcS script after kernel is booted.
+::sysinit:/etc/init.d/rcS
+
+# Run a shell on the first serial port. Comment out if you want a getty instead.
+ttyS0::respawn:-/bin/sh
+
+# Run a shell on the g_serial port (USB gadget device)? This shell will spawn
+# error message if the device is not connected.
+#ttygserial::respawn:-/bin/sh
+
+# Uncomment this to run a getty on the first serial port.
+#ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100
+
+# Run a script on shutdown.
+::shutdown:/etc/init.d/rcK
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/modules b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/modules
new file mode 100644
index 000000000..8731a327b
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/modules
@@ -0,0 +1,13 @@
+snd-atmel-ac97
+snd-pcm-oss
+snd-mixer-oss
+
+g_file_storage file=/dev/mmcblk0p3 removable=1
+
+
+# Uncomment g_file_storage to add mass-storage on USB
+#
+# WARNING: Remember to unmount the SD-card before probing g_file_storage.
+#          Failing to unmount before probing g_file_storage can corrupt
+#          your SD-card when accessed through the USB.
+#g_file_storage file=/dev/mmcblk0p1 removable=1
\ No newline at end of file
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/mtab b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/mtab
new file mode 120000
index 000000000..e1c204547
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/mtab
@@ -0,0 +1 @@
+../proc/mounts
\ No newline at end of file
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/network/interfaces b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/network/interfaces
new file mode 100644
index 000000000..d1c534863
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/network/interfaces
@@ -0,0 +1,8 @@
+# Configure Loopback
+auto lo
+iface lo inet loopback
+
+# Configure Ethernet 0
+auto eth0
+iface eth0 inet dhcp
+
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/ntp.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/ntp.conf
new file mode 100644
index 000000000..d1b0af96f
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/ntp.conf
@@ -0,0 +1,49 @@
+# /etc/ntp.conf, configuration for ntpd
+
+# ntpd will use syslog() if logfile is not defined
+#logfile /var/log/ntpd
+
+driftfile /var/lib/ntp/ntp.drift
+statsdir /var/log/
+
+statistics loopstats peerstats clockstats
+filegen loopstats file loopstats type day enable
+filegen peerstats file peerstats type day enable
+filegen clockstats file clockstats type day enable
+
+# You do need to talk to an NTP server or two (or three).
+#server ntp.your-provider.example
+
+# pool.ntp.org maps to more than 100 low-stratum NTP servers.
+# Your server will pick a different set every time it starts up.
+#  *** Please consider joining the pool! ***
+#  ***  <http://www.pool.ntp.org/#join>  ***
+server pool.ntp.org
+server pool.ntp.org
+
+# ... and use the local system clock as a reference if all else fails
+# NOTE: in a local network, set the local stratum of *one* stable server
+# to 10; otherwise your clocks will drift apart if you lose connectivity.
+server 127.127.1.0
+fudge 127.127.1.0 stratum 13
+
+# By default, exchange time with everybody, but don't allow configuration.
+# See /usr/share/doc/ntp-doc/html/accopt.html for details.
+restrict default kod notrap nomodify nopeer noquery
+
+# Local users may interrogate the ntp server more closely.
+restrict 127.0.0.1 nomodify
+
+# Clients from this (example!) subnet have unlimited access,
+# but only if cryptographically authenticated
+restrict 10.0.0.0 mask 255.255.255.0 notrust
+
+# If you want to provide time to your local subnet, change the next line.
+# (Again, the address is an example only.)
+broadcast 10.0.0.255
+
+# If you want to listen to time broadcasts on your local subnet,
+# de-comment the next lines. Please do this only if you trust everybody
+# on the network!
+#disable auth
+#broadcastclient
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/passwd b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/passwd
new file mode 100644
index 000000000..5e073f677
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/passwd
@@ -0,0 +1,18 @@
+root:x:0:0:root:/:/bin/sh
+daemon:x:1:1:daemon:/usr/sbin:/bin/sh
+bin:x:2:2:bin:/bin:/bin/sh
+sys:x:3:3:sys:/dev:/bin/sh
+sync:x:4:100:sync:/bin:/bin/sync
+mail:x:8:8:mail:/var/spool/mail:/bin/sh
+proxy:x:13:13:proxy:/bin:/bin/sh
+www-data:x:33:33:www-data:/var/www:/bin/sh
+backup:x:34:34:backup:/var/backups:/bin/sh
+operator:x:37:37:Operator:/var:/bin/sh
+haldaemon:x:68:68:hald:/:/bin/sh
+dbus:x:81:81:dbus:/var/run/dbus:/bin/sh
+ftp:x:50:50:Anonymous FTP user:/home/ftp:/bin/ash
+dnsmasq:x:52:52:dnsmasq:/var/lib/dnsmasq:/bin/false
+sshd:x:110:65534:Operator:/var/run/sshd:/bin/false
+nobody:x:65534:65534:nobody:/nonexistent:/bin/false
+avr32:x:500:500:Linux User,,,:/home/avr32:/bin/sh
+default:x:1000:1000:Default non-root user:/home/default:/bin/sh
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/proftpd.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/proftpd.conf
new file mode 100644
index 000000000..59d039087
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/proftpd.conf
@@ -0,0 +1,31 @@
+ServerName			"ATNGW100 FTP server"
+ServerType			standalone
+DefaultServer			on
+
+# Port 21 is the standard FTP port.
+Port				21
+
+# Umask 022 is a good standard umask to prevent new dirs and files
+# from being group and world writable.
+Umask				022
+
+# Note that this ONLY works in standalone mode, in inetd mode you should use an
+# inetd server that allows you to limit maximum number of processes per service
+# (such as inetd).
+MaxInstances			5
+
+# Set the user and group under which the server will run.
+User				nobody
+Group				nogroup
+
+# To cause every FTP user to be "jailed" (chrooted) into their home
+# directory, uncomment this line.
+#DefaultRoot ~
+
+# Normally, we want files to be overwriteable.
+AllowOverwrite		on
+
+# Deny use of SITE CHMOD, uncomment the three lines below.
+#<Limit SITE_CHMOD>
+#  DenyAll
+#</Limit>
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/protocols b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/protocols
new file mode 100644
index 000000000..1521f3980
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/protocols
@@ -0,0 +1,149 @@
+# /etc/protocols:
+# $Id: protocols,v 1.3 2001/07/07 07:07:15 nalin Exp $
+#
+# Internet (IP) protocols
+#
+#	from: @(#)protocols	5.1 (Berkeley) 4/17/89
+#
+# Updated for NetBSD based on RFC 1340, Assigned Numbers (July 1992).
+#
+# See also http://www.iana.org/assignments/protocol-numbers
+
+ip	0	IP		# internet protocol, pseudo protocol number
+#hopopt	0	HOPOPT		# hop-by-hop options for ipv6
+icmp	1	ICMP		# internet control message protocol
+igmp	2	IGMP		# internet group management protocol
+ggp	3	GGP		# gateway-gateway protocol
+ipencap	4	IP-ENCAP	# IP encapsulated in IP (officially ``IP'')
+st	5	ST		# ST datagram mode
+tcp	6	TCP		# transmission control protocol
+cbt	7	CBT		# CBT, Tony Ballardie <A.Ballardie@cs.ucl.ac.uk>
+egp	8	EGP		# exterior gateway protocol
+igp	9	IGP		# any private interior gateway (Cisco: for IGRP)
+bbn-rcc	10	BBN-RCC-MON	# BBN RCC Monitoring
+nvp	11	NVP-II		# Network Voice Protocol
+pup	12	PUP		# PARC universal packet protocol
+argus	13	ARGUS		# ARGUS
+emcon	14	EMCON		# EMCON
+xnet	15	XNET		# Cross Net Debugger
+chaos	16	CHAOS		# Chaos
+udp	17	UDP		# user datagram protocol
+mux	18	MUX		# Multiplexing protocol
+dcn	19	DCN-MEAS	# DCN Measurement Subsystems
+hmp	20	HMP		# host monitoring protocol
+prm	21	PRM		# packet radio measurement protocol
+xns-idp	22	XNS-IDP		# Xerox NS IDP
+trunk-1	23	TRUNK-1		# Trunk-1
+trunk-2	24	TRUNK-2		# Trunk-2
+leaf-1	25	LEAF-1		# Leaf-1
+leaf-2	26	LEAF-2		# Leaf-2
+rdp	27	RDP		# "reliable datagram" protocol
+irtp	28	IRTP		# Internet Reliable Transaction Protocol
+iso-tp4	29	ISO-TP4		# ISO Transport Protocol Class 4
+netblt	30	NETBLT		# Bulk Data Transfer Protocol
+mfe-nsp	31	MFE-NSP		# MFE Network Services Protocol
+merit-inp	32	MERIT-INP	# MERIT Internodal Protocol
+sep	33	SEP		# Sequential Exchange Protocol
+3pc	34	3PC		# Third Party Connect Protocol
+idpr	35	IDPR		# Inter-Domain Policy Routing Protocol
+xtp	36	XTP		# Xpress Tranfer Protocol
+ddp	37	DDP		# Datagram Delivery Protocol
+idpr-cmtp	38	IDPR-CMTP	# IDPR Control Message Transport Proto
+tp++	39	TP++		# TP++ Transport Protocol
+il	40	IL		# IL Transport Protocol
+ipv6	41	IPv6		# IPv6
+sdrp	42	SDRP		# Source Demand Routing Protocol
+ipv6-route	43	IPv6-Route 	# Routing Header for IPv6
+ipv6-frag	44	IPv6-Frag	# Fragment Header for IPv6
+idrp	45	IDRP		# Inter-Domain Routing Protocol
+rsvp	46	RSVP		# Resource ReSerVation Protocol
+gre	47	GRE		# Generic Routing Encapsulation
+mhrp	48	MHRP		# Mobile Host Routing Protocol
+bna	49	BNA		# BNA
+ipv6-crypt	50	IPv6-Crypt	# Encryption Header for IPv6
+ipv6-auth	51	IPv6-Auth	# Authentication Header for IPv6
+i-nlsp	52	I-NLSP		# Integrated Net Layer Security TUBA
+swipe	53	SWIPE		# IP with Encryption
+narp	54	NARP		# NBMA Address Resolution Protocol
+mobile	55	MOBILE		# IP Mobility
+tlsp	56	TLSP		# Transport Layer Security Protocol
+skip	57	SKIP		# SKIP
+ipv6-icmp	58	IPv6-ICMP	# ICMP for IPv6
+ipv6-nonxt	59	IPv6-NoNxt	# No Next Header for IPv6
+ipv6-opts	60	IPv6-Opts	# Destination Options for IPv6
+#	61			# any host internal protocol
+cftp	62	CFTP		# CFTP
+#	63			# any local network
+sat-expak	64	SAT-EXPAK	# SATNET and Backroom EXPAK
+kryptolan	65	KRYPTOLAN	# Kryptolan
+rvd	66	RVD		# MIT Remote Virtual Disk Protocol
+ippc	67	IPPC		# Internet Pluribus Packet Core
+#	68			# any distributed file system
+sat-mon	69	SAT-MON		# SATNET Monitoring
+visa	70	VISA		# VISA Protocol
+ipcv	71	IPCV		# Internet Packet Core Utility
+cpnx	72	CPNX		# Computer Protocol Network Executive
+cphb	73	CPHB		# Computer Protocol Heart Beat
+wsn	74	WSN		# Wang Span Network
+pvp	75	PVP		# Packet Video Protocol
+br-sat-mon	76	BR-SAT-MON	# Backroom SATNET Monitoring
+sun-nd	77	SUN-ND		# SUN ND PROTOCOL-Temporary
+wb-mon	78	WB-MON		# WIDEBAND Monitoring
+wb-expak	79	WB-EXPAK	# WIDEBAND EXPAK
+iso-ip	80	ISO-IP		# ISO Internet Protocol
+vmtp	81	VMTP		# Versatile Message Transport
+secure-vmtp	82	SECURE-VMTP	# SECURE-VMTP
+vines	83	VINES		# VINES
+ttp	84	TTP		# TTP
+nsfnet-igp	85	NSFNET-IGP	# NSFNET-IGP
+dgp	86	DGP		# Dissimilar Gateway Protocol
+tcf	87	TCF		# TCF
+eigrp	88	EIGRP		# Enhanced Interior Routing Protocol (Cisco)
+ospf	89	OSPFIGP		# Open Shortest Path First IGP
+sprite-rpc	90	Sprite-RPC	# Sprite RPC Protocol
+larp	91	LARP		# Locus Address Resolution Protocol
+mtp	92	MTP		# Multicast Transport Protocol
+ax.25	93	AX.25		# AX.25 Frames
+ipip	94	IPIP		# Yet Another IP encapsulation
+micp	95	MICP		# Mobile Internetworking Control Pro.
+scc-sp	96	SCC-SP		# Semaphore Communications Sec. Pro.
+etherip	97	ETHERIP		# Ethernet-within-IP Encapsulation
+encap	98	ENCAP		# Yet Another IP encapsulation
+#	99			# any private encryption scheme
+gmtp	100	GMTP		# GMTP
+ifmp	101	IFMP		# Ipsilon Flow Management Protocol
+pnni	102	PNNI		# PNNI over IP
+pim	103	PIM		# Protocol Independent Multicast
+aris	104	ARIS		# ARIS
+scps	105	SCPS		# SCPS
+qnx	106	QNX		# QNX
+a/n	107	A/N		# Active Networks
+ipcomp	108	IPComp		# IP Payload Compression Protocol
+snp	109	SNP		# Sitara Networks Protocol
+compaq-peer	110	Compaq-Peer	# Compaq Peer Protocol
+ipx-in-ip	111	IPX-in-IP	# IPX in IP
+vrrp	112	VRRP		# Virtual Router Redundancy Protocol
+pgm	113	PGM		# PGM Reliable Transport Protocol
+#	114			# any 0-hop protocol
+l2tp	115	L2TP		# Layer Two Tunneling Protocol
+ddx	116	DDX		# D-II Data Exchange
+iatp	117	IATP		# Interactive Agent Transfer Protocol
+stp	118	STP		# Schedule Transfer
+srp	119	SRP		# SpectraLink Radio Protocol
+uti	120	UTI		# UTI
+smp	121	SMP		# Simple Message Protocol
+sm	122	SM		# SM
+ptp	123	PTP		# Performance Transparency Protocol
+isis	124	ISIS		# ISIS over IPv4
+fire	125	FIRE
+crtp	126	CRTP		# Combat Radio Transport Protocol
+crdup	127	CRUDP		# Combat Radio User Datagram
+sscopmce	128	SSCOPMCE
+iplt	129	IPLT
+sps	130	SPS		# Secure Packet Shield
+pipe	131	PIPE		# Private IP Encapsulation within IP
+sctp	132	SCTP		# Stream Control Transmission Protocol
+fc	133	FC		# Fibre Channel
+# rsvp-e2e-ignore	134	RSVP-E2E-IGNORE
+#	134-254			# Unassigned
+#	255			# Reserved
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/resolv.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/resolv.conf
new file mode 120000
index 000000000..71f6f9657
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/resolv.conf
@@ -0,0 +1 @@
+../tmp/resolv.conf
\ No newline at end of file
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/samba/smb.conf b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/samba/smb.conf
new file mode 100644
index 000000000..13e46e85d
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/samba/smb.conf
@@ -0,0 +1,287 @@
+# This is the main Samba configuration file. You should read the
+# smb.conf(5) manual page in order to understand the options listed
+# here. Samba has a huge number of configurable options (perhaps too
+# many!) most of which are not shown in this example
+#
+# For a step to step guide on installing, configuring and using samba,
+# read the Samba-HOWTO-Collection. This may be obtained from:
+#  http://www.samba.org/samba/docs/Samba-HOWTO-Collection.pdf
+#
+# Many working examples of smb.conf files can be found in the
+# Samba-Guide which is generated daily and can be downloaded from:
+#  http://www.samba.org/samba/docs/Samba-Guide.pdf
+#
+# Any line which starts with a ; (semi-colon) or a # (hash)
+# is a comment and is ignored. In this example we will use a #
+# for commentry and a ; for parts of the config file that you
+# may wish to enable
+#
+# NOTE: Whenever you modify this file you should run the command "testparm"
+# to check that you have not made any basic syntactic errors.
+#
+#======================= Global Settings =====================================
+[global]
+
+# workgroup = NT-Domain-Name or Workgroup-Name, eg: MIDEARTH
+   workgroup = AVR32
+
+# Network name
+   netbios name = ngw100
+
+# server string is the equivalent of the NT Description field
+   server string = AVR32 NGW100 development kit
+
+# Security mode. Defines in which mode Samba will operate. Possible
+# values are share, user, server, domain and ads. Most people will want
+# user level security. See the Samba-HOWTO-Collection for details.
+   security = user
+
+# This option is important for security. It allows you to restrict
+# connections to machines which are on your local network. The
+# following example restricts access to two C class networks and
+# the "loopback" interface. For more examples of the syntax see
+# the smb.conf man page
+   hosts allow = 10.0.0. 127.
+
+# If you want to automatically load your printer list rather
+# than setting them up individually then you'll need this
+   load printers = no
+
+# you may wish to override the location of the printcap file
+;   printcap name = /etc/printcap
+
+# on SystemV system setting printcap name to lpstat should allow
+# you to automatically obtain a printer list from the SystemV spool
+# system
+;   printcap name = lpstat
+
+# It should not be necessary to specify the print system type unless
+# it is non-standard. Currently supported print systems include:
+# bsd, cups, sysv, plp, lprng, aix, hpux, qnx
+;   printing = cups
+
+# Uncomment this if you want a guest account, you must add this to /etc/passwd
+# otherwise the user "nobody" is used
+;  guest account = pcguest
+
+# this tells Samba to use a separate log file for each machine
+# that connects
+   log file = /var/log/samba/log.%m
+   debug level = 1
+   syslog = 0
+
+# Put a capping on the size of the log files (in Kb).
+   max log size = 1000
+
+# Use password server option only with security = server
+# The argument list may include:
+#   password server = My_PDC_Name [My_BDC_Name] [My_Next_BDC_Name]
+# or to auto-locate the domain controller/s
+#   password server = *
+;   password server = <NT-Server-Name>
+
+# Use the realm option only with security = ads
+# Specifies the Active Directory realm the host is part of
+;   realm = MY_REALM
+
+# Backend to store user information in. New installations should
+# use either tdbsam or ldapsam. smbpasswd is available for backwards
+# compatibility. tdbsam requires no further configuration.
+   passdb backend = smbpasswd:/etc/samba/smbpasswd
+
+# Using the following line enables you to customise your configuration
+# on a per machine basis. The %m gets replaced with the netbios name
+# of the machine that is connecting.
+# Note: Consider carefully the location in the configuration file of
+#       this line.  The included file is read at that point.
+;   include = /usr/local/samba/lib/smb.conf.%m
+
+# Configure Samba to use multiple interfaces
+# If you have multiple network interfaces then you must list them
+# here. See the man page for details.
+   interfaces = lo eth1
+
+   socket options = TCP_NODELAY SO_RCVBUF=8192 SO_SNDBUF=8192
+
+# Browser Control Options:
+# set local master to no if you don't want Samba to become a master
+# browser on your network. Otherwise the normal election rules apply
+   local master = yes
+
+# OS Level determines the precedence of this server in master browser
+# elections. The default value should be reasonable
+   os level = 254
+
+# Domain Master specifies Samba to be the Domain Master Browser. This
+# allows Samba to collate browse lists between subnets. Don't use this
+# if you already have a Windows NT domain controller doing this job
+   domain master = yes
+
+# Preferred Master causes Samba to force a local browser election on startup
+# and gives it a slightly higher chance of winning the election
+   preferred master = yes
+
+# Enable this if you want Samba to be a domain logon server for
+# Windows95 workstations.
+;   domain logons = yes
+
+# if you enable domain logons then you may want a per-machine or
+# per user logon script
+# run a specific logon batch file per workstation (machine)
+;   logon script = %m.bat
+# run a specific logon batch file per username
+;   logon script = %U.bat
+
+# Where to store roving profiles (only for Win95 and WinNT)
+#        %L substitutes for this servers netbios name, %U is username
+#        You must uncomment the [Profiles] share below
+;   logon path = \\%L\Profiles\%U
+
+# Windows Internet Name Serving Support Section:
+# WINS Support - Tells the NMBD component of Samba to enable it's WINS Server
+;   wins support = yes
+
+# WINS Server - Tells the NMBD components of Samba to be a WINS Client
+#	Note: Samba can be either a WINS Server, or a WINS Client, but NOT both
+;   wins server = w.x.y.z
+
+# WINS Proxy - Tells Samba to answer name resolution queries on
+# behalf of a non WINS capable client, for this to work there must be
+# at least one	WINS Server on the network. The default is NO.
+;   wins proxy = yes
+
+# DNS Proxy - tells Samba whether or not to try to resolve NetBIOS names
+# via DNS nslookups. The default is NO.
+   dns proxy = no
+
+# These scripts are used on a domain controller or stand-alone
+# machine to add or delete corresponding unix accounts
+;  add user script = /usr/sbin/useradd %u
+;  add group script = /usr/sbin/groupadd %g
+;  add machine script = /usr/sbin/adduser -n -g machines -c Machine -d /dev/null -s /bin/false %u
+;  delete user script = /usr/sbin/userdel %u
+;  delete user from group script = /usr/sbin/deluser %u %g
+;  delete group script = /usr/sbin/groupdel %g
+
+# Unix charset on the filesystem
+   unix charset = iso8859-1
+
+# Code page for the client
+#   client code page = 850
+
+#============================ Share Definitions ==============================
+[homes]
+   comment = Home Directories
+   browseable = no
+   writable = yes
+
+[netdisk]
+   comment = Network share on STK1000
+   path = /media
+   read only = no
+   public = yes
+
+# Un-comment the following and create the netlogon directory for Domain Logons
+; [netlogon]
+;   comment = Network Logon Service
+;   path = /usr/local/samba/lib/netlogon
+;   guest ok = yes
+;   writable = no
+;   share modes = no
+
+
+# Un-comment the following to provide a specific roving profile share
+# the default is to use the user's home directory
+;[Profiles]
+;    path = /usr/local/samba/profiles
+;    browseable = no
+;    guest ok = yes
+
+
+# NOTE: If you have a BSD-style print system there is no need to
+# specifically define each individual printer
+;[printers]
+;   comment = All Printers
+;   path = /usr/spool/samba
+;   browseable = no
+# Set public = yes to allow user 'guest account' to print
+;   guest ok = no
+;   writable = no
+;   printable = yes
+
+# This one is useful for people to share files
+;[tmp]
+;   comment = Temporary file space
+;   path = /tmp
+;   read only = no
+;   public = yes
+
+# A publicly accessible directory, but read only, except for people in
+# the "staff" group
+;[public]
+;   comment = Public Stuff
+;   path = /home/samba
+;   public = yes
+;   writable = yes
+;   printable = no
+;   write list = @staff
+
+# Other examples.
+#
+# A private printer, usable only by fred. Spool data will be placed in fred's
+# home directory. Note that fred must have write access to the spool directory,
+# wherever it is.
+;[fredsprn]
+;   comment = Fred's Printer
+;   valid users = fred
+;   path = /homes/fred
+;   printer = freds_printer
+;   public = no
+;   writable = no
+;   printable = yes
+
+# A private directory, usable only by fred. Note that fred requires write
+# access to the directory.
+;[fredsdir]
+;   comment = Fred's Service
+;   path = /usr/somewhere/private
+;   valid users = fred
+;   public = no
+;   writable = yes
+;   printable = no
+
+# a service which has a different directory for each machine that connects
+# this allows you to tailor configurations to incoming machines. You could
+# also use the %U option to tailor it by user name.
+# The %m gets replaced with the machine name that is connecting.
+;[pchome]
+;  comment = PC Directories
+;  path = /usr/pc/%m
+;  public = no
+;  writable = yes
+
+# A publicly accessible directory, read/write to all users. Note that all files
+# created in the directory by users will be owned by the default user, so
+# any user with access can delete any other user's files. Obviously this
+# directory must be writable by the default user. Another user could of course
+# be specified, in which case all files would be owned by that user instead.
+;[public]
+;   path = /usr/somewhere/else/public
+;   public = yes
+;   only guest = yes
+;   writable = yes
+;   printable = no
+
+# The following two entries demonstrate how to share a directory so that two
+# users can place files there that will be owned by the specific users. In this
+# setup, the directory should be writable by both users and should have the
+# sticky bit set on it to prevent abuse. Obviously this could be extended to
+# as many users as required.
+;[myshare]
+;   comment = Mary's and Fred's stuff
+;   path = /usr/somewhere/shared
+;   valid users = mary fred
+;   public = no
+;   writable = yes
+;   printable = no
+;   create mask = 0765
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/samba/smbpasswd b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/samba/smbpasswd
new file mode 100644
index 000000000..a3fe520d5
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/samba/smbpasswd
@@ -0,0 +1 @@
+root:0:172DC9BBE870E1B6AAD3B435B51404EE:090A846DE05FDBC2D90864D49620FD7C:[U          ]:LCT-4561C217:
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/services b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/services
new file mode 100644
index 000000000..e2ffd3df5
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/services
@@ -0,0 +1,2117 @@
+#
+# Network services, Internet style
+#
+# Note that it is presently the policy of IANA to assign a single well-known
+# port number for both TCP and UDP; hence, most entries here have two entries
+# even if the protocol doesn't support UDP operations.
+#
+# The latest IANA port assignments can be gotten from
+#
+#	http://www.iana.org/assignments/port-numbers
+#
+# The Well Known Ports are those from 0 through 1023.
+# The Registered Ports are those from 1024 through 49151
+# The Dynamic and/or Private Ports are those from 49152 through 65535
+#
+# Kerberos services are for Kerberos v4, and are unofficial.  Sites running
+# v5 should uncomment v5 entries and comment v4 entries.
+#
+# $FreeBSD: src/etc/services,v 1.102.8.1 2006/01/29 11:32:48 maxim Exp $
+#	From: @(#)services	5.8 (Berkeley) 5/9/91
+#
+# WELL KNOWN PORT NUMBERS
+#
+rtmp		  1/ddp	   #Routing Table Maintenance Protocol
+tcpmux		  1/tcp	   #TCP Port Service Multiplexer
+tcpmux		  1/udp	   #TCP Port Service Multiplexer
+nbp		  2/ddp	   #Name Binding Protocol
+compressnet	  2/tcp	   #Management Utility
+compressnet	  2/udp	   #Management Utility
+compressnet	  3/tcp	   #Compression Process
+compressnet	  3/udp	   #Compression Process
+echo		  4/ddp	   #AppleTalk Echo Protocol
+rje		  5/tcp	   #Remote Job Entry
+rje		  5/udp	   #Remote Job Entry
+zip		  6/ddp	   #Zone Information Protocol
+echo		  7/tcp
+echo		  7/udp
+discard		  9/tcp	   sink null
+discard		  9/udp	   sink null
+systat		 11/tcp	   users	#Active Users
+systat		 11/udp	   users	#Active Users
+daytime		 13/tcp
+daytime		 13/udp
+qotd		 17/tcp	   quote	#Quote of the Day
+qotd		 17/udp	   quote	#Quote of the Day
+msp		 18/tcp	   #Message Send Protocol
+msp		 18/udp	   #Message Send Protocol
+chargen		 19/tcp	   ttytst source	#Character Generator
+chargen		 19/udp	   ttytst source	#Character Generator
+ftp-data	 20/tcp	   #File Transfer [Default Data]
+ftp-data	 20/udp	   #File Transfer [Default Data]
+ftp		 21/tcp	   #File Transfer [Control]
+ftp		 21/udp	   #File Transfer [Control]
+ssh		 22/tcp	   #Secure Shell Login
+ssh		 22/udp	   #Secure Shell Login
+telnet		 23/tcp
+telnet		 23/udp
+#		 24/tcp	   any private mail system
+#		 24/udp	   any private mail system
+smtp		 25/tcp	   mail		#Simple Mail Transfer
+smtp		 25/udp	   mail		#Simple Mail Transfer
+nsw-fe		 27/tcp	   #NSW User System FE
+nsw-fe		 27/udp	   #NSW User System FE
+msg-icp		 29/tcp	   #MSG ICP
+msg-icp		 29/udp	   #MSG ICP
+msg-auth	 31/tcp	   #MSG Authentication
+msg-auth	 31/udp	   #MSG Authentication
+dsp		 33/tcp	   #Display Support Protocol
+dsp		 33/udp	   #Display Support Protocol
+#		 35/tcp	   any private printer server
+#		 35/udp	   any private printer server
+time		 37/tcp	   timserver
+time		 37/udp	   timserver
+rap		 38/tcp	   #Route Access Protocol
+rap		 38/udp	   #Route Access Protocol
+rlp		 39/tcp	   resource	#Resource Location Protocol
+rlp		 39/udp	   resource	#Resource Location Protocol
+graphics	 41/tcp
+graphics	 41/udp
+nameserver	 42/tcp	   name		#Host Name Server
+nameserver	 42/udp	   name		#Host Name Server
+nicname		 43/tcp	   whois
+nicname		 43/udp	   whois
+mpm-flags	 44/tcp	   #MPM FLAGS Protocol
+mpm-flags	 44/udp	   #MPM FLAGS Protocol
+mpm		 45/tcp	   #Message Processing Module [recv]
+mpm		 45/udp	   #Message Processing Module [recv]
+mpm-snd		 46/tcp	   #MPM [default send]
+mpm-snd		 46/udp	   #MPM [default send]
+ni-ftp		 47/tcp	   #NI FTP
+ni-ftp		 47/udp	   #NI FTP
+auditd		 48/tcp	   #Digital Audit Daemon
+auditd		 48/udp	   #Digital Audit Daemon
+tacacs		 49/tcp	   #Login Host Protocol (TACACS)
+tacacs		 49/udp	   #Login Host Protocol (TACACS)
+re-mail-ck	 50/tcp	   #Remote Mail Checking Protocol
+re-mail-ck	 50/udp	   #Remote Mail Checking Protocol
+la-maint	 51/tcp	   #IMP Logical Address Maintenance
+la-maint	 51/udp	   #IMP Logical Address Maintenance
+xns-time	 52/tcp	   #XNS Time Protocol
+xns-time	 52/udp	   #XNS Time Protocol
+domain		 53/tcp	   #Domain Name Server
+domain		 53/udp	   #Domain Name Server
+xns-ch		 54/tcp	   #XNS Clearinghouse
+xns-ch		 54/udp	   #XNS Clearinghouse
+isi-gl		 55/tcp	   #ISI Graphics Language
+isi-gl		 55/udp	   #ISI Graphics Language
+xns-auth	 56/tcp	   #XNS Authentication
+xns-auth	 56/udp	   #XNS Authentication
+mtp		 57/tcp	   # deprecated
+#PROBLEMS!==============================================================
+#		 57/tcp	   any private terminal access
+#PROBLEMS!==============================================================
+#		 57/udp	   any private terminal access
+xns-mail	 58/tcp	   #XNS Mail
+xns-mail	 58/udp	   #XNS Mail
+#		 59/tcp	   any private file service
+#		 59/udp	   any private file service
+ni-mail		 61/tcp	   #NI MAIL
+ni-mail		 61/udp	   #NI MAIL
+acas		 62/tcp	   #ACA Services
+acas		 62/udp	   #ACA Services
+whois++		 63/tcp
+whois++		 63/udp
+covia		 64/tcp	   #Communications Integrator (CI)
+covia		 64/udp	   #Communications Integrator (CI)
+tacacs-ds	 65/tcp	   #TACACS-Database Service
+tacacs-ds	 65/udp	   #TACACS-Database Service
+sql*net		 66/tcp	   #Oracle SQL*NET
+sql*net		 66/udp	   #Oracle SQL*NET
+bootps		 67/tcp	   dhcps	#Bootstrap Protocol Server
+bootps		 67/udp	   dhcps	#Bootstrap Protocol Server
+bootpc		 68/tcp	   dhcpc	#Bootstrap Protocol Client
+bootpc		 68/udp	   dhcpc	#Bootstrap Protocol Client
+tftp		 69/tcp	   #Trivial File Transfer
+tftp		 69/udp	   #Trivial File Transfer
+gopher		 70/tcp
+gopher		 70/udp
+netrjs-1	 71/tcp	   #Remote Job Service
+netrjs-1	 71/udp	   #Remote Job Service
+netrjs-2	 72/tcp	   #Remote Job Service
+netrjs-2	 72/udp	   #Remote Job Service
+netrjs-3	 73/tcp	   #Remote Job Service
+netrjs-3	 73/udp	   #Remote Job Service
+netrjs-4	 74/tcp	   #Remote Job Service
+netrjs-4	 74/udp	   #Remote Job Service
+#		 75/tcp	   any private dial out service
+#		 75/udp	   any private dial out service
+deos		 76/tcp	   #Distributed External Object Store
+deos		 76/udp	   #Distributed External Object Store
+netrjs		 77/tcp
+#PROBLEMS!==============================================================
+#		 77/tcp	   any private RJE service
+#PROBLEMS!==============================================================
+#		 77/udp	   any private RJE service
+vettcp		 78/tcp
+vettcp		 78/udp
+finger		 79/tcp
+finger		 79/udp
+http		 80/tcp	   www www-http	#World Wide Web HTTP
+http		 80/udp	   www www-http	#World Wide Web HTTP
+hosts2-ns	 81/tcp	   #HOSTS2 Name Server
+hosts2-ns	 81/udp	   #HOSTS2 Name Server
+xfer		 82/tcp	   #XFER Utility
+xfer		 82/udp	   #XFER Utility
+mit-ml-dev	 83/tcp	   #MIT ML Device
+mit-ml-dev	 83/udp	   #MIT ML Device
+ctf		 84/tcp	   #Common Trace Facility
+ctf		 84/udp	   #Common Trace Facility
+mit-ml-dev	 85/tcp	   #MIT ML Device
+mit-ml-dev	 85/udp	   #MIT ML Device
+mfcobol		 86/tcp	   #Micro Focus Cobol
+mfcobol		 86/udp	   #Micro Focus Cobol
+ttylink		 87/tcp
+#PROBLEMS!===========================================================
+#		 87/tcp	   any private terminal link
+#PROBLEMS!===========================================================
+#		 87/udp	   any private terminal link
+kerberos-sec	 88/tcp	   kerberos	# krb5	# Kerberos (v5)
+kerberos-sec	 88/udp	   kerberos	# krb5	# Kerberos (v5)
+su-mit-tg	 89/tcp	   #SU/MIT Telnet Gateway
+su-mit-tg	 89/udp	   #SU/MIT Telnet Gateway
+dnsix		 90/tcp	   #DNSIX Securit Attribute Token Map
+dnsix		 90/udp	   #DNSIX Securit Attribute Token Map
+mit-dov		 91/tcp	   #MIT Dover Spooler
+mit-dov		 91/udp	   #MIT Dover Spooler
+npp		 92/tcp	   #Network Printing Protocol
+npp		 92/udp	   #Network Printing Protocol
+dcp		 93/tcp	   #Device Control Protocol
+dcp		 93/udp	   #Device Control Protocol
+objcall		 94/tcp	   #Tivoli Object Dispatcher
+objcall		 94/udp	   #Tivoli Object Dispatcher
+supdup		 95/tcp
+supdup		 95/udp
+dixie		 96/tcp	   #DIXIE Protocol Specification
+dixie		 96/udp	   #DIXIE Protocol Specification
+swift-rvf	 97/tcp	   #Swift Remote Virtural File Protocol
+swift-rvf	 97/udp	   #Swift Remote Virtural File Protocol
+tacnews		 98/tcp	   #TAC News, Unofficial: Red Hat linuxconf
+tacnews		 98/udp	   #TAC News, Unofficial: Red Hat linuxconf
+metagram	 99/tcp	   #Metagram Relay
+metagram	 99/udp	   #Metagram Relay
+newacct		100/tcp	   #[unauthorized use]
+hostname	101/tcp	   hostnames	#NIC Host Name Server
+hostname	101/udp	   hostnames	#NIC Host Name Server
+iso-tsap	102/tcp	   tsap		#ISO-TSAP Class 0
+iso-tsap	102/udp	   tsap		#ISO-TSAP Class 0
+gppitnp		103/tcp	   #Genesis Point-to-Point Trans Net
+gppitnp		103/udp	   #Genesis Point-to-Point Trans Net
+acr-nema	104/tcp	   #ACR-NEMA Digital Imag. & Comm. 300
+acr-nema	104/udp	   #ACR-NEMA Digital Imag. & Comm. 300
+csnet-ns	105/tcp	   cso-ns cso	#Mailbox Name Nameserver
+csnet-ns	105/udp	   cso-ns cso	#Mailbox Name Nameserver
+pop3pw		106/tcp	   3com-tsmux	#Eudora compatible PW changer
+3com-tsmux	106/udp
+rtelnet		107/tcp	   #Remote Telnet Service
+rtelnet		107/udp	   #Remote Telnet Service
+snagas		108/tcp	   #SNA Gateway Access Server
+snagas		108/udp	   #SNA Gateway Access Server
+pop2		109/tcp	   postoffice	#Post Office Protocol - Version 2
+pop2		109/udp	   postoffice	#Post Office Protocol - Version 2
+pop3		110/tcp	   #Post Office Protocol - Version 3
+pop3		110/udp	   #Post Office Protocol - Version 3
+sunrpc		111/tcp	   rpcbind	#SUN Remote Procedure Call
+sunrpc		111/udp	   rpcbind	#SUN Remote Procedure Call
+mcidas		112/tcp	   #McIDAS Data Transmission Protocol
+mcidas		112/udp	   #McIDAS Data Transmission Protocol
+auth		113/tcp	   ident tap	#Authentication Service
+auth		113/udp	   ident tap	#Authentication Service
+audionews	114/tcp	   #Audio News Multicast
+audionews	114/udp	   #Audio News Multicast
+sftp		115/tcp	   #Simple File Transfer Protocol
+sftp		115/udp	   #Simple File Transfer Protocol
+ansanotify	116/tcp	   #ANSA REX Notify
+ansanotify	116/udp	   #ANSA REX Notify
+uucp-path	117/tcp	   #UUCP Path Service
+uucp-path	117/udp	   #UUCP Path Service
+sqlserv		118/tcp	   #SQL Services
+sqlserv		118/udp	   #SQL Services
+nntp		119/tcp	   usenet	#Network News Transfer Protocol
+nntp		119/udp	   usenet	#Network News Transfer Protocol
+cfdptkt		120/tcp
+cfdptkt		120/udp
+erpc		121/tcp	   #Encore Expedited Remote Pro.Call
+erpc		121/udp	   #Encore Expedited Remote Pro.Call
+smakynet	122/tcp
+smakynet	122/udp
+ntp		123/tcp	   #Network Time Protocol
+ntp		123/udp	   #Network Time Protocol
+ansatrader	124/tcp	   #ANSA REX Trader
+ansatrader	124/udp	   #ANSA REX Trader
+locus-map	125/tcp	   #Locus PC-Interface Net Map Ser
+locus-map	125/udp	   #Locus PC-Interface Net Map Ser
+unitary		126/tcp	   #Unisys Unitary Login
+unitary		126/udp	   #Unisys Unitary Login
+locus-con	127/tcp	   #Locus PC-Interface Conn Server
+locus-con	127/udp	   #Locus PC-Interface Conn Server
+gss-xlicen	128/tcp	   #GSS X License Verification
+gss-xlicen	128/udp	   #GSS X License Verification
+pwdgen		129/tcp	   #Password Generator Protocol
+pwdgen		129/udp	   #Password Generator Protocol
+cisco-fna	130/tcp	   #cisco FNATIVE
+cisco-fna	130/udp	   #cisco FNATIVE
+cisco-tna	131/tcp	   #cisco TNATIVE
+cisco-tna	131/udp	   #cisco TNATIVE
+cisco-sys	132/tcp	   #cisco SYSMAINT
+cisco-sys	132/udp	   #cisco SYSMAINT
+statsrv		133/tcp	   #Statistics Service
+statsrv		133/udp	   #Statistics Service
+ingres-net	134/tcp	   #INGRES-NET Service
+ingres-net	134/udp	   #INGRES-NET Service
+loc-srv		135/tcp	   epmap	#Location Service
+loc-srv		135/udp	   epmap	#Location Service
+profile		136/tcp	   #PROFILE Naming System
+profile		136/udp	   #PROFILE Naming System
+netbios-ns	137/tcp	   #NETBIOS Name Service
+netbios-ns	137/udp	   #NETBIOS Name Service
+netbios-dgm	138/tcp	   #NETBIOS Datagram Service
+netbios-dgm	138/udp	   #NETBIOS Datagram Service
+netbios-ssn	139/tcp	   #NETBIOS Session Service
+netbios-ssn	139/udp	   #NETBIOS Session Service
+emfis-data	140/tcp	   #EMFIS Data Service
+emfis-data	140/udp	   #EMFIS Data Service
+emfis-cntl	141/tcp	   #EMFIS Control Service
+emfis-cntl	141/udp	   #EMFIS Control Service
+bl-idm		142/tcp	   #Britton-Lee IDM
+bl-idm		142/udp	   #Britton-Lee IDM
+imap		143/tcp	   imap2 imap4	#Interim Mail Access Protocol v2
+imap		143/udp	   imap2 imap4	#Interim Mail Access Protocol v2
+NeWS		144/tcp	   # Window System
+NeWS		144/udp	   # Window System
+#PROBLEMS!==============================================================
+#uma		144/tcp	   #Universal Management Architecture
+#uma		144/udp	   #Universal Management Architecture
+#PROBLEMS!==============================================================
+uaac		145/tcp	   #UAAC Protocol
+uaac		145/udp	   #UAAC Protocol
+iso-tp0		146/tcp
+iso-tp0		146/udp
+iso-ip		147/tcp
+iso-ip		147/udp
+cronus		148/tcp	   jargon	#CRONUS-SUPPORT
+cronus		148/udp	   jargon	#CRONUS-SUPPORT
+aed-512		149/tcp	   #AED 512 Emulation Service
+aed-512		149/udp	   #AED 512 Emulation Service
+sql-net		150/tcp
+sql-net		150/udp
+hems		151/tcp
+hems		151/udp
+bftp		152/tcp	   #Background File Transfer Program
+bftp		152/udp	   #Background File Transfer Program
+sgmp		153/tcp
+sgmp		153/udp
+netsc-prod	154/tcp
+netsc-prod	154/udp
+netsc-dev	155/tcp
+netsc-dev	155/udp
+sqlsrv		156/tcp	   #SQL Service
+sqlsrv		156/udp	   #SQL Service
+knet-cmp	157/tcp	   #KNET/VM Command/Message Protocol
+knet-cmp	157/udp	   #KNET/VM Command/Message Protocol
+pcmail-srv	158/tcp	   #PCMail Server
+pcmail-srv	158/udp	   #PCMail Server
+nss-routing	159/tcp
+nss-routing	159/udp
+sgmp-traps	160/tcp
+sgmp-traps	160/udp
+snmp		161/tcp
+snmp		161/udp
+snmptrap	162/tcp	   snmp-trap
+snmptrap	162/udp	   snmp-trap
+cmip-man	163/tcp	   #CMIP/TCP Manager
+cmip-man	163/udp	   #CMIP/TCP Manager
+cmip-agent	164/tcp	   #CMIP/TCP Agent
+smip-agent	164/udp	   #CMIP/TCP Agent
+xns-courier	165/tcp	   #Xerox
+xns-courier	165/udp	   #Xerox
+s-net		166/tcp	   #Sirius Systems
+s-net		166/udp	   #Sirius Systems
+namp		167/tcp
+namp		167/udp
+rsvd		168/tcp
+rsvd		168/udp
+send		169/tcp
+send		169/udp
+print-srv	170/tcp	   #Network PostScript
+print-srv	170/udp	   #Network PostScript
+multiplex	171/tcp	   #Network Innovations Multiplex
+multiplex	171/udp	   #Network Innovations Multiplex
+cl/1		172/tcp	   #Network Innovations CL/1
+cl/1		172/udp	   #Network Innovations CL/1
+xyplex-mux	173/tcp
+xyplex-mux	173/udp
+mailq		174/tcp
+mailq		174/udp
+vmnet		175/tcp
+vmnet		175/udp
+genrad-mux	176/tcp
+genrad-mux	176/udp
+xdmcp		177/tcp	   #X Display Manager Control Protocol
+xdmcp		177/udp	   #X Display Manager Control Protocol
+NextStep	178/tcp	   nextstep NeXTStep	#NextStep Window Server
+NextStep	178/udp	   nextstep NeXTStep	#NextStep Window Server
+bgp		179/tcp	   #Border Gateway Protocol
+bgp		179/udp	   #Border Gateway Protocol
+ris		180/tcp	   #Intergraph
+ris		180/udp	   #Intergraph
+unify		181/tcp
+unify		181/udp
+audit		182/tcp	   #Unisys Audit SITP
+audit		182/udp	   #Unisys Audit SITP
+ocbinder	183/tcp
+ocbinder	183/udp
+ocserver	184/tcp
+ocserver	184/udp
+remote-kis	185/tcp
+remote-kis	185/udp
+kis		186/tcp	   #KIS Protocol
+kis		186/udp	   #KIS Protocol
+aci		187/tcp	   #Application Communication Interface
+aci		187/udp	   #Application Communication Interface
+mumps		188/tcp	   #Plus Five's MUMPS
+mumps		188/udp	   #Plus Five's MUMPS
+qft		189/tcp	   #Queued File Transport
+qft		189/udp	   #Queued File Transport
+gacp		190/tcp	   #Gateway Access Control Protocol
+gacp		190/udp	   cacp		#Gateway Access Control Protocol
+prospero	191/tcp	   #Prospero Directory Service
+prospero	191/udp	   #Prospero Directory Service
+osu-nms		192/tcp	   #OSU Network Monitoring System
+osu-nms		192/udp	   #OSU Network Monitoring System
+srmp		193/tcp	   #Spider Remote Monitoring Protocol
+srmp		193/udp	   #Spider Remote Monitoring Protocol
+irc		194/tcp	   #Internet Relay Chat Protocol
+irc		194/udp	   #Internet Relay Chat Protocol
+dn6-nlm-aud	195/tcp	   #DNSIX Network Level Module Audit
+dn6-nlm-aud	195/udp	   #DNSIX Network Level Module Audit
+dn6-smm-red	196/tcp	   #DNSIX Session Mgt Module Audit Redir
+dn6-smm-red	196/udp	   #DNSIX Session Mgt Module Audit Redir
+dls		197/tcp	   #Directory Location Service
+dls		197/udp	   #Directory Location Service
+dls-mon		198/tcp	   #Directory Location Service Monitor
+dls-mon		198/udp	   #Directory Location Service Monitor
+smux		199/tcp
+smux		199/udp
+src		200/tcp	   #IBM System Resource Controller
+src		200/udp	   #IBM System Resource Controller
+at-rtmp		201/tcp	   #AppleTalk Routing Maintenance
+at-rtmp		201/udp	   #AppleTalk Routing Maintenance
+at-nbp		202/tcp	   #AppleTalk Name Binding
+at-nbp		202/udp	   #AppleTalk Name Binding
+at-3		203/tcp	   #AppleTalk Unused
+at-3		203/udp	   #AppleTalk Unused
+at-echo		204/tcp	   #AppleTalk Echo
+at-echo		204/udp	   #AppleTalk Echo
+at-5		205/tcp	   #AppleTalk Unused
+at-5		205/udp	   #AppleTalk Unused
+at-zis		206/tcp	   #AppleTalk Zone Information
+at-zis		206/udp	   #AppleTalk Zone Information
+at-7		207/tcp	   #AppleTalk Unused
+at-7		207/udp	   #AppleTalk Unused
+at-8		208/tcp	   #AppleTalk Unused
+at-8		208/udp	   #AppleTalk Unused
+qmtp		209/tcp	   #The Quick Mail Transfer Protocol
+qmtp		209/udp	   #The Quick Mail Transfer Protocol
+#PROBLEMS!==============================================================
+#tam		209/tcp	   #Trivial Authenticated Mail Protocol
+#tam		209/udp	   #Trivial Authenticated Mail Protocol
+#PROBLEMS!==============================================================
+z39.50		210/tcp	   wais		#ANSI Z39.50
+z39.50		210/udp	   wais		#ANSI Z39.50
+914c/g		211/tcp	   #Texas Instruments 914C/G Terminal
+914c/g		211/udp	   #Texas Instruments 914C/G Terminal
+anet		212/tcp	   #ATEXSSTR
+anet		212/udp	   #ATEXSSTR
+ipx		213/tcp
+ipx		213/udp
+vmpwscs		214/tcp
+vmpwscs		214/udp
+softpc		215/tcp	   #Insignia Solutions
+softpc		215/udp	   #Insignia Solutions
+CAIlic		216/tcp	   atls		#Computer Associates Int'l License Server
+CAIlic		216/udp	   atls		#Computer Associates Int'l License Server
+dbase		217/tcp	   #dBASE Unix
+dbase		217/udp	   #dBASE Unix
+mpp		218/tcp	   #Netix Message Posting Protocol
+mpp		218/udp	   #Netix Message Posting Protocol
+uarps		219/tcp	   #Unisys ARPs
+uarps		219/udp	   #Unisys ARPs
+#imap3@220 was never used and never should have been allocated. See PR 46294.
+#imap3		220/tcp	   #Interactive Mail Access Protocol v3
+#imap3		220/udp	   #Interactive Mail Access Protocol v3
+fln-spx		221/tcp	   #Berkeley rlogind with SPX auth
+fln-spx		221/udp	   #Berkeley rlogind with SPX auth
+rsh-spx		222/tcp	   #Berkeley rshd with SPX auth
+rsh-spx		222/udp	   #Berkeley rshd with SPX auth
+cdc		223/tcp	   #Certificate Distribution Center
+cdc		223/udp	   #Certificate Distribution Center
+direct		242/tcp
+direct		242/udp
+sur-meas	243/tcp	   #Survey Measurement
+sur-meas	243/udp	   #Survey Measurement
+dayna		244/tcp
+dayna		244/udp
+link		245/tcp
+link		245/udp
+dsp3270		246/tcp	   #Display Systems Protocol
+dsp3270		246/udp	   #Display Systems Protocol
+subntbcst_tftp	247/tcp	   #subntbcst_tftp
+subntbcst_tftp	247/udp	   #subntbcst_tftp
+bhfhs		248/tcp
+bhfhs		248/udp
+#		249-255    reserved
+rap		256/tcp
+rap		256/udp
+set		257/tcp	   #secure electronic transaction
+set		257/udp	   #secure electronic transaction
+yak-chat	258/tcp	   #yak winsock personal chat
+yak-chat	258/udp	   #yak winsock personal chat
+esro-gen	259/tcp	   #efficient short remote operations
+esro-gen	259/udp	   #efficient short remote operations
+openport	260/tcp
+openport	260/udp
+nsiiops		261/tcp	   #iiop name service over tls/ssl
+nsiiops		261/udp	   #iiop name service over tls/ssl
+arcisdms	262/tcp
+arcisdms	262/udp
+hdap		263/tcp
+hdap		263/udp
+bgmp		264/tcp
+bgmp		264/udp
+#		265-279	   unassigned
+http-mgmt	280/tcp
+http-mgmt	280/udp
+personal-link	281/tcp
+personal-link	281/udp
+cableport-ax	282/tcp	   #cable port a/x
+cableport-ax	282/udp	   #cable port a/x
+#		283-307    unassigned
+novastorbakcup	308/tcp	   #novastor backup
+novastorbakcup	308/udp	   #novastor backup
+entrusttime	309/tcp
+entrusttime	309/udp
+bhmds		310/tcp
+bhmds		310/udp
+asip-webadmin	311/tcp	   #appleshare ip webadmin
+asip-webadmin	311/udp	   #appleshare ip webadmin
+vslmp		312/tcp
+vslmp		312/udp
+magenta-logic	313/tcp
+magenta-logic	313/udp
+opalis-robot	314/tcp
+opalis-robot	314/udp
+dpsi		315/tcp
+dpsi		315/udp
+decauth		316/tcp
+decauth		316/udp
+zannet		317/tcp
+zannet		317/udp
+#		318-320	   #unassigned
+pip		321/tcp
+pip		321/udp
+#		322-343	   #unassigned
+pdap		344/tcp	   #Prospero Data Access Protocol
+pdap		344/udp	   #Prospero Data Access Protocol
+pawserv		345/tcp	   #Perf Analysis Workbench
+pawserv		345/udp	   #Perf Analysis Workbench
+zserv		346/tcp	   #Zebra server
+zserv		346/udp	   #Zebra server
+fatserv		347/tcp	   #Fatmen Server
+fatserv		347/udp	   #Fatmen Server
+csi-sgwp	348/tcp	   #Cabletron Management Protocol
+csi-sgwp	348/udp	   #Cabletron Management Protocol
+mftp		349/tcp
+mftp		349/udp
+matip-type-a	350/tcp	   #MATIP Type A
+matip-type-a	350/udp
+matip-type-b	351/tcp	   #MATIP Type B
+matip-type-b	351/udp
+bhoetty		351/tcp	   #unassigned but widespread use
+bhoetty		351/udp	   #unassigned but widespread use
+dtag-ste-sb	352/tcp	   #DTAG
+dtag-ste-sb	352/udp	   #DTAG
+bhoedap4	352/tcp	   #unassigned but widespread use
+bhoedap4	352/udp	   #unassigned but widespread use
+ndsauth		353/tcp
+ndsauth		353/udp
+bh611		354/tcp
+bh611		354/udp
+datex-asn	355/tcp
+datex-asn	355/udp
+cloanto-net-1	356/tcp	   #Cloanto Net 1
+cloanto-net-1	356/udp
+bhevent		357/tcp
+bhevent		357/udp
+shrinkwrap	358/tcp
+shrinkwrap	358/udp
+tenebris_nts	359/tcp	   #Tenebris Network Trace Service
+tenebris_nts	359/udp	   #Tenebris Network Trace Service
+scoi2odialog	360/tcp
+scoi2odialog	360/udp
+semantix	361/tcp
+semantix	361/udp
+srssend		362/tcp	   #SRS Send
+srssend		362/udp	   #SRS Send
+rsvp_tunnel	363/tcp
+rsvp_tunnel	363/udp
+aurora-cmgr	364/tcp
+aurora-cmgr	364/udp
+dtk		365/tcp	   #Deception Tool Kit - Fred Cohen <fc@all.net>
+dtk		365/udp	   #Deception Tool Kit - Fred Cohen <fc@all.net>
+odmr		366/tcp
+odmr		366/udp
+mortgageware	367/tcp
+mortgageware	367/udp
+qbikgdp		368/tcp	   #QbikGDP
+qbikgdp		368/udp
+rpc2portmap	369/tcp
+rpc2portmap	369/udp
+codaauth2	370/tcp
+codaauth2	370/udp
+clearcase	371/tcp
+clearcase	371/udp
+ulistserv	372/tcp	   ulistproc	#Unix Listserv
+ulistserv	372/udp	   ulistproc	#Unix Listserv
+legent-1	373/tcp	   #Legent Corporation (now Computer Associates Intl.)
+legent-1	373/udp	   #Legent Corporation (now Computer Associates Intl.)
+legent-2	374/tcp	   #Legent Corporation (now Computer Associates Intl.)
+legent-2	374/udp	   #Legent Corporation (now Computer Associates Intl.)
+hassle		375/tcp
+hassle		375/udp
+nip		376/tcp	   #Amiga Envoy Network Inquiry Proto
+nip		376/udp	   #Amiga Envoy Network Inquiry Proto
+tnETOS		377/tcp	   #NEC Corporation
+tnETOS		377/udp	   #NEC Corporation
+dsETOS		378/tcp	   #NEC Corporation
+dsETOS		378/udp	   #NEC Corporation
+is99c		379/tcp	   #TIA/EIA/IS-99 modem client
+is99c		379/udp	   #TIA/EIA/IS-99 modem client
+is99s		380/tcp	   #TIA/EIA/IS-99 modem server
+is99s		380/udp	   #TIA/EIA/IS-99 modem server
+hp-collector	381/tcp	   #hp performance data collector
+hp-collector	381/udp	   #hp performance data collector
+hp-managed-node	382/tcp	   #hp performance data managed node
+hp-managed-node	382/udp	   #hp performance data managed node
+hp-alarm-mgr	383/tcp	   #hp performance data alarm manager
+hp-alarm-mgr	383/udp	   #hp performance data alarm manager
+arns		384/tcp	   #A Remote Network Server System
+arns		384/udp	   #A Remote Network Server System
+ibm-app		385/tcp	   #IBM Application
+ibm-app		385/udp	   #IBM Application
+asa		386/tcp	   #ASA Message Router Object Def.
+asa		386/udp	   #ASA Message Router Object Def.
+aurp		387/tcp	   #Appletalk Update-Based Routing Pro.
+aurp		387/udp	   #Appletalk Update-Based Routing Pro.
+unidata-ldm	388/tcp	   #Unidata LDM Version 4
+unidata-ldm	388/udp	   #Unidata LDM Version 4
+ldap		389/tcp	   #Lightweight Directory Access Protocol
+ldap		389/udp	   #Lightweight Directory Access Protocol
+uis		390/tcp
+uis		390/udp
+synotics-relay	391/tcp	   #SynOptics SNMP Relay Port
+synotics-relay	391/udp	   #SynOptics SNMP Relay Port
+synotics-broker	392/tcp	   #SynOptics Port Broker Port
+synotics-broker	392/udp	   #SynOptics Port Broker Port
+dis		393/tcp	   #Data Interpretation System
+dis		393/udp	   #Data Interpretation System
+embl-ndt	394/tcp	   #EMBL Nucleic Data Transfer
+embl-ndt	394/udp	   #EMBL Nucleic Data Transfer
+netcp		395/tcp	   #NETscout Control Protocol
+netcp		395/udp	   #NETscout Control Protocol
+netware-ip	396/tcp	   #Novell Netware over IP
+netware-ip	396/udp	   #Novell Netware over IP
+mptn		397/tcp	   #Multi Protocol Trans. Net.
+mptn		397/udp	   #Multi Protocol Trans. Net.
+kryptolan	398/tcp
+kryptolan	398/udp
+iso-tsap-c2	399/tcp	   #ISO-TSAP Class 2
+iso-tsap-c2	399/udp	   #ISO-TSAP Class 2
+work-sol	400/tcp	   #Workstation Solutions
+work-sol	400/udp	   #Workstation Solutions
+ups		401/tcp	   #Uninterruptible Power Supply
+ups		401/udp	   #Uninterruptible Power Supply
+genie		402/tcp	   #Genie Protocol
+genie		402/udp	   #Genie Protocol
+decap		403/tcp
+decap		403/udp
+nced		404/tcp
+nced		404/udp
+ncld		405/tcp
+ncld		405/udp
+imsp		406/tcp	   #Interactive Mail Support Protocol
+imsp		406/udp	   #Interactive Mail Support Protocol
+timbuktu	407/tcp
+timbuktu	407/udp
+prm-sm		408/tcp	   #Prospero Resource Manager Sys. Man.
+prm-sm		408/udp	   #Prospero Resource Manager Sys. Man.
+prm-nm		409/tcp	   #Prospero Resource Manager Node Man.
+prm-nm		409/udp	   #Prospero Resource Manager Node Man.
+decladebug	410/tcp	   #DECLadebug Remote Debug Protocol
+decladebug	410/udp	   #DECLadebug Remote Debug Protocol
+rmt		411/tcp	   #Remote MT Protocol
+rmt		411/udp	   #Remote MT Protocol
+synoptics-trap	412/tcp	   #Trap Convention Port
+synoptics-trap	412/udp	   #Trap Convention Port
+smsp		413/tcp
+smsp		413/udp
+infoseek	414/tcp
+infoseek	414/udp
+bnet		415/tcp
+bnet		415/udp
+silverplatter	416/tcp
+silverplatter	416/udp
+onmux		417/tcp
+onmux		417/udp
+hyper-g		418/tcp
+hyper-g		418/udp
+ariel1		419/tcp
+ariel1		419/udp
+smpte		420/tcp
+smpte		420/udp
+ariel2		421/tcp
+ariel2		421/udp
+ariel3		422/tcp
+ariel3		422/udp
+opc-job-start	423/tcp	   #IBM Operations Planning and Control Start
+opc-job-start	423/udp	   #IBM Operations Planning and Control Start
+opc-job-track	424/tcp	   #IBM Operations Planning and Control Track
+opc-job-track	424/udp	   #IBM Operations Planning and Control Track
+icad-el		425/tcp
+icad-el		425/udp
+smartsdp	426/tcp
+smartsdp	426/udp
+svrloc		427/tcp	   #Server Location
+svrloc		427/udp	   #Server Location
+ocs_cmu		428/tcp
+ocs_cmu		428/udp
+ocs_amu		429/tcp
+ocs_amu		429/udp
+utmpsd		430/tcp
+utmpsd		430/udp
+utmpcd		431/tcp
+utmpcd		431/udp
+iasd		432/tcp
+iasd		432/udp
+nnsp		433/tcp
+nnsp		433/udp
+mobileip-agent	434/tcp
+mobileip-agent	434/udp
+mobilip-mn	435/tcp
+mobilip-mn	435/udp
+dna-cml		436/tcp
+dna-cml		436/udp
+comscm		437/tcp
+comscm		437/udp
+dsfgw		438/tcp
+dsfgw		438/udp
+dasp		439/tcp
+dasp		439/udp
+sgcp		440/tcp
+sgcp		440/udp
+decvms-sysmgt	441/tcp
+decvms-sysmgt	441/udp
+cvc_hostd	442/tcp
+cvc_hostd	442/udp
+https		443/tcp
+https		443/udp
+snpp		444/tcp	   #Simple Network Paging Protocol
+snpp		444/udp	   #Simple Network Paging Protocol
+#			   [RFC1568]
+microsoft-ds	445/tcp
+microsoft-ds	445/udp
+ddm-rdb		446/tcp
+ddm-rdb		446/udp
+ddm-dfm		447/tcp
+ddm-dfm		447/udp
+ddm-ssl		448/tcp	   ddm-byte
+ddm-ssl		448/udp	   ddm-byte
+as-servermap	449/tcp	   #AS Server Mapper
+as-servermap	449/udp	   #AS Server Mapper
+tserver		450/tcp
+tserver		450/udp
+sfs-smp-net	451/tcp	   #Cray Network Semaphore server
+sfs-smp-net	451/udp	   #Cray Network Semaphore server
+sfs-config	452/tcp	   #Cray SFS config server
+sfs-config	452/udp	   #Cray SFS config server
+creativeserver	453/tcp	   #CreativeServer
+creativeserver	453/udp	   #CreativeServer
+contentserver	454/tcp	   #ContentServer
+contentserver	454/udp	   #ContentServer
+creativepartnr	455/tcp	   #CreativePartnr
+creativepartnr	455/udp	   #CreativePartnr
+macon-tcp	456/tcp
+macon-udp	456/udp
+scohelp		457/tcp
+scohelp		457/udp
+appleqtc	458/tcp	   #apple quick time
+appleqtc	458/udp	   #apple quick time
+ampr-rcmd	459/tcp
+ampr-rcmd	459/udp
+skronk		460/tcp
+skronk		460/udp
+datasurfsrv	461/tcp
+datasurfsrv	461/udp
+datasurfsrvsec	462/tcp
+datasurfsrvsec	462/udp
+alpes		463/tcp
+alpes		463/udp
+#
+kpasswd5	464/tcp	   # Kerberos (v5)
+kpasswd5	464/udp	   # Kerberos (v5)
+#PROBLEMS!==============================================================
+# IANA has offically assigned these two ports as ``kpasswd''
+#kpasswd	464/tcp    # Kerberos (v5)
+#kpasswd	464/udp    # Kerberos (v5)
+#PROBLEMS!==============================================================
+smtps		465/tcp	   #smtp protocol over TLS/SSL (was ssmtp)
+smtps		465/udp	   #smtp protocol over TLS/SSL (was ssmtp)
+digital-vrc	466/tcp
+digital-vrc	466/udp
+mylex-mapd	467/tcp
+mylex-mapd	467/udp
+photuris	468/tcp
+photuris	468/udp
+rcp		469/tcp	   #Radio Control Protocol
+rcp		469/udp	   #Radio Control Protocol
+scx-proxy	470/tcp
+scx-proxy	470/udp
+mondex		471/tcp
+mondex		471/udp
+ljk-login	472/tcp
+ljk-login	472/udp
+hybrid-pop	473/tcp
+hybrid-pop	473/udp
+tn-tl-w1	474/tcp
+tn-tl-w2	474/udp
+tcpnethaspsrv	475/tcp
+tcpnethaspsrv	475/udp
+tn-tl-fd1	476/tcp
+tn-tl-fd1	476/udp
+ss7ns		477/tcp
+ss7ns		477/udp
+spsc		478/tcp
+spsc		478/udp
+iafserver	479/tcp
+iafserver	479/udp
+iafdbase	480/tcp
+iafdbase	480/udp
+ph		481/tcp
+ph		481/udp
+bgs-nsi		482/tcp
+bgs-nsi		482/udp
+ulpnet		483/tcp
+ulpnet		483/udp
+integra-sme	484/tcp	   #Integra Software Management Environment
+integra-sme	484/udp	   #Integra Software Management Environment
+powerburst	485/tcp	   #Air Soft Power Burst
+powerburst	485/udp	   #Air Soft Power Burst
+avian		486/tcp
+avian		486/udp
+saft		487/tcp	   #saft Simple Asynchronous File Transfer
+saft		487/udp	   #saft Simple Asynchronous File Transfer
+gss-http	488/tcp
+gss-http	488/udp
+nest-protocol	489/tcp
+nest-protocol	489/udp
+micom-pfs	490/tcp
+micom-pfs	490/udp
+go-login	491/tcp
+go-login	491/udp
+ticf-1		492/tcp	   #Transport Independent Convergence for FNA
+ticf-1		492/udp	   #Transport Independent Convergence for FNA
+ticf-2		493/tcp	   #Transport Independent Convergence for FNA
+ticf-2		493/udp	   #Transport Independent Convergence for FNA
+pov-ray		494/tcp
+pov-ray		494/udp
+intecourier	495/tcp
+intecourier	495/udp
+pim-rp-disc	496/tcp
+pim-rp-disc	496/udp
+dantz		497/tcp
+dantz		497/udp
+siam		498/tcp
+siam		498/udp
+iso-ill		499/tcp	   #ISO ILL Protocol
+iso-ill		499/udp	   #ISO ILL Protocol
+isakmp		500/tcp
+isakmp		500/udp
+stmf		501/tcp
+stmf		501/udp
+asa-appl-proto	502/tcp
+asa-appl-proto	502/udp
+intrinsa	503/tcp
+intrinsa	503/udp
+citadel		504/tcp
+citadel		504/udp
+mailbox-lm	505/tcp
+mailbox-lm	505/udp
+ohimsrv		506/tcp
+ohimsrv		506/udp
+crs		507/tcp
+crs		507/udp
+xvttp		508/tcp
+xvttp		508/udp
+snare		509/tcp
+snare		509/udp
+fcp		510/tcp	   #FirstClass Protocol
+fcp		510/udp	   #FirstClass Protocol
+passgo		511/tcp
+passgo		511/udp
+#
+# Berkeley-specific services
+#
+exec		512/tcp	   #remote process execution;
+#			   authentication performed using
+#			   passwords and UNIX login names
+biff		512/udp	   comsat	#used by mail system to notify users
+#					of new mail received; currently
+#					receives messages only from
+#					processes on the same machine
+login		513/tcp	   #remote login a la telnet;
+#			   automatic authentication performed
+#			   based on priviledged port numbers
+#			   and distributed data bases which
+#			   identify "authentication domains"
+who		513/udp	   whod		#maintains data bases showing who's
+#					logged in to machines on a local
+#					net and the load average of the
+#					machine
+shell		514/tcp	   cmd		#like exec, but automatic
+#					authentication is performed as for
+#					login server
+syslog		514/udp
+printer		515/tcp	   spooler
+printer		515/udp	   spooler
+videotex	516/tcp
+videotex	516/udp
+talk		517/tcp	   #like tenex link, but across
+#			   machine - unfortunately, doesn't
+#			   use link protocol (this is actually
+#			   just a rendezvous port from which a
+#			   tcp connection is established)
+talk		517/udp	   #like tenex link, but across
+#			   machine - unfortunately, doesn't
+#			   use link protocol (this is actually
+#			   just a rendezvous port from which a
+#			   tcp connection is established)
+ntalk		518/tcp
+ntalk		518/udp
+utime		519/tcp	   unixtime
+utime		519/udp	   unixtime
+efs		520/tcp	   #extended file name server
+router		520/udp	   route routed	#local routing process (on site);
+#					   uses variant of Xerox NS routing
+#					   information protocol
+ripng		521/tcp
+ripng		521/udp
+ulp		522/tcp
+ulp		522/udp
+ibm-db2		523/tcp
+ibm-db2		523/udp
+ncp		524/tcp
+ncp		524/udp
+timed		525/tcp	   timeserver
+timed		525/udp	   timeserver
+tempo		526/tcp	   newdate
+tempo		526/udp	   newdate
+stx		527/tcp	   #Stock IXChange
+stx		527/udp	   #Stock IXChange
+custix		528/tcp	   #Customer IXChange
+custix		528/udp	   #Customer IXChange
+irc-serv	529/tcp
+irc-serv	529/udp
+courier		530/tcp	   rpc
+courier		530/udp	   rpc
+conference	531/tcp	   chat
+conference	531/udp	   chat
+netnews		532/tcp	   readnews
+netnews		532/udp	   readnews
+netwall		533/tcp	   #for emergency broadcasts
+netwall		533/udp	   #for emergency broadcasts
+mm-admin	534/tcp	   #MegaMedia Admin
+mm-admin	534/udp	   #MegaMedia Admin
+iiop		535/tcp
+iiop		535/udp
+opalis-rdv	536/tcp
+opalis-rdv	536/udp
+nmsp		537/tcp	   #Networked Media Streaming Protocol
+nmsp		537/udp	   #Networked Media Streaming Protocol
+gdomap		538/tcp
+gdomap		538/udp
+apertus-ldp	539/tcp	   #Apertus Technologies Load Determination
+apertus-ldp	539/udp	   #Apertus Technologies Load Determination
+uucp		540/tcp	   uucpd
+uucp		540/udp	   uucpd
+uucp-rlogin	541/tcp
+uucp-rlogin	541/udp
+commerce	542/tcp
+commerce	542/udp
+klogin		543/tcp	   # Kerberos (v4/v5)
+klogin		543/udp	   # Kerberos (v4/v5)
+kshell		544/tcp	   krcmd	# Kerberos (v4/v5)
+kshell		544/udp	   krcmd	# Kerberos (v4/v5)
+appleqtcsrvr	545/tcp
+appleqtcsrvr	545/udp
+dhcpv6-client	546/tcp	   #DHCPv6 Client
+dhcpv6-client	546/udp	   #DHCPv6 Client
+dhcpv6-server	547/tcp	   #DHCPv6 Server
+dhcpv6-server	547/udp	   #DHCPv6 Server
+afpovertcp	548/tcp	   #AFP over TCP
+afpovertcp	548/udp	   #AFP over TCP
+idfp		549/tcp
+idfp		549/udp
+new-rwho	550/tcp	   new-who
+new-rwho	550/udp	   new-who
+cybercash	551/tcp
+cybercash	551/udp
+deviceshare	552/tcp
+deviceshare	552/udp
+pirp		553/tcp
+pirp		553/udp
+rtsp		554/tcp	   #Real Time Stream Control Protocol
+rtsp		554/udp	   #Real Time Stream Control Protocol
+dsf		555/tcp
+dsf		555/udp
+remotefs	556/tcp	   rfs rfs_server	# Brunhoff remote filesystem
+remotefs	556/udp	   rfs rfs_server	# Brunhoff remote filesystem
+openvms-sysipc	557/tcp
+openvms-sysipc	557/udp
+sdnskmp		558/tcp
+sdnskmp		558/udp
+teedtap		559/tcp
+teedtap		559/udp
+rmonitor	560/tcp	   rmonitord
+rmonitor	560/udp	   rmonitord
+monitor		561/tcp
+monitor		561/udp
+chshell		562/tcp	   chcmd
+chshell		562/udp	   chcmd
+nntps		563/tcp	   snntp	#nntp protocol over TLS/SSL
+nntps		563/udp	   snntp	#nntp protocol over TLS/SSL
+9pfs		564/tcp	   #plan 9 file service
+9pfs		564/udp	   #plan 9 file service
+whoami		565/tcp
+whoami		565/udp
+streettalk	566/tcp
+banyan-rpc	567/tcp
+banyan-rpc	567/udp
+ms-shuttle	568/tcp	   #Microsoft shuttle
+ms-shuttle	568/udp	   #Microsoft shuttle
+ms-rome		569/tcp	   #Microsoft rome
+ms-rome		569/udp	   #Microsoft rome
+meter		570/tcp	   #demon
+meter		570/udp	   #demon
+umeter		571/tcp	   #udemon
+umeter		571/udp	   #udemon
+sonar		572/tcp
+sonar		572/udp
+banyan-vip	573/tcp
+banyan-vip	573/udp
+ftp-agent	574/tcp	   #FTP Software Agent System
+ftp-agent	574/udp	   #FTP Software Agent System
+vemmi		575/tcp
+vemmi		575/udp
+ipcd		576/tcp
+ipcd		576/udp
+vnas		577/tcp
+vnas		577/udp
+ipdd		578/tcp
+ipdd		578/udp
+decbsrv		579/tcp
+decbsrv		579/udp
+sntp-heartbeat	580/tcp
+sntp-heartbeat	580/udp
+bdp		581/tcp	   #Bundle Discovery Protocol
+bdp		581/udp	   #Bundle Discovery Protocol
+scc-security	582/tcp
+scc-security	582/udp
+philips-vc	583/tcp	   #Philips Video-Conferencing
+philips-vc	583/udp	   #Philips Video-Conferencing
+keyserver	584/tcp
+keyserver	584/udp
+#imap4-ssl@585 never should have been allocated. See PR 46294.
+#imap4-ssl	585/tcp	   #IMAP4+SSL (use of 585 is not recommended,
+#imap4-ssl	585/udp	   #		use 993 instead)
+password-chg	586/tcp
+password-chg	586/udp
+submission	587/tcp
+submission	587/udp
+cal		588/tcp
+cal		588/udp
+eyelink		589/tcp
+eyelink		589/udp
+tns-cml		590/tcp
+tns-cml		590/udp
+http-alt	591/tcp	   #FileMaker, Inc. - HTTP Alternate (see Port 80)
+http-alt	591/udp	   #FileMaker, Inc. - HTTP Alternate (see Port 80)
+eudora-set	592/tcp
+eudora-set	592/udp
+http-rpc-epmap	593/tcp	   #HTTP RPC Ep Map
+http-rpc-epmap	593/udp	   #HTTP RPC Ep Map
+tpip		594/tcp
+tpip		594/udp
+cab-protocol	595/tcp
+cab-protocol	595/udp
+smsd		596/tcp
+smsd		596/udp
+ptcnameservice	597/tcp	   #PTC Name Service
+ptcnameservice	597/udp	   #PTC Name Service
+sco-websrvrmg3	598/tcp	   #SCO Web Server Manager 3
+sco-websrvrmg3	598/udp	   #SCO Web Server Manager 3
+acp		599/tcp	   #Aeolon Core Protocol
+acp		599/udp	   #Aeolon Core Protocol
+ipcserver	600/tcp	   #Sun IPC server
+ipcserver	600/udp	   #Sun IPC server
+urm		606/tcp	   #Cray Unified Resource Manager
+urm		606/udp	   #Cray Unified Resource Manager
+nqs		607/tcp
+nqs		607/udp
+sift-uft	608/tcp	   #Sender-Initiated/Unsolicited File Transfer
+sift-uft	608/udp	   #Sender-Initiated/Unsolicited File Transfer
+npmp-trap	609/tcp
+npmp-trap	609/udp
+npmp-local	610/tcp
+npmp-local	610/udp
+npmp-gui	611/tcp
+npmp-gui	611/udp
+sshell		614/tcp	   #SSLshell
+sshell		614/udp
+ipp		631/tcp	   #IPP (Internet Printing Protocol)
+ipp		631/udp	   #IPP (Internet Printing Protocol)
+ginad		634/tcp
+ginad		634/udp
+ldaps		636/tcp	   sldap	#ldap protocol over TLS/SSL
+ldaps		636/udp	   sldap
+aodv		654/tcp	   #Ad-Hoc On-Demand Distance Vector Routing Protocol
+aodv		654/udp	   #Ad-Hoc On-Demand Distance Vector Routing Protocol
+mdqs		666/tcp
+mdqs		666/udp
+#PROBLEMS!===============================================
+doom		666/tcp	   #doom Id Software
+doom		666/udp	   #doom Id Software
+#PROBLEMS!===============================================
+acap		674/tcp	   #Application Configuration Access Protocol
+acap		674/udp	   #Application Configuration Access Protocol
+elcsd		704/tcp	   #errlog copy/server daemon
+elcsd		704/udp	   #errlog copy/server daemon
+entrustmanager	709/tcp	   #EntrustManager
+entrustmanager	709/udp	   #EntrustManager
+netviewdm1	729/tcp	   #IBM NetView DM/6000 Server/Client
+netviewdm1	729/udp	   #IBM NetView DM/6000 Server/Client
+netviewdm2	730/tcp	   #IBM NetView DM/6000 send/tcp
+netviewdm2	730/udp	   #IBM NetView DM/6000 send/tcp
+netviewdm3	731/tcp	   #IBM NetView DM/6000 receive/tcp
+netviewdm3	731/udp	   #IBM NetView DM/6000 receive/tcp
+netgw		741/tcp
+netgw		741/udp
+netrcs		742/tcp	   #Network based Rev. Cont. Sys.
+netrcs		742/udp	   #Network based Rev. Cont. Sys.
+flexlm		744/tcp	   #Flexible License Manager
+flexlm		744/udp	   #Flexible License Manager
+fujitsu-dev	747/tcp	   #Fujitsu Device Control
+fujitsu-dev	747/udp	   #Fujitsu Device Control
+ris-cm		748/tcp	   #Russell Info Sci Calendar Manager
+ris-cm		748/udp	   #Russell Info Sci Calendar Manager
+kerberos-adm	749/tcp	   #Kerberos administration (v5)
+kerberos-adm	749/udp	   #Kerberos administration (v5)
+kerberos-iv	750/udp	   kdc		# Kerberos (v4)
+kerberos-iv	750/tcp	   kdc		# Kerberos (v4)
+#PROBLEMS!========================================================
+#rfile		750/tcp
+#loadav		750/udp
+#PROBLEMS!========================================================
+kerberos_master	751/tcp	   # Kerberos `kadmin' (v4)
+kerberos_master	751/udp	   # Kerberos `kadmin' (v4)
+#PROBLEMS!========================================================
+pump		751/tcp
+pump		751/udp
+#PROBLEMS!========================================================
+qrh		752/tcp
+qrh		752/udp
+rrh		753/tcp
+rrh		753/udp
+krb_prop	754/tcp	   krb5_prop	# kerberos/v5 server propagation
+#PROBLEMS!========================================================
+tell		754/tcp	   #send
+#PROBLEMS!========================================================
+tell		754/udp	   #send
+nlogin		758/tcp
+nlogin		758/udp
+con		759/tcp
+con		759/udp
+krbupdate	760/tcp	   kreg		# Kerberos (v4) registration
+#PROBLEMS!========================================================
+ns		760/tcp
+#PROBLEMS!========================================================
+ns		760/udp
+kpasswd		761/tcp	   kpwd		# Kerberos (v4) "passwd"
+#PROBLEMS!========================================================
+rxe		761/tcp
+#PROBLEMS!========================================================
+rxe		761/udp
+quotad		762/tcp
+quotad		762/udp
+cycleserv	763/tcp
+cycleserv	763/udp
+omserv		764/tcp
+omserv		764/udp
+webster		765/tcp
+webster		765/udp
+phonebook	767/tcp	   #phone
+phonebook	767/udp	   #phone
+vid		769/tcp
+vid		769/udp
+cadlock		770/tcp
+cadlock		770/udp
+rtip		771/tcp
+rtip		771/udp
+cycleserv2	772/tcp
+cycleserv2	772/udp
+submit		773/tcp
+notify		773/udp
+rpasswd		774/tcp
+acmaint_dbd	774/udp
+entomb		775/tcp
+acmaint_transd	775/udp
+wpages		776/tcp
+wpages		776/udp
+wpgs		780/tcp
+wpgs		780/udp
+concert		786/tcp
+concert		786/udp
+mdbs_daemon	800/tcp
+mdbs_daemon	800/udp
+device		801/tcp
+device		801/udp
+supfilesrv	871/tcp	   # for SUP
+rsync		873/tcp
+rsync		873/udp
+accessbuilder	888/tcp
+accessbuilder	888/udp
+swat		901/tcp	   # samba web configuration tool
+rndc		953/tcp	   # named's rndc control socket
+ftps-data	989/tcp	   # ftp protocol, data, over TLS/SSL
+ftps-data	989/udp
+ftps		990/tcp	   # ftp protocol, control, over TLS/SSL
+ftps		990/udp
+telnets		992/tcp	   # telnet protocol over TLS/SSL
+telnets		992/udp
+imaps		993/tcp	   # imap4 protocol over TLS/SSL
+imaps		993/udp
+ircs		994/tcp	   # irc protocol over TLS/SSL
+ircs		994/udp
+pop3s		995/tcp	   spop3	# pop3 protocol over TLS/SSL
+pop3s		995/udp	   spop3
+vsinet		996/tcp
+vsinet		996/udp
+maitrd		997/tcp
+maitrd		997/udp
+busboy		998/tcp
+puparp		998/udp
+garcon		999/tcp
+applix		999/udp	   #Applix ac
+puprouter	999/tcp
+puprouter	999/udp
+cadlock2	1000/tcp
+cadlock2	1000/udp
+#
+# REGISTERED PORT NUMBERS
+#
+blackjack	1025/tcp   #network blackjack
+blackjack	1025/udp   #network blackjack
+iad1		1030/tcp   #BBN IAD
+iad1		1030/udp   #BBN IAD
+iad2		1031/tcp   #BBN IAD
+iad2		1031/udp   #BBN IAD
+iad3		1032/tcp   #BBN IAD
+iad3		1032/udp   #BBN IAD
+nim		1058/tcp
+nim		1058/udp
+nimreg		1059/tcp
+nimreg		1059/udp
+instl_boots	1067/tcp   #Installation Bootstrap Proto. Serv.
+instl_boots	1067/udp   #Installation Bootstrap Proto. Serv.
+instl_bootc	1068/tcp   #Installation Bootstrap Proto. Cli.
+instl_bootc	1068/udp   #Installation Bootstrap Proto. Cli.
+socks		1080/tcp
+socks		1080/udp
+ansoft-lm-1	1083/tcp   #Anasoft License Manager
+ansoft-lm-1	1083/udp   #Anasoft License Manager
+ansoft-lm-2	1084/tcp   #Anasoft License Manager
+ansoft-lm-2	1084/udp   #Anasoft License Manager
+webobjects	1085/tcp   #Web Objects
+webobjects	1085/udp   #Web Objects
+kpop		1109/tcp   #Unofficial
+kpop		1109/udp   #Unofficial
+nfsd-status	1110/tcp   #Cluster status info
+nfsd-keepalive	1110/udp   #Client status info
+supfiledbg	1127/tcp   # for SUP
+nfa		1155/tcp   #Network File Access
+nfa		1155/udp   #Network File Access
+phone		1167/udp   #conference calling
+skkserv		1178/tcp   #SKK (kanji input)
+lupa		1212/tcp
+lupa		1212/udp
+nerv		1222/tcp   #SNI R&D network
+nerv		1222/udp   #SNI R&D network
+hermes		1248/tcp
+hermes		1248/udp
+healthd		1281/tcp   #healthd
+healthd		1281/udp   #healthd
+alta-ana-lm	1346/tcp   #Alta Analytics License Manager
+alta-ana-lm	1346/udp   #Alta Analytics License Manager
+bbn-mmc		1347/tcp   #multi media conferencing
+bbn-mmc		1347/udp   #multi media conferencing
+bbn-mmx		1348/tcp   #multi media conferencing
+bbn-mmx		1348/udp   #multi media conferencing
+sbook		1349/tcp   #Registration Network Protocol
+sbook		1349/udp   #Registration Network Protocol
+editbench	1350/tcp   #Registration Network Protocol
+editbench	1350/udp   #Registration Network Protocol
+equationbuilder	1351/tcp   #Digital Tool Works (MIT)
+equationbuilder	1351/udp   #Digital Tool Works (MIT)
+lotusnote	1352/tcp   #Lotus Note
+lotusnote	1352/udp   #Lotus Note
+relief		1353/tcp   #Relief Consulting
+relief		1353/udp   #Relief Consulting
+rightbrain	1354/tcp   #RightBrain Software
+rightbrain	1354/udp   #RightBrain Software
+intuitive-edge	1355/tcp   #Intuitive Edge
+intuitive-edge	1355/udp   #Intuitive Edge
+cuillamartin	1356/tcp   #CuillaMartin Company
+cuillamartin	1356/udp   #CuillaMartin Company
+pegboard	1357/tcp   #Electronic PegBoard
+pegboard	1357/udp   #Electronic PegBoard
+connlcli	1358/tcp
+connlcli	1358/udp
+ftsrv		1359/tcp
+ftsrv		1359/udp
+mimer		1360/tcp
+mimer		1360/udp
+linx		1361/tcp
+linx		1361/udp
+timeflies	1362/tcp
+timeflies	1362/udp
+ndm-requester	1363/tcp   #Network DataMover Requester
+ndm-requester	1363/udp   #Network DataMover Requester
+ndm-server	1364/tcp   #Network DataMover Server
+ndm-server	1364/udp   #Network DataMover Server
+adapt-sna	1365/tcp   #Network Software Associates
+adapt-sna	1365/udp   #Network Software Associates
+netware-csp	1366/tcp   #Novell NetWare Comm Service Platform
+netware-csp	1366/udp   #Novell NetWare Comm Service Platform
+dcs		1367/tcp
+dcs		1367/udp
+screencast	1368/tcp
+screencast	1368/udp
+gv-us		1369/tcp   #GlobalView to Unix Shell
+gv-us		1369/udp   #GlobalView to Unix Shell
+us-gv		1370/tcp   #Unix Shell to GlobalView
+us-gv		1370/udp   #Unix Shell to GlobalView
+fc-cli		1371/tcp   #Fujitsu Config Protocol
+fc-cli		1371/udp   #Fujitsu Config Protocol
+fc-ser		1372/tcp   #Fujitsu Config Protocol
+fc-ser		1372/udp   #Fujitsu Config Protocol
+chromagrafx	1373/tcp
+chromagrafx	1373/udp
+molly		1374/tcp   #EPI Software Systems
+molly		1374/udp   #EPI Software Systems
+bytex		1375/tcp
+bytex		1375/udp
+ibm-pps		1376/tcp   #IBM Person to Person Software
+ibm-pps		1376/udp   #IBM Person to Person Software
+cichlid		1377/tcp   #Cichlid License Manager
+cichlid		1377/udp   #Cichlid License Manager
+elan		1378/tcp   #Elan License Manager
+elan		1378/udp   #Elan License Manager
+dbreporter	1379/tcp   #Integrity Solutions
+dbreporter	1379/udp   #Integrity Solutions
+telesis-licman	1380/tcp   #Telesis Network License Manager
+telesis-licman	1380/udp   #Telesis Network License Manager
+apple-licman	1381/tcp   #Apple Network License Manager
+apple-licman	1381/udp   #Apple Network License Manager
+#udt_os		1382/tcp
+#udt_os		1382/udp
+gwha		1383/tcp   #GW Hannaway Network License Manager
+gwha		1383/udp   #GW Hannaway Network License Manager
+os-licman	1384/tcp   #Objective Solutions License Manager
+os-licman	1384/udp   #Objective Solutions License Manager
+atex_elmd	1385/tcp   #Atex Publishing License Manager
+atex_elmd	1385/udp   #Atex Publishing License Manager
+checksum	1386/tcp   #CheckSum License Manager
+checksum	1386/udp   #CheckSum License Manager
+cadsi-lm	1387/tcp   #Computer Aided Design Software Inc LM
+cadsi-lm	1387/udp   #Computer Aided Design Software Inc LM
+objective-dbc	1388/tcp   #Objective Solutions DataBase Cache
+objective-dbc	1388/udp   #Objective Solutions DataBase Cache
+iclpv-dm	1389/tcp   #Document Manager
+iclpv-dm	1389/udp   #Document Manager
+iclpv-sc	1390/tcp   #Storage Controller
+iclpv-sc	1390/udp   #Storage Controller
+iclpv-sas	1391/tcp   #Storage Access Server
+iclpv-sas	1391/udp   #Storage Access Server
+iclpv-pm	1392/tcp   #Print Manager
+iclpv-pm	1392/udp   #Print Manager
+iclpv-nls	1393/tcp   #Network Log Server
+iclpv-nls	1393/udp   #Network Log Server
+iclpv-nlc	1394/tcp   #Network Log Client
+iclpv-nlc	1394/udp   #Network Log Client
+iclpv-wsm	1395/tcp   #PC Workstation Manager software
+iclpv-wsm	1395/udp   #PC Workstation Manager software
+dvl-activemail	1396/tcp   #DVL Active Mail
+dvl-activemail	1396/udp   #DVL Active Mail
+audio-activmail	1397/tcp   #Audio Active Mail
+audio-activmail	1397/udp   #Audio Active Mail
+video-activmail	1398/tcp   #Video Active Mail
+video-activmail	1398/udp   #Video Active Mail
+cadkey-licman	1399/tcp   #Cadkey License Manager
+cadkey-licman	1399/udp   #Cadkey License Manager
+cadkey-tablet	1400/tcp   #Cadkey Tablet Daemon
+cadkey-tablet	1400/udp   #Cadkey Tablet Daemon
+goldleaf-licman	1401/tcp   #Goldleaf License Manager
+goldleaf-licman	1401/udp   #Goldleaf License Manager
+prm-sm-np	1402/tcp   #Prospero Resource Manager
+prm-sm-np	1402/udp   #Prospero Resource Manager
+prm-nm-np	1403/tcp   #Prospero Resource Manager
+prm-nm-np	1403/udp   #Prospero Resource Manager
+igi-lm		1404/tcp   #Infinite Graphics License Manager
+igi-lm		1404/udp   #Infinite Graphics License Manager
+ibm-res		1405/tcp   #IBM Remote Execution Starter
+ibm-res		1405/udp   #IBM Remote Execution Starter
+netlabs-lm	1406/tcp   #NetLabs License Manager
+netlabs-lm	1406/udp   #NetLabs License Manager
+dbsa-lm		1407/tcp   #DBSA License Manager
+dbsa-lm		1407/udp   #DBSA License Manager
+sophia-lm	1408/tcp   #Sophia License Manager
+sophia-lm	1408/udp   #Sophia License Manager
+here-lm		1409/tcp   #Here License Manager
+here-lm		1409/udp   #Here License Manager
+hiq		1410/tcp   #HiQ License Manager
+hiq		1410/udp   #HiQ License Manager
+af		1411/tcp   #AudioFile
+af		1411/udp   #AudioFile
+innosys		1412/tcp
+innosys		1412/udp
+innosys-acl	1413/tcp
+innosys-acl	1413/udp
+ibm-mqseries	1414/tcp   #IBM MQSeries
+ibm-mqseries	1414/udp   #IBM MQSeries
+dbstar		1415/tcp
+dbstar		1415/udp
+novell-lu6.2	1416/tcp   #Novell LU6.2
+novell-lu6.2	1416/udp   #Novell LU6.2
+timbuktu-srv1	1417/tcp   #Timbuktu Service 1 Port
+timbuktu-srv1	1417/udp   #Timbuktu Service 1 Port
+timbuktu-srv2	1418/tcp   #Timbuktu Service 2 Port
+timbuktu-srv2	1418/udp   #Timbuktu Service 2 Port
+timbuktu-srv3	1419/tcp   #Timbuktu Service 3 Port
+timbuktu-srv3	1419/udp   #Timbuktu Service 3 Port
+timbuktu-srv4	1420/tcp   #Timbuktu Service 4 Port
+timbuktu-srv4	1420/udp   #Timbuktu Service 4 Port
+gandalf-lm	1421/tcp   #Gandalf License Manager
+gandalf-lm	1421/udp   #Gandalf License Manager
+autodesk-lm	1422/tcp   #Autodesk License Manager
+autodesk-lm	1422/udp   #Autodesk License Manager
+essbase		1423/tcp   #Essbase Arbor Software
+essbase		1423/udp   #Essbase Arbor Software
+hybrid		1424/tcp   #Hybrid Encryption Protocol
+hybrid		1424/udp   #Hybrid Encryption Protocol
+zion-lm		1425/tcp   #Zion Software License Manager
+zion-lm		1425/udp   #Zion Software License Manager
+sas-1		1426/tcp   #Satellite-data Acquisition System 1
+sas-1		1426/udp   #Satellite-data Acquisition System 1
+mloadd		1427/tcp   #mloadd monitoring tool
+mloadd		1427/udp   #mloadd monitoring tool
+informatik-lm	1428/tcp   #Informatik License Manager
+informatik-lm	1428/udp   #Informatik License Manager
+nms		1429/tcp   #Hypercom NMS
+nms		1429/udp   #Hypercom NMS
+tpdu		1430/tcp   #Hypercom TPDU
+tpdu		1430/udp   #Hypercom TPDU
+rgtp		1431/tcp   #Reverse Gossip Transport
+rgtp		1431/udp   #Reverse Gossip Transport
+blueberry-lm	1432/tcp   #Blueberry Software License Manager
+blueberry-lm	1432/udp   #Blueberry Software License Manager
+ms-sql-s	1433/tcp   #Microsoft-SQL-Server
+ms-sql-s	1433/udp   #Microsoft-SQL-Server
+ms-sql-m	1434/tcp   #Microsoft-SQL-Monitor
+ms-sql-m	1434/udp   #Microsoft-SQL-Monitor
+ibm-cics	1435/tcp
+ibm-cics	1435/udp
+sas-2		1436/tcp   #Satellite-data Acquisition System 2
+sas-2		1436/udp   #Satellite-data Acquisition System 2
+tabula		1437/tcp
+tabula		1437/udp
+eicon-server	1438/tcp   #Eicon Security Agent/Server
+eicon-server	1438/udp   #Eicon Security Agent/Server
+eicon-x25	1439/tcp   #Eicon X25/SNA Gateway
+eicon-x25	1439/udp   #Eicon X25/SNA Gateway
+eicon-slp	1440/tcp   #Eicon Service Location Protocol
+eicon-slp	1440/udp   #Eicon Service Location Protocol
+cadis-1		1441/tcp   #Cadis License Management
+cadis-1		1441/udp   #Cadis License Management
+cadis-2		1442/tcp   #Cadis License Management
+cadis-2		1442/udp   #Cadis License Management
+ies-lm		1443/tcp   #Integrated Engineering Software
+ies-lm		1443/udp   #Integrated Engineering Software
+marcam-lm	1444/tcp   #Marcam  License Management
+marcam-lm	1444/udp   #Marcam  License Management
+proxima-lm	1445/tcp   #Proxima License Manager
+proxima-lm	1445/udp   #Proxima License Manager
+ora-lm		1446/tcp   #Optical Research Associates License Manager
+ora-lm		1446/udp   #Optical Research Associates License Manager
+apri-lm		1447/tcp   #Applied Parallel Research LM
+apri-lm		1447/udp   #Applied Parallel Research LM
+oc-lm		1448/tcp   #OpenConnect License Manager
+oc-lm		1448/udp   #OpenConnect License Manager
+peport		1449/tcp
+peport		1449/udp
+dwf		1450/tcp   #Tandem Distributed Workbench Facility
+dwf		1450/udp   #Tandem Distributed Workbench Facility
+infoman		1451/tcp   #IBM Information Management
+infoman		1451/udp   #IBM Information Management
+gtegsc-lm	1452/tcp   #GTE Government Systems License Man
+gtegsc-lm	1452/udp   #GTE Government Systems License Man
+genie-lm	1453/tcp   #Genie License Manager
+genie-lm	1453/udp   #Genie License Manager
+interhdl_elmd	1454/tcp   #interHDL License Manager
+interhdl_elmd	1454/udp   #interHDL License Manager
+esl-lm		1455/tcp   #ESL License Manager
+esl-lm		1455/udp   #ESL License Manager
+dca		1456/tcp
+dca		1456/udp
+valisys-lm	1457/tcp   #Valisys License Manager
+valisys-lm	1457/udp   #Valisys License Manager
+nrcabq-lm	1458/tcp   #Nichols Research Corp.
+nrcabq-lm	1458/udp   #Nichols Research Corp.
+proshare1	1459/tcp   #Proshare Notebook Application
+proshare1	1459/udp   #Proshare Notebook Application
+proshare2	1460/tcp   #Proshare Notebook Application
+proshare2	1460/udp   #Proshare Notebook Application
+ibm_wrless_lan	1461/tcp   #IBM Wireless LAN
+ibm_wrless_lan	1461/udp   #IBM Wireless LAN
+world-lm	1462/tcp   #World License Manager
+world-lm	1462/udp   #World License Manager
+nucleus		1463/tcp
+nucleus		1463/udp
+msl_lmd		1464/tcp   #MSL License Manager
+msl_lmd		1464/udp   #MSL License Manager
+pipes		1465/tcp   #Pipes Platform
+pipes		1465/udp   #Pipes Platform  mfarlin@peerlogic.com
+oceansoft-lm	1466/tcp   #Ocean Software License Manager
+oceansoft-lm	1466/udp   #Ocean Software License Manager
+csdmbase	1467/tcp
+csdmbase	1467/udp
+csdm		1468/tcp
+csdm		1468/udp
+aal-lm		1469/tcp   #Active Analysis Limited License Manager
+aal-lm		1469/udp   #Active Analysis Limited License Manager
+uaiact		1470/tcp   #Universal Analytics
+uaiact		1470/udp   #Universal Analytics
+csdmbase	1471/tcp
+csdmbase	1471/udp
+csdm		1472/tcp
+csdm		1472/udp
+openmath	1473/tcp
+openmath	1473/udp
+telefinder	1474/tcp
+telefinder	1474/udp
+taligent-lm	1475/tcp   #Taligent License Manager
+taligent-lm	1475/udp   #Taligent License Manager
+clvm-cfg	1476/tcp
+clvm-cfg	1476/udp
+ms-sna-server	1477/tcp
+ms-sna-server	1477/udp
+ms-sna-base	1478/tcp
+ms-sna-base	1478/udp
+dberegister	1479/tcp
+dberegister	1479/udp
+pacerforum	1480/tcp
+pacerforum	1480/udp
+airs		1481/tcp
+airs		1481/udp
+miteksys-lm	1482/tcp   #Miteksys License Manager
+miteksys-lm	1482/udp   #Miteksys License Manager
+afs		1483/tcp   #AFS License Manager
+afs		1483/udp   #AFS License Manager
+confluent	1484/tcp   #Confluent License Manager
+confluent	1484/udp   #Confluent License Manager
+lansource	1485/tcp
+lansource	1485/udp
+nms_topo_serv	1486/tcp
+nms_topo_serv	1486/udp
+localinfosrvr	1487/tcp
+localinfosrvr	1487/udp
+docstor		1488/tcp
+docstor		1488/udp
+dmdocbroker	1489/tcp
+dmdocbroker	1489/udp
+insitu-conf	1490/tcp
+insitu-conf	1490/udp
+anynetgateway	1491/tcp
+anynetgateway	1491/udp
+stone-design-1	1492/tcp
+stone-design-1	1492/udp
+netmap_lm	1493/tcp
+netmap_lm	1493/udp
+ica		1494/tcp
+ica		1494/udp
+cvc		1495/tcp
+cvc		1495/udp
+liberty-lm	1496/tcp
+liberty-lm	1496/udp
+rfx-lm		1497/tcp
+rfx-lm		1497/udp
+watcom-sql	1498/tcp
+watcom-sql	1498/udp
+fhc		1499/tcp   #Federico Heinz Consultora
+fhc		1499/udp   #Federico Heinz Consultora
+vlsi-lm		1500/tcp   #VLSI License Manager
+vlsi-lm		1500/udp   #VLSI License Manager
+sas-3		1501/tcp   #Satellite-data Acquisition System 3
+sas-3		1501/udp   #Satellite-data Acquisition System 3
+shivadiscovery	1502/tcp   #Shiva
+shivadiscovery	1502/udp   #Shiva
+imtc-mcs	1503/tcp   #Databeam
+imtc-mcs	1503/udp   #Databeam
+evb-elm		1504/tcp   #EVB Software Engineering License Manager
+evb-elm		1504/udp   #EVB Software Engineering License Manager
+funkproxy	1505/tcp   #Funk Software, Inc.
+funkproxy	1505/udp   #Funk Software, Inc.
+utcd		1506/tcp   #Universal Time daemon (utcd)
+utcd		1506/udp   #Universal Time daemon (utcd)
+symplex		1507/tcp
+symplex		1507/udp
+diagmond	1508/tcp
+diagmond	1508/udp
+robcad-lm	1509/tcp   #Robcad, Ltd. License Manager
+robcad-lm	1509/udp   #Robcad, Ltd. License Manager
+mvx-lm		1510/tcp   #Midland Valley Exploration Ltd. Lic. Man.
+mvx-lm		1510/udp   #Midland Valley Exploration Ltd. Lic. Man.
+3l-l1		1511/tcp
+3l-l1		1511/udp
+wins		1512/tcp   #Microsoft's Windows Internet Name Service
+wins		1512/udp   #Microsoft's Windows Internet Name Service
+fujitsu-dtc	1513/tcp   #Fujitsu Systems Business of America, Inc
+fujitsu-dtc	1513/udp   #Fujitsu Systems Business of America, Inc
+fujitsu-dtcns	1514/tcp   #Fujitsu Systems Business of America, Inc
+fujitsu-dtcns	1514/udp   #Fujitsu Systems Business of America, Inc
+ifor-protocol	1515/tcp
+ifor-protocol	1515/udp
+vpad		1516/tcp   #Virtual Places Audio data
+vpad		1516/udp   #Virtual Places Audio data
+vpac		1517/tcp   #Virtual Places Audio control
+vpac		1517/udp   #Virtual Places Audio control
+vpvd		1518/tcp   #Virtual Places Video data
+vpvd		1518/udp   #Virtual Places Video data
+vpvc		1519/tcp   #Virtual Places Video control
+vpvc		1519/udp   #Virtual Places Video control
+atm-zip-office	1520/tcp   #atm zip office
+atm-zip-office	1520/udp   #atm zip office
+ncube-lm	1521/tcp   #nCube License Manager
+ncube-lm	1521/udp   #nCube License Manager
+rna-lm		1522/tcp   #Ricardo North America License Manager
+rna-lm		1522/udp   #Ricardo North America License Manager
+cichild-lm	1523/tcp
+cichild-lm	1523/udp
+ingreslock	1524/tcp   #ingres
+ingreslock	1524/udp   #ingres
+prospero-np	1525/tcp   #Prospero Directory Service non-priv
+prospero-np	1525/udp   #Prospero Directory Service non-priv
+#PROBLEMS!========================================================
+orasrv		1525/tcp   #oracle
+orasrv		1525/udp   #oracle
+#PROBLEMS!========================================================
+pdap-np		1526/tcp   #Prospero Data Access Prot non-priv
+pdap-np		1526/udp   #Prospero Data Access Prot non-priv
+tlisrv		1527/tcp   #oracle
+tlisrv		1527/udp   #oracle
+mciautoreg	1528/tcp
+mciautoreg	1528/udp
+support		1529/tcp   prmsd gnatsd	# cygnus bug tracker
+coauthor	1529/tcp   #oracle
+coauthor	1529/udp   #oracle
+rap-service	1530/tcp
+rap-service	1530/udp
+rap-listen	1531/tcp
+rap-listen	1531/udp
+miroconnect	1532/tcp
+miroconnect	1532/udp
+virtual-places	1533/tcp   #Virtual Places Software
+virtual-places	1533/udp   #Virtual Places Software
+micromuse-lm	1534/tcp
+micromuse-lm	1534/udp
+ampr-info	1535/tcp
+ampr-info	1535/udp
+ampr-inter	1536/tcp
+ampr-inter	1536/udp
+sdsc-lm		1537/tcp
+sdsc-lm		1537/udp
+3ds-lm		1538/tcp
+3ds-lm		1538/udp
+intellistor-lm	1539/tcp   #Intellistor License Manager
+intellistor-lm	1539/udp   #Intellistor License Manager
+rds		1540/tcp
+rds		1540/udp
+rds2		1541/tcp
+rds2		1541/udp
+gridgen-elmd	1542/tcp
+gridgen-elmd	1542/udp
+simba-cs	1543/tcp
+simba-cs	1543/udp
+aspeclmd	1544/tcp
+aspeclmd	1544/udp
+vistium-share	1545/tcp
+vistium-share	1545/udp
+abbaccuray	1546/tcp
+abbaccuray	1546/udp
+laplink		1547/tcp
+laplink		1547/udp
+axon-lm		1548/tcp   #Axon License Manager
+axon-lm		1548/udp   #Axon License Manager
+shivahose	1549/tcp   #Shiva Hose
+shivasound	1549/udp   #Shiva Sound
+3m-image-lm	1550/tcp   #Image Storage license manager 3M Company
+3m-image-lm	1550/udp   #Image Storage license manager 3M Company
+hecmtl-db	1551/tcp
+hecmtl-db	1551/udp
+pciarray	1552/tcp
+pciarray	1552/udp
+issd		1600/tcp
+issd		1600/udp
+# IMPORTANT NOTE: Ports 1645/1646 are the traditional radius ports used by
+# many vendors without obtaining official IANA assignment.  The official
+# assignment is now ports 1812/1813 and users are encouraged to migrate
+# when possible to these new ports.
+#radius		1645/udp   #RADIUS authentication protocol (old)
+#radacct	1646/udp   #RADIUS accounting protocol (old)
+nkd		1650/tcp
+nkd		1650/udp
+shiva_confsrvr	1651/tcp
+shiva_confsrvr	1651/udp
+xnmp		1652/tcp
+xnmp		1652/udp
+netview-aix-1	1661/tcp
+netview-aix-1	1661/udp
+netview-aix-2	1662/tcp
+netview-aix-2	1662/udp
+netview-aix-3	1663/tcp
+netview-aix-3	1663/udp
+netview-aix-4	1664/tcp
+netview-aix-4	1664/udp
+netview-aix-5	1665/tcp
+netview-aix-5	1665/udp
+netview-aix-6	1666/tcp
+netview-aix-6	1666/udp
+netview-aix-7	1667/tcp
+netview-aix-7	1667/udp
+netview-aix-8	1668/tcp
+netview-aix-8	1668/udp
+netview-aix-9	1669/tcp
+netview-aix-9	1669/udp
+netview-aix-10	1670/tcp
+netview-aix-10	1670/udp
+netview-aix-11	1671/tcp
+netview-aix-11	1671/udp
+netview-aix-12	1672/tcp
+netview-aix-12	1672/udp
+l2f		1701/tcp   #l2f
+l2f		1701/udp   #l2f
+l2tp		1701/tcp   #Layer 2 Tunnelling Protocol
+l2tp		1701/udp   #Layer 2 Tunnelling Protocol
+pptp		1723/tcp   #Point-to-point tunnelling protocol
+# IMPORTANT NOTE: See comments for ports 1645/1646 when using older equipment
+radius		1812/udp   #RADIUS authentication protocol (IANA sanctioned)
+radacct		1813/udp   #RADIUS accounting protocol (IANA sanctioned)
+licensedaemon	1986/tcp   #cisco license management
+licensedaemon	1986/udp   #cisco license management
+tr-rsrb-p1	1987/tcp   #cisco RSRB Priority 1 port
+tr-rsrb-p1	1987/udp   #cisco RSRB Priority 1 port
+tr-rsrb-p2	1988/tcp   #cisco RSRB Priority 2 port
+tr-rsrb-p2	1988/udp   #cisco RSRB Priority 2 port
+tr-rsrb-p3	1989/tcp   #cisco RSRB Priority 3 port
+tr-rsrb-p3	1989/udp   #cisco RSRB Priority 3 port
+#PROBLEMS!===================================================
+mshnet		1989/tcp   #MHSnet system
+mshnet		1989/udp   #MHSnet system
+#PROBLEMS!===================================================
+stun-p1		1990/tcp   #cisco STUN Priority 1 port
+stun-p1		1990/udp   #cisco STUN Priority 1 port
+stun-p2		1991/tcp   #cisco STUN Priority 2 port
+stun-p2		1991/udp   #cisco STUN Priority 2 port
+stun-p3		1992/tcp   #cisco STUN Priority 3 port
+stun-p3		1992/udp   #cisco STUN Priority 3 port
+#PROBLEMS!===================================================
+ipsendmsg	1992/tcp
+ipsendmsg	1992/udp
+#PROBLEMS!===================================================
+snmp-tcp-port	1993/tcp   #cisco SNMP TCP port
+snmp-tcp-port	1993/udp   #cisco SNMP TCP port
+stun-port	1994/tcp   #cisco serial tunnel port
+stun-port	1994/udp   #cisco serial tunnel port
+perf-port	1995/tcp   #cisco perf port
+perf-port	1995/udp   #cisco perf port
+tr-rsrb-port	1996/tcp   #cisco Remote SRB port
+tr-rsrb-port	1996/udp   #cisco Remote SRB port
+gdp-port	1997/tcp   #cisco Gateway Discovery Protocol
+gdp-port	1997/udp   #cisco Gateway Discovery Protocol
+x25-svc-port	1998/tcp   #cisco X.25 service (XOT)
+x25-svc-port	1998/udp   #cisco X.25 service (XOT)
+tcp-id-port	1999/tcp   #cisco identification port
+tcp-id-port	1999/udp   #cisco identification port
+callbook	2000/tcp
+callbook	2000/udp
+dc		2001/tcp
+wizard		2001/udp   #curry
+globe		2002/tcp
+globe		2002/udp
+cfingerd	2003/tcp   #GNU finger
+mailbox		2004/tcp
+emce		2004/udp   #CCWS mm conf
+berknet		2005/tcp
+oracle		2005/udp
+invokator	2006/tcp
+raid-cc		2006/udp   #raid
+dectalk		2007/tcp
+raid-am		2007/udp
+conf		2008/tcp
+terminaldb	2008/udp
+news		2009/tcp
+whosockami	2009/udp
+search		2010/tcp
+pipe_server	2010/udp
+raid-cc		2011/tcp   #raid
+servserv	2011/udp
+ttyinfo		2012/tcp
+raid-ac		2012/udp
+raid-am		2013/tcp
+raid-cd		2013/udp
+troff		2014/tcp
+raid-sf		2014/udp
+cypress		2015/tcp
+raid-cs		2015/udp
+bootserver	2016/tcp
+bootserver	2016/udp
+cypress-stat	2017/tcp
+bootclient	2017/udp
+terminaldb	2018/tcp
+rellpack	2018/udp
+whosockami	2019/tcp
+about		2019/udp
+xinupageserver	2020/tcp
+xinupageserver	2020/udp
+servexec	2021/tcp
+xinuexpansion1	2021/udp
+down		2022/tcp
+xinuexpansion2	2022/udp
+xinuexpansion3	2023/tcp
+xinuexpansion3	2023/udp
+xinuexpansion4	2024/tcp
+xinuexpansion4	2024/udp
+ellpack		2025/tcp
+xribs		2025/udp
+scrabble	2026/tcp
+scrabble	2026/udp
+shadowserver	2027/tcp
+shadowserver	2027/udp
+submitserver	2028/tcp
+submitserver	2028/udp
+device2		2030/tcp
+device2		2030/udp
+blackboard	2032/tcp
+blackboard	2032/udp
+glogger		2033/tcp
+glogger		2033/udp
+scoremgr	2034/tcp
+scoremgr	2034/udp
+imsldoc		2035/tcp
+imsldoc		2035/udp
+objectmanager	2038/tcp
+objectmanager	2038/udp
+lam		2040/tcp
+lam		2040/udp
+interbase	2041/tcp
+interbase	2041/udp
+isis		2042/tcp
+isis		2042/udp
+isis-bcast	2043/tcp
+isis-bcast	2043/udp
+rimsl		2044/tcp
+rimsl		2044/udp
+cdfunc		2045/tcp
+cdfunc		2045/udp
+sdfunc		2046/tcp
+sdfunc		2046/udp
+#dls		2047/tcp
+#dls		2047/udp
+dls-monitor	2048/tcp
+dls-monitor	2048/udp
+nfsd		2049/tcp   nfs		# NFS server daemon
+nfsd		2049/udp   nfs		# NFS server daemon
+#PROBLEMS!=============================================================
+#shilp		2049/tcp
+#shilp		2049/udp
+#PROBLEMS!=============================================================
+dlsrpn		2065/tcp   #Data Link Switch Read Port Number
+dlsrpn		2065/udp   #Data Link Switch Read Port Number
+dlswpn		2067/tcp   #Data Link Switch Write Port Number
+dlswpn		2067/udp   #Data Link Switch Write Port Number
+zephyr-clt	2103/udp   #Zephyr serv-hm connection
+zephyr-hm	2104/udp   #Zephyr hostmanager
+#PROBLEMS!=============================================================
+#zephyr-hm-srv	2105/udp   #Zephyr hm-serv connection
+#PROBLEMS!=============================================================
+eklogin		2105/tcp   #Kerberos (v4) encrypted rlogin
+eklogin		2105/udp   #Kerberos (v4) encrypted rlogin
+ekshell		2106/tcp   #Kerberos (v4) encrypted rshell
+ekshell		2106/udp   #Kerberos (v4) encrypted rshell
+rkinit		2108/tcp   #Kerberos (v4) remote initialization
+rkinit		2108/udp   #Kerberos (v4) remote initialization
+ats		2201/tcp   #Advanced Training System Program
+ats		2201/udp   #Advanced Training System Program
+ivs-video	2232/tcp   #IVS Video default
+ivs-video	2232/udp   #IVS Video default
+ivsd		2241/tcp   #IVS Daemon
+ivsd		2241/udp   #IVS Daemon
+pehelp		2307/tcp
+pehelp		2307/udp
+cvspserver	2401/tcp   #CVS network server
+cvspserver	2401/udp   #CVS network server
+venus		2430/tcp   #venus
+venus		2430/udp   #venus
+venus-se	2431/tcp   #venus-se
+venus-se	2431/udp   #venus-se
+codasrv		2432/tcp   #codasrv
+codasrv		2432/udp   #codasrv
+codasrv-se	2433/tcp   #codasrv-se
+codasrv-se	2433/udp   #codasrv-se
+rtsserv		2500/tcp   #Resource Tracking system server
+rtsserv		2500/udp   #Resource Tracking system server
+rtsclient	2501/tcp   #Resource Tracking system client
+rtsclient	2501/udp   #Resource Tracking system client
+hp-3000-telnet	2564/tcp   #HP 3000 NS/VT block mode telnet
+zebrasrv	2600/tcp   #zebra service
+zebra		2601/tcp   #zebra vty
+ripd		2602/tcp   #RIPd vty
+ripngd		2603/tcp   #RIPngd vty
+ospfd		2604/tcp   #OSPFd vty
+bgpd		2605/tcp   #BGPd vty
+ospf6d		2606/tcp   #OSPF6d vty
+dict		2628/tcp   #RFC 2229
+dict		2628/udp   #RFC 2229
+listen		2766/tcp   #System V listener port
+www-dev		2784/tcp   #world wide web - development
+www-dev		2784/udp   #world wide web - development
+eppc		3031/tcp   #Remote AppleEvents/PPC Toolbox
+eppc		3031/udp   #Remote AppleEvents/PPC Toolbox
+NSWS		3049/tcp
+NSWS		3049/udp
+gds_db		3050/tcp   #InterBase Database Remote Protocol
+gds_db		3050/udp   #InterBase Database Remote Protocol
+sj3		3086/tcp   #SJ3 (kanji input)
+vmodem		3141/tcp
+vmodem		3141/udp
+ccmail		3264/tcp   #cc:mail/lotus
+ccmail		3264/udp   #cc:mail/lotus
+dec-notes	3333/tcp   #DEC Notes
+dec-notes	3333/udp   #DEC Notes
+rdp		3389/tcp   #Microsoft Remote Desktop Protocol
+bmap		3421/tcp   #Bull Apprise portmapper
+bmap		3421/udp   #Bull Apprise portmapper
+prsvp		3455/tcp   #RSVP Port
+prsvp		3455/udp   rsvp-encap	#RSVP Port
+vat		3456/tcp   #VAT default data
+vat		3456/udp   #VAT default data
+vat-control	3457/tcp   #VAT default control
+vat-control	3457/udp   #VAT default control
+nut		3493/tcp   #Network UPS Tools
+nut		3493/udp   #Network UPS Tools
+tsp		3653/tcp   #Tunnel Setup Protocol
+tsp		3653/udp   #Tunnel Setup Protocol
+svn		3690/tcp   #Subversion
+svn		3690/udp   #Subversion
+udt_os		3900/tcp   #Unidata UDT OS
+udt_os		3900/udp   #Unidata UDT OS
+mapper-nodemgr	3984/tcp   #MAPPER network node manager
+mapper-nodemgr	3984/udp   #MAPPER network node manager
+mapper-mapethd	3985/tcp   #MAPPER TCP/IP server
+mapper-mapethd	3985/udp   #MAPPER TCP/IP server
+mapper-ws_ethd	3986/tcp   #MAPPER workstation server
+mapper-ws_ethd	3986/udp   #MAPPER workstation server
+netcheque	4008/tcp   #NetCheque accounting
+netcheque	4008/udp   #NetCheque accounting
+lockd		4045/udp   # NFS lock daemon/manager
+lockd		4045/tcp
+nuts_dem	4132/tcp   #NUTS Daemon
+nuts_dem	4132/udp   #NUTS Daemon
+nuts_bootp	4133/tcp   #NUTS Bootp Server
+nuts_bootp	4133/udp   #NUTS Bootp Server
+rwhois		4321/tcp   #Remote Who Is
+rwhois		4321/udp   #Remote Who Is
+unicall		4343/tcp
+unicall		4343/udp
+krb524		4444/tcp
+krb524		4444/udp
+# PROBLEM krb524 assigned the port,
+# PROBLEM nv used it without an assignment
+nv-video	4444/tcp   #NV Video default
+nv-video	4444/udp   #NV Video default
+sae-urn		4500/tcp
+sae-urn		4500/udp
+fax		4557/tcp   #FAX transmission service
+hylafax		4559/tcp   #HylaFAX client-server protocol
+rfa		4672/tcp   #remote file access server
+rfa		4672/udp   #remote file access server
+commplex-main	5000/tcp
+commplex-main	5000/udp
+commplex-link	5001/tcp
+commplex-link	5001/udp
+rfe		5002/tcp   #radio free ethernet
+rfe		5002/udp   #radio free ethernet
+telelpathstart	5010/tcp
+telelpathstart	5010/udp
+telelpathattack	5011/tcp
+telelpathattack	5011/udp
+mmcc		5050/tcp   #multimedia conference control tool
+mmcc		5050/udp   #multimedia conference control tool
+rmonitor_secure	5145/tcp
+rmonitor_secure	5145/udp
+aol		5190/tcp   #America-Online
+aol		5190/udp   #America-Online
+aol-1		5191/tcp   #AmericaOnline1
+aol-1		5191/udp   #AmericaOnline1
+aol-2		5192/tcp   #AmericaOnline2
+aol-2		5192/udp   #AmericaOnline2
+aol-3		5193/tcp   #AmericaOnline3
+aol-3		5193/udp   #AmericaOnline3
+jabber-client	5222/tcp   #Jabber Client Connection
+jabber-client	5222/udp   #Jabber Client Connection
+padl2sim	5236/tcp
+padl2sim	5236/udp
+jabber-server	5269/tcp   #Jabber Server Connection
+jabber-server	5269/udp   #Jabber Server Connection
+hacl-hb		5300/tcp   # HA cluster heartbeat
+hacl-hb		5300/udp   # HA cluster heartbeat
+hacl-gs		5301/tcp   # HA cluster general services
+hacl-gs		5301/udp   # HA cluster general services
+hacl-cfg	5302/tcp   # HA cluster configuration
+hacl-cfg	5302/udp   # HA cluster configuration
+hacl-probe	5303/tcp   # HA cluster probing
+hacl-probe	5303/udp   # HA cluster probing
+hacl-local	5304/tcp
+hacl-local	5304/udp
+hacl-test	5305/tcp
+hacl-test	5305/udp
+cfengine	5308/tcp
+cfengine	5308/udp
+mdns		5353/tcp   #Multicast DNS
+mdns		5353/udp   #Multicast DNS
+postgresql	5432/tcp   #PostgreSQL Database
+postgresql	5432/udp   #PostgreSQL Database
+rplay		5555/udp
+canna		5680/tcp   #Canna (Japanese Input)
+proshareaudio	5713/tcp   #proshare conf audio
+proshareaudio	5713/udp   #proshare conf audio
+prosharevideo	5714/tcp   #proshare conf video
+prosharevideo	5714/udp   #proshare conf video
+prosharedata	5715/tcp   #proshare conf data
+prosharedata	5715/udp   #proshare conf data
+prosharerequest	5716/tcp   #proshare conf request
+prosharerequest	5716/udp   #proshare conf request
+prosharenotify	5717/tcp   #proshare conf notify
+prosharenotify	5717/udp   #proshare conf notify
+cvsup		5999/tcp   #CVSup file transfer/John Polstra/FreeBSD
+x11		6000/tcp   #6000-6063 are assigned to X Window System
+x11		6000/udp
+x11-ssh		6010/tcp   #Unofficial name, for convenience
+x11-ssh		6010/udp
+softcm		6110/tcp   #HP SoftBench CM
+softcm		6110/udp   #HP SoftBench CM
+spc		6111/tcp   #HP SoftBench Sub-Process Control
+spc		6111/udp   #HP SoftBench Sub-Process Control
+meta-corp	6141/tcp   #Meta Corporation License Manager
+meta-corp	6141/udp   #Meta Corporation License Manager
+aspentec-lm	6142/tcp   #Aspen Technology License Manager
+aspentec-lm	6142/udp   #Aspen Technology License Manager
+watershed-lm	6143/tcp   #Watershed License Manager
+watershed-lm	6143/udp   #Watershed License Manager
+statsci1-lm	6144/tcp   #StatSci License Manager - 1
+statsci1-lm	6144/udp   #StatSci License Manager - 1
+statsci2-lm	6145/tcp   #StatSci License Manager - 2
+statsci2-lm	6145/udp   #StatSci License Manager - 2
+lonewolf-lm	6146/tcp   #Lone Wolf Systems License Manager
+lonewolf-lm	6146/udp   #Lone Wolf Systems License Manager
+montage-lm	6147/tcp   #Montage License Manager
+montage-lm	6147/udp   #Montage License Manager
+ricardo-lm	6148/tcp   #Ricardo North America License Manager
+ricardo-lm	6148/udp   #Ricardo North America License Manager
+xdsxdm		6558/tcp
+xdsxdm		6558/udp
+ircd		6667/tcp   #Internet Relay Chat (unoffical)
+acmsoda		6969/tcp
+acmsoda		6969/udp
+afs3-fileserver	7000/tcp   #file server itself
+afs3-fileserver	7000/udp   #file server itself
+afs3-callback	7001/tcp   #callbacks to cache managers
+afs3-callback	7001/udp   #callbacks to cache managers
+afs3-prserver	7002/tcp   #users & groups database
+afs3-prserver	7002/udp   #users & groups database
+afs3-vlserver	7003/tcp   #volume location database
+afs3-vlserver	7003/udp   #volume location database
+afs3-kaserver	7004/tcp   #AFS/Kerberos authentication service
+afs3-kaserver	7004/udp   #AFS/Kerberos authentication service
+afs3-volser	7005/tcp   #volume management server
+afs3-volser	7005/udp   #volume management server
+afs3-errors	7006/tcp   #error interpretation service
+afs3-errors	7006/udp   #error interpretation service
+afs3-bos	7007/tcp   #basic overseer process
+afs3-bos	7007/udp   #basic overseer process
+afs3-update	7008/tcp   #server-to-server updater
+afs3-update	7008/udp   #server-to-server updater
+afs3-rmtsys	7009/tcp   #remote cache manager service
+afs3-rmtsys	7009/udp   #remote cache manager service
+afs3-resserver	7010/tcp   #MR-AFS residence server
+afs3-resserver	7010/udp   #MR-AFS residence server
+ups-onlinet	7010/tcp   #onlinet uninterruptable power supplies
+ups-onlinet	7010/udp   #onlinet uninterruptable power supplies
+afs3-remio	7011/tcp   #MR-AFS remote IO server
+afs3-remio	7011/udp   #MR-AFS remote IO server
+font-service	7100/tcp   #X Font Service
+font-service	7100/udp   #X Font Service
+fodms		7200/tcp   #FODMS FLIP
+fodms		7200/udp   #FODMS FLIP
+dlip		7201/tcp
+dlip		7201/udp
+ftp-proxy	8021/tcp   # FTP proxy
+natd		8668/divert # Network Address Translation
+jetdirect	9100/tcp   #HP JetDirect card
+git		9418/tcp   # Git Version Control System
+man		9535/tcp
+man		9535/udp
+sd		9876/tcp   #Session Director
+sd		9876/udp   #Session Director
+amanda		10080/udp  #Dump server control
+amandaidx	10082/tcp  #Amanda indexing
+amidxtape	10083/tcp  #Amanda tape indexing
+isode-dua	17007/tcp
+isode-dua	17007/udp
+biimenu		18000/tcp  #Beckman Instruments, Inc.
+biimenu		18000/udp  #Beckman Instruments, Inc.
+wnn4		22273/tcp  wnn6		#Wnn4 (Japanese input)
+wnn4_Cn		22289/tcp  wnn6_Cn	#Wnn4 (Chinese input)
+wnn4_Kr		22305/tcp  wnn6_Kr	#Wnn4 (Korean input)
+wnn4_Tw		22321/tcp  wnn6_Tw	#Wnn4 (Taiwanse input)
+wnn6_DS		26208/tcp  #Wnn6 (Dserver)
+dbbrowse	47557/tcp  #Databeam Corporation
+dbbrowse	47557/udp  #Databeam Corporation
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/shadow b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/shadow
new file mode 100644
index 000000000..d5dc3974d
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/shadow
@@ -0,0 +1,18 @@
+root:$1$OJeedGT3$uG0eWkNhkeq0WO6Wldk1Y.:13200:0:99999:7:::
+daemon:!:13200:0:99999:7:::
+bin:!:13200:0:99999:7:::
+sys:!:13200:0:99999:7:::
+sync:!:13200:0:99999:7:::
+mail:!:13200:0:99999:7:::
+proxy:!:13200:0:99999:7:::
+www-data:!:13200:0:99999:7:::
+backup:!:13200:0:99999:7:::
+operator:!:13200:0:99999:7:::
+haldaemon:!:13200:0:99999:7:::
+dbus:!:13200:0:99999:7:::
+ftp:!:13200:0:99999:7:::
+dnsmasq:!:13200:0:99999:7:::
+sshd:!:13200:0:99999:7:::
+nobody:!:13200:0:99999:7:::
+avr32:$1$TVWxUVs7$/ze18sFeD6F26w0hgyB6M.:13200:0:99999:7:::
+default:!:13200:0:99999:7:::
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/etc/shells b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/shells
new file mode 100644
index 000000000..6ee110ced
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/etc/shells
@@ -0,0 +1,8 @@
+# /etc/shells: valid login shells
+/bin/ash
+/bin/sh
+/bin/zsh
+/bin/bash
+/usr/bin/zsh
+/usr/bin/bash
+/usr/bin/screen
diff --git a/target/device/Atmel/atngw100-expanded/target_skeleton/usr/share/udhcpc/default.script b/target/device/Atmel/atngw100-expanded/target_skeleton/usr/share/udhcpc/default.script
new file mode 100644
index 000000000..56cbaf6c4
--- /dev/null
+++ b/target/device/Atmel/atngw100-expanded/target_skeleton/usr/share/udhcpc/default.script
@@ -0,0 +1,19 @@
+#!/bin/sh
+
+
+case $1 in
+    deconfig)
+	ifconfig $interface 0.0.0.0
+	;;
+    bound|renew)
+	ifconfig $interface $ip netmask $subnet broadcast $broadcast
+	route add default gw $router
+	echo -n > /etc/resolv.conf
+	[ -z "$domain" ] || echo "domain $domain" >> /etc/resolv.conf
+	for n in $dns; do echo "nameserver $n" >> /etc/resolv.conf; done
+	if [ ! -z "$hostname" ]; then
+		echo $hostname > /etc/hostname
+		hostname $hostname
+	fi
+	;;
+esac
diff --git a/target/device/Atmel/atngw100/Makefile.in b/target/device/Atmel/atngw100/Makefile.in
index f45c599c1..f0dc063ad 100644
--- a/target/device/Atmel/atngw100/Makefile.in
+++ b/target/device/Atmel/atngw100/Makefile.in
@@ -1,12 +1,6 @@
-ifeq ($(BOARD_NAME),atngw100)
-#BR2_PACKAGE_BUSYBOX_CONFIG=$(ATNGW100_PATH)/busybox.config
-#UCLIBC_CONFIG_FILE=target/device/Atmel/uClibc.config.$(ARCH)
+ifeq ($(strip $(BR2_TARGET_AVR32_ATNGW100)),y)
+ATNGW100_PATH=target/device/Atmel/atngw100
 
-TARGET_SKELETON=$(BOARD_PATH)/target_skeleton
-TARGET_DEVICE_TABLE=$(BOARD_PATH)/device_table.txt
-
-ifeq ($(strip $(BR2_PACKAGE_LINUX)),y)
-#LINUX26_FORMAT=uImage
-#LINUX26_KCONFIG=$(BOARD_PATH)/linux26.config
-endif
+TARGET_SKELETON=$(ATNGW100_PATH)/target_skeleton
+TARGET_DEVICE_TABLE=$(ATNGW100_PATH)/device_table.txt
 endif
diff --git a/target/device/Atmel/atngw100/atngw100-linux-2.6.23.config b/target/device/Atmel/atngw100/atngw100-linux-2.6.23.config
new file mode 100644
index 000000000..3cdddd384
--- /dev/null
+++ b/target/device/Atmel/atngw100/atngw100-linux-2.6.23.config
@@ -0,0 +1,1114 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+# CONFIG_TASK_XACCT is not set
+# CONFIG_USER_NS is not set
+CONFIG_AUDIT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_CPU_AT32AP7001 is not set
+# CONFIG_CPU_AT32AP7002 is not set
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_GPIO_DEV=y
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+CONFIG_DW_DMAC=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_CMDLINE=""
+
+#
+# Power managment options
+#
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK_ENABLED=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+CONFIG_NF_CT_PROTO_GRE=m
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+CONFIG_NF_CONNTRACK_FTP=m
+# CONFIG_NF_CONNTRACK_H323 is not set
+CONFIG_NF_CONNTRACK_IRC=m
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+CONFIG_NF_CONNTRACK_PPTP=m
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+CONFIG_NF_CONNTRACK_TFTP=m
+# CONFIG_NF_CT_NETLINK is not set
+CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
+CONFIG_NETFILTER_XT_TARGET_DSCP=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_TARGET_TRACE=m
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+CONFIG_NETFILTER_XT_MATCH_DSCP=m
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_U32=m
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+# CONFIG_NF_NAT_SNMP_BASIC is not set
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+# CONFIG_NF_NAT_AMANDA is not set
+CONFIG_NF_NAT_PPTP=m
+# CONFIG_NF_NAT_H323 is not set
+# CONFIG_NF_NAT_SIP is not set
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x80000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+CONFIG_PPPOL2TP=m
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_ATMELTWI=m
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=y
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_ATMELMCI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=y
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+CONFIG_CONFIGFS_FS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_FORCED_INLINING is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_KPROBES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_AUDIT_GENERIC=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atngw100/atngw100-linux-2.6.24.config b/target/device/Atmel/atngw100/atngw100-linux-2.6.24.config
new file mode 100644
index 000000000..06046074d
--- /dev/null
+++ b/target/device/Atmel/atngw100/atngw100-linux-2.6.24.config
@@ -0,0 +1,1147 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc7
+# Wed Jan  9 23:20:41 2008
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_FAIR_USER_SCHED=y
+# CONFIG_FAIR_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_BOARD_ATSTK1000 is not set
+CONFIG_BOARD_ATNGW100=y
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_CMDLINE=""
+
+#
+# Power management options
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_STAT is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_AT32AP=y
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=y
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+# CONFIG_IP_PIMSM_V2 is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_XFRM_TUNNEL=y
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+CONFIG_NF_CONNTRACK_ENABLED=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+# CONFIG_NF_CONNTRACK_EVENTS is not set
+CONFIG_NF_CT_PROTO_GRE=m
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+CONFIG_NF_CONNTRACK_AMANDA=m
+CONFIG_NF_CONNTRACK_FTP=m
+CONFIG_NF_CONNTRACK_H323=m
+CONFIG_NF_CONNTRACK_IRC=m
+CONFIG_NF_CONNTRACK_NETBIOS_NS=m
+CONFIG_NF_CONNTRACK_PPTP=m
+CONFIG_NF_CONNTRACK_SANE=m
+CONFIG_NF_CONNTRACK_SIP=m
+CONFIG_NF_CONNTRACK_TFTP=m
+CONFIG_NETFILTER_XTABLES=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+CONFIG_NETFILTER_XT_MATCH_ESP=m
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+CONFIG_NETFILTER_XT_MATCH_POLICY=m
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_NF_NAT_SNMP_BASIC=m
+CONFIG_NF_NAT_PROTO_GRE=m
+CONFIG_NF_NAT_FTP=m
+CONFIG_NF_NAT_IRC=m
+CONFIG_NF_NAT_TFTP=m
+CONFIG_NF_NAT_AMANDA=m
+CONFIG_NF_NAT_PPTP=m
+CONFIG_NF_NAT_H323=m
+CONFIG_NF_NAT_SIP=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_TARGET_CLUSTERIP=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration (EXPERIMENTAL)
+#
+CONFIG_NF_CONNTRACK_IPV6=m
+CONFIG_IP6_NF_QUEUE=m
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_OWNER=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+CONFIG_IP6_NF_MATCH_AH=m
+CONFIG_IP6_NF_MATCH_MH=m
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+CONFIG_IP6_NF_TARGET_REJECT=m
+CONFIG_IP6_NF_MANGLE=m
+CONFIG_IP6_NF_TARGET_HL=m
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+# CONFIG_BRIDGE_NF_EBTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x80000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=y
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=y
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_SPI=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=y
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_NFSD_TCP=y
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=m
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+CONFIG_INSTRUMENTATION=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_KPROBES=y
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_FORCED_INLINING is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atngw100/busybox-1.7.2.config b/target/device/Atmel/atngw100/busybox-1.7.2.config
index 4f567b753..bc1c88cc7 100644
--- a/target/device/Atmel/atngw100/busybox-1.7.2.config
+++ b/target/device/Atmel/atngw100/busybox-1.7.2.config
@@ -1,7 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Busybox version: 1.6.1
-# Fri Jul 27 14:57:35 2007
+# Busybox version: 1.7.2
 #
 CONFIG_HAVE_DOT_CONFIG=y
 
@@ -27,13 +26,13 @@ CONFIG_FEATURE_DEVPTS=y
 # CONFIG_FEATURE_CLEAN_UP is not set
 # CONFIG_FEATURE_PIDFILE is not set
 CONFIG_FEATURE_SUID=y
-CONFIG_FEATURE_SYSLOG=y
 # CONFIG_FEATURE_SUID_CONFIG is not set
 # CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
-CONFIG_FEATURE_HAVE_RPC=y
 # CONFIG_SELINUX is not set
 # CONFIG_FEATURE_PREFER_APPLETS is not set
 CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
 
 #
 # Build Options
@@ -62,21 +61,26 @@ CONFIG_INCLUDE_SUSv2=y
 CONFIG_INSTALL_APPLET_SYMLINKS=y
 # CONFIG_INSTALL_APPLET_HARDLINKS is not set
 # CONFIG_INSTALL_APPLET_DONT is not set
-CONFIG_PREFIX="/home/avr32/buildroot/project_build_avr32/atngw100/root"
+CONFIG_PREFIX="/home/avr32/buildroot/project_build_avr32_nofpu/atngw100/root"
 
 #
 # Busybox Library Tuning
 #
 CONFIG_PASSWORD_MINLEN=6
 CONFIG_MD5_SIZE_VS_SPEED=2
-# CONFIG_FEATURE_EDITING is not set
-# CONFIG_FEATURE_EDITING_FANCY_KEYS is not set
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
 # CONFIG_FEATURE_EDITING_VI is not set
-CONFIG_FEATURE_EDITING_HISTORY=
-# CONFIG_FEATURE_EDITING_SAVEHISTORY is not set
-# CONFIG_FEATURE_TAB_COMPLETION is not set
+CONFIG_FEATURE_EDITING_HISTORY=15
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
 # CONFIG_FEATURE_USERNAME_COMPLETION is not set
 # CONFIG_FEATURE_EDITING_FANCY_PROMPT is not set
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
 
 #
 # Applets
@@ -97,6 +101,7 @@ CONFIG_FEATURE_EDITING_HISTORY=
 # CONFIG_GZIP is not set
 # CONFIG_RPM2CPIO is not set
 # CONFIG_RPM is not set
+# CONFIG_FEATURE_RPM_BZ2 is not set
 CONFIG_TAR=y
 CONFIG_FEATURE_TAR_CREATE=y
 CONFIG_FEATURE_TAR_BZIP2=y
@@ -105,6 +110,7 @@ CONFIG_FEATURE_TAR_LZMA=y
 CONFIG_FEATURE_TAR_GZIP=y
 # CONFIG_FEATURE_TAR_COMPRESS is not set
 # CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set
+# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
 CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
 # CONFIG_FEATURE_TAR_LONG_OPTIONS is not set
 # CONFIG_UNCOMPRESS is not set
@@ -132,7 +138,6 @@ CONFIG_CHMOD=y
 CONFIG_CHOWN=y
 CONFIG_CHROOT=y
 # CONFIG_CKSUM is not set
-CONFIG_CMP=y
 # CONFIG_COMM is not set
 CONFIG_CP=y
 CONFIG_CUT=y
@@ -142,10 +147,6 @@ CONFIG_DD=y
 # CONFIG_FEATURE_DD_SIGNAL_HANDLING is not set
 # CONFIG_FEATURE_DD_IBS_OBS is not set
 CONFIG_DF=y
-# CONFIG_DIFF is not set
-# CONFIG_FEATURE_DIFF_BINARY is not set
-# CONFIG_FEATURE_DIFF_DIR is not set
-# CONFIG_FEATURE_DIFF_MINIMAL is not set
 CONFIG_DIRNAME=y
 CONFIG_DOS2UNIX=y
 CONFIG_UNIX2DOS=y
@@ -155,6 +156,8 @@ CONFIG_ECHO=y
 CONFIG_FEATURE_FANCY_ECHO=y
 CONFIG_ENV=y
 # CONFIG_FEATURE_ENV_LONG_OPTIONS is not set
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
 CONFIG_EXPR=y
 CONFIG_EXPR_MATH_SUPPORT_64=y
 CONFIG_FALSE=y
@@ -190,6 +193,8 @@ CONFIG_NICE=y
 # CONFIG_PRINTENV is not set
 # CONFIG_PRINTF is not set
 CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
 # CONFIG_REALPATH is not set
 CONFIG_RM=y
 CONFIG_RMDIR=y
@@ -219,11 +224,12 @@ CONFIG_TOUCH=y
 CONFIG_TRUE=y
 CONFIG_TTY=y
 CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
 CONFIG_UNIQ=y
 CONFIG_USLEEP=y
 CONFIG_UUDECODE=y
 CONFIG_UUENCODE=y
-# CONFIG_WATCH is not set
 CONFIG_WC=y
 # CONFIG_FEATURE_WC_LARGE is not set
 CONFIG_WHO=y
@@ -273,8 +279,6 @@ CONFIG_SETCONSOLE=y
 #
 CONFIG_MKTEMP=y
 # CONFIG_PIPE_PROGRESS is not set
-CONFIG_READLINK=y
-CONFIG_FEATURE_READLINK_FOLLOW=y
 CONFIG_RUN_PARTS=y
 CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
 # CONFIG_FEATURE_RUN_PARTS_FANCY is not set
@@ -286,12 +290,18 @@ CONFIG_WHICH=y
 #
 # Editors
 #
-# CONFIG_AWK is not set
-# CONFIG_FEATURE_AWK_MATH is not set
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+# CONFIG_CMP is not set
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+# CONFIG_FEATURE_DIFF_MINIMAL is not set
 # CONFIG_ED is not set
 CONFIG_PATCH=y
 CONFIG_SED=y
 CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
 CONFIG_FEATURE_VI_COLON=y
 CONFIG_FEATURE_VI_YANKMARK=y
 CONFIG_FEATURE_VI_SEARCH=y
@@ -314,6 +324,7 @@ CONFIG_FEATURE_FIND_MMIN=y
 CONFIG_FEATURE_FIND_PERM=y
 CONFIG_FEATURE_FIND_TYPE=y
 CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
 CONFIG_FEATURE_FIND_NEWER=y
 CONFIG_FEATURE_FIND_INUM=y
 CONFIG_FEATURE_FIND_EXEC=y
@@ -326,6 +337,8 @@ CONFIG_FEATURE_FIND_SIZE=y
 CONFIG_FEATURE_FIND_PRUNE=y
 CONFIG_FEATURE_FIND_DELETE=y
 CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
 CONFIG_GREP=y
 CONFIG_FEATURE_GREP_EGREP_ALIAS=y
 CONFIG_FEATURE_GREP_FGREP_ALIAS=y
@@ -366,11 +379,14 @@ CONFIG_GETTY=y
 CONFIG_FEATURE_UTMP=y
 # CONFIG_FEATURE_WTMP is not set
 CONFIG_LOGIN=y
+# CONFIG_PAM is not set
 CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
 CONFIG_FEATURE_SECURETTY=y
 CONFIG_PASSWD=y
 CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
 # CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
 CONFIG_SU=y
 CONFIG_FEATURE_SU_SYSLOG=y
 CONFIG_FEATURE_SU_CHECKS_SHELLS=y
@@ -441,6 +457,7 @@ CONFIG_IPCS=y
 CONFIG_MDEV=y
 CONFIG_FEATURE_MDEV_CONF=y
 CONFIG_FEATURE_MDEV_EXEC=y
+# CONFIG_FEATURE_MDEV_LOAD_FIRMWARE is not set
 CONFIG_MKSWAP=y
 # CONFIG_FEATURE_MKSWAP_V0 is not set
 CONFIG_MORE=y
@@ -502,7 +519,6 @@ CONFIG_FEATURE_LESS_REGEXP=y
 # CONFIG_FEATURE_MAKEDEVS_TABLE is not set
 # CONFIG_MOUNTPOINT is not set
 CONFIG_MT=y
-# CONFIG_NMETER is not set
 # CONFIG_RAIDAUTORUN is not set
 # CONFIG_READAHEAD is not set
 # CONFIG_RUNLEVEL is not set
@@ -512,6 +528,7 @@ CONFIG_STRINGS=y
 # CONFIG_TASKSET is not set
 # CONFIG_FEATURE_TASKSET_FANCY is not set
 CONFIG_TIME=y
+# CONFIG_TTYSIZE is not set
 CONFIG_WATCHDOG=y
 
 #
@@ -529,6 +546,7 @@ CONFIG_ARPING=y
 # CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
 CONFIG_HOSTNAME=y
 CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
 CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
 CONFIG_FEATURE_HTTPD_SETUID=y
 CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
@@ -538,6 +556,7 @@ CONFIG_FEATURE_HTTPD_CGI=y
 CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
 CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
 CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
 CONFIG_IFCONFIG=y
 CONFIG_FEATURE_IFCONFIG_STATUS=y
 # CONFIG_FEATURE_IFCONFIG_SLIP is not set
@@ -545,6 +564,7 @@ CONFIG_FEATURE_IFCONFIG_STATUS=y
 CONFIG_FEATURE_IFCONFIG_HW=y
 # CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
 CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
 # CONFIG_FEATURE_IFUPDOWN_IP is not set
 # CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
 CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
@@ -583,8 +603,10 @@ CONFIG_FEATURE_NETSTAT_WIDE=y
 CONFIG_NSLOOKUP=y
 CONFIG_PING=y
 CONFIG_PING6=y
+# CONFIG_PSCAN is not set
 CONFIG_FEATURE_FANCY_PING=y
 CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
 CONFIG_TELNET=y
 CONFIG_FEATURE_TELNET_TTYPE=y
 # CONFIG_FEATURE_TELNET_AUTOLOGIN is not set
@@ -602,8 +624,8 @@ CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
 # CONFIG_APP_UDHCPD is not set
 # CONFIG_APP_DHCPRELAY is not set
 # CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
 CONFIG_APP_UDHCPC=y
-CONFIG_FEATURE_UDHCP_SYSLOG=y
 # CONFIG_FEATURE_UDHCP_DEBUG is not set
 # CONFIG_FEATURE_RFC3397 is not set
 CONFIG_VCONFIG=y
@@ -621,6 +643,7 @@ CONFIG_FREE=y
 CONFIG_KILL=y
 CONFIG_KILLALL=y
 CONFIG_KILLALL5=y
+# CONFIG_NMETER is not set
 CONFIG_PIDOF=y
 CONFIG_FEATURE_PIDOF_SINGLE=y
 CONFIG_FEATURE_PIDOF_OMIT=y
@@ -630,7 +653,10 @@ CONFIG_FEATURE_PS_WIDE=y
 # CONFIG_BB_SYSCTL is not set
 CONFIG_TOP=y
 CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+# CONFIG_FEATURE_TOP_DECIMALS is not set
 CONFIG_UPTIME=y
+CONFIG_WATCH=y
 
 #
 # Shells
@@ -707,10 +733,13 @@ CONFIG_LOGGER=y
 # CONFIG_GETSEBOOL is not set
 # CONFIG_LOAD_POLICY is not set
 # CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
 # CONFIG_RUNCON is not set
 # CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
 # CONFIG_SELINUXENABLED is not set
 # CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
 
 #
 # ipsvd utilities
diff --git a/target/device/Atmel/atngw100/busybox-1.8.0.config b/target/device/Atmel/atngw100/busybox-1.8.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100/busybox-1.8.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100/busybox-1.9.0.config b/target/device/Atmel/atngw100/busybox-1.9.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100/busybox-1.9.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100/busybox-1.9.1.config b/target/device/Atmel/atngw100/busybox-1.9.1.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atngw100/busybox-1.9.1.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atngw100/device_table.txt b/target/device/Atmel/atngw100/device_table.txt
index 2848363b9..1b76a3040 100644
--- a/target/device/Atmel/atngw100/device_table.txt
+++ b/target/device/Atmel/atngw100/device_table.txt
@@ -47,6 +47,7 @@
 /var/tmp	d	1777	0	0	-	-	-	-	-
 /home/avr32	d	2755	500	500	-	-	-	-	-
 /home/default	d	2755	1000	1000	-	-	-	-	-
+/media		d	755	0	0	-	-	-	-	-
 /www		d	755	0	0	-	-	-	-	-
 #<name>					<type>	<mode>	<uid>	<gid>	<major>	<minor>	<start>	<inc>	<count>
 /bin/busybox				f	4755	0	0	-	-	-	-	-
@@ -56,7 +57,6 @@
 /etc/network/if-pre-up.d		d	755	0	0	-	-	-	-	-
 /etc/network/if-down.d			d	755	0	0	-	-	-	-	-
 /etc/network/if-post-down.d		d	755	0	0	-	-	-	-	-
-/usr/share/udhcpc/default.script	f	755	0	0	-	-	-	-	-
 # uncomment this to allow starting x as non-root
 #/usr/X11R6/bin/Xfbdev		f	4755	0	0	-	-	-	-	-
 # Normal system devices
diff --git a/target/device/Atmel/atngw100/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
new file mode 100644
index 000000000..1f0a5f542
--- /dev/null
+++ b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
@@ -0,0 +1,19857 @@
+ MAINTAINERS                                |    7 +
+ Makefile                                   |    2 +-
+ arch/avr32/Kconfig                         |   34 +-
+ arch/avr32/Makefile                        |    3 +-
+ arch/avr32/boards/atngw100/Kconfig         |   12 +
+ arch/avr32/boards/atngw100/flash.c         |    5 +-
+ arch/avr32/boards/atngw100/setup.c         |   26 +-
+ arch/avr32/boards/atstk1000/Kconfig        |   82 +-
+ arch/avr32/boards/atstk1000/Makefile       |    2 +
+ arch/avr32/boards/atstk1000/atstk1000.h    |    2 +
+ arch/avr32/boards/atstk1000/atstk1002.c    |  148 ++-
+ arch/avr32/boards/atstk1000/atstk1003.c    |  181 +++
+ arch/avr32/boards/atstk1000/atstk1004.c    |  152 +++
+ arch/avr32/boards/atstk1000/flash.c        |    5 +-
+ arch/avr32/boards/atstk1000/setup.c        |   64 +
+ arch/avr32/configs/atngw100_defconfig      |  210 +++-
+ arch/avr32/configs/atstk1002_defconfig     |  482 +++++--
+ arch/avr32/configs/atstk1003_defconfig     | 1045 ++++++++++++++
+ arch/avr32/configs/atstk1004_defconfig     |  722 ++++++++++
+ arch/avr32/drivers/Makefile                |    1 +
+ arch/avr32/drivers/dw-dmac.c               |  761 +++++++++++
+ arch/avr32/drivers/dw-dmac.h               |   42 +
+ arch/avr32/kernel/Makefile                 |    6 +-
+ arch/avr32/kernel/dma-controller.c         |   34 +
+ arch/avr32/kernel/entry-avr32b.S           |   26 +-
+ arch/avr32/kernel/setup.c                  |    2 +-
+ arch/avr32/kernel/vmlinux.lds.S            |  143 ++
+ arch/avr32/kernel/vmlinux.lds.c            |  142 --
+ arch/avr32/mach-at32ap/Kconfig             |   19 +-
+ arch/avr32/mach-at32ap/Makefile            |    5 +-
+ arch/avr32/mach-at32ap/at32ap7000.c        | 1324 ------------------
+ arch/avr32/mach-at32ap/at32ap700x.c        | 1754 ++++++++++++++++++++++++
+ arch/avr32/mach-at32ap/clock.c             |  116 ++
+ arch/avr32/mach-at32ap/gpio-dev.c          |  573 ++++++++
+ arch/avr32/mach-at32ap/hsmc.c              |  129 ++-
+ arch/avr32/mach-at32ap/pio.c               |   80 ++
+ arch/avr32/mach-at32ap/pm.h                |    8 +
+ arch/avr32/mm/dma-coherent.c               |    7 +
+ arch/avr32/mm/init.c                       |   12 +-
+ drivers/char/watchdog/Kconfig              |    2 +-
+ drivers/char/watchdog/at32ap700x_wdt.c     |   69 +-
+ drivers/i2c/busses/Kconfig                 |    8 +
+ drivers/i2c/busses/Makefile                |    1 +
+ drivers/i2c/busses/i2c-atmeltwi.c          |  436 ++++++
+ drivers/i2c/busses/i2c-atmeltwi.h          |  117 ++
+ drivers/misc/Kconfig                       |    9 +
+ drivers/misc/Makefile                      |    1 +
+ drivers/misc/atmel-ssc.c                   |  174 +++
+ drivers/mmc/host/Kconfig                   |   10 +
+ drivers/mmc/host/Makefile                  |    1 +
+ drivers/mmc/host/atmel-mci.c               | 1176 ++++++++++++++++
+ drivers/mmc/host/atmel-mci.h               |  192 +++
+ drivers/mtd/chips/cfi_cmdset_0001.c        |   43 +
+ drivers/mtd/chips/cfi_cmdset_0002.c        |    6 +-
+ drivers/pcmcia/Kconfig                     |    7 +
+ drivers/pcmcia/Makefile                    |    1 +
+ drivers/pcmcia/at32_cf.c                   |  531 ++++++++
+ drivers/pcmcia/cistpl.c                    |   48 +-
+ drivers/spi/atmel_spi.c                    |    4 +-
+ drivers/usb/gadget/Kconfig                 |   26 +-
+ drivers/usb/gadget/Makefile                |    1 +
+ drivers/usb/gadget/atmel_usba_udc.c        | 2038 ++++++++++++++++++++++++++++
+ drivers/usb/gadget/atmel_usba_udc.h        |  350 +++++
+ drivers/video/atmel_lcdfb.c                |    6 +-
+ drivers/video/backlight/Kconfig            |   12 +
+ drivers/video/backlight/Makefile           |    2 +
+ drivers/video/backlight/ltv350qv.c         |  339 +++++
+ drivers/video/backlight/ltv350qv.h         |   95 ++
+ include/asm-avr32/arch-at32ap/at32ap7000.h |   35 -
+ include/asm-avr32/arch-at32ap/at32ap700x.h |   35 +
+ include/asm-avr32/arch-at32ap/board.h      |   39 +
+ include/asm-avr32/arch-at32ap/cpu.h        |    2 +-
+ include/asm-avr32/arch-at32ap/io.h         |    4 +-
+ include/asm-avr32/arch-at32ap/portmux.h    |   13 +
+ include/asm-avr32/arch-at32ap/smc.h        |   51 +-
+ include/asm-avr32/dma-controller.h         |  166 +++
+ include/asm-avr32/dma-mapping.h            |   17 +-
+ include/asm-avr32/system.h                 |   13 +-
+ include/asm-avr32/unistd.h                 |   13 +
+ include/linux/atmel-ssc.h                  |  312 +++++
+ include/linux/spi/at73c213.h               |   25 +
+ include/pcmcia/cs_types.h                  |    2 +-
+ init/do_mounts.c                           |    8 +-
+ scripts/checkstack.pl                      |    5 +
+ sound/Kconfig                              |    6 +
+ sound/Makefile                             |    3 +-
+ sound/avr32/Kconfig                        |   11 +
+ sound/avr32/Makefile                       |    3 +
+ sound/avr32/ac97c.c                        |  914 +++++++++++++
+ sound/avr32/ac97c.h                        |   71 +
+ sound/oss/Kconfig                          |    4 +
+ sound/oss/Makefile                         |    1 +
+ sound/oss/at32_abdac.c                     |  722 ++++++++++
+ sound/oss/at32_abdac.h                     |   59 +
+ sound/spi/Kconfig                          |   31 +
+ sound/spi/Makefile                         |    5 +
+ sound/spi/at73c213.c                       | 1121 +++++++++++++++
+ sound/spi/at73c213.h                       |  119 ++
+ 98 files changed, 16057 insertions(+), 1826 deletions(-)
+ create mode 100644 arch/avr32/boards/atngw100/Kconfig
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c
+ create mode 100644 arch/avr32/configs/atstk1003_defconfig
+ create mode 100644 arch/avr32/configs/atstk1004_defconfig
+ create mode 100644 arch/avr32/drivers/Makefile
+ create mode 100644 arch/avr32/drivers/dw-dmac.c
+ create mode 100644 arch/avr32/drivers/dw-dmac.h
+ create mode 100644 arch/avr32/kernel/dma-controller.c
+ create mode 100644 arch/avr32/kernel/vmlinux.lds.S
+ delete mode 100644 arch/avr32/kernel/vmlinux.lds.c
+ delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c
+ create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c
+ create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h
+ create mode 100644 drivers/misc/atmel-ssc.c
+ create mode 100644 drivers/mmc/host/atmel-mci.c
+ create mode 100644 drivers/mmc/host/atmel-mci.h
+ create mode 100644 drivers/pcmcia/at32_cf.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.h
+ create mode 100644 drivers/video/backlight/ltv350qv.c
+ create mode 100644 drivers/video/backlight/ltv350qv.h
+ delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h
+ create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h
+ create mode 100644 include/asm-avr32/dma-controller.h
+ create mode 100644 include/linux/atmel-ssc.h
+ create mode 100644 include/linux/spi/at73c213.h
+ create mode 100644 sound/avr32/Kconfig
+ create mode 100644 sound/avr32/Makefile
+ create mode 100644 sound/avr32/ac97c.c
+ create mode 100644 sound/avr32/ac97c.h
+ create mode 100644 sound/oss/at32_abdac.c
+ create mode 100644 sound/oss/at32_abdac.h
+ create mode 100644 sound/spi/Kconfig
+ create mode 100644 sound/spi/Makefile
+ create mode 100644 sound/spi/at73c213.c
+ create mode 100644 sound/spi/at73c213.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 9a91d9e..587afe3 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -669,6 +669,13 @@ P:	Haavard Skinnemoen
+ M:	hskinnemoen@atmel.com
+ S:	Supported
+ 
++ATMEL USBA UDC DRIVER
++P:	Haavard Skinnemoen
++M:	hskinnemoen@atmel.com
++L:	kernel@avr32linux.org
++W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
++S:	Supported
++
+ ATMEL WIRELESS DRIVER
+ P:	Simon Kelley
+ M:	simon@thekelleys.org.uk
+diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
+index d12346a..62913a4 100644
+--- a/arch/avr32/Kconfig
++++ b/arch/avr32/Kconfig
+@@ -87,19 +87,36 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
++config CPU_AT32AP700X
++	bool
++	select PLATFORM_AT32AP
++
+ choice
+ 	prompt "AVR32 CPU type"
+ 	default CPU_AT32AP7000
+ 
+ config CPU_AT32AP7000
+ 	bool "AT32AP7000"
+-	select PLATFORM_AT32AP
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7001
++	bool "AT32AP7001"
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7002
++	bool "AT32AP7002"
++	select CPU_AT32AP700X
++
+ endchoice
+ 
+ #
+ # CPU Daughterboards for ATSTK1000
+ config BOARD_ATSTK1002
+ 	bool
++config BOARD_ATSTK1003
++	bool
++config BOARD_ATSTK1004
++	bool
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -108,6 +125,8 @@ choice
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+ 	select BOARD_ATSTK1002 if CPU_AT32AP7000
++	select BOARD_ATSTK1003 if CPU_AT32AP7001
++	select BOARD_ATSTK1004 if CPU_AT32AP7002
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
+@@ -116,6 +135,9 @@ endchoice
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -129,15 +151,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -175,6 +197,10 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
+index dc6bc01..96f0030 100644
+--- a/arch/avr32/Makefile
++++ b/arch/avr32/Makefile
+@@ -16,7 +16,7 @@ AFLAGS		+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ CFLAGS		+= $(cpuflags-y)
+ AFLAGS		+= $(cpuflags-y)
+@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/avr32/boards/atngw100/
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
+new file mode 100644
+index 0000000..5d922df
+--- /dev/null
++++ b/arch/avr32/boards/atngw100/Kconfig
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
+index f9b32a8..b07ae63 100644
+--- a/arch/avr32/boards/atngw100/flash.c
++++ b/arch/avr32/boards/atngw100/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+index ef80156..2a5f587 100644
+--- a/arch/avr32/boards/atngw100/setup.c
++++ b/arch/avr32/boards/atngw100/setup.c
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = {
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+-	.sda_pin	= GPIO_PIN_PA(6),
+-	.scl_pin	= GPIO_PIN_PA(7),
++	.sda_pin		= GPIO_PIN_PA(6),
++	.scl_pin		= GPIO_PIN_PA(7),
++	.sda_is_open_drain	= 1,
++	.scl_is_open_drain	= 1,
++	.udelay			= 2,	/* close to 100 kHz */
+ };
+ 
+ static struct platform_device i2c_gpio_device = {
+@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = {
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -154,6 +164,8 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
++	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+@@ -161,9 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
+-	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
+-	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
++	at32_select_gpio(i2c_gpio_data.sda_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
++	at32_select_gpio(i2c_gpio_data.scl_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 718578f..aac73a6 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -1,34 +1,34 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +36,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +66,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile
+index 8e09922..beead86 100644
+--- a/arch/avr32/boards/atstk1000/Makefile
++++ b/arch/avr32/boards/atstk1000/Makefile
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h
+index 9a49ed0..9392d32 100644
+--- a/arch/avr32/boards/atstk1000/atstk1000.h
++++ b/arch/avr32/boards/atstk1000/atstk1000.h
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index c9981b7..d30de89 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -11,17 +11,17 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+ #include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -48,8 +48,24 @@ static struct eth_platform_data __initdata eth_data[2] = {
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
+ 	{
+ 		/* QVGA display */
+ 		.modalias	= "ltv350qv",
+@@ -60,12 +76,30 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_NONE,
++	.wp_pin		= GPIO_PIN_NONE,
++};
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -121,68 +155,44 @@ static void __init set_hw_addr(struct platform_device *pdev)
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
+ }
+-
+ #else
+-static void setup_j2_leds(void)
++static void __init atstk1002_setup_extdac(void)
+ {
++
+ }
+-#endif
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -219,7 +229,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -229,23 +239,35 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, &mci0_data);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+ 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
+ 			     fbmem_start, fbmem_size);
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 
+-	setup_j2_leds();
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+new file mode 100644
+index 0000000..1842b7c
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1002_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1002_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1002_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+new file mode 100644
+index 0000000..96015dd
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
+index aac4300..3d0a102 100644
+--- a/arch/avr32/boards/atstk1000/flash.c
++++ b/arch/avr32/boards/atstk1000/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
+index c9af409..8bedf93 100644
+--- a/arch/avr32/boards/atstk1000/setup.c
++++ b/arch/avr32/boards/atstk1000/setup.c
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
+index b799a68..ca4538b 100644
+--- a/arch/avr32/configs/atngw100_defconfig
++++ b/arch/avr32/configs/atngw100_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.22.atmel.1
++# Thu Jul 12 17:49:20 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -111,17 +111,22 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
++# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -145,6 +150,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -153,6 +159,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -187,13 +214,8 @@ CONFIG_NET_KEY=y
+ # CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ CONFIG_IP_MULTICAST=y
+-CONFIG_IP_ADVANCED_ROUTER=y
+-CONFIG_ASK_IP_FIB_HASH=y
+-# CONFIG_IP_FIB_TRIE is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
+ CONFIG_IP_FIB_HASH=y
+-# CONFIG_IP_MULTIPLE_TABLES is not set
+-# CONFIG_IP_ROUTE_MULTIPATH is not set
+-# CONFIG_IP_ROUTE_VERBOSE is not set
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+@@ -240,6 +262,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -284,6 +307,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -359,13 +383,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -521,7 +551,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # Misc devices
+ #
+-# CONFIG_BLINK is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -545,13 +574,26 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ 
+ #
+ # Ethernet (10 or 100Mbit)
+ #
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -625,7 +667,15 @@ CONFIG_UNIX98_PTYS=y
+ # IPMI
+ #
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++CONFIG_AT32AP700X_WDT_TIMEOUT=2
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+@@ -636,7 +686,42 @@ CONFIG_UNIX98_PTYS=y
+ # TPM devices
+ #
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_ATMELTWI_BAUDRATE=100000
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,7 +740,7 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
+ 
+ #
+ # Dallas's 1-wire bus
+@@ -706,8 +791,41 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
+ 
+ #
+ # LED devices
+@@ -727,27 +845,62 @@ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+ 
++#
++# InfiniBand support
++#
+ 
+ #
+-# LED drivers
++# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+ #
+ 
+ #
+-# LED Triggers
++# Real Time Clock
+ #
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -781,7 +934,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -936,7 +1090,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+-# CONFIG_DEBUG_FS is not set
++CONFIG_DEBUG_FS=y
+ # CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
+index 3b977fd..c3d4c33 100644
+--- a/arch/avr32/configs/atstk1002_defconfig
++++ b/arch/avr32/configs/atstk1002_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.23.atmel.1
++# Tue Oct 16 12:57:22 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -18,20 +18,15 @@ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+@@ -39,7 +34,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
+ CONFIG_TASKSTATS=y
+ CONFIG_TASK_DELAY_ACCT=y
+ # CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
+ CONFIG_AUDIT=y
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
+@@ -63,7 +58,6 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+@@ -74,24 +68,17 @@ CONFIG_SLUB=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+-# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+-# CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
++CONFIG_KMOD=y
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +86,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -114,17 +101,27 @@ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002_CUSTOM is not set
++# CONFIG_BOARD_ATSTK1002_SPI1 is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1002_J2_RGB is not set
++# CONFIG_BOARD_ATSTK1002_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1002_CF_HACKS is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -147,7 +144,9 @@ CONFIG_FLAT_NODE_MEM_MAP=y
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -156,6 +155,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -163,7 +183,16 @@ CONFIG_CMDLINE=""
+ #
+ # PCCARD (PCMCIA/CardBus) support
+ #
+-# CONFIG_PCCARD is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++# CONFIG_PCMCIA_LOAD_CIS is not set
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
+ 
+ #
+ # Executable file formats
+@@ -251,6 +280,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -265,10 +295,6 @@ CONFIG_STANDALONE=y
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -327,6 +353,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +373,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,11 +385,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -381,29 +395,34 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ CONFIG_DUMMY=y
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++CONFIG_LXT_PHY=y
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -413,6 +432,7 @@ CONFIG_MACB=y
+ #
+ # CONFIG_WLAN_PRE80211 is not set
+ # CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
+ # CONFIG_WAN is not set
+ CONFIG_PPP=m
+ # CONFIG_PPP_MULTILINK is not set
+@@ -423,27 +443,56 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_TSDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,34 +521,88 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# IPMI
++# Watchdog Device Drivers
+ #
+-# CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+-# CONFIG_RAW_DRIVER is not set
+ 
+ #
+-# TPM devices
++# PCMCIA character devices
+ #
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
+ 
+ #
+@@ -517,26 +620,110 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+ # CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
+-# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
+ 
+ #
+ # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+@@ -545,34 +732,108 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=m
+ 
+ #
+-# LED devices
++# LED Triggers
+ #
+-# CONFIG_NEW_LEDS is not set
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# LED Triggers
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# InfiniBand support
++# SPI RTC drivers
+ #
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# Platform RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# Real Time Clock
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -588,13 +849,21 @@ CONFIG_UNIX98_PTYS=y
+ #
+ 
+ #
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
+ # File systems
+ #
+-CONFIG_EXT2_FS=m
++CONFIG_EXT2_FS=y
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +878,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -638,7 +907,7 @@ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+ CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++CONFIG_CONFIGFS_FS=y
+ 
+ #
+ # Miscellaneous filesystems
+@@ -683,12 +952,17 @@ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+ # CONFIG_RPCSEC_GSS_KRB5 is not set
+ # CONFIG_RPCSEC_GSS_SPKM3 is not set
+-# CONFIG_SMB_FS is not set
+-# CONFIG_CIFS is not set
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+@@ -758,6 +1032,7 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+@@ -782,10 +1057,6 @@ CONFIG_FORCED_INLINING=y
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+ # CONFIG_CRYPTO is not set
+ 
+ #
+@@ -796,6 +1067,7 @@ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+ # CONFIG_CRC_ITU_T is not set
+ CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
+new file mode 100644
+index 0000000..0dc834f
+--- /dev/null
++++ b/arch/avr32/configs/atstk1003_defconfig
+@@ -0,0 +1,1045 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 10:58:37 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++CONFIG_DEFAULT_NOOP=y
++CONFIG_DEFAULT_IOSCHED="noop"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++CONFIG_CPU_AT32AP7001=y
++# CONFIG_CPU_AT32AP7002 is not set
++CONFIG_BOARD_ATSTK1003=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++CONFIG_PCMCIA_LOAD_CIS=y
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++# CONFIG_BLK_DEV_SD is not set
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++
++#
++# PCMCIA character devices
++#
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++CONFIG_SOUND_PRIME=m
++# CONFIG_SOUND_MSNDCLAS is not set
++# CONFIG_SOUND_MSNDPIN is not set
++CONFIG_SOUND_AT32_ABDAC=m
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=y
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++# CONFIG_NFS_FS is not set
++# CONFIG_NFSD is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_KPROBES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
+new file mode 100644
+index 0000000..b002a46
+--- /dev/null
++++ b/arch/avr32/configs/atstk1004_defconfig
+@@ -0,0 +1,722 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 11:07:19 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++# CONFIG_CPU_AT32AP7001 is not set
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1004=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_BLK_DEV is not set
++# CONFIG_MISC_DEVICES is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_WATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4DEV_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++# CONFIG_MSDOS_FS is not set
++# CONFIG_VFAT_FS is not set
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile
+new file mode 100644
+index 0000000..b429b75
+--- /dev/null
++++ b/arch/avr32/drivers/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c
+new file mode 100644
+index 0000000..224eb30
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.c
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h
+new file mode 100644
+index 0000000..1f67921
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.h
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
+index 90e5aff..1aedaeb 100644
+--- a/arch/avr32/kernel/Makefile
++++ b/arch/avr32/kernel/Makefile
+@@ -9,10 +9,6 @@ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+ obj-y				+= setup.o traps.o semaphore.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+-
+-USE_STANDARD_AS_RULE		:= true
+-
+-%.lds: %.lds.c FORCE
+-	$(call if_changed_dep,cpp_lds_S)
+diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c
+new file mode 100644
+index 0000000..fb654b3
+--- /dev/null
++++ b/arch/avr32/kernel/dma-controller.c
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
+index 42657f1..ccadfd9 100644
+--- a/arch/avr32/kernel/entry-avr32b.S
++++ b/arch/avr32/kernel/entry-avr32b.S
+@@ -159,11 +159,18 @@ handle_vmalloc_miss:
+ 
+ 	.section .scall.text,"ax",@progbits
+ system_call:
++#ifdef CONFIG_PREEMPT
++	mask_interrupts
++#endif
+ 	pushm	r12		/* r12_orig */
+ 	stmts	--sp, r0-lr
+-	zero_fp
++
+ 	mfsr	r0, SYSREG_RAR_SUP
+ 	mfsr	r1, SYSREG_RSR_SUP
++#ifdef CONFIG_PREEMPT
++	unmask_interrupts
++#endif
++	zero_fp
+ 	stm	--sp, r0-r1
+ 
+ 	/* check for syscall tracing */
+@@ -638,6 +645,13 @@ irq_level\level:
+ 	stmts	--sp,r0-lr
+ 	mfsr	r8, rar_int\level
+ 	mfsr	r9, rsr_int\level
++
++#ifdef CONFIG_PREEMPT
++	sub	r11, pc, (. - system_call)
++	cp.w	r11, r8
++	breq	4f
++#endif
++
+ 	pushm	r8-r9
+ 
+ 	mov	r11, sp
+@@ -668,6 +682,16 @@ irq_level\level:
+ 	sub	sp, -4		/* ignore r12_orig */
+ 	rete
+ 
++#ifdef CONFIG_PREEMPT
++4:	mask_interrupts
++	mfsr	r8, rsr_int\level
++	sbr	r8, 16
++	mtsr	rsr_int\level, r8
++	ldmts	sp++, r0-lr
++	sub	sp, -4		/* ignore r12_orig */
++	rete
++#endif
++
+ 2:	get_thread_info	r0
+ 	ld.w	r1, r0[TI_flags]
+ 	bld	r1, TIF_CPU_GOING_TO_SLEEP
+diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
+index d08b0bc..4b4c188 100644
+--- a/arch/avr32/kernel/setup.c
++++ b/arch/avr32/kernel/setup.c
+@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
+ 
+ 	fbmem_size = memparse(p, &p);
+ 	if (*p == '@') {
+-		fbmem_start = memparse(p, &p);
++		fbmem_start = memparse(p + 1, &p);
+ 		ret = add_reserved_region(fbmem_start,
+ 					  fbmem_start + fbmem_size - 1,
+ 					  "Framebuffer");
+diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S
+new file mode 100644
+index 0000000..ce9ac96
+--- /dev/null
++++ b/arch/avr32/kernel/vmlinux.lds.S
+@@ -0,0 +1,143 @@
++/*
++ * AVR32 linker script for the Linux kernel
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#define LOAD_OFFSET 0x00000000
++#include <asm-generic/vmlinux.lds.h>
++#include <asm/cache.h>
++#include <asm/thread_info.h>
++
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++/* Big endian */
++jiffies = jiffies_64 + 4;
++
++SECTIONS
++{
++	. = CONFIG_ENTRY_ADDRESS;
++	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
++		_stext = .;
++		__init_begin = .;
++			_sinittext = .;
++			*(.text.reset)
++			*(.init.text)
++			/*
++			 * .exit.text is discarded at runtime, not
++			 * link time, to deal with references from
++			 * __bug_table
++			 */
++			*(.exit.text)
++			_einittext = .;
++		. = ALIGN(4);
++		__tagtable_begin = .;
++			*(.taglist.init)
++		__tagtable_end = .;
++			*(.init.data)
++		. = ALIGN(16);
++		__setup_start = .;
++			*(.init.setup)
++		__setup_end = .;
++		. = ALIGN(4);
++		__initcall_start = .;
++			INITCALLS
++		__initcall_end = .;
++		__con_initcall_start = .;
++			*(.con_initcall.init)
++		__con_initcall_end = .;
++		__security_initcall_start = .;
++			*(.security_initcall.init)
++		__security_initcall_end = .;
++#ifdef CONFIG_BLK_DEV_INITRD
++		. = ALIGN(32);
++		__initramfs_start = .;
++			*(.init.ramfs)
++		__initramfs_end = .;
++#endif
++		. = ALIGN(PAGE_SIZE);
++		__init_end = .;
++	}
++
++	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
++		_evba = .;
++		_text = .;
++		*(.ex.text)
++		. = 0x50;
++		*(.tlbx.ex.text)
++		. = 0x60;
++		*(.tlbr.ex.text)
++		. = 0x70;
++		*(.tlbw.ex.text)
++		. = 0x100;
++		*(.scall.text)
++		*(.irq.text)
++		TEXT_TEXT
++		SCHED_TEXT
++		LOCK_TEXT
++		KPROBES_TEXT
++		*(.fixup)
++		*(.gnu.warning)
++		_etext = .;
++	} = 0xd703d703
++
++	. = ALIGN(4);
++	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
++		__start___ex_table = .;
++		*(__ex_table)
++		__stop___ex_table = .;
++	}
++
++	BUG_TABLE
++
++	RODATA
++
++	. = ALIGN(THREAD_SIZE);
++
++	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
++		_data = .;
++		_sdata = .;
++		/*
++		 * First, the init task union, aligned to an 8K boundary.
++		 */
++		*(.data.init_task)
++
++		/* Then, the cacheline aligned data */
++		. = ALIGN(L1_CACHE_BYTES);
++		*(.data.cacheline_aligned)
++
++		/* And the rest... */
++		*(.data.rel*)
++		DATA_DATA
++		CONSTRUCTORS
++
++		_edata = .;
++	}
++
++
++	. = ALIGN(8);
++	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
++		__bss_start = .;
++		*(.bss)
++		*(COMMON)
++		. = ALIGN(8);
++		__bss_stop = .;
++		_end = .;
++	}
++
++	/* When something in the kernel is NOT compiled as a module, the module
++	 * cleanup code and data are put into these segments. Both can then be
++	 * thrown away, as cleanup code is never called unless it's a module.
++	 */
++	/DISCARD/       	: {
++		*(.exit.data)
++		*(.exitcall.exit)
++	}
++
++	DWARF_DEBUG
++}
+diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
+deleted file mode 100644
+index db0438f..0000000
+--- a/arch/avr32/kernel/vmlinux.lds.c
++++ /dev/null
+@@ -1,142 +0,0 @@
+-/*
+- * AVR32 linker script for the Linux kernel
+- *
+- * Copyright (C) 2004-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#define LOAD_OFFSET 0x00000000
+-#include <asm-generic/vmlinux.lds.h>
+-
+-OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+-OUTPUT_ARCH(avr32)
+-ENTRY(_start)
+-
+-/* Big endian */
+-jiffies = jiffies_64 + 4;
+-
+-SECTIONS
+-{
+-	. = CONFIG_ENTRY_ADDRESS;
+-	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
+-		_stext = .;
+-		__init_begin = .;
+-			_sinittext = .;
+-			*(.text.reset)
+-			*(.init.text)
+-			/*
+-			 * .exit.text is discarded at runtime, not
+-			 * link time, to deal with references from
+-			 * __bug_table
+-			 */
+-			*(.exit.text)
+-			_einittext = .;
+-		. = ALIGN(4);
+-		__tagtable_begin = .;
+-			*(.taglist.init)
+-		__tagtable_end = .;
+-			*(.init.data)
+-		. = ALIGN(16);
+-		__setup_start = .;
+-			*(.init.setup)
+-		__setup_end = .;
+-		. = ALIGN(4);
+-		__initcall_start = .;
+-			INITCALLS
+-		__initcall_end = .;
+-		__con_initcall_start = .;
+-			*(.con_initcall.init)
+-		__con_initcall_end = .;
+-		__security_initcall_start = .;
+-			*(.security_initcall.init)
+-		__security_initcall_end = .;
+-#ifdef CONFIG_BLK_DEV_INITRD
+-		. = ALIGN(32);
+-		__initramfs_start = .;
+-			*(.init.ramfs)
+-		__initramfs_end = .;
+-#endif
+-		. = ALIGN(4096);
+-		__init_end = .;
+-	}
+-
+-	. = ALIGN(8192);
+-	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
+-		_evba = .;
+-		_text = .;
+-		*(.ex.text)
+-		. = 0x50;
+-		*(.tlbx.ex.text)
+-		. = 0x60;
+-		*(.tlbr.ex.text)
+-		. = 0x70;
+-		*(.tlbw.ex.text)
+-		. = 0x100;
+-		*(.scall.text)
+-		*(.irq.text)
+-		TEXT_TEXT
+-		SCHED_TEXT
+-		LOCK_TEXT
+-		KPROBES_TEXT
+-		*(.fixup)
+-		*(.gnu.warning)
+-		_etext = .;
+-	} = 0xd703d703
+-
+-	. = ALIGN(4);
+-	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
+-		__start___ex_table = .;
+-		*(__ex_table)
+-		__stop___ex_table = .;
+-	}
+-
+-	BUG_TABLE
+-
+-	RODATA
+-
+-	. = ALIGN(8192);
+-
+-	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
+-		_data = .;
+-		_sdata = .;
+-		/*
+-		 * First, the init task union, aligned to an 8K boundary.
+-		 */
+-		*(.data.init_task)
+-
+-		/* Then, the cacheline aligned data */
+-		. = ALIGN(32);
+-		*(.data.cacheline_aligned)
+-
+-		/* And the rest... */
+-		*(.data.rel*)
+-		DATA_DATA
+-		CONSTRUCTORS
+-
+-		_edata = .;
+-	}
+-
+-
+-	. = ALIGN(8);
+-	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
+-		__bss_start = .;
+-		*(.bss)
+-		*(COMMON)
+-		. = ALIGN(8);
+-		__bss_stop = .;
+-		_end = .;
+-	}
+-
+-	/* When something in the kernel is NOT compiled as a module, the module
+-	 * cleanup code and data are put into these segments. Both can then be
+-	 * thrown away, as cleanup code is never called unless it's a module.
+-	 */
+-	/DISCARD/       	: {
+-		*(.exit.data)
+-		*(.exitcall.exit)
+-	}
+-
+-	DWARF_DEBUG
+-}
+diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
+index eb30783..0eb590a 100644
+--- a/arch/avr32/mach-at32ap/Kconfig
++++ b/arch/avr32/mach-at32ap/Kconfig
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
+index a8b4450..0f6162e 100644
+--- a/arch/avr32/mach-at32ap/Makefile
++++ b/arch/avr32/mach-at32ap/Makefile
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
+deleted file mode 100644
+index 64cc558..0000000
+--- a/arch/avr32/mach-at32ap/at32ap7000.c
++++ /dev/null
+@@ -1,1324 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-/*
+- * We can reduce the code size a bit by using a constant here. Since
+- * this file is completely chip-specific, it's safe to not use
+- * ioremap. Generic drivers should of course never do this.
+- */
+-#define AT32_PM_BASE	0xfff00000
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000bf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+new file mode 100644
+index 0000000..7fd93a5
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -0,0 +1,1754 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 4);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
+index 0f8c89c..4642117 100644
+--- a/arch/avr32/mach-at32ap/clock.c
++++ b/arch/avr32/mach-at32ap/clock.c
+@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
+ 	return clk->parent;
+ }
+ EXPORT_SYMBOL(clk_get_parent);
++
++
++
++#ifdef CONFIG_DEBUG_FS
++
++/* /sys/kernel/debug/at32ap_clk */
++
++#include <linux/io.h>
++#include <linux/debugfs.h>
++#include <linux/seq_file.h>
++#include "pm.h"
++
++
++#define	NEST_DELTA	2
++#define	NEST_MAX	6
++
++struct clkinf {
++	struct seq_file	*s;
++	unsigned	nest;
++};
++
++static void
++dump_clock(struct clk *parent, struct clkinf *r)
++{
++	unsigned	nest = r->nest;
++	char		buf[16 + NEST_MAX];
++	struct clk	*clk;
++	unsigned	i;
++
++	/* skip clocks coupled to devices that aren't registered */
++	if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
++		return;
++
++	/* <nest spaces> name <pad to end> */
++	memset(buf, ' ', sizeof(buf) - 1);
++	buf[sizeof(buf) - 1] = 0;
++	i = strlen(parent->name);
++	memcpy(buf + nest, parent->name,
++			min(i, (unsigned)(sizeof(buf) - 1 - nest)));
++
++	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
++		buf, parent->set_parent ? '*' : ' ',
++		parent->users,
++		parent->users ? "on" : "off",	/* NOTE: not-paranoid!! */
++		clk_get_rate(parent));
++	if (parent->dev)
++		seq_printf(r->s, ", for %s", parent->dev->bus_id);
++	seq_printf(r->s, "\n");
++
++	/* cost of this scan is small, but not linear... */
++	r->nest = nest + NEST_DELTA;
++	for (i = 3; i < at32_nr_clocks; i++) {
++		clk = at32_clock_list[i];
++		if (clk->parent == parent)
++			dump_clock(clk, r);
++	}
++	r->nest = nest;
++}
++
++static int clk_show(struct seq_file *s, void *unused)
++{
++	struct clkinf	r;
++	int		i;
++
++	/* show all the power manager registers */
++	seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
++	seq_printf(s, "CKSEL   = %8x\n", pm_readl(CKSEL));
++	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
++	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
++	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
++	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
++	seq_printf(s, "PLL0    = %8x\n", pm_readl(PLL0));
++	seq_printf(s, "PLL1    = %8x\n", pm_readl(PLL1));
++	seq_printf(s, "IMR     = %8x\n", pm_readl(IMR));
++	for (i = 0; i < 8; i++) {
++		if (i == 5)
++			continue;
++		seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
++	}
++
++	seq_printf(s, "\n");
++
++	/* show clock tree as derived from the three oscillators
++	 * we "know" are at the head of the list
++	 */
++	r.s = s;
++	r.nest = 0;
++	dump_clock(at32_clock_list[0], &r);
++	dump_clock(at32_clock_list[1], &r);
++	dump_clock(at32_clock_list[2], &r);
++
++	return 0;
++}
++
++static int clk_open(struct inode *inode, struct file *file)
++{
++	return single_open(file, clk_show, NULL);
++}
++
++static const struct file_operations clk_operations = {
++	.open		= clk_open,
++	.read		= seq_read,
++	.llseek		= seq_lseek,
++	.release	= single_release,
++};
++
++static int __init clk_debugfs_init(void)
++{
++	(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
++			NULL, NULL, &clk_operations);
++
++	return 0;
++}
++postcore_initcall(clk_debugfs_init);
++
++#endif
+diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c
+new file mode 100644
+index 0000000..8cf6d11
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/gpio-dev.c
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
+index 5e22a75..704607f 100644
+--- a/arch/avr32/mach-at32ap/hsmc.c
++++ b/arch/avr32/mach-at32ap/hsmc.c
+@@ -29,16 +29,25 @@ struct hsmc {
+ 
+ static struct hsmc *hsmc;
+ 
+-int smc_set_configuration(int cs, const struct smc_config *config)
++void smc_set_timing(struct smc_config *config,
++		    const struct smc_timing *timing)
+ {
++	int recover;
++	int cycle;
++
+ 	unsigned long mul;
+-	unsigned long offset;
+-	u32 setup, pulse, cycle, mode;
+ 
+-	if (!hsmc)
+-		return -ENODEV;
+-	if (cs >= NR_CHIP_SELECTS)
+-		return -EINVAL;
++	/* Reset all SMC timings */
++	config->ncs_read_setup	= 0;
++	config->nrd_setup	= 0;
++	config->ncs_write_setup	= 0;
++	config->nwe_setup	= 0;
++	config->ncs_read_pulse	= 0;
++	config->nrd_pulse	= 0;
++	config->ncs_write_pulse	= 0;
++	config->nwe_pulse	= 0;
++	config->read_cycle	= 0;
++	config->write_cycle	= 0;
+ 
+ 	/*
+ 	 * cycles = x / T = x * f
+@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
+ 
+ #define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
+ 
+-	setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup))
+-		 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup))
+-		 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup))
+-		 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup)));
+-	pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse))
+-		 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse))
+-		 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse))
+-		 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse)));
+-	cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle))
+-		 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle)));
++	if (timing->ncs_read_setup > 0)
++		config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
++
++	if (timing->nrd_setup > 0)
++		config->nrd_setup = ns2cyc(timing->nrd_setup);
++
++	if (timing->ncs_write_setup > 0)
++		config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
++
++	if (timing->nwe_setup > 0)
++		config->nwe_setup = ns2cyc(timing->nwe_setup);
++
++	if (timing->ncs_read_pulse > 0)
++		config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
++
++	if (timing->nrd_pulse > 0)
++		config->nrd_pulse = ns2cyc(timing->nrd_pulse);
++
++	if (timing->ncs_write_pulse > 0)
++		config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
++
++	if (timing->nwe_pulse > 0)
++		config->nwe_pulse = ns2cyc(timing->nwe_pulse);
++
++	if (timing->read_cycle > 0)
++		config->read_cycle = ns2cyc(timing->read_cycle);
++
++	if (timing->write_cycle > 0)
++		config->write_cycle = ns2cyc(timing->write_cycle);
++
++	/* Extend read cycle in needed */
++	if (timing->ncs_read_recover > 0)
++		recover = ns2cyc(timing->ncs_read_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend read cycle in needed */
++	if (timing->nrd_recover > 0)
++		recover = ns2cyc(timing->nrd_recover);
++	else
++		recover = 1;
++
++	cycle = config->nrd_setup + config->nrd_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->ncs_write_recover > 0)
++		recover = ns2cyc(timing->ncs_write_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->nwe_recover > 0)
++		recover = ns2cyc(timing->nwe_recover);
++	else
++		recover = 1;
++
++	cycle = config->nwe_setup + config->nwe_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++}
++EXPORT_SYMBOL(smc_set_timing);
++
++int smc_set_configuration(int cs, const struct smc_config *config)
++{
++	unsigned long offset;
++	u32 setup, pulse, cycle, mode;
++
++	if (!hsmc)
++		return -ENODEV;
++	if (cs >= NR_CHIP_SELECTS)
++		return -EINVAL;
++
++	setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
++		 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
++		 | HSMC_BF(NRD_SETUP, config->nrd_setup)
++		 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
++	pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
++		 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
++		 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
++		 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
++	cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
++		 | HSMC_BF(NRD_CYCLE, config->read_cycle));
+ 
+ 	switch (config->bus_width) {
+ 	case 1:
+diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
+index 1eb99b8..c978c36 100644
+--- a/arch/avr32/mach-at32ap/pio.c
++++ b/arch/avr32/mach-at32ap/pio.c
+@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
+ 			pio_writel(pio, SODR, mask);
+ 		else
+ 			pio_writel(pio, CODR, mask);
++		if (flags & AT32_GPIOF_MULTIDRV)
++			pio_writel(pio, MDER, mask);
++		else
++			pio_writel(pio, MDDR, mask);
+ 		pio_writel(pio, PUDR, mask);
+ 		pio_writel(pio, OER, mask);
+ 	} else {
+@@ -158,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
+index a1f8ace..47efd0d 100644
+--- a/arch/avr32/mach-at32ap/pm.h
++++ b/arch/avr32/mach-at32ap/pm.h
+@@ -4,6 +4,14 @@
+ #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
+ #define __ARCH_AVR32_MACH_AT32AP_PM_H__
+ 
++/*
++ * We can reduce the code size a bit by using a constant here. Since
++ * this file is only used on AVR32 AP CPUs with segmentation enabled,
++ * it's safe to not use ioremap. Generic drivers should of course
++ * never do this.
++ */
++#define AT32_PM_BASE	0xfff00000
++
+ /* PM register offsets */
+ #define PM_MCCTRL				0x0000
+ #define PM_CKSEL				0x0004
+diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
+index 099212d..26f29c6 100644
+--- a/arch/avr32/mm/dma-coherent.c
++++ b/arch/avr32/mm/dma-coherent.c
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size,
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
+index 82cf708..480760b 100644
+--- a/arch/avr32/mm/init.c
++++ b/arch/avr32/mm/init.c
+@@ -224,19 +224,9 @@ void free_initmem(void)
+ 
+ #ifdef CONFIG_BLK_DEV_INITRD
+ 
+-static int keep_initrd;
+-
+ void free_initrd_mem(unsigned long start, unsigned long end)
+ {
+-	if (!keep_initrd)
+-		free_area(start, end, "initrd");
+-}
+-
+-static int __init keepinitrd_setup(char *__unused)
+-{
+-	keep_initrd = 1;
+-	return 1;
++	free_area(start, end, "initrd");
+ }
+ 
+-__setup("keepinitrd", keepinitrd_setup);
+ #endif
+diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
+index 37bddc1..8c30dec 100644
+--- a/drivers/char/watchdog/Kconfig
++++ b/drivers/char/watchdog/Kconfig
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c
+index 54a5161..fb5ed64 100644
+--- a/drivers/char/watchdog/at32ap700x_wdt.c
++++ b/drivers/char/watchdog/at32ap700x_wdt.c
+@@ -6,6 +6,19 @@
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
++ *
++ *
++ * Errata: WDT Clear is blocked after WDT Reset
++ *
++ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR
++ * register, preventing the program to clear the next Watchdog Timer Reset.
++ *
++ * If you still want to use the WDT after a WDT reset a small code can be
++ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset
++ * and use a GPIO pin to reset the system. This method requires that one of the
++ * GPIO pins are available and connected externally to the RESET_N pin. After
++ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave
++ * the pin tristated with pullup.
+  */
+ 
+ #include <linux/init.h>
+@@ -44,6 +57,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+ 
+ #define WDT_CLR			0x04
+ 
++#define WDT_RCAUSE		0x10
++#define WDT_RCAUSE_POR		   0
++#define WDT_RCAUSE_EXT		   2
++#define WDT_RCAUSE_WDT		   3
++#define WDT_RCAUSE_JTAG		   4
++#define WDT_RCAUSE_SERP		   5
++
+ #define WDT_BIT(name)		(1 << WDT_##name)
+ #define WDT_BF(name, value)	((value) << WDT_##name)
+ 
+@@ -56,6 +76,7 @@ struct wdt_at32ap700x {
+ 	void __iomem		*regs;
+ 	spinlock_t		io_lock;
+ 	int			timeout;
++	int			boot_status;
+ 	unsigned long		users;
+ 	struct miscdevice	miscdev;
+ };
+@@ -126,7 +147,7 @@ static int at32_wdt_close(struct inode *inode, struct file *file)
+ 		at32_wdt_stop();
+ 	} else {
+ 		dev_dbg(wdt->miscdev.parent,
+-			"Unexpected close, not stopping watchdog!\n");
++			"unexpected close, not stopping watchdog!\n");
+ 		at32_wdt_pat();
+ 	}
+ 	clear_bit(1, &wdt->users);
+@@ -154,6 +175,33 @@ static int at32_wdt_settimeout(int time)
+ 	return 0;
+ }
+ 
++/*
++ * Get the watchdog status.
++ */
++static int at32_wdt_get_status(void)
++{
++	int rcause;
++	int status = 0;
++
++	rcause = wdt_readl(wdt, RCAUSE);
++
++	switch (rcause) {
++	case WDT_BIT(RCAUSE_EXT):
++		status = WDIOF_EXTERN1;
++		break;
++	case WDT_BIT(RCAUSE_WDT):
++		status = WDIOF_CARDRESET;
++		break;
++	case WDT_BIT(RCAUSE_POR):  /* fall through */
++	case WDT_BIT(RCAUSE_JTAG): /* fall through */
++	case WDT_BIT(RCAUSE_SERP): /* fall through */
++	default:
++		break;
++	}
++
++	return status;
++}
++
+ static struct watchdog_info at32_wdt_info = {
+ 	.identity	= "at32ap700x watchdog",
+ 	.options	= WDIOF_SETTIMEOUT |
+@@ -194,10 +242,12 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file,
+ 	case WDIOC_GETTIMEOUT:
+ 		ret = put_user(wdt->timeout, p);
+ 		break;
+-	case WDIOC_GETSTATUS: /* fall through */
+-	case WDIOC_GETBOOTSTATUS:
++	case WDIOC_GETSTATUS:
+ 		ret = put_user(0, p);
+ 		break;
++	case WDIOC_GETBOOTSTATUS:
++		ret = put_user(wdt->boot_status, p);
++		break;
+ 	case WDIOC_SETOPTIONS:
+ 		ret = get_user(time, p);
+ 		if (ret)
+@@ -282,8 +332,19 @@ static int __init at32_wdt_probe(struct platform_device *pdev)
+ 		dev_dbg(&pdev->dev, "could not map I/O memory\n");
+ 		goto err_free;
+ 	}
++
+ 	spin_lock_init(&wdt->io_lock);
+-	wdt->users = 0;
++	wdt->boot_status = at32_wdt_get_status();
++
++	/* Work-around for watchdog silicon errata. */
++	if (wdt->boot_status & WDIOF_CARDRESET) {
++		dev_info(&pdev->dev, "CPU must be reset with external "
++				"reset or POR due to silicon errata.\n");
++		ret = -EIO;
++		goto err_iounmap;
++	} else {
++		wdt->users = 0;
++	}
+ 	wdt->miscdev.minor = WATCHDOG_MINOR;
+ 	wdt->miscdev.name = "watchdog";
+ 	wdt->miscdev.fops = &at32_wdt_fops;
+diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
+index 9f3a4cd..6f5bcd6 100644
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -80,6 +80,14 @@ config I2C_AT91
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
+index 5b752e4..e4644a8 100644
+--- a/drivers/i2c/busses/Makefile
++++ b/drivers/i2c/busses/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c
+new file mode 100644
+index 0000000..3f78b31
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.c
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h
+new file mode 100644
+index 0000000..1aca065
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.h
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 73e248f..9e848cc 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY
+ 
+ 	  If you are not sure, say Y here.
+ 
++config ATMEL_SSC
++	tristate "Device driver for Atmel SSC peripheral"
++	depends on AVR32 || ARCH_AT91
++	---help---
++	  This option enables device driver support for Atmel Syncronized
++	  Serial Communication peripheral (SSC).
++
++	  The SSC peripheral supports a wide variety of serial frame based
++	  communications, i.e. I2S, SPI, etc.
+ 
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index b5ce0e3..40d8ed1 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
+ obj-$(CONFIG_SONY_LAPTOP)	+= sony-laptop.o
+ obj-$(CONFIG_THINKPAD_ACPI)	+= thinkpad_acpi.o
+ obj-$(CONFIG_EEPROM_93CX6)	+= eeprom_93cx6.o
++obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
+new file mode 100644
+index 0000000..058ccac
+--- /dev/null
++++ b/drivers/misc/atmel-ssc.c
+@@ -0,0 +1,174 @@
++/*
++ * Atmel SSC driver
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/list.h>
++#include <linux/spinlock.h>
++#include <linux/atmel-ssc.h>
++
++/* Serialize access to ssc_list and user count */
++static DEFINE_SPINLOCK(user_lock);
++static LIST_HEAD(ssc_list);
++
++struct ssc_device *ssc_request(unsigned int ssc_num)
++{
++	int ssc_valid = 0;
++	struct ssc_device *ssc;
++
++	spin_lock(&user_lock);
++	list_for_each_entry(ssc, &ssc_list, list) {
++		if (ssc->pdev->id == ssc_num) {
++			ssc_valid = 1;
++			break;
++		}
++	}
++
++	if (!ssc_valid) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "could not find requested device\n");
++		return ERR_PTR(-ENODEV);
++	}
++
++	if (ssc->user) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "module busy\n");
++		return ERR_PTR(-EBUSY);
++	}
++	ssc->user++;
++	spin_unlock(&user_lock);
++
++	clk_enable(ssc->clk);
++
++	return ssc;
++}
++EXPORT_SYMBOL(ssc_request);
++
++void ssc_free(struct ssc_device *ssc)
++{
++	spin_lock(&user_lock);
++	if (ssc->user) {
++		ssc->user--;
++		clk_disable(ssc->clk);
++	} else {
++		dev_dbg(&ssc->pdev->dev, "device already free\n");
++	}
++	spin_unlock(&user_lock);
++}
++EXPORT_SYMBOL(ssc_free);
++
++static int __init ssc_probe(struct platform_device *pdev)
++{
++	int retval = 0;
++	struct resource *regs;
++	struct ssc_device *ssc;
++
++	ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL);
++	if (!ssc) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		retval = -ENOMEM;
++		goto out;
++	}
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resource defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->clk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(ssc->clk)) {
++		dev_dbg(&pdev->dev, "no pclk clock defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->pdev = pdev;
++	ssc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!ssc->regs) {
++		dev_dbg(&pdev->dev, "ioremap failed\n");
++		retval = -EINVAL;
++		goto out_clk;
++	}
++
++	/* disable all interrupts */
++	clk_enable(ssc->clk);
++	ssc_writel(ssc->regs, IDR, ~0UL);
++	ssc_readl(ssc->regs, SR);
++	clk_disable(ssc->clk);
++
++	ssc->irq = platform_get_irq(pdev, 0);
++	if (!ssc->irq) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		retval = -ENXIO;
++		goto out_unmap;
++	}
++
++	spin_lock(&user_lock);
++	list_add_tail(&ssc->list, &ssc_list);
++	spin_unlock(&user_lock);
++
++	platform_set_drvdata(pdev, ssc);
++
++	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
++			ssc->regs, ssc->irq);
++
++	goto out;
++
++out_unmap:
++	iounmap(ssc->regs);
++out_clk:
++	clk_put(ssc->clk);
++out_free:
++	kfree(ssc);
++out:
++	return retval;
++}
++
++static int __devexit ssc_remove(struct platform_device *pdev)
++{
++	struct ssc_device *ssc = platform_get_drvdata(pdev);
++
++	spin_lock(&user_lock);
++	iounmap(ssc->regs);
++	clk_put(ssc->clk);
++	list_del(&ssc->list);
++	kfree(ssc);
++	spin_unlock(&user_lock);
++
++	return 0;
++}
++
++static struct platform_driver ssc_driver = {
++	.remove		= __devexit_p(ssc_remove),
++	.driver		= {
++		.name		= "ssc",
++	},
++};
++
++static int __init ssc_init(void)
++{
++	return platform_driver_probe(&ssc_driver, ssc_probe);
++}
++module_init(ssc_init);
++
++static void __exit ssc_exit(void)
++{
++	platform_driver_unregister(&ssc_driver);
++}
++module_exit(ssc_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index e23082f..1de1716 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -74,6 +74,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
+index 6685f64..4b8e6e2 100644
+--- a/drivers/mmc/host/Makefile
++++ b/drivers/mmc/host/Makefile
+@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ 
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+new file mode 100644
+index 0000000..6792ad9
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = MMC_ERR_NONE;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = MMC_ERR_TIMEOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = MMC_ERR_BADCRC;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = MMC_ERR_FAILED;
++
++	if (cmd->error != MMC_ERR_NONE) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = MMC_ERR_INVALID;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = MMC_ERR_BADCRC;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = MMC_ERR_TIMEOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = MMC_ERR_FIFO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = MMC_ERR_TIMEOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = MMC_ERR_TIMEOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = MMC_ERR_TIMEOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h
+new file mode 100644
+index 0000000..60d15c4
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.h
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
+index 2f19fa7..94304ca 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0001.c
++++ b/drivers/mtd/chips/cfi_cmdset_0001.c
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
+index 1f64458..205977b 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = {
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
+index c0c77f8..7623315 100644
+--- a/drivers/pcmcia/Kconfig
++++ b/drivers/pcmcia/Kconfig
+@@ -271,6 +271,13 @@ config AT91_CF
+ 	  Say Y here to support the CompactFlash controller on AT91 chips.
+ 	  Or choose M to compile the driver as a module named "at91_cf".
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
+index 4276965..08d7ffa 100644
+--- a/drivers/pcmcia/Makefile
++++ b/drivers/pcmcia/Makefile
+@@ -37,6 +37,7 @@ obj-$(CONFIG_PCMCIA_VRC4171)			+= vrc4171_card.o
+ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc4173_cardu.o
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c
+new file mode 100644
+index 0000000..ebe1495
+--- /dev/null
++++ b/drivers/pcmcia/at32_cf.c
+@@ -0,0 +1,531 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin)
++		cf->vcc_pin = request_pin(pdev, board->reset_pin,
++					  "cf_vcc");
++	if (board->ready_pin)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c
+index d154dee..06a85d7 100644
+--- a/drivers/pcmcia/cistpl.c
++++ b/drivers/pcmcia/cistpl.c
+@@ -25,6 +25,7 @@
+ #include <linux/ioport.h>
+ #include <asm/io.h>
+ #include <asm/byteorder.h>
++#include <asm/unaligned.h>
+ 
+ #include <pcmcia/cs_types.h>
+ #include <pcmcia/ss.h>
+@@ -401,6 +402,15 @@ EXPORT_SYMBOL(pcmcia_replace_cis);
+     
+ ======================================================================*/
+ 
++static inline u16 cis_get_u16(void *ptr)
++{
++	return le16_to_cpu(get_unaligned((__le16 *) ptr));
++}
++static inline u32 cis_get_u32(void *ptr)
++{
++	return le32_to_cpu(get_unaligned((__le32 *) ptr));
++}
++
+ typedef struct tuple_flags {
+     u_int		link_space:4;
+     u_int		has_link:1;
+@@ -461,7 +471,7 @@ static int follow_link(struct pcmcia_socket *s, tuple_t *tuple)
+ 	/* Get indirect link from the MFC tuple */
+ 	read_cis_cache(s, LINK_SPACE(tuple->Flags),
+ 		       tuple->LinkOffset, 5, link);
+-	ofs = le32_to_cpu(*(__le32 *)(link+1));
++	ofs = cis_get_u32(link + 1);
+ 	SPACE(tuple->Flags) = (link[0] == CISTPL_MFC_ATTR);
+ 	/* Move to the next indirect link */
+ 	tuple->LinkOffset += 5;
+@@ -668,10 +678,10 @@ static int parse_checksum(tuple_t *tuple, cistpl_checksum_t *csum)
+     u_char *p;
+     if (tuple->TupleDataLen < 5)
+ 	return CS_BAD_TUPLE;
+-    p = (u_char *)tuple->TupleData;
+-    csum->addr = tuple->CISOffset+(short)le16_to_cpu(*(__le16 *)p)-2;
+-    csum->len = le16_to_cpu(*(__le16 *)(p + 2));
+-    csum->sum = *(p+4);
++    p = (u_char *) tuple->TupleData;
++    csum->addr = tuple->CISOffset + cis_get_u16(p) - 2;
++    csum->len = cis_get_u16(p + 2);
++    csum->sum = *(p + 4);
+     return CS_SUCCESS;
+ }
+ 
+@@ -681,7 +691,7 @@ static int parse_longlink(tuple_t *tuple, cistpl_longlink_t *link)
+ {
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    link->addr = le32_to_cpu(*(__le32 *)tuple->TupleData);
++    link->addr = cis_get_u32(tuple->TupleData);
+     return CS_SUCCESS;
+ }
+ 
+@@ -700,7 +710,8 @@ static int parse_longlink_mfc(tuple_t *tuple,
+ 	return CS_BAD_TUPLE;
+     for (i = 0; i < link->nfn; i++) {
+ 	link->fn[i].space = *p; p++;
+-	link->fn[i].addr = le32_to_cpu(*(__le32 *)p); p += 4;
++	link->fn[i].addr = cis_get_u32(p);
++	p += 4;
+     }
+     return CS_SUCCESS;
+ }
+@@ -787,12 +798,10 @@ static int parse_jedec(tuple_t *tuple, cistpl_jedec_t *jedec)
+ 
+ static int parse_manfid(tuple_t *tuple, cistpl_manfid_t *m)
+ {
+-    __le16 *p;
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    p = (__le16 *)tuple->TupleData;
+-    m->manf = le16_to_cpu(p[0]);
+-    m->card = le16_to_cpu(p[1]);
++    m->manf = cis_get_u16(tuple->TupleData);
++    m->card = cis_get_u16(tuple->TupleData + 2);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1091,7 +1100,7 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x20:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
+ 	entry->mem.win[0].card_addr = 0;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 2;
+@@ -1099,9 +1108,8 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x40:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
+-	entry->mem.win[0].card_addr =
+-	    le16_to_cpu(*(__le16 *)(p+2)) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
++	entry->mem.win[0].card_addr = cis_get_u16(p + 2) << 8;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 4;
+ 	if (p > q) return CS_BAD_TUPLE;
+@@ -1138,7 +1146,7 @@ static int parse_bar(tuple_t *tuple, cistpl_bar_t *bar)
+     p = (u_char *)tuple->TupleData;
+     bar->attr = *p;
+     p += 2;
+-    bar->size = le32_to_cpu(*(__le32 *)p);
++    bar->size = cis_get_u32(p);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1151,7 +1159,7 @@ static int parse_config_cb(tuple_t *tuple, cistpl_config_t *config)
+ 	return CS_BAD_TUPLE;
+     config->last_idx = *(++p);
+     p++;
+-    config->base = le32_to_cpu(*(__le32 *)p);
++    config->base = cis_get_u32(p);
+     config->subtuples = tuple->TupleDataLen - 6;
+     return CS_SUCCESS;
+ }
+@@ -1267,7 +1275,7 @@ static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2)
+ 
+     v2->vers = p[0];
+     v2->comply = p[1];
+-    v2->dindex = le16_to_cpu(*(__le16 *)(p+2));
++    v2->dindex = cis_get_u16(p +2 );
+     v2->vspec8 = p[6];
+     v2->vspec9 = p[7];
+     v2->nhdr = p[8];
+@@ -1308,8 +1316,8 @@ static int parse_format(tuple_t *tuple, cistpl_format_t *fmt)
+ 
+     fmt->type = p[0];
+     fmt->edc = p[1];
+-    fmt->offset = le32_to_cpu(*(__le32 *)(p+2));
+-    fmt->length = le32_to_cpu(*(__le32 *)(p+6));
++    fmt->offset = cis_get_u32(p + 2);
++    fmt->length = cis_get_u32(p + 6);
+ 
+     return CS_SUCCESS;
+ }
+diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
+index b046974..bc90604 100644
+--- a/drivers/spi/atmel_spi.c
++++ b/drivers/spi/atmel_spi.c
+@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi)
+ 		csr |= SPI_BIT(NCPHA);
+ 
+ 	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
+index 767aed5..f81d08d 100644
+--- a/drivers/usb/gadget/Kconfig
++++ b/drivers/usb/gadget/Kconfig
+@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES
+ 	   driver on a new board.   Enable these files by choosing "Y"
+ 	   here.  If in doubt, or to conserve kernel memory, say "N".
+ 
++config USB_GADGET_DEBUG_FS
++	boolean "Debugging information files in debugfs"
++	depends on USB_GADGET && DEBUG_FS
++	help
++	   Some of the drivers in the "gadget" framework can expose
++	   debugging information in files under /sys/kernel/debug/.
++	   The information in these files may help when you're
++	   troubleshooting or bringing up a driver on a new board.
++	   Enable these files by choosing "Y" here.  If in doubt, or
++	   to conserve kernel memory, say "N".
++
+ config	USB_GADGET_SELECTED
+ 	boolean
+ 
+@@ -103,6 +114,20 @@ config USB_AMD5536UDC
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
++config USB_GADGET_ATMEL_USBA
++	boolean "Atmel USBA"
++	select USB_GADGET_DUALSPEED
++	depends on AVR32
++	help
++	  USBA is the integrated high-speed USB Device controller on
++	  the AT32AP700x processors from Atmel.
++
++config USB_ATMEL_USBA
++	tristate
++	depends on USB_GADGET_ATMEL_USBA
++	default USB_GADGET
++	select USB_GADGET_SELECTED
++
+ config USB_GADGET_FSL_USB2
+ 	boolean "Freescale Highspeed USB DR Peripheral Controller"
+ 	depends on MPC834x || PPC_MPC831x
+@@ -228,7 +253,6 @@ config USB_LH7A40X
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
+-
+ config USB_GADGET_OMAP
+ 	boolean "OMAP USB Device Controller"
+ 	depends on ARCH_OMAP
+diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
+index 1bc0f03..904e57b 100644
+--- a/drivers/usb/gadget/Makefile
++++ b/drivers/usb/gadget/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
+ obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
+ obj-$(CONFIG_USB_S3C2410)	+= s3c2410_udc.o
+ obj-$(CONFIG_USB_AT91)		+= at91_udc.o
++obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
+ obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
+ obj-$(CONFIG_USB_M66592)	+= m66592-udc.o
+ 
+diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
+new file mode 100644
+index 0000000..e35362d
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.c
+@@ -0,0 +1,2038 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/list.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ch9.h>
++#include <linux/usb_gadget.h>
++#include <linux/delay.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
++
++#include "atmel_usba_udc.h"
++
++
++static struct usba_udc the_udc;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/uaccess.h>
++
++static int queue_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_ep *ep = inode->i_private;
++	struct usba_request *req, *req_copy;
++	struct list_head *queue_data;
++
++	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
++	if (!queue_data)
++		return -ENOMEM;
++	INIT_LIST_HEAD(queue_data);
++
++	spin_lock_irq(&ep->udc->lock);
++	list_for_each_entry(req, &ep->queue, queue) {
++		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
++		if (!req_copy)
++			goto fail;
++		memcpy(req_copy, req, sizeof(*req_copy));
++		list_add_tail(&req_copy->queue, queue_data);
++	}
++	spin_unlock_irq(&ep->udc->lock);
++
++	file->private_data = queue_data;
++	return 0;
++
++fail:
++	spin_unlock_irq(&ep->udc->lock);
++	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return -ENOMEM;
++}
++
++/*
++ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
++ *
++ * b: buffer address
++ * l: buffer length
++ * I/i: interrupt/no interrupt
++ * Z/z: zero/no zero
++ * S/s: short ok/short not ok
++ * s: status
++ * n: nr_packets
++ * F/f: submitted/not submitted to FIFO
++ * D/d: using/not using DMA
++ * L/l: last transaction/not last transaction
++ */
++static ssize_t queue_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct list_head *queue = file->private_data;
++	struct usba_request *req, *tmp_req;
++	size_t len, remaining, actual = 0;
++	char tmpbuf[38];
++
++	if (!access_ok(VERIFY_WRITE, buf, nbytes))
++		return -EFAULT;
++
++	mutex_lock(&file->f_dentry->d_inode->i_mutex);
++	list_for_each_entry_safe(req, tmp_req, queue, queue) {
++		len = snprintf(tmpbuf, sizeof(tmpbuf),
++				"%8p %08x %c%c%c %5d %c%c%c\n",
++				req->req.buf, req->req.length,
++				req->req.no_interrupt ? 'i' : 'I',
++				req->req.zero ? 'Z' : 'z',
++				req->req.short_not_ok ? 's' : 'S',
++				req->req.status,
++				req->submitted ? 'F' : 'f',
++				req->using_dma ? 'D' : 'd',
++				req->last_transaction ? 'L' : 'l');
++		len = min(len, sizeof(tmpbuf));
++		if (len > nbytes)
++			break;
++
++		list_del(&req->queue);
++		kfree(req);
++
++		remaining = __copy_to_user(buf, tmpbuf, len);
++		actual += len - remaining;
++		if (remaining)
++			break;
++
++		nbytes -= len;
++		buf += len;
++	}
++	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
++
++	return actual;
++}
++
++static int queue_dbg_release(struct inode *inode, struct file *file)
++{
++	struct list_head *queue_data = file->private_data;
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return 0;
++}
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_udc *udc;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	udc = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&udc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(udc->regs + i * 4);
++	spin_unlock_irq(&udc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++			file->private_data,
++			file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++const struct file_operations queue_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= queue_dbg_open,
++	.llseek		= no_llseek,
++	.read		= queue_dbg_read,
++	.release	= queue_dbg_release,
++};
++
++const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void usba_ep_init_debugfs(struct usba_udc *udc,
++		struct usba_ep *ep)
++{
++	struct dentry *ep_root;
++
++	ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
++	if (!ep_root)
++		goto err_root;
++	ep->debugfs_dir = ep_root;
++
++	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
++						ep, &queue_dbg_fops);
++	if (!ep->debugfs_queue)
++		goto err_queue;
++
++	if (ep->can_dma) {
++		ep->debugfs_dma_status
++			= debugfs_create_u32("dma_status", 0400, ep_root,
++					&ep->last_dma_status);
++		if (!ep->debugfs_dma_status)
++			goto err_dma_status;
++	}
++	if (ep_is_control(ep)) {
++		ep->debugfs_state
++			= debugfs_create_u32("state", 0400, ep_root,
++					&ep->state);
++		if (!ep->debugfs_state)
++			goto err_state;
++	}
++
++	return;
++
++err_state:
++	if (ep->can_dma)
++		debugfs_remove(ep->debugfs_dma_status);
++err_dma_status:
++	debugfs_remove(ep->debugfs_queue);
++err_queue:
++	debugfs_remove(ep_root);
++err_root:
++	dev_err(&ep->udc->pdev->dev,
++		"failed to create debugfs directory for %s\n", ep->ep.name);
++}
++
++static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++	debugfs_remove(ep->debugfs_queue);
++	debugfs_remove(ep->debugfs_dma_status);
++	debugfs_remove(ep->debugfs_state);
++	debugfs_remove(ep->debugfs_dir);
++	ep->debugfs_dma_status = NULL;
++	ep->debugfs_dir = NULL;
++}
++
++static void usba_init_debugfs(struct usba_udc *udc)
++{
++	struct dentry *root, *regs;
++	struct resource *regs_resource;
++
++	root = debugfs_create_dir(udc->gadget.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	udc->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
++				CTRL_IOMEM_ID);
++	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
++	udc->debugfs_regs = regs;
++
++	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
++
++	return;
++
++err_regs:
++	debugfs_remove(root);
++err_root:
++	udc->debugfs_root = NULL;
++	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++}
++
++static void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
++	debugfs_remove(udc->debugfs_regs);
++	debugfs_remove(udc->debugfs_root);
++	udc->debugfs_regs = NULL;
++	udc->debugfs_root = NULL;
++}
++#else
++static inline void usba_ep_init_debugfs(struct usba_udc *udc,
++					 struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_init_debugfs(struct usba_udc *udc)
++{
++
++}
++
++static inline void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++
++}
++#endif
++
++static int vbus_is_present(struct usba_udc *udc)
++{
++	if (udc->vbus_pin != -1)
++		return gpio_get_value(udc->vbus_pin);
++
++	/* No Vbus detection: Assume always present */
++	return 1;
++}
++
++static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
++{
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
++	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
++		tmp = *(unsigned long *)buf;
++		if (len >= 4) {
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++			__raw_writel(tmp, fifo);
++		} else {
++			do {
++				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
++				__raw_writeb(tmp >> 24, fifo);
++				fifo++;
++				tmp <<= 8;
++			} while (--len);
++			break;
++		}
++	}
++}
++
++static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++{
++	union {
++		unsigned long *w;
++		unsigned char *b;
++	} p;
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
++	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
++		if (len >= 4) {
++			tmp = __raw_readl(fifo);
++			*p.w = tmp;
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++		} else {
++			do {
++				tmp = __raw_readb(fifo);
++				*p.b = tmp;
++				DBG(DBG_FIFO, " -> %02lx\n", tmp);
++				fifo++, p.b++;
++			} while (--len);
++		}
++	}
++}
++
++static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
++{
++	unsigned int transaction_len;
++
++	transaction_len = req->req.length - req->req.actual;
++	req->last_transaction = 1;
++	if (transaction_len > ep->ep.maxpacket) {
++		transaction_len = ep->ep.maxpacket;
++		req->last_transaction = 0;
++	} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
++		req->last_transaction = 0;
++
++	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
++		ep->ep.name, req, transaction_len,
++		req->last_transaction ? ", done" : "");
++
++	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	req->req.actual += transaction_len;
++}
++
++static void submit_request(struct usba_ep *ep, struct usba_request *req)
++{
++	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
++		ep->ep.name, req, req->req.length);
++
++	req->req.actual = 0;
++	req->submitted = 1;
++
++	if (req->using_dma) {
++		if (req->req.length == 0) {
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++			return;
++		}
++
++		if (req->req.zero)
++			usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
++		else
++			usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
++
++		usba_dma_writel(ep, ADDRESS, req->req.dma);
++		usba_dma_writel(ep, CONTROL, req->ctrl);
++	} else {
++		next_fifo_transaction(ep, req);
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		} else {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		}
++	}
++}
++
++static void submit_next_request(struct usba_ep *ep)
++{
++	struct usba_request *req;
++
++	if (list_empty(&ep->queue)) {
++		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
++		return;
++	}
++
++	req = list_entry(ep->queue.next, struct usba_request, queue);
++	if (!req->submitted)
++		submit_request(ep, req);
++}
++
++static void send_status(struct usba_udc *udc, struct usba_ep *ep)
++{
++	ep->state = STATUS_STAGE_IN;
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++}
++
++static void receive_data(struct usba_ep *ep)
++{
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req;
++	unsigned long status;
++	unsigned int bytecount, nr_busy;
++	int is_complete = 0;
++
++	status = usba_ep_readl(ep, STA);
++	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
++
++	while (nr_busy > 0) {
++		if (list_empty(&ep->queue)) {
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			break;
++		}
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++		bytecount = USBA_BFEXT(BYTE_COUNT, status);
++
++		if (status & (1 << 31))
++			is_complete = 1;
++		if (req->req.actual + bytecount >= req->req.length) {
++			is_complete = 1;
++			bytecount = req->req.length - req->req.actual;
++		}
++
++		copy_from_fifo(req->req.buf + req->req.actual,
++				ep->fifo, bytecount);
++		req->req.actual += bytecount;
++
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++
++		if (is_complete) {
++			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
++			req->req.status = 0;
++			list_del_init(&req->queue);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			spin_unlock(&udc->lock);
++			req->req.complete(&ep->ep, &req->req);
++			spin_lock(&udc->lock);
++		}
++
++		status = usba_ep_readl(ep, STA);
++		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++		if (is_complete && ep_is_control(ep)) {
++			send_status(udc, ep);
++			break;
++		}
++	}
++}
++
++static void
++request_complete(struct usba_ep *ep, struct usba_request *req, int status)
++{
++	struct usba_udc *udc = ep->udc;
++
++	WARN_ON(!list_empty(&req->queue));
++
++	if (req->req.status == -EINPROGRESS)
++		req->req.status = status;
++
++	if (req->mapped) {
++		dma_unmap_single(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->req.dma = DMA_ADDR_INVALID;
++		req->mapped = 0;
++	}
++
++	DBG(DBG_GADGET | DBG_REQ,
++		"%s: req %p complete: status %d, actual %u\n",
++		ep->ep.name, req, req->req.status, req->req.actual);
++
++	spin_unlock(&udc->lock);
++	req->req.complete(&ep->ep, &req->req);
++	spin_lock(&udc->lock);
++}
++
++static void
++request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
++{
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, list, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, status);
++	}
++}
++
++static int
++usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags, ept_cfg, maxpacket;
++	unsigned int nr_trans;
++
++	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
++
++	maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
++
++	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
++			|| ep->index == 0
++			|| desc->bDescriptorType != USB_DT_ENDPOINT
++			|| maxpacket == 0
++			|| maxpacket > ep->fifo_size) {
++		DBG(DBG_ERR, "ep_enable: Invalid argument");
++		return -EINVAL;
++	}
++
++	ep->is_isoc = 0;
++	ep->is_in = 0;
++
++	if (maxpacket <= 8)
++		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
++	else
++		/* LSB is bit 1, not 0 */
++		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
++
++	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
++			ep->ep.name, ept_cfg, maxpacket);
++
++	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
++		ep->is_in = 1;
++		ept_cfg |= USBA_EPT_DIR_IN;
++	}
++
++	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
++	case USB_ENDPOINT_XFER_CONTROL:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
++		break;
++	case USB_ENDPOINT_XFER_ISOC:
++		if (!ep->can_isoc) {
++			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
++					ep->ep.name);
++			return -EINVAL;
++		}
++
++		/*
++		 * Bits 11:12 specify number of _additional_
++		 * transactions per microframe.
++		 */
++		nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
++		if (nr_trans > 3)
++			return -EINVAL;
++
++		ep->is_isoc = 1;
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
++
++		/*
++		 * Do triple-buffering on high-bandwidth iso endpoints.
++		 */
++		if (nr_trans > 1 && ep->nr_banks == 3)
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
++		else
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
++		break;
++	case USB_ENDPOINT_XFER_BULK:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	case USB_ENDPOINT_XFER_INT:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	}
++
++	spin_lock_irqsave(&ep->udc->lock, flags);
++
++	if (ep->desc) {
++		spin_unlock_irqrestore(&ep->udc->lock, flags);
++		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
++		return -EBUSY;
++	}
++
++	ep->desc = desc;
++	ep->ep.maxpacket = maxpacket;
++
++	usba_ep_writel(ep, CFG, ept_cfg);
++	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++
++	if (ep->can_dma) {
++		u32 ctrl;
++
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)
++					| USBA_BF(DMA_INT, 1 << ep->index)));
++		ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
++		usba_ep_writel(ep, CTL_ENB, ctrl);
++	} else {
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)));
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
++			(unsigned long)usba_ep_readl(ep, CFG));
++	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
++			(unsigned long)usba_readl(udc, INT_ENB));
++
++	return 0;
++}
++
++static int usba_ep_disable(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	LIST_HEAD(req_list);
++	unsigned long flags;
++
++	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (!ep->desc) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
++		return -EINVAL;
++	}
++	ep->desc = NULL;
++
++	list_splice_init(&ep->queue, &req_list);
++	if (ep->can_dma) {
++		usba_dma_writel(ep, CONTROL, 0);
++		usba_dma_writel(ep, ADDRESS, 0);
++		usba_dma_readl(ep, STATUS);
++	}
++	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
++	usba_writel(udc, INT_ENB,
++			usba_readl(udc, INT_ENB)
++			& ~USBA_BF(EPT_INT, 1 << ep->index));
++
++	request_complete_list(ep, &req_list, -ESHUTDOWN);
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static struct usb_request *
++usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
++{
++	struct usba_request *req;
++
++	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
++
++	req = kzalloc(sizeof(*req), gfp_flags);
++	if (!req)
++		return NULL;
++
++	INIT_LIST_HEAD(&req->queue);
++	req->req.dma = DMA_ADDR_INVALID;
++
++	return &req->req;
++}
++
++static void
++usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_request *req = to_usba_req(_req);
++
++	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
++
++	kfree(req);
++}
++
++static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
++		struct usba_request *req, gfp_t gfp_flags)
++{
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
++		ep->ep.name, req->req.length, req->req.dma,
++		req->req.zero ? 'Z' : 'z',
++		req->req.short_not_ok ? 'S' : 's',
++		req->req.no_interrupt ? 'I' : 'i');
++
++	if (req->req.length > 0x10000) {
++		/* Lengths from 0 to 65536 (inclusive) are supported */
++		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
++		return -EINVAL;
++	}
++
++	req->using_dma = 1;
++
++	if (req->req.dma == DMA_ADDR_INVALID) {
++		req->req.dma = dma_map_single(
++			&udc->pdev->dev, req->req.buf, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 1;
++	} else {
++		dma_sync_single_for_device(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 0;
++	}
++
++	req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
++			| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
++			| USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
++
++	if (ep->is_in)
++		req->ctrl |= USBA_DMA_END_BUF_EN;
++
++	/*
++	 * Add this request to the queue and submit for DMA if
++	 * possible. Check if we're still alive first -- we may have
++	 * received a reset since last time we checked.
++	 */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		if (list_empty(&ep->queue))
++			submit_request(ep, req);
++
++		list_add_tail(&req->queue, &ep->queue);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int
++usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
++{
++	struct usba_request *req = to_usba_req(_req);
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
++			ep->ep.name, req, _req->length);
++
++	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
++		return -ESHUTDOWN;
++
++	req->submitted = 0;
++	req->using_dma = 0;
++	req->last_transaction = 0;
++
++	_req->status = -EINPROGRESS;
++	_req->actual = 0;
++
++	if (ep->can_dma)
++		return queue_dma(udc, ep, req, gfp_flags);
++
++	/* May have received a reset since last time we checked */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		list_add_tail(&req->queue, &ep->queue);
++
++		if (ep->is_in || (ep_is_control(ep)
++				&& (ep->state == DATA_STAGE_IN
++					|| ep->state == STATUS_STAGE_IN)))
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		else
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static void
++usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
++{
++	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
++}
++
++static int stop_dma(struct usba_ep *ep, u32 *pstatus)
++{
++	unsigned int timeout;
++	u32 status;
++
++	/*
++	 * Stop the DMA controller. When writing both CH_EN
++	 * and LINK to 0, the other bits are not affected.
++	 */
++	usba_dma_writel(ep, CONTROL, 0);
++
++	/* Wait for the FIFO to empty */
++	for (timeout = 40; timeout; --timeout) {
++		status = usba_dma_readl(ep, STATUS);
++		if (!(status & USBA_DMA_CH_EN))
++			break;
++		udelay(1);
++	}
++
++	if (pstatus)
++		*pstatus = status;
++
++	if (timeout == 0) {
++		dev_err(&ep->udc->pdev->dev,
++			"%s: timed out waiting for DMA FIFO to empty\n",
++			ep->ep.name);
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req = to_usba_req(_req);
++	unsigned long flags;
++	u32 status;
++
++	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
++			ep->ep.name, req);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (req->using_dma) {
++		/*
++		 * If this request is currently being transferred,
++		 * stop the DMA controller and reset the FIFO.
++		 */
++		if (ep->queue.next == &req->queue) {
++			status = usba_dma_readl(ep, STATUS);
++			if (status & USBA_DMA_CH_EN)
++				stop_dma(ep, &status);
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++			ep->last_dma_status = status;
++#endif
++
++			usba_writel(udc, EPT_RST, 1 << ep->index);
++
++			usba_update_req(ep, req, status);
++		}
++	}
++
++	/*
++	 * Errors should stop the queue from advancing until the
++	 * completion function returns.
++	 */
++	list_del_init(&req->queue);
++
++	request_complete(ep, req, -ECONNRESET);
++
++	/* Process the next request if any */
++	submit_next_request(ep);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static int usba_ep_set_halt(struct usb_ep *_ep, int value)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret = 0;
++
++	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
++			value ? "set" : "clear");
++
++	if (!ep->desc) {
++		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
++				ep->ep.name);
++		return -ENODEV;
++	}
++	if (ep->is_isoc) {
++		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
++				ep->ep.name);
++		return -ENOTTY;
++	}
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	/*
++	 * We can't halt IN endpoints while there are still data to be
++	 * transferred
++	 */
++	if (!list_empty(&ep->queue)
++			|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
++					& USBA_BF(BUSY_BANKS, -1L))))) {
++		ret = -EAGAIN;
++	} else {
++		if (value)
++			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++		else
++			usba_ep_writel(ep, CLR_STA,
++					USBA_FORCE_STALL | USBA_TOGGLE_CLR);
++		usba_ep_readl(ep, STA);
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int usba_ep_fifo_status(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++
++	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++}
++
++static void usba_ep_fifo_flush(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++
++	usba_writel(udc, EPT_RST, 1 << ep->index);
++}
++
++static const struct usb_ep_ops usba_ep_ops = {
++	.enable		= usba_ep_enable,
++	.disable	= usba_ep_disable,
++	.alloc_request	= usba_ep_alloc_request,
++	.free_request	= usba_ep_free_request,
++	.queue		= usba_ep_queue,
++	.dequeue	= usba_ep_dequeue,
++	.set_halt	= usba_ep_set_halt,
++	.fifo_status	= usba_ep_fifo_status,
++	.fifo_flush	= usba_ep_fifo_flush,
++};
++
++static int usba_udc_get_frame(struct usb_gadget *gadget)
++{
++	struct usba_udc *udc = to_usba_udc(gadget);
++
++	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
++}
++
++static const struct usb_gadget_ops usba_udc_ops = {
++	.get_frame	= usba_udc_get_frame,
++};
++
++#define EP(nam, idx, maxpkt, maxbk, dma, isoc)			\
++{								\
++	.ep	= {						\
++		.ops		= &usba_ep_ops,			\
++		.name		= nam,				\
++		.maxpacket	= maxpkt,			\
++	},							\
++	.udc		= &the_udc,				\
++	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
++	.fifo_size	= maxpkt,				\
++	.nr_banks	= maxbk,				\
++	.index		= idx,					\
++	.can_dma	= dma,					\
++	.can_isoc	= isoc,					\
++}
++
++static struct usba_ep usba_ep[] = {
++	EP("ep0", 0, 64, 1, 0, 0),
++	EP("ep1in-bulk", 1, 512, 2, 1, 1),
++	EP("ep2out-bulk", 2, 512, 2, 1, 1),
++	EP("ep3in-int", 3, 64, 3, 1, 0),
++	EP("ep4out-int", 4, 64, 3, 1, 0),
++	EP("ep5in-iso", 5, 1024, 3, 1, 1),
++	EP("ep6out-iso", 6, 1024, 3, 1, 1),
++};
++#undef EP
++
++static struct usb_endpoint_descriptor usba_ep0_desc = {
++	.bLength = USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType = USB_DT_ENDPOINT,
++	.bEndpointAddress = 0,
++	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
++	.wMaxPacketSize = __constant_cpu_to_le16(64),
++	/* FIXME: I have no idea what to put here */
++	.bInterval = 1,
++};
++
++static void nop_release(struct device *dev)
++{
++
++}
++
++static struct usba_udc the_udc = {
++	.gadget	= {
++		.ops		= &usba_udc_ops,
++		.ep0		= &usba_ep[0].ep,
++		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
++		.is_dualspeed	= 1,
++		.name		= "atmel_usba_udc",
++		.dev	= {
++			.bus_id		= "gadget",
++			.release	= nop_release,
++		},
++	},
++
++	.lock	= SPIN_LOCK_UNLOCKED,
++};
++
++/*
++ * Called with interrupts disabled and udc->lock held.
++ */
++static void reset_all_endpoints(struct usba_udc *udc)
++{
++	struct usba_ep *ep;
++	struct usba_request *req, *tmp_req;
++
++	usba_writel(udc, EPT_RST, ~0UL);
++
++	ep = to_usba_ep(udc->gadget.ep0);
++	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, -ECONNRESET);
++	}
++
++	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
++		if (ep->desc)
++			usba_ep_disable(&ep->ep);
++	}
++}
++
++static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
++{
++	struct usba_ep *ep;
++
++	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
++		return to_usba_ep(udc->gadget.ep0);
++
++	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
++		u8 bEndpointAddress;
++
++		if (!ep->desc)
++			continue;
++		bEndpointAddress = ep->desc->bEndpointAddress;
++		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
++			continue;
++		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
++				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
++			return ep;
++	}
++
++	return NULL;
++}
++
++/* Called with interrupts disabled and udc->lock held */
++static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
++{
++	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++	ep->state = WAIT_FOR_SETUP;
++}
++
++static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
++{
++	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
++		return 1;
++	return 0;
++}
++
++static inline void set_address(struct usba_udc *udc, unsigned int addr)
++{
++	u32 regval;
++
++	DBG(DBG_BUS, "setting address %u...\n", addr);
++	regval = usba_readl(udc, CTRL);
++	regval = USBA_BFINS(DEV_ADDR, addr, regval);
++	usba_writel(udc, CTRL, regval);
++}
++
++static int do_test_mode(struct usba_udc *udc)
++{
++	static const char test_packet_buffer[] = {
++		/* JKJKJKJK * 9 */
++		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++		/* JJKKJJKK * 8 */
++		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
++		/* JJKKJJKK * 8 */
++		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
++		/* JJJJJJJKKKKKKK * 8 */
++		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		/* JJJJJJJK * 8 */
++		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
++		/* {JKKKKKKK * 10}, JK */
++		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
++	};
++	struct usba_ep *ep;
++	struct device *dev = &udc->pdev->dev;
++	int test_mode;
++
++	test_mode = udc->test_mode;
++
++	/* Start from a clean slate */
++	reset_all_endpoints(udc);
++
++	switch (test_mode) {
++	case 0x0100:
++		/* Test_J */
++		usba_writel(udc, TST, USBA_TST_J_MODE);
++		dev_info(dev, "Entering Test_J mode...\n");
++		break;
++	case 0x0200:
++		/* Test_K */
++		usba_writel(udc, TST, USBA_TST_K_MODE);
++		dev_info(dev, "Entering Test_K mode...\n");
++		break;
++	case 0x0300:
++		/*
++		 * Test_SE0_NAK: Force high-speed mode and set up ep0
++		 * for Bulk IN transfers
++		 */
++		ep = &usba_ep[0];
++		usba_writel(udc, TST,
++				USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
++		}
++		break;
++	case 0x0400:
++		/* Test_Packet */
++		ep = &usba_ep[0];
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_Packet: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			usba_writel(udc, TST, USBA_TST_PKT_MODE);
++			copy_to_fifo(ep->fifo, test_packet_buffer,
++					sizeof(test_packet_buffer));
++			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++			dev_info(dev, "Entering Test_Packet mode...\n");
++		}
++		break;
++	default:
++		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++/* Avoid overly long expressions */
++static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
++		return true;
++	return false;
++}
++
++static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
++		struct usb_ctrlrequest *crq)
++{
++	int retval = 0;;
++
++	switch (crq->bRequest) {
++	case USB_REQ_GET_STATUS: {
++		u16 status;
++
++		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
++			/* Self-powered, no remote wakeup */
++			status = __constant_cpu_to_le16(1 << 0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
++			status = __constant_cpu_to_le16(0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
++			struct usba_ep *target;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			status = 0;
++			if (is_stalled(udc, target))
++				status |= __constant_cpu_to_le16(1);
++		} else
++			goto delegate;
++
++		/* Write directly to the FIFO. No queueing is done. */
++		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
++			goto stall;
++		ep->state = DATA_STAGE_IN;
++		__raw_writew(status, ep->fifo);
++		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++		break;
++	}
++
++	case USB_REQ_CLEAR_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				/* Can't CLEAR_FEATURE TEST_MODE */
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
++			if (target->index != 0)
++				usba_ep_writel(target, CLR_STA,
++						USBA_TOGGLE_CLR);
++		} else {
++			goto delegate;
++		}
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_test_mode(crq)) {
++				send_status(udc, ep);
++				ep->state = STATUS_STAGE_TEST;
++				udc->test_mode = le16_to_cpu(crq->wIndex);
++				return 0;
++			} else if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
++		} else
++			goto delegate;
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_ADDRESS:
++		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
++			goto delegate;
++
++		set_address(udc, le16_to_cpu(crq->wValue));
++		send_status(udc, ep);
++		ep->state = STATUS_STAGE_ADDR;
++		break;
++
++	default:
++delegate:
++		spin_unlock(&udc->lock);
++		retval = udc->driver->setup(&udc->gadget, crq);
++		spin_lock(&udc->lock);
++	}
++
++	return retval;
++
++stall:
++	printk(KERN_ERR
++		"udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
++		"halting endpoint...\n",
++		ep->ep.name, crq->bRequestType, crq->bRequest,
++		le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
++		le16_to_cpu(crq->wLength));
++	set_protocol_stall(udc, ep);
++	return -1;
++}
++
++static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++restart:
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
++			ep->ep.name, ep->state, epstatus, epctrl);
++
++	req = NULL;
++	if (!list_empty(&ep->queue))
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		if (req->submitted)
++			next_fifo_transaction(ep, req);
++		else
++			submit_request(ep, req);
++
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		}
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
++		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
++
++		switch (ep->state) {
++		case DATA_STAGE_IN:
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = STATUS_STAGE_OUT;
++			break;
++		case STATUS_STAGE_ADDR:
++			/* Activate our new address */
++			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
++						| USBA_FADDR_EN));
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_IN:
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++				submit_next_request(ep);
++			}
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_TEST:
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			if (do_test_mode(udc))
++				set_protocol_stall(udc, ep);
++			break;
++		default:
++			printk(KERN_ERR
++				"udc: %s: TXCOMP: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		switch (ep->state) {
++		case STATUS_STAGE_OUT:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++			}
++			ep->state = WAIT_FOR_SETUP;
++			break;
++
++		case DATA_STAGE_OUT:
++			receive_data(ep);
++			break;
++
++		default:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			printk(KERN_ERR
++				"udc: %s: RXRDY: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if (epstatus & USBA_RX_SETUP) {
++		union {
++			struct usb_ctrlrequest crq;
++			unsigned long data[2];
++		} crq;
++		unsigned int pkt_len;
++		int ret;
++
++		if (ep->state != WAIT_FOR_SETUP) {
++			/*
++			 * Didn't expect a SETUP packet at this
++			 * point. Clean up any pending requests (which
++			 * may be successful).
++			 */
++			int status = -EPROTO;
++
++			/*
++			 * RXRDY and TXCOMP are dropped when SETUP
++			 * packets arrive.  Just pretend we received
++			 * the status packet.
++			 */
++			if (ep->state == STATUS_STAGE_OUT
++					|| ep->state == STATUS_STAGE_IN) {
++				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++				status = 0;
++			}
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, status);
++			}
++		}
++
++		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
++		if (pkt_len != sizeof(crq)) {
++			printk(KERN_WARNING "udc: Invalid packet length %u "
++				"(expected %lu)\n", pkt_len, sizeof(crq));
++			set_protocol_stall(udc, ep);
++			return;
++		}
++
++		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
++		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
++
++		/* Free up one bank in the FIFO so that we can
++		 * generate or receive a reply right away. */
++		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
++
++		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
++			ep->state, crq.crq.bRequestType,
++			crq.crq.bRequest); */
++
++		if (crq.crq.bRequestType & USB_DIR_IN) {
++			/*
++			 * The USB 2.0 spec states that "if wLength is
++			 * zero, there is no data transfer phase."
++			 * However, testusb #14 seems to actually
++			 * expect a data phase even if wLength = 0...
++			 */
++			ep->state = DATA_STAGE_IN;
++		} else {
++			if (crq.crq.wLength != __constant_cpu_to_le16(0))
++				ep->state = DATA_STAGE_OUT;
++			else
++				ep->state = STATUS_STAGE_IN;
++		}
++
++		ret = -1;
++		if (ep->index == 0)
++			ret = handle_ep0_setup(udc, ep, &crq.crq);
++		else {
++			spin_unlock(&udc->lock);
++			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++			spin_lock(&udc->lock);
++		}
++
++		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
++			crq.crq.bRequestType, crq.crq.bRequest,
++			le16_to_cpu(crq.crq.wLength), ep->state, ret);
++
++		if (ret < 0) {
++			/* Let the host know that we failed */
++			set_protocol_stall(udc, ep);
++		}
++	}
++}
++
++static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
++
++	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
++
++		if (list_empty(&ep->queue)) {
++			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			return;
++		}
++
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++
++		if (req->using_dma) {
++			/* Send a zero-length packet */
++			usba_ep_writel(ep, SET_STA,
++					USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_DIS,
++					USBA_TX_PK_RDY);
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		} else {
++			if (req->submitted)
++				next_fifo_transaction(ep, req);
++			else
++				submit_request(ep, req);
++
++			if (req->last_transaction) {
++				list_del_init(&req->queue);
++				submit_next_request(ep);
++				request_complete(ep, req, 0);
++			}
++		}
++
++		epstatus = usba_ep_readl(ep, STA);
++		epctrl = usba_ep_readl(ep, CTL);
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
++		receive_data(ep);
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++	}
++}
++
++static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 status, control, pending;
++
++	status = usba_dma_readl(ep, STATUS);
++	control = usba_dma_readl(ep, CONTROL);
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	ep->last_dma_status = status;
++#endif
++	pending = status & control;
++	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
++
++	if (status & USBA_DMA_CH_EN) {
++		dev_err(&udc->pdev->dev,
++			"DMA_CH_EN is set after transfer is finished!\n");
++		dev_err(&udc->pdev->dev,
++			"status=%#08x, pending=%#08x, control=%#08x\n",
++			status, pending, control);
++
++		/*
++		 * try to pretend nothing happened. We might have to
++		 * do something here...
++		 */
++	}
++
++	if (list_empty(&ep->queue))
++		/* Might happen if a reset comes along at the right moment */
++		return;
++
++	if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++		usba_update_req(ep, req, status);
++
++		list_del_init(&req->queue);
++		submit_next_request(ep);
++		request_complete(ep, req, 0);
++	}
++}
++
++static irqreturn_t usba_udc_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	u32 status;
++	u32 dma_status;
++	u32 ep_status;
++
++	spin_lock(&udc->lock);
++
++	status = usba_readl(udc, INT_STA);
++	DBG(DBG_INT, "irq, status=%#08x\n", status);
++
++	if (status & USBA_DET_SUSPEND) {
++		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
++		DBG(DBG_BUS, "Suspend detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->suspend) {
++			spin_unlock(&udc->lock);
++			udc->driver->suspend(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	if (status & USBA_WAKE_UP) {
++		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
++		DBG(DBG_BUS, "Wake Up CPU detected\n");
++	}
++
++	if (status & USBA_END_OF_RESUME) {
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
++		DBG(DBG_BUS, "Resume detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->resume) {
++			spin_unlock(&udc->lock);
++			udc->driver->resume(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	dma_status = USBA_BFEXT(DMA_INT, status);
++	if (dma_status) {
++		int i;
++
++		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
++			if (dma_status & (1 << i))
++				usba_dma_irq(udc, &usba_ep[i]);
++	}
++
++	ep_status = USBA_BFEXT(EPT_INT, status);
++	if (ep_status) {
++		int i;
++
++		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
++			if (ep_status & (1 << i)) {
++				if (ep_is_control(&usba_ep[i]))
++					usba_control_irq(udc, &usba_ep[i]);
++				else
++					usba_ep_irq(udc, &usba_ep[i]);
++			}
++	}
++
++	if (status & USBA_END_OF_RESET) {
++		struct usba_ep *ep0;
++
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
++		reset_all_endpoints(udc);
++
++		if (status & USBA_HIGH_SPEED) {
++			DBG(DBG_BUS, "High-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_HIGH;
++		} else {
++			DBG(DBG_BUS, "Full-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_FULL;
++		}
++
++		ep0 = &usba_ep[0];
++		ep0->desc = &usba_ep0_desc;
++		ep0->state = WAIT_FOR_SETUP;
++		usba_ep_writel(ep0, CFG,
++				(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
++				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
++		usba_ep_writel(ep0, CTL_ENB,
++				USBA_EPT_ENABLE | USBA_RX_SETUP);
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++				| USBA_BF(EPT_INT, 1)
++				| USBA_DET_SUSPEND
++				| USBA_END_OF_RESUME));
++
++		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
++			dev_warn(&udc->pdev->dev,
++				 "WARNING: EP0 configuration is invalid!\n");
++	}
++
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t usba_vbus_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	int vbus;
++
++	/* debounce */
++	udelay(10);
++
++	spin_lock(&udc->lock);
++
++	/* May happen if Vbus pin toggles during probe() */
++	if (!udc->driver)
++		goto out;
++
++	vbus = gpio_get_value(udc->vbus_pin);
++	if (vbus != udc->vbus_prev) {
++		if (vbus) {
++			usba_writel(udc, CTRL, USBA_EN_USBA);
++			usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++		} else {
++			udc->gadget.speed = USB_SPEED_UNKNOWN;
++			reset_all_endpoints(udc);
++			usba_writel(udc, CTRL, 0);
++			spin_unlock(&udc->lock);
++			udc->driver->disconnect(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++		udc->vbus_prev = vbus;
++	}
++
++out:
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++int usb_gadget_register_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++	int ret;
++
++	if (!udc->pdev)
++		return -ENODEV;
++
++	spin_lock_irqsave(&udc->lock, flags);
++	if (udc->driver) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		return -EBUSY;
++	}
++
++	udc->driver = driver;
++	udc->gadget.dev.driver = &driver->driver;
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	clk_enable(udc->pclk);
++	clk_enable(udc->hclk);
++
++	ret = driver->bind(&udc->gadget);
++	if (ret) {
++		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
++			driver->driver.name, ret);
++		goto err_driver_bind;
++	}
++
++	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++
++	udc->vbus_prev = 0;
++	if (udc->vbus_pin != -1)
++		enable_irq(gpio_to_irq(udc->vbus_pin));
++
++	/* If Vbus is present, enable the controller and wait for reset */
++	spin_lock_irqsave(&udc->lock, flags);
++	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
++		usba_writel(udc, CTRL, USBA_EN_USBA);
++		usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++
++err_driver_bind:
++	udc->driver = NULL;
++	udc->gadget.dev.driver = NULL;
++	return ret;
++}
++EXPORT_SYMBOL(usb_gadget_register_driver);
++
++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++
++	if (!udc->pdev)
++		return -ENODEV;
++	if (driver != udc->driver)
++		return -EINVAL;
++
++	if (udc->vbus_pin != -1)
++		disable_irq(gpio_to_irq(udc->vbus_pin));
++
++	spin_lock_irqsave(&udc->lock, flags);
++	udc->gadget.speed = USB_SPEED_UNKNOWN;
++	reset_all_endpoints(udc);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	/* This will also disable the DP pullup */
++	usba_writel(udc, CTRL, 0);
++
++	driver->unbind(&udc->gadget);
++	udc->gadget.dev.driver = NULL;
++	udc->driver = NULL;
++
++	clk_disable(udc->hclk);
++	clk_disable(udc->pclk);
++
++	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++
++	return 0;
++}
++EXPORT_SYMBOL(usb_gadget_unregister_driver);
++
++static int __init usba_udc_probe(struct platform_device *pdev)
++{
++	struct usba_platform_data *pdata = pdev->dev.platform_data;
++	struct resource *regs, *fifo;
++	struct clk *pclk, *hclk;
++	struct usba_udc *udc = &the_udc;
++	int irq, ret, i;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
++	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
++	if (!regs || !fifo)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto err_get_hclk;
++	}
++
++	udc->pdev = pdev;
++	udc->pclk = pclk;
++	udc->hclk = hclk;
++	udc->vbus_pin = -1;
++
++	ret = -ENOMEM;
++	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!udc->regs) {
++		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
++		goto err_map_regs;
++	}
++	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
++		 (unsigned long)regs->start, udc->regs);
++	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
++	if (!udc->fifo) {
++		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
++		goto err_map_fifo;
++	}
++	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
++		 (unsigned long)fifo->start, udc->fifo);
++
++	device_initialize(&udc->gadget.dev);
++	udc->gadget.dev.parent = &pdev->dev;
++	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
++
++	platform_set_drvdata(pdev, udc);
++
++	/* Make sure we start from a clean slate */
++	clk_enable(pclk);
++	usba_writel(udc, CTRL, 0);
++	clk_disable(pclk);
++
++	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
++	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
++	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
++	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
++		struct usba_ep *ep = &usba_ep[i];
++
++		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
++		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
++		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
++
++		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
++	}
++
++	ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
++	if (ret) {
++		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
++			irq, ret);
++		goto err_request_irq;
++	}
++	udc->irq = irq;
++
++	ret = device_add(&udc->gadget.dev);
++	if (ret) {
++		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
++		goto err_device_add;
++	}
++
++	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
++		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
++			udc->vbus_pin = pdata->vbus_pin;
++
++			ret = request_irq(gpio_to_irq(udc->vbus_pin),
++					usba_vbus_irq, 0,
++					"atmel_usba_udc", udc);
++			if (ret) {
++				gpio_free(udc->vbus_pin);
++				udc->vbus_pin = -1;
++				dev_warn(&udc->pdev->dev,
++					 "failed to request vbus irq; "
++					 "assuming always on\n");
++			} else {
++				disable_irq(gpio_to_irq(udc->vbus_pin));
++			}
++		}
++	}
++
++	usba_init_debugfs(udc);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_init_debugfs(udc, &usba_ep[i]);
++
++	return 0;
++
++err_device_add:
++	free_irq(irq, udc);
++err_request_irq:
++	iounmap(udc->fifo);
++err_map_fifo:
++	iounmap(udc->regs);
++err_map_regs:
++	clk_put(hclk);
++err_get_hclk:
++	clk_put(pclk);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return ret;
++}
++
++static int __exit usba_udc_remove(struct platform_device *pdev)
++{
++	struct usba_udc *udc;
++	int i;
++
++	udc = platform_get_drvdata(pdev);
++
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_cleanup_debugfs(&usba_ep[i]);
++	usba_cleanup_debugfs(udc);
++
++	if (udc->vbus_pin != -1)
++		gpio_free(udc->vbus_pin);
++
++	free_irq(udc->irq, udc);
++	iounmap(udc->fifo);
++	iounmap(udc->regs);
++	clk_put(udc->hclk);
++	clk_put(udc->pclk);
++
++	device_unregister(&udc->gadget.dev);
++
++	return 0;
++}
++
++static struct platform_driver udc_driver = {
++	.remove		= __exit_p(usba_udc_remove),
++	.driver		= {
++		.name		= "atmel_usba_udc",
++	},
++};
++
++static int __init udc_init(void)
++{
++	return platform_driver_probe(&udc_driver, usba_udc_probe);
++}
++module_init(udc_init);
++
++static void __exit udc_exit(void)
++{
++	platform_driver_unregister(&udc_driver);
++}
++module_exit(udc_exit);
++
++MODULE_DESCRIPTION("Atmel USBA UDC driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h
+new file mode 100644
+index 0000000..f4f0f8b
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.h
+@@ -0,0 +1,350 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
++#define __LINUX_USB_GADGET_USBA_UDC_H__
++
++/* USB register offsets */
++#define USBA_CTRL				0x0000
++#define USBA_FNUM				0x0004
++#define USBA_INT_ENB				0x0010
++#define USBA_INT_STA				0x0014
++#define USBA_INT_CLR				0x0018
++#define USBA_EPT_RST				0x001c
++#define USBA_TST				0x00e0
++
++/* USB endpoint register offsets */
++#define USBA_EPT_CFG				0x0000
++#define USBA_EPT_CTL_ENB			0x0004
++#define USBA_EPT_CTL_DIS			0x0008
++#define USBA_EPT_CTL				0x000c
++#define USBA_EPT_SET_STA			0x0014
++#define USBA_EPT_CLR_STA			0x0018
++#define USBA_EPT_STA				0x001c
++
++/* USB DMA register offsets */
++#define USBA_DMA_NXT_DSC			0x0000
++#define USBA_DMA_ADDRESS			0x0004
++#define USBA_DMA_CONTROL			0x0008
++#define USBA_DMA_STATUS				0x000c
++
++/* Bitfields in CTRL */
++#define USBA_DEV_ADDR_OFFSET			0
++#define USBA_DEV_ADDR_SIZE			7
++#define USBA_FADDR_EN				(1 <<  7)
++#define USBA_EN_USBA				(1 <<  8)
++#define USBA_DETACH				(1 <<  9)
++#define USBA_REMOTE_WAKE_UP			(1 << 10)
++
++/* Bitfields in FNUM */
++#define USBA_MICRO_FRAME_NUM_OFFSET		0
++#define USBA_MICRO_FRAME_NUM_SIZE		3
++#define USBA_FRAME_NUMBER_OFFSET		3
++#define USBA_FRAME_NUMBER_SIZE			11
++#define USBA_FRAME_NUM_ERROR			(1 << 31)
++
++/* Bitfields in INT_ENB/INT_STA/INT_CLR */
++#define USBA_HIGH_SPEED				(1 <<  0)
++#define USBA_DET_SUSPEND			(1 <<  1)
++#define USBA_MICRO_SOF				(1 <<  2)
++#define USBA_SOF				(1 <<  3)
++#define USBA_END_OF_RESET			(1 <<  4)
++#define USBA_WAKE_UP				(1 <<  5)
++#define USBA_END_OF_RESUME			(1 <<  6)
++#define USBA_UPSTREAM_RESUME			(1 <<  7)
++#define USBA_EPT_INT_OFFSET			8
++#define USBA_EPT_INT_SIZE			16
++#define USBA_DMA_INT_OFFSET			24
++#define USBA_DMA_INT_SIZE			8
++
++/* Bitfields in EPT_RST */
++#define USBA_RST_OFFSET				0
++#define USBA_RST_SIZE				16
++
++/* Bitfields in USBA_TST */
++#define USBA_SPEED_CFG_OFFSET			0
++#define USBA_SPEED_CFG_SIZE			2
++#define USBA_TST_J_MODE				(1 <<  2)
++#define USBA_TST_K_MODE				(1 <<  3)
++#define USBA_TST_PKT_MODE			(1 <<  4)
++#define USBA_OPMODE2				(1 <<  5)
++
++/* Bitfields in EPT_CFG */
++#define USBA_EPT_SIZE_OFFSET			0
++#define USBA_EPT_SIZE_SIZE			3
++#define USBA_EPT_DIR_IN				(1 <<  3)
++#define USBA_EPT_TYPE_OFFSET			4
++#define USBA_EPT_TYPE_SIZE			2
++#define USBA_BK_NUMBER_OFFSET			6
++#define USBA_BK_NUMBER_SIZE			2
++#define USBA_NB_TRANS_OFFSET			8
++#define USBA_NB_TRANS_SIZE			2
++#define USBA_EPT_MAPPED				(1 << 31)
++
++/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
++#define USBA_EPT_ENABLE				(1 <<  0)
++#define USBA_AUTO_VALID				(1 <<  1)
++#define USBA_INTDIS_DMA				(1 <<  3)
++#define USBA_NYET_DIS				(1 <<  4)
++#define USBA_DATAX_RX				(1 <<  6)
++#define USBA_MDATA_RX				(1 <<  7)
++/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
++#define USBA_BUSY_BANK_IE			(1 << 18)
++
++/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
++#define USBA_FORCE_STALL			(1 <<  5)
++#define USBA_TOGGLE_CLR				(1 <<  6)
++#define USBA_TOGGLE_SEQ_OFFSET			6
++#define USBA_TOGGLE_SEQ_SIZE			2
++#define USBA_ERR_OVFLW				(1 <<  8)
++#define USBA_RX_BK_RDY				(1 <<  9)
++#define USBA_KILL_BANK				(1 <<  9)
++#define USBA_TX_COMPLETE			(1 << 10)
++#define USBA_TX_PK_RDY				(1 << 11)
++#define USBA_ISO_ERR_TRANS			(1 << 11)
++#define USBA_RX_SETUP				(1 << 12)
++#define USBA_ISO_ERR_FLOW			(1 << 12)
++#define USBA_STALL_SENT				(1 << 13)
++#define USBA_ISO_ERR_CRC			(1 << 13)
++#define USBA_ISO_ERR_NBTRANS			(1 << 13)
++#define USBA_NAK_IN				(1 << 14)
++#define USBA_ISO_ERR_FLUSH			(1 << 14)
++#define USBA_NAK_OUT				(1 << 15)
++#define USBA_CURRENT_BANK_OFFSET		16
++#define USBA_CURRENT_BANK_SIZE			2
++#define USBA_BUSY_BANKS_OFFSET			18
++#define USBA_BUSY_BANKS_SIZE			2
++#define USBA_BYTE_COUNT_OFFSET			20
++#define USBA_BYTE_COUNT_SIZE			11
++#define USBA_SHORT_PACKET			(1 << 31)
++
++/* Bitfields in DMA_CONTROL */
++#define USBA_DMA_CH_EN				(1 <<  0)
++#define USBA_DMA_LINK				(1 <<  1)
++#define USBA_DMA_END_TR_EN			(1 <<  2)
++#define USBA_DMA_END_BUF_EN			(1 <<  3)
++#define USBA_DMA_END_TR_IE			(1 <<  4)
++#define USBA_DMA_END_BUF_IE			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_IE			(1 <<  6)
++#define USBA_DMA_BURST_LOCK			(1 <<  7)
++#define USBA_DMA_BUF_LEN_OFFSET			16
++#define USBA_DMA_BUF_LEN_SIZE			16
++
++/* Bitfields in DMA_STATUS */
++#define USBA_DMA_CH_ACTIVE			(1 <<  1)
++#define USBA_DMA_END_TR_ST			(1 <<  4)
++#define USBA_DMA_END_BUF_ST			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_ST			(1 <<  6)
++
++/* Constants for SPEED_CFG */
++#define USBA_SPEED_CFG_NORMAL			0
++#define USBA_SPEED_CFG_FORCE_HIGH		2
++#define USBA_SPEED_CFG_FORCE_FULL		3
++
++/* Constants for EPT_SIZE */
++#define USBA_EPT_SIZE_8				0
++#define USBA_EPT_SIZE_16			1
++#define USBA_EPT_SIZE_32			2
++#define USBA_EPT_SIZE_64			3
++#define USBA_EPT_SIZE_128			4
++#define USBA_EPT_SIZE_256			5
++#define USBA_EPT_SIZE_512			6
++#define USBA_EPT_SIZE_1024			7
++
++/* Constants for EPT_TYPE */
++#define USBA_EPT_TYPE_CONTROL			0
++#define USBA_EPT_TYPE_ISO			1
++#define USBA_EPT_TYPE_BULK			2
++#define USBA_EPT_TYPE_INT			3
++
++/* Constants for BK_NUMBER */
++#define USBA_BK_NUMBER_ZERO			0
++#define USBA_BK_NUMBER_ONE			1
++#define USBA_BK_NUMBER_DOUBLE			2
++#define USBA_BK_NUMBER_TRIPLE			3
++
++/* Bit manipulation macros */
++#define USBA_BF(name, value)					\
++	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
++	 << USBA_##name##_OFFSET)
++#define USBA_BFEXT(name, value)					\
++	(((value) >> USBA_##name##_OFFSET)			\
++	 & ((1 << USBA_##name##_SIZE) - 1))
++#define USBA_BFINS(name, value, old)				\
++	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
++		    << USBA_##name##_OFFSET))			\
++	 | USBA_BF(name, value))
++
++/* Register access macros */
++#define usba_readl(udc, reg)					\
++	__raw_readl((udc)->regs + USBA_##reg)
++#define usba_writel(udc, reg, value)				\
++	__raw_writel((value), (udc)->regs + USBA_##reg)
++#define usba_ep_readl(ep, reg)					\
++	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
++#define usba_ep_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
++#define usba_dma_readl(ep, reg)					\
++	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
++#define usba_dma_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
++
++/* Calculate base address for a given endpoint or DMA controller */
++#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
++#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
++#define USBA_FIFO_BASE(x)	((x) << 16)
++
++/* Synth parameters */
++#define USBA_NR_ENDPOINTS	7
++
++#define EP0_FIFO_SIZE		64
++#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
++#define EP0_NR_BANKS		1
++
++/*
++ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to
++ * provide this information?
++ */
++#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++
++#define FIFO_IOMEM_ID	0
++#define CTRL_IOMEM_ID	1
++
++#ifdef DEBUG
++#define DBG_ERR		0x0001	/* report all error returns */
++#define DBG_HW		0x0002	/* debug hardware initialization */
++#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
++#define DBG_INT		0x0008	/* interrupts */
++#define DBG_BUS		0x0010	/* report changes in bus state */
++#define DBG_QUEUE	0x0020  /* debug request queue processing */
++#define DBG_FIFO	0x0040  /* debug FIFO contents */
++#define DBG_DMA		0x0080  /* debug DMA handling */
++#define DBG_REQ		0x0100	/* print out queued request length */
++#define DBG_ALL		0xffff
++#define DBG_NONE	0x0000
++
++#define DEBUG_LEVEL	(DBG_ERR)
++#define DBG(level, fmt, ...)					\
++	do {							\
++		if ((level) & DEBUG_LEVEL)			\
++			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
++	} while (0)
++#else
++#define DBG(level, fmt...)
++#endif
++
++enum usba_ctrl_state {
++	WAIT_FOR_SETUP,
++	DATA_STAGE_IN,
++	DATA_STAGE_OUT,
++	STATUS_STAGE_IN,
++	STATUS_STAGE_OUT,
++	STATUS_STAGE_ADDR,
++	STATUS_STAGE_TEST,
++};
++/*
++  EP_STATE_IDLE,
++  EP_STATE_SETUP,
++  EP_STATE_IN_DATA,
++  EP_STATE_OUT_DATA,
++  EP_STATE_SET_ADDR_STATUS,
++  EP_STATE_RX_STATUS,
++  EP_STATE_TX_STATUS,
++  EP_STATE_HALT,
++*/
++
++struct usba_dma_desc {
++	dma_addr_t next;
++	dma_addr_t addr;
++	u32 ctrl;
++};
++
++struct usba_ep {
++	int					state;
++	void __iomem				*ep_regs;
++	void __iomem				*dma_regs;
++	void __iomem				*fifo;
++	struct usb_ep				ep;
++	struct usba_udc				*udc;
++
++	struct list_head			queue;
++	const struct usb_endpoint_descriptor	*desc;
++
++	u16					fifo_size;
++	u8					nr_banks;
++	u8					index;
++	unsigned int				can_dma:1;
++	unsigned int				can_isoc:1;
++	unsigned int				is_isoc:1;
++	unsigned int				is_in:1;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	u32					last_dma_status;
++	struct dentry				*debugfs_dir;
++	struct dentry				*debugfs_queue;
++	struct dentry				*debugfs_dma_status;
++	struct dentry				*debugfs_state;
++#endif
++};
++
++struct usba_request {
++	struct usb_request			req;
++	struct list_head			queue;
++
++	u32					ctrl;
++
++	unsigned int				submitted:1;
++	unsigned int				last_transaction:1;
++	unsigned int				using_dma:1;
++	unsigned int				mapped:1;
++};
++
++struct usba_udc {
++	/* Protect hw registers from concurrent modifications */
++	spinlock_t lock;
++
++	void __iomem *regs;
++	void __iomem *fifo;
++
++	struct usb_gadget gadget;
++	struct usb_gadget_driver *driver;
++	struct platform_device *pdev;
++	int irq;
++	int vbus_pin;
++	struct clk *pclk;
++	struct clk *hclk;
++
++	int test_mode;
++	int vbus_prev;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	struct dentry *debugfs_root;
++	struct dentry *debugfs_regs;
++#endif
++};
++
++static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
++{
++	return container_of(ep, struct usba_ep, ep);
++}
++
++static inline struct usba_request *to_usba_req(struct usb_request *req)
++{
++	return container_of(req, struct usba_request, req);
++}
++
++static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
++{
++	return container_of(gadget, struct usba_udc, gadget);
++}
++
++#define ep_is_control(ep)	((ep)->index == 0)
++#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
++
++#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
+diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
+index 235b618..bb361ab 100644
+--- a/drivers/video/atmel_lcdfb.c
++++ b/drivers/video/atmel_lcdfb.c
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 2580f5f..b6f936a 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE
+ 	  To have support for your specific LCD panel you will have to
+ 	  select the proper drivers which depend on this option.
+ 
++config LCD_LTV350QV
++	tristate "Samsung LTV350QV LCD Panel"
++	depends on LCD_CLASS_DEVICE && SPI_MASTER
++	default n
++	help
++	  If you have a Samsung LTV350QV LCD panel, say y to include a
++	  power control driver for it.  The panel starts up in power
++	  off state, so you need this driver in order to see any
++	  output.
++
++	  The LTV350QV panel is present on all ATSTK1000 boards.
++
+ #
+ # Backlight
+ #
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index c6e2266..965a78b 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -1,6 +1,8 @@
+ # Backlight & LCD drivers
+ 
+ obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
++obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
++
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c
+new file mode 100644
+index 0000000..751dc53
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.c
+@@ -0,0 +1,339 @@
++/*
++ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/lcd.h>
++#include <linux/module.h>
++#include <linux/spi/spi.h>
++
++#include "ltv350qv.h"
++
++#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++
++struct ltv350qv {
++	struct spi_device	*spi;
++	u8			*buffer;
++	int			power;
++	struct lcd_device	*ld;
++};
++
++/*
++ * The power-on and power-off sequences are taken from the
++ * LTV350QV-F04 data sheet from Samsung. The register definitions are
++ * taken from the S6F2002 command list also from Samsung. Both
++ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
++ *
++ * There's still some voodoo going on here, but it's a lot better than
++ * in the first incarnation of the driver where all we had was the raw
++ * numbers from the initialization sequence.
++ */
++static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++{
++	struct spi_message msg;
++	struct spi_transfer index_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++	struct spi_transfer value_xfer = {
++		.len		= 3,
++	};
++
++	spi_message_init(&msg);
++
++	/* register index */
++	lcd->buffer[0] = LTV_OPC_INDEX;
++	lcd->buffer[1] = 0x00;
++	lcd->buffer[2] = reg & 0x7f;
++	index_xfer.tx_buf = lcd->buffer;
++	spi_message_add_tail(&index_xfer, &msg);
++
++	/* register value */
++	lcd->buffer[4] = LTV_OPC_DATA;
++	lcd->buffer[5] = val >> 8;
++	lcd->buffer[6] = val;
++	value_xfer.tx_buf = lcd->buffer + 4;
++	spi_message_add_tail(&value_xfer, &msg);
++
++	return spi_sync(lcd->spi, &msg);
++}
++
++/* The comments are taken straight from the data sheet */
++static int ltv350qv_power_on(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Power On Reset Display off State */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
++		goto err;
++	msleep(15);
++
++	/* Power Setting Function 1 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
++		goto err;
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
++		goto err_power1;
++
++	/* Power Setting Function 2 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			       | LTV_SUPPLY_CURRENT(5)))
++		goto err_power2;
++
++	msleep(55);
++
++	/* Instruction Setting */
++	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
++				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
++	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
++				  LTV_DS_SAME | LTV_CHS_480
++				  | LTV_DF_RGB | LTV_RGB_BGR);
++	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
++				  LTV_VSPL_ACTIVE_LOW
++				  | LTV_HSPL_ACTIVE_LOW
++				  | LTV_DPL_SAMPLE_RISING
++				  | LTV_EPL_ACTIVE_LOW
++				  | LTV_SS_RIGHT_TO_LEFT);
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
++	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
++	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
++	if (ret)
++		goto err_settings;
++
++	/* Wait more than 2 frames */
++	msleep(20);
++
++	/* Display On Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
++				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
++	if (ret)
++		goto err_disp_on;
++
++	/* Display should now be ON. Phew. */
++	return 0;
++
++err_disp_on:
++	/*
++	 * Try to recover. Error handling probably isn't very useful
++	 * at this point, just make a best effort to switch the panel
++	 * off.
++	 */
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			   | LTV_SUPPLY_CURRENT(5));
++	ltv350qv_write_reg(lcd, LTV_GATECTL2,
++			   LTV_NW_INV_1LINE | LTV_FWI(3));
++err_settings:
++err_power2:
++err_power1:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++	msleep(1);
++err:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++	return -EIO;
++}
++
++static int ltv350qv_power_off(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Display Off Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE
++				 | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++
++	/* Power down setting 1 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++
++	/* Wait at least 1 ms */
++	msleep(1);
++
++	/* Power down setting 2 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++
++	/*
++	 * No point in trying to recover here. If we can't switch the
++	 * panel off, what are we supposed to do other than inform the
++	 * user about the failure?
++	 */
++	if (ret)
++		return -EIO;
++
++	/* Display power should now be OFF */
++	return 0;
++}
++
++static int ltv350qv_power(struct ltv350qv *lcd, int power)
++{
++	int ret = 0;
++
++	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_on(lcd);
++	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_off(lcd);
++
++	if (!ret)
++		lcd->power = power;
++
++	return ret;
++}
++
++static int ltv350qv_set_power(struct lcd_device *ld, int power)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return ltv350qv_power(lcd, power);
++}
++
++static int ltv350qv_get_power(struct lcd_device *ld)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return lcd->power;
++}
++
++static struct lcd_ops ltv_ops = {
++	.get_power	= ltv350qv_get_power,
++	.set_power	= ltv350qv_set_power,
++};
++
++static int __devinit ltv350qv_probe(struct spi_device *spi)
++{
++	struct ltv350qv *lcd;
++	struct lcd_device *ld;
++	int ret;
++
++	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
++	if (!lcd)
++		return -ENOMEM;
++
++	lcd->spi = spi;
++	lcd->power = FB_BLANK_POWERDOWN;
++	lcd->buffer = kzalloc(8, GFP_KERNEL);
++
++	ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops);
++	if (IS_ERR(ld)) {
++		ret = PTR_ERR(ld);
++		goto out_free_lcd;
++	}
++	lcd->ld = ld;
++
++	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	if (ret)
++		goto out_unregister;
++
++	dev_set_drvdata(&spi->dev, lcd);
++
++	return 0;
++
++out_unregister:
++	lcd_device_unregister(ld);
++out_free_lcd:
++	kfree(lcd);
++	return ret;
++}
++
++static int __devexit ltv350qv_remove(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	lcd_device_unregister(lcd->ld);
++	kfree(lcd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int ltv350qv_suspend(struct spi_device *spi,
++			    pm_message_t state, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == SUSPEND_POWER_DOWN)
++		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++
++	return 0;
++}
++
++static int ltv350qv_resume(struct spi_device *spi, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == RESUME_POWER_ON)
++		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++
++	return 0;
++}
++#else
++#define ltv350qv_suspend	NULL
++#define ltv350qv_resume		NULL
++#endif
++
++/* Power down all displays on reboot, poweroff or halt */
++static void ltv350qv_shutdown(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++}
++
++static struct spi_driver ltv350qv_driver = {
++	.driver = {
++		.name		= "ltv350qv",
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++
++	.probe		= ltv350qv_probe,
++	.remove		= __devexit_p(ltv350qv_remove),
++	.shutdown	= ltv350qv_shutdown,
++	.suspend	= ltv350qv_suspend,
++	.resume		= ltv350qv_resume,
++};
++
++static int __init ltv350qv_init(void)
++{
++	return spi_register_driver(&ltv350qv_driver);
++}
++
++static void __exit ltv350qv_exit(void)
++{
++	spi_unregister_driver(&ltv350qv_driver);
++}
++module_init(ltv350qv_init);
++module_exit(ltv350qv_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h
+new file mode 100644
+index 0000000..189112e
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.h
+@@ -0,0 +1,95 @@
++/*
++ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LTV350QV_H
++#define __LTV350QV_H
++
++#define LTV_OPC_INDEX	0x74
++#define LTV_OPC_DATA	0x76
++
++#define LTV_ID		0x00		/* ID Read */
++#define LTV_IFCTL	0x01		/* Display Interface Control */
++#define LTV_DATACTL	0x02		/* Display Data Control */
++#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
++#define LTV_GATECTL1	0x04		/* Gate Control 1 */
++#define LTV_GATECTL2	0x05		/* Gate Control 2 */
++#define LTV_VBP		0x06		/* Vertical Back Porch */
++#define LTV_HBP		0x07		/* Horizontal Back Porch */
++#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
++#define LTV_PWRCTL1	0x09		/* Power Control 1 */
++#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
++#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
++
++/* Bit definitions for LTV_IFCTL */
++#define LTV_IM			(1 << 15)
++#define LTV_NMD			(1 << 14)
++#define LTV_SSMD		(1 << 13)
++#define LTV_REV			(1 <<  7)
++#define LTV_NL(x)		(((x) & 0x001f) << 0)
++
++/* Bit definitions for LTV_DATACTL */
++#define LTV_DS_SAME		(0 << 12)
++#define LTV_DS_D_TO_S		(1 << 12)
++#define LTV_DS_S_TO_D		(2 << 12)
++#define LTV_CHS_384		(0 <<  9)
++#define LTV_CHS_480		(1 <<  9)
++#define LTV_CHS_492		(2 <<  9)
++#define LTV_DF_RGB		(0 <<  6)
++#define LTV_DF_RGBX		(1 <<  6)
++#define LTV_DF_XRGB		(2 <<  6)
++#define LTV_RGB_RGB		(0 <<  2)
++#define LTV_RGB_BGR		(1 <<  2)
++#define LTV_RGB_GRB		(2 <<  2)
++#define LTV_RGB_RBG		(3 <<  2)
++
++/* Bit definitions for LTV_ENTRY_MODE */
++#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
++#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
++#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
++#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
++#define LTV_DPL_SAMPLE_RISING	(0 << 13)
++#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
++#define LTV_EPL_ACTIVE_LOW	(0 << 12)
++#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
++#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
++#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
++#define LTV_STB			(1 <<  1)
++
++/* Bit definitions for LTV_GATECTL1 */
++#define LTV_CLW(x)		(((x) & 0x0007) << 12)
++#define LTV_GAON		(1 <<  5)
++#define LTV_SDR			(1 <<  3)
++
++/* Bit definitions for LTV_GATECTL2 */
++#define LTV_NW_INV_FRAME	(0 << 14)
++#define LTV_NW_INV_1LINE	(1 << 14)
++#define LTV_NW_INV_2LINE	(2 << 14)
++#define LTV_DSC			(1 << 12)
++#define LTV_GIF			(1 <<  8)
++#define LTV_FHN			(1 <<  7)
++#define LTV_FTI(x)		(((x) & 0x0003) << 4)
++#define LTV_FWI(x)		(((x) & 0x0003) << 0)
++
++/* Bit definitions for LTV_SOTCTL */
++#define LTV_SDT(x)		(((x) & 0x0007) << 10)
++#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
++
++/* Bit definitions for LTV_PWRCTL1 */
++#define LTV_VCOM_DISABLE	(1 << 14)
++#define LTV_VCOMOUT_ENABLE	(1 << 11)
++#define LTV_POWER_ON		(1 <<  9)
++#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
++#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
++
++/* Bit definitions for LTV_PWRCTL2 */
++#define LTV_VCOML_ENABLE	(1 << 13)
++#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
++#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
++
++#endif /* __LTV350QV_H */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h
+deleted file mode 100644
+index 3914d7b..0000000
+--- a/include/asm-avr32/arch-at32ap/at32ap7000.h
++++ /dev/null
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h
+new file mode 100644
+index 0000000..99684d6
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap/at32ap700x.h
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 0215965..7aa1c29 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -6,6 +6,8 @@
+ 
+ #include <linux/types.h>
+ 
++#define GPIO_PIN_NONE	(-1)
++
+ /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
+ void at32_add_system_devices(void);
+ 
+@@ -31,11 +33,26 @@ struct spi_board_info;
+ struct platform_device *
+ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
+ struct atmel_lcdfb_info;
+ struct platform_device *
+ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ 		     unsigned long fbmem_start, unsigned long fbmem_len);
+ 
++struct usba_platform_data {
++	int vbus_pin;
++};
++struct platform_device *
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
++
++struct ide_platform_data {
++	u8      cs;
++};
++struct platform_device *
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -50,4 +67,26 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++struct platform_device *at32_add_device_ac97c(unsigned int id);
++struct platform_device *at32_add_device_abdac(unsigned int id);
++
++struct cf_platform_data {
++	int	detect_pin;
++	int	reset_pin;
++	int	vcc_pin;
++	int	ready_pin;
++	u8	cs;
++};
++struct platform_device *
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		struct cf_platform_data *data);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
+index a762f42..0dc2026 100644
+--- a/include/asm-avr32/arch-at32ap/cpu.h
++++ b/include/asm-avr32/arch-at32ap/cpu.h
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h
+index ee59e40..4ec6abc 100644
+--- a/include/asm-avr32/arch-at32ap/io.h
++++ b/include/asm-avr32/arch-at32ap/io.h
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
+index 9930871..135e034 100644
+--- a/include/asm-avr32/arch-at32ap/portmux.h
++++ b/include/asm-avr32/arch-at32ap/portmux.h
+@@ -19,10 +19,23 @@
+ #define AT32_GPIOF_OUTPUT	0x00000002	/* (OUT) Enable output driver */
+ #define AT32_GPIOF_HIGH		0x00000004	/* (OUT) Set output high */
+ #define AT32_GPIOF_DEGLITCH	0x00000008	/* (IN) Filter glitches */
++#define AT32_GPIOF_MULTIDRV	0x00000010	/* Enable multidriver option */
+ 
+ void at32_select_periph(unsigned int pin, unsigned int periph,
+ 			unsigned long flags);
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
+index 07152b7..c98eea4 100644
+--- a/include/asm-avr32/arch-at32ap/smc.h
++++ b/include/asm-avr32/arch-at32ap/smc.h
+@@ -15,22 +15,50 @@
+ /*
+  * All timing parameters are in nanoseconds.
+  */
++struct smc_timing {
++	/* Delay from address valid to assertion of given strobe */
++	int ncs_read_setup;
++	int nrd_setup;
++	int ncs_write_setup;
++	int nwe_setup;
++
++	/* Pulse length of given strobe */
++	int ncs_read_pulse;
++	int nrd_pulse;
++	int ncs_write_pulse;
++	int nwe_pulse;
++
++	/* Total cycle length of given operation */
++	int read_cycle;
++	int write_cycle;
++
++	/* Minimal recovery times, will extend cycle if needed */
++	int ncs_read_recover;
++	int nrd_recover;
++	int ncs_write_recover;
++	int nwe_recover;
++};
++
++/*
++ * All timing parameters are in clock cycles.
++ */
+ struct smc_config {
++
+ 	/* Delay from address valid to assertion of given strobe */
+-	u16		ncs_read_setup;
+-	u16		nrd_setup;
+-	u16		ncs_write_setup;
+-	u16		nwe_setup;
++	u8		ncs_read_setup;
++	u8		nrd_setup;
++	u8		ncs_write_setup;
++	u8		nwe_setup;
+ 
+ 	/* Pulse length of given strobe */
+-	u16		ncs_read_pulse;
+-	u16		nrd_pulse;
+-	u16		ncs_write_pulse;
+-	u16		nwe_pulse;
++	u8		ncs_read_pulse;
++	u8		nrd_pulse;
++	u8		ncs_write_pulse;
++	u8		nwe_pulse;
+ 
+ 	/* Total cycle length of given operation */
+-	u16		read_cycle;
+-	u16		write_cycle;
++	u8		read_cycle;
++	u8		write_cycle;
+ 
+ 	/* Bus width in bytes */
+ 	u8		bus_width;
+@@ -76,6 +104,9 @@ struct smc_config {
+ 	unsigned int	tdf_mode:1;
+ };
+ 
++extern void smc_set_timing(struct smc_config *config,
++			   const struct smc_timing *timing);
++
+ extern int smc_set_configuration(int cs, const struct smc_config *config);
+ extern struct smc_config *smc_get_configuration(int cs);
+ 
+diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h
+new file mode 100644
+index 0000000..56a4965
+--- /dev/null
++++ b/include/asm-avr32/dma-controller.h
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
+index 21bb60b..81e3426 100644
+--- a/include/asm-avr32/dma-mapping.h
++++ b/include/asm-avr32/dma-mapping.h
+@@ -264,7 +264,11 @@ static inline void
+ dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ 			size_t size, enum dma_data_direction direction)
+ {
+-	dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+@@ -309,12 +313,11 @@ static inline void
+ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ 		    int nents, enum dma_data_direction direction)
+ {
+-	int i;
+-
+-	for (i = 0; i < nents; i++) {
+-		dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
+-			       sg[i].length, direction);
+-	}
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h
+index a8236ba..dc2d527 100644
+--- a/include/asm-avr32/system.h
++++ b/include/asm-avr32/system.h
+@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
+ 
+ extern void __xchg_called_with_bad_pointer(void);
+ 
+-#ifdef __CHECKER__
+-extern unsigned long __builtin_xchg(void *ptr, unsigned long x);
+-#endif
++static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
++{
++	u32 ret;
+ 
+-#define xchg_u32(val, m) __builtin_xchg((void *)m, val)
++	asm volatile("xchg %[ret], %[m], %[val]"
++			: [ret] "=&r"(ret), "=m"(*m)
++			: "m"(*m), [m] "r"(m), [val] "r"(val)
++			: "memory");
++	return ret;
++}
+ 
+ static inline unsigned long __xchg(unsigned long x,
+ 				       volatile void *ptr,
+diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
+index 3b4e35b..de09009 100644
+--- a/include/asm-avr32/unistd.h
++++ b/include/asm-avr32/unistd.h
+@@ -303,6 +303,19 @@
+ #ifdef __KERNEL__
+ #define NR_syscalls		282
+ 
++/* Old stuff */
++#define __IGNORE_uselib
++#define __IGNORE_mmap
++
++/* NUMA stuff */
++#define __IGNORE_mbind
++#define __IGNORE_get_mempolicy
++#define __IGNORE_set_mempolicy
++#define __IGNORE_migrate_pages
++#define __IGNORE_move_pages
++
++/* SMP stuff */
++#define __IGNORE_getcpu
+ 
+ #define __ARCH_WANT_IPC_PARSE_VERSION
+ #define __ARCH_WANT_STAT64
+diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
+new file mode 100644
+index 0000000..0602339
+--- /dev/null
++++ b/include/linux/atmel-ssc.h
+@@ -0,0 +1,312 @@
++#ifndef __INCLUDE_ATMEL_SSC_H
++#define __INCLUDE_ATMEL_SSC_H
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++
++struct ssc_device {
++	struct list_head	list;
++	void __iomem		*regs;
++	struct platform_device	*pdev;
++	struct clk		*clk;
++	int			user;
++	int			irq;
++};
++
++struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
++void ssc_free(struct ssc_device *ssc);
++
++/* SSC register offsets */
++
++/* SSC Control Register */
++#define SSC_CR				0x00000000
++#define SSC_CR_RXDIS_SIZE			 1
++#define SSC_CR_RXDIS_OFFSET			 1
++#define SSC_CR_RXEN_SIZE			 1
++#define SSC_CR_RXEN_OFFSET			 0
++#define SSC_CR_SWRST_SIZE			 1
++#define SSC_CR_SWRST_OFFSET			15
++#define SSC_CR_TXDIS_SIZE			 1
++#define SSC_CR_TXDIS_OFFSET			 9
++#define SSC_CR_TXEN_SIZE			 1
++#define SSC_CR_TXEN_OFFSET			 8
++
++/* SSC Clock Mode Register */
++#define SSC_CMR				0x00000004
++#define SSC_CMR_DIV_SIZE			12
++#define SSC_CMR_DIV_OFFSET			 0
++
++/* SSC Receive Clock Mode Register */
++#define SSC_RCMR			0x00000010
++#define SSC_RCMR_CKG_SIZE			 2
++#define SSC_RCMR_CKG_OFFSET			 6
++#define SSC_RCMR_CKI_SIZE			 1
++#define SSC_RCMR_CKI_OFFSET			 5
++#define SSC_RCMR_CKO_SIZE			 3
++#define SSC_RCMR_CKO_OFFSET			 2
++#define SSC_RCMR_CKS_SIZE			 2
++#define SSC_RCMR_CKS_OFFSET			 0
++#define SSC_RCMR_PERIOD_SIZE			 8
++#define SSC_RCMR_PERIOD_OFFSET			24
++#define SSC_RCMR_START_SIZE			 4
++#define SSC_RCMR_START_OFFSET			 8
++#define SSC_RCMR_STOP_SIZE			 1
++#define SSC_RCMR_STOP_OFFSET			12
++#define SSC_RCMR_STTDLY_SIZE			 8
++#define SSC_RCMR_STTDLY_OFFSET			16
++
++/* SSC Receive Frame Mode Register */
++#define SSC_RFMR			0x00000014
++#define SSC_RFMR_DATLEN_SIZE			 5
++#define SSC_RFMR_DATLEN_OFFSET			 0
++#define SSC_RFMR_DATNB_SIZE			 4
++#define SSC_RFMR_DATNB_OFFSET			 8
++#define SSC_RFMR_FSEDGE_SIZE			 1
++#define SSC_RFMR_FSEDGE_OFFSET			24
++#define SSC_RFMR_FSLEN_SIZE			 4
++#define SSC_RFMR_FSLEN_OFFSET			16
++#define SSC_RFMR_FSOS_SIZE			 4
++#define SSC_RFMR_FSOS_OFFSET			20
++#define SSC_RFMR_LOOP_SIZE			 1
++#define SSC_RFMR_LOOP_OFFSET			 5
++#define SSC_RFMR_MSBF_SIZE			 1
++#define SSC_RFMR_MSBF_OFFSET			 7
++
++/* SSC Transmit Clock Mode Register */
++#define SSC_TCMR			0x00000018
++#define SSC_TCMR_CKG_SIZE			 2
++#define SSC_TCMR_CKG_OFFSET			 6
++#define SSC_TCMR_CKI_SIZE			 1
++#define SSC_TCMR_CKI_OFFSET			 5
++#define SSC_TCMR_CKO_SIZE			 3
++#define SSC_TCMR_CKO_OFFSET			 2
++#define SSC_TCMR_CKS_SIZE			 2
++#define SSC_TCMR_CKS_OFFSET			 0
++#define SSC_TCMR_PERIOD_SIZE			 8
++#define SSC_TCMR_PERIOD_OFFSET			24
++#define SSC_TCMR_START_SIZE			 4
++#define SSC_TCMR_START_OFFSET			 8
++#define SSC_TCMR_STTDLY_SIZE			 8
++#define SSC_TCMR_STTDLY_OFFSET			16
++
++/* SSC Transmit Frame Mode Register */
++#define SSC_TFMR			0x0000001c
++#define SSC_TFMR_DATDEF_SIZE			 1
++#define SSC_TFMR_DATDEF_OFFSET			 5
++#define SSC_TFMR_DATLEN_SIZE			 5
++#define SSC_TFMR_DATLEN_OFFSET			 0
++#define SSC_TFMR_DATNB_SIZE			 4
++#define SSC_TFMR_DATNB_OFFSET			 8
++#define SSC_TFMR_FSDEN_SIZE			 1
++#define SSC_TFMR_FSDEN_OFFSET			23
++#define SSC_TFMR_FSEDGE_SIZE			 1
++#define SSC_TFMR_FSEDGE_OFFSET			24
++#define SSC_TFMR_FSLEN_SIZE			 4
++#define SSC_TFMR_FSLEN_OFFSET			16
++#define SSC_TFMR_FSOS_SIZE			 3
++#define SSC_TFMR_FSOS_OFFSET			20
++#define SSC_TFMR_MSBF_SIZE			 1
++#define SSC_TFMR_MSBF_OFFSET			 7
++
++/* SSC Receive Hold Register */
++#define SSC_RHR				0x00000020
++#define SSC_RHR_RDAT_SIZE			32
++#define SSC_RHR_RDAT_OFFSET			 0
++
++/* SSC Transmit Hold Register */
++#define SSC_THR				0x00000024
++#define SSC_THR_TDAT_SIZE			32
++#define SSC_THR_TDAT_OFFSET			 0
++
++/* SSC Receive Sync. Holding Register */
++#define SSC_RSHR			0x00000030
++#define SSC_RSHR_RSDAT_SIZE			16
++#define SSC_RSHR_RSDAT_OFFSET			 0
++
++/* SSC Transmit Sync. Holding Register */
++#define SSC_TSHR			0x00000034
++#define SSC_TSHR_TSDAT_SIZE			16
++#define SSC_TSHR_RSDAT_OFFSET			 0
++
++/* SSC Receive Compare 0 Register */
++#define SSC_RC0R			0x00000038
++#define SSC_RC0R_CP0_SIZE			16
++#define SSC_RC0R_CP0_OFFSET			 0
++
++/* SSC Receive Compare 1 Register */
++#define SSC_RC1R			0x0000003c
++#define SSC_RC1R_CP1_SIZE			16
++#define SSC_RC1R_CP1_OFFSET			 0
++
++/* SSC Status Register */
++#define SSC_SR				0x00000040
++#define SSC_SR_CP0_SIZE				 1
++#define SSC_SR_CP0_OFFSET			 8
++#define SSC_SR_CP1_SIZE				 1
++#define SSC_SR_CP1_OFFSET			 9
++#define SSC_SR_ENDRX_SIZE			 1
++#define SSC_SR_ENDRX_OFFSET			 6
++#define SSC_SR_ENDTX_SIZE			 1
++#define SSC_SR_ENDTX_OFFSET			 2
++#define SSC_SR_OVRUN_SIZE			 1
++#define SSC_SR_OVRUN_OFFSET			 5
++#define SSC_SR_RXBUFF_SIZE			 1
++#define SSC_SR_RXBUFF_OFFSET			 7
++#define SSC_SR_RXEN_SIZE			 1
++#define SSC_SR_RXEN_OFFSET			17
++#define SSC_SR_RXRDY_SIZE			 1
++#define SSC_SR_RXRDY_OFFSET			 4
++#define SSC_SR_RXSYN_SIZE			 1
++#define SSC_SR_RXSYN_OFFSET			11
++#define SSC_SR_TXBUFE_SIZE			 1
++#define SSC_SR_TXBUFE_OFFSET			 3
++#define SSC_SR_TXEMPTY_SIZE			 1
++#define SSC_SR_TXEMPTY_OFFSET			 1
++#define SSC_SR_TXEN_SIZE			 1
++#define SSC_SR_TXEN_OFFSET			16
++#define SSC_SR_TXRDY_SIZE			 1
++#define SSC_SR_TXRDY_OFFSET			 0
++#define SSC_SR_TXSYN_SIZE			 1
++#define SSC_SR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Enable Register */
++#define SSC_IER				0x00000044
++#define SSC_IER_CP0_SIZE			 1
++#define SSC_IER_CP0_OFFSET			 8
++#define SSC_IER_CP1_SIZE			 1
++#define SSC_IER_CP1_OFFSET			 9
++#define SSC_IER_ENDRX_SIZE			 1
++#define SSC_IER_ENDRX_OFFSET			 6
++#define SSC_IER_ENDTX_SIZE			 1
++#define SSC_IER_ENDTX_OFFSET			 2
++#define SSC_IER_OVRUN_SIZE			 1
++#define SSC_IER_OVRUN_OFFSET			 5
++#define SSC_IER_RXBUFF_SIZE			 1
++#define SSC_IER_RXBUFF_OFFSET			 7
++#define SSC_IER_RXRDY_SIZE			 1
++#define SSC_IER_RXRDY_OFFSET			 4
++#define SSC_IER_RXSYN_SIZE			 1
++#define SSC_IER_RXSYN_OFFSET			11
++#define SSC_IER_TXBUFE_SIZE			 1
++#define SSC_IER_TXBUFE_OFFSET			 3
++#define SSC_IER_TXEMPTY_SIZE			 1
++#define SSC_IER_TXEMPTY_OFFSET			 1
++#define SSC_IER_TXRDY_SIZE			 1
++#define SSC_IER_TXRDY_OFFSET			 0
++#define SSC_IER_TXSYN_SIZE			 1
++#define SSC_IER_TXSYN_OFFSET			10
++
++/* SSC Interrupt Disable Register */
++#define SSC_IDR				0x00000048
++#define SSC_IDR_CP0_SIZE			 1
++#define SSC_IDR_CP0_OFFSET			 8
++#define SSC_IDR_CP1_SIZE			 1
++#define SSC_IDR_CP1_OFFSET			 9
++#define SSC_IDR_ENDRX_SIZE			 1
++#define SSC_IDR_ENDRX_OFFSET			 6
++#define SSC_IDR_ENDTX_SIZE			 1
++#define SSC_IDR_ENDTX_OFFSET			 2
++#define SSC_IDR_OVRUN_SIZE			 1
++#define SSC_IDR_OVRUN_OFFSET			 5
++#define SSC_IDR_RXBUFF_SIZE			 1
++#define SSC_IDR_RXBUFF_OFFSET			 7
++#define SSC_IDR_RXRDY_SIZE			 1
++#define SSC_IDR_RXRDY_OFFSET			 4
++#define SSC_IDR_RXSYN_SIZE			 1
++#define SSC_IDR_RXSYN_OFFSET			11
++#define SSC_IDR_TXBUFE_SIZE			 1
++#define SSC_IDR_TXBUFE_OFFSET			 3
++#define SSC_IDR_TXEMPTY_SIZE			 1
++#define SSC_IDR_TXEMPTY_OFFSET			 1
++#define SSC_IDR_TXRDY_SIZE			 1
++#define SSC_IDR_TXRDY_OFFSET			 0
++#define SSC_IDR_TXSYN_SIZE			 1
++#define SSC_IDR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Mask Register */
++#define SSC_IMR				0x0000004c
++#define SSC_IMR_CP0_SIZE			 1
++#define SSC_IMR_CP0_OFFSET			 8
++#define SSC_IMR_CP1_SIZE			 1
++#define SSC_IMR_CP1_OFFSET			 9
++#define SSC_IMR_ENDRX_SIZE			 1
++#define SSC_IMR_ENDRX_OFFSET			 6
++#define SSC_IMR_ENDTX_SIZE			 1
++#define SSC_IMR_ENDTX_OFFSET			 2
++#define SSC_IMR_OVRUN_SIZE			 1
++#define SSC_IMR_OVRUN_OFFSET			 5
++#define SSC_IMR_RXBUFF_SIZE			 1
++#define SSC_IMR_RXBUFF_OFFSET			 7
++#define SSC_IMR_RXRDY_SIZE			 1
++#define SSC_IMR_RXRDY_OFFSET			 4
++#define SSC_IMR_RXSYN_SIZE			 1
++#define SSC_IMR_RXSYN_OFFSET			11
++#define SSC_IMR_TXBUFE_SIZE			 1
++#define SSC_IMR_TXBUFE_OFFSET			 3
++#define SSC_IMR_TXEMPTY_SIZE			 1
++#define SSC_IMR_TXEMPTY_OFFSET			 1
++#define SSC_IMR_TXRDY_SIZE			 1
++#define SSC_IMR_TXRDY_OFFSET			 0
++#define SSC_IMR_TXSYN_SIZE			 1
++#define SSC_IMR_TXSYN_OFFSET			10
++
++/* SSC PDC Receive Pointer Register */
++#define SSC_PDC_RPR			0x00000100
++
++/* SSC PDC Receive Counter Register */
++#define SSC_PDC_RCR			0x00000104
++
++/* SSC PDC Transmit Pointer Register */
++#define SSC_PDC_TPR			0x00000108
++
++/* SSC PDC Receive Next Pointer Register */
++#define SSC_PDC_RNPR			0x00000110
++
++/* SSC PDC Receive Next Counter Register */
++#define SSC_PDC_RNCR			0x00000114
++
++/* SSC PDC Transmit Counter Register */
++#define SSC_PDC_TCR			0x0000010c
++
++/* SSC PDC Transmit Next Pointer Register */
++#define SSC_PDC_TNPR			0x00000118
++
++/* SSC PDC Transmit Next Counter Register */
++#define SSC_PDC_TNCR			0x0000011c
++
++/* SSC PDC Transfer Control Register */
++#define SSC_PDC_PTCR			0x00000120
++#define SSC_PDC_PTCR_RXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_RXTDIS_OFFSET		 1
++#define SSC_PDC_PTCR_RXTEN_SIZE			 1
++#define SSC_PDC_PTCR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTCR_TXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_TXTDIS_OFFSET		 9
++#define SSC_PDC_PTCR_TXTEN_SIZE			 1
++#define SSC_PDC_PTCR_TXTEN_OFFSET		 8
++
++/* SSC PDC Transfer Status Register */
++#define SSC_PDC_PTSR			0x00000124
++#define SSC_PDC_PTSR_RXTEN_SIZE			 1
++#define SSC_PDC_PTSR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTSR_TXTEN_SIZE			 1
++#define SSC_PDC_PTSR_TXTEN_OFFSET		 8
++
++/* Bit manipulation macros */
++#define SSC_BIT(name)					\
++	(1 << SSC_##name##_OFFSET)
++#define SSC_BF(name, value)				\
++	(((value) & ((1 << SSC_##name##_SIZE) - 1))	\
++	 << SSC_##name##_OFFSET)
++#define SSC_BFEXT(name, value)				\
++	(((value) >> SSC_##name##_OFFSET)		\
++	 & ((1 << SSC_##name##_SIZE) - 1))
++#define SSC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << SSC_##name##_SIZE) - 1)	\
++	<< SSC_##name##_OFFSET)) | SSC_BF(name, value))
++
++/* Register access macros */
++#define ssc_readl(base, reg)		__raw_readl(base + SSC_##reg)
++#define ssc_writel(base, reg, value)	__raw_writel((value), base + SSC_##reg)
++
++#endif /* __INCLUDE_ATMEL_SSC_H */
+diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h
+new file mode 100644
+index 0000000..0f20a70
+--- /dev/null
++++ b/include/linux/spi/at73c213.h
+@@ -0,0 +1,25 @@
++/*
++ * Board-specific data used to set up AT73c213 audio DAC driver.
++ */
++
++#ifndef __LINUX_SPI_AT73C213_H
++#define __LINUX_SPI_AT73C213_H
++
++/**
++ * at73c213_board_info - how the external DAC is wired to the device.
++ *
++ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio.
++ * @dac_clk: the external clock used to provide master clock to the DAC.
++ * @shortname: a short discription for the DAC, seen by userspace tools.
++ *
++ * This struct contains the configuration of the hardware connection to the
++ * external DAC. The DAC needs a master clock and a I2S audio stream. It also
++ * provides a name which is used to identify it in userspace tools.
++ */
++struct at73c213_board_info {
++	int		ssc_id;
++	struct clk	*dac_clk;
++	char		shortname[32];
++};
++
++#endif /* __LINUX_SPI_AT73C213_H */
+diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h
+index c1d1629..5f38803 100644
+--- a/include/pcmcia/cs_types.h
++++ b/include/pcmcia/cs_types.h
+@@ -21,7 +21,7 @@
+ #include <sys/types.h>
+ #endif
+ 
+-#if defined(__arm__) || defined(__mips__)
++#if defined(__arm__) || defined(__mips__) || defined(__avr32__)
+ /* This (ioaddr_t) is exposed to userspace & hence cannot be changed. */
+ typedef u_int   ioaddr_t;
+ #else
+diff --git a/init/do_mounts.c b/init/do_mounts.c
+index 4efa1e5..0e88ed1 100644
+--- a/init/do_mounts.c
++++ b/init/do_mounts.c
+@@ -219,8 +219,14 @@ __setup("root=", root_dev_setup);
+ 
+ static int __init rootwait_setup(char *str)
+ {
+-	if (*str)
++	if (*str && *str != '=')
+ 		return 0;
++
++	if (*str)
++		printk(KERN_WARNING
++			"WARNING: \"rootwait=1\" is deprecated, "
++			"use \"rootwait\" instead.\n");
++
+ 	root_wait = 1;
+ 	return 1;
+ }
+diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
+index f7844f6..6631586 100755
+--- a/scripts/checkstack.pl
++++ b/scripts/checkstack.pl
+@@ -12,6 +12,7 @@
+ #	sh64 port by Paul Mundt
+ #	Random bits by Matt Mackall <mpm@selenic.com>
+ #	M68k port by Geert Uytterhoeven and Andreas Schwab
++#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
+ #
+ #	Usage:
+ #	objdump -d vmlinux | stackcheck.pl [arch]
+@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs);
+ 	if ($arch eq 'arm') {
+ 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
+ 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
++	} elsif ($arch eq 'avr32') {
++		#8000008a:       20 1d           sub sp,4
++		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
++		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
+ 	} elsif ($arch =~ /^i[3456]86$/) {
+ 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
+ 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
+diff --git a/sound/Kconfig b/sound/Kconfig
+index e48b9b3..29a9979 100644
+--- a/sound/Kconfig
++++ b/sound/Kconfig
+@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
++if SPI
++source "sound/spi/Kconfig"
++endif
++
+ source "sound/mips/Kconfig"
+ 
+ source "sound/sh/Kconfig"
+diff --git a/sound/Makefile b/sound/Makefile
+index 3ead922..e655df7 100644
+--- a/sound/Makefile
++++ b/sound/Makefile
+@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o
+ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/
++obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig
+new file mode 100644
+index 0000000..17d1d91
+--- /dev/null
++++ b/sound/avr32/Kconfig
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile
+new file mode 100644
+index 0000000..5d87d0e
+--- /dev/null
++++ b/sound/avr32/Makefile
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+new file mode 100644
+index 0000000..0ec0b1c
+--- /dev/null
++++ b/sound/avr32/ac97c.c
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h
+new file mode 100644
+index 0000000..96246e7
+--- /dev/null
++++ b/sound/avr32/ac97c.h
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
+index af37cd0..e3cc557 100644
+--- a/sound/oss/Kconfig
++++ b/sound/oss/Kconfig
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff --git a/sound/oss/Makefile b/sound/oss/Makefile
+index 1200670..fafc246 100644
+--- a/sound/oss/Makefile
++++ b/sound/oss/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o ad1848.o
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
+diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c
+new file mode 100644
+index 0000000..cb997d7
+--- /dev/null
++++ b/sound/oss/at32_abdac.c
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h
+new file mode 100644
+index 0000000..3c88e25
+--- /dev/null
++++ b/sound/oss/at32_abdac.h
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig
+new file mode 100644
+index 0000000..0d08c29
+--- /dev/null
++++ b/sound/spi/Kconfig
+@@ -0,0 +1,31 @@
++#SPI drivers
++
++menu "SPI devices"
++	depends on SND != n
++
++config SND_AT73C213
++	tristate "Atmel AT73C213 DAC driver"
++	depends on ATMEL_SSC
++	select SND_PCM
++	help
++	  Say Y here if you want to use the Atmel AT73C213 external DAC. This
++	  DAC can be found on Atmel development boards.
++
++	  This driver requires the Atmel SSC driver for sound sink, a
++	  peripheral found on most AT91 and AVR32 microprocessors.
++
++	  To compile this driver as a module, choose M here: the module will be
++	  called snd-at73c213.
++
++config SND_AT73C213_TARGET_BITRATE
++	int "Target bitrate for AT73C213"
++	depends on SND_AT73C213
++	default "48000"
++	range 8000 50000
++	help
++	  Sets the target bitrate for the bitrate calculator in the driver.
++	  Limited by hardware to be between 8000 Hz and 50000 Hz.
++
++	  Set to 48000 Hz by default.
++
++endmenu
+diff --git a/sound/spi/Makefile b/sound/spi/Makefile
+new file mode 100644
+index 0000000..026fb73
+--- /dev/null
++++ b/sound/spi/Makefile
+@@ -0,0 +1,5 @@
++# Makefile for SPI drivers
++
++snd-at73c213-objs		:= at73c213.o
++
++obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
+diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c
+new file mode 100644
+index 0000000..f514f47
+--- /dev/null
++++ b/sound/spi/at73c213.c
+@@ -0,0 +1,1121 @@
++/*
++ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
++ *
++ * Copyright (C) 2006-2007 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++
++/*#define DEBUG*/
++
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/initval.h>
++#include <sound/control.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++
++#include <linux/atmel-ssc.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
++
++#include "at73c213.h"
++
++#define BITRATE_MIN	 8000 /* Hardware limit? */
++#define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
++#define BITRATE_MAX	50000 /* Hardware limit. */
++
++/* Initial (hardware reset) AT73C213 register values. */
++static u8 snd_at73c213_original_image[18] =
++{
++	0x00,	/* 00 - CTRL    */
++	0x05,	/* 01 - LLIG    */
++	0x05,	/* 02 - RLIG    */
++	0x08,	/* 03 - LPMG    */
++	0x08,	/* 04 - RPMG    */
++	0x00,	/* 05 - LLOG    */
++	0x00,	/* 06 - RLOG    */
++	0x22,	/* 07 - OLC     */
++	0x09,	/* 08 - MC      */
++	0x00,	/* 09 - CSFC    */
++	0x00,	/* 0A - MISC    */
++	0x00,	/* 0B -         */
++	0x00,	/* 0C - PRECH   */
++	0x05,	/* 0D - AUXG    */
++	0x00,	/* 0E -         */
++	0x00,	/* 0F -         */
++	0x00,	/* 10 - RST     */
++	0x00,	/* 11 - PA_CTRL */
++};
++
++struct snd_at73c213 {
++	struct snd_card			*card;
++	struct snd_pcm			*pcm;
++	struct snd_pcm_substream	*substream;
++	struct at73c213_board_info	*board;
++	int				irq;
++	int				period;
++	unsigned long			bitrate;
++	struct clk			*bitclk;
++	struct ssc_device		*ssc;
++	struct spi_device		*spi;
++	u8				spi_wbuffer[2];
++	u8				spi_rbuffer[2];
++	/* Image of the SPI registers in AT73C213. */
++	u8				reg_image[18];
++	/* Protect registers against concurrent access. */
++	spinlock_t			lock;
++};
++
++#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
++
++static int
++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
++{
++	struct spi_message msg;
++	struct spi_transfer msg_xfer = {
++		.len		= 2,
++		.cs_change	= 0,
++	};
++	int retval;
++
++	spi_message_init(&msg);
++
++	chip->spi_wbuffer[0] = reg;
++	chip->spi_wbuffer[1] = val;
++
++	msg_xfer.tx_buf = chip->spi_wbuffer;
++	msg_xfer.rx_buf = chip->spi_rbuffer;
++	spi_message_add_tail(&msg_xfer, &msg);
++
++	retval = spi_sync(chip->spi, &msg);
++
++	if (!retval)
++		chip->reg_image[reg] = val;
++
++	return retval;
++}
++
++static struct snd_pcm_hardware snd_at73c213_playback_hw = {
++	.info		= SNDRV_PCM_INFO_INTERLEAVED |
++			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
++	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
++	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
++	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
++	.channels_min	= 2,
++	.channels_max	= 2,
++	.buffer_bytes_max = 64 * 1024 - 1,
++	.period_bytes_min = 512,
++	.period_bytes_max = 64 * 1024 - 1,
++	.periods_min	= 4,
++	.periods_max	= 1024,
++};
++
++/*
++ * Calculate and set bitrate and divisions.
++ */
++static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
++{
++	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
++	unsigned long dac_rate_new, ssc_div, status;
++	unsigned long ssc_div_max, ssc_div_min;
++	int max_tries;
++
++	/*
++	 * We connect two clocks here, picking divisors so the I2S clocks
++	 * out data at the same rate the DAC clocks it in ... and as close
++	 * as practical to the desired target rate.
++	 *
++	 * The DAC master clock (MCLK) is programmable, and is either 256
++	 * or (not here) 384 times the I2S output clock (BCLK).
++	 */
++
++	/* SSC clock / (bitrate * stereo * 16-bit). */
++	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
++	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
++	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
++	max_tries = (ssc_div_max - ssc_div_min) / 2;
++
++	if (max_tries < 1)
++		max_tries = 1;
++
++	/* ssc_div must be a power of 2. */
++	ssc_div = (ssc_div + 1) & ~1UL;
++
++	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
++		ssc_div -= 2;
++		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
++			return -ENXIO;
++	}
++
++	/* Search for a possible bitrate. */
++	do {
++		/* SSC clock / (ssc divider * 16-bit * stereo). */
++		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
++			return -ENXIO;
++
++		/* 256 / (2 * 16) = 8 */
++		dac_rate_new = 8 * (ssc_rate / ssc_div);
++
++		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
++		if (status < 0)
++			return status;
++
++		/* Ignore difference smaller than 256 Hz. */
++		if ((status/256) == (dac_rate_new/256))
++			goto set_rate;
++
++		ssc_div += 2;
++	} while (--max_tries);
++
++	/* Not able to find a valid bitrate. */
++	return -ENXIO;
++
++set_rate:
++	status = clk_set_rate(chip->board->dac_clk, status);
++	if (status < 0)
++		return status;
++
++	/* Set divider in SSC device. */
++	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
++
++	/* SSC clock / (ssc divider * 16-bit * stereo). */
++	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
++
++	dev_info(&chip->spi->dev,
++			"at73c213: supported bitrate is %lu (%lu divider)\n",
++			chip->bitrate, ssc_div);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	snd_at73c213_playback_hw.rate_min = chip->bitrate;
++	snd_at73c213_playback_hw.rate_max = chip->bitrate;
++	runtime->hw = snd_at73c213_playback_hw;
++	chip->substream = substream;
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	chip->substream = NULL;
++	return 0;
++}
++
++static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
++				 struct snd_pcm_hw_params *hw_params)
++{
++	return snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++}
++
++static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size;
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++
++	chip->period = 0;
++
++	ssc_writel(chip->ssc->regs, PDC_TPR,
++			(long)runtime->dma_addr);
++	ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2);
++	ssc_writel(chip->ssc->regs, PDC_TNPR,
++			(long)runtime->dma_addr + block_size);
++	ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
++				   int cmd)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	int retval = 0;
++
++	spin_lock(&chip->lock);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
++		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
++		break;
++	default:
++		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
++		retval = -EINVAL;
++		break;
++	}
++
++	spin_unlock(&chip->lock);
++
++	return retval;
++}
++
++static snd_pcm_uframes_t
++snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
++		- (unsigned long)runtime->dma_addr;
++
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++static struct snd_pcm_ops at73c213_playback_ops = {
++	.open		= snd_at73c213_pcm_open,
++	.close		= snd_at73c213_pcm_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_at73c213_pcm_hw_params,
++	.hw_free	= snd_at73c213_pcm_hw_free,
++	.prepare	= snd_at73c213_pcm_prepare,
++	.trigger	= snd_at73c213_pcm_trigger,
++	.pointer	= snd_at73c213_pcm_pointer,
++};
++
++static void snd_at73c213_pcm_free(struct snd_pcm *pcm)
++{
++	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
++	if (chip->pcm) {
++		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
++		chip->pcm = NULL;
++	}
++}
++
++static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
++{
++	struct snd_pcm *pcm;
++	int retval;
++
++	retval = snd_pcm_new(chip->card, chip->card->shortname,
++			device, 1, 0, &pcm);
++	if (retval < 0)
++		goto out;
++
++	pcm->private_data = chip;
++	pcm->private_free = snd_at73c213_pcm_free;
++	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
++	strcpy(pcm->name, "at73c213");
++	chip->pcm = pcm;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
++
++	retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm,
++			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
++			64 * 1024, 64 * 1024);
++out:
++	return retval;
++}
++
++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
++{
++	struct snd_at73c213 *chip = dev_id;
++	struct snd_pcm_runtime *runtime = chip->substream->runtime;
++	u32 status;
++	int offset;
++	int block_size;
++	int next_period;
++	int retval = IRQ_NONE;
++
++	spin_lock(&chip->lock);
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++	status = ssc_readl(chip->ssc->regs, IMR);
++
++	if (status & SSC_BIT(IMR_ENDTX)) {
++		chip->period++;
++		if (chip->period == runtime->periods)
++			chip->period = 0;
++		next_period = chip->period + 1;
++		if (next_period == runtime->periods)
++			next_period = 0;
++
++		offset = block_size * next_period;
++
++		ssc_writel(chip->ssc->regs, PDC_TNPR,
++				(long)runtime->dma_addr + offset);
++		ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++		retval = IRQ_HANDLED;
++	}
++
++	ssc_readl(chip->ssc->regs, IMR);
++	spin_unlock(&chip->lock);
++
++	if (status & SSC_BIT(IMR_ENDTX))
++		snd_pcm_period_elapsed(chip->substream);
++
++	return retval;
++}
++
++/*
++ * Mixer functions.
++ */
++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	val = (ucontrol->value.integer.value[0] & mask);
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
++	change = val != chip->reg_image[reg];
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++
++	if (mask == 1)
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	else
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++
++	uinfo->count = 2;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] =
++		(chip->reg_image[left_reg] >> shift_left) & mask;
++	ucontrol->value.integer.value[1] =
++		(chip->reg_image[right_reg] >> shift_right) & mask;
++
++	if (invert) {
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++		ucontrol->value.integer.value[1] =
++			(mask - ucontrol->value.integer.value[1]);
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++	int change, retval;
++	unsigned short val1, val2;
++
++	val1 = ucontrol->value.integer.value[0] & mask;
++	val2 = ucontrol->value.integer.value[1] & mask;
++	if (invert) {
++		val1 = mask - val1;
++		val2 = mask - val2;
++	}
++	val1 <<= shift_left;
++	val2 <<= shift_right;
++
++	spin_lock_irq(&chip->lock);
++
++	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
++	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
++	change = val1 != chip->reg_image[left_reg]
++		|| val2 != chip->reg_image[right_reg];
++	retval = snd_at73c213_write_reg(chip, left_reg, val1);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++	retval = snd_at73c213_write_reg(chip, right_reg, val2);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(0x01 - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	if (ucontrol->value.integer.value[0])
++		val = mask;
++	else
++		val = 0;
++
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val |= (chip->reg_image[reg] & ~(mask << shift));
++	change = val != chip->reg_image[reg];
++
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
++
++	return 0;
++}
++
++static int snd_at73c213_line_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++static int snd_at73c213_aux_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_mono_switch_info,				\
++	.get = snd_at73c213_mono_switch_get,				\
++	.put = snd_at73c213_mono_switch_put,				\
++	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
++}
++
++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_stereo_info,				\
++	.get = snd_at73c213_stereo_get,					\
++	.put = snd_at73c213_stereo_put,					\
++	.private_value = (left_reg | (right_reg << 8)			\
++			| (shift_left << 16) | (shift_right << 19)	\
++			| (mask << 24) | (invert << 22))		\
++}
++
++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "PA Playback Volume",
++	.index	= 0,
++	.info	= snd_at73c213_pa_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Aux Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_aux_capture_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Line Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_line_capture_volume_info,
++	.get	= snd_at73c213_stereo_get,
++	.put	= snd_at73c213_stereo_put,
++	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
++		| (0x1f << 24) | (1 << 22),
++},
++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
++};
++
++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
++{
++	struct snd_card *card;
++	int errval, idx;
++
++	if (chip == NULL || chip->pcm == NULL)
++		return -EINVAL;
++
++	card = chip->card;
++
++	strcpy(card->mixername, chip->pcm->name);
++
++	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
++		errval = snd_ctl_add(card,
++				snd_ctl_new1(&snd_at73c213_controls[idx],
++					chip));
++		if (errval < 0)
++			goto cleanup;
++	}
++
++	return 0;
++
++cleanup:
++	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
++		struct snd_kcontrol *kctl;
++		kctl = snd_ctl_find_numid(card, idx);
++		if (kctl)
++			snd_ctl_remove(card, kctl);
++	}
++	return errval;
++}
++
++/*
++ * Device functions
++ */
++static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
++{
++	/*
++	 * Continuous clock output.
++	 * Starts on falling TF.
++	 * Delay 1 cycle (1 bit).
++	 * Periode is 16 bit (16 - 1).
++	 */
++	ssc_writel(chip->ssc->regs, TCMR,
++			SSC_BF(TCMR_CKO, 1)
++			| SSC_BF(TCMR_START, 4)
++			| SSC_BF(TCMR_STTDLY, 1)
++			| SSC_BF(TCMR_PERIOD, 16 - 1));
++	/*
++	 * Data length is 16 bit (16 - 1).
++	 * Transmit MSB first.
++	 * Transmit 2 words each transfer.
++	 * Frame sync length is 16 bit (16 - 1).
++	 * Frame starts on negative pulse.
++	 */
++	ssc_writel(chip->ssc->regs, TFMR,
++			SSC_BF(TFMR_DATLEN, 16 - 1)
++			| SSC_BIT(TFMR_MSBF)
++			| SSC_BF(TFMR_DATNB, 1)
++			| SSC_BF(TFMR_FSLEN, 16 - 1)
++			| SSC_BF(TFMR_FSOS, 1));
++
++	return 0;
++}
++
++static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
++{
++	int retval;
++	unsigned char dac_ctrl = 0;
++
++	retval = snd_at73c213_set_bitrate(chip);
++	if (retval)
++		goto out;
++
++	/* Enable DAC master clock. */
++	clk_enable(chip->board->dac_clk);
++
++	/* Initialize at73c213 on SPI bus. */
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
++	if (retval)
++		goto out_clk;
++	msleep(1);
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
++	if (retval)
++		goto out_clk;
++
++	/* Precharge everything. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
++			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
++	if (retval)
++		goto out_clk;
++
++	msleep(50);
++
++	/* Stop precharging PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL,
++			(1<<PA_CTRL_APALP) | 0x0f);
++	if (retval)
++		goto out_clk;
++
++	msleep(450);
++
++	/* Stop precharging DAC, turn on master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
++	if (retval)
++		goto out_clk;
++
++	msleep(1);
++
++	/* Turn on DAC. */
++	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
++		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
++
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
++	if (retval)
++		goto out_clk;
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out_clk;
++
++	/* Enable I2S device, i.e. clock output. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	goto out;
++
++out_clk:
++	clk_disable(chip->board->dac_clk);
++out:
++	return retval;
++}
++
++static int snd_at73c213_dev_free(struct snd_device *device)
++{
++	struct snd_at73c213 *chip = device->device_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	if (chip->irq >= 0) {
++		free_irq(chip->irq, chip);
++		chip->irq = -1;
++	}
++
++	return 0;
++}
++
++static int __devinit snd_at73c213_dev_init(struct snd_card *card,
++					 struct spi_device *spi)
++{
++	static struct snd_device_ops ops = {
++		.dev_free	= snd_at73c213_dev_free,
++	};
++	struct snd_at73c213 *chip = get_chip(card);
++	int irq, retval;
++
++	irq = chip->ssc->irq;
++	if (irq < 0)
++		return irq;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->irq = -1;
++
++	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
++	if (retval) {
++		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
++		goto out;
++	}
++	chip->irq = irq;
++
++	memcpy(&chip->reg_image, &snd_at73c213_original_image,
++			sizeof(snd_at73c213_original_image));
++
++	retval = snd_at73c213_ssc_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_chip_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_pcm_new(chip, 0);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_mixer(chip);
++	if (retval)
++		goto out_snd_dev;
++
++	snd_card_set_dev(card, &spi->dev);
++
++	goto out;
++
++out_snd_dev:
++	snd_device_free(card, chip);
++out_irq:
++	free_irq(chip->irq, chip);
++	chip->irq = -1;
++out:
++	return retval;
++}
++
++static int snd_at73c213_probe(struct spi_device *spi)
++{
++	struct snd_card			*card;
++	struct snd_at73c213		*chip;
++	struct at73c213_board_info	*board;
++	int				retval;
++	char				id[16];
++
++	board = spi->dev.platform_data;
++	if (!board) {
++		dev_dbg(&spi->dev, "no platform_data\n");
++		return -ENXIO;
++	}
++
++	if (!board->dac_clk) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return -ENXIO;
++	}
++
++	if (IS_ERR(board->dac_clk)) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return PTR_ERR(board->dac_clk);
++	}
++
++	retval = -ENOMEM;
++
++	/* Allocate "card" using some unused identifiers. */
++	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
++	card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
++	if (!card)
++		goto out;
++
++	chip = card->private_data;
++	chip->spi = spi;
++	chip->board = board;
++
++	chip->ssc = ssc_request(board->ssc_id);
++	if (IS_ERR(chip->ssc)) {
++		dev_dbg(&spi->dev, "could not get ssc%d device\n",
++				board->ssc_id);
++		retval = PTR_ERR(chip->ssc);
++		goto out_card;
++	}
++
++	retval = snd_at73c213_dev_init(card, spi);
++	if (retval)
++		goto out_ssc;
++
++	strcpy(card->driver, "at73c213");
++	strcpy(card->shortname, board->shortname);
++	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
++
++	retval = snd_card_register(card);
++	if (retval)
++		goto out_ssc;
++
++	dev_set_drvdata(&spi->dev, card);
++
++	goto out;
++
++out_ssc:
++	ssc_free(chip->ssc);
++out_card:
++	snd_card_free(card);
++out:
++	return retval;
++}
++
++static int __devexit snd_at73c213_remove(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++	int retval;
++
++	/* Stop playback. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out;
++
++	/* Turn off PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f));
++	if (retval)
++		goto out;
++	msleep(10);
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f);
++	if (retval)
++		goto out;
++
++	/* Turn off external DAC. */
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
++	if (retval)
++		goto out;
++	msleep(2);
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
++	if (retval)
++		goto out;
++
++	/* Turn off master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
++	if (retval)
++		goto out;
++
++out:
++	/* Stop DAC master clock. */
++	clk_disable(chip->board->dac_clk);
++
++	ssc_free(chip->ssc);
++	snd_card_free(card);
++	dev_set_drvdata(&spi->dev, NULL);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	clk_disable(chip->board->dac_clk);
++
++	return 0;
++}
++
++static int snd_at73c213_resume(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	clk_enable(chip->board->dac_clk);
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	return 0;
++}
++#else
++#define snd_at73c213_suspend NULL
++#define snd_at73c213_resume NULL
++#endif
++
++static struct spi_driver at73c213_driver = {
++	.driver		= {
++		.name	= "at73c213",
++	},
++	.probe		= snd_at73c213_probe,
++	.suspend	= snd_at73c213_suspend,
++	.resume		= snd_at73c213_resume,
++	.remove		= __devexit_p(snd_at73c213_remove),
++};
++
++static int __init at73c213_init(void)
++{
++	return spi_register_driver(&at73c213_driver);
++}
++module_init(at73c213_init);
++
++static void __exit at73c213_exit(void)
++{
++	spi_unregister_driver(&at73c213_driver);
++}
++module_exit(at73c213_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h
+new file mode 100644
+index 0000000..fd8b372
+--- /dev/null
++++ b/sound/spi/at73c213.h
+@@ -0,0 +1,119 @@
++/*
++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 - 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++
++#ifndef _SND_AT73C213_H
++#define _SND_AT73C213_H
++
++/* DAC control register */
++#define DAC_CTRL		0x00
++#define DAC_CTRL_ONPADRV	7
++#define DAC_CTRL_ONAUXIN	6
++#define DAC_CTRL_ONDACR		5
++#define DAC_CTRL_ONDACL		4
++#define DAC_CTRL_ONLNOR		3
++#define DAC_CTRL_ONLNOL		2
++#define DAC_CTRL_ONLNIR		1
++#define DAC_CTRL_ONLNIL		0
++
++/* DAC left line in gain register */
++#define DAC_LLIG		0x01
++#define DAC_LLIG_LLIG		0
++
++/* DAC right line in gain register */
++#define DAC_RLIG		0x02
++#define DAC_RLIG_RLIG		0
++
++/* DAC Left Master Playback Gain Register */
++#define DAC_LMPG		0x03
++#define DAC_LMPG_LMPG		0
++
++/* DAC Right Master Playback Gain Register */
++#define DAC_RMPG		0x04
++#define DAC_RMPG_RMPG		0
++
++/* DAC Left Line Out Gain Register */
++#define DAC_LLOG		0x05
++#define DAC_LLOG_LLOG		0
++
++/* DAC Right Line Out Gain Register */
++#define DAC_RLOG		0x06
++#define DAC_RLOG_RLOG		0
++
++/* DAC Output Level Control Register */
++#define DAC_OLC			0x07
++#define DAC_OLC_RSHORT		7
++#define DAC_OLC_ROLC		4
++#define DAC_OLC_LSHORT		3
++#define DAC_OLC_LOLC		0
++
++/* DAC Mixer Control Register */
++#define DAC_MC			0x08
++#define DAC_MC_INVR		5
++#define DAC_MC_INVL		4
++#define DAC_MC_RMSMIN2		3
++#define DAC_MC_RMSMIN1		2
++#define DAC_MC_LMSMIN2		1
++#define DAC_MC_LMSMIN1		0
++
++/* DAC Clock and Sampling Frequency Control Register */
++#define DAC_CSFC		0x09
++#define DAC_CSFC_OVRSEL		4
++
++/* DAC Miscellaneous Register */
++#define DAC_MISC		0x0A
++#define DAC_MISC_VCMCAPSEL	7
++#define DAC_MISC_DINTSEL	4
++#define DAC_MISC_DITHEN		3
++#define DAC_MISC_DEEMPEN	2
++#define DAC_MISC_NBITS		0
++
++/* DAC Precharge Control Register */
++#define DAC_PRECH		0x0C
++#define DAC_PRECH_PRCHGPDRV	7
++#define DAC_PRECH_PRCHGAUX1	6
++#define DAC_PRECH_PRCHGLNOR	5
++#define DAC_PRECH_PRCHGLNOL	4
++#define DAC_PRECH_PRCHGLNIR	3
++#define DAC_PRECH_PRCHGLNIL	2
++#define DAC_PRECH_PRCHG		1
++#define DAC_PRECH_ONMSTR	0
++
++/* DAC Auxiliary Input Gain Control Register */
++#define DAC_AUXG		0x0D
++#define DAC_AUXG_AUXG		0
++
++/* DAC Reset Register */
++#define DAC_RST			0x10
++#define DAC_RST_RESMASK		2
++#define DAC_RST_RESFILZ		1
++#define DAC_RST_RSTZ		0
++
++/* Power Amplifier Control Register */
++#define PA_CTRL			0x11
++#define PA_CTRL_APAON		6
++#define PA_CTRL_APAPRECH	5
++#define PA_CTRL_APALP		4
++#define PA_CTRL_APAGAIN		0
++
++#endif /* _SND_AT73C213_H */
diff --git a/target/device/Atmel/atngw100/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch
new file mode 100644
index 000000000..99a9d149b
--- /dev/null
+++ b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.23-200-fix-include-typo-for-atngw100-board.patch
@@ -0,0 +1,11 @@
+--- a/arch/avr32/boards/atngw100/setup.c	2007-11-02 10:47:52.000000000 +0100
++++ b/arch/avr32/boards/atngw100/setup.c	2007-11-02 10:48:00.000000000 +0100
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
diff --git a/target/device/Atmel/atngw100/kernel-patches/linux-2.6.24-100-avr32-git.1.patch b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
new file mode 100644
index 000000000..173000063
--- /dev/null
+++ b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
@@ -0,0 +1,16922 @@
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/Kconfig linux-avr32/arch/avr32/boards/atngw100/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atngw100/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-avr32/arch/avr32/boards/atngw100/setup.c
+--- linux-2.6.24/arch/avr32/boards/atngw100/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+ 	.sda_pin		= GPIO_PIN_PA(6),
+ 	.scl_pin		= GPIO_PIN_PA(7),
+@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -157,6 +164,7 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+@@ -165,11 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ 	at32_select_gpio(i2c_gpio_data.sda_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	at32_select_gpio(i2c_gpio_data.scl_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h	2008-02-01 14:51:35.000000000 -0500
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c	2008-02-01 14:51:35.000000000 -0500
+@@ -11,7 +11,6 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+@@ -22,7 +21,7 @@
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -49,18 +48,16 @@ static struct eth_platform_data __initda
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static struct at73c213_board_info at73c213_data = {
+ 	.ssc_id		= 0,
+ 	.shortname	= "AVR32 STK1000 external DAC",
+ };
+ #endif
+-#endif
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ 	{
+ 		/* AT73C213 */
+ 		.modalias	= "at73c213",
+@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
+-{
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
+-}
+-
+-#else
+-static void setup_j2_leds(void)
+-{
+-}
+-#endif
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-static void __init at73c213_set_clk(struct at73c213_board_info *info)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+ 	struct clk *gclk;
+ 	struct clk *pll;
+@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru
+ 	}
+ 
+ 	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
+-	info->dac_clk = gclk;
++	at73c213_data.dac_clk = gclk;
+ 
+ err_set_clk:
+ 	clk_put(pll);
+@@ -229,12 +179,16 @@ err_pll:
+ err_gclk:
+ 	return;
+ }
+-#endif
+-#endif
++#else
++static void __init atstk1002_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -271,7 +225,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -281,12 +235,16 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+@@ -294,17 +252,18 @@ static int __init atstk1002_init(void)
+ 			     fbmem_start, fbmem_size);
+ #endif
+ 	at32_add_device_usba(0, NULL);
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
++	at32_add_device_cf(0, 2, &cf0_data);
+ 
+-	setup_j2_leds();
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-	at73c213_set_clk(&at73c213_data);
+-#endif
+-#endif
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig linux-avr32/arch/avr32/boards/atstk1000/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,34 +1,53 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++choice
++	prompt "ATSTK1000 CPU daughterboard type"
++	default BOARD_ATSTK1002
++
++config BOARD_ATSTK1002
++	bool "ATSTK1002"
++	select CPU_AT32AP7000
++
++config BOARD_ATSTK1003
++	bool "ATSTK1003"
++	select CPU_AT32AP7001
++
++config BOARD_ATSTK1004
++	bool "ATSTK1004"
++	select CPU_AT32AP7002
++
++endchoice
++
++
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +85,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Makefile linux-avr32/arch/avr32/boards/atstk1000/Makefile
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/setup.c linux-avr32/arch/avr32/boards/atstk1000/setup.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff -Nrup linux-2.6.24/arch/avr32/configs/atngw100_defconfig linux-avr32/arch/avr32/configs/atngw100_defconfig
+--- linux-2.6.24/arch/avr32/configs/atngw100_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atngw100_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,46 +1,51 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:20:41 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+ CONFIG_BSD_PROCESS_ACCT_V3=y
+ # CONFIG_TASKSTATS is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
+ # CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
+ CONFIG_BLK_DEV_INITRD=y
+@@ -61,35 +66,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ CONFIG_KMOD=y
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -111,6 +109,7 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
+@@ -119,9 +118,9 @@ CONFIG_LOADER_U_BOOT=y
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -141,9 +140,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -153,13 +154,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -213,6 +232,7 @@ CONFIG_INET_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_TRANSPORT=y
+ CONFIG_INET_XFRM_MODE_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+@@ -240,6 +260,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -252,6 +273,7 @@ CONFIG_NF_CONNTRACK_MARK=y
+ # CONFIG_NF_CONNTRACK_EVENTS is not set
+ CONFIG_NF_CT_PROTO_GRE=m
+ # CONFIG_NF_CT_PROTO_SCTP is not set
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
+ CONFIG_NF_CONNTRACK_AMANDA=m
+ CONFIG_NF_CONNTRACK_FTP=m
+ CONFIG_NF_CONNTRACK_H323=m
+@@ -269,9 +291,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m
+ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+ CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+ # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+ CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+ CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+ CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+ # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+@@ -284,6 +308,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -292,6 +317,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m
+ CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+ CONFIG_NETFILTER_XT_MATCH_STRING=m
+ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+ CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+ 
+ #
+@@ -359,13 +386,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -373,10 +406,6 @@ CONFIG_VLAN_8021Q=m
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ CONFIG_NET_CLS_ROUTE=y
+ 
+@@ -384,6 +413,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -397,6 +427,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -405,16 +436,13 @@ CONFIG_NET_CLS_ROUTE=y
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -434,6 +462,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -493,20 +522,8 @@ CONFIG_MTD_DATAFLASH=y
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -517,11 +534,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++# CONFIG_MISC_DEVICES is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -529,30 +542,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ # CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -571,21 +596,14 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ CONFIG_PPP_MPPE=m
+ CONFIG_PPPOE=m
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+@@ -620,23 +638,50 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
+-
+-#
+-# TPM devices
+-#
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,13 +700,25 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# Watchdog Device Drivers
+ #
+-# CONFIG_W1 is not set
+-# CONFIG_HWMON is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -678,23 +735,21 @@ CONFIG_SPI_ATMEL=y
+ #
+ # Graphics support
+ #
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
+ # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
+ 
+ #
+ # Sound
+ #
+ # CONFIG_SOUND is not set
+-
+-#
+-# USB support
+-#
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -706,12 +761,47 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
+ 
+ #
+-# LED devices
++# MMC/SD Host Controller Drivers
+ #
++CONFIG_MMC_SPI=m
+ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ 
+@@ -726,53 +816,71 @@ CONFIG_LEDS_GPIO=y
+ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+-
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
+-#
+-
+-#
+-# LED Triggers
+-#
+-
+-#
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+ #
+-CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS=m
+ # CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
+-CONFIG_JBD=y
+-# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD=m
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -781,7 +889,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -814,8 +923,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=y
++CONFIG_CONFIGFS_FS=m
+ 
+ #
+ # Miscellaneous filesystems
+@@ -830,10 +938,12 @@ CONFIG_CONFIGFS_FS=y
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+ CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -842,19 +952,21 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+ # CONFIG_NFS_V4 is not set
+ # CONFIG_NFS_DIRECTIO is not set
+-# CONFIG_NFSD is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++# CONFIG_NFSD_V4 is not set
++CONFIG_NFSD_TCP=y
+ CONFIG_ROOT_NFS=y
+ CONFIG_LOCKD=y
+ CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
+ CONFIG_NFS_COMMON=y
+ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+@@ -871,23 +983,18 @@ CONFIG_CIFS=m
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+-CONFIG_NLS=y
++CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+-# CONFIG_NLS_CODEPAGE_437 is not set
++CONFIG_NLS_CODEPAGE_437=m
+ # CONFIG_NLS_CODEPAGE_737 is not set
+ # CONFIG_NLS_CODEPAGE_775 is not set
+-CONFIG_NLS_CODEPAGE_850=y
++CONFIG_NLS_CODEPAGE_850=m
+ # CONFIG_NLS_CODEPAGE_852 is not set
+ # CONFIG_NLS_CODEPAGE_855 is not set
+ # CONFIG_NLS_CODEPAGE_857 is not set
+@@ -908,7 +1015,7 @@ CONFIG_NLS_CODEPAGE_850=y
+ # CONFIG_NLS_CODEPAGE_1250 is not set
+ # CONFIG_NLS_CODEPAGE_1251 is not set
+ # CONFIG_NLS_ASCII is not set
+-CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_ISO8859_2 is not set
+ # CONFIG_NLS_ISO8859_3 is not set
+ # CONFIG_NLS_ISO8859_4 is not set
+@@ -921,18 +1028,19 @@ CONFIG_NLS_ISO8859_1=y
+ # CONFIG_NLS_ISO8859_15 is not set
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+-CONFIG_NLS_UTF8=y
+-
+-#
+-# Distributed Lock Manager
+-#
++CONFIG_NLS_UTF8=m
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -941,12 +1049,17 @@ CONFIG_MAGIC_SYSRQ=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -954,21 +1067,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ # CONFIG_FORCED_INLINING is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+ CONFIG_CRYPTO=y
+ CONFIG_CRYPTO_ALGAPI=y
+ CONFIG_CRYPTO_BLKCIPHER=y
+@@ -989,6 +1102,7 @@ CONFIG_CRYPTO_ECB=m
+ CONFIG_CRYPTO_CBC=y
+ CONFIG_CRYPTO_PCBC=m
+ # CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
+ # CONFIG_CRYPTO_CRYPTD is not set
+ CONFIG_CRYPTO_DES=y
+ # CONFIG_CRYPTO_FCRYPT is not set
+@@ -1002,15 +1116,14 @@ CONFIG_CRYPTO_DES=y
+ CONFIG_CRYPTO_ARC4=m
+ # CONFIG_CRYPTO_KHAZAD is not set
+ # CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
+ CONFIG_CRYPTO_DEFLATE=y
+ # CONFIG_CRYPTO_MICHAEL_MIC is not set
+ # CONFIG_CRYPTO_CRC32C is not set
+ # CONFIG_CRYPTO_CAMELLIA is not set
+ # CONFIG_CRYPTO_TEST is not set
+-
+-#
+-# Hardware crypto devices
+-#
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
+ 
+ #
+ # Library routines
+@@ -1018,8 +1131,9 @@ CONFIG_CRYPTO_DEFLATE=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1002_defconfig linux-avr32/arch/avr32/configs/atstk1002_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1002_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1002_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,48 +1,48 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:07:43 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+-CONFIG_BSD_PROCESS_ACCT=y
+-CONFIG_BSD_PROCESS_ACCT_V3=y
+-CONFIG_TASKSTATS=y
+-CONFIG_TASK_DELAY_ACCT=y
+-# CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
+-CONFIG_AUDIT=y
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ CONFIG_RELAY=y
+ CONFIG_BLK_DEV_INITRD=y
+@@ -63,35 +63,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ # CONFIG_MODULE_FORCE_UNLOAD is not set
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ # CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +92,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -113,18 +106,27 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+-CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++CONFIG_BOARD_ATSTK1002=y
++# CONFIG_BOARD_ATSTK1003 is not set
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -144,9 +146,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -156,13 +160,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -182,7 +204,12 @@ CONFIG_NET=y
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+ CONFIG_UNIX=y
+-# CONFIG_NET_KEY is not set
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++CONFIG_NET_KEY=m
++# CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ # CONFIG_IP_MULTICAST is not set
+ # CONFIG_IP_ADVANCED_ROUTER is not set
+@@ -191,36 +218,52 @@ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+ # CONFIG_IP_PNP_RARP is not set
+-# CONFIG_NET_IPIP is not set
+-# CONFIG_NET_IPGRE is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
+ # CONFIG_ARPD is not set
+ # CONFIG_SYN_COOKIES is not set
+-# CONFIG_INET_AH is not set
+-# CONFIG_INET_ESP is not set
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
+ # CONFIG_INET_IPCOMP is not set
+ # CONFIG_INET_XFRM_TUNNEL is not set
+-# CONFIG_INET_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_BEET is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+ CONFIG_TCP_CONG_CUBIC=y
+ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_TCP_MD5SIG is not set
+-# CONFIG_IPV6 is not set
+-# CONFIG_INET6_XFRM_TUNNEL is not set
+-# CONFIG_INET6_TUNNEL is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
+ # CONFIG_NETWORK_SECMARK is not set
+ # CONFIG_NETFILTER is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ # CONFIG_VLAN_8021Q is not set
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -228,16 +271,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ 
+ #
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -251,6 +291,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -259,16 +300,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -288,6 +326,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -327,6 +366,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +386,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,42 +398,87 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+ # SCSI device support
+ #
+ # CONFIG_RAID_ATTRS is not set
+-# CONFIG_SCSI is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
+ # CONFIG_SCSI_NETLINK is not set
+-# CONFIG_ATA is not set
++# CONFIG_SCSI_PROC_FS is not set
+ 
+ #
+-# Multi-device support (RAID and LVM)
++# SCSI support type (disk, tape, CD-ROM)
+ #
+-# CONFIG_MD is not set
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
+ 
+ #
+-# Network device support
++# SCSI Transports
+ #
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_LOWLEVEL is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
+ CONFIG_NETDEVICES=y
+-CONFIG_DUMMY=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -423,27 +497,54 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,35 +573,87 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+-# TPM devices
++# SPI support
+ #
+-# CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
+ 
+ #
+-# SPI support
++# SPI Master Controller Drivers
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -517,23 +670,94 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++# CONFIG_SND_VERBOSE_PROCFS is not set
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -545,47 +769,116 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
+-
+-#
+-# LED devices
+-#
+-# CONFIG_NEW_LEDS is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
+ 
+ #
+ # LED drivers
+ #
++CONFIG_LEDS_GPIO=m
+ 
+ #
+ # LED Triggers
+ #
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+@@ -593,8 +886,11 @@ CONFIG_UNIX98_PTYS=y
+ CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +905,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -637,8 +933,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++# CONFIG_CONFIGFS_FS is not set
+ 
+ #
+ # Miscellaneous filesystems
+@@ -652,11 +947,12 @@ CONFIG_CONFIGFS_FS=m
+ # CONFIG_EFS_FS is not set
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+-CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -665,10 +961,7 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+@@ -688,17 +981,12 @@ CONFIG_SUNRPC=y
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+ CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+ CONFIG_NLS_CODEPAGE_437=m
+@@ -739,17 +1027,18 @@ CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+ CONFIG_NLS_UTF8=m
+-
+-#
+-# Distributed Lock Manager
+-#
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -758,12 +1047,17 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -771,22 +1065,63 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+-# CONFIG_CRYPTO is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=m
++CONFIG_CRYPTO_BLKCIPHER=m
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_MANAGER=m
++CONFIG_CRYPTO_HMAC=m
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=m
++CONFIG_CRYPTO_SHA1=m
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_WP512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_ECB is not set
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_TEST is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_HW is not set
+ 
+ #
+ # Library routines
+@@ -794,10 +1129,10 @@ CONFIG_FORCED_INLINING=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+-CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+ CONFIG_PLIST=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1003_defconfig linux-avr32/arch/avr32/configs/atstk1003_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1003_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1003_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1015 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 22:54:34 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7001=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++CONFIG_BOARD_ATSTK1003=y
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=m
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++CONFIG_CRC7=m
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1004_defconfig linux-avr32/arch/avr32/configs/atstk1004_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1004_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1004_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,621 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:04:20 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++# CONFIG_BLOCK is not set
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++# CONFIG_BOARD_ATSTK1003 is not set
++CONFIG_BOARD_ATSTK1004=y
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_MISC_DEVICES is not set
++
++#
++# SCSI device support
++#
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_NEW_LEDS is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++# CONFIG_INSTRUMENTATION is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.c linux-avr32/arch/avr32/drivers/dw-dmac.c
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.h linux-avr32/arch/avr32/drivers/dw-dmac.h
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.h	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff -Nrup linux-2.6.24/arch/avr32/drivers/Makefile linux-avr32/arch/avr32/drivers/Makefile
+--- linux-2.6.24/arch/avr32/drivers/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig linux-avr32/arch/avr32/Kconfig
+--- linux-2.6.24/arch/avr32/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32
+ config ARCH_HAS_ILOG2_U64
+ 	def_bool n
+ 
++config ARCH_SUPPORTS_OPROFILE
++	def_bool y
++
+ config GENERIC_HWEIGHT
+ 	def_bool y
+ 
+@@ -81,19 +84,23 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
+-choice
+-	prompt "AVR32 CPU type"
+-	default CPU_AT32AP7000
++#
++# CPU types
++#
+ 
+-config CPU_AT32AP7000
+-	bool "AT32AP7000"
++# AP7000 derivatives
++config CPU_AT32AP700X
++	bool
+ 	select PLATFORM_AT32AP
+-endchoice
+-
+-#
+-# CPU Daughterboards for ATSTK1000
+-config BOARD_ATSTK1002
++config CPU_AT32AP7000
++	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7001
+ 	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7002
++	bool
++	select CPU_AT32AP700X
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -101,15 +108,18 @@ choice
+ 
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+-	select BOARD_ATSTK1002 if CPU_AT32AP7000
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
++	select CPU_AT32AP7000
+ endchoice
+ 
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config NMI_DEBUGGING
++	bool "NMI Debugging"
++	default n
++	help
++	  Say Y here and pass the nmi_debug command-line parameter to
++	  the kernel to turn on NMI debugging. Depending on the value
++	  of the nmi_debug option, various pieces of information will
++	  be dumped to the console when a Non-Maskable Interrupt
++	  happens.
++
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+@@ -219,6 +243,8 @@ source "drivers/Kconfig"
+ 
+ source "fs/Kconfig"
+ 
++source "kernel/Kconfig.instrumentation"
++
+ source "arch/avr32/Kconfig.debug"
+ 
+ source "security/Kconfig"
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig.debug linux-avr32/arch/avr32/Kconfig.debug
+--- linux-2.6.24/arch/avr32/Kconfig.debug	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig.debug	2008-02-01 14:51:35.000000000 -0500
+@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT
+ 
+ source "lib/Kconfig.debug"
+ 
+-config KPROBES
+-	bool "Kprobes"
+-	depends on DEBUG_KERNEL
+-	help
+-	  Kprobes allows you to trap at almost any kernel address and
+-          execute a callback function.  register_kprobe() establishes
+-          a probepoint and specifies the callback.  Kprobes is useful
+-          for kernel debugging, non-intrusive instrumentation and testing.
+-          If in doubt, say "N".
+-
+ endmenu
+diff -Nrup linux-2.6.24/arch/avr32/kernel/cpu.c linux-avr32/arch/avr32/kernel/cpu.c
+--- linux-2.6.24/arch/avr32/kernel/cpu.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/cpu.c	2008-02-01 14:51:35.000000000 -0500
+@@ -13,6 +13,7 @@
+ #include <linux/percpu.h>
+ #include <linux/param.h>
+ #include <linux/errno.h>
++#include <linux/clk.h>
+ 
+ #include <asm/setup.h>
+ #include <asm/sysreg.h>
+@@ -187,9 +188,20 @@ static int __init topology_init(void)
+ 
+ subsys_initcall(topology_init);
+ 
++struct chip_id_map {
++	u16	mid;
++	u16	pn;
++	const char *name;
++};
++
++static const struct chip_id_map chip_names[] = {
++	{ .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
++};
++#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
++
+ static const char *cpu_names[] = {
+ 	"Morgan",
+-	"AP7000",
++	"AP7",
+ };
+ #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
+ 
+@@ -206,12 +218,32 @@ static const char *mmu_types[] = {
+ 	"MPU"
+ };
+ 
++static const char *cpu_feature_flags[] = {
++	"rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
++};
++
++static const char *get_chip_name(struct avr32_cpuinfo *cpu)
++{
++	unsigned int i;
++	unsigned int mid = avr32_get_manufacturer_id(cpu);
++	unsigned int pn = avr32_get_product_number(cpu);
++
++	for (i = 0; i < NR_CHIP_NAMES; i++) {
++		if (chip_names[i].mid == mid && chip_names[i].pn == pn)
++			return chip_names[i].name;
++	}
++
++	return "(unknown)";
++}
++
+ void __init setup_processor(void)
+ {
+ 	unsigned long config0, config1;
+ 	unsigned long features;
+ 	unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
++	unsigned device_id;
+ 	unsigned tmp;
++	unsigned i;
+ 
+ 	config0 = sysreg_read(CONFIG0);
+ 	config1 = sysreg_read(CONFIG1);
+@@ -221,11 +253,14 @@ void __init setup_processor(void)
+ 	arch_rev = SYSREG_BFEXT(AR, config0);
+ 	mmu_type = SYSREG_BFEXT(MMUT, config0);
+ 
++	device_id = ocd_read(DID);
++
+ 	boot_cpu_data.arch_type = arch_id;
+ 	boot_cpu_data.cpu_type = cpu_id;
+ 	boot_cpu_data.arch_revision = arch_rev;
+ 	boot_cpu_data.cpu_revision = cpu_rev;
+ 	boot_cpu_data.tlb_config = mmu_type;
++	boot_cpu_data.device_id = device_id;
+ 
+ 	tmp = SYSREG_BFEXT(ILSZ, config1);
+ 	if (tmp) {
+@@ -247,41 +282,34 @@ void __init setup_processor(void)
+ 		return;
+ 	}
+ 
+-	printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
++	printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
++	printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
+ 		cpu_names[cpu_id], cpu_id, cpu_rev,
+ 		arch_names[arch_id], arch_rev);
+ 	printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
+ 
+ 	printk ("CPU: features:");
+ 	features = 0;
+-	if (config0 & SYSREG_BIT(CONFIG0_R)) {
++	if (config0 & SYSREG_BIT(CONFIG0_R))
+ 		features |= AVR32_FEATURE_RMW;
+-		printk(" rmw");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_D)) {
++	if (config0 & SYSREG_BIT(CONFIG0_D))
+ 		features |= AVR32_FEATURE_DSP;
+-		printk(" dsp");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_S)) {
++	if (config0 & SYSREG_BIT(CONFIG0_S))
+ 		features |= AVR32_FEATURE_SIMD;
+-		printk(" simd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_O)) {
++	if (config0 & SYSREG_BIT(CONFIG0_O))
+ 		features |= AVR32_FEATURE_OCD;
+-		printk(" ocd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_P)) {
++	if (config0 & SYSREG_BIT(CONFIG0_P))
+ 		features |= AVR32_FEATURE_PCTR;
+-		printk(" perfctr");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_J)) {
++	if (config0 & SYSREG_BIT(CONFIG0_J))
+ 		features |= AVR32_FEATURE_JAVA;
+-		printk(" java");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_F)) {
++	if (config0 & SYSREG_BIT(CONFIG0_F))
+ 		features |= AVR32_FEATURE_FPU;
+-		printk(" fpu");
+-	}
++
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (features & (1 << i))
++			printk(" %s", cpu_feature_flags[i]);
++
+ 	printk("\n");
+ 	boot_cpu_data.features = features;
+ }
+@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo
+ {
+ 	unsigned int icache_size, dcache_size;
+ 	unsigned int cpu = smp_processor_id();
++	unsigned int freq;
++	unsigned int i;
+ 
+ 	icache_size = boot_cpu_data.icache.ways *
+ 		boot_cpu_data.icache.sets *
+@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo
+ 
+ 	seq_printf(m, "processor\t: %d\n", cpu);
+ 
++	seq_printf(m, "chip type\t: %s revision %c\n",
++			get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
+ 	if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
+-		seq_printf(m, "cpu family\t: %s revision %d\n",
++		seq_printf(m, "cpu arch\t: %s revision %d\n",
+ 			   arch_names[boot_cpu_data.arch_type],
+ 			   boot_cpu_data.arch_revision);
+ 	if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
+-		seq_printf(m, "cpu type\t: %s revision %d\n",
++		seq_printf(m, "cpu core\t: %s revision %d\n",
+ 			   cpu_names[boot_cpu_data.cpu_type],
+ 			   boot_cpu_data.cpu_revision);
+ 
++	freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
++	seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
++
+ 	seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
+ 		   icache_size >> 10,
+ 		   boot_cpu_data.icache.ways,
+@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo
+ 		   boot_cpu_data.dcache.ways,
+ 		   boot_cpu_data.dcache.sets,
+ 		   boot_cpu_data.dcache.linesz);
+-	seq_printf(m, "bogomips\t: %lu.%02lu\n",
++
++	seq_printf(m, "features\t:");
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (boot_cpu_data.features & (1 << i))
++			seq_printf(m, " %s", cpu_feature_flags[i]);
++
++	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
+ 		   boot_cpu_data.loops_per_jiffy / (500000/HZ),
+ 		   (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
+ 
+@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v
+ 
+ }
+ 
+-struct seq_operations cpuinfo_op = {
++const struct seq_operations cpuinfo_op = {
+ 	.start	= c_start,
+ 	.next	= c_next,
+ 	.stop	= c_stop,
+diff -Nrup linux-2.6.24/arch/avr32/kernel/dma-controller.c linux-avr32/arch/avr32/kernel/dma-controller.c
+--- linux-2.6.24/arch/avr32/kernel/dma-controller.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/dma-controller.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/irq.c linux-avr32/arch/avr32/kernel/irq.c
+--- linux-2.6.24/arch/avr32/kernel/irq.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/irq.c	2008-02-01 14:51:35.000000000 -0500
+@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq)
+ 	printk("unexpected IRQ %u\n", irq);
+ }
+ 
++/* May be overridden by platform code */
++int __weak nmi_enable(void)
++{
++	return -ENOSYS;
++}
++
++void __weak nmi_disable(void)
++{
++
++}
++
+ #ifdef CONFIG_PROC_FS
+ int show_interrupts(struct seq_file *p, void *v)
+ {
+diff -Nrup linux-2.6.24/arch/avr32/kernel/kprobes.c linux-avr32/arch/avr32/kernel/kprobes.c
+--- linux-2.6.24/arch/avr32/kernel/kprobes.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/kprobes.c	2008-02-01 14:51:35.000000000 -0500
+@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct
+ void __kprobes arch_arm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("arming kprobe at %p\n", p->addr);
++	ocd_enable(NULL);
+ 	*p->addr = BREAKPOINT_INSTRUCTION;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp
+ void __kprobes arch_disarm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("disarming kprobe at %p\n", p->addr);
++	ocd_disable(NULL);
+ 	*p->addr = p->opcode;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru
+ 
+ int __init arch_init_kprobes(void)
+ {
+-	printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
+-	ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
+-
+ 	/* TODO: Register kretprobe trampoline */
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/kernel/Makefile linux-avr32/arch/avr32/kernel/Makefile
+--- linux-2.6.24/arch/avr32/kernel/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -6,9 +6,11 @@ extra-y				:= head.o vmlinux.lds
+ 
+ obj-$(CONFIG_SUBARCH_AVR32B)	+= entry-avr32b.o
+ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+-obj-y				+= setup.o traps.o semaphore.o ptrace.o
++obj-y				+= setup.o traps.o semaphore.o ocd.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+ obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
++obj-$(CONFIG_NMI_DEBUGGING)	+= nmi_debug.o
+diff -Nrup linux-2.6.24/arch/avr32/kernel/nmi_debug.c linux-avr32/arch/avr32/kernel/nmi_debug.c
+--- linux-2.6.24/arch/avr32/kernel/nmi_debug.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/nmi_debug.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/kdebug.h>
++#include <linux/notifier.h>
++#include <linux/sched.h>
++
++#include <asm/irq.h>
++
++enum nmi_action {
++	NMI_SHOW_STATE	= 1 << 0,
++	NMI_SHOW_REGS	= 1 << 1,
++	NMI_DIE		= 1 << 2,
++	NMI_DEBOUNCE	= 1 << 3,
++};
++
++static unsigned long nmi_actions;
++
++static int nmi_debug_notify(struct notifier_block *self,
++		unsigned long val, void *data)
++{
++	struct die_args *args = data;
++
++	if (likely(val != DIE_NMI))
++		return NOTIFY_DONE;
++
++	if (nmi_actions & NMI_SHOW_STATE)
++		show_state();
++	if (nmi_actions & NMI_SHOW_REGS)
++		show_regs(args->regs);
++	if (nmi_actions & NMI_DEBOUNCE)
++		mdelay(10);
++	if (nmi_actions & NMI_DIE)
++		return NOTIFY_BAD;
++
++	return NOTIFY_OK;
++}
++
++static struct notifier_block nmi_debug_nb = {
++	.notifier_call = nmi_debug_notify,
++};
++
++static int __init nmi_debug_setup(char *str)
++{
++	char *p, *sep;
++
++	register_die_notifier(&nmi_debug_nb);
++	if (nmi_enable()) {
++		printk(KERN_WARNING "Unable to enable NMI.\n");
++		return 0;
++	}
++
++	if (*str != '=')
++		return 0;
++
++	for (p = str + 1; *p; p = sep + 1) {
++		sep = strchr(p, ',');
++		if (sep)
++			*sep = 0;
++		if (strcmp(p, "state") == 0)
++			nmi_actions |= NMI_SHOW_STATE;
++		else if (strcmp(p, "regs") == 0)
++			nmi_actions |= NMI_SHOW_REGS;
++		else if (strcmp(p, "debounce") == 0)
++			nmi_actions |= NMI_DEBOUNCE;
++		else if (strcmp(p, "die") == 0)
++			nmi_actions |= NMI_DIE;
++		else
++			printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
++				p);
++		if (!sep)
++			break;
++	}
++
++	return 0;
++}
++__setup("nmi_debug", nmi_debug_setup);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ocd.c linux-avr32/arch/avr32/kernel/ocd.c
+--- linux-2.6.24/arch/avr32/kernel/ocd.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ocd.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,163 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/spinlock.h>
++
++#include <asm/ocd.h>
++
++static long ocd_count;
++static spinlock_t ocd_lock;
++
++/**
++ * ocd_enable - enable on-chip debugging
++ * @child: task to be debugged
++ *
++ * If @child is non-NULL, ocd_enable() first checks if debugging has
++ * already been enabled for @child, and if it has, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging
++ * has not already been enabled for it, ocd_enable() increments the
++ * reference count and enables the debugging hardware.
++ */
++void ocd_enable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (child)
++		pr_debug("ocd_enable: child=%s [%u]\n",
++				child->comm, child->pid);
++	else
++		pr_debug("ocd_enable (no child)\n");
++
++	if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count++;
++		dc = ocd_read(DC);
++		dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
++		ocd_write(DC, dc);
++		spin_unlock(&ocd_lock);
++	}
++}
++
++/**
++ * ocd_disable - disable on-chip debugging
++ * @child: task that was being debugged, but isn't anymore
++ *
++ * If @child is non-NULL, ocd_disable() checks if debugging is enabled
++ * for @child, and if it isn't, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging is
++ * enabled, ocd_disable() decrements the reference count, and if it
++ * reaches zero, disables the debugging hardware.
++ */
++void ocd_disable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (!child)
++		pr_debug("ocd_disable (no child)\n");
++	else if (test_tsk_thread_flag(child, TIF_DEBUG))
++		pr_debug("ocd_disable: child=%s [%u]\n",
++				child->comm, child->pid);
++
++	if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count--;
++
++		WARN_ON(ocd_count < 0);
++
++		if (ocd_count <= 0) {
++			dc = ocd_read(DC);
++			dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
++			ocd_write(DC, dc);
++		}
++		spin_unlock(&ocd_lock);
++	}
++}
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/module.h>
++
++static struct dentry *ocd_debugfs_root;
++static struct dentry *ocd_debugfs_DC;
++static struct dentry *ocd_debugfs_DS;
++static struct dentry *ocd_debugfs_count;
++
++static u64 ocd_DC_get(void *data)
++{
++	return ocd_read(DC);
++}
++static void ocd_DC_set(void *data, u64 val)
++{
++	ocd_write(DC, val);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
++
++static u64 ocd_DS_get(void *data)
++{
++	return ocd_read(DS);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
++
++static u64 ocd_count_get(void *data)
++{
++	return ocd_count;
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
++
++static void ocd_debugfs_init(void)
++{
++	struct dentry *root;
++
++	root = debugfs_create_dir("ocd", NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	ocd_debugfs_root = root;
++
++	ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
++				root, NULL, &fops_DC);
++	if (!ocd_debugfs_DC)
++		goto err_DC;
++
++	ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
++				NULL, &fops_DS);
++	if (!ocd_debugfs_DS)
++		goto err_DS;
++
++	ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
++				NULL, &fops_count);
++	if (!ocd_debugfs_count)
++		goto err_count;
++
++	return;
++
++err_count:
++	debugfs_remove(ocd_debugfs_DS);
++err_DS:
++	debugfs_remove(ocd_debugfs_DC);
++err_DC:
++	debugfs_remove(ocd_debugfs_root);
++err_root:
++	printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
++}
++#else
++static inline void ocd_debugfs_init(void)
++{
++
++}
++#endif
++
++static int __init ocd_init(void)
++{
++	spin_lock_init(&ocd_lock);
++	ocd_debugfs_init();
++	return 0;
++}
++arch_initcall(ocd_init);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/process.c linux-avr32/arch/avr32/kernel/process.c
+--- linux-2.6.24/arch/avr32/kernel/process.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/process.c	2008-02-01 14:51:35.000000000 -0500
+@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread);
+  */
+ void exit_thread(void)
+ {
+-	/* nothing to do */
++	ocd_disable(current);
+ }
+ 
+ void flush_thread(void)
+@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long cl
+ 	p->thread.cpu_context.ksp = (unsigned long)childregs;
+ 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
+ 
++	if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
++		ocd_enable(p);
++
+ 	return 0;
+ }
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ptrace.c linux-avr32/arch/avr32/kernel/ptrace.c
+--- linux-2.6.24/arch/avr32/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ptrace.c	2008-02-01 14:51:35.000000000 -0500
+@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *
+ {
+ 	clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
+ 	clear_tsk_thread_flag(child, TIF_BREAKPOINT);
++	ocd_disable(child);
+ }
+ 
+ /*
+@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi
+ {
+ 	int ret;
+ 
+-	pr_debug("ptrace: Enabling monitor mode...\n");
+-	ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
+-			| (1 << OCD_DC_DBE_BIT));
+-
+ 	switch (request) {
+ 	/* Read the word at location addr in the child process */
+ 	case PTRACE_PEEKTEXT:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/setup.c linux-avr32/arch/avr32/kernel/setup.c
+--- linux-2.6.24/arch/avr32/kernel/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char
+ 			printk(KERN_WARNING
+ 			       "Failed to allocate framebuffer memory\n");
+ 			fbmem_size = 0;
++		} else {
++			memset(__va(fbmem_start), 0, fbmem_size);
+ 		}
+ 	}
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/signal.c linux-avr32/arch/avr32/kernel/signal.c
+--- linux-2.6.24/arch/avr32/kernel/signal.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/signal.c	2008-02-01 14:51:35.000000000 -0500
+@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs
+ 	if (!user_mode(regs))
+ 		return 0;
+ 
+-	if (try_to_freeze()) {
+-		signr = 0;
+-		if (!signal_pending(current))
+-			goto no_signal;
+-	}
+-
+ 	if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ 		oldset = &current->saved_sigmask;
+ 	else if (!oldset)
+ 		oldset = &current->blocked;
+ 
+ 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+-no_signal:
+ 	if (syscall) {
+ 		switch (regs->r12) {
+ 		case -ERESTART_RESTARTBLOCK:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/traps.c linux-avr32/arch/avr32/kernel/traps.c
+--- linux-2.6.24/arch/avr32/kernel/traps.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/traps.c	2008-02-01 14:51:35.000000000 -0500
+@@ -9,6 +9,7 @@
+ #include <linux/bug.h>
+ #include <linux/init.h>
+ #include <linux/kallsyms.h>
++#include <linux/kdebug.h>
+ #include <linux/module.h>
+ #include <linux/notifier.h>
+ #include <linux/sched.h>
+@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re
+ 
+ asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
+ {
+-	printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
+-	show_regs_log_lvl(regs, KERN_ALERT);
+-	show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
++	int ret;
++
++	nmi_enter();
++
++	ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
++	switch (ret) {
++	case NOTIFY_OK:
++	case NOTIFY_STOP:
++		return;
++	case NOTIFY_BAD:
++		die("Fatal Non-Maskable Interrupt", regs, SIGINT);
++	default:
++		break;
++	}
++
++	printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
++	nmi_disable();
+ }
+ 
+ asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c	1969-12-31 19:00:00.000000000 -0500
+@@ -1,1730 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000cf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-static struct resource dmaca0_resource[] = {
+-	{
+-		.start	= 0xff200000,
+-		.end	= 0xff20ffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(2),
+-};
+-DEFINE_DEV(dmaca, 0);
+-DEV_CLK(hclk, dmaca0, hsb, 10);
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-	platform_device_register(&dmaca0_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 3);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  TWI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_twi0_resource[] __initdata = {
+-	PBMEM(0xffe00800),
+-	IRQ(5),
+-};
+-static struct clk atmel_twi0_pclk = {
+-	.name		= "twi_pclk",
+-	.parent		= &pba_clk,
+-	.mode		= pba_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 2,
+-};
+-
+-struct platform_device *__init at32_add_device_twi(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_twi", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_twi0_resource,
+-				ARRAY_SIZE(atmel_twi0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
+-	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
+-
+-	atmel_twi0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * MMC
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_mci0_resource[] __initdata = {
+-	PBMEM(0xfff02400),
+-	IRQ(28),
+-};
+-static struct clk atmel_mci0_pclk = {
+-	.name		= "mci_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 9,
+-};
+-
+-struct platform_device *__init at32_add_device_mci(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_mci", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_mci0_resource,
+-				ARRAY_SIZE(atmel_mci0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
+-	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
+-	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
+-	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
+-	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
+-	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
+-
+-	atmel_mci0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USB Device Controller
+- * -------------------------------------------------------------------- */
+-static struct resource usba0_resource[] __initdata = {
+-	{
+-		.start		= 0xff300000,
+-		.end		= 0xff3fffff,
+-		.flags		= IORESOURCE_MEM,
+-	}, {
+-		.start		= 0xfff03000,
+-		.end		= 0xfff033ff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(31),
+-};
+-static struct clk usba0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 12,
+-};
+-static struct clk usba0_hclk = {
+-	.name		= "hclk",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_usba_udc", 0);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, usba0_resource,
+-					  ARRAY_SIZE(usba0_resource)))
+-		goto out_free_pdev;
+-
+-	if (data) {
+-		if (platform_device_add_data(pdev, data, sizeof(*data)))
+-			goto out_free_pdev;
+-
+-		if (data->vbus_pin != GPIO_PIN_NONE)
+-			at32_select_gpio(data->vbus_pin, 0);
+-	}
+-
+-	usba0_pclk.dev = &pdev->dev;
+-	usba0_hclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-
+-	return pdev;
+-
+-out_free_pdev:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * IDE / CompactFlash
+- * -------------------------------------------------------------------- */
+-static struct resource at32_smc_cs4_resource[] __initdata = {
+-	{
+-		.start	= 0x04000000,
+-		.end	= 0x07ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-static struct resource at32_smc_cs5_resource[] __initdata = {
+-	{
+-		.start	= 0x20000000,
+-		.end	= 0x23ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-
+-static int __init at32_init_ide_or_cf(struct platform_device *pdev,
+-		unsigned int cs, unsigned int extint)
+-{
+-	static unsigned int extint_pin_map[4] __initdata = {
+-		GPIO_PIN_PB(25),
+-		GPIO_PIN_PB(26),
+-		GPIO_PIN_PB(27),
+-		GPIO_PIN_PB(28),
+-	};
+-	static bool common_pins_initialized __initdata = false;
+-	unsigned int extint_pin;
+-	int ret;
+-
+-	if (extint >= ARRAY_SIZE(extint_pin_map))
+-		return -EINVAL;
+-	extint_pin = extint_pin_map[extint];
+-
+-	switch (cs) {
+-	case 4:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs4_resource,
+-				ARRAY_SIZE(at32_smc_cs4_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
+-		break;
+-	case 5:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs5_resource,
+-				ARRAY_SIZE(at32_smc_cs5_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-
+-	if (!common_pins_initialized) {
+-		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
+-		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
+-		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
+-		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
+-		common_pins_initialized = true;
+-	}
+-
+-	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
+-
+-	pdev->resource[1].start = EIM_IRQ_BASE + extint;
+-	pdev->resource[1].end = pdev->resource[1].start;
+-
+-	return 0;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_ide(unsigned int id, unsigned int extint,
+-		    struct ide_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_ide", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct ide_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_cf(unsigned int id, unsigned int extint,
+-		    struct cf_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_cf", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct cf_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	if (data->detect_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
+-	if (data->reset_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->reset_pin, 0);
+-	if (data->vcc_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->vcc_pin, 0);
+-	/* READY is used as extint, so we can't select it as gpio */
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * AC97C
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_ac97c0_resource[] __initdata = {
+-	PBMEM(0xfff02800),
+-	IRQ(29),
+-};
+-static struct clk atmel_ac97c0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 10,
+-};
+-
+-struct platform_device *__init at32_add_device_ac97c(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_ac97c", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
+-				ARRAY_SIZE(atmel_ac97c0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
+-	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
+-	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
+-	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
+-
+-	atmel_ac97c0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * ABDAC
+- * -------------------------------------------------------------------- */
+-static struct resource abdac0_resource[] __initdata = {
+-	PBMEM(0xfff02000),
+-	IRQ(27),
+-};
+-static struct clk abdac0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 8,
+-};
+-static struct clk abdac0_sample_clk = {
+-	.name		= "sample_clk",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init at32_add_device_abdac(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("abdac", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, abdac0_resource,
+-				ARRAY_SIZE(abdac0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
+-	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
+-	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
+-	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
+-
+-	abdac0_pclk.dev = &pdev->dev;
+-	abdac0_sample_clk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&dmaca0_hclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_twi0_pclk,
+-	&atmel_mci0_pclk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&usba0_hclk,
+-	&usba0_pclk,
+-	&atmel_ac97c0_pclk,
+-	&abdac0_pclk,
+-	&abdac0_sample_clk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-	genclk_init_parent(&abdac0_sample_clk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1809 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 3);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  PWM
++ * -------------------------------------------------------------------- */
++static struct resource atmel_pwm0_resource[] __initdata = {
++	PBMEM(0xfff01400),
++	IRQ(24),
++};
++static struct clk atmel_pwm0_mck = {
++	.name		= "mck",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 5,
++};
++
++struct platform_device *__init at32_add_device_pwm(u32 mask)
++{
++	struct platform_device *pdev;
++
++	if (!mask)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_pwm", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_pwm0_resource,
++				ARRAY_SIZE(atmel_pwm0_resource)))
++		goto out_free_pdev;
++
++	if (platform_device_add_data(pdev, &mask, sizeof(mask)))
++		goto out_free_pdev;
++
++	if (mask & (1 << 0))
++		select_peripheral(PA(28), PERIPH_A, 0);
++	if (mask & (1 << 1))
++		select_peripheral(PA(29), PERIPH_A, 0);
++	if (mask & (1 << 2))
++		select_peripheral(PA(21), PERIPH_B, 0);
++	if (mask & (1 << 3))
++		select_peripheral(PA(22), PERIPH_B, 0);
++
++	atmel_pwm0_mck.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++	&atmel_pwm0_mck,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/extint.c linux-avr32/arch/avr32/mach-at32ap/extint.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/extint.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/extint.c	2008-02-01 14:51:35.000000000 -0500
+@@ -26,16 +26,10 @@
+ #define EIC_MODE				0x0014
+ #define EIC_EDGE				0x0018
+ #define EIC_LEVEL				0x001c
+-#define EIC_TEST				0x0020
+ #define EIC_NMIC				0x0024
+ 
+-/* Bitfields in TEST */
+-#define EIC_TESTEN_OFFSET			31
+-#define EIC_TESTEN_SIZE				1
+-
+ /* Bitfields in NMIC */
+-#define EIC_EN_OFFSET				0
+-#define EIC_EN_SIZE				1
++#define EIC_NMIC_ENABLE				(1 << 0)
+ 
+ /* Bit manipulation macros */
+ #define EIC_BIT(name)					\
+@@ -63,6 +57,9 @@ struct eic {
+ 	unsigned int first_irq;
+ };
+ 
++static struct eic *nmi_eic;
++static bool nmi_enabled;
++
+ static void eic_ack_irq(unsigned int irq)
+ {
+ 	struct eic *eic = get_irq_chip_data(irq);
+@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int
+ 		eic_writel(eic, EDGE, edge);
+ 		eic_writel(eic, LEVEL, level);
+ 
+-		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
+ 			flow_type |= IRQ_LEVEL;
++			__set_irq_handler_unlocked(irq, handle_level_irq);
++		} else
++			__set_irq_handler_unlocked(irq, handle_edge_irq);
+ 		desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ 		desc->status |= flow_type;
+ 	}
+@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = {
+ static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
+ {
+ 	struct eic *eic = desc->handler_data;
+-	struct irq_desc *ext_desc;
+ 	unsigned long status, pending;
+-	unsigned int i, ext_irq;
++	unsigned int i;
+ 
+ 	status = eic_readl(eic, ISR);
+ 	pending = status & eic_readl(eic, IMR);
+@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i
+ 		i = fls(pending) - 1;
+ 		pending &= ~(1 << i);
+ 
+-		ext_irq = i + eic->first_irq;
+-		ext_desc = irq_desc + ext_irq;
+-		if (ext_desc->status & IRQ_LEVEL)
+-			handle_level_irq(ext_irq, ext_desc);
+-		else
+-			handle_edge_irq(ext_irq, ext_desc);
++		generic_handle_irq(i + eic->first_irq);
+ 	}
+ }
+ 
++int nmi_enable(void)
++{
++	nmi_enabled = true;
++
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
++
++	return 0;
++}
++
++void nmi_disable(void)
++{
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, 0);
++
++	nmi_enabled = false;
++}
++
+ static int __init eic_probe(struct platform_device *pdev)
+ {
+ 	struct eic *eic;
+@@ -214,14 +226,13 @@ static int __init eic_probe(struct platf
+ 	pattern = eic_readl(eic, MODE);
+ 	nr_irqs = fls(pattern);
+ 
+-	/* Trigger on falling edge unless overridden by driver */
+-	eic_writel(eic, MODE, 0UL);
++	/* Trigger on low level unless overridden by driver */
+ 	eic_writel(eic, EDGE, 0UL);
++	eic_writel(eic, LEVEL, 0UL);
+ 
+ 	eic->chip = &eic_chip;
+ 
+ 	for (i = 0; i < nr_irqs; i++) {
+-		/* NOTE the handler we set here is ignored by the demux */
+ 		set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
+ 					 handle_level_irq);
+ 		set_irq_chip_data(eic->first_irq + i, eic);
+@@ -230,6 +241,16 @@ static int __init eic_probe(struct platf
+ 	set_irq_chained_handler(int_irq, demux_eic_irq);
+ 	set_irq_data(int_irq, eic);
+ 
++	if (pdev->id == 0) {
++		nmi_eic = eic;
++		if (nmi_enabled)
++			/*
++			 * Someone tried to enable NMI before we were
++			 * ready. Do it now.
++			 */
++			nmi_enable();
++	}
++
+ 	dev_info(&pdev->dev,
+ 		 "External Interrupt Controller at 0x%p, IRQ %u\n",
+ 		 eic->regs, int_irq);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Kconfig linux-avr32/arch/avr32/mach-at32ap/Kconfig
+--- linux-2.6.24/arch/avr32/mach-at32ap/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Makefile linux-avr32/arch/avr32/mach-at32ap/Makefile
+--- linux-2.6.24/arch/avr32/mach-at32ap/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/pio.c linux-avr32/arch/avr32/mach-at32ap/pio.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/pio.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/pio.c	2008-02-01 14:51:35.000000000 -0500
+@@ -162,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff -Nrup linux-2.6.24/arch/avr32/Makefile linux-avr32/arch/avr32/Makefile
+--- linux-2.6.24/arch/avr32/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -16,7 +16,7 @@ KBUILD_AFLAGS	+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ KBUILD_CFLAGS	+= $(cpuflags-y)
+ KBUILD_AFLAGS	+= $(cpuflags-y)
+@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/a
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-$(CONFIG_OPROFILE)		+= arch/avr32/oprofile/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff -Nrup linux-2.6.24/arch/avr32/mm/dma-coherent.c linux-avr32/arch/avr32/mm/dma-coherent.c
+--- linux-2.6.24/arch/avr32/mm/dma-coherent.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/dma-coherent.c	2008-02-01 14:51:35.000000000 -0500
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff -Nrup linux-2.6.24/arch/avr32/mm/tlb.c linux-avr32/arch/avr32/mm/tlb.c
+--- linux-2.6.24/arch/avr32/mm/tlb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/tlb.c	2008-02-01 14:51:35.000000000 -0500
+@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb
+ 	return 0;
+ }
+ 
+-static struct seq_operations tlb_ops = {
++static const struct seq_operations tlb_ops = {
+ 	.start		= tlb_start,
+ 	.next		= tlb_next,
+ 	.stop		= tlb_stop,
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/Makefile linux-avr32/arch/avr32/oprofile/Makefile
+--- linux-2.6.24/arch/avr32/oprofile/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,8 @@
++obj-$(CONFIG_OPROFILE) += oprofile.o
++
++oprofile-y		:= $(addprefix ../../../drivers/oprofile/,	\
++				oprof.o cpu_buffer.o buffer_sync.o	\
++				event_buffer.o oprofile_files.o		\
++				oprofilefs.o oprofile_stats.o		\
++				timer_int.o)
++oprofile-y		+= op_model_avr32.o
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c linux-avr32/arch/avr32/oprofile/op_model_avr32.c
+--- linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/op_model_avr32.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,235 @@
++/*
++ * AVR32 Performance Counter Driver
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/oprofile.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++
++#include <asm/intc.h>
++#include <asm/sysreg.h>
++#include <asm/system.h>
++
++#define AVR32_PERFCTR_IRQ_GROUP	0
++#define AVR32_PERFCTR_IRQ_LINE	1
++
++enum { PCCNT, PCNT0, PCNT1, NR_counter };
++
++struct avr32_perf_counter {
++	unsigned long	enabled;
++	unsigned long	event;
++	unsigned long	count;
++	unsigned long	unit_mask;
++	unsigned long	kernel;
++	unsigned long	user;
++
++	u32		ie_mask;
++	u32		flag_mask;
++};
++
++static struct avr32_perf_counter counter[NR_counter] = {
++	{
++		.ie_mask	= SYSREG_BIT(IEC),
++		.flag_mask	= SYSREG_BIT(FC),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE0),
++		.flag_mask	= SYSREG_BIT(F0),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE1),
++		.flag_mask	= SYSREG_BIT(F1),
++	},
++};
++
++static void avr32_perf_counter_reset(void)
++{
++	/* Reset all counter and disable/clear all interrupts */
++	sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
++				| SYSREG_BIT(PCCR_C)
++				| SYSREG_BIT(FC)
++				| SYSREG_BIT(F0)
++				| SYSREG_BIT(F1)));
++}
++
++static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
++{
++	struct avr32_perf_counter *ctr = dev_id;
++	struct pt_regs *regs;
++	u32 pccr;
++
++	if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
++					& (1 << AVR32_PERFCTR_IRQ_LINE))))
++		return IRQ_NONE;
++
++	regs = get_irq_regs();
++	pccr = sysreg_read(PCCR);
++
++	/* Clear the interrupt flags we're about to handle */
++	sysreg_write(PCCR, pccr);
++
++	/* PCCNT */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCCNT, -ctr->count);
++		oprofile_add_sample(regs, PCCNT);
++	}
++	ctr++;
++	/* PCNT0 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT0, -ctr->count);
++		oprofile_add_sample(regs, PCNT0);
++	}
++	ctr++;
++	/* PCNT1 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT1, -ctr->count);
++		oprofile_add_sample(regs, PCNT1);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int avr32_perf_counter_create_files(struct super_block *sb,
++		struct dentry *root)
++{
++	struct dentry *dir;
++	unsigned int i;
++	char filename[4];
++
++	for (i = 0; i < NR_counter; i++) {
++		snprintf(filename, sizeof(filename), "%u", i);
++		dir = oprofilefs_mkdir(sb, root, filename);
++
++		oprofilefs_create_ulong(sb, dir, "enabled",
++				&counter[i].enabled);
++		oprofilefs_create_ulong(sb, dir, "event",
++				&counter[i].event);
++		oprofilefs_create_ulong(sb, dir, "count",
++				&counter[i].count);
++
++		/* Dummy entries */
++		oprofilefs_create_ulong(sb, dir, "kernel",
++				&counter[i].kernel);
++		oprofilefs_create_ulong(sb, dir, "user",
++				&counter[i].user);
++		oprofilefs_create_ulong(sb, dir, "unit_mask",
++				&counter[i].unit_mask);
++	}
++
++	return 0;
++}
++
++static int avr32_perf_counter_setup(void)
++{
++	struct avr32_perf_counter *ctr;
++	u32 pccr;
++	int ret;
++	int i;
++
++	pr_debug("avr32_perf_counter_setup\n");
++
++	if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
++		printk(KERN_ERR
++			"oprofile: setup: perf counter already enabled\n");
++		return -EBUSY;
++	}
++
++	ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
++			avr32_perf_counter_interrupt, IRQF_SHARED,
++			"oprofile", counter);
++	if (ret)
++		return ret;
++
++	avr32_perf_counter_reset();
++
++	pccr = 0;
++	for (i = PCCNT; i < NR_counter; i++) {
++		ctr = &counter[i];
++		if (!ctr->enabled)
++			continue;
++
++		pr_debug("enabling counter %d...\n", i);
++
++		pccr |= ctr->ie_mask;
++
++		switch (i) {
++		case PCCNT:
++			/* PCCNT always counts cycles, so no events */
++			sysreg_write(PCCNT, -ctr->count);
++			break;
++		case PCNT0:
++			pccr |= SYSREG_BF(CONF0, ctr->event);
++			sysreg_write(PCNT0, -ctr->count);
++			break;
++		case PCNT1:
++			pccr |= SYSREG_BF(CONF1, ctr->event);
++			sysreg_write(PCNT1, -ctr->count);
++			break;
++		}
++	}
++
++	pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
++
++	sysreg_write(PCCR, pccr);
++
++	return 0;
++}
++
++static void avr32_perf_counter_shutdown(void)
++{
++	pr_debug("avr32_perf_counter_shutdown\n");
++
++	avr32_perf_counter_reset();
++	free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
++}
++
++static int avr32_perf_counter_start(void)
++{
++	pr_debug("avr32_perf_counter_start\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
++
++	return 0;
++}
++
++static void avr32_perf_counter_stop(void)
++{
++	pr_debug("avr32_perf_counter_stop\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
++}
++
++static struct oprofile_operations avr32_perf_counter_ops __initdata = {
++	.create_files	= avr32_perf_counter_create_files,
++	.setup		= avr32_perf_counter_setup,
++	.shutdown	= avr32_perf_counter_shutdown,
++	.start		= avr32_perf_counter_start,
++	.stop		= avr32_perf_counter_stop,
++	.cpu_type	= "avr32",
++};
++
++int __init oprofile_arch_init(struct oprofile_operations *ops)
++{
++	if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
++		return -ENODEV;
++
++	memcpy(ops, &avr32_perf_counter_ops,
++			sizeof(struct oprofile_operations));
++
++	printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
++
++	return 0;
++}
++
++void oprofile_arch_exit(void)
++{
++
++}
+diff -Nrup linux-2.6.24/Documentation/kernel-parameters.txt linux-avr32/Documentation/kernel-parameters.txt
+--- linux-2.6.24/Documentation/kernel-parameters.txt	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/Documentation/kernel-parameters.txt	2008-02-01 14:51:34.000000000 -0500
+@@ -34,6 +34,7 @@ parameter is applicable:
+ 	ALSA	ALSA sound support is enabled.
+ 	APIC	APIC support is enabled.
+ 	APM	Advanced Power Management support is enabled.
++	AVR32	AVR32 architecture is enabled.
+ 	AX25	Appropriate AX.25 support is enabled.
+ 	BLACKFIN Blackfin architecture is enabled.
+ 	DRM	Direct Rendering Management support is enabled.
+@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. 
+ 			of returning the full 64-bit number.
+ 			The default is to return 64-bit inode numbers.
+ 
++	nmi_debug=	[KNL,AVR32] Specify one or more actions to take
++			when a NMI is triggered.
++			Format: [state][,regs][,debounce][,die]
++
+ 	nmi_watchdog=	[KNL,BUGS=X86-32] Debugging features for SMP kernels
+ 
+ 	no387		[BUGS=X86-32] Tells the kernel to use the 387 maths
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "twi_pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Kconfig linux-avr32/drivers/i2c/busses/Kconfig
+--- linux-2.6.24/drivers/i2c/busses/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Kconfig	2008-02-01 14:51:37.000000000 -0500
+@@ -88,6 +88,14 @@ config I2C_AT91
+ 	  to support combined I2C messages.  Use the i2c-gpio driver
+ 	  unless your system can cope with those limitations.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Makefile linux-avr32/drivers/i2c/busses/Makefile
+--- linux-2.6.24/drivers/i2c/busses/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Makefile	2008-02-01 14:51:37.000000000 -0500
+@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff -Nrup linux-2.6.24/drivers/leds/Kconfig linux-avr32/drivers/leds/Kconfig
+--- linux-2.6.24/drivers/leds/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Kconfig	2008-02-01 14:51:38.000000000 -0500
+@@ -18,6 +18,13 @@ config LEDS_CLASS
+ 
+ comment "LED drivers"
+ 
++config LEDS_ATMEL_PWM
++	tristate "LED Support using Atmel PWM outputs"
++	depends on LEDS_CLASS && ATMEL_PWM
++	help
++	  This option enables support for LEDs driven using outputs
++	  of the dedicated PWM controller found on newer Atmel SOCs.
++
+ config LEDS_CORGI
+ 	tristate "LED Support for the Sharp SL-C7x0 series"
+ 	depends on LEDS_CLASS && PXA_SHARP_C7xx
+diff -Nrup linux-2.6.24/drivers/leds/leds-atmel-pwm.c linux-avr32/drivers/leds/leds-atmel-pwm.c
+--- linux-2.6.24/drivers/leds/leds-atmel-pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/leds/leds-atmel-pwm.c	2008-02-01 14:51:38.000000000 -0500
+@@ -0,0 +1,157 @@
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++#include <linux/io.h>
++#include <linux/atmel_pwm.h>
++
++
++struct pwmled {
++	struct led_classdev	cdev;
++	struct pwm_channel	pwmc;
++	struct gpio_led		*desc;
++	u32			mult;
++	u8			active_low;
++};
++
++
++/*
++ * For simplicity, we use "brightness" as if it were a linear function
++ * of PWM duty cycle.  However, a logarithmic function of duty cycle is
++ * probably a better match for perceived brightness: two is half as bright
++ * as four, four is half as bright as eight, etc
++ */
++static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
++{
++	struct pwmled		 *led;
++
++	/* update the duty cycle for the *next* period */
++	led = container_of(cdev, struct pwmled, cdev);
++	pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
++}
++
++/*
++ * NOTE:  we reuse the platform_data structure of GPIO leds,
++ * but repurpose its "gpio" number as a PWM channel number.
++ */
++static int __init pwmled_probe(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++	int					status;
++
++	pdata = pdev->dev.platform_data;
++	if (!pdata || pdata->num_leds < 1)
++		return -ENODEV;
++
++	leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
++	if (!leds)
++		return -ENOMEM;
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++		const struct gpio_led	*dat = pdata->leds + i;
++		u32			tmp;
++
++		led->cdev.name = dat->name;
++		led->cdev.brightness = LED_OFF;
++		led->cdev.brightness_set = pwmled_brightness;
++		led->cdev.default_trigger = dat->default_trigger;
++
++		led->active_low = dat->active_low;
++
++		status = pwm_channel_alloc(dat->gpio, &led->pwmc);
++		if (status < 0)
++			goto err;
++
++		/*
++		 * Prescale clock by 2^x, so PWM counts in low MHz.
++		 * Start each cycle with the LED active, so increasing
++		 * the duty cycle gives us more time on (== brighter).
++		 */
++		tmp = 5;
++		if (!led->active_low)
++			tmp |= PWM_CPR_CPOL;
++		pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
++
++		/*
++		 * Pick a period so PWM cycles at 100+ Hz; and a multiplier
++		 * for scaling duty cycle:  brightness * mult.
++		 */
++		tmp = (led->pwmc.mck / (1 << 5)) / 100;
++		tmp /= 255;
++		led->mult = tmp;
++		pwm_channel_writel(&led->pwmc, PWM_CDTY,
++				led->cdev.brightness * 255);
++		pwm_channel_writel(&led->pwmc, PWM_CPRD,
++				LED_FULL * tmp);
++
++		pwm_channel_enable(&led->pwmc);
++
++		/* Hand it over to the LED framework */
++		status = led_classdev_register(&pdev->dev, &led->cdev);
++		if (status < 0) {
++			pwm_channel_free(&led->pwmc);
++			goto err;
++		}
++	}
++
++	platform_set_drvdata(pdev, leds);
++	return 0;
++
++err:
++	if (i > 0) {
++		for (i = i - 1; i >= 0; i--) {
++			led_classdev_unregister(&leds[i].cdev);
++			pwm_channel_free(&leds[i].pwmc);
++		}
++	}
++	kfree(leds);
++
++	return status;
++}
++
++static int __exit pwmled_remove(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++
++	pdata = pdev->dev.platform_data;
++	leds = platform_get_drvdata(pdev);
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++
++		led_classdev_unregister(&led->cdev);
++		pwm_channel_free(&led->pwmc);
++	}
++
++	kfree(leds);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver pwmled_driver = {
++	.driver = {
++		.name =		"leds-atmel-pwm",
++		.owner =	THIS_MODULE,
++	},
++	/* REVISIT add suspend() and resume() methods */
++	.remove =	__exit_p(pwmled_remove),
++};
++
++static int __init modinit(void)
++{
++	return platform_driver_probe(&pwmled_driver, pwmled_probe);
++}
++module_init(modinit);
++
++static void __exit modexit(void)
++{
++	platform_driver_unregister(&pwmled_driver);
++}
++module_exit(modexit);
++
++MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/leds/Makefile linux-avr32/drivers/leds/Makefile
+--- linux-2.6.24/drivers/leds/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Makefile	2008-02-01 14:51:38.000000000 -0500
+@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS)		+= led-class.o
+ obj-$(CONFIG_LEDS_TRIGGERS)		+= led-triggers.o
+ 
+ # LED Platform Drivers
++obj-$(CONFIG_LEDS_ATMEL_PWM)		+= leds-atmel-pwm.o
+ obj-$(CONFIG_LEDS_CORGI)		+= leds-corgi.o
+ obj-$(CONFIG_LEDS_LOCOMO)		+= leds-locomo.o
+ obj-$(CONFIG_LEDS_SPITZ)		+= leds-spitz.o
+diff -Nrup linux-2.6.24/drivers/misc/atmel_pwm.c linux-avr32/drivers/misc/atmel_pwm.c
+--- linux-2.6.24/drivers/misc/atmel_pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/misc/atmel_pwm.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,409 @@
++#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/atmel_pwm.h>
++
++
++/*
++ * This is a simple driver for the PWM controller found in various newer
++ * Atmel SOCs, including the AVR32 series and the AT91sam9263.
++ *
++ * Chips with current Linux ports have only 4 PWM channels, out of max 32.
++ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
++ * Docs are inconsistent about the width of the channel counter registers;
++ * it's at least 16 bits, but several places say 20 bits.
++ */
++#define	PWM_NCHAN	4		/* max 32 */
++
++struct pwm {
++	spinlock_t		lock;
++	struct platform_device	*pdev;
++	u32			mask;
++	int			irq;
++	void __iomem		*base;
++	struct clk		*clk;
++	struct pwm_channel	*channel[PWM_NCHAN];
++	void			(*handler[PWM_NCHAN])(struct pwm_channel *);
++};
++
++
++/* global PWM controller registers */
++#define PWM_MR		0x00
++#define PWM_ENA		0x04
++#define PWM_DIS		0x08
++#define PWM_SR		0x0c
++#define PWM_IER		0x10
++#define PWM_IDR		0x14
++#define PWM_IMR		0x18
++#define PWM_ISR		0x1c
++
++static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
++{
++	__raw_writel(val, p->base + offset);
++}
++
++static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
++{
++	return __raw_readl(p->base + offset);
++}
++
++static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
++{
++	return p->base + 0x200 + index * 0x20;
++}
++
++static struct pwm *pwm;
++
++static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
++{
++	struct device	*dev = &pwm->pdev->dev;
++
++	dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
++		tag,
++		pwm_readl(pwm, PWM_MR),
++		pwm_readl(pwm, PWM_SR),
++		pwm_readl(pwm, PWM_IMR));
++	dev_dbg(dev,
++		"pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
++		ch->index,
++		pwm_channel_readl(ch, PWM_CMR),
++		pwm_channel_readl(ch, PWM_CDTY),
++		pwm_channel_readl(ch, PWM_CPRD),
++		pwm_channel_readl(ch, PWM_CCNT));
++}
++
++
++/**
++ * pwm_channel_alloc - allocate an unused PWM channel
++ * @index: identifies the channel
++ * @ch: structure to be initialized
++ *
++ * Drivers allocate PWM channels according to the board's wiring, and
++ * matching board-specific setup code.  Returns zero or negative errno.
++ */
++int pwm_channel_alloc(int index, struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		status = 0;
++
++	/* insist on PWM init, with this signal pinned out */
++	if (!pwm || !(pwm->mask & 1 << index))
++		return -ENODEV;
++
++	if (index < 0 || index >= PWM_NCHAN || !ch)
++		return -EINVAL;
++	memset(ch, 0, sizeof *ch);
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	if (pwm->channel[index])
++		status = -EBUSY;
++	else {
++		clk_enable(pwm->clk);
++
++		ch->regs = pwmc_regs(pwm, index);
++		ch->index = index;
++
++		/* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
++		ch->mck = clk_get_rate(pwm->clk);
++
++		pwm->channel[index] = ch;
++		pwm->handler[index] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << index);
++		pwm_writel(pwm, PWM_IDR, 1 << index);
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return status;
++}
++EXPORT_SYMBOL(pwm_channel_alloc);
++
++static int pwmcheck(struct pwm_channel *ch)
++{
++	int		index;
++
++	if (!pwm)
++		return -ENODEV;
++	if (!ch)
++		return -EINVAL;
++	index = ch->index;
++	if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
++		return -EINVAL;
++
++	return index;
++}
++
++/**
++ * pwm_channel_free - release a previously allocated channel
++ * @ch: the channel being released
++ *
++ * The channel is completely shut down (counter and IRQ disabled),
++ * and made available for re-use.  Returns zero, or negative errno.
++ */
++int pwm_channel_free(struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->channel[t] = NULL;
++		pwm->handler[t] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << t);
++		pwm_writel(pwm, PWM_IDR, 1 << t);
++
++		clk_disable(pwm->clk);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_free);
++
++int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
++{
++	unsigned long	flags;
++	int		t;
++
++	/* OMITTED FUNCTIONALITY:  starting several channels in synch */
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
++		t = 0;
++		pwm_dumpregs(ch, enabled ? "enable" : "disable");
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(__pwm_channel_onoff);
++
++/**
++ * pwm_clk_alloc - allocate and configure CLKA or CLKB
++ * @prescale: from 0..10, the power of two used to divide MCK
++ * @div: from 1..255, the linear divisor to use
++ *
++ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno.  The allocated
++ * clock will run with a period of (2^prescale * div) / MCK, or twice as
++ * long if center aligned PWM output is used.  The clock must later be
++ * deconfigured using pwm_clk_free().
++ */
++int pwm_clk_alloc(unsigned prescale, unsigned div)
++{
++	unsigned long	flags;
++	u32		mr;
++	u32		val = (prescale << 8) | div;
++	int		ret = -EBUSY;
++
++	if (prescale >= 10 || div == 0 || div > 255)
++		return -EINVAL;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if ((mr & 0xffff) == 0) {
++		mr |= val;
++		ret = PWM_CPR_CLKA;
++	}
++	if ((mr & (0xffff << 16)) == 0) {
++		mr |= val << 16;
++		ret = PWM_CPR_CLKB;
++	}
++	if (ret > 0)
++		pwm_writel(pwm, PWM_MR, mr);
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return ret;
++}
++EXPORT_SYMBOL(pwm_clk_alloc);
++
++/**
++ * pwm_clk_free - deconfigure and release CLKA or CLKB
++ *
++ * Reverses the effect of pwm_clk_alloc().
++ */
++void pwm_clk_free(unsigned clk)
++{
++	unsigned long	flags;
++	u32		mr;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if (clk == PWM_CPR_CLKA)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
++	if (clk == PWM_CPR_CLKB)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
++	spin_unlock_irqrestore(&pwm->lock, flags);
++}
++EXPORT_SYMBOL(pwm_clk_free);
++
++/**
++ * pwm_channel_handler - manage channel's IRQ handler
++ * @ch: the channel
++ * @handler: the handler to use, possibly NULL
++ *
++ * If the handler is non-null, the handler will be called after every
++ * period of this PWM channel.  If the handler is null, this channel
++ * won't generate an IRQ.
++ */
++int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch))
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->handler[t] = handler;
++		pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_handler);
++
++static irqreturn_t pwm_irq(int id, void *_pwm)
++{
++	struct pwm	*p = _pwm;
++	irqreturn_t	handled = IRQ_NONE;
++	u32		irqstat;
++	int		index;
++
++	spin_lock(&p->lock);
++
++	/* ack irqs, then handle them */
++	irqstat = pwm_readl(pwm, PWM_ISR);
++
++	while (irqstat) {
++		struct pwm_channel *ch;
++		void (*handler)(struct pwm_channel *ch);
++
++		index = ffs(irqstat) - 1;
++		irqstat &= ~(1 << index);
++		ch = pwm->channel[index];
++		handler = pwm->handler[index];
++		if (handler && ch) {
++			spin_unlock(&p->lock);
++			handler(ch);
++			spin_lock(&p->lock);
++			handled = IRQ_HANDLED;
++		}
++	}
++
++	spin_unlock(&p->lock);
++	return handled;
++}
++
++static int __init pwm_probe(struct platform_device *pdev)
++{
++	struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	int irq = platform_get_irq(pdev, 0);
++	u32 *mp = pdev->dev.platform_data;
++	struct pwm *p;
++	int status = -EIO;
++
++	if (pwm)
++		return -EBUSY;
++	if (!r || irq < 0 || !mp || !*mp)
++		return -ENODEV;
++	if (*mp & ~((1<<PWM_NCHAN)-1)) {
++		dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
++			*mp, PWM_NCHAN);
++		return -EINVAL;
++	}
++
++	p = kzalloc(sizeof(*p), GFP_KERNEL);
++	if (!p)
++		return -ENOMEM;
++
++	spin_lock_init(&p->lock);
++	p->pdev = pdev;
++	p->mask = *mp;
++	p->irq = irq;
++	p->base = ioremap(r->start, r->end - r->start + 1);
++	if (!p->base)
++		goto fail;
++	p->clk = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(p->clk)) {
++		status = PTR_ERR(p->clk);
++		p->clk = NULL;
++		goto fail;
++	}
++
++	status = request_irq(irq, pwm_irq, 0, pdev->name, p);
++	if (status < 0)
++		goto fail;
++
++	pwm = p;
++	platform_set_drvdata(pdev, p);
++
++	return 0;
++
++fail:
++	if (p->clk)
++		clk_put(p->clk);
++	if (p->base)
++		iounmap(p->base);
++
++	kfree(p);
++	return status;
++}
++
++static int __exit pwm_remove(struct platform_device *pdev)
++{
++	struct pwm *p = platform_get_drvdata(pdev);
++
++	if (p != pwm)
++		return -EINVAL;
++
++	clk_enable(pwm->clk);
++	pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
++	pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
++	clk_disable(pwm->clk);
++
++	pwm = NULL;
++
++	free_irq(p->irq, p);
++	clk_put(p->clk);
++	iounmap(p->base);
++	kfree(p);
++
++	return 0;
++}
++
++static struct platform_driver atmel_pwm_driver = {
++	.driver = {
++		.name = "atmel_pwm",
++		.owner = THIS_MODULE,
++	},
++	.remove = __exit_p(pwm_remove),
++
++	/* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
++	 * and all AT91sam9263 states, albeit at reduced clock rate if
++	 * MCK becomes the slow clock (i.e. what Linux labels STR).
++	 */
++};
++
++static int __init pwm_init(void)
++{
++	return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
++}
++module_init(pwm_init);
++
++static void __exit pwm_exit(void)
++{
++	platform_driver_unregister(&atmel_pwm_driver);
++}
++module_exit(pwm_exit);
++
++MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/misc/Kconfig linux-avr32/drivers/misc/Kconfig
+--- linux-2.6.24/drivers/misc/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES
+ 
+ if MISC_DEVICES
+ 
++config ATMEL_PWM
++	tristate "Atmel AT32/AT91 PWM support"
++	depends on (AVR32 || AT91) && EXPERIMENTAL
++	help
++	  This option enables device driver support for the PWM channels
++	  on certain Atmel prcoessors.  Pulse Width Modulation is used for
++	  purposes including software controlled power-efficent backlights
++	  on LCD displays, motor control, and waveform generation.
++
+ config IBM_ASM
+ 	tristate "Device driver for IBM RSA service processor"
+ 	depends on X86 && PCI && INPUT && EXPERIMENTAL
+diff -Nrup linux-2.6.24/drivers/misc/Makefile linux-avr32/drivers/misc/Makefile
+--- linux-2.6.24/drivers/misc/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM)		+= ibmasm/
+ obj-$(CONFIG_HDPU_FEATURES)	+= hdpuftrs/
+ obj-$(CONFIG_MSI_LAPTOP)     += msi-laptop.o
+ obj-$(CONFIG_ASUS_LAPTOP)     += asus-laptop.o
++obj-$(CONFIG_ATMEL_PWM)		+= atmel_pwm.o
+ obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+ obj-$(CONFIG_LKDTM)		+= lkdtm.o
+ obj-$(CONFIG_TIFM_CORE)       	+= tifm_core.o
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.c linux-avr32/drivers/mmc/host/atmel-mci.c
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = 0;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = -ETIMEDOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = -EILSEQ;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = -EIO;
++
++	if (cmd->error) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = -EIO;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = -EILSEQ;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = -ETIMEDOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = -EIO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ETIMEDOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ETIMEDOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ETIMEDOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.h linux-avr32/drivers/mmc/host/atmel-mci.h
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.h	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff -Nrup linux-2.6.24/drivers/mmc/host/Kconfig linux-avr32/drivers/mmc/host/Kconfig
+--- linux-2.6.24/drivers/mmc/host/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -91,6 +91,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff -Nrup linux-2.6.24/drivers/mmc/host/Makefile linux-avr32/drivers/mmc/host/Makefile
+--- linux-2.6.24/drivers/mmc/host/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ obj-$(CONFIG_MMC_SPI)		+= mmc_spi.o
+ 
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c	2008-02-01 14:51:39.000000000 -0500
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c	2008-02-01 14:51:39.000000000 -0500
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(stru
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct 
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff -Nrup linux-2.6.24/drivers/pcmcia/at32_cf.c linux-avr32/drivers/pcmcia/at32_cf.c
+--- linux-2.6.24/drivers/pcmcia/at32_cf.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/pcmcia/at32_cf.c	2008-02-01 14:51:42.000000000 -0500
+@@ -0,0 +1,533 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin != GPIO_PIN_NONE)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin != GPIO_PIN_NONE)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin != GPIO_PIN_NONE)
++		cf->vcc_pin = request_pin(pdev, board->vcc_pin,
++					  "cf_vcc");
++	if (board->ready_pin != GPIO_PIN_NONE)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	cf->present = at32_cf_present(cf);
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff -Nrup linux-2.6.24/drivers/pcmcia/Kconfig linux-avr32/drivers/pcmcia/Kconfig
+--- linux-2.6.24/drivers/pcmcia/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Kconfig	2008-02-01 14:51:42.000000000 -0500
+@@ -276,6 +276,13 @@ config ELECTRA_CF
+ 	  Say Y here to support the CompactFlash controller on the
+ 	  PA Semi Electra eval board.
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff -Nrup linux-2.6.24/drivers/pcmcia/Makefile linux-avr32/drivers/pcmcia/Makefile
+--- linux-2.6.24/drivers/pcmcia/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Makefile	2008-02-01 14:51:42.000000000 -0500
+@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc417
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
+ obj-$(CONFIG_ELECTRA_CF)			+= electra_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff -Nrup linux-2.6.24/drivers/spi/atmel_spi.c linux-avr32/drivers/spi/atmel_spi.c
+--- linux-2.6.24/drivers/spi/atmel_spi.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/spi/atmel_spi.c	2008-02-01 14:51:43.000000000 -0500
+@@ -51,7 +51,9 @@ struct atmel_spi {
+ 	u8			stopping;
+ 	struct list_head	queue;
+ 	struct spi_transfer	*current_transfer;
+-	unsigned long		remaining_bytes;
++	unsigned long		current_remaining_bytes;
++	struct spi_transfer	*next_transfer;
++	unsigned long		next_remaining_bytes;
+ 
+ 	void			*buffer;
+ 	dma_addr_t		buffer_dma;
+@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_s
+ 		gpio_set_value(gpio, !active);
+ }
+ 
++static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
++					struct spi_transfer *xfer)
++{
++	return msg->transfers.prev == &xfer->transfer_list;
++}
++
++static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
++{
++	return xfer->delay_usecs == 0 && !xfer->cs_change;
++}
++
++static void atmel_spi_next_xfer_data(struct spi_master *master,
++				struct spi_transfer *xfer,
++				dma_addr_t *tx_dma,
++				dma_addr_t *rx_dma,
++				u32 *plen)
++{
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	u32			len = *plen;
++
++	/* use scratch buffer only when rx or tx data is unspecified */
++	if (xfer->rx_buf)
++		*rx_dma = xfer->rx_dma + xfer->len - len;
++	else {
++		*rx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++	}
++	if (xfer->tx_buf)
++		*tx_dma = xfer->tx_dma + xfer->len - len;
++	else {
++		*tx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++		memset(as->buffer, 0, len);
++		dma_sync_single_for_device(&as->pdev->dev,
++				as->buffer_dma, len, DMA_TO_DEVICE);
++	}
++
++	*plen = len;
++}
++
+ /*
+  * Submit next transfer for DMA.
+  * lock is held, spi irq is blocked
+@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct s
+ {
+ 	struct atmel_spi	*as = spi_master_get_devdata(master);
+ 	struct spi_transfer	*xfer;
+-	u32			len;
++	u32			len, remaining, total;
+ 	dma_addr_t		tx_dma, rx_dma;
+ 
+-	xfer = as->current_transfer;
+-	if (!xfer || as->remaining_bytes == 0) {
+-		if (xfer)
+-			xfer = list_entry(xfer->transfer_list.next,
+-					struct spi_transfer, transfer_list);
+-		else
+-			xfer = list_entry(msg->transfers.next,
+-					struct spi_transfer, transfer_list);
+-		as->remaining_bytes = xfer->len;
+-		as->current_transfer = xfer;
++	if (!as->current_transfer)
++		xfer = list_entry(msg->transfers.next,
++				struct spi_transfer, transfer_list);
++	else if (!as->next_transfer)
++		xfer = list_entry(as->current_transfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++	else
++		xfer = NULL;
++
++	if (xfer) {
++		len = xfer->len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		remaining = xfer->len - len;
++
++		spi_writel(as, RPR, rx_dma);
++		spi_writel(as, TPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RCR, len);
++		spi_writel(as, TCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		xfer = as->next_transfer;
++		remaining = as->next_remaining_bytes;
+ 	}
+ 
+-	len = as->remaining_bytes;
++	as->current_transfer = xfer;
++	as->current_remaining_bytes = remaining;
+ 
+-	tx_dma = xfer->tx_dma + xfer->len - len;
+-	rx_dma = xfer->rx_dma + xfer->len - len;
++	if (remaining > 0)
++		len = remaining;
++	else if (!atmel_spi_xfer_is_last(msg, xfer)
++			&& atmel_spi_xfer_can_be_chained(xfer)) {
++		xfer = list_entry(xfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++		len = xfer->len;
++	} else
++		xfer = NULL;
+ 
+-	/* use scratch buffer only when rx or tx data is unspecified */
+-	if (!xfer->rx_buf) {
+-		rx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-	}
+-	if (!xfer->tx_buf) {
+-		tx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-		memset(as->buffer, 0, len);
+-		dma_sync_single_for_device(&as->pdev->dev,
+-				as->buffer_dma, len, DMA_TO_DEVICE);
+-	}
++	as->next_transfer = xfer;
+ 
+-	spi_writel(as, RPR, rx_dma);
+-	spi_writel(as, TPR, tx_dma);
++	if (xfer) {
++		total = len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		as->next_remaining_bytes = total - len;
++
++		spi_writel(as, RNPR, rx_dma);
++		spi_writel(as, TNPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RNCR, len);
++		spi_writel(as, TNCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		spi_writel(as, RNCR, 0);
++		spi_writel(as, TNCR, 0);
++	}
+ 
+-	as->remaining_bytes -= len;
+-	if (msg->spi->bits_per_word > 8)
+-		len >>= 1;
+-
+-	/* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
+-	 * mechanism might help avoid the IRQ latency between transfers
+-	 * (and improve the nCS0 errata handling on at91rm9200 chips)
+-	 *
+-	 * We're also waiting for ENDRX before we start the next
++	/* REVISIT: We're waiting for ENDRX before we start the next
+ 	 * transfer because we need to handle some difficult timing
+ 	 * issues otherwise. If we wait for ENDTX in one transfer and
+ 	 * then starts waiting for ENDRX in the next, it's difficult
+@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct s
+ 	 *
+ 	 * It should be doable, though. Just not now...
+ 	 */
+-	spi_writel(as, TNCR, 0);
+-	spi_writel(as, RNCR, 0);
+ 	spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
+-
+-	dev_dbg(&msg->spi->dev,
+-		"  start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
+-		xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
+-		xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
+-
+-	spi_writel(as, RCR, len);
+-	spi_writel(as, TCR, len);
+ 	spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
+ }
+ 
+@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *ma
+ 	spin_lock(&as->lock);
+ 
+ 	as->current_transfer = NULL;
++	as->next_transfer = NULL;
+ 
+ 	/* continue if needed */
+ 	if (list_empty(&as->queue) || as->stopping)
+@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 
+ 		spi_writel(as, IDR, pending);
+ 
+-		if (as->remaining_bytes == 0) {
++		if (as->current_remaining_bytes == 0) {
+ 			msg->actual_length += xfer->len;
+ 
+ 			if (!msg->is_dma_mapped)
+@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 			if (xfer->delay_usecs)
+ 				udelay(xfer->delay_usecs);
+ 
+-			if (msg->transfers.prev == &xfer->transfer_list) {
++			if (atmel_spi_xfer_is_last(msg, xfer)) {
+ 				/* report completed message */
+ 				atmel_spi_msg_done(master, as, msg, 0,
+ 						xfer->cs_change);
+@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_de
+ 	if (!(spi->mode & SPI_CPHA))
+ 		csr |= SPI_BIT(NCPHA);
+ 
+-	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	/* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
++	 *
++	 * DLYBCT would add delays between words, slowing down transfers.
++	 * It could potentially be useful to cope with DMA bottlenecks, but
++	 * in those cases it's probably best to just use a lower bitrate.
++	 */
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff -Nrup linux-2.6.24/drivers/video/atmel_lcdfb.c linux-avr32/drivers/video/atmel_lcdfb.c
+--- linux-2.6.24/drivers/video/atmel_lcdfb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/atmel_lcdfb.c	2008-02-01 14:51:44.000000000 -0500
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lc
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+@@ -148,6 +150,8 @@ static int atmel_lcdfb_alloc_video_memor
+ 		return -ENOMEM;
+ 	}
+ 
++	memset(info->screen_base, 0, info->fix.smem_len);
++
+ 	return 0;
+ }
+ 
+@@ -203,6 +207,26 @@ static int atmel_lcdfb_check_var(struct 
+ 	var->transp.offset = var->transp.length = 0;
+ 	var->xoffset = var->yoffset = 0;
+ 
++	/* Saturate vertical and horizontal timings at maximum values */
++	var->vsync_len = min_t(u32, var->vsync_len,
++			(ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
++	var->upper_margin = min_t(u32, var->upper_margin,
++			ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
++	var->lower_margin = min_t(u32, var->lower_margin,
++			ATMEL_LCDC_VFP);
++	var->right_margin = min_t(u32, var->right_margin,
++			(ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
++	var->hsync_len = min_t(u32, var->hsync_len,
++			(ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
++	var->left_margin = min_t(u32, var->left_margin,
++			ATMEL_LCDC_HBP + 1);
++
++	/* Some parameters can't be zero */
++	var->vsync_len = max_t(u32, var->vsync_len, 1);
++	var->right_margin = max_t(u32, var->right_margin, 1);
++	var->hsync_len = max_t(u32, var->hsync_len, 1);
++	var->left_margin = max_t(u32, var->left_margin, 1);
++
+ 	switch (var->bits_per_pixel) {
+ 	case 1:
+ 	case 2:
+@@ -516,7 +540,6 @@ static int __init atmel_lcdfb_init_fbinf
+ 	struct fb_info *info = sinfo->info;
+ 	int ret = 0;
+ 
+-	memset_io(info->screen_base, 0, info->fix.smem_len);
+ 	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
+ 
+ 	dev_info(info->device,
+@@ -645,6 +668,11 @@ static int __init atmel_lcdfb_probe(stru
+ 		info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
+ 		if (!info->screen_base)
+ 			goto release_intmem;
++
++		/*
++		 * Don't clear the framebuffer -- someone may have set
++		 * up a splash image.
++		 */
+ 	} else {
+ 		/* alocate memory buffer */
+ 		ret = atmel_lcdfb_alloc_video_memory(sinfo);
+diff -Nrup linux-2.6.24/drivers/video/console/Kconfig linux-avr32/drivers/video/console/Kconfig
+--- linux-2.6.24/drivers/video/console/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/console/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -6,7 +6,7 @@ menu "Console display driver support"
+ 
+ config VGA_CONSOLE
+ 	bool "VGA text console" if EMBEDDED || !X86
+-	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
++	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
+ 	default y
+ 	help
+ 	  Saying Y here will allow you to use Linux in text mode through a
+diff -Nrup linux-2.6.24/drivers/watchdog/Kconfig linux-avr32/drivers/watchdog/Kconfig
+--- linux-2.6.24/drivers/watchdog/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/watchdog/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h	1969-12-31 19:00:00.000000000 -0500
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/board.h linux-avr32/include/asm-avr32/arch-at32ap/board.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/board.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/board.h	2008-02-01 14:51:45.000000000 -0500
+@@ -51,6 +51,9 @@ struct platform_device *
+ at32_add_device_ide(unsigned int id, unsigned int extint,
+ 		    struct ide_platform_data *data);
+ 
++/* mask says which PWM channels to mux */
++struct platform_device *at32_add_device_pwm(u32 mask);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -66,7 +69,13 @@ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
+ struct platform_device *at32_add_device_twi(unsigned int id);
+-struct platform_device *at32_add_device_mci(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
+ struct platform_device *at32_add_device_ac97c(unsigned int id);
+ struct platform_device *at32_add_device_abdac(unsigned int id);
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h linux-avr32/include/asm-avr32/arch-at32ap/cpu.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/cpu.h	2008-02-01 14:51:45.000000000 -0500
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/io.h linux-avr32/include/asm-avr32/arch-at32ap/io.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/io.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/io.h	2008-02-01 14:51:45.000000000 -0500
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h linux-avr32/include/asm-avr32/arch-at32ap/portmux.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/portmux.h	2008-02-01 14:51:45.000000000 -0500
+@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/dma-controller.h linux-avr32/include/asm-avr32/dma-controller.h
+--- linux-2.6.24/include/asm-avr32/dma-controller.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/dma-controller.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/irq.h linux-avr32/include/asm-avr32/irq.h
+--- linux-2.6.24/include/asm-avr32/irq.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/irq.h	2008-02-01 14:51:45.000000000 -0500
+@@ -11,4 +11,9 @@
+ 
+ #define irq_canonicalize(i)	(i)
+ 
++#ifndef __ASSEMBLER__
++int nmi_enable(void);
++void nmi_disable(void);
++#endif
++
+ #endif /* __ASM_AVR32_IOCTLS_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/kdebug.h linux-avr32/include/asm-avr32/kdebug.h
+--- linux-2.6.24/include/asm-avr32/kdebug.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/kdebug.h	2008-02-01 14:51:45.000000000 -0500
+@@ -5,6 +5,7 @@
+ enum die_val {
+ 	DIE_BREAKPOINT,
+ 	DIE_SSTEP,
++	DIE_NMI,
+ };
+ 
+ #endif /* __ASM_AVR32_KDEBUG_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/ocd.h linux-avr32/include/asm-avr32/ocd.h
+--- linux-2.6.24/include/asm-avr32/ocd.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ocd.h	2008-02-01 14:51:45.000000000 -0500
+@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned 
+ #define ocd_read(reg)			__ocd_read(OCD_##reg)
+ #define ocd_write(reg, value)		__ocd_write(OCD_##reg, value)
+ 
++struct task_struct;
++
++void ocd_enable(struct task_struct *child);
++void ocd_disable(struct task_struct *child);
++
+ #endif /* !__ASSEMBLER__ */
+ 
+ #endif /* __ASM_AVR32_OCD_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/processor.h linux-avr32/include/asm-avr32/processor.h
+--- linux-2.6.24/include/asm-avr32/processor.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/processor.h	2008-02-01 14:51:45.000000000 -0500
+@@ -57,11 +57,25 @@ struct avr32_cpuinfo {
+ 	unsigned short cpu_revision;
+ 	enum tlb_config tlb_config;
+ 	unsigned long features;
++	u32 device_id;
+ 
+ 	struct cache_info icache;
+ 	struct cache_info dcache;
+ };
+ 
++static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 1) & 0x7f;
++}
++static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 12) & 0xffff;
++}
++static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 28) & 0x0f;
++}
++
+ extern struct avr32_cpuinfo boot_cpu_data;
+ 
+ #ifdef CONFIG_SMP
+diff -Nrup linux-2.6.24/include/asm-avr32/ptrace.h linux-avr32/include/asm-avr32/ptrace.h
+--- linux-2.6.24/include/asm-avr32/ptrace.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ptrace.h	2008-02-01 14:51:45.000000000 -0500
+@@ -121,7 +121,15 @@ struct pt_regs {
+ };
+ 
+ #ifdef __KERNEL__
+-# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
++
++#include <asm/ocd.h>
++
++#define arch_ptrace_attach(child)       ocd_enable(child)
++
++#define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
++#define instruction_pointer(regs)       ((regs)->pc)
++#define profile_pc(regs)                instruction_pointer(regs)
++
+ extern void show_regs (struct pt_regs *);
+ 
+ static __inline__ int valid_user_regs(struct pt_regs *regs)
+@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st
+ 	return 0;
+ }
+ 
+-#define instruction_pointer(regs) ((regs)->pc)
+-
+-#define profile_pc(regs) instruction_pointer(regs)
+ 
+ #endif /* __KERNEL__ */
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/thread_info.h linux-avr32/include/asm-avr32/thread_info.h
+--- linux-2.6.24/include/asm-avr32/thread_info.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/thread_info.h	2008-02-01 14:51:45.000000000 -0500
+@@ -88,6 +88,7 @@ static inline struct thread_info *curren
+ #define TIF_MEMDIE		6
+ #define TIF_RESTORE_SIGMASK	7	/* restore signal mask in do_signal */
+ #define TIF_CPU_GOING_TO_SLEEP	8	/* CPU is entering sleep 0 mode */
++#define TIF_DEBUG		30	/* debugging enabled */
+ #define TIF_USERSPACE		31      /* true if FS sets userspace */
+ 
+ #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
+diff -Nrup linux-2.6.24/include/linux/atmel_pwm.h linux-avr32/include/linux/atmel_pwm.h
+--- linux-2.6.24/include/linux/atmel_pwm.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/linux/atmel_pwm.h	2008-02-01 14:51:47.000000000 -0500
+@@ -0,0 +1,70 @@
++#ifndef __LINUX_ATMEL_PWM_H
++#define __LINUX_ATMEL_PWM_H
++
++/**
++ * struct pwm_channel - driver handle to a PWM channel
++ * @regs: base of this channel's registers
++ * @index: number of this channel (0..31)
++ * @mck: base clock rate, which can be prescaled and maybe subdivided
++ *
++ * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
++ * Then they configure its clock rate (derived from MCK), alignment,
++ * polarity, and duty cycle by writing directly to the channel registers,
++ * before enabling the channel by calling pwm_channel_enable().
++ *
++ * After emitting a PWM signal for the desired length of time, drivers
++ * may then pwm_channel_disable() or pwm_channel_free().  Both of these
++ * disable the channel, but when it's freed the IRQ is deconfigured and
++ * the channel must later be re-allocated and reconfigured.
++ *
++ * Note that if the period or duty cycle need to be changed while the
++ * PWM channel is operating, drivers must use the PWM_CUPD double buffer
++ * mechanism, either polling until they change or getting implicitly
++ * notified through a once-per-period interrupt handler.
++ */
++struct pwm_channel {
++	void __iomem	*regs;
++	unsigned	index;
++	unsigned long	mck;
++};
++
++extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
++extern int pwm_channel_free(struct pwm_channel *ch);
++
++extern int pwm_clk_alloc(unsigned prescale, unsigned div);
++extern void pwm_clk_free(unsigned clk);
++
++extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
++
++#define pwm_channel_enable(ch)	__pwm_channel_onoff((ch), 1)
++#define pwm_channel_disable(ch)	__pwm_channel_onoff((ch), 0)
++
++/* periodic interrupts, mostly for CUPD changes to period or cycle */
++extern int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch));
++
++/* per-channel registers (banked at pwm_channel->regs) */
++#define PWM_CMR		0x00		/* mode register */
++#define		PWM_CPR_CPD	(1 << 10)	/* set: CUPD modifies period */
++#define		PWM_CPR_CPOL	(1 << 9)	/* set: idle high */
++#define		PWM_CPR_CALG	(1 << 8)	/* set: center align */
++#define		PWM_CPR_CPRE	(0xf << 0)	/* mask: rate is mck/(2^pre) */
++#define		PWM_CPR_CLKA	(0xb << 0)	/* rate CLKA */
++#define		PWM_CPR_CLKB	(0xc << 0)	/* rate CLKB */
++#define PWM_CDTY	0x04		/* duty cycle (max of CPRD) */
++#define PWM_CPRD	0x08		/* period (count up from zero) */
++#define PWM_CCNT	0x0c		/* counter (20 bits?) */
++#define PWM_CUPD	0x10		/* update CPRD (or CDTY) next period */
++
++static inline void
++pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
++{
++	__raw_writel(val, pwmc->regs + offset);
++}
++
++static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
++{
++	return __raw_readl(pwmc->regs + offset);
++}
++
++#endif /* __LINUX_ATMEL_PWM_H */
+diff -Nrup linux-2.6.24/include/video/atmel_lcdc.h linux-avr32/include/video/atmel_lcdc.h
+--- linux-2.6.24/include/video/atmel_lcdc.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/video/atmel_lcdc.h	2008-02-01 14:51:47.000000000 -0500
+@@ -115,20 +115,20 @@ struct atmel_lcdfb_info {
+ #define		ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)
+ 
+ #define ATMEL_LCDC_TIM1		0x0808
+-#define	ATMEL_LCDC_VFP		(0xff <<  0)
++#define	ATMEL_LCDC_VFP		(0xffU <<  0)
+ #define	ATMEL_LCDC_VBP_OFFSET		8
+-#define	ATMEL_LCDC_VBP		(0xff <<  ATMEL_LCDC_VBP_OFFSET)
++#define	ATMEL_LCDC_VBP		(0xffU <<  ATMEL_LCDC_VBP_OFFSET)
+ #define	ATMEL_LCDC_VPW_OFFSET		16
+-#define	ATMEL_LCDC_VPW		(0x3f << ATMEL_LCDC_VPW_OFFSET)
++#define	ATMEL_LCDC_VPW		(0x3fU << ATMEL_LCDC_VPW_OFFSET)
+ #define	ATMEL_LCDC_VHDLY_OFFSET		24
+-#define	ATMEL_LCDC_VHDLY	(0xf  << ATMEL_LCDC_VHDLY_OFFSET)
++#define	ATMEL_LCDC_VHDLY	(0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
+ 
+ #define ATMEL_LCDC_TIM2		0x080c
+-#define	ATMEL_LCDC_HBP		(0xff  <<  0)
++#define	ATMEL_LCDC_HBP		(0xffU  <<  0)
+ #define	ATMEL_LCDC_HPW_OFFSET		8
+-#define	ATMEL_LCDC_HPW		(0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
++#define	ATMEL_LCDC_HPW		(0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
+ #define	ATMEL_LCDC_HFP_OFFSET		21
+-#define	ATMEL_LCDC_HFP		(0x7ff << ATMEL_LCDC_HFP_OFFSET)
++#define	ATMEL_LCDC_HFP		(0x7ffU << ATMEL_LCDC_HFP_OFFSET)
+ 
+ #define ATMEL_LCDC_LCDFRMCFG	0x0810
+ #define	ATMEL_LCDC_LINEVAL	(0x7ff <<  0)
+diff -Nrup linux-2.6.24/kernel/ptrace.c linux-avr32/kernel/ptrace.c
+--- linux-2.6.24/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/kernel/ptrace.c	2008-02-01 14:51:47.000000000 -0500
+@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request,
+ 	lock_kernel();
+ 	if (request == PTRACE_TRACEME) {
+ 		ret = ptrace_traceme();
++		if (!ret)
++			arch_ptrace_attach(current);
+ 		goto out;
+ 	}
+ 
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.c linux-avr32/sound/avr32/ac97c.c
+--- linux-2.6.24/sound/avr32/ac97c.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.c	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.h linux-avr32/sound/avr32/ac97c.h
+--- linux-2.6.24/sound/avr32/ac97c.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.h	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff -Nrup linux-2.6.24/sound/avr32/Kconfig linux-avr32/sound/avr32/Kconfig
+--- linux-2.6.24/sound/avr32/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff -Nrup linux-2.6.24/sound/avr32/Makefile linux-avr32/sound/avr32/Makefile
+--- linux-2.6.24/sound/avr32/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff -Nrup linux-2.6.24/sound/Kconfig linux-avr32/sound/Kconfig
+--- linux-2.6.24/sound/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
+ if SPI
+ source "sound/spi/Kconfig"
+ endif
+diff -Nrup linux-2.6.24/sound/Makefile linux-avr32/sound/Makefile
+--- linux-2.6.24/sound/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+ obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
+-	sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++	sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.c linux-avr32/sound/oss/at32_abdac.c
+--- linux-2.6.24/sound/oss/at32_abdac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.c	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.h linux-avr32/sound/oss/at32_abdac.h
+--- linux-2.6.24/sound/oss/at32_abdac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.h	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff -Nrup linux-2.6.24/sound/oss/Kconfig linux-avr32/sound/oss/Kconfig
+--- linux-2.6.24/sound/oss/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Kconfig	2008-02-01 14:51:49.000000000 -0500
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff -Nrup linux-2.6.24/sound/oss/Makefile linux-avr32/sound/oss/Makefile
+--- linux-2.6.24/sound/oss/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Makefile	2008-02-01 14:51:49.000000000 -0500
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o a
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
diff --git a/target/device/Atmel/atngw100/kernel-patches/linux-2.6.24-avr32-mmc.patch b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.24-avr32-mmc.patch
new file mode 100644
index 000000000..a7654b5c6
--- /dev/null
+++ b/target/device/Atmel/atngw100/kernel-patches/linux-2.6.24-avr32-mmc.patch
@@ -0,0 +1,255 @@
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+index eeac479..7913cd8 100644
+--- a/drivers/mmc/host/atmel-mci.c
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -39,7 +39,6 @@ enum {
+ 	EVENT_STOP_COMPLETE,
+ 	EVENT_DMA_COMPLETE,
+ 	EVENT_DMA_ERROR,
+-	EVENT_CARD_DETECT,
+ };
+ 
+ struct atmel_mci_dma {
+@@ -70,6 +69,9 @@ struct atmel_mci {
+ 	int			detect_pin;
+ 	int			wp_pin;
+ 
++	/* For detect pin debouncing */
++	struct timer_list	detect_timer;
++
+ 	unsigned long		bus_hz;
+ 	unsigned long		mapbase;
+ 	struct clk		*mck;
+@@ -108,8 +110,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_dma_error_is_complete(host)			\
+ 	test_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_card_detect_is_complete(host)			\
+-	test_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Test and clear bit macros for pending events */
+ #define mci_clear_cmd_is_pending(host)			\
+@@ -124,8 +124,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_is_pending(host)		\
+ 	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_is_pending(host)		\
+-	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Test and set bit macros for completed events */
+ #define mci_set_cmd_is_completed(host)			\
+@@ -140,8 +138,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_is_completed(host)		\
+ 	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_is_completed(host)		\
+-	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for completed events */
+ #define mci_set_cmd_complete(host)			\
+@@ -158,8 +154,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_complete(host)		\
+ 	set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_complete(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for pending events */
+ #define mci_set_cmd_pending(host)			\
+@@ -174,8 +168,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_set_dma_error_pending(host)			\
+ 	set_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_set_card_detect_pending(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Clear bit macros for pending events */
+ #define mci_clear_cmd_pending(host)			\
+@@ -190,8 +182,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_pending(host)		\
+ 	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_pending(host)		\
+-	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ 
+ #ifdef CONFIG_DEBUG_FS
+@@ -560,6 +550,21 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
+ 				mci_readl(host, IMR));
+ 
+ 	WARN_ON(host->mrq != NULL);
++
++	/*
++	 * We may "know" the card is gone even though there's still an
++	 * electrical connection. If so, we really need to communicate
++	 * this to the MMC core since there won't be any more
++	 * interrupts as the card is completely removed. Otherwise,
++	 * the MMC core might believe the card is still there even
++	 * though the card was just removed very slowly.
++	 */
++	if (!host->present) {
++		mrq->cmd->error = -ENOMEDIUM;
++		mmc_request_done(mmc, mrq);
++		return;
++	}
++
+ 	host->mrq = mrq;
+ 	host->pending_events = 0;
+ 	host->completed_events = 0;
+@@ -729,6 +734,61 @@ static void atmci_command_complete(struct atmel_mci *host,
+ 	}
+ }
+ 
++static void atmci_detect_change(unsigned long data)
++{
++	struct atmel_mci *host = (struct atmel_mci *)data;
++	struct mmc_request *mrq = host->mrq;
++	int present;
++
++	/*
++	 * atmci_remove() sets detect_pin to -1 before freeing the
++	 * interrupt. We must not re-enable the interrupt if it has
++	 * been freed.
++	 */
++	smp_rmb();
++	if (host->detect_pin < 0)
++		return;
++
++	enable_irq(gpio_to_irq(host->detect_pin));
++	present = !gpio_get_value(host->detect_pin);
++
++	dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
++			present, host->present);
++
++	if (present != host->present) {
++		dev_dbg(&host->mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++
++		/* Reset controller if card is gone */
++		if (!present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ENOMEDIUM;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ENOMEDIUM;
++				atmci_data_complete(host, host->data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ENOMEDIUM;
++
++			host->cmd = NULL;
++			atmci_request_end(host->mmc, mrq);
++		}
++
++		mmc_detect_change(host->mmc, 0);
++	}
++}
++
+ static void atmci_tasklet_func(unsigned long priv)
+ {
+ 	struct mmc_host *mmc = (struct mmc_host *)priv;
+@@ -806,33 +866,6 @@ static void atmci_tasklet_func(unsigned long priv)
+ 		data->bytes_xfered = data->blocks * data->blksz;
+ 		atmci_data_complete(host, data);
+ 	}
+-	if (mci_clear_card_detect_is_pending(host)) {
+-		/* Reset controller if card is gone */
+-		if (!host->present) {
+-			mci_writel(host, CR, MCI_BIT(SWRST));
+-			mci_writel(host, IDR, ~0UL);
+-			mci_writel(host, CR, MCI_BIT(MCIEN));
+-		}
+-
+-		/* Clean up queue if present */
+-		if (mrq) {
+-			if (!mci_cmd_is_complete(host))
+-				mrq->cmd->error = -ETIMEDOUT;
+-			if (mrq->data && !mci_data_is_complete(host)
+-			    && !mci_data_error_is_complete(host)) {
+-				dma_stop_request(host->dma.req.req.dmac,
+-						host->dma.req.req.channel);
+-				host->data->error = -ETIMEDOUT;
+-				atmci_data_complete(host, data);
+-			}
+-			if (mrq->stop && !mci_stop_is_complete(host))
+-				mrq->stop->error = -ETIMEDOUT;
+-
+-			host->cmd = NULL;
+-			atmci_request_end(mmc, mrq);
+-		}
+-		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
+-	}
+ }
+ 
+ static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
+@@ -957,20 +990,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)
+ 	return IRQ_HANDLED;
+ }
+ 
+-static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
+ {
+ 	struct mmc_host *mmc = dev_id;
+ 	struct atmel_mci *host = mmc_priv(mmc);
+ 
+-	int present = !gpio_get_value(irq_to_gpio(irq));
++	/*
++	 * Disable interrupts until the pin has stabilized and check
++	 * the state then. Use mod_timer() since we may be in the
++	 * middle of the timer routine when this interrupt triggers.
++	 */
++	disable_irq_nosync(irq);
++	mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
+ 
+-	if (present != host->present) {
+-		dev_dbg(&mmc->class_dev, "card %s\n",
+-			present ? "inserted" : "removed");
+-		host->present = present;
+-		mci_set_card_detect_pending(host);
+-		tasklet_schedule(&host->tasklet);
+-	}
+ 	return IRQ_HANDLED;
+ }
+ 
+@@ -1079,8 +1111,11 @@ static int __devinit atmci_probe(struct platform_device *pdev)
+ 	mmc_add_host(mmc);
+ 
+ 	if (host->detect_pin >= 0) {
++		setup_timer(&host->detect_timer, atmci_detect_change,
++				(unsigned long)host);
++
+ 		ret = request_irq(gpio_to_irq(host->detect_pin),
+-				  atmci_detect_change,
++				  atmci_detect_interrupt,
+ 				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ 				  DRIVER_NAME, mmc);
+ 		if (ret) {
+@@ -1125,9 +1160,16 @@ static int __devexit atmci_remove(struct platform_device *pdev)
+ 		atmci_cleanup_debugfs(host);
+ 
+ 		if (host->detect_pin >= 0) {
+-			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			int pin = host->detect_pin;
++
++			/* Make sure our timer doesn't enable the interrupt */
++			host->detect_pin = -1;
++			smp_wmb();
++
++			free_irq(gpio_to_irq(pin), host->mmc);
++			del_timer_sync(&host->detect_timer);
+ 			cancel_delayed_work(&host->mmc->detect);
+-			gpio_free(host->detect_pin);
++			gpio_free(pin);
+ 		}
+ 
+ 		mmc_remove_host(host->mmc);
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/hosts b/target/device/Atmel/atngw100/target_skeleton/etc/hosts
index b24a953a3..9d8c7b8e9 100644
--- a/target/device/Atmel/atngw100/target_skeleton/etc/hosts
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/hosts
@@ -1,10 +1,9 @@
 127.0.0.1   localhost.localdomain localhost
-127.0.1.1   ngw.example.net ngw
+10.0.0.1    ngw.example.net ngw
 
 # The following lines are desirable for IPv6 capable hosts
 ::1     localhost
 ::1     ip6-localhost ip6-loopback
-::1     ngw.example.net ngw
 fe00::0 ip6-localnet
 ff00::0 ip6-mcastprefix
 ff02::1 ip6-allnodes
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/httpd.conf b/target/device/Atmel/atngw100/target_skeleton/etc/httpd.conf
index 86263f1e9..640f8150d 100644
--- a/target/device/Atmel/atngw100/target_skeleton/etc/httpd.conf
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/httpd.conf
@@ -1,6 +1,2 @@
 # Allow all trafic
 A: *
-
-.asp:text/html
-/cgi-bin/webif:root:roota
-/cgi-bin/webif:admin:roota
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S00mountvirtfs b/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S00mountvirtfs
index 61c589102..d9e5c9249 100755
--- a/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S00mountvirtfs
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S00mountvirtfs
@@ -58,6 +58,8 @@ if mount_fs dev /dev tmpfs "size=512k,mode=0755"; then
 	mkdir_fs /dev/pts
 	mount_fs pts /dev/pts devpts
 	mkdir_fs /dev/shm
+	# g_serial is not detected by mdev.
+	mknod /dev/ttygserial c 127 0
 fi
 
 mount_fs config /config configfs
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S40telnetd b/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S40telnetd
index b253c1036..e0fd2f2f3 100755
--- a/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S40telnetd
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/init.d/S40telnetd
@@ -8,7 +8,7 @@ if [ ! -x "${TELNETD}" ]; then
 	exit 1
 fi
 
-if ${TELNETD} -l /bin/ash; then
+if ${TELNETD} -l /bin/sh; then
 	echo "done"
 else
 	echo "failed"
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/inittab b/target/device/Atmel/atngw100/target_skeleton/etc/inittab
index b135bf2b6..539edb7fb 100644
--- a/target/device/Atmel/atngw100/target_skeleton/etc/inittab
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/inittab
@@ -1,8 +1,7 @@
 # Inittab for the ATNGW100 development board
 #
 # Note: BusyBox init doesn't support runlevels.  The runlevels field is
-# completely ignored by BusyBox init. If you want runlevels, use
-# sysvinit.
+# completely ignored by BusyBox init. If you want runlevels, use sysvinit.
 #
 # Format for each entry: <id>:<runlevels>:<action>:<process>
 #
@@ -11,15 +10,18 @@
 # action    == one of sysinit, respawn, askfirst, wait, and once
 # process   == program to run
 
-# Run any rc scripts
+# Run the rcS script after kernel is booted.
 ::sysinit:/etc/init.d/rcS
 
-# Run a shell on the first serial port. Comment this out if you want
-# a getty instead
+# Run a shell on the first serial port. Comment out if you want a getty instead.
 ttyS0::respawn:-/bin/sh
 
-# Uncomment this to run a getty on the first serial port
+# Run a shell on the g_serial port (USB gadget device)? This shell will spawn
+# error message if the device is not connected.
+#ttygserial::respawn:-/bin/sh
+
+# Uncomment this to run a getty on the first serial port.
 #ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100
 
-# Run a script on shutdown
+# Run a script on shutdown.
 ::shutdown:/etc/init.d/rcK
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/proftpd.conf b/target/device/Atmel/atngw100/target_skeleton/etc/proftpd.conf
new file mode 100644
index 000000000..59d039087
--- /dev/null
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/proftpd.conf
@@ -0,0 +1,31 @@
+ServerName			"ATNGW100 FTP server"
+ServerType			standalone
+DefaultServer			on
+
+# Port 21 is the standard FTP port.
+Port				21
+
+# Umask 022 is a good standard umask to prevent new dirs and files
+# from being group and world writable.
+Umask				022
+
+# Note that this ONLY works in standalone mode, in inetd mode you should use an
+# inetd server that allows you to limit maximum number of processes per service
+# (such as inetd).
+MaxInstances			5
+
+# Set the user and group under which the server will run.
+User				nobody
+Group				nogroup
+
+# To cause every FTP user to be "jailed" (chrooted) into their home
+# directory, uncomment this line.
+#DefaultRoot ~
+
+# Normally, we want files to be overwriteable.
+AllowOverwrite		on
+
+# Deny use of SITE CHMOD, uncomment the three lines below.
+#<Limit SITE_CHMOD>
+#  DenyAll
+#</Limit>
diff --git a/target/device/Atmel/atngw100/target_skeleton/etc/samba/smb.conf b/target/device/Atmel/atngw100/target_skeleton/etc/samba/smb.conf
index b6dddc056..13e46e85d 100644
--- a/target/device/Atmel/atngw100/target_skeleton/etc/samba/smb.conf
+++ b/target/device/Atmel/atngw100/target_skeleton/etc/samba/smb.conf
@@ -170,10 +170,16 @@
 #   client code page = 850
 
 #============================ Share Definitions ==============================
-;[homes]
-;   comment = Home Directories
-;   browseable = no
-;   writable = yes
+[homes]
+   comment = Home Directories
+   browseable = no
+   writable = yes
+
+[netdisk]
+   comment = Network share on STK1000
+   path = /media
+   read only = no
+   public = yes
 
 # Un-comment the following and create the netlogon directory for Domain Logons
 ; [netlogon]
diff --git a/target/device/Atmel/linux/linux.mk b/target/device/Atmel/atngw100/target_skeleton/tmp/resolv.conf
index e69de29bb..e69de29bb 100644
--- a/target/device/Atmel/linux/linux.mk
+++ b/target/device/Atmel/atngw100/target_skeleton/tmp/resolv.conf
diff --git a/target/device/Atmel/atngw100/atngw100_defconfig b/target/device/Atmel/atngw100_defconfig
index 4bc6130e2..007bdbd70 100644
--- a/target/device/Atmel/atngw100/atngw100_defconfig
+++ b/target/device/Atmel/atngw100_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Fri Nov  2 18:26:44 2007
+# Tue Feb 26 08:57:14 2008
 #
 BR2_HAVE_DOT_CONFIG=y
 BR2_VERSION="0.10.0-svn"
@@ -36,8 +36,8 @@ BR2_ENDIAN="BIG"
 # Project Options
 #
 BR2_PROJECT="atngw100"
-BR2_HOSTNAME="ATNGW100"
-BR2_BANNER="Welcome to the Erik's uClibc development environment."
+BR2_HOSTNAME="ngw.example.net"
+BR2_BANNER="ATNGW100 ($(DATE))"
 
 #
 # Preset Devices
@@ -53,10 +53,12 @@ BR2_TARGET_AT32AP7000=y
 # BR2_TARGET_AT32AP7002 is not set
 
 #
-# Development Board support
+# Development board support
 #
 # BR2_TARGET_AVR32_ATSTK1002 is not set
 BR2_TARGET_AVR32_ATNGW100=y
+# BR2_TARGET_AVR32_ATNGW100_BASE is not set
+# BR2_TARGET_AVR32_ATNGW100_EXPANDED is not set
 BR2_BOARD_NAME="atngw100"
 
 #
@@ -66,8 +68,9 @@ BR2_BOARD_NAME="atngw100"
 #
 # Secondary locations
 #
-BR2_TARGET_ATMEL_COPYTO="/tftpboot"
+BR2_TARGET_ATMEL_COPYTO=""
 BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
+# BR2_TARGET_VALKA is not set
 
 #
 # Generic System Support
@@ -79,24 +82,27 @@ BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
 #
 # Build options
 #
-BR2_WGET="wget --passive-ftp"
+BR2_WGET="wget --passive-ftp --retry-connrefused --waitretry=10"
 BR2_SVN_CO="svn co"
 BR2_SVN_UP="svn up"
 BR2_GIT="git clone"
 BR2_ZCAT="zcat"
 BR2_BZCAT="bzcat"
 BR2_TAR_OPTIONS=""
-BR2_DL_DIR="$(BASE_DIR)/dl"
+BR2_DL_DIR="$(BASE_DIR)/src/dl"
 
 #
 # Mirrors and Download locations
 #
 BR2_SOURCEFORGE_MIRROR="easynews"
+BR2_KERNEL_MIRROR="http://www.kernel.org/pub/"
+BR2_GNU_MIRROR="http://ftp.gnu.org/pub/gnu"
+BR2_DEBIAN_MIRROR="http://ftp.debian.org"
 
 #
 # Atmel Mirrors
 #
-BR2_ATMEL_MIRROR="ftp://www.at91.com/pub/buildroot"
+BR2_ATMEL_MIRROR="ftp://at91dist:distrib@81.80.104.162/AT91_Third_Party_Design_Flow/Linux_Host/"
 BR2_AT91_PATCH_MIRROR="http://maxim.org.za/AT91RM9200/2.6/"
 BR2_STAGING_DIR="$(BUILD_DIR)/staging_dir"
 # BR2_FPU_SUFFIX is not set
@@ -108,7 +114,7 @@ BR2_GNU_BUILD_SUFFIX="pc-linux-gnu"
 BR2_GNU_TARGET_SUFFIX="linux-uclibc"
 BR2_JLEVEL=1
 # BR2_PREFER_IMA is not set
-BR2_DEPRECATED=y
+# BR2_DEPRECATED is not set
 BR2_RECENT=y
 BR2_STRIP_strip=y
 # BR2_STRIP_sstrip is not set
@@ -121,26 +127,15 @@ BR2_UPDATE_CONFIG=y
 #
 # Toolchain
 #
-# BR2_TOOLCHAIN_BUILDROOT is not set
+BR2_TOOLCHAIN_BUILDROOT=y
 # BR2_TOOLCHAIN_EXTERNAL is not set
-BR2_TOOLCHAIN_EXTERNAL_SOURCE=y
+# BR2_TOOLCHAIN_EXTERNAL_SOURCE is not set
 BR2_TOOLCHAIN_SOURCE=y
-BR2_TOOLCHAIN_ATMEL_AVR32_4_1_2=y
-# BR2_TOOLCHAIN_ATMEL_AVR32_4_2_1 is not set
-# BR2_TOOLCHAIN_UNKNOWNVENDOR is not set
-BR2_TOOLCHAIN_ATMEL_AVR32=y
-BR2_VENDOR_SITE="$(BR2_ATMEL_MIRROR)/Source"
-BR2_VENDOR_SUFFIX="-avr32"
-BR2_VENDOR_BINUTILS_RELEASE="-2.1.3"
-BR2_VENDOR_GCC_RELEASE="-2.0"
-BR2_VENDOR_UCLIBC_RELEASE="-2.1.3"
-BR2_VENDOR_GDB_RELEASE="-2.1.3"
-BR2_VENDOR_PATCH_DIR="target/device/Atmel/toolchain/avr32"
 BR2_EXT_GCC_VERSION_4_1_2=y
-# BR2_EXT_GCC_VERSION_4_2_1 is not set
+BR2_EXT_GCC_VERSION_4_2_1=y
 BR2_EXT_BINUTILS_VERSION_2_17=y
 BR2_EXT_UCLIBC_VERSION_0_9_29=y
-# BR2_EXT_UCLIBC_VERSION_0_9_28_3 is not set
+BR2_EXT_UCLIBC_VERSION_0_9_28_3=y
 
 #
 # Kernel Header Options
@@ -157,12 +152,12 @@ BR2_EXT_UCLIBC_VERSION_0_9_29=y
 # BR2_KERNEL_HEADERS_2_6_21_5 is not set
 # BR2_KERNEL_HEADERS_2_6_21 is not set
 # BR2_KERNEL_HEADERS_2_6_22_1 is not set
-BR2_KERNEL_HEADERS_2_6_22_10=y
+# BR2_KERNEL_HEADERS_2_6_22_10 is not set
 # BR2_KERNEL_HEADERS_2_6_22 is not set
 # BR2_KERNEL_HEADERS_2_6_23 is not set
+BR2_KERNEL_HEADERS_2_6_24=y
 # BR2_KERNEL_HEADERS_SNAP is not set
-BR2_KERNEL_HEADERS_PATCH_DIR=y
-BR2_DEFAULT_KERNEL_HEADERS="2.6.22.10"
+BR2_DEFAULT_KERNEL_HEADERS="2.6.24"
 
 #
 # uClibc Options
@@ -176,8 +171,8 @@ BR2_UCLIBC_CONFIG="target/device/Atmel/uClibc.config.avr32"
 # BR2_PTHREADS is not set
 BR2_PTHREADS_OLD=y
 # BR2_PTHREADS_NATIVE is not set
-BR2_PTHREAD_DEBUG=y
-BR2_UCLIBC_PROGRAM_INVOCATION=y
+# BR2_PTHREAD_DEBUG is not set
+# BR2_UCLIBC_PROGRAM_INVOCATION is not set
 
 #
 # Binutils Options
@@ -194,17 +189,18 @@ BR2_EXTRA_BINUTILS_CONFIG_OPTIONS=""
 #
 # BR2_GCC_VERSION_3_4_6 is not set
 # BR2_GCC_VERSION_4_0_4 is not set
-BR2_GCC_VERSION_4_1_2=y
+# BR2_GCC_VERSION_4_1_2 is not set
 # BR2_GCC_VERSION_4_2_0 is not set
-# BR2_GCC_VERSION_4_2_1 is not set
-# BR2_GCC_SUPPORTS_SYSROOT is not set
+BR2_GCC_VERSION_4_2_1=y
+BR2_GCC_SUPPORTS_SYSROOT=y
 # BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE is not set
-BR2_GCC_VERSION="4.1.2"
+BR2_GCC_VERSION="4.2.1"
+# BR2_TOOLCHAIN_SYSROOT is not set
 # BR2_GCC_USE_SJLJ_EXCEPTIONS is not set
 BR2_EXTRA_GCC_CONFIG_OPTIONS=""
-# BR2_GCC_CROSS_CXX is not set
-# BR2_INSTALL_LIBSTDCPP is not set
-# BR2_GCC_SHARED_LIBGCC is not set
+BR2_GCC_CROSS_CXX=y
+BR2_INSTALL_LIBSTDCPP=y
+BR2_GCC_SHARED_LIBGCC=y
 
 #
 # Ccache Options
@@ -215,8 +211,15 @@ BR2_EXTRA_GCC_CONFIG_OPTIONS=""
 # Gdb Options
 #
 # BR2_PACKAGE_GDB is not set
-# BR2_PACKAGE_GDB_SERVER is not set
-# BR2_PACKAGE_GDB_HOST is not set
+BR2_PACKAGE_GDB_SERVER=y
+BR2_PACKAGE_GDB_HOST=y
+# BR2_GDB_VERSION_6_2_1 is not set
+# BR2_GDB_VERSION_6_3 is not set
+BR2_GDB_VERSION_6_4=y
+# BR2_GDB_VERSION_6_5 is not set
+# BR2_GDB_VERSION_6_6 is not set
+# BR2_GDB_VERSION_SNAPSHOT is not set
+BR2_GDB_VERSION="6.4"
 
 #
 # elf2flt
@@ -244,33 +247,25 @@ BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
 BR2_PACKAGE_BUSYBOX=y
 # BR2_BUSYBOX_VERSION_1_2_2_1 is not set
 # BR2_BUSYBOX_VERSION_1_6_1 is not set
-# BR2_BUSYBOX_VERSION_1_7_0 is not set
-BR2_BUSYBOX_VERSION_1_7_1=y
-# BR2_BUSYBOX_VERSION_1_7_2 is not set
+# BR2_BUSYBOX_VERSION_1_7_X is not set
+# BR2_BUSYBOX_VERSION_1_8_X is not set
+BR2_BUSYBOX_VERSION_1_9_X=y
 # BR2_PACKAGE_BUSYBOX_SNAPSHOT is not set
-BR2_BUSYBOX_VERSION="1.7.1"
+BR2_BUSYBOX_VERSION="1.9.1"
 BR2_PACKAGE_BUSYBOX_INSTALL_SYMLINKS=y
-BR2_PACKAGE_BUSYBOX_CONFIG="target/device/Atmel/uClibc.config.avr32"
-# BR2_PACKAGE_BUSYBOX_HIDE_OTHERS is not set
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_BOARD_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config"
+BR2_PACKAGE_BUSYBOX_HIDE_OTHERS=y
 BR2_PACKAGE_BUSYBOX_SKELETON=y
 
 #
 # The minimum needed to build a uClibc development system
 #
 # BR2_PACKAGE_BASH is not set
-# BR2_PACKAGE_BZIP2 is not set
-# BR2_PACKAGE_COREUTILS is not set
+BR2_PACKAGE_BZIP2=y
 # BR2_PACKAGE_DIFFUTILS is not set
-# BR2_PACKAGE_ED is not set
-# BR2_PACKAGE_FINDUTILS is not set
 # BR2_PACKAGE_FLEX is not set
-# BR2_PACKAGE_GAWK is not set
 # BR2_PACKAGE_GCC_TARGET is not set
-# BR2_PACKAGE_GREP is not set
 # BR2_PACKAGE_MAKE is not set
-# BR2_PACKAGE_PATCH is not set
-# BR2_PACKAGE_SED is not set
-# BR2_PACKAGE_TAR is not set
 
 #
 # Other development stuff
@@ -303,9 +298,17 @@ BR2_HOST_FAKEROOT=y
 # BR2_PACKAGE_BSDIFF is not set
 # BR2_PACKAGE_CUSTOMIZE is not set
 # BR2_PACKAGE_DASH is not set
+# BR2_PACKAGE_FCONFIG is not set
 # BR2_PACKAGE_FILE is not set
+# BR2_PACKAGE_FIS is not set
 # BR2_PACKAGE_KEXEC is not set
-# BR2_PACKAGE_LESS is not set
+# BR2_PACKAGE_ICU is not set
+# BR2_PACKAGE_IPKG is not set
+# BR2_PACKAGE_CUPS is not set
+# BR2_PACKAGE_NG_SPICE_REWORK is not set
+# BR2_PACKAGE_GAMIN is not set
+# BR2_PACKAGE_STARTUP_NOTIFICATION is not set
+# BR2_PACKAGE_CLASSPATH is not set
 BR2_PACKAGE_LIBDAEMON=y
 # BR2_PACKAGE_LIBELF is not set
 # BR2_PACKAGE_LIBEVENT is not set
@@ -313,82 +316,99 @@ BR2_PACKAGE_LIBDAEMON=y
 # BR2_PACKAGE_LIBGCRYPT is not set
 # BR2_PACKAGE_LIBGPG_ERROR is not set
 # BR2_PACKAGE_LIBLOCKFILE is not set
-BR2_PACKAGE_LIBSYSFS=y
+# BR2_PACKAGE_LIBSYSFS is not set
 # BR2_PACKAGE_LIBXML2 is not set
+
+#
+# libxslt	- disabled (requires pkgconfig)
+#
 # BR2_PACKAGE_LOCKFILE_PROGS is not set
 # BR2_PACKAGE_LSOF is not set
 # BR2_PACKAGE_LTP-TESTSUITE is not set
 # BR2_PACKAGE_LTRACE is not set
 # BR2_PACKAGE_LTT is not set
-# BR2_PACKAGE_MODULE_INIT_TOOLS is not set
-# BR2_PACKAGE_MODUTILS is not set
-# BR2_PACKAGE_NANO is not set
 # BR2_PACKAGE_PORTAGE is not set
-# BR2_PACKAGE_PROCPS is not set
-# BR2_PACKAGE_PSMISC is not set
 # BR2_PACKAGE_SQLITE is not set
-# BR2_PACKAGE_STRACE is not set
+BR2_PACKAGE_STRACE=y
 # BR2_PACKAGE_SUDO is not set
-# BR2_PACKAGE_SYSKLOGD is not set
-# BR2_PACKAGE_SYSVINIT is not set
-# BR2_PACKAGE_TINYLOGIN is not set
-# BR2_PACKAGE_UEMACS is not set
-# BR2_PACKAGE_UTIL-LINUX is not set
-# BR2_PACKAGE_WHICH is not set
 BR2_NETWORK_SUPPORT=y
 
 #
 # Networking applications
 #
-# BR2_PACKAGE_ARGUS is not set
-# BR2_PACKAGE_AVAHI is not set
+
+#
+# argus		- disabled (requires libpcap)
+#
+BR2_PACKAGE_AVAHI=y
+BR2_PACKAGE_AVAHI_AUTOIPD=y
+
+#
+# mDNS/DNS-SD daemon	- disabled (requires expat)
+#
 # BR2_PACKAGE_BOA is not set
 # BR2_PACKAGE_BIND is not set
-# BR2_PACKAGE_BRIDGE is not set
+BR2_PACKAGE_BRIDGE=y
 # BR2_PACKAGE_CURL is not set
 # BR2_PACKAGE_LIBCURL is not set
-# BR2_PACKAGE_ISC_DHCP is not set
-# BR2_PACKAGE_DNSMASQ is not set
-# BR2_PACKAGE_DROPBEAR is not set
+BR2_PACKAGE_DNSMASQ=y
+BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_ETHTOOL is not set
-# BR2_PACKAGE_HASERL is not set
-# BR2_PACKAGE_HOSTAP is not set
+BR2_PACKAGE_HASERL=y
+# BR2_PACKAGE_HASERL_VERSION_0_8_0 is not set
+BR2_PACKAGE_HASERL_VERSION_0_9_21=y
+BR2_PACKAGE_HASERL_VERSION="0.9.21"
 # BR2_PACKAGE_IRDA_UTILS is not set
 # BR2_PACKAGE_IPERF is not set
 # BR2_PACKAGE_IPROUTE2 is not set
-# BR2_PACKAGE_IPSEC_TOOLS is not set
-# BR2_PACKAGE_IPTABLES is not set
+
+#
+# ipsec-tools	- disabled (requires openssl, flex and the flex library (libfl.a) )
+#
+BR2_PACKAGE_IPTABLES=y
 # BR2_PACKAGE_KISMET is not set
 # BR2_PACKAGE_L2TP is not set
 # BR2_PACKAGE_LIBCGI is not set
 # BR2_PACKAGE_LIBCGICC is not set
+# BR2_PACKAGE_LIBEXOSIP2 is not set
+# BR2_PACKAGE_LIBOSIP2 is not set
 # BR2_PACKAGE_LIBPCAP is not set
 # BR2_PACKAGE_LINKS is not set
-# BR2_PACKAGE_LRZSZ is not set
+BR2_PACKAGE_LRZSZ=y
 # BR2_PACKAGE_MDNSRESPONDER is not set
 # BR2_PACKAGE_MICROCOM is not set
 # BR2_PACKAGE_MROUTED is not set
 # BR2_PACKAGE_MUTT is not set
-# BR2_PACKAGE_NBD is not set
-# BR2_PACKAGE_NCFTP is not set
-# BR2_PACKAGE_NETCAT is not set
+BR2_PACKAGE_NBD=y
+BR2_PACKAGE_NCFTP=y
+
+#
+# ncFTP tools selection
+#
+# BR2_PACKAGE_NCFTP_GET is not set
+# BR2_PACKAGE_NCFTP_PUT is not set
+# BR2_PACKAGE_NCFTP_LS is not set
+# BR2_PACKAGE_NCFTP_BATCH is not set
+# BR2_PACKAGE_NCFTP_SPOOLER is not set
+# BR2_PACKAGE_NCFTP_BOOKMARKS is not set
 # BR2_PACKAGE_NETKITBASE is not set
 # BR2_PACKAGE_NETKITTELNET is not set
 # BR2_PACKAGE_NETPLUG is not set
 # BR2_PACKAGE_NETSNMP is not set
 # BR2_PACKAGE_NFS_UTILS is not set
-# BR2_PACKAGE_NTP is not set
+BR2_PACKAGE_NTP=y
+# BR2_PACKAGE_NTP_SNTP is not set
 # BR2_PACKAGE_OLSR is not set
 # BR2_PACKAGE_OPENNTPD is not set
 # BR2_PACKAGE_OPENSSH is not set
 # BR2_PACKAGE_OPENSSL is not set
 # BR2_PACKAGE_OPENVPN is not set
 # BR2_PACKAGE_OPENSWAN is not set
-# BR2_PACKAGE_PORTMAP is not set
+BR2_PACKAGE_PORTMAP=y
 # BR2_PACKAGE_PPPD is not set
 # BR2_PACKAGE_RP_PPPOE is not set
 # BR2_PACKAGE_PPTP_LINUX is not set
-# BR2_PACKAGE_PROFTPD is not set
+BR2_PACKAGE_PROFTPD=y
 # BR2_PACKAGE_QUAGGA is not set
 
 #
@@ -402,31 +422,58 @@ BR2_NETWORK_SUPPORT=y
 # BR2_PACKAGE_QUAGGA_OSPF6D is not set
 # BR2_PACKAGE_QUAGGA_WATCHQUAGGA is not set
 # BR2_PACKAGE_QUAGGA_ISISD is not set
-# BR2_PACKAGE_RSYNC is not set
-# BR2_PACKAGE_SAMBA is not set
+BR2_PACKAGE_RSYNC=y
+BR2_PACKAGE_SAMBA=y
+
+#
+# Samba tools selection
+#
+# BR2_PACKAGE_SAMBA_CIFS is not set
+# BR2_PACKAGE_SAMBA_EVENTLOGADM is not set
+# BR2_PACKAGE_SAMBA_NET is not set
+BR2_PACKAGE_SAMBA_NMBD=y
+# BR2_PACKAGE_SAMBA_NMBLOOKUP is not set
+# BR2_PACKAGE_SAMBA_NTLM_AUTH is not set
+# BR2_PACKAGE_SAMBA_PDBEDIT is not set
+# BR2_PACKAGE_SAMBA_PROFILES is not set
+# BR2_PACKAGE_SAMBA_RPCCLIENT is not set
+# BR2_PACKAGE_SAMBA_SMBCACLS is not set
+# BR2_PACKAGE_SAMBA_SMBCLIENT is not set
+# BR2_PACKAGE_SAMBA_SMBCONTROL is not set
+# BR2_PACKAGE_SAMBA_SMBCQUOTAS is not set
+# BR2_PACKAGE_SAMBA_SMBGET is not set
+BR2_PACKAGE_SAMBA_SMBPASSWD=y
+# BR2_PACKAGE_SAMBA_SMBSPOOL is not set
+# BR2_PACKAGE_SAMBA_SMBSTATUS is not set
+# BR2_PACKAGE_SAMBA_SMBTREE is not set
+BR2_PACKAGE_SAMBA_SWAT=y
+# BR2_PACKAGE_SAMBA_TDB is not set
+# BR2_PACKAGE_SAMBA_TESTPARM is not set
+# BR2_PACKAGE_SAMBA_WINBINDD is not set
 # BR2_PACKAGE_SOCAT is not set
 # BR2_PACKAGE_STUNNEL is not set
 # BR2_PACKAGE_TCPDUMP is not set
 # BR2_PACKAGE_DHCPDUMP is not set
 # BR2_PACKAGE_TFTPD is not set
-# BR2_PACKAGE_LIGHTTPD is not set
-# BR2_PACKAGE_THTTPD is not set
-# BR2_PACKAGE_TINYHTTPD is not set
 # BR2_PACKAGE_TN5250 is not set
 # BR2_PACKAGE_TTCP is not set
-# BR2_PACKAGE_VPNC is not set
+
+#
+# vpnc		- disabled (requires libgcrypt and libgpg_error)
+#
 # BR2_PACKAGE_VTUN is not set
-# BR2_PACKAGE_WGET is not set
-# BR2_PACKAGE_WIRELESS_TOOLS is not set
+BR2_PACKAGE_WIRELESS_TOOLS=y
 BR2_BLOCKDEV_SUPPORT=y
-# BR2_PACKAGE_DBUS is not set
+
+#
+# dbus not available (need expat or libxml2)
+#
 # BR2_PACKAGE_DM is not set
 # BR2_PACKAGE_DMRAID is not set
 # BR2_PACKAGE_E2FSPROGS is not set
+# BR2_PACKAGE_LIBFUSE is not set
 # BR2_PACKAGE_GADGETFS_TEST is not set
 # BR2_PACKAGE_HAL is not set
-# BR2_PACKAGE_HDPARM is not set
-# BR2_PACKAGE_HOTPLUG is not set
 # BR2_PACKAGE_HWDATA is not set
 # BR2_PACKAGE_IOSTAT is not set
 # BR2_PACKAGE_LIBAIO is not set
@@ -448,39 +495,31 @@ BR2_PACKAGE_MTD_UTILS=y
 #
 BR2_PACKAGE_MTD_FLASH_ERASE=y
 BR2_PACKAGE_MTD_FLASH_ERASEALL=y
-# BR2_PACKAGE_MTD_FLASH_INFO is not set
+BR2_PACKAGE_MTD_FLASH_INFO=y
 # BR2_PACKAGE_MTD_FLASH_LOCK is not set
 # BR2_PACKAGE_MTD_FLASH_UNLOCK is not set
-# BR2_PACKAGE_MTD_FLASHCP is not set
+BR2_PACKAGE_MTD_FLASHCP=y
 # BR2_PACKAGE_MTD_ERASE is not set
-BR2_PACKAGE_MTD_JFFS2DUMP=y
+# BR2_PACKAGE_MTD_JFFS2DUMP is not set
 # BR2_PACKAGE_MTD_JFFS3DUMP is not set
 # BR2_PACKAGE_MTD_SUMTOOL is not set
 # BR2_PACKAGE_MTD_FTL_CHECK is not set
 # BR2_PACKAGE_MTD_FTL_FORMAT is not set
 # BR2_PACKAGE_MTD_NFTL_FORMAT is not set
 # BR2_PACKAGE_MTD_NFTLDUMP is not set
-BR2_PACKAGE_MTD_MKFSJFFS2=y
+# BR2_PACKAGE_MTD_MKFSJFFS2 is not set
 # BR2_PACKAGE_MTD_MKFSJFFS is not set
 # BR2_PACKAGE_MTD_NANDDUMP is not set
 # BR2_PACKAGE_MTD_NANDWRITE is not set
 BR2_PACKAGE_MTD_MTD_DEBUG=y
 # BR2_PACKAGE_MTD_DOCFDISK is not set
 # BR2_PACKAGE_MTD_DOC_LOADBIOS is not set
+# BR2_PACKAGE_NTFS-3G is not set
 # BR2_PACKAGE_PCIUTILS is not set
 # BR2_PACKAGE_PCMCIA is not set
 # BR2_PACKAGE_RAIDTOOLS is not set
 # BR2_PACKAGE_SETSERIAL is not set
-# BR2_PACKAGE_SFDISK is not set
 # BR2_PACKAGE_SMARTMONTOOLS is not set
-BR2_PACKAGE_UDEV=y
-BR2_PACKAGE_UDEV_UTILS=y
-
-#
-# Extra udev tools
-#
-# BR2_PACKAGE_UDEV_VOLUME_ID is not set
-# BR2_PACKAGE_UDEV_SCSI_ID is not set
 # BR2_PACKAGE_USBMOUNT is not set
 # BR2_PACKAGE_USBUTILS is not set
 # BR2_PACKAGE_WIPE is not set
@@ -488,13 +527,18 @@ BR2_PACKAGE_UDEV_UTILS=y
 # BR2_AUDIO_SUPPORT is not set
 # BR2_GRAPHIC_SUPPORT is not set
 BR2_COMPRESSOR_SUPPORT=y
-# BR2_PACKAGE_GZIP is not set
 BR2_PACKAGE_LZO=y
 # BR2_PACKAGE_LZMA_TARGET is not set
 # BR2_PACKAGE_LZMA_HOST is not set
 BR2_PACKAGE_ZLIB=y
 # BR2_PACKAGE_ZLIB_TARGET_HEADERS is not set
 # BR2_SCRIPTING_SUPPORT is not set
+# BR2_GAMES is not set
+
+#
+# Editors
+#
+# BR2_PACKAGE_VIM is not set
 
 #
 # Target filesystem options
@@ -505,17 +549,7 @@ BR2_PACKAGE_ZLIB=y
 #
 # BR2_TARGET_ROOTFS_CRAMFS is not set
 # BR2_TARGET_ROOTFS_CLOOP is not set
-BR2_TARGET_ROOTFS_EXT2=y
-BR2_TARGET_ROOTFS_EXT2_BLOCKS=0
-BR2_TARGET_ROOTFS_EXT2_INODES=0
-BR2_TARGET_ROOTFS_EXT2_RESBLKS=0
-BR2_TARGET_ROOTFS_EXT2_SQUASH=y
-BR2_TARGET_ROOTFS_EXT2_OUTPUT="$(IMAGE).ext2"
-# BR2_TARGET_ROOTFS_EXT2_NONE is not set
-# BR2_TARGET_ROOTFS_EXT2_GZIP is not set
-BR2_TARGET_ROOTFS_EXT2_BZIP2=y
-# BR2_TARGET_ROOTFS_EXT2_LZMA is not set
-BR2_TARGET_ROOTFS_EXT2_COPYTO=""
+# BR2_TARGET_ROOTFS_EXT2 is not set
 BR2_TARGET_ROOTFS_JFFS2=y
 # BR2_TARGET_ROOTFS_JFFS2_DATAFLASH_1056 is not set
 # BR2_TARGET_ROOTFS_JFFS2_DATAFLASH_528 is not set
@@ -524,19 +558,20 @@ BR2_TARGET_ROOTFS_JFFS2_FLASH_128=y
 # BR2_TARGET_ROOTFS_JFFS2_CUSTOM is not set
 BR2_TARGET_ROOTFS_JFFS2_PAGESIZE=0x1000
 BR2_TARGET_ROOTFS_JFFS2_EBSIZE=0x20000
-# BR2_TARGET_ROOTFS_JFFS2_NOCLEANMARKER is not set
+BR2_TARGET_ROOTFS_JFFS2_NOCLEANMARKER=y
 # BR2_JFFS2_TARGET_SREC is not set
 # BR2_TARGET_ROOTFS_JFFS2_PAD is not set
 # BR2_TARGET_ROOTFS_JFFS2_LE is not set
 BR2_TARGET_ROOTFS_JFFS2_BE=y
 # BR2_TARGET_ROOTFS_JFFS2_SQUASH is not set
+# BR2_TARGET_ROOTFS_JFFS2_SUMMARY is not set
 BR2_TARGET_ROOTFS_JFFS2_OUTPUT="$(IMAGE).jffs2"
 BR2_TARGET_ROOTFS_JFFS2_COPYTO=""
 # BR2_TARGET_ROOTFS_SQUASHFS is not set
 BR2_TARGET_ROOTFS_TAR=y
-# BR2_TARGET_ROOTFS_TAR_NONE is not set
+BR2_TARGET_ROOTFS_TAR_NONE=y
 # BR2_TARGET_ROOTFS_TAR_GZIP is not set
-BR2_TARGET_ROOTFS_TAR_BZIP2=y
+# BR2_TARGET_ROOTFS_TAR_BZIP2 is not set
 # BR2_TARGET_ROOTFS_TAR_LZMA is not set
 BR2_TARGET_ROOTFS_TAR_OPTIONS=""
 BR2_TARGET_ROOTFS_TAR_COPYTO=""
@@ -546,6 +581,15 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
 #
 # bootloader for target device
 #
+BR2_TARGET_U_BOOT=y
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE=""
+BR2_TARGET_U_BOOT_CONFIG_BOARD="$(BR2_BOARD_NAME)_config"
+BR2_TARGET_U_BOOT_SERVERIP=""
+BR2_TARGET_U_BOOT_IPADDR=""
+BR2_TARGET_U_BOOT_ETH0ADDR=""
+BR2_TARGET_U_BOOT_ETH1ADDR=""
+BR2_TARGET_U_BOOT_BOOTARGS="console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
+BR2_TARGET_U_BOOT_BOOTCMD="fsload 0x90300000 /boot/uImage; bootm"
 
 #
 # Kernel
@@ -555,15 +599,17 @@ BR2_KERNEL_LINUX_ADVANCED=y
 # BR2_KERNEL_LINUX is not set
 # BR2_KERNEL_HURD is not set
 BR2_PACKAGE_LINUX=y
-BR2_PACKAGE_LINUX_KCONFIG="$(BOARD_PATH)/$(BOARD_NAME)-linux-$(LINUX26_VERSION).config"
+BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-2.6.22.5.config"
 BR2_PACKAGE_LINUX_FORMAT="uImage"
-BR2_KERNEL_CURRENT_VERSION="2.6.23.1"
+BR2_KERNEL_CURRENT_VERSION="2.6.24"
+BR2_KERNEL_THIS_VERSION="2.6.24"
 BR2_KERNEL_SITE="http://ftp.kernel.org/pub/linux/kernel/v2.6/"
 BR2_MM_PATCH_SITE="http://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6"
 BR2_RC_MM_PATCH_DIR="$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)/2.6.$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)-mm$(BR2_KERNEL_MM_LEVEL)"
 # BR2_LINUX_2_6_STABLE is not set
+BR2_LINUX_2_6_24=y
 # BR2_LINUX_2_6_23 is not set
-BR2_LINUX_2_6_22_10=y
+# BR2_LINUX_2_6_22_10 is not set
 # BR2_LINUX_2_6_22_1 is not set
 # BR2_LINUX_2_6_22 is not set
 # BR2_LINUX_2_6_21_7 is not set
@@ -575,13 +621,22 @@ BR2_LINUX_2_6_22_10=y
 #
 # Patches
 #
+BR2_KERNEL_ADD_NO_PATCH=y
+# BR2_KERNEL_ADD_LATEST_MINORPATCH is not set
+# BR2_KERNEL_ADD_MINORPATCH is not set
+# BR2_KERNEL_ADD_LATEST_RC_PATCH is not set
+# BR2_KERNEL_ADD_RC_PATCH is not set
+# BR2_KERNEL_ADD_LATEST_SNAPSHOT is not set
+# BR2_KERNEL_ADD_SNAPSHOT is not set
+# BR2_KERNEL_ADD_LATEST_MM_PATCH is not set
+# BR2_KERNEL_ADD_MM_PATCH is not set
 # BR2_KERNEL_ADD_PATCH is not set
 BR2_LINUX_BSP_PATCH=""
-BR2_KERNEL_PREPATCHED=y
-# BR2_KERNEL_BASE is not set
+# BR2_KERNEL_PREPATCHED is not set
+BR2_KERNEL_BASE=y
 # BR2_KERNEL_LATEST is not set
-BR2_DOWNLOAD_LINUX26_VERSION="2.6.22.10"
-BR2_LINUX26_VERSION="2.6.22.10"
+BR2_DOWNLOAD_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
+BR2_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
 
 #
 # Linux Kernel Configuration
@@ -598,7 +653,7 @@ BR2_LINUX_BIN_UIMAGE=y
 #
 # Destinations for linux kernel binaries
 #
-# BR2_LINUX_COPYTO_ROOTFS is not set
-BR2_LINUX_COPYTO_TFTPBOOT=y
-BR2_LINUX_COPYTO=""
-BR2_LINUX_COPY_CONFIGURATION=y
+BR2_LINUX_COPYTO_ROOTFS=y
+# BR2_LINUX_COPYTO_TFTPBOOT is not set
+BR2_LINUX_COPYTO="n"
+# BR2_LINUX_COPY_CONFIGURATION is not set
diff --git a/target/device/Atmel/atngw100_expanded_defconfig b/target/device/Atmel/atngw100_expanded_defconfig
new file mode 100644
index 000000000..ae1bea900
--- /dev/null
+++ b/target/device/Atmel/atngw100_expanded_defconfig
@@ -0,0 +1,1082 @@
+#
+# Automatically generated make config: don't edit
+# Fri Feb 29 07:33:04 2008
+#
+BR2_HAVE_DOT_CONFIG=y
+BR2_VERSION="0.10.0-svn"
+# BR2_alpha is not set
+# BR2_arm is not set
+# BR2_armeb is not set
+BR2_avr32=y
+# BR2_cris is not set
+# BR2_ia64 is not set
+# BR2_i386 is not set
+# BR2_m68k is not set
+# BR2_mips is not set
+# BR2_mipsel is not set
+# BR2_nios2 is not set
+# BR2_powerpc is not set
+# BR2_s390 is not set
+# BR2_sh is not set
+# BR2_sh64 is not set
+# BR2_sparc is not set
+# BR2_sparc64 is not set
+# BR2_x86_64 is not set
+BR2_at32ap7000=y
+# BR2_at32ap7001 is not set
+# BR2_at32ap7002 is not set
+BR2_ARCH="avr32"
+BR2_ENDIAN="BIG"
+
+#
+# Target options
+#
+
+#
+# Project Options
+#
+BR2_PROJECT="atngw100-expanded"
+BR2_HOSTNAME="ngw.example.net"
+BR2_BANNER="ATNGW100 ($(DATE))"
+
+#
+# Preset Devices
+#
+BR2_TARGET_ATMEL=y
+
+#
+# Atmel AVR32 Specific Device Support
+#
+BR2_TARGET_AVR32=y
+BR2_TARGET_AT32AP7000=y
+# BR2_TARGET_AT32AP7001 is not set
+# BR2_TARGET_AT32AP7002 is not set
+
+#
+# Development board support
+#
+# BR2_TARGET_AVR32_ATSTK1002 is not set
+# BR2_TARGET_AVR32_ATNGW100 is not set
+# BR2_TARGET_AVR32_ATNGW100_BASE is not set
+BR2_TARGET_AVR32_ATNGW100_EXPANDED=y
+BR2_BOARD_NAME="atngw100-expanded"
+
+#
+# Package support
+#
+
+#
+# Secondary locations
+#
+BR2_TARGET_ATMEL_COPYTO=""
+BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
+# BR2_TARGET_VALKA is not set
+
+#
+# Generic System Support
+#
+# BR2_TARGET_GENERIC_ACCESS_POINT is not set
+# BR2_TARGET_GENERIC_FIREWALL is not set
+# BR2_TARGET_GENERIC_DEV_SYSTEM is not set
+
+#
+# Build options
+#
+BR2_WGET="wget --passive-ftp --retry-connrefused --waitretry=10"
+BR2_SVN_CO="svn co"
+BR2_SVN_UP="svn up"
+BR2_GIT="git clone"
+BR2_ZCAT="zcat"
+BR2_BZCAT="bzcat"
+BR2_TAR_OPTIONS=""
+BR2_DL_DIR="$(BASE_DIR)/src/dl"
+
+#
+# Mirrors and Download locations
+#
+BR2_SOURCEFORGE_MIRROR="easynews"
+BR2_KERNEL_MIRROR="http://www.kernel.org/pub/"
+BR2_GNU_MIRROR="http://ftp.gnu.org/pub/gnu"
+BR2_DEBIAN_MIRROR="http://ftp.debian.org"
+
+#
+# Atmel Mirrors
+#
+BR2_ATMEL_MIRROR="ftp://at91dist:distrib@81.80.104.162/AT91_Third_Party_Design_Flow/Linux_Host/Source"
+BR2_AT91_PATCH_MIRROR="http://maxim.org.za/AT91RM9200/2.6/"
+BR2_STAGING_DIR="$(BUILD_DIR)/staging_dir"
+BR2_FPU_SUFFIX=y
+BR2_TOPDIR_PREFIX=""
+BR2_TOPDIR_SUFFIX=""
+BR2_ROOTFS_PREFIX="rootfs"
+BR2_ROOTFS_SUFFIX="$(DATE)"
+BR2_GNU_BUILD_SUFFIX="pc-linux-gnu"
+BR2_GNU_TARGET_SUFFIX="linux-uclibc"
+BR2_JLEVEL=1
+# BR2_PREFER_IMA is not set
+# BR2_DEPRECATED is not set
+BR2_RECENT=y
+BR2_STRIP_strip=y
+# BR2_STRIP_sstrip is not set
+# BR2_STRIP_none is not set
+# BR2_PREFER_STATIC_LIB is not set
+BR2_HAVE_MANPAGES=y
+BR2_HAVE_INFOPAGES=y
+BR2_UPDATE_CONFIG=y
+
+#
+# Toolchain
+#
+BR2_TOOLCHAIN_BUILDROOT=y
+# BR2_TOOLCHAIN_EXTERNAL is not set
+# BR2_TOOLCHAIN_EXTERNAL_SOURCE is not set
+BR2_TOOLCHAIN_SOURCE=y
+BR2_EXT_GCC_VERSION_4_1_2=y
+BR2_EXT_GCC_VERSION_4_2_1=y
+BR2_EXT_BINUTILS_VERSION_2_17=y
+BR2_EXT_UCLIBC_VERSION_0_9_29=y
+BR2_EXT_UCLIBC_VERSION_0_9_28_3=y
+
+#
+# Kernel Header Options
+#
+# BR2_KERNEL_HEADERS_2_4_25 is not set
+# BR2_KERNEL_HEADERS_2_4_27 is not set
+# BR2_KERNEL_HEADERS_2_4_29 is not set
+# BR2_KERNEL_HEADERS_2_4_31 is not set
+# BR2_KERNEL_HEADERS_2_6_9 is not set
+# BR2_KERNEL_HEADERS_2_6_11 is not set
+# BR2_KERNEL_HEADERS_2_6_12 is not set
+# BR2_KERNEL_HEADERS_2_6_20_4 is not set
+# BR2_KERNEL_HEADERS_2_6_20 is not set
+# BR2_KERNEL_HEADERS_2_6_21_5 is not set
+# BR2_KERNEL_HEADERS_2_6_21 is not set
+# BR2_KERNEL_HEADERS_2_6_22_1 is not set
+# BR2_KERNEL_HEADERS_2_6_22_10 is not set
+# BR2_KERNEL_HEADERS_2_6_22 is not set
+# BR2_KERNEL_HEADERS_2_6_23 is not set
+BR2_KERNEL_HEADERS_2_6_24=y
+# BR2_KERNEL_HEADERS_SNAP is not set
+BR2_DEFAULT_KERNEL_HEADERS="2.6.24"
+
+#
+# uClibc Options
+#
+# BR2_UCLIBC_VERSION_0_9_28_3 is not set
+BR2_UCLIBC_VERSION_0_9_29=y
+# BR2_UCLIBC_VERSION_SNAPSHOT is not set
+BR2_UCLIBC_CONFIG="target/device/Atmel/uClibc.config.avr32"
+BR2_ENABLE_LOCALE=y
+# BR2_PTHREADS_NONE is not set
+# BR2_PTHREADS is not set
+BR2_PTHREADS_OLD=y
+# BR2_PTHREADS_NATIVE is not set
+# BR2_PTHREAD_DEBUG is not set
+# BR2_UCLIBC_PROGRAM_INVOCATION is not set
+
+#
+# Binutils Options
+#
+BR2_BINUTILS_VERSION_2_17=y
+# BR2_BINUTILS_VERSION_2_17_50_0_17 is not set
+# BR2_BINUTILS_VERSION_2_18 is not set
+# BR2_BINUTILS_VERSION_2_18_50_0_1 is not set
+BR2_BINUTILS_VERSION="2.17"
+BR2_EXTRA_BINUTILS_CONFIG_OPTIONS=""
+
+#
+# GCC Options
+#
+# BR2_GCC_VERSION_3_4_6 is not set
+# BR2_GCC_VERSION_4_0_4 is not set
+# BR2_GCC_VERSION_4_1_2 is not set
+# BR2_GCC_VERSION_4_2_0 is not set
+BR2_GCC_VERSION_4_2_1=y
+BR2_GCC_SUPPORTS_SYSROOT=y
+# BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE is not set
+BR2_GCC_VERSION="4.2.1"
+BR2_TOOLCHAIN_SYSROOT=y
+# BR2_GCC_USE_SJLJ_EXCEPTIONS is not set
+BR2_EXTRA_GCC_CONFIG_OPTIONS=""
+BR2_GCC_CROSS_CXX=y
+BR2_INSTALL_LIBSTDCPP=y
+BR2_GCC_SHARED_LIBGCC=y
+
+#
+# Ccache Options
+#
+# BR2_CCACHE is not set
+
+#
+# Gdb Options
+#
+# BR2_PACKAGE_GDB is not set
+BR2_PACKAGE_GDB_SERVER=y
+BR2_PACKAGE_GDB_HOST=y
+# BR2_GDB_VERSION_6_2_1 is not set
+# BR2_GDB_VERSION_6_3 is not set
+BR2_GDB_VERSION_6_4=y
+# BR2_GDB_VERSION_6_5 is not set
+# BR2_GDB_VERSION_6_6 is not set
+# BR2_GDB_VERSION_SNAPSHOT is not set
+BR2_GDB_VERSION="6.4"
+
+#
+# elf2flt
+#
+# BR2_ELF2FLT is not set
+# BR2_MKLIBS is not set
+
+#
+# Common Toolchain Options
+#
+# BR2_PACKAGE_SSTRIP_TARGET is not set
+# BR2_PACKAGE_SSTRIP_HOST is not set
+# BR2_ENABLE_MULTILIB is not set
+BR2_LARGEFILE=y
+BR2_INET_IPV6=y
+BR2_INET_RPC=y
+BR2_USE_WCHAR=y
+BR2_SOFT_FLOAT=y
+BR2_TARGET_OPTIMIZATION="-Os -pipe"
+BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
+
+#
+# Package Selection for the target
+#
+BR2_PACKAGE_BUSYBOX=y
+# BR2_BUSYBOX_VERSION_1_2_2_1 is not set
+# BR2_BUSYBOX_VERSION_1_6_1 is not set
+# BR2_BUSYBOX_VERSION_1_7_X is not set
+# BR2_BUSYBOX_VERSION_1_8_X is not set
+BR2_BUSYBOX_VERSION_1_9_X=y
+# BR2_PACKAGE_BUSYBOX_SNAPSHOT is not set
+BR2_BUSYBOX_VERSION="1.9.1"
+BR2_PACKAGE_BUSYBOX_INSTALL_SYMLINKS=y
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_BOARD_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config"
+BR2_PACKAGE_BUSYBOX_HIDE_OTHERS=y
+BR2_PACKAGE_BUSYBOX_SKELETON=y
+
+#
+# The minimum needed to build a uClibc development system
+#
+# BR2_PACKAGE_BASH is not set
+BR2_PACKAGE_BZIP2=y
+# BR2_PACKAGE_DIFFUTILS is not set
+# BR2_PACKAGE_FLEX is not set
+# BR2_PACKAGE_GCC_TARGET is not set
+# BR2_PACKAGE_MAKE is not set
+
+#
+# Other development stuff
+#
+# BR2_PACKAGE_AUTOCONF is not set
+# BR2_PACKAGE_AUTOMAKE is not set
+# BR2_PACKAGE_BISON is not set
+# BR2_PACKAGE_CCACHE_TARGET is not set
+# BR2_PACKAGE_CVS is not set
+# BR2_PACKAGE_DISTCC is not set
+# BR2_PACKAGE_DMALLOC is not set
+BR2_PACKAGE_EXPAT=y
+# BR2_PACKAGE_FAKEROOT is not set
+BR2_HOST_FAKEROOT=y
+BR2_PACKAGE_GETTEXT=y
+BR2_PACKAGE_LIBINTL=y
+# BR2_PACKAGE_LIBGMP is not set
+# BR2_PACKAGE_LIBMPFR is not set
+# BR2_PACKAGE_LIBTOOL is not set
+# BR2_PACKAGE_M4 is not set
+BR2_PACKAGE_PKGCONFIG=y
+BR2_READLINE=y
+# BR2_PACKAGE_READLINE_TARGET is not set
+# BR2_PACKAGE_XERCES is not set
+
+#
+# Other stuff
+#
+# BR2_PACKAGE_AT is not set
+# BR2_PACKAGE_BERKELEYDB is not set
+# BR2_PACKAGE_BSDIFF is not set
+# BR2_PACKAGE_CUSTOMIZE is not set
+# BR2_PACKAGE_DASH is not set
+# BR2_PACKAGE_FCONFIG is not set
+# BR2_PACKAGE_FILE is not set
+# BR2_PACKAGE_FIS is not set
+# BR2_PACKAGE_KEXEC is not set
+BR2_PACKAGE_ICU=y
+BR2_PACKAGE_IPKG=y
+BR2_PACKAGE_CUPS=y
+BR2_PACKAGE_NG_SPICE_REWORK=y
+BR2_PACKAGE_GAMIN=y
+BR2_PACKAGE_STARTUP_NOTIFICATION=y
+# BR2_JAVA_SUPPORT is not set
+BR2_PACKAGE_LIBDAEMON=y
+# BR2_PACKAGE_LIBELF is not set
+# BR2_PACKAGE_LIBEVENT is not set
+# BR2_PACKAGE_LIBFLOAT is not set
+# BR2_PACKAGE_LIBGCRYPT is not set
+# BR2_PACKAGE_LIBGPG_ERROR is not set
+# BR2_PACKAGE_LIBLOCKFILE is not set
+# BR2_PACKAGE_LIBSYSFS is not set
+BR2_PACKAGE_LIBXML2=y
+# BR2_PACKAGE_LIBXML2_TARGET_HEADERS is not set
+BR2_PACKAGE_LIBXSLT=y
+# BR2_PACKAGE_LOCKFILE_PROGS is not set
+# BR2_PACKAGE_LSOF is not set
+# BR2_PACKAGE_LTP-TESTSUITE is not set
+# BR2_PACKAGE_LTRACE is not set
+# BR2_PACKAGE_LTT is not set
+# BR2_PACKAGE_PORTAGE is not set
+BR2_PACKAGE_SQLITE=y
+BR2_PACKAGE_STRACE=y
+# BR2_PACKAGE_SUDO is not set
+BR2_NETWORK_SUPPORT=y
+
+#
+# Networking applications
+#
+
+#
+# argus		- disabled (requires libpcap)
+#
+# BR2_PACKAGE_AVAHI is not set
+# BR2_PACKAGE_BOA is not set
+# BR2_PACKAGE_BIND is not set
+BR2_PACKAGE_BRIDGE=y
+BR2_PACKAGE_CURL=y
+# BR2_PACKAGE_LIBCURL is not set
+BR2_PACKAGE_DNSMASQ=y
+BR2_PACKAGE_DROPBEAR=y
+# BR2_PACKAGE_ETHTOOL is not set
+BR2_PACKAGE_HASERL=y
+# BR2_PACKAGE_HASERL_VERSION_0_8_0 is not set
+BR2_PACKAGE_HASERL_VERSION_0_9_21=y
+BR2_PACKAGE_HASERL_VERSION="0.9.21"
+# BR2_PACKAGE_IRDA_UTILS is not set
+# BR2_PACKAGE_IPERF is not set
+# BR2_PACKAGE_IPROUTE2 is not set
+
+#
+# ipsec-tools	- disabled (requires openssl, flex and the flex library (libfl.a) )
+#
+BR2_PACKAGE_IPTABLES=y
+# BR2_PACKAGE_KISMET is not set
+# BR2_PACKAGE_L2TP is not set
+# BR2_PACKAGE_LIBCGI is not set
+# BR2_PACKAGE_LIBCGICC is not set
+# BR2_PACKAGE_LIBEXOSIP2 is not set
+# BR2_PACKAGE_LIBOSIP2 is not set
+# BR2_PACKAGE_LIBPCAP is not set
+# BR2_PACKAGE_LINKS is not set
+BR2_PACKAGE_LRZSZ=y
+# BR2_PACKAGE_MDNSRESPONDER is not set
+# BR2_PACKAGE_MICROCOM is not set
+# BR2_PACKAGE_MROUTED is not set
+# BR2_PACKAGE_MUTT is not set
+BR2_PACKAGE_NBD=y
+BR2_PACKAGE_NCFTP=y
+
+#
+# ncFTP tools selection
+#
+BR2_PACKAGE_NCFTP_GET=y
+BR2_PACKAGE_NCFTP_PUT=y
+BR2_PACKAGE_NCFTP_LS=y
+# BR2_PACKAGE_NCFTP_BATCH is not set
+# BR2_PACKAGE_NCFTP_SPOOLER is not set
+# BR2_PACKAGE_NCFTP_BOOKMARKS is not set
+# BR2_PACKAGE_NETKITBASE is not set
+# BR2_PACKAGE_NETKITTELNET is not set
+# BR2_PACKAGE_NETPLUG is not set
+# BR2_PACKAGE_NETSNMP is not set
+# BR2_PACKAGE_NFS_UTILS is not set
+BR2_PACKAGE_NTP=y
+# BR2_PACKAGE_NTP_SNTP is not set
+# BR2_PACKAGE_OLSR is not set
+# BR2_PACKAGE_OPENNTPD is not set
+# BR2_PACKAGE_OPENSSH is not set
+# BR2_PACKAGE_OPENSSL is not set
+# BR2_PACKAGE_OPENVPN is not set
+# BR2_PACKAGE_OPENSWAN is not set
+BR2_PACKAGE_PORTMAP=y
+# BR2_PACKAGE_PPPD is not set
+# BR2_PACKAGE_RP_PPPOE is not set
+# BR2_PACKAGE_PPTP_LINUX is not set
+BR2_PACKAGE_PROFTPD=y
+# BR2_PACKAGE_QUAGGA is not set
+
+#
+# quagga suite
+#
+# BR2_PACKAGE_QUAGGA_ZEBRA is not set
+# BR2_PACKAGE_QUAGGA_BGPD is not set
+# BR2_PACKAGE_QUAGGA_RIPD is not set
+# BR2_PACKAGE_QUAGGA_RIPNGD is not set
+# BR2_PACKAGE_QUAGGA_OSPFD is not set
+# BR2_PACKAGE_QUAGGA_OSPF6D is not set
+# BR2_PACKAGE_QUAGGA_WATCHQUAGGA is not set
+# BR2_PACKAGE_QUAGGA_ISISD is not set
+BR2_PACKAGE_RSYNC=y
+# BR2_PACKAGE_SAMBA is not set
+# BR2_PACKAGE_SOCAT is not set
+# BR2_PACKAGE_STUNNEL is not set
+# BR2_PACKAGE_TCPDUMP is not set
+# BR2_PACKAGE_DHCPDUMP is not set
+# BR2_PACKAGE_TFTPD is not set
+# BR2_PACKAGE_TN5250 is not set
+# BR2_PACKAGE_TTCP is not set
+
+#
+# vpnc		- disabled (requires libgcrypt and libgpg_error)
+#
+# BR2_PACKAGE_VTUN is not set
+BR2_PACKAGE_WIRELESS_TOOLS=y
+BR2_BLOCKDEV_SUPPORT=y
+# BR2_PACKAGE_DBUS is not set
+# BR2_PACKAGE_DM is not set
+# BR2_PACKAGE_DMRAID is not set
+# BR2_PACKAGE_E2FSPROGS is not set
+# BR2_PACKAGE_LIBFUSE is not set
+# BR2_PACKAGE_GADGETFS_TEST is not set
+# BR2_PACKAGE_HAL is not set
+# BR2_PACKAGE_HWDATA is not set
+# BR2_PACKAGE_IOSTAT is not set
+# BR2_PACKAGE_LIBAIO is not set
+# BR2_PACKAGE_LIBRAW1394 is not set
+# BR2_PACKAGE_LIBUSB is not set
+# BR2_PACKAGE_LM_SENSORS is not set
+# BR2_PACKAGE_LVM2 is not set
+# BR2_PACKAGE_MDADM is not set
+# BR2_PACKAGE_MEMTESTER is not set
+# BR2_PACKAGE_MKDOSFS is not set
+BR2_PACKAGE_MTD=y
+BR2_PACKAGE_MTD_UTILS=y
+# BR2_PACKAGE_MTD_20061007 is not set
+# BR2_PACKAGE_MTD_20050122 is not set
+# BR2_PACKAGE_MTD_SNAPSHOT is not set
+
+#
+# MTD tools selection
+#
+BR2_PACKAGE_MTD_FLASH_ERASE=y
+BR2_PACKAGE_MTD_FLASH_ERASEALL=y
+BR2_PACKAGE_MTD_FLASH_INFO=y
+BR2_PACKAGE_MTD_FLASH_LOCK=y
+BR2_PACKAGE_MTD_FLASH_UNLOCK=y
+BR2_PACKAGE_MTD_FLASHCP=y
+BR2_PACKAGE_MTD_ERASE=y
+BR2_PACKAGE_MTD_JFFS2DUMP=y
+BR2_PACKAGE_MTD_JFFS3DUMP=y
+BR2_PACKAGE_MTD_SUMTOOL=y
+BR2_PACKAGE_MTD_FTL_CHECK=y
+BR2_PACKAGE_MTD_FTL_FORMAT=y
+BR2_PACKAGE_MTD_NFTL_FORMAT=y
+BR2_PACKAGE_MTD_NFTLDUMP=y
+BR2_PACKAGE_MTD_MKFSJFFS2=y
+BR2_PACKAGE_MTD_MKFSJFFS=y
+BR2_PACKAGE_MTD_NANDDUMP=y
+BR2_PACKAGE_MTD_NANDWRITE=y
+BR2_PACKAGE_MTD_MTD_DEBUG=y
+BR2_PACKAGE_MTD_DOCFDISK=y
+BR2_PACKAGE_MTD_DOC_LOADBIOS=y
+# BR2_PACKAGE_NTFS-3G is not set
+# BR2_PACKAGE_PCIUTILS is not set
+# BR2_PACKAGE_PCMCIA is not set
+# BR2_PACKAGE_RAIDTOOLS is not set
+# BR2_PACKAGE_SETSERIAL is not set
+# BR2_PACKAGE_SMARTMONTOOLS is not set
+# BR2_PACKAGE_USBMOUNT is not set
+# BR2_PACKAGE_USBUTILS is not set
+# BR2_PACKAGE_WIPE is not set
+# BR2_PACKAGE_XFSPROGS is not set
+BR2_AUDIO_SUPPORT=y
+BR2_PACKAGE_ALSA_LIB=y
+BR2_PACKAGE_ALSA_UTILS=y
+
+#
+# ALSA utils selection
+#
+BR2_PACKAGE_ALSA_UTILS_ALSACONF=y
+BR2_PACKAGE_ALSA_UTILS_ALSACTL=y
+BR2_PACKAGE_ALSA_UTILS_ALSAMIXER=y
+# BR2_PACKAGE_ALSA_UTILS_AMIDI is not set
+# BR2_PACKAGE_ALSA_UTILS_AMIXER is not set
+# BR2_PACKAGE_ALSA_UTILS_APLAY is not set
+# BR2_PACKAGE_ALSA_UTILS_ARECORD is not set
+# BR2_PACKAGE_ALSA_UTILS_IECSET is not set
+# BR2_PACKAGE_ALSA_UTILS_ACONNECT is not set
+# BR2_PACKAGE_ALSA_UTILS_APLAYMIDI is not set
+# BR2_PACKAGE_ALSA_UTILS_ARECORDMIDI is not set
+# BR2_PACKAGE_ALSA_UTILS_ASEQDUMP is not set
+# BR2_PACKAGE_ALSA_UTILS_ASEQNET is not set
+BR2_PACKAGE_ALSA_UTILS_SPEAKER_TEST=y
+
+#
+# asterisk	- disabled (required openssl and mpg123)
+#
+# BR2_PACKAGE_AUMIX is not set
+BR2_PACKAGE_LIBID3TAG=y
+BR2_PACKAGE_LIBMAD=y
+# BR2_PACKAGE_LIBMAD_TARGET_HEADERS is not set
+# BR2_PACKAGE_LIBOGG is not set
+# BR2_PACKAGE_LIBSNDFILE is not set
+
+#
+# libvorbis requires the package libogg to build
+#
+BR2_PACKAGE_MADPLAY=y
+BR2_PACKAGE_MADPLAY_ALSA=y
+# BR2_PACKAGE_MPG123 is not set
+BR2_PACKAGE_MPG123_ALSA=y
+# BR2_PACKAGE_SPEEX is not set
+BR2_GRAPHIC_SUPPORT=y
+
+#
+# text rendering libraries
+#
+BR2_PACKAGE_NCURSES=y
+# BR2_PACKAGE_NCURSES_TARGET_HEADERS is not set
+# BR2_PACKAGE_NEWT is not set
+# BR2_PACKAGE_SLANG is not set
+
+#
+# text rendering applications
+#
+# BR2_PACKAGE_DIALOG is not set
+
+#
+# graphic libraries
+#
+# BR2_PACKAGE_DIRECTFB is not set
+# BR2_PACKAGE_IMAGEMAGICK is not set
+BR2_PACKAGE_JPEG=y
+BR2_PACKAGE_LIBPNG=y
+# BR2_PACKAGE_LIBUNGIF is not set
+# BR2_PACKAGE_SDL is not set
+# BR2_PACKAGE_SDL_TTF is not set
+BR2_PACKAGE_TIFF=y
+
+#
+# busybox graphic applications
+#
+
+#
+# --> (May be broken in busybox)
+#
+# BR2_PACKAGE_FBV is not set
+# BR2_PACKAGE_FBSET is not set
+
+#
+# other GUIs
+#
+# BR2_PACKAGE_QTE is not set
+# BR2_PACKAGE_QTOPIA4 is not set
+# BR2_PACKAGE_XSERVER_none is not set
+BR2_PACKAGE_XSERVER_x11r7=y
+# BR2_PACKAGE_XSERVER_xorg is not set
+# BR2_PACKAGE_XSERVER_tinyx is not set
+BR2_X11_PREFIX="/usr"
+BR2_PACKAGE_XORG7=y
+
+#
+# X11R7 Servers
+#
+BR2_PACKAGE_XSERVER_XORG_SERVER=y
+
+#
+# X11R7 Libraries
+#
+BR2_PACKAGE_LIBXCB=y
+# BR2_PACKAGE_MESA3D is not set
+BR2_PACKAGE_PIXMAN=y
+BR2_PACKAGE_PTHREAD_STUBS=y
+BR2_PACKAGE_XLIB_LIBFS=y
+BR2_PACKAGE_XLIB_LIBICE=y
+BR2_PACKAGE_XLIB_LIBSM=y
+BR2_PACKAGE_XLIB_LIBX11=y
+BR2_PACKAGE_XLIB_LIBXSCRNSAVER=y
+BR2_PACKAGE_XLIB_LIBXTRAP=y
+BR2_PACKAGE_XLIB_LIBXAU=y
+BR2_PACKAGE_XLIB_LIBXAW=y
+BR2_PACKAGE_XLIB_LIBXCOMPOSITE=y
+BR2_PACKAGE_XLIB_LIBXCURSOR=y
+BR2_PACKAGE_XLIB_LIBXDAMAGE=y
+BR2_PACKAGE_XLIB_LIBXDMCP=y
+# BR2_PACKAGE_XLIB_LIBXEVIE is not set
+BR2_PACKAGE_XLIB_LIBXEXT=y
+BR2_PACKAGE_XLIB_LIBXFIXES=y
+BR2_PACKAGE_XLIB_LIBXFONT=y
+BR2_PACKAGE_XLIB_LIBXFONTCACHE=y
+BR2_PACKAGE_XLIB_LIBXFT=y
+BR2_PACKAGE_XLIB_LIBXI=y
+BR2_PACKAGE_XLIB_LIBXINERAMA=y
+BR2_PACKAGE_XLIB_LIBXMU=y
+BR2_PACKAGE_XLIB_LIBXP=y
+BR2_PACKAGE_XLIB_LIBXPM=y
+BR2_PACKAGE_XLIB_LIBXPRINTAPPUTIL=y
+BR2_PACKAGE_XLIB_LIBXPRINTUTIL=y
+BR2_PACKAGE_XLIB_LIBXRANDR=y
+BR2_PACKAGE_XLIB_LIBXRENDER=y
+BR2_PACKAGE_XLIB_LIBXRES=y
+BR2_PACKAGE_XLIB_LIBXT=y
+BR2_PACKAGE_XLIB_LIBXTST=y
+BR2_PACKAGE_XLIB_LIBXV=y
+BR2_PACKAGE_XLIB_LIBXVMC=y
+BR2_PACKAGE_XLIB_LIBXXF86DGA=y
+BR2_PACKAGE_XLIB_LIBXXF86MISC=y
+BR2_PACKAGE_XLIB_LIBXXF86VM=y
+BR2_PACKAGE_XLIB_LIBDMX=y
+BR2_PACKAGE_XLIB_LIBFONTENC=y
+BR2_PACKAGE_XLIB_LIBLBXUTIL=y
+BR2_PACKAGE_XLIB_LIBOLDX=y
+BR2_PACKAGE_XLIB_LIBXKBFILE=y
+BR2_PACKAGE_XLIB_LIBXKBUI=y
+BR2_PACKAGE_XLIB_XTRANS=y
+
+#
+# X11R7 Applications
+#
+BR2_PACKAGE_XAPP_APPRES=y
+BR2_PACKAGE_XAPP_BDFTOPCF=y
+BR2_PACKAGE_XAPP_BEFORELIGHT=y
+BR2_PACKAGE_XAPP_BITMAP=y
+BR2_PACKAGE_XAPP_EDITRES=y
+BR2_PACKAGE_XAPP_FONTTOSFNT=y
+BR2_PACKAGE_XAPP_FSLSFONTS=y
+BR2_PACKAGE_XAPP_FSTOBDF=y
+BR2_PACKAGE_XAPP_ICEAUTH=y
+BR2_PACKAGE_XAPP_ICO=y
+BR2_PACKAGE_XAPP_LBXPROXY=y
+BR2_PACKAGE_XAPP_LISTRES=y
+BR2_PACKAGE_XAPP_LUIT=y
+BR2_PACKAGE_XAPP_MKFONTDIR=y
+BR2_PACKAGE_XAPP_MKFONTSCALE=y
+BR2_PACKAGE_XAPP_OCLOCK=y
+BR2_PACKAGE_XAPP_PROXYMNGR=y
+BR2_PACKAGE_XAPP_RGB=y
+BR2_PACKAGE_XAPP_RSTART=y
+BR2_PACKAGE_XAPP_SCRIPTS=y
+BR2_PACKAGE_XAPP_SESSREG=y
+BR2_PACKAGE_XAPP_SETXKBMAP=y
+BR2_PACKAGE_XAPP_SHOWFONT=y
+BR2_PACKAGE_XAPP_SMPROXY=y
+BR2_PACKAGE_XAPP_TWM=y
+BR2_PACKAGE_XAPP_VIEWRES=y
+BR2_PACKAGE_XAPP_X11PERF=y
+BR2_PACKAGE_XAPP_XAUTH=y
+BR2_PACKAGE_XAPP_XBIFF=y
+BR2_PACKAGE_XAPP_XCALC=y
+BR2_PACKAGE_XAPP_XCLIPBOARD=y
+BR2_PACKAGE_XAPP_XCLOCK=y
+BR2_PACKAGE_XAPP_XCMSDB=y
+BR2_PACKAGE_XAPP_XCURSORGEN=y
+BR2_PACKAGE_XAPP_XDBEDIZZY=y
+BR2_PACKAGE_XAPP_XDITVIEW=y
+BR2_PACKAGE_XAPP_XDM=y
+BR2_PACKAGE_XAPP_XDPYINFO=y
+# BR2_PACKAGE_XAPP_XDRIINFO is not set
+BR2_PACKAGE_XAPP_XEDIT=y
+BR2_PACKAGE_XAPP_XEV=y
+BR2_PACKAGE_XAPP_XEYES=y
+BR2_PACKAGE_XAPP_XF86DGA=y
+BR2_PACKAGE_XAPP_XFD=y
+BR2_PACKAGE_XAPP_XFINDPROXY=y
+BR2_PACKAGE_XAPP_XFONTSEL=y
+BR2_PACKAGE_XAPP_XFS=y
+BR2_PACKAGE_XAPP_XFSINFO=y
+BR2_PACKAGE_XAPP_XFWP=y
+BR2_PACKAGE_XAPP_XGAMMA=y
+BR2_PACKAGE_XAPP_XGC=y
+BR2_PACKAGE_XAPP_XHOST=y
+BR2_PACKAGE_XAPP_XINIT=y
+BR2_PACKAGE_XAPP_XKBCOMP=y
+BR2_PACKAGE_XAPP_XKBEVD=y
+BR2_PACKAGE_XAPP_XKBPRINT=y
+BR2_PACKAGE_XAPP_XKBUTILS=y
+BR2_PACKAGE_XAPP_XKILL=y
+BR2_PACKAGE_XAPP_XLOAD=y
+BR2_PACKAGE_XAPP_XLOGO=y
+BR2_PACKAGE_XAPP_XLSATOMS=y
+BR2_PACKAGE_XAPP_XLSCLIENTS=y
+BR2_PACKAGE_XAPP_XLSFONTS=y
+BR2_PACKAGE_XAPP_XMAG=y
+BR2_PACKAGE_XAPP_XMESSAGE=y
+BR2_PACKAGE_XAPP_XMH=y
+BR2_PACKAGE_XAPP_XMODMAP=y
+BR2_PACKAGE_XAPP_XMORE=y
+BR2_PACKAGE_XAPP_XPHELLOWORLD=y
+BR2_PACKAGE_XAPP_XPLSPRINTERS=y
+BR2_PACKAGE_XAPP_XPR=y
+BR2_PACKAGE_XAPP_XPREHASHPRINTERLIST=y
+BR2_PACKAGE_XAPP_XPROP=y
+BR2_PACKAGE_XAPP_XRANDR=y
+BR2_PACKAGE_XAPP_XRDB=y
+BR2_PACKAGE_XAPP_XREFRESH=y
+BR2_PACKAGE_XAPP_XRX=y
+BR2_PACKAGE_XAPP_XSET=y
+BR2_PACKAGE_XAPP_XSETMODE=y
+BR2_PACKAGE_XAPP_XSETPOINTER=y
+BR2_PACKAGE_XAPP_XSETROOT=y
+BR2_PACKAGE_XAPP_XSM=y
+BR2_PACKAGE_XAPP_XSTDCMAP=y
+BR2_PACKAGE_XAPP_XTRAP=y
+BR2_PACKAGE_XAPP_XVIDTUNE=y
+BR2_PACKAGE_XAPP_XVINFO=y
+BR2_PACKAGE_XAPP_XWD=y
+BR2_PACKAGE_XAPP_XWININFO=y
+BR2_PACKAGE_XAPP_XWUD=y
+
+#
+# X11R7 Drivers
+#
+# BR2_PACKAGE_OPENCHROME is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_ACECAD is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_AIPTEK is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_CALCOMP is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_CITRON is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_DIGITALEDGE is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_DMC is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_DYNAPRO is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_ELO2300 is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_ELOGRAPHICS is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_EVDEV is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_FPIT is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_HYPERPEN is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_JAMSTUDIO is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_JOYSTICK is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_KEYBOARD is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_MAGELLAN is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_MAGICTOUCH is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_MICROTOUCH is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_MOUSE is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_MUTOUCH is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_PALMAX is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_PENMOUNT is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_SPACEORB is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_SUMMA is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_TEK4957 is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_UR98 is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_VMMOUSE is not set
+# BR2_PACKAGE_XDRIVER_XF86_INPUT_VOID is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_APM is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_ARK is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_AST is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_ATI is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_CHIPS is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_CIRRUS is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_CYRIX is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_DUMMY is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_FBDEV is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_GLINT is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_I128 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_I740 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_I810 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_IMSTT is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_MGA is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_NEOMAGIC is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_NEWPORT is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_NSC is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_NV is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_RENDITION is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_S3 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_S3VIRGE is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SAVAGE is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SILICONMOTION is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SIS is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SISUSB is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNBW2 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNCG14 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNCG3 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNCG6 is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNFFB is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNLEO is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_SUNTCX is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_TDFX is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_TGA is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_TRIDENT is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_TSENG is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_V4L is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_VESA is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_VGA is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_VIA is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_VMWARE is not set
+# BR2_PACKAGE_XDRIVER_XF86_VIDEO_VOODOO is not set
+
+#
+# X11R7 Fonts
+#
+BR2_PACKAGE_XFONT_FONT_UTIL=y
+BR2_PACKAGE_XFONT_ENCODINGS=y
+BR2_PACKAGE_XFONT_FONT_ADOBE_100DPI=y
+BR2_PACKAGE_XFONT_FONT_ADOBE_75DPI=y
+BR2_PACKAGE_XFONT_FONT_ADOBE_UTOPIA_100DPI=y
+BR2_PACKAGE_XFONT_FONT_ADOBE_UTOPIA_75DPI=y
+BR2_PACKAGE_XFONT_FONT_ADOBE_UTOPIA_TYPE1=y
+BR2_PACKAGE_XFONT_FONT_ALIAS=y
+BR2_PACKAGE_XFONT_FONT_ARABIC_MISC=y
+BR2_PACKAGE_XFONT_FONT_BH_100DPI=y
+BR2_PACKAGE_XFONT_FONT_BH_75DPI=y
+BR2_PACKAGE_XFONT_FONT_BH_LUCIDATYPEWRITER_100DPI=y
+BR2_PACKAGE_XFONT_FONT_BH_LUCIDATYPEWRITER_75DPI=y
+BR2_PACKAGE_XFONT_FONT_BH_TTF=y
+BR2_PACKAGE_XFONT_FONT_BH_TYPE1=y
+BR2_PACKAGE_XFONT_FONT_BITSTREAM_100DPI=y
+BR2_PACKAGE_XFONT_FONT_BITSTREAM_75DPI=y
+BR2_PACKAGE_XFONT_FONT_BITSTREAM_SPEEDO=y
+BR2_PACKAGE_XFONT_FONT_BITSTREAM_TYPE1=y
+BR2_PACKAGE_XFONT_FONT_CRONYX_CYRILLIC=y
+BR2_PACKAGE_XFONT_FONT_CURSOR_MISC=y
+BR2_PACKAGE_XFONT_FONT_DAEWOO_MISC=y
+BR2_PACKAGE_XFONT_FONT_DEC_MISC=y
+BR2_PACKAGE_XFONT_FONT_IBM_TYPE1=y
+BR2_PACKAGE_XFONT_FONT_ISAS_MISC=y
+BR2_PACKAGE_XFONT_FONT_JIS_MISC=y
+BR2_PACKAGE_XFONT_FONT_MICRO_MISC=y
+BR2_PACKAGE_XFONT_FONT_MISC_CYRILLIC=y
+BR2_PACKAGE_XFONT_FONT_MISC_ETHIOPIC=y
+BR2_PACKAGE_XFONT_FONT_MISC_MELTHO=y
+BR2_PACKAGE_XFONT_FONT_MISC_MISC=y
+BR2_PACKAGE_XFONT_FONT_MUTT_MISC=y
+BR2_PACKAGE_XFONT_FONT_SCHUMACHER_MISC=y
+BR2_PACKAGE_XFONT_FONT_SCREEN_CYRILLIC=y
+BR2_PACKAGE_XFONT_FONT_SONY_MISC=y
+BR2_PACKAGE_XFONT_FONT_SUN_MISC=y
+BR2_PACKAGE_XFONT_FONT_WINITZKI_CYRILLIC=y
+BR2_PACKAGE_XFONT_FONT_XFREE86_TYPE1=y
+
+#
+# X11R7 X protocols
+#
+BR2_PACKAGE_XCB_PROTO=y
+# BR2_PACKAGE_XPROTO_APPLEWMPROTO is not set
+BR2_PACKAGE_XPROTO_BIGREQSPROTO=y
+BR2_PACKAGE_XPROTO_COMPOSITEPROTO=y
+BR2_PACKAGE_XPROTO_DAMAGEPROTO=y
+BR2_PACKAGE_XPROTO_DMXPROTO=y
+BR2_PACKAGE_XPROTO_EVIEEXT=y
+BR2_PACKAGE_XPROTO_FIXESPROTO=y
+BR2_PACKAGE_XPROTO_FONTCACHEPROTO=y
+BR2_PACKAGE_XPROTO_FONTSPROTO=y
+BR2_PACKAGE_XPROTO_GLPROTO=y
+BR2_PACKAGE_XPROTO_INPUTPROTO=y
+BR2_PACKAGE_XPROTO_KBPROTO=y
+BR2_PACKAGE_XPROTO_PRINTPROTO=y
+BR2_PACKAGE_XPROTO_RANDRPROTO=y
+BR2_PACKAGE_XPROTO_RECORDPROTO=y
+BR2_PACKAGE_XPROTO_RENDERPROTO=y
+BR2_PACKAGE_XPROTO_RESOURCEPROTO=y
+BR2_PACKAGE_XPROTO_SCRNSAVERPROTO=y
+BR2_PACKAGE_XPROTO_TRAPPROTO=y
+BR2_PACKAGE_XPROTO_VIDEOPROTO=y
+# BR2_PACKAGE_XPROTO_WINDOWSWMPROTO is not set
+BR2_PACKAGE_XPROTO_XCMISCPROTO=y
+BR2_PACKAGE_XPROTO_XEXTPROTO=y
+BR2_PACKAGE_XPROTO_XF86BIGFONTPROTO=y
+BR2_PACKAGE_XPROTO_XF86DGAPROTO=y
+BR2_PACKAGE_XPROTO_XF86DRIPROTO=y
+BR2_PACKAGE_XPROTO_XF86MISCPROTO=y
+BR2_PACKAGE_XPROTO_XF86RUSHPROTO=y
+BR2_PACKAGE_XPROTO_XF86VIDMODEPROTO=y
+BR2_PACKAGE_XPROTO_XINERAMAPROTO=y
+BR2_PACKAGE_XPROTO_XPROTO=y
+BR2_PACKAGE_XPROTO_XPROXYMANAGEMENTPROTOCOL=y
+
+#
+# X11R7 Utilities
+#
+# BR2_PACKAGE_XUTIL_MAKEDEPEND is not set
+BR2_PACKAGE_XUTIL_UTIL_MACROS=y
+
+#
+# X11R7 Other data
+#
+BR2_PACKAGE_XDATA_XBITMAPS=y
+BR2_PACKAGE_XDATA_XCURSOR_THEMES=y
+BR2_PACKAGE_XDATA_XKBDATA=y
+
+#
+# X libraries and helper libraries
+#
+BR2_PACKAGE_ATK=y
+BR2_PACKAGE_CAIRO=y
+BR2_PACKAGE_PANGO=y
+BR2_PACKAGE_LIBDRM=y
+# BR2_PACKAGE_LIBGLIB12 is not set
+BR2_PACKAGE_LIBGLIB2=y
+# BR2_PACKAGE_LIBGTK12 is not set
+BR2_PACKAGE_LIBGTK2=y
+# BR2_PACKAGE_LIBGTK2_ENGINES is not set
+
+#
+# GTK Themes
+#
+# BR2_PACKAGE_GTK2_THEME_HICOLOR is not set
+BR2_PACKAGE_LIBSEXY=y
+BR2_PACKAGE_FLTK=y
+BR2_PACKAGE_FONTCONFIG=y
+BR2_PACKAGE_FREETYPE=y
+BR2_FREETYPE_VERSION_2_2_1=y
+# BR2_FREETYPE_VERSION_2_3_5 is not set
+BR2_FREETYPE_VERSION="2.2.1"
+BR2_PACKAGE_TSLIB=y
+BR2_PACKAGE_OPENMOTIF=y
+
+#
+# X Window managers
+#
+# BR2_PACKAGE_MATCHBOX is not set
+# BR2_PACKAGE_METACITY is not set
+BR2_PACKAGE_BLACKBOX=y
+
+#
+# X applications
+#
+
+#
+# dillo		- disabled (requires jpeg,libglib12,libgtk12,zlib,libpng and Xorg(7))
+#
+BR2_PACKAGE_MIDORI=y
+BR2_PACKAGE_WEBKIT=y
+# BR2_PACKAGE_RDESKTOP is not set
+BR2_PACKAGE_RXVT=y
+BR2_PACKAGE_SYNERGY=y
+BR2_PACKAGE_GQVIEW=y
+BR2_PACKAGE_LEAFPAD=y
+BR2_PACKAGE_TORSMO=y
+BR2_PACKAGE_PCMANFM=y
+BR2_PACKAGE_XSTROKE=y
+BR2_PACKAGE_SYLPHEED=y
+BR2_PACKAGE_XPDF=y
+BR2_PACKAGE_X11VNC=y
+
+#
+# Video libraries/codecs and applications
+#
+BR2_PACKAGE_MPLAYER=y
+BR2_COMPRESSOR_SUPPORT=y
+BR2_PACKAGE_LZO=y
+# BR2_PACKAGE_LZMA_TARGET is not set
+# BR2_PACKAGE_LZMA_HOST is not set
+BR2_PACKAGE_ZLIB=y
+# BR2_PACKAGE_ZLIB_TARGET_HEADERS is not set
+# BR2_SCRIPTING_SUPPORT is not set
+BR2_GAMES=y
+BR2_PACKAGE_LXDOOM=y
+BR2_PACKAGE_LXDOOM_WAD=y
+BR2_PACKAGE_ACE_OF_PENGUINS=y
+BR2_PACKAGE_GNUCHESS=y
+BR2_PACKAGE_XBOARD=y
+
+#
+# Editors
+#
+# BR2_PACKAGE_VIM is not set
+
+#
+# Target filesystem options
+#
+
+#
+# filesystem for target device
+#
+# BR2_TARGET_ROOTFS_CRAMFS is not set
+# BR2_TARGET_ROOTFS_CLOOP is not set
+# BR2_TARGET_ROOTFS_EXT2 is not set
+BR2_TARGET_ROOTFS_JFFS2=y
+# BR2_TARGET_ROOTFS_JFFS2_DATAFLASH_1056 is not set
+# BR2_TARGET_ROOTFS_JFFS2_DATAFLASH_528 is not set
+BR2_TARGET_ROOTFS_JFFS2_FLASH_128=y
+# BR2_TARGET_ROOTFS_JFFS2_FLASH_64 is not set
+# BR2_TARGET_ROOTFS_JFFS2_CUSTOM is not set
+BR2_TARGET_ROOTFS_JFFS2_PAGESIZE=0x1000
+BR2_TARGET_ROOTFS_JFFS2_EBSIZE=0x20000
+BR2_TARGET_ROOTFS_JFFS2_NOCLEANMARKER=y
+# BR2_JFFS2_TARGET_SREC is not set
+# BR2_TARGET_ROOTFS_JFFS2_PAD is not set
+# BR2_TARGET_ROOTFS_JFFS2_LE is not set
+BR2_TARGET_ROOTFS_JFFS2_BE=y
+# BR2_TARGET_ROOTFS_JFFS2_SQUASH is not set
+# BR2_TARGET_ROOTFS_JFFS2_SUMMARY is not set
+BR2_TARGET_ROOTFS_JFFS2_OUTPUT="$(IMAGE).jffs2"
+BR2_TARGET_ROOTFS_JFFS2_COPYTO=""
+# BR2_TARGET_ROOTFS_SQUASHFS is not set
+BR2_TARGET_ROOTFS_TAR=y
+BR2_TARGET_ROOTFS_TAR_NONE=y
+# BR2_TARGET_ROOTFS_TAR_GZIP is not set
+# BR2_TARGET_ROOTFS_TAR_BZIP2 is not set
+# BR2_TARGET_ROOTFS_TAR_LZMA is not set
+BR2_TARGET_ROOTFS_TAR_OPTIONS=""
+BR2_TARGET_ROOTFS_TAR_COPYTO="1"
+# BR2_TARGET_ROOTFS_CPIO is not set
+# BR2_TARGET_ROOTFS_INITRAMFS is not set
+
+#
+# bootloader for target device
+#
+# BR2_TARGET_U_BOOT is not set
+
+#
+# Kernel
+#
+# BR2_KERNEL_none is not set
+BR2_KERNEL_LINUX_ADVANCED=y
+# BR2_KERNEL_LINUX is not set
+# BR2_KERNEL_HURD is not set
+BR2_PACKAGE_LINUX=y
+BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-2.6.24.config"
+BR2_PACKAGE_LINUX_FORMAT="uImage"
+BR2_KERNEL_CURRENT_VERSION="2.6.24"
+BR2_KERNEL_SITE="http://ftp.kernel.org/pub/linux/kernel/v2.6/"
+BR2_MM_PATCH_SITE="http://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6"
+BR2_RC_MM_PATCH_DIR="$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)/2.6.$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)-mm$(BR2_KERNEL_MM_LEVEL)"
+BR2_LINUX_2_6_STABLE=y
+# BR2_LINUX_2_6_24 is not set
+# BR2_LINUX_2_6_23 is not set
+# BR2_LINUX_2_6_22_10 is not set
+# BR2_LINUX_2_6_22_1 is not set
+# BR2_LINUX_2_6_22 is not set
+# BR2_LINUX_2_6_21_7 is not set
+# BR2_LINUX_2_6_21_5 is not set
+# BR2_LINUX_2_6_21 is not set
+# BR2_LINUX_2_6_20 is not set
+# BR2_LINUX26_CUSTOM is not set
+
+#
+# Patches
+#
+BR2_KERNEL_ADD_NO_PATCH=y
+# BR2_KERNEL_ADD_LATEST_MINORPATCH is not set
+# BR2_KERNEL_ADD_MINORPATCH is not set
+# BR2_KERNEL_ADD_LATEST_RC_PATCH is not set
+# BR2_KERNEL_ADD_RC_PATCH is not set
+# BR2_KERNEL_ADD_LATEST_SNAPSHOT is not set
+# BR2_KERNEL_ADD_SNAPSHOT is not set
+# BR2_KERNEL_ADD_LATEST_MM_PATCH is not set
+# BR2_KERNEL_ADD_MM_PATCH is not set
+# BR2_KERNEL_ADD_PATCH is not set
+BR2_LINUX_BSP_PATCH=""
+# BR2_KERNEL_PREPATCHED is not set
+# BR2_KERNEL_BASE is not set
+# BR2_KERNEL_LATEST is not set
+BR2_DOWNLOAD_LINUX26_VERSION="$(BR2_KERNEL_CURRENT_VERSION)"
+BR2_LINUX26_VERSION="$(BR2_KERNEL_CURRENT_VERSION)"
+
+#
+# Linux Kernel Configuration
+#
+BR2_PACKAGE_LINUX_USE_KCONFIG=y
+# BR2_PACKAGE_LINUX_USE_DEFCONFIG is not set
+# BR2_PACKAGE_LINUX_USE_XCONFIG is not set
+# BR2_LINUX_BIN_BZIMAGE is not set
+BR2_LINUX_BIN_UIMAGE=y
+# BR2_LINUX_BIN_VMLINUX is not set
+# BR2_LINUX_BIN_ZIMAGE is not set
+# BR2_LINUX_BIN_CUSTOM is not set
+
+#
+# Destinations for linux kernel binaries
+#
+BR2_LINUX_COPYTO_ROOTFS=y
+# BR2_LINUX_COPYTO_TFTPBOOT is not set
+BR2_LINUX_COPYTO=""
+# BR2_LINUX_COPY_CONFIGURATION is not set
diff --git a/target/device/Atmel/atstk1002-no-mplayer_defconfig b/target/device/Atmel/atstk1002-no-mplayer_defconfig
new file mode 100644
index 000000000..90f7def23
--- /dev/null
+++ b/target/device/Atmel/atstk1002-no-mplayer_defconfig
@@ -0,0 +1,785 @@
+#
+# Automatically generated make config: don't edit
+# Sun Feb 17 13:10:12 2008
+#
+BR2_HAVE_DOT_CONFIG=y
+BR2_VERSION="0.10.0-svn"
+# BR2_alpha is not set
+# BR2_arm is not set
+# BR2_armeb is not set
+BR2_avr32=y
+# BR2_cris is not set
+# BR2_ia64 is not set
+# BR2_i386 is not set
+# BR2_m68k is not set
+# BR2_mips is not set
+# BR2_mipsel is not set
+# BR2_nios2 is not set
+# BR2_powerpc is not set
+# BR2_s390 is not set
+# BR2_sh is not set
+# BR2_sh64 is not set
+# BR2_sparc is not set
+# BR2_sparc64 is not set
+# BR2_x86_64 is not set
+BR2_at32ap7000=y
+# BR2_at32ap7001 is not set
+# BR2_at32ap7002 is not set
+BR2_ARCH="avr32"
+BR2_ENDIAN="BIG"
+
+#
+# Target options
+#
+
+#
+# Project Options
+#
+BR2_PROJECT="atstk1002-no-mplayer"
+BR2_HOSTNAME="stk1000.example.net"
+BR2_BANNER="ATSTK1002 ($(DATE))"
+
+#
+# Preset Devices
+#
+BR2_TARGET_ATMEL=y
+
+#
+# Atmel AVR32 Specific Device Support
+#
+BR2_TARGET_AVR32=y
+BR2_TARGET_AT32AP7000=y
+# BR2_TARGET_AT32AP7001 is not set
+# BR2_TARGET_AT32AP7002 is not set
+
+#
+# Development board support
+#
+BR2_TARGET_AVR32_ATSTK1002=y
+# BR2_TARGET_AVR32_ATNGW100 is not set
+# BR2_TARGET_AVR32_ATNGW100_BASE is not set
+# BR2_TARGET_AVR32_ATNGW100_EXPANDED is not set
+BR2_BOARD_NAME="atstk1002"
+
+#
+# Package support
+#
+
+#
+# Secondary locations
+#
+BR2_TARGET_ATMEL_COPYTO=""
+BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
+# BR2_TARGET_VALKA is not set
+
+#
+# Generic System Support
+#
+# BR2_TARGET_GENERIC_ACCESS_POINT is not set
+# BR2_TARGET_GENERIC_FIREWALL is not set
+# BR2_TARGET_GENERIC_DEV_SYSTEM is not set
+
+#
+# Build options
+#
+BR2_WGET="wget --passive-ftp --retry-connrefused --waitretry=10"
+BR2_SVN_CO="svn co"
+BR2_SVN_UP="svn up"
+BR2_GIT="git clone"
+BR2_ZCAT="zcat"
+BR2_BZCAT="bzcat"
+BR2_TAR_OPTIONS=""
+BR2_DL_DIR="$(BASE_DIR)/src/dl"
+
+#
+# Mirrors and Download locations
+#
+BR2_SOURCEFORGE_MIRROR="easynews"
+BR2_KERNEL_MIRROR="http://www.kernel.org/pub/"
+BR2_GNU_MIRROR="http://ftp.gnu.org/pub/gnu"
+BR2_DEBIAN_MIRROR="http://ftp.debian.org"
+
+#
+# Atmel Mirrors
+#
+BR2_ATMEL_MIRROR="ftp://at91dist:distrib@81.80.104.162/AT91_Third_Party_Design_Flow/Linux_Host/"
+BR2_AT91_PATCH_MIRROR="http://maxim.org.za/AT91RM9200/2.6/"
+BR2_STAGING_DIR="$(BUILD_DIR)/staging_dir"
+# BR2_FPU_SUFFIX is not set
+BR2_TOPDIR_PREFIX=""
+BR2_TOPDIR_SUFFIX=""
+BR2_ROOTFS_PREFIX="rootfs"
+BR2_ROOTFS_SUFFIX="$(DATE)"
+BR2_GNU_BUILD_SUFFIX="pc-linux-gnu"
+BR2_GNU_TARGET_SUFFIX="linux-uclibc"
+BR2_JLEVEL=1
+# BR2_PREFER_IMA is not set
+# BR2_DEPRECATED is not set
+BR2_RECENT=y
+BR2_STRIP_strip=y
+# BR2_STRIP_sstrip is not set
+# BR2_STRIP_none is not set
+# BR2_PREFER_STATIC_LIB is not set
+# BR2_HAVE_MANPAGES is not set
+# BR2_HAVE_INFOPAGES is not set
+BR2_UPDATE_CONFIG=y
+
+#
+# Toolchain
+#
+BR2_TOOLCHAIN_BUILDROOT=y
+# BR2_TOOLCHAIN_EXTERNAL is not set
+# BR2_TOOLCHAIN_EXTERNAL_SOURCE is not set
+BR2_TOOLCHAIN_SOURCE=y
+BR2_EXT_GCC_VERSION_4_1_2=y
+BR2_EXT_GCC_VERSION_4_2_1=y
+BR2_EXT_BINUTILS_VERSION_2_17=y
+BR2_EXT_UCLIBC_VERSION_0_9_29=y
+BR2_EXT_UCLIBC_VERSION_0_9_28_3=y
+
+#
+# Kernel Header Options
+#
+# BR2_KERNEL_HEADERS_2_4_25 is not set
+# BR2_KERNEL_HEADERS_2_4_27 is not set
+# BR2_KERNEL_HEADERS_2_4_29 is not set
+# BR2_KERNEL_HEADERS_2_4_31 is not set
+# BR2_KERNEL_HEADERS_2_6_9 is not set
+# BR2_KERNEL_HEADERS_2_6_11 is not set
+# BR2_KERNEL_HEADERS_2_6_12 is not set
+# BR2_KERNEL_HEADERS_2_6_20_4 is not set
+# BR2_KERNEL_HEADERS_2_6_20 is not set
+# BR2_KERNEL_HEADERS_2_6_21_5 is not set
+# BR2_KERNEL_HEADERS_2_6_21 is not set
+# BR2_KERNEL_HEADERS_2_6_22_1 is not set
+# BR2_KERNEL_HEADERS_2_6_22_10 is not set
+# BR2_KERNEL_HEADERS_2_6_22 is not set
+# BR2_KERNEL_HEADERS_2_6_23 is not set
+BR2_KERNEL_HEADERS_2_6_24=y
+# BR2_KERNEL_HEADERS_SNAP is not set
+BR2_DEFAULT_KERNEL_HEADERS="2.6.24"
+
+#
+# uClibc Options
+#
+# BR2_UCLIBC_VERSION_0_9_28_3 is not set
+BR2_UCLIBC_VERSION_0_9_29=y
+# BR2_UCLIBC_VERSION_SNAPSHOT is not set
+BR2_UCLIBC_CONFIG="target/device/Atmel/uClibc.config.avr32"
+# BR2_ENABLE_LOCALE is not set
+# BR2_PTHREADS_NONE is not set
+# BR2_PTHREADS is not set
+BR2_PTHREADS_OLD=y
+# BR2_PTHREADS_NATIVE is not set
+# BR2_PTHREAD_DEBUG is not set
+# BR2_UCLIBC_PROGRAM_INVOCATION is not set
+
+#
+# Binutils Options
+#
+BR2_BINUTILS_VERSION_2_17=y
+# BR2_BINUTILS_VERSION_2_17_50_0_17 is not set
+# BR2_BINUTILS_VERSION_2_18 is not set
+# BR2_BINUTILS_VERSION_2_18_50_0_1 is not set
+BR2_BINUTILS_VERSION="2.17"
+BR2_EXTRA_BINUTILS_CONFIG_OPTIONS=""
+
+#
+# GCC Options
+#
+# BR2_GCC_VERSION_3_4_6 is not set
+# BR2_GCC_VERSION_4_0_4 is not set
+# BR2_GCC_VERSION_4_1_2 is not set
+# BR2_GCC_VERSION_4_2_0 is not set
+BR2_GCC_VERSION_4_2_1=y
+BR2_GCC_SUPPORTS_SYSROOT=y
+# BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE is not set
+BR2_GCC_VERSION="4.2.1"
+# BR2_TOOLCHAIN_SYSROOT is not set
+# BR2_GCC_USE_SJLJ_EXCEPTIONS is not set
+BR2_EXTRA_GCC_CONFIG_OPTIONS=""
+BR2_GCC_CROSS_CXX=y
+BR2_INSTALL_LIBSTDCPP=y
+BR2_GCC_SHARED_LIBGCC=y
+
+#
+# Ccache Options
+#
+# BR2_CCACHE is not set
+
+#
+# Gdb Options
+#
+# BR2_PACKAGE_GDB is not set
+BR2_PACKAGE_GDB_SERVER=y
+BR2_PACKAGE_GDB_HOST=y
+# BR2_GDB_VERSION_6_2_1 is not set
+# BR2_GDB_VERSION_6_3 is not set
+BR2_GDB_VERSION_6_4=y
+# BR2_GDB_VERSION_6_5 is not set
+# BR2_GDB_VERSION_6_6 is not set
+# BR2_GDB_VERSION_SNAPSHOT is not set
+BR2_GDB_VERSION="6.4"
+
+#
+# elf2flt
+#
+# BR2_ELF2FLT is not set
+# BR2_MKLIBS is not set
+
+#
+# Common Toolchain Options
+#
+# BR2_PACKAGE_SSTRIP_TARGET is not set
+# BR2_PACKAGE_SSTRIP_HOST is not set
+# BR2_ENABLE_MULTILIB is not set
+BR2_LARGEFILE=y
+BR2_INET_IPV6=y
+BR2_INET_RPC=y
+BR2_USE_WCHAR=y
+BR2_SOFT_FLOAT=y
+BR2_TARGET_OPTIMIZATION="-Os -pipe"
+BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
+
+#
+# Package Selection for the target
+#
+BR2_PACKAGE_BUSYBOX=y
+# BR2_BUSYBOX_VERSION_1_2_2_1 is not set
+# BR2_BUSYBOX_VERSION_1_6_1 is not set
+# BR2_BUSYBOX_VERSION_1_7_X is not set
+# BR2_BUSYBOX_VERSION_1_8_X is not set
+BR2_BUSYBOX_VERSION_1_9_X=y
+# BR2_PACKAGE_BUSYBOX_SNAPSHOT is not set
+BR2_BUSYBOX_VERSION="1.9.0"
+BR2_PACKAGE_BUSYBOX_INSTALL_SYMLINKS=y
+BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_BOARD_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config"
+BR2_PACKAGE_BUSYBOX_HIDE_OTHERS=y
+BR2_PACKAGE_BUSYBOX_SKELETON=y
+
+#
+# The minimum needed to build a uClibc development system
+#
+BR2_PACKAGE_BASH=y
+# B2_PACKAGE_BASH_LINK_SH is not set
+BR2_PACKAGE_BZIP2=y
+# BR2_PACKAGE_DIFFUTILS is not set
+# BR2_PACKAGE_FLEX is not set
+# BR2_PACKAGE_GCC_TARGET is not set
+# BR2_PACKAGE_MAKE is not set
+
+#
+# Other development stuff
+#
+# BR2_PACKAGE_AUTOCONF is not set
+# BR2_PACKAGE_AUTOMAKE is not set
+# BR2_PACKAGE_BISON is not set
+# BR2_PACKAGE_CCACHE_TARGET is not set
+# BR2_PACKAGE_CVS is not set
+# BR2_PACKAGE_DISTCC is not set
+# BR2_PACKAGE_DMALLOC is not set
+# BR2_PACKAGE_EXPAT is not set
+# BR2_PACKAGE_FAKEROOT is not set
+BR2_HOST_FAKEROOT=y
+# BR2_PACKAGE_GETTEXT is not set
+# BR2_PACKAGE_LIBINTL is not set
+# BR2_PACKAGE_LIBGMP is not set
+# BR2_PACKAGE_LIBMPFR is not set
+# BR2_PACKAGE_LIBTOOL is not set
+# BR2_PACKAGE_M4 is not set
+# BR2_PACKAGE_PKGCONFIG is not set
+# BR2_READLINE is not set
+# BR2_PACKAGE_XERCES is not set
+
+#
+# Other stuff
+#
+# BR2_PACKAGE_AT is not set
+# BR2_PACKAGE_BERKELEYDB is not set
+# BR2_PACKAGE_BSDIFF is not set
+# BR2_PACKAGE_CUSTOMIZE is not set
+# BR2_PACKAGE_DASH is not set
+# BR2_PACKAGE_FCONFIG is not set
+BR2_PACKAGE_FILE=y
+# BR2_PACKAGE_FIS is not set
+# BR2_PACKAGE_KEXEC is not set
+# BR2_PACKAGE_ICU is not set
+# BR2_PACKAGE_IPKG is not set
+# BR2_PACKAGE_CUPS is not set
+# BR2_PACKAGE_NG_SPICE_REWORK is not set
+# BR2_PACKAGE_GAMIN is not set
+# BR2_PACKAGE_STARTUP_NOTIFICATION is not set
+# BR2_PACKAGE_CLASSPATH is not set
+BR2_PACKAGE_LIBDAEMON=y
+# BR2_PACKAGE_LIBELF is not set
+# BR2_PACKAGE_LIBEVENT is not set
+# BR2_PACKAGE_LIBFLOAT is not set
+# BR2_PACKAGE_LIBGCRYPT is not set
+# BR2_PACKAGE_LIBGPG_ERROR is not set
+# BR2_PACKAGE_LIBLOCKFILE is not set
+# BR2_PACKAGE_LIBSYSFS is not set
+# BR2_PACKAGE_LIBXML2 is not set
+
+#
+# libxslt	- disabled (requires pkgconfig)
+#
+# BR2_PACKAGE_LOCKFILE_PROGS is not set
+# BR2_PACKAGE_LSOF is not set
+# BR2_PACKAGE_LTP-TESTSUITE is not set
+# BR2_PACKAGE_LTRACE is not set
+# BR2_PACKAGE_LTT is not set
+# BR2_PACKAGE_PORTAGE is not set
+# BR2_PACKAGE_SQLITE is not set
+BR2_PACKAGE_STRACE=y
+# BR2_PACKAGE_SUDO is not set
+BR2_NETWORK_SUPPORT=y
+
+#
+# Networking applications
+#
+
+#
+# argus		- disabled (requires libpcap)
+#
+BR2_PACKAGE_AVAHI=y
+BR2_PACKAGE_AVAHI_AUTOIPD=y
+
+#
+# mDNS/DNS-SD daemon	- disabled (requires expat)
+#
+# BR2_PACKAGE_BOA is not set
+# BR2_PACKAGE_BIND is not set
+# BR2_PACKAGE_BRIDGE is not set
+# BR2_PACKAGE_CURL is not set
+# BR2_PACKAGE_LIBCURL is not set
+# BR2_PACKAGE_DNSMASQ is not set
+BR2_PACKAGE_DROPBEAR=y
+# BR2_PACKAGE_ETHTOOL is not set
+BR2_PACKAGE_HASERL=y
+# BR2_PACKAGE_HASERL_VERSION_0_8_0 is not set
+BR2_PACKAGE_HASERL_VERSION_0_9_21=y
+BR2_PACKAGE_HASERL_VERSION="0.9.21"
+# BR2_PACKAGE_IRDA_UTILS is not set
+# BR2_PACKAGE_IPERF is not set
+# BR2_PACKAGE_IPROUTE2 is not set
+
+#
+# ipsec-tools	- disabled (requires openssl, flex and the flex library (libfl.a) )
+#
+# BR2_PACKAGE_IPTABLES is not set
+# BR2_PACKAGE_KISMET is not set
+# BR2_PACKAGE_L2TP is not set
+# BR2_PACKAGE_LIBCGI is not set
+# BR2_PACKAGE_LIBCGICC is not set
+# BR2_PACKAGE_LIBEXOSIP2 is not set
+# BR2_PACKAGE_LIBOSIP2 is not set
+# BR2_PACKAGE_LIBPCAP is not set
+# BR2_PACKAGE_LINKS is not set
+BR2_PACKAGE_LRZSZ=y
+# BR2_PACKAGE_MDNSRESPONDER is not set
+# BR2_PACKAGE_MICROCOM is not set
+# BR2_PACKAGE_MROUTED is not set
+# BR2_PACKAGE_MUTT is not set
+BR2_PACKAGE_NBD=y
+BR2_PACKAGE_NCFTP=y
+
+#
+# ncFTP tools selection
+#
+# BR2_PACKAGE_NCFTP_GET is not set
+# BR2_PACKAGE_NCFTP_PUT is not set
+# BR2_PACKAGE_NCFTP_LS is not set
+# BR2_PACKAGE_NCFTP_BATCH is not set
+# BR2_PACKAGE_NCFTP_SPOOLER is not set
+# BR2_PACKAGE_NCFTP_BOOKMARKS is not set
+# BR2_PACKAGE_NETKITBASE is not set
+# BR2_PACKAGE_NETKITTELNET is not set
+# BR2_PACKAGE_NETPLUG is not set
+# BR2_PACKAGE_NETSNMP is not set
+# BR2_PACKAGE_NFS_UTILS is not set
+BR2_PACKAGE_NTP=y
+# BR2_PACKAGE_NTP_SNTP is not set
+# BR2_PACKAGE_OLSR is not set
+# BR2_PACKAGE_OPENNTPD is not set
+# BR2_PACKAGE_OPENSSH is not set
+# BR2_PACKAGE_OPENSSL is not set
+# BR2_PACKAGE_OPENVPN is not set
+# BR2_PACKAGE_OPENSWAN is not set
+BR2_PACKAGE_PORTMAP=y
+# BR2_PACKAGE_PPPD is not set
+# BR2_PACKAGE_RP_PPPOE is not set
+# BR2_PACKAGE_PPTP_LINUX is not set
+BR2_PACKAGE_PROFTPD=y
+# BR2_PACKAGE_QUAGGA is not set
+
+#
+# quagga suite
+#
+# BR2_PACKAGE_QUAGGA_ZEBRA is not set
+# BR2_PACKAGE_QUAGGA_BGPD is not set
+# BR2_PACKAGE_QUAGGA_RIPD is not set
+# BR2_PACKAGE_QUAGGA_RIPNGD is not set
+# BR2_PACKAGE_QUAGGA_OSPFD is not set
+# BR2_PACKAGE_QUAGGA_OSPF6D is not set
+# BR2_PACKAGE_QUAGGA_WATCHQUAGGA is not set
+# BR2_PACKAGE_QUAGGA_ISISD is not set
+BR2_PACKAGE_RSYNC=y
+# BR2_PACKAGE_SAMBA is not set
+# BR2_PACKAGE_SOCAT is not set
+# BR2_PACKAGE_STUNNEL is not set
+# BR2_PACKAGE_TCPDUMP is not set
+# BR2_PACKAGE_DHCPDUMP is not set
+# BR2_PACKAGE_TFTPD is not set
+# BR2_PACKAGE_TN5250 is not set
+# BR2_PACKAGE_TTCP is not set
+
+#
+# vpnc		- disabled (requires libgcrypt and libgpg_error)
+#
+# BR2_PACKAGE_VTUN is not set
+BR2_PACKAGE_WIRELESS_TOOLS=y
+BR2_BLOCKDEV_SUPPORT=y
+
+#
+# dbus not available (need expat or libxml2)
+#
+# BR2_PACKAGE_DM is not set
+# BR2_PACKAGE_DMRAID is not set
+# BR2_PACKAGE_E2FSPROGS is not set
+# BR2_PACKAGE_LIBFUSE is not set
+# BR2_PACKAGE_GADGETFS_TEST is not set
+# BR2_PACKAGE_HAL is not set
+# BR2_PACKAGE_HWDATA is not set
+# BR2_PACKAGE_IOSTAT is not set
+# BR2_PACKAGE_LIBAIO is not set
+# BR2_PACKAGE_LIBRAW1394 is not set
+# BR2_PACKAGE_LIBUSB is not set
+# BR2_PACKAGE_LM_SENSORS is not set
+# BR2_PACKAGE_LVM2 is not set
+# BR2_PACKAGE_MDADM is not set
+# BR2_PACKAGE_MEMTESTER is not set
+# BR2_PACKAGE_MKDOSFS is not set
+BR2_PACKAGE_MTD=y
+BR2_PACKAGE_MTD_UTILS=y
+# BR2_PACKAGE_MTD_20061007 is not set
+# BR2_PACKAGE_MTD_20050122 is not set
+# BR2_PACKAGE_MTD_SNAPSHOT is not set
+
+#
+# MTD tools selection
+#
+BR2_PACKAGE_MTD_FLASH_ERASE=y
+BR2_PACKAGE_MTD_FLASH_ERASEALL=y
+BR2_PACKAGE_MTD_FLASH_INFO=y
+# BR2_PACKAGE_MTD_FLASH_LOCK is not set
+# BR2_PACKAGE_MTD_FLASH_UNLOCK is not set
+BR2_PACKAGE_MTD_FLASHCP=y
+# BR2_PACKAGE_MTD_ERASE is not set
+# BR2_PACKAGE_MTD_JFFS2DUMP is not set
+# BR2_PACKAGE_MTD_JFFS3DUMP is not set
+# BR2_PACKAGE_MTD_SUMTOOL is not set
+# BR2_PACKAGE_MTD_FTL_CHECK is not set
+# BR2_PACKAGE_MTD_FTL_FORMAT is not set
+# BR2_PACKAGE_MTD_NFTL_FORMAT is not set
+# BR2_PACKAGE_MTD_NFTLDUMP is not set
+# BR2_PACKAGE_MTD_MKFSJFFS2 is not set
+# BR2_PACKAGE_MTD_MKFSJFFS is not set
+# BR2_PACKAGE_MTD_NANDDUMP is not set
+# BR2_PACKAGE_MTD_NANDWRITE is not set
+BR2_PACKAGE_MTD_MTD_DEBUG=y
+# BR2_PACKAGE_MTD_DOCFDISK is not set
+# BR2_PACKAGE_MTD_DOC_LOADBIOS is not set
+# BR2_PACKAGE_NTFS-3G is not set
+# BR2_PACKAGE_PCIUTILS is not set
+# BR2_PACKAGE_PCMCIA is not set
+# BR2_PACKAGE_RAIDTOOLS is not set
+# BR2_PACKAGE_SETSERIAL is not set
+# BR2_PACKAGE_SMARTMONTOOLS is not set
+# BR2_PACKAGE_USBMOUNT is not set
+# BR2_PACKAGE_USBUTILS is not set
+# BR2_PACKAGE_WIPE is not set
+# BR2_PACKAGE_XFSPROGS is not set
+BR2_AUDIO_SUPPORT=y
+BR2_PACKAGE_ALSA_LIB=y
+BR2_PACKAGE_ALSA_UTILS=y
+
+#
+# ALSA utils selection
+#
+# BR2_PACKAGE_ALSA_UTILS_ALSACONF is not set
+BR2_PACKAGE_ALSA_UTILS_ALSACTL=y
+BR2_PACKAGE_ALSA_UTILS_ALSAMIXER=y
+# BR2_PACKAGE_ALSA_UTILS_AMIDI is not set
+# BR2_PACKAGE_ALSA_UTILS_AMIXER is not set
+# BR2_PACKAGE_ALSA_UTILS_APLAY is not set
+# BR2_PACKAGE_ALSA_UTILS_ARECORD is not set
+# BR2_PACKAGE_ALSA_UTILS_IECSET is not set
+# BR2_PACKAGE_ALSA_UTILS_ACONNECT is not set
+# BR2_PACKAGE_ALSA_UTILS_APLAYMIDI is not set
+# BR2_PACKAGE_ALSA_UTILS_ARECORDMIDI is not set
+# BR2_PACKAGE_ALSA_UTILS_ASEQDUMP is not set
+# BR2_PACKAGE_ALSA_UTILS_ASEQNET is not set
+# BR2_PACKAGE_ALSA_UTILS_SPEAKER_TEST is not set
+
+#
+# asterisk	- disabled (required openssl and mpg123)
+#
+# BR2_PACKAGE_AUMIX is not set
+# BR2_PACKAGE_LIBMAD is not set
+# BR2_PACKAGE_LIBOGG is not set
+# BR2_PACKAGE_LIBSNDFILE is not set
+
+#
+# libvorbis requires the package libogg to build
+#
+# BR2_PACKAGE_MADPLAY is not set
+# BR2_PACKAGE_MPG123 is not set
+BR2_PACKAGE_MPG123_ALSA=y
+# BR2_PACKAGE_SPEEX is not set
+BR2_GRAPHIC_SUPPORT=y
+
+#
+# text rendering libraries
+#
+BR2_PACKAGE_NCURSES=y
+# BR2_PACKAGE_NCURSES_TARGET_HEADERS is not set
+# BR2_PACKAGE_NEWT is not set
+# BR2_PACKAGE_SLANG is not set
+
+#
+# text rendering applications
+#
+# BR2_PACKAGE_DIALOG is not set
+
+#
+# graphic libraries
+#
+# BR2_PACKAGE_DIRECTFB is not set
+# BR2_PACKAGE_IMAGEMAGICK is not set
+BR2_PACKAGE_JPEG=y
+BR2_PACKAGE_LIBPNG=y
+BR2_PACKAGE_LIBUNGIF=y
+# BR2_PACKAGE_SDL is not set
+# BR2_PACKAGE_SDL_TTF is not set
+# BR2_PACKAGE_TIFF is not set
+
+#
+# busybox graphic applications
+#
+
+#
+# --> (May be broken in busybox)
+#
+BR2_PACKAGE_FBV=y
+BR2_PACKAGE_FBSET=y
+
+#
+# other GUIs
+#
+# BR2_PACKAGE_QTE is not set
+BR2_PACKAGE_QTOPIA4=y
+# BR2_PACKAGE_QTOPIA4_DEBUG is not set
+BR2_PACKAGE_QTOPIA4_SHARED=y
+# BR2_PACKAGE_QTOPIA4_STATIC is not set
+BR2_PACKAGE_QTOPIA4_LICENSE_TYPE_GPL=y
+# BR2_PACKAGE_QTOPIA4_LICENSE_TYPE_COMMERCIAL is not set
+BR2_PACKAGE_QTOPIA4_GPL_LICENSE_APPROVED=y
+# BR2_PACKAGE_QTOPIA4_QT3SUPPORT is not set
+BR2_PACKAGE_QTOPIA4_DEPTHS="-depths 24,16,8"
+BR2_PACKAGE_QTOPIA4_GIF=y
+BR2_PACKAGE_QTOPIA4_LIBMNG=y
+BR2_PACKAGE_QTOPIA4_NOJPEG=y
+# BR2_PACKAGE_QTOPIA4_SYSTEMJPEG is not set
+# BR2_PACKAGE_QTOPIA4_QTJPEG is not set
+# BR2_PACKAGE_QTOPIA4_NOZLIB is not set
+BR2_PACKAGE_QTOPIA4_QTZLIB=y
+# BR2_PACKAGE_QTOPIA4_SYSTEMZLIB is not set
+BR2_PACKAGE_QTOPIA4_EMB_PLATFORM="$(ARCH)"
+BR2_PACKAGE_XSERVER_none=y
+# BR2_PACKAGE_XSERVER_x11r7 is not set
+# BR2_PACKAGE_XSERVER_xorg is not set
+# BR2_PACKAGE_XSERVER_tinyx is not set
+BR2_X11_PREFIX="/usr"
+
+#
+# X libraries and helper libraries
+#
+
+#
+# atk		- disabled (requires libglib2)
+#
+# BR2_PACKAGE_PANGO is not set
+# BR2_PACKAGE_LIBDRM is not set
+# BR2_PACKAGE_LIBGLIB12 is not set
+# BR2_PACKAGE_LIBGLIB2 is not set
+# BR2_PACKAGE_LIBSEXY is not set
+
+#
+# fltk		- disabled (requires Xorg(7))
+#
+# BR2_PACKAGE_FONTCONFIG is not set
+# BR2_PACKAGE_FREETYPE is not set
+# BR2_PACKAGE_TSLIB is not set
+# BR2_PACKAGE_OPENMOTIF is not set
+
+#
+# X Window managers
+#
+# BR2_PACKAGE_MATCHBOX is not set
+
+#
+# blackbox		- disabled (requires Xorg(7))
+#
+
+#
+# X applications
+#
+
+#
+# dillo		- disabled (requires jpeg,libglib12,libgtk12,zlib,libpng and Xorg(7))
+#
+
+#
+# midori		- disabled (requires Xorg(7))
+#
+# BR2_PACKAGE_WEBKIT is not set
+
+#
+# synergy		- disabled (requires Xorg(7))
+#
+# BR2_PACKAGE_GQVIEW is not set
+# BR2_PACKAGE_LEAFPAD is not set
+# BR2_PACKAGE_TORSMO is not set
+# BR2_PACKAGE_PCMANFM is not set
+# BR2_PACKAGE_XSTROKE is not set
+# BR2_PACKAGE_SYLPHEED is not set
+
+#
+# Video libraries/codecs and applications
+#
+# BR2_PACKAGE_MPLAYER is not set
+BR2_COMPRESSOR_SUPPORT=y
+BR2_PACKAGE_LZO=y
+# BR2_PACKAGE_LZMA_TARGET is not set
+# BR2_PACKAGE_LZMA_HOST is not set
+BR2_PACKAGE_ZLIB=y
+# BR2_PACKAGE_ZLIB_TARGET_HEADERS is not set
+# BR2_SCRIPTING_SUPPORT is not set
+# BR2_GAMES is not set
+
+#
+# Editors
+#
+# BR2_PACKAGE_VIM is not set
+
+#
+# Target filesystem options
+#
+
+#
+# filesystem for target device
+#
+# BR2_TARGET_ROOTFS_CRAMFS is not set
+# BR2_TARGET_ROOTFS_CLOOP is not set
+BR2_TARGET_ROOTFS_EXT2=y
+BR2_TARGET_ROOTFS_EXT2_BLOCKS=0
+BR2_TARGET_ROOTFS_EXT2_INODES=0
+BR2_TARGET_ROOTFS_EXT2_RESBLKS=0
+BR2_TARGET_ROOTFS_EXT2_SQUASH=y
+BR2_TARGET_ROOTFS_EXT2_OUTPUT="$(IMAGE).ext2"
+# BR2_TARGET_ROOTFS_EXT2_NONE is not set
+# BR2_TARGET_ROOTFS_EXT2_GZIP is not set
+BR2_TARGET_ROOTFS_EXT2_BZIP2=y
+# BR2_TARGET_ROOTFS_EXT2_LZMA is not set
+BR2_TARGET_ROOTFS_EXT2_COPYTO=""
+# BR2_TARGET_ROOTFS_JFFS2 is not set
+# BR2_TARGET_ROOTFS_SQUASHFS is not set
+BR2_TARGET_ROOTFS_TAR=y
+BR2_TARGET_ROOTFS_TAR_NONE=y
+# BR2_TARGET_ROOTFS_TAR_GZIP is not set
+# BR2_TARGET_ROOTFS_TAR_BZIP2 is not set
+# BR2_TARGET_ROOTFS_TAR_LZMA is not set
+BR2_TARGET_ROOTFS_TAR_OPTIONS=""
+BR2_TARGET_ROOTFS_TAR_COPYTO=""
+# BR2_TARGET_ROOTFS_CPIO is not set
+# BR2_TARGET_ROOTFS_INITRAMFS is not set
+
+#
+# bootloader for target device
+#
+BR2_TARGET_U_BOOT=y
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE=""
+BR2_TARGET_U_BOOT_CONFIG_BOARD="$(BR2_BOARD_NAME)_config"
+BR2_TARGET_U_BOOT_SERVERIP=""
+BR2_TARGET_U_BOOT_IPADDR=""
+BR2_TARGET_U_BOOT_ETH0ADDR=""
+BR2_TARGET_U_BOOT_ETH1ADDR=""
+BR2_TARGET_U_BOOT_BOOTARGS="console=ttyS0 root=/dev/mmcblk0p1 rootwait=1 fbmem=600k"
+BR2_TARGET_U_BOOT_BOOTCMD="mmcinit; ext2load mmc 0:1 0x90300000 /boot/uImage; bootm"
+
+#
+# Kernel
+#
+# BR2_KERNEL_none is not set
+BR2_KERNEL_LINUX_ADVANCED=y
+# BR2_KERNEL_LINUX is not set
+# BR2_KERNEL_HURD is not set
+BR2_PACKAGE_LINUX=y
+BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-2.6.22.5.config"
+BR2_PACKAGE_LINUX_FORMAT="uImage"
+BR2_KERNEL_CURRENT_VERSION="2.6.24"
+BR2_KERNEL_THIS_VERSION="2.6.24"
+BR2_KERNEL_SITE="http://ftp.kernel.org/pub/linux/kernel/v2.6/"
+BR2_MM_PATCH_SITE="http://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6"
+BR2_RC_MM_PATCH_DIR="$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)/2.6.$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)-mm$(BR2_KERNEL_MM_LEVEL)"
+# BR2_LINUX_2_6_STABLE is not set
+BR2_LINUX_2_6_24=y
+# BR2_LINUX_2_6_23 is not set
+# BR2_LINUX_2_6_22_10 is not set
+# BR2_LINUX_2_6_22_1 is not set
+# BR2_LINUX_2_6_22 is not set
+# BR2_LINUX_2_6_21_7 is not set
+# BR2_LINUX_2_6_21_5 is not set
+# BR2_LINUX_2_6_21 is not set
+# BR2_LINUX_2_6_20 is not set
+# BR2_LINUX26_CUSTOM is not set
+
+#
+# Patches
+#
+BR2_KERNEL_ADD_NO_PATCH=y
+# BR2_KERNEL_ADD_LATEST_MINORPATCH is not set
+# BR2_KERNEL_ADD_MINORPATCH is not set
+# BR2_KERNEL_ADD_LATEST_RC_PATCH is not set
+# BR2_KERNEL_ADD_RC_PATCH is not set
+# BR2_KERNEL_ADD_LATEST_SNAPSHOT is not set
+# BR2_KERNEL_ADD_SNAPSHOT is not set
+# BR2_KERNEL_ADD_LATEST_MM_PATCH is not set
+# BR2_KERNEL_ADD_MM_PATCH is not set
+# BR2_KERNEL_ADD_PATCH is not set
+BR2_LINUX_BSP_PATCH=""
+# BR2_KERNEL_PREPATCHED is not set
+BR2_KERNEL_BASE=y
+# BR2_KERNEL_LATEST is not set
+BR2_DOWNLOAD_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
+BR2_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
+
+#
+# Linux Kernel Configuration
+#
+BR2_PACKAGE_LINUX_USE_KCONFIG=y
+# BR2_PACKAGE_LINUX_USE_DEFCONFIG is not set
+# BR2_PACKAGE_LINUX_USE_XCONFIG is not set
+# BR2_LINUX_BIN_BZIMAGE is not set
+BR2_LINUX_BIN_UIMAGE=y
+# BR2_LINUX_BIN_VMLINUX is not set
+# BR2_LINUX_BIN_ZIMAGE is not set
+# BR2_LINUX_BIN_CUSTOM is not set
+
+#
+# Destinations for linux kernel binaries
+#
+BR2_LINUX_COPYTO_ROOTFS=y
+# BR2_LINUX_COPYTO_TFTPBOOT is not set
+BR2_LINUX_COPYTO=""
+# BR2_LINUX_COPY_CONFIGURATION is not set
diff --git a/target/device/Atmel/atstk1002/Makefile.in b/target/device/Atmel/atstk1002/Makefile.in
index a818ff72f..f48e0aa01 100644
--- a/target/device/Atmel/atstk1002/Makefile.in
+++ b/target/device/Atmel/atstk1002/Makefile.in
@@ -1,12 +1,6 @@
-ifeq ($(BOARD_NAME),atstk1002)
-#BR2_PACKAGE_BUSYBOX_CONFIG=$(ATSTK1000_PATH)/busybox.config
-#UCLIBC_CONFIG_FILE=target/device/Atmel/uClibc.config.$(ARCH)
+ifeq ($(strip $(BR2_TARGET_AVR32_ATSTK1002)),y)
+ATSTK1002_PATH=target/device/Atmel/atstk1002
 
-TARGET_SKELETON=$(BOARD_PATH)/target_skeleton
-TARGET_DEVICE_TABLE=$(BOARD_PATH)/device_table.txt
-
-ifeq ($(strip $(BR2_PACKAGE_LINUX)),y)
-#LINUX26_FORMAT=uImage
-#LINUX26_KCONFIG=$(BOARD_PATH)/linux26.atstk1002.config
-endif
+TARGET_SKELETON=$(ATSTK1002_PATH)/target_skeleton
+TARGET_DEVICE_TABLE=$(ATSTK1002_PATH)/device_table.txt
 endif
diff --git a/target/device/Atmel/atstk1002/atstk1002-linux-2.6.23.config b/target/device/Atmel/atstk1002/atstk1002-linux-2.6.23.config
new file mode 100644
index 000000000..6e11f8a1d
--- /dev/null
+++ b/target/device/Atmel/atstk1002/atstk1002-linux-2.6.23.config
@@ -0,0 +1,1050 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+# CONFIG_TASK_XACCT is not set
+# CONFIG_USER_NS is not set
+CONFIG_AUDIT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+# CONFIG_CPU_AT32AP7001 is not set
+# CONFIG_CPU_AT32AP7002 is not set
+CONFIG_BOARD_ATSTK1002=y
+CONFIG_BOARD_ATSTK1000=y
+# CONFIG_BOARD_ATNGW100 is not set
+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
+# CONFIG_BOARD_ATSTK100X_SPI1 is not set
+CONFIG_BOARD_ATSTK1002_GPIO_MOUSE=y
+CONFIG_BOARD_ATSTK1000_J2_LED=y
+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
+CONFIG_BOARD_ATSTK1000_J2_RGB=y
+CONFIG_BOARD_ATSTK1000_EXTDAC=y
+# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
+# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+CONFIG_GPIO_DEV=y
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+CONFIG_DW_DMAC=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_CMDLINE=""
+
+#
+# Power managment options
+#
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_ATMEL_SSC=m
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=m
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=m
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MOUSE_GPIO=m
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=m
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+CONFIG_I2C_ATMELTWI=m
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_LTV350QV=y
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# AVR32 devices
+#
+# CONFIG_SND_ATMEL_AC97 is not set
+
+#
+# SPI devices
+#
+CONFIG_SND_AT73C213=m
+CONFIG_SND_AT73C213_TARGET_BITRATE=48000
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=m
+# CONFIG_HID_DEBUG is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=m
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+# CONFIG_MMC_BLOCK_BOUNCE is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_ATMELMCI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_LIB=m
+CONFIG_RTC_CLASS=m
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=m
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+CONFIG_CONFIGFS_FS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=m
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_KPROBES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_AUDIT_GENERIC=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atstk1002/atstk1002-linux-2.6.24.config b/target/device/Atmel/atstk1002/atstk1002-linux-2.6.24.config
new file mode 100644
index 000000000..ac7fb1e8b
--- /dev/null
+++ b/target/device/Atmel/atstk1002/atstk1002-linux-2.6.24.config
@@ -0,0 +1,1154 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24
+# Sun Feb 17 16:50:44 2008
+#
+CONFIG_AVR32=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_FAIR_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_RELAY=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_BASE_FULL is not set
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=1
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+
+#
+# System Type and features
+#
+CONFIG_SUBARCH_AVR32B=y
+CONFIG_MMU=y
+CONFIG_PERFORMANCE_COUNTERS=y
+CONFIG_PLATFORM_AT32AP=y
+CONFIG_CPU_AT32AP700X=y
+CONFIG_CPU_AT32AP7000=y
+CONFIG_BOARD_ATSTK1000=y
+# CONFIG_BOARD_ATNGW100 is not set
+CONFIG_BOARD_ATSTK1002=y
+# CONFIG_BOARD_ATSTK1003 is not set
+# CONFIG_BOARD_ATSTK1004 is not set
+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
+# CONFIG_BOARD_ATSTK100X_SPI1 is not set
+# CONFIG_BOARD_ATSTK1000_J2_LED is not set
+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
+CONFIG_BOARD_ATSTK1000_EXTDAC=y
+# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
+# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
+CONFIG_LOADER_U_BOOT=y
+
+#
+# Atmel AVR32 AP options
+#
+# CONFIG_AP700X_32_BIT_SMC is not set
+CONFIG_AP700X_16_BIT_SMC=y
+# CONFIG_AP700X_8_BIT_SMC is not set
+# CONFIG_GPIO_DEV is not set
+CONFIG_LOAD_ADDRESS=0x10000000
+CONFIG_ENTRY_ADDRESS=0x90000000
+CONFIG_PHYS_OFFSET=0x10000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_OWNERSHIP_TRACE is not set
+# CONFIG_NMI_DEBUGGING is not set
+CONFIG_DW_DMAC=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_CMDLINE=""
+
+#
+# Power management options
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+# CONFIG_CPU_FREQ_STAT is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_AT32AP=y
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=m
+CONFIG_INET_XFRM_MODE_TUNNEL=m
+CONFIG_INET_XFRM_MODE_BEET=m
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=m
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_START=0x8000000
+CONFIG_MTD_PHYSMAP_LEN=0x0
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+CONFIG_MTD_DATAFLASH=m
+CONFIG_MTD_M25P80=m
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+CONFIG_BLK_DEV_RAM=m
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ATMEL_PWM is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_ATMEL_SSC=m
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_PATA_AT32=m
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+CONFIG_MACB=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=m
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=m
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=m
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_INPUT_MOUSE=y
+# CONFIG_MOUSE_PS2 is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+CONFIG_MOUSE_GPIO=m
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_ATMEL=y
+CONFIG_SERIAL_ATMEL_CONSOLE=y
+# CONFIG_SERIAL_ATMEL_TTYAT is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Algorithms
+#
+CONFIG_I2C_ALGOBIT=m
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ATMELTWI is not set
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_ATMEL=y
+# CONFIG_SPI_BITBANG is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=m
+# CONFIG_SPI_TLE62X0 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_AT32AP700X_WDT=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_ATMEL=y
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_LTV350QV=y
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_LOGO is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# AVR32 devices
+#
+# CONFIG_SND_ATMEL_AC97 is not set
+
+#
+# SPI devices
+#
+CONFIG_SND_AT73C213=m
+CONFIG_SND_AT73C213_TARGET_BITRATE=48000
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+CONFIG_USB_GADGET_ATMEL_USBA=y
+CONFIG_USB_ATMEL_USBA=y
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_SPI=m
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=m
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=m
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=m
+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_AT32AP700X=y
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+# CONFIG_JBD_DEBUG is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_MINIX_FS=m
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=m
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+CONFIG_INSTRUMENTATION=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=m
+CONFIG_KPROBES=y
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_HMAC=m
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_ECB is not set
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=m
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+CONFIG_CRC7=m
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/target/device/Atmel/atstk1002/busybox-1.7.4.config b/target/device/Atmel/atstk1002/busybox-1.7.4.config
new file mode 100644
index 000000000..1690b8888
--- /dev/null
+++ b/target/device/Atmel/atstk1002/busybox-1.7.4.config
@@ -0,0 +1,748 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.7.2
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+# CONFIG_STATIC is not set
+# CONFIG_BUILD_LIBBUSYBOX is not set
+# CONFIG_FEATURE_FULL_LIBBUSYBOX is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+CONFIG_BUILD_AT_ONCE=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+CONFIG_PREFIX="/home/avr32/buildroot/project_build_avr32_nofpu/atstk1002/root"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=15
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+# CONFIG_FEATURE_EDITING_FANCY_PROMPT is not set
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+# CONFIG_AR is not set
+# CONFIG_FEATURE_AR_LONG_FILENAMES is not set
+# CONFIG_BUNZIP2 is not set
+# CONFIG_CPIO is not set
+# CONFIG_DPKG is not set
+# CONFIG_DPKG_DEB is not set
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+# CONFIG_GUNZIP is not set
+# CONFIG_FEATURE_GUNZIP_UNCOMPRESS is not set
+# CONFIG_GZIP is not set
+# CONFIG_RPM2CPIO is not set
+# CONFIG_RPM is not set
+# CONFIG_FEATURE_RPM_BZ2 is not set
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+# CONFIG_FEATURE_TAR_FROM is not set
+CONFIG_FEATURE_TAR_GZIP=y
+# CONFIG_FEATURE_TAR_COMPRESS is not set
+# CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set
+# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+# CONFIG_FEATURE_TAR_LONG_OPTIONS is not set
+# CONFIG_UNCOMPRESS is not set
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+# CONFIG_FEATURE_DEB_TAR_GZ is not set
+# CONFIG_FEATURE_DEB_TAR_BZ2 is not set
+# CONFIG_FEATURE_DEB_TAR_LZMA is not set
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+# CONFIG_CATV is not set
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+# CONFIG_CKSUM is not set
+# CONFIG_COMM is not set
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+# CONFIG_FEATURE_DD_SIGNAL_HANDLING is not set
+# CONFIG_FEATURE_DD_IBS_OBS is not set
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+# CONFIG_FEATURE_ENV_LONG_OPTIONS is not set
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+# CONFIG_FOLD is not set
+CONFIG_HEAD=y
+# CONFIG_FEATURE_FANCY_HEAD is not set
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+# CONFIG_FEATURE_INSTALL_LONG_OPTIONS is not set
+# CONFIG_LENGTH is not set
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+# CONFIG_FEATURE_MKDIR_LONG_OPTIONS is not set
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+# CONFIG_FEATURE_MV_LONG_OPTIONS is not set
+CONFIG_NICE=y
+# CONFIG_NOHUP is not set
+# CONFIG_OD is not set
+# CONFIG_PRINTENV is not set
+# CONFIG_PRINTF is not set
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+# CONFIG_REALPATH is not set
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+# CONFIG_FEATURE_FANCY_SLEEP is not set
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+# CONFIG_SPLIT is not set
+# CONFIG_FEATURE_SPLIT_FANCY is not set
+# CONFIG_STAT is not set
+# CONFIG_FEATURE_STAT_FORMAT is not set
+CONFIG_STTY=y
+# CONFIG_SUM is not set
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+# CONFIG_TR is not set
+# CONFIG_FEATURE_TR_CLASSES is not set
+# CONFIG_FEATURE_TR_EQUIV is not set
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+# CONFIG_FEATURE_WC_LARGE is not set
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+# CONFIG_DUMPKMAP is not set
+# CONFIG_LOADFONT is not set
+# CONFIG_LOADKMAP is not set
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+# CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS is not set
+# CONFIG_SETKEYCODES is not set
+# CONFIG_SETLOGCONS is not set
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+# CONFIG_CMP is not set
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+# CONFIG_FEATURE_DIFF_MINIMAL is not set
+# CONFIG_ED is not set
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+# CONFIG_MESG is not set
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+# CONFIG_FEATURE_WTMP is not set
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+# CONFIG_CHATTR is not set
+# CONFIG_FSCK is not set
+# CONFIG_LSATTR is not set
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL is not set
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+# CONFIG_FBSET is not set
+# CONFIG_FEATURE_FBSET_FANCY is not set
+# CONFIG_FEATURE_FBSET_READMODE is not set
+# CONFIG_FDFLUSH is not set
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+# CONFIG_LOSETUP is not set
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+# CONFIG_FEATURE_MDEV_LOAD_FIRMWARE is not set
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+# CONFIG_READPROFILE is not set
+# CONFIG_SETARCH is not set
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+# CONFIG_FEATURE_MTAB_SUPPORT is not set
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+# CONFIG_BBCONFIG is not set
+# CONFIG_CHRT is not set
+# CONFIG_CROND is not set
+# CONFIG_DEBUG_CROND_OPTION is not set
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+# CONFIG_CRONTAB is not set
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+# CONFIG_LAST is not set
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+# CONFIG_FEATURE_LESS_BRACKETS is not set
+# CONFIG_FEATURE_LESS_FLAGS is not set
+# CONFIG_FEATURE_LESS_FLAGCS is not set
+# CONFIG_FEATURE_LESS_MARKS is not set
+CONFIG_FEATURE_LESS_REGEXP=y
+# CONFIG_HDPARM is not set
+# CONFIG_FEATURE_HDPARM_GET_IDENTITY is not set
+# CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set
+# CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA is not set
+# CONFIG_MAKEDEVS is not set
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+# CONFIG_FEATURE_MAKEDEVS_TABLE is not set
+# CONFIG_MOUNTPOINT is not set
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+# CONFIG_RUNLEVEL is not set
+CONFIG_RX=y
+CONFIG_STRINGS=y
+# CONFIG_SETSID is not set
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+# CONFIG_TTYSIZE is not set
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+# CONFIG_DNSD is not set
+# CONFIG_ETHER_WAKE is not set
+# CONFIG_FAKEIDENTD is not set
+# CONFIG_FTPGET is not set
+# CONFIG_FTPPUT is not set
+# CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES is not set
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+# CONFIG_PSCAN is not set
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+# CONFIG_FEATURE_TELNET_AUTOLOGIN is not set
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+# CONFIG_TFTP is not set
+# CONFIG_FEATURE_TFTP_GET is not set
+# CONFIG_FEATURE_TFTP_PUT is not set
+# CONFIG_FEATURE_TFTP_BLOCKSIZE is not set
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+# CONFIG_APP_UDHCPD is not set
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+# CONFIG_FUSER is not set
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+# CONFIG_NMETER is not set
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+# CONFIG_RENICE is not set
+# CONFIG_BB_SYSCTL is not set
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+# CONFIG_FEATURE_TOP_DECIMALS is not set
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+# CONFIG_ASH_GETOPTS is not set
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atstk1002/busybox-1.8.2.config b/target/device/Atmel/atstk1002/busybox-1.8.2.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atstk1002/busybox-1.8.2.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atstk1002/busybox-1.9.0.config b/target/device/Atmel/atstk1002/busybox-1.9.0.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atstk1002/busybox-1.9.0.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atstk1002/busybox-1.9.1.config b/target/device/Atmel/atstk1002/busybox-1.9.1.config
new file mode 100644
index 000000000..7dd45cd2e
--- /dev/null
+++ b/target/device/Atmel/atstk1002/busybox-1.9.1.config
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.8.2
+# Sun Dec 23 12:11:59 2007
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_NITPICK is not set
+# CONFIG_DESKTOP is not set
+# CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+# CONFIG_FEATURE_COMPRESS_USAGE is not set
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_LOCALE_SUPPORT is not set
+CONFIG_GETOPT_LONG=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+# CONFIG_FEATURE_PIDFILE is not set
+CONFIG_FEATURE_SUID=y
+# CONFIG_FEATURE_SUID_CONFIG is not set
+# CONFIG_FEATURE_SUID_CONFIG_QUIET is not set
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+CONFIG_FEATURE_HAVE_RPC=y
+
+#
+# Build Options
+#
+CONFIG_STATIC=y
+CONFIG_BUILD_LIBBUSYBOX=y
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+CONFIG_INCLUDE_SUSv2=y
+
+#
+# Installation Options
+#
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="/usr/avr32-linux"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+CONFIG_FEATURE_EDITING_FANCY_KEYS=y
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=100
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+# CONFIG_FEATURE_USERNAME_COMPLETION is not set
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_AR=y
+CONFIG_FEATURE_AR_LONG_FILENAMES=y
+CONFIG_BUNZIP2=y
+CONFIG_BZIP2=y
+CONFIG_CPIO=y
+CONFIG_DPKG=y
+CONFIG_DPKG_DEB=y
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_FEATURE_GUNZIP_UNCOMPRESS=y
+CONFIG_GZIP=y
+CONFIG_RPM2CPIO=y
+CONFIG_RPM=y
+CONFIG_FEATURE_RPM_BZ2=y
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_BZIP2=y
+CONFIG_FEATURE_TAR_LZMA=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_GZIP=y
+CONFIG_FEATURE_TAR_COMPRESS=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY=y
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_UNCOMPRESS=y
+CONFIG_UNLZMA=y
+CONFIG_FEATURE_LZMA_FAST=y
+CONFIG_UNZIP=y
+
+#
+# Common options for cpio and tar
+#
+# CONFIG_FEATURE_UNARCHIVE_TAPE is not set
+
+#
+# Common options for dpkg and dpkg_deb
+#
+CONFIG_FEATURE_DEB_TAR_GZ=y
+CONFIG_FEATURE_DEB_TAR_BZ2=y
+CONFIG_FEATURE_DEB_TAR_LZMA=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAL=y
+CONFIG_CAT=y
+CONFIG_CATV=y
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_CHROOT=y
+CONFIG_CKSUM=y
+CONFIG_COMM=y
+CONFIG_CP=y
+CONFIG_CUT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_IBS_OBS=y
+CONFIG_DF=y
+CONFIG_DIRNAME=y
+CONFIG_DOS2UNIX=y
+CONFIG_UNIX2DOS=y
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+CONFIG_EXPAND=y
+CONFIG_FEATURE_EXPAND_LONG_OPTIONS=y
+CONFIG_EXPR=y
+CONFIG_EXPR_MATH_SUPPORT_64=y
+CONFIG_FALSE=y
+CONFIG_FOLD=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+CONFIG_HOSTID=y
+CONFIG_ID=y
+CONFIG_INSTALL=y
+CONFIG_FEATURE_INSTALL_LONG_OPTIONS=y
+CONFIG_LENGTH=y
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+CONFIG_PRINTENV=y
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_SEQ=y
+CONFIG_SHA1SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+CONFIG_SPLIT=y
+CONFIG_FEATURE_SPLIT_FANCY=y
+CONFIG_STAT=y
+CONFIG_FEATURE_STAT_FORMAT=y
+CONFIG_STTY=y
+CONFIG_SUM=y
+CONFIG_SYNC=y
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TEST=y
+CONFIG_FEATURE_TEST_64=y
+CONFIG_TOUCH=y
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+CONFIG_FEATURE_TR_EQUIV=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+CONFIG_UNEXPAND=y
+CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS=y
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+CONFIG_FEATURE_WC_LARGE=y
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+CONFIG_FEATURE_PRESERVE_HARDLINKS=y
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+CONFIG_KBD_MODE=y
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+CONFIG_RESIZE=y
+CONFIG_FEATURE_RESIZE_PRINT=y
+CONFIG_SETCONSOLE=y
+CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS=y
+CONFIG_SETKEYCODES=y
+CONFIG_SETLOGCONS=y
+
+#
+# Debian Utilities
+#
+CONFIG_MKTEMP=y
+# CONFIG_PIPE_PROGRESS is not set
+CONFIG_RUN_PARTS=y
+CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS=y
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+CONFIG_START_STOP_DAEMON=y
+CONFIG_FEATURE_START_STOP_DAEMON_FANCY=y
+CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS=y
+CONFIG_WHICH=y
+
+#
+# Editors
+#
+CONFIG_AWK=y
+CONFIG_FEATURE_AWK_MATH=y
+CONFIG_CMP=y
+CONFIG_DIFF=y
+CONFIG_FEATURE_DIFF_BINARY=y
+CONFIG_FEATURE_DIFF_DIR=y
+CONFIG_FEATURE_DIFF_MINIMAL=y
+CONFIG_ED=y
+CONFIG_PATCH=y
+CONFIG_SED=y
+CONFIG_VI=y
+CONFIG_FEATURE_VI_MAX_LEN=1024
+CONFIG_FEATURE_VI_COLON=y
+CONFIG_FEATURE_VI_YANKMARK=y
+CONFIG_FEATURE_VI_SEARCH=y
+CONFIG_FEATURE_VI_USE_SIGNALS=y
+CONFIG_FEATURE_VI_DOT_CMD=y
+CONFIG_FEATURE_VI_READONLY=y
+CONFIG_FEATURE_VI_SETOPTS=y
+CONFIG_FEATURE_VI_SET=y
+CONFIG_FEATURE_VI_WIN_RESIZE=y
+CONFIG_FEATURE_VI_OPTIMIZE_CURSOR=y
+CONFIG_FEATURE_ALLOW_EXEC=y
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+CONFIG_INIT=y
+# CONFIG_DEBUG_INIT is not set
+CONFIG_FEATURE_USE_INITTAB=y
+CONFIG_FEATURE_INIT_SCTTY=y
+CONFIG_FEATURE_INIT_SYSLOG=y
+CONFIG_FEATURE_EXTRA_QUIET=y
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+CONFIG_FEATURE_INITRD=y
+CONFIG_HALT=y
+CONFIG_MESG=y
+
+#
+# Login/Password Management Utilities
+#
+CONFIG_FEATURE_SHADOWPASSWDS=y
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+CONFIG_ADDGROUP=y
+CONFIG_FEATURE_ADDUSER_TO_GROUP=y
+CONFIG_DELGROUP=y
+CONFIG_FEATURE_DEL_USER_FROM_GROUP=y
+CONFIG_ADDUSER=y
+CONFIG_DELUSER=y
+CONFIG_GETTY=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_WTMP=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+CONFIG_PASSWD=y
+CONFIG_FEATURE_PASSWD_WEAK_CHECK=y
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+CONFIG_SU=y
+CONFIG_FEATURE_SU_SYSLOG=y
+CONFIG_FEATURE_SU_CHECKS_SHELLS=y
+CONFIG_SULOGIN=y
+CONFIG_VLOCK=y
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+CONFIG_LSATTR=y
+
+#
+# Linux Module Utilities
+#
+CONFIG_INSMOD=y
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+CONFIG_FEATURE_INSMOD_LOAD_MAP=y
+CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_MULTIPLE_OPTIONS=y
+CONFIG_FEATURE_MODPROBE_FANCY_ALIAS=y
+
+#
+# Options common to multiple modutils
+#
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+# CONFIG_FEATURE_2_4_MODULES is not set
+CONFIG_FEATURE_2_6_MODULES=y
+# CONFIG_FEATURE_QUERY_MODULE_INTERFACE is not set
+
+#
+# Linux System Utilities
+#
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+CONFIG_FBSET=y
+CONFIG_FEATURE_FBSET_FANCY=y
+CONFIG_FEATURE_FBSET_READMODE=y
+CONFIG_FDFLUSH=y
+CONFIG_FDFORMAT=y
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+# CONFIG_FEATURE_OSF_LABEL is not set
+# CONFIG_FEATURE_FDISK_ADVANCED is not set
+# CONFIG_FREERAMDISK is not set
+# CONFIG_FSCK_MINIX is not set
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+CONFIG_GETOPT=y
+CONFIG_HEXDUMP=y
+CONFIG_HWCLOCK=y
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+CONFIG_IPCRM=y
+CONFIG_IPCS=y
+CONFIG_LOSETUP=y
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+CONFIG_MKSWAP=y
+# CONFIG_FEATURE_MKSWAP_V0 is not set
+CONFIG_MORE=y
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_MOUNT=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+CONFIG_FEATURE_MOUNT_NFS=y
+CONFIG_FEATURE_MOUNT_CIFS=y
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+CONFIG_RDATE=y
+CONFIG_READPROFILE=y
+CONFIG_SETARCH=y
+CONFIG_SWAPONOFF=y
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MTAB_SUPPORT=y
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_ADJTIMEX is not set
+CONFIG_BBCONFIG=y
+CONFIG_CHRT=y
+CONFIG_CROND=y
+CONFIG_DEBUG_CROND_OPTION=y
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_CRONTAB=y
+CONFIG_DC=y
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+# CONFIG_EJECT is not set
+CONFIG_LAST=y
+CONFIG_LESS=y
+CONFIG_FEATURE_LESS_MAXLINES=9999999
+CONFIG_FEATURE_LESS_BRACKETS=y
+CONFIG_FEATURE_LESS_FLAGS=y
+CONFIG_FEATURE_LESS_FLAGCS=y
+CONFIG_FEATURE_LESS_MARKS=y
+CONFIG_FEATURE_LESS_REGEXP=y
+CONFIG_HDPARM=y
+CONFIG_FEATURE_HDPARM_GET_IDENTITY=y
+CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET=y
+CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF=y
+CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA=y
+CONFIG_MAKEDEVS=y
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+CONFIG_FEATURE_MAKEDEVS_TABLE=y
+CONFIG_MICROCOM=y
+CONFIG_MOUNTPOINT=y
+CONFIG_MT=y
+# CONFIG_RAIDAUTORUN is not set
+# CONFIG_READAHEAD is not set
+CONFIG_RUNLEVEL=y
+CONFIG_RX=y
+CONFIG_STRINGS=y
+CONFIG_SETSID=y
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+CONFIG_TIME=y
+CONFIG_TTYSIZE=y
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_FEATURE_IPV6=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+CONFIG_ARP=y
+CONFIG_ARPING=y
+CONFIG_DNSD=y
+CONFIG_ETHER_WAKE=y
+# CONFIG_FAKEIDENTD is not set
+CONFIG_FTPGET=y
+CONFIG_FTPPUT=y
+CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS=y
+CONFIG_HOSTNAME=y
+CONFIG_HTTPD=y
+CONFIG_FEATURE_HTTPD_RANGES=y
+CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+CONFIG_FEATURE_HTTPD_RELOAD_CONFIG_SIGHUP=y
+CONFIG_FEATURE_HTTPD_SETUID=y
+CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_MIME_TYPES=y
+CONFIG_FEATURE_HTTPD_CGI=y
+CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+CONFIG_FEATURE_HTTPD_PROXY=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+# CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS is not set
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+# CONFIG_FEATURE_IFUPDOWN_MAPPING is not set
+CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP=y
+CONFIG_INETD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME=y
+CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN=y
+CONFIG_FEATURE_INETD_RPC=y
+# CONFIG_IP is not set
+# CONFIG_FEATURE_IP_ADDRESS is not set
+# CONFIG_FEATURE_IP_LINK is not set
+# CONFIG_FEATURE_IP_ROUTE is not set
+# CONFIG_FEATURE_IP_TUNNEL is not set
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_NC is not set
+# CONFIG_NC_SERVER is not set
+# CONFIG_NC_EXTRA is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_NSLOOKUP=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_PSCAN=y
+CONFIG_FEATURE_FANCY_PING=y
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+CONFIG_TELNET=y
+CONFIG_FEATURE_TELNET_TTYPE=y
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+CONFIG_FEATURE_TELNETD_STANDALONE=y
+CONFIG_TFTP=y
+CONFIG_FEATURE_TFTP_GET=y
+CONFIG_FEATURE_TFTP_PUT=y
+CONFIG_FEATURE_TFTP_BLOCKSIZE=y
+# CONFIG_DEBUG_TFTP is not set
+CONFIG_TRACEROUTE=y
+CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set
+CONFIG_APP_UDHCPD=y
+# CONFIG_APP_DHCPRELAY is not set
+# CONFIG_APP_DUMPLEASES is not set
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_APP_UDHCPC=y
+# CONFIG_FEATURE_UDHCP_DEBUG is not set
+# CONFIG_FEATURE_RFC3397 is not set
+CONFIG_VCONFIG=y
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+# CONFIG_FEATURE_WGET_LONG_OPTIONS is not set
+# CONFIG_ZCIP is not set
+
+#
+# Process Utilities
+#
+CONFIG_FREE=y
+CONFIG_FUSER=y
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+CONFIG_KILLALL5=y
+CONFIG_NMETER=y
+CONFIG_PGREP=y
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+CONFIG_PKILL=y
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+CONFIG_RENICE=y
+CONFIG_BB_SYSCTL=y
+CONFIG_TOP=y
+CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y
+CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y
+CONFIG_FEATURE_TOP_DECIMALS=y
+CONFIG_FEATURE_TOPMEM=y
+CONFIG_UPTIME=y
+CONFIG_WATCH=y
+
+#
+# Shells
+#
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_LASH is not set
+# CONFIG_FEATURE_SH_IS_MSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+CONFIG_ASH=y
+
+#
+# Ash Shell Options
+#
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_READ_NCHARS=y
+CONFIG_ASH_READ_TIMEOUT=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_MATH_SUPPORT=y
+CONFIG_ASH_MATH_SUPPORT_64=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+CONFIG_ASH_OPTIMIZE_FOR_SIZE=y
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_LASH is not set
+# CONFIG_MSH is not set
+
+#
+# Bourne Shell Options
+#
+# CONFIG_FEATURE_SH_EXTRA_QUIET is not set
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_CTTYHACK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+# CONFIG_FEATURE_REMOTE_LOG is not set
+# CONFIG_FEATURE_IPC_SYSLOG is not set
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=
+# CONFIG_LOGREAD is not set
+# CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING is not set
+CONFIG_KLOGD=y
+CONFIG_LOGGER=y
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_SV is not set
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+
+#
+# ipsvd utilities
+#
+# CONFIG_TCPSVD is not set
+# CONFIG_UDPSVD is not set
diff --git a/target/device/Atmel/atstk1002/device_table.txt b/target/device/Atmel/atstk1002/device_table.txt
index 2848363b9..1b76a3040 100644
--- a/target/device/Atmel/atstk1002/device_table.txt
+++ b/target/device/Atmel/atstk1002/device_table.txt
@@ -47,6 +47,7 @@
 /var/tmp	d	1777	0	0	-	-	-	-	-
 /home/avr32	d	2755	500	500	-	-	-	-	-
 /home/default	d	2755	1000	1000	-	-	-	-	-
+/media		d	755	0	0	-	-	-	-	-
 /www		d	755	0	0	-	-	-	-	-
 #<name>					<type>	<mode>	<uid>	<gid>	<major>	<minor>	<start>	<inc>	<count>
 /bin/busybox				f	4755	0	0	-	-	-	-	-
@@ -56,7 +57,6 @@
 /etc/network/if-pre-up.d		d	755	0	0	-	-	-	-	-
 /etc/network/if-down.d			d	755	0	0	-	-	-	-	-
 /etc/network/if-post-down.d		d	755	0	0	-	-	-	-	-
-/usr/share/udhcpc/default.script	f	755	0	0	-	-	-	-	-
 # uncomment this to allow starting x as non-root
 #/usr/X11R6/bin/Xfbdev		f	4755	0	0	-	-	-	-	-
 # Normal system devices
diff --git a/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
new file mode 100644
index 000000000..1f0a5f542
--- /dev/null
+++ b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch
@@ -0,0 +1,19857 @@
+ MAINTAINERS                                |    7 +
+ Makefile                                   |    2 +-
+ arch/avr32/Kconfig                         |   34 +-
+ arch/avr32/Makefile                        |    3 +-
+ arch/avr32/boards/atngw100/Kconfig         |   12 +
+ arch/avr32/boards/atngw100/flash.c         |    5 +-
+ arch/avr32/boards/atngw100/setup.c         |   26 +-
+ arch/avr32/boards/atstk1000/Kconfig        |   82 +-
+ arch/avr32/boards/atstk1000/Makefile       |    2 +
+ arch/avr32/boards/atstk1000/atstk1000.h    |    2 +
+ arch/avr32/boards/atstk1000/atstk1002.c    |  148 ++-
+ arch/avr32/boards/atstk1000/atstk1003.c    |  181 +++
+ arch/avr32/boards/atstk1000/atstk1004.c    |  152 +++
+ arch/avr32/boards/atstk1000/flash.c        |    5 +-
+ arch/avr32/boards/atstk1000/setup.c        |   64 +
+ arch/avr32/configs/atngw100_defconfig      |  210 +++-
+ arch/avr32/configs/atstk1002_defconfig     |  482 +++++--
+ arch/avr32/configs/atstk1003_defconfig     | 1045 ++++++++++++++
+ arch/avr32/configs/atstk1004_defconfig     |  722 ++++++++++
+ arch/avr32/drivers/Makefile                |    1 +
+ arch/avr32/drivers/dw-dmac.c               |  761 +++++++++++
+ arch/avr32/drivers/dw-dmac.h               |   42 +
+ arch/avr32/kernel/Makefile                 |    6 +-
+ arch/avr32/kernel/dma-controller.c         |   34 +
+ arch/avr32/kernel/entry-avr32b.S           |   26 +-
+ arch/avr32/kernel/setup.c                  |    2 +-
+ arch/avr32/kernel/vmlinux.lds.S            |  143 ++
+ arch/avr32/kernel/vmlinux.lds.c            |  142 --
+ arch/avr32/mach-at32ap/Kconfig             |   19 +-
+ arch/avr32/mach-at32ap/Makefile            |    5 +-
+ arch/avr32/mach-at32ap/at32ap7000.c        | 1324 ------------------
+ arch/avr32/mach-at32ap/at32ap700x.c        | 1754 ++++++++++++++++++++++++
+ arch/avr32/mach-at32ap/clock.c             |  116 ++
+ arch/avr32/mach-at32ap/gpio-dev.c          |  573 ++++++++
+ arch/avr32/mach-at32ap/hsmc.c              |  129 ++-
+ arch/avr32/mach-at32ap/pio.c               |   80 ++
+ arch/avr32/mach-at32ap/pm.h                |    8 +
+ arch/avr32/mm/dma-coherent.c               |    7 +
+ arch/avr32/mm/init.c                       |   12 +-
+ drivers/char/watchdog/Kconfig              |    2 +-
+ drivers/char/watchdog/at32ap700x_wdt.c     |   69 +-
+ drivers/i2c/busses/Kconfig                 |    8 +
+ drivers/i2c/busses/Makefile                |    1 +
+ drivers/i2c/busses/i2c-atmeltwi.c          |  436 ++++++
+ drivers/i2c/busses/i2c-atmeltwi.h          |  117 ++
+ drivers/misc/Kconfig                       |    9 +
+ drivers/misc/Makefile                      |    1 +
+ drivers/misc/atmel-ssc.c                   |  174 +++
+ drivers/mmc/host/Kconfig                   |   10 +
+ drivers/mmc/host/Makefile                  |    1 +
+ drivers/mmc/host/atmel-mci.c               | 1176 ++++++++++++++++
+ drivers/mmc/host/atmel-mci.h               |  192 +++
+ drivers/mtd/chips/cfi_cmdset_0001.c        |   43 +
+ drivers/mtd/chips/cfi_cmdset_0002.c        |    6 +-
+ drivers/pcmcia/Kconfig                     |    7 +
+ drivers/pcmcia/Makefile                    |    1 +
+ drivers/pcmcia/at32_cf.c                   |  531 ++++++++
+ drivers/pcmcia/cistpl.c                    |   48 +-
+ drivers/spi/atmel_spi.c                    |    4 +-
+ drivers/usb/gadget/Kconfig                 |   26 +-
+ drivers/usb/gadget/Makefile                |    1 +
+ drivers/usb/gadget/atmel_usba_udc.c        | 2038 ++++++++++++++++++++++++++++
+ drivers/usb/gadget/atmel_usba_udc.h        |  350 +++++
+ drivers/video/atmel_lcdfb.c                |    6 +-
+ drivers/video/backlight/Kconfig            |   12 +
+ drivers/video/backlight/Makefile           |    2 +
+ drivers/video/backlight/ltv350qv.c         |  339 +++++
+ drivers/video/backlight/ltv350qv.h         |   95 ++
+ include/asm-avr32/arch-at32ap/at32ap7000.h |   35 -
+ include/asm-avr32/arch-at32ap/at32ap700x.h |   35 +
+ include/asm-avr32/arch-at32ap/board.h      |   39 +
+ include/asm-avr32/arch-at32ap/cpu.h        |    2 +-
+ include/asm-avr32/arch-at32ap/io.h         |    4 +-
+ include/asm-avr32/arch-at32ap/portmux.h    |   13 +
+ include/asm-avr32/arch-at32ap/smc.h        |   51 +-
+ include/asm-avr32/dma-controller.h         |  166 +++
+ include/asm-avr32/dma-mapping.h            |   17 +-
+ include/asm-avr32/system.h                 |   13 +-
+ include/asm-avr32/unistd.h                 |   13 +
+ include/linux/atmel-ssc.h                  |  312 +++++
+ include/linux/spi/at73c213.h               |   25 +
+ include/pcmcia/cs_types.h                  |    2 +-
+ init/do_mounts.c                           |    8 +-
+ scripts/checkstack.pl                      |    5 +
+ sound/Kconfig                              |    6 +
+ sound/Makefile                             |    3 +-
+ sound/avr32/Kconfig                        |   11 +
+ sound/avr32/Makefile                       |    3 +
+ sound/avr32/ac97c.c                        |  914 +++++++++++++
+ sound/avr32/ac97c.h                        |   71 +
+ sound/oss/Kconfig                          |    4 +
+ sound/oss/Makefile                         |    1 +
+ sound/oss/at32_abdac.c                     |  722 ++++++++++
+ sound/oss/at32_abdac.h                     |   59 +
+ sound/spi/Kconfig                          |   31 +
+ sound/spi/Makefile                         |    5 +
+ sound/spi/at73c213.c                       | 1121 +++++++++++++++
+ sound/spi/at73c213.h                       |  119 ++
+ 98 files changed, 16057 insertions(+), 1826 deletions(-)
+ create mode 100644 arch/avr32/boards/atngw100/Kconfig
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c
+ create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c
+ create mode 100644 arch/avr32/configs/atstk1003_defconfig
+ create mode 100644 arch/avr32/configs/atstk1004_defconfig
+ create mode 100644 arch/avr32/drivers/Makefile
+ create mode 100644 arch/avr32/drivers/dw-dmac.c
+ create mode 100644 arch/avr32/drivers/dw-dmac.h
+ create mode 100644 arch/avr32/kernel/dma-controller.c
+ create mode 100644 arch/avr32/kernel/vmlinux.lds.S
+ delete mode 100644 arch/avr32/kernel/vmlinux.lds.c
+ delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c
+ create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c
+ create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h
+ create mode 100644 drivers/misc/atmel-ssc.c
+ create mode 100644 drivers/mmc/host/atmel-mci.c
+ create mode 100644 drivers/mmc/host/atmel-mci.h
+ create mode 100644 drivers/pcmcia/at32_cf.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.h
+ create mode 100644 drivers/video/backlight/ltv350qv.c
+ create mode 100644 drivers/video/backlight/ltv350qv.h
+ delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h
+ create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h
+ create mode 100644 include/asm-avr32/dma-controller.h
+ create mode 100644 include/linux/atmel-ssc.h
+ create mode 100644 include/linux/spi/at73c213.h
+ create mode 100644 sound/avr32/Kconfig
+ create mode 100644 sound/avr32/Makefile
+ create mode 100644 sound/avr32/ac97c.c
+ create mode 100644 sound/avr32/ac97c.h
+ create mode 100644 sound/oss/at32_abdac.c
+ create mode 100644 sound/oss/at32_abdac.h
+ create mode 100644 sound/spi/Kconfig
+ create mode 100644 sound/spi/Makefile
+ create mode 100644 sound/spi/at73c213.c
+ create mode 100644 sound/spi/at73c213.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 9a91d9e..587afe3 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -669,6 +669,13 @@ P:	Haavard Skinnemoen
+ M:	hskinnemoen@atmel.com
+ S:	Supported
+ 
++ATMEL USBA UDC DRIVER
++P:	Haavard Skinnemoen
++M:	hskinnemoen@atmel.com
++L:	kernel@avr32linux.org
++W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
++S:	Supported
++
+ ATMEL WIRELESS DRIVER
+ P:	Simon Kelley
+ M:	simon@thekelleys.org.uk
+diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
+index d12346a..62913a4 100644
+--- a/arch/avr32/Kconfig
++++ b/arch/avr32/Kconfig
+@@ -87,19 +87,36 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
++config CPU_AT32AP700X
++	bool
++	select PLATFORM_AT32AP
++
+ choice
+ 	prompt "AVR32 CPU type"
+ 	default CPU_AT32AP7000
+ 
+ config CPU_AT32AP7000
+ 	bool "AT32AP7000"
+-	select PLATFORM_AT32AP
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7001
++	bool "AT32AP7001"
++	select CPU_AT32AP700X
++
++config CPU_AT32AP7002
++	bool "AT32AP7002"
++	select CPU_AT32AP700X
++
+ endchoice
+ 
+ #
+ # CPU Daughterboards for ATSTK1000
+ config BOARD_ATSTK1002
+ 	bool
++config BOARD_ATSTK1003
++	bool
++config BOARD_ATSTK1004
++	bool
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -108,6 +125,8 @@ choice
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+ 	select BOARD_ATSTK1002 if CPU_AT32AP7000
++	select BOARD_ATSTK1003 if CPU_AT32AP7001
++	select BOARD_ATSTK1004 if CPU_AT32AP7002
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
+@@ -116,6 +135,9 @@ endchoice
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -129,15 +151,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -175,6 +197,10 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
+index dc6bc01..96f0030 100644
+--- a/arch/avr32/Makefile
++++ b/arch/avr32/Makefile
+@@ -16,7 +16,7 @@ AFLAGS		+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ CFLAGS		+= $(cpuflags-y)
+ AFLAGS		+= $(cpuflags-y)
+@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/avr32/boards/atngw100/
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
+new file mode 100644
+index 0000000..5d922df
+--- /dev/null
++++ b/arch/avr32/boards/atngw100/Kconfig
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
+index f9b32a8..b07ae63 100644
+--- a/arch/avr32/boards/atngw100/flash.c
++++ b/arch/avr32/boards/atngw100/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+index ef80156..2a5f587 100644
+--- a/arch/avr32/boards/atngw100/setup.c
++++ b/arch/avr32/boards/atngw100/setup.c
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = {
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+-	.sda_pin	= GPIO_PIN_PA(6),
+-	.scl_pin	= GPIO_PIN_PA(7),
++	.sda_pin		= GPIO_PIN_PA(6),
++	.scl_pin		= GPIO_PIN_PA(7),
++	.sda_is_open_drain	= 1,
++	.scl_is_open_drain	= 1,
++	.udelay			= 2,	/* close to 100 kHz */
+ };
+ 
+ static struct platform_device i2c_gpio_device = {
+@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = {
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -154,6 +164,8 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
++	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+@@ -161,9 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
+-	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
+-	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
++	at32_select_gpio(i2c_gpio_data.sda_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
++	at32_select_gpio(i2c_gpio_data.scl_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 718578f..aac73a6 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -1,34 +1,34 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +36,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +66,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile
+index 8e09922..beead86 100644
+--- a/arch/avr32/boards/atstk1000/Makefile
++++ b/arch/avr32/boards/atstk1000/Makefile
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h
+index 9a49ed0..9392d32 100644
+--- a/arch/avr32/boards/atstk1000/atstk1000.h
++++ b/arch/avr32/boards/atstk1000/atstk1000.h
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index c9981b7..d30de89 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -11,17 +11,17 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+ #include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -48,8 +48,24 @@ static struct eth_platform_data __initdata eth_data[2] = {
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
+ 	{
+ 		/* QVGA display */
+ 		.modalias	= "ltv350qv",
+@@ -60,12 +76,30 @@ static struct spi_board_info spi0_board_info[] __initdata = {
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_NONE,
++	.wp_pin		= GPIO_PIN_NONE,
++};
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -121,68 +155,44 @@ static void __init set_hw_addr(struct platform_device *pdev)
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
+ }
+-
+ #else
+-static void setup_j2_leds(void)
++static void __init atstk1002_setup_extdac(void)
+ {
++
+ }
+-#endif
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -219,7 +229,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -229,23 +239,35 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, &mci0_data);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+ 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
+ 			     fbmem_start, fbmem_size);
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 
+-	setup_j2_leds();
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+new file mode 100644
+index 0000000..1842b7c
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1002_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1002_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1002_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+new file mode 100644
+index 0000000..96015dd
+--- /dev/null
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
+index aac4300..3d0a102 100644
+--- a/arch/avr32/boards/atstk1000/flash.c
++++ b/arch/avr32/boards/atstk1000/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c
+index c9af409..8bedf93 100644
+--- a/arch/avr32/boards/atstk1000/setup.c
++++ b/arch/avr32/boards/atstk1000/setup.c
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = {
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
+index b799a68..ca4538b 100644
+--- a/arch/avr32/configs/atngw100_defconfig
++++ b/arch/avr32/configs/atngw100_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.22.atmel.1
++# Thu Jul 12 17:49:20 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -111,17 +111,22 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
++# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -145,6 +150,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -153,6 +159,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -187,13 +214,8 @@ CONFIG_NET_KEY=y
+ # CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ CONFIG_IP_MULTICAST=y
+-CONFIG_IP_ADVANCED_ROUTER=y
+-CONFIG_ASK_IP_FIB_HASH=y
+-# CONFIG_IP_FIB_TRIE is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
+ CONFIG_IP_FIB_HASH=y
+-# CONFIG_IP_MULTIPLE_TABLES is not set
+-# CONFIG_IP_ROUTE_MULTIPATH is not set
+-# CONFIG_IP_ROUTE_VERBOSE is not set
+ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+@@ -240,6 +262,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -284,6 +307,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -359,13 +383,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -521,7 +551,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # Misc devices
+ #
+-# CONFIG_BLINK is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -545,13 +574,26 @@ CONFIG_NETDEVICES=y
+ # CONFIG_BONDING is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ 
+ #
+ # Ethernet (10 or 100Mbit)
+ #
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -625,7 +667,15 @@ CONFIG_UNIX98_PTYS=y
+ # IPMI
+ #
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++CONFIG_AT32AP700X_WDT_TIMEOUT=2
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+@@ -636,7 +686,42 @@ CONFIG_UNIX98_PTYS=y
+ # TPM devices
+ #
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_ATMELTWI_BAUDRATE=100000
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,7 +740,7 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
+ 
+ #
+ # Dallas's 1-wire bus
+@@ -706,8 +791,41 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
+ 
+ #
+ # LED devices
+@@ -727,27 +845,62 @@ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+ 
++#
++# InfiniBand support
++#
+ 
+ #
+-# LED drivers
++# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+ #
+ 
+ #
+-# LED Triggers
++# Real Time Clock
+ #
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -781,7 +934,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -936,7 +1090,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+-# CONFIG_DEBUG_FS is not set
++CONFIG_DEBUG_FS=y
+ # CONFIG_HEADERS_CHECK is not set
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
+index 3b977fd..c3d4c33 100644
+--- a/arch/avr32/configs/atstk1002_defconfig
++++ b/arch/avr32/configs/atstk1002_defconfig
+@@ -1,7 +1,7 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.23.atmel.1
++# Tue Oct 16 12:57:22 2007
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+@@ -18,20 +18,15 @@ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+@@ -39,7 +34,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y
+ CONFIG_TASKSTATS=y
+ CONFIG_TASK_DELAY_ACCT=y
+ # CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
+ CONFIG_AUDIT=y
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
+@@ -63,7 +58,6 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+@@ -74,24 +68,17 @@ CONFIG_SLUB=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+-# CONFIG_MODULE_FORCE_UNLOAD is not set
++CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+-# CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
++CONFIG_KMOD=y
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +86,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -114,17 +101,27 @@ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
+ CONFIG_CPU_AT32AP7000=y
++# CONFIG_CPU_AT32AP7001 is not set
++# CONFIG_CPU_AT32AP7002 is not set
+ CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002_CUSTOM is not set
++# CONFIG_BOARD_ATSTK1002_SPI1 is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED is not set
++# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1002_J2_RGB is not set
++# CONFIG_BOARD_ATSTK1002_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1002_CF_HACKS is not set
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_GPIO_DEV=y
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -147,7 +144,9 @@ CONFIG_FLAT_NODE_MEM_MAP=y
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+ # CONFIG_HZ_300 is not set
+@@ -156,6 +155,27 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
++# Power managment options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++CONFIG_CPU_FREQ_STAT=m
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
+ # Bus options
+ #
+ # CONFIG_ARCH_SUPPORTS_MSI is not set
+@@ -163,7 +183,16 @@ CONFIG_CMDLINE=""
+ #
+ # PCCARD (PCMCIA/CardBus) support
+ #
+-# CONFIG_PCCARD is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++# CONFIG_PCMCIA_LOAD_CIS is not set
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
+ 
+ #
+ # Executable file formats
+@@ -251,6 +280,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -265,10 +295,6 @@ CONFIG_STANDALONE=y
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -327,6 +353,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +373,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,11 +385,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -381,29 +395,34 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ CONFIG_DUMMY=y
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++CONFIG_LXT_PHY=y
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+@@ -413,6 +432,7 @@ CONFIG_MACB=y
+ #
+ # CONFIG_WLAN_PRE80211 is not set
+ # CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
+ # CONFIG_WAN is not set
+ CONFIG_PPP=m
+ # CONFIG_PPP_MULTILINK is not set
+@@ -423,27 +443,56 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_TSDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,34 +521,88 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# IPMI
++# Watchdog Device Drivers
+ #
+-# CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+-# CONFIG_RAW_DRIVER is not set
+ 
+ #
+-# TPM devices
++# PCMCIA character devices
+ #
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
+ 
+ #
+@@ -517,26 +620,110 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+ # CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
+-# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
+ 
+ #
+ # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+@@ -545,34 +732,108 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=m
+ 
+ #
+-# LED devices
++# LED Triggers
+ #
+-# CONFIG_NEW_LEDS is not set
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++# CONFIG_RTC_HCTOSYS is not set
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# LED Triggers
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# InfiniBand support
++# SPI RTC drivers
+ #
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# Platform RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# Real Time Clock
++# on-CPU RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+ # DMA Engine support
+@@ -588,13 +849,21 @@ CONFIG_UNIX98_PTYS=y
+ #
+ 
+ #
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
+ # File systems
+ #
+-CONFIG_EXT2_FS=m
++CONFIG_EXT2_FS=y
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +878,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -638,7 +907,7 @@ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+ CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++CONFIG_CONFIGFS_FS=y
+ 
+ #
+ # Miscellaneous filesystems
+@@ -683,12 +952,17 @@ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+ # CONFIG_RPCSEC_GSS_KRB5 is not set
+ # CONFIG_RPCSEC_GSS_SPKM3 is not set
+-# CONFIG_SMB_FS is not set
+-# CONFIG_CIFS is not set
++CONFIG_SMB_FS=m
++# CONFIG_SMB_NLS_DEFAULT is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++# CONFIG_CIFS_XATTR is not set
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+@@ -758,6 +1032,7 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+@@ -782,10 +1057,6 @@ CONFIG_FORCED_INLINING=y
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+ # CONFIG_CRYPTO is not set
+ 
+ #
+@@ -796,6 +1067,7 @@ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+ # CONFIG_CRC_ITU_T is not set
+ CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig
+new file mode 100644
+index 0000000..0dc834f
+--- /dev/null
++++ b/arch/avr32/configs/atstk1003_defconfig
+@@ -0,0 +1,1045 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 10:58:37 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++# CONFIG_IOSCHED_CFQ is not set
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++# CONFIG_DEFAULT_CFQ is not set
++CONFIG_DEFAULT_NOOP=y
++CONFIG_DEFAULT_IOSCHED="noop"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++CONFIG_CPU_AT32AP7001=y
++# CONFIG_CPU_AT32AP7002 is not set
++CONFIG_BOARD_ATSTK1003=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCCARD=m
++# CONFIG_PCMCIA_DEBUG is not set
++CONFIG_PCMCIA=m
++CONFIG_PCMCIA_LOAD_CIS=y
++# CONFIG_PCMCIA_IOCTL is not set
++
++#
++# PC-card bridges
++#
++CONFIG_AT32_CF=m
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++CONFIG_FW_LOADER=m
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++# CONFIG_BLK_DEV_SD is not set
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_NET_PCMCIA is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++
++#
++# PCMCIA character devices
++#
++# CONFIG_SYNCLINK_CS is not set
++# CONFIG_CARDMAN_4000 is not set
++# CONFIG_CARDMAN_4040 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_ATMELTWI=m
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++CONFIG_SND_AC97_CODEC=m
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# AVR32 devices
++#
++CONFIG_SND_ATMEL_AC97=m
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# PCMCIA devices
++#
++# CONFIG_SND_VXPOCKET is not set
++# CONFIG_SND_PDAUDIOCF is not set
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++CONFIG_SOUND_PRIME=m
++# CONFIG_SOUND_MSNDCLAS is not set
++# CONFIG_SOUND_MSNDPIN is not set
++CONFIG_SOUND_AT32_ABDAC=m
++CONFIG_AC97_BUS=m
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++# CONFIG_USB is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=y
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++# CONFIG_NFS_FS is not set
++# CONFIG_NFSD is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++# CONFIG_KPROBES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig
+new file mode 100644
+index 0000000..b002a46
+--- /dev/null
++++ b/arch/avr32/configs/atstk1004_defconfig
+@@ -0,0 +1,722 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc1
++# Thu Nov  1 11:07:19 2007
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++# CONFIG_CPU_AT32AP7000 is not set
++# CONFIG_CPU_AT32AP7001 is not set
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1004=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set
++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++# CONFIG_GPIO_DEV is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++CONFIG_DW_DMAC=y
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_BLK_DEV is not set
++# CONFIG_MISC_DEVICES is not set
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++# CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_WATCHDOG is not set
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_ATMELMCI=y
++# CONFIG_MMC_SPI is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++# CONFIG_EXT3_FS is not set
++# CONFIG_EXT4DEV_FS is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++# CONFIG_MSDOS_FS is not set
++# CONFIG_VFAT_FS is not set
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile
+new file mode 100644
+index 0000000..b429b75
+--- /dev/null
++++ b/arch/avr32/drivers/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c
+new file mode 100644
+index 0000000..224eb30
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.c
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h
+new file mode 100644
+index 0000000..1f67921
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.h
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
+index 90e5aff..1aedaeb 100644
+--- a/arch/avr32/kernel/Makefile
++++ b/arch/avr32/kernel/Makefile
+@@ -9,10 +9,6 @@ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+ obj-y				+= setup.o traps.o semaphore.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+-
+-USE_STANDARD_AS_RULE		:= true
+-
+-%.lds: %.lds.c FORCE
+-	$(call if_changed_dep,cpp_lds_S)
+diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c
+new file mode 100644
+index 0000000..fb654b3
+--- /dev/null
++++ b/arch/avr32/kernel/dma-controller.c
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
+index 42657f1..ccadfd9 100644
+--- a/arch/avr32/kernel/entry-avr32b.S
++++ b/arch/avr32/kernel/entry-avr32b.S
+@@ -159,11 +159,18 @@ handle_vmalloc_miss:
+ 
+ 	.section .scall.text,"ax",@progbits
+ system_call:
++#ifdef CONFIG_PREEMPT
++	mask_interrupts
++#endif
+ 	pushm	r12		/* r12_orig */
+ 	stmts	--sp, r0-lr
+-	zero_fp
++
+ 	mfsr	r0, SYSREG_RAR_SUP
+ 	mfsr	r1, SYSREG_RSR_SUP
++#ifdef CONFIG_PREEMPT
++	unmask_interrupts
++#endif
++	zero_fp
+ 	stm	--sp, r0-r1
+ 
+ 	/* check for syscall tracing */
+@@ -638,6 +645,13 @@ irq_level\level:
+ 	stmts	--sp,r0-lr
+ 	mfsr	r8, rar_int\level
+ 	mfsr	r9, rsr_int\level
++
++#ifdef CONFIG_PREEMPT
++	sub	r11, pc, (. - system_call)
++	cp.w	r11, r8
++	breq	4f
++#endif
++
+ 	pushm	r8-r9
+ 
+ 	mov	r11, sp
+@@ -668,6 +682,16 @@ irq_level\level:
+ 	sub	sp, -4		/* ignore r12_orig */
+ 	rete
+ 
++#ifdef CONFIG_PREEMPT
++4:	mask_interrupts
++	mfsr	r8, rsr_int\level
++	sbr	r8, 16
++	mtsr	rsr_int\level, r8
++	ldmts	sp++, r0-lr
++	sub	sp, -4		/* ignore r12_orig */
++	rete
++#endif
++
+ 2:	get_thread_info	r0
+ 	ld.w	r1, r0[TI_flags]
+ 	bld	r1, TIF_CPU_GOING_TO_SLEEP
+diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
+index d08b0bc..4b4c188 100644
+--- a/arch/avr32/kernel/setup.c
++++ b/arch/avr32/kernel/setup.c
+@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
+ 
+ 	fbmem_size = memparse(p, &p);
+ 	if (*p == '@') {
+-		fbmem_start = memparse(p, &p);
++		fbmem_start = memparse(p + 1, &p);
+ 		ret = add_reserved_region(fbmem_start,
+ 					  fbmem_start + fbmem_size - 1,
+ 					  "Framebuffer");
+diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S
+new file mode 100644
+index 0000000..ce9ac96
+--- /dev/null
++++ b/arch/avr32/kernel/vmlinux.lds.S
+@@ -0,0 +1,143 @@
++/*
++ * AVR32 linker script for the Linux kernel
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#define LOAD_OFFSET 0x00000000
++#include <asm-generic/vmlinux.lds.h>
++#include <asm/cache.h>
++#include <asm/thread_info.h>
++
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++/* Big endian */
++jiffies = jiffies_64 + 4;
++
++SECTIONS
++{
++	. = CONFIG_ENTRY_ADDRESS;
++	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
++		_stext = .;
++		__init_begin = .;
++			_sinittext = .;
++			*(.text.reset)
++			*(.init.text)
++			/*
++			 * .exit.text is discarded at runtime, not
++			 * link time, to deal with references from
++			 * __bug_table
++			 */
++			*(.exit.text)
++			_einittext = .;
++		. = ALIGN(4);
++		__tagtable_begin = .;
++			*(.taglist.init)
++		__tagtable_end = .;
++			*(.init.data)
++		. = ALIGN(16);
++		__setup_start = .;
++			*(.init.setup)
++		__setup_end = .;
++		. = ALIGN(4);
++		__initcall_start = .;
++			INITCALLS
++		__initcall_end = .;
++		__con_initcall_start = .;
++			*(.con_initcall.init)
++		__con_initcall_end = .;
++		__security_initcall_start = .;
++			*(.security_initcall.init)
++		__security_initcall_end = .;
++#ifdef CONFIG_BLK_DEV_INITRD
++		. = ALIGN(32);
++		__initramfs_start = .;
++			*(.init.ramfs)
++		__initramfs_end = .;
++#endif
++		. = ALIGN(PAGE_SIZE);
++		__init_end = .;
++	}
++
++	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
++		_evba = .;
++		_text = .;
++		*(.ex.text)
++		. = 0x50;
++		*(.tlbx.ex.text)
++		. = 0x60;
++		*(.tlbr.ex.text)
++		. = 0x70;
++		*(.tlbw.ex.text)
++		. = 0x100;
++		*(.scall.text)
++		*(.irq.text)
++		TEXT_TEXT
++		SCHED_TEXT
++		LOCK_TEXT
++		KPROBES_TEXT
++		*(.fixup)
++		*(.gnu.warning)
++		_etext = .;
++	} = 0xd703d703
++
++	. = ALIGN(4);
++	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
++		__start___ex_table = .;
++		*(__ex_table)
++		__stop___ex_table = .;
++	}
++
++	BUG_TABLE
++
++	RODATA
++
++	. = ALIGN(THREAD_SIZE);
++
++	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
++		_data = .;
++		_sdata = .;
++		/*
++		 * First, the init task union, aligned to an 8K boundary.
++		 */
++		*(.data.init_task)
++
++		/* Then, the cacheline aligned data */
++		. = ALIGN(L1_CACHE_BYTES);
++		*(.data.cacheline_aligned)
++
++		/* And the rest... */
++		*(.data.rel*)
++		DATA_DATA
++		CONSTRUCTORS
++
++		_edata = .;
++	}
++
++
++	. = ALIGN(8);
++	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
++		__bss_start = .;
++		*(.bss)
++		*(COMMON)
++		. = ALIGN(8);
++		__bss_stop = .;
++		_end = .;
++	}
++
++	/* When something in the kernel is NOT compiled as a module, the module
++	 * cleanup code and data are put into these segments. Both can then be
++	 * thrown away, as cleanup code is never called unless it's a module.
++	 */
++	/DISCARD/       	: {
++		*(.exit.data)
++		*(.exitcall.exit)
++	}
++
++	DWARF_DEBUG
++}
+diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
+deleted file mode 100644
+index db0438f..0000000
+--- a/arch/avr32/kernel/vmlinux.lds.c
++++ /dev/null
+@@ -1,142 +0,0 @@
+-/*
+- * AVR32 linker script for the Linux kernel
+- *
+- * Copyright (C) 2004-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#define LOAD_OFFSET 0x00000000
+-#include <asm-generic/vmlinux.lds.h>
+-
+-OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+-OUTPUT_ARCH(avr32)
+-ENTRY(_start)
+-
+-/* Big endian */
+-jiffies = jiffies_64 + 4;
+-
+-SECTIONS
+-{
+-	. = CONFIG_ENTRY_ADDRESS;
+-	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
+-		_stext = .;
+-		__init_begin = .;
+-			_sinittext = .;
+-			*(.text.reset)
+-			*(.init.text)
+-			/*
+-			 * .exit.text is discarded at runtime, not
+-			 * link time, to deal with references from
+-			 * __bug_table
+-			 */
+-			*(.exit.text)
+-			_einittext = .;
+-		. = ALIGN(4);
+-		__tagtable_begin = .;
+-			*(.taglist.init)
+-		__tagtable_end = .;
+-			*(.init.data)
+-		. = ALIGN(16);
+-		__setup_start = .;
+-			*(.init.setup)
+-		__setup_end = .;
+-		. = ALIGN(4);
+-		__initcall_start = .;
+-			INITCALLS
+-		__initcall_end = .;
+-		__con_initcall_start = .;
+-			*(.con_initcall.init)
+-		__con_initcall_end = .;
+-		__security_initcall_start = .;
+-			*(.security_initcall.init)
+-		__security_initcall_end = .;
+-#ifdef CONFIG_BLK_DEV_INITRD
+-		. = ALIGN(32);
+-		__initramfs_start = .;
+-			*(.init.ramfs)
+-		__initramfs_end = .;
+-#endif
+-		. = ALIGN(4096);
+-		__init_end = .;
+-	}
+-
+-	. = ALIGN(8192);
+-	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
+-		_evba = .;
+-		_text = .;
+-		*(.ex.text)
+-		. = 0x50;
+-		*(.tlbx.ex.text)
+-		. = 0x60;
+-		*(.tlbr.ex.text)
+-		. = 0x70;
+-		*(.tlbw.ex.text)
+-		. = 0x100;
+-		*(.scall.text)
+-		*(.irq.text)
+-		TEXT_TEXT
+-		SCHED_TEXT
+-		LOCK_TEXT
+-		KPROBES_TEXT
+-		*(.fixup)
+-		*(.gnu.warning)
+-		_etext = .;
+-	} = 0xd703d703
+-
+-	. = ALIGN(4);
+-	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
+-		__start___ex_table = .;
+-		*(__ex_table)
+-		__stop___ex_table = .;
+-	}
+-
+-	BUG_TABLE
+-
+-	RODATA
+-
+-	. = ALIGN(8192);
+-
+-	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
+-		_data = .;
+-		_sdata = .;
+-		/*
+-		 * First, the init task union, aligned to an 8K boundary.
+-		 */
+-		*(.data.init_task)
+-
+-		/* Then, the cacheline aligned data */
+-		. = ALIGN(32);
+-		*(.data.cacheline_aligned)
+-
+-		/* And the rest... */
+-		*(.data.rel*)
+-		DATA_DATA
+-		CONSTRUCTORS
+-
+-		_edata = .;
+-	}
+-
+-
+-	. = ALIGN(8);
+-	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
+-		__bss_start = .;
+-		*(.bss)
+-		*(COMMON)
+-		. = ALIGN(8);
+-		__bss_stop = .;
+-		_end = .;
+-	}
+-
+-	/* When something in the kernel is NOT compiled as a module, the module
+-	 * cleanup code and data are put into these segments. Both can then be
+-	 * thrown away, as cleanup code is never called unless it's a module.
+-	 */
+-	/DISCARD/       	: {
+-		*(.exit.data)
+-		*(.exitcall.exit)
+-	}
+-
+-	DWARF_DEBUG
+-}
+diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
+index eb30783..0eb590a 100644
+--- a/arch/avr32/mach-at32ap/Kconfig
++++ b/arch/avr32/mach-at32ap/Kconfig
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
+index a8b4450..0f6162e 100644
+--- a/arch/avr32/mach-at32ap/Makefile
++++ b/arch/avr32/mach-at32ap/Makefile
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
+deleted file mode 100644
+index 64cc558..0000000
+--- a/arch/avr32/mach-at32ap/at32ap7000.c
++++ /dev/null
+@@ -1,1324 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-/*
+- * We can reduce the code size a bit by using a constant here. Since
+- * this file is completely chip-specific, it's safe to not use
+- * ioremap. Generic drivers should of course never do this.
+- */
+-#define AT32_PM_BASE	0xfff00000
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000bf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+new file mode 100644
+index 0000000..7fd93a5
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -0,0 +1,1754 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 4);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
+index 0f8c89c..4642117 100644
+--- a/arch/avr32/mach-at32ap/clock.c
++++ b/arch/avr32/mach-at32ap/clock.c
+@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
+ 	return clk->parent;
+ }
+ EXPORT_SYMBOL(clk_get_parent);
++
++
++
++#ifdef CONFIG_DEBUG_FS
++
++/* /sys/kernel/debug/at32ap_clk */
++
++#include <linux/io.h>
++#include <linux/debugfs.h>
++#include <linux/seq_file.h>
++#include "pm.h"
++
++
++#define	NEST_DELTA	2
++#define	NEST_MAX	6
++
++struct clkinf {
++	struct seq_file	*s;
++	unsigned	nest;
++};
++
++static void
++dump_clock(struct clk *parent, struct clkinf *r)
++{
++	unsigned	nest = r->nest;
++	char		buf[16 + NEST_MAX];
++	struct clk	*clk;
++	unsigned	i;
++
++	/* skip clocks coupled to devices that aren't registered */
++	if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
++		return;
++
++	/* <nest spaces> name <pad to end> */
++	memset(buf, ' ', sizeof(buf) - 1);
++	buf[sizeof(buf) - 1] = 0;
++	i = strlen(parent->name);
++	memcpy(buf + nest, parent->name,
++			min(i, (unsigned)(sizeof(buf) - 1 - nest)));
++
++	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
++		buf, parent->set_parent ? '*' : ' ',
++		parent->users,
++		parent->users ? "on" : "off",	/* NOTE: not-paranoid!! */
++		clk_get_rate(parent));
++	if (parent->dev)
++		seq_printf(r->s, ", for %s", parent->dev->bus_id);
++	seq_printf(r->s, "\n");
++
++	/* cost of this scan is small, but not linear... */
++	r->nest = nest + NEST_DELTA;
++	for (i = 3; i < at32_nr_clocks; i++) {
++		clk = at32_clock_list[i];
++		if (clk->parent == parent)
++			dump_clock(clk, r);
++	}
++	r->nest = nest;
++}
++
++static int clk_show(struct seq_file *s, void *unused)
++{
++	struct clkinf	r;
++	int		i;
++
++	/* show all the power manager registers */
++	seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
++	seq_printf(s, "CKSEL   = %8x\n", pm_readl(CKSEL));
++	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
++	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
++	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
++	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
++	seq_printf(s, "PLL0    = %8x\n", pm_readl(PLL0));
++	seq_printf(s, "PLL1    = %8x\n", pm_readl(PLL1));
++	seq_printf(s, "IMR     = %8x\n", pm_readl(IMR));
++	for (i = 0; i < 8; i++) {
++		if (i == 5)
++			continue;
++		seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
++	}
++
++	seq_printf(s, "\n");
++
++	/* show clock tree as derived from the three oscillators
++	 * we "know" are at the head of the list
++	 */
++	r.s = s;
++	r.nest = 0;
++	dump_clock(at32_clock_list[0], &r);
++	dump_clock(at32_clock_list[1], &r);
++	dump_clock(at32_clock_list[2], &r);
++
++	return 0;
++}
++
++static int clk_open(struct inode *inode, struct file *file)
++{
++	return single_open(file, clk_show, NULL);
++}
++
++static const struct file_operations clk_operations = {
++	.open		= clk_open,
++	.read		= seq_read,
++	.llseek		= seq_lseek,
++	.release	= single_release,
++};
++
++static int __init clk_debugfs_init(void)
++{
++	(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
++			NULL, NULL, &clk_operations);
++
++	return 0;
++}
++postcore_initcall(clk_debugfs_init);
++
++#endif
+diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c
+new file mode 100644
+index 0000000..8cf6d11
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/gpio-dev.c
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
+index 5e22a75..704607f 100644
+--- a/arch/avr32/mach-at32ap/hsmc.c
++++ b/arch/avr32/mach-at32ap/hsmc.c
+@@ -29,16 +29,25 @@ struct hsmc {
+ 
+ static struct hsmc *hsmc;
+ 
+-int smc_set_configuration(int cs, const struct smc_config *config)
++void smc_set_timing(struct smc_config *config,
++		    const struct smc_timing *timing)
+ {
++	int recover;
++	int cycle;
++
+ 	unsigned long mul;
+-	unsigned long offset;
+-	u32 setup, pulse, cycle, mode;
+ 
+-	if (!hsmc)
+-		return -ENODEV;
+-	if (cs >= NR_CHIP_SELECTS)
+-		return -EINVAL;
++	/* Reset all SMC timings */
++	config->ncs_read_setup	= 0;
++	config->nrd_setup	= 0;
++	config->ncs_write_setup	= 0;
++	config->nwe_setup	= 0;
++	config->ncs_read_pulse	= 0;
++	config->nrd_pulse	= 0;
++	config->ncs_write_pulse	= 0;
++	config->nwe_pulse	= 0;
++	config->read_cycle	= 0;
++	config->write_cycle	= 0;
+ 
+ 	/*
+ 	 * cycles = x / T = x * f
+@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
+ 
+ #define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
+ 
+-	setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup))
+-		 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup))
+-		 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup))
+-		 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup)));
+-	pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse))
+-		 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse))
+-		 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse))
+-		 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse)));
+-	cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle))
+-		 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle)));
++	if (timing->ncs_read_setup > 0)
++		config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
++
++	if (timing->nrd_setup > 0)
++		config->nrd_setup = ns2cyc(timing->nrd_setup);
++
++	if (timing->ncs_write_setup > 0)
++		config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
++
++	if (timing->nwe_setup > 0)
++		config->nwe_setup = ns2cyc(timing->nwe_setup);
++
++	if (timing->ncs_read_pulse > 0)
++		config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
++
++	if (timing->nrd_pulse > 0)
++		config->nrd_pulse = ns2cyc(timing->nrd_pulse);
++
++	if (timing->ncs_write_pulse > 0)
++		config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
++
++	if (timing->nwe_pulse > 0)
++		config->nwe_pulse = ns2cyc(timing->nwe_pulse);
++
++	if (timing->read_cycle > 0)
++		config->read_cycle = ns2cyc(timing->read_cycle);
++
++	if (timing->write_cycle > 0)
++		config->write_cycle = ns2cyc(timing->write_cycle);
++
++	/* Extend read cycle in needed */
++	if (timing->ncs_read_recover > 0)
++		recover = ns2cyc(timing->ncs_read_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend read cycle in needed */
++	if (timing->nrd_recover > 0)
++		recover = ns2cyc(timing->nrd_recover);
++	else
++		recover = 1;
++
++	cycle = config->nrd_setup + config->nrd_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->ncs_write_recover > 0)
++		recover = ns2cyc(timing->ncs_write_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->nwe_recover > 0)
++		recover = ns2cyc(timing->nwe_recover);
++	else
++		recover = 1;
++
++	cycle = config->nwe_setup + config->nwe_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++}
++EXPORT_SYMBOL(smc_set_timing);
++
++int smc_set_configuration(int cs, const struct smc_config *config)
++{
++	unsigned long offset;
++	u32 setup, pulse, cycle, mode;
++
++	if (!hsmc)
++		return -ENODEV;
++	if (cs >= NR_CHIP_SELECTS)
++		return -EINVAL;
++
++	setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
++		 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
++		 | HSMC_BF(NRD_SETUP, config->nrd_setup)
++		 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
++	pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
++		 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
++		 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
++		 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
++	cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
++		 | HSMC_BF(NRD_CYCLE, config->read_cycle));
+ 
+ 	switch (config->bus_width) {
+ 	case 1:
+diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
+index 1eb99b8..c978c36 100644
+--- a/arch/avr32/mach-at32ap/pio.c
++++ b/arch/avr32/mach-at32ap/pio.c
+@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
+ 			pio_writel(pio, SODR, mask);
+ 		else
+ 			pio_writel(pio, CODR, mask);
++		if (flags & AT32_GPIOF_MULTIDRV)
++			pio_writel(pio, MDER, mask);
++		else
++			pio_writel(pio, MDDR, mask);
+ 		pio_writel(pio, PUDR, mask);
+ 		pio_writel(pio, OER, mask);
+ 	} else {
+@@ -158,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
+index a1f8ace..47efd0d 100644
+--- a/arch/avr32/mach-at32ap/pm.h
++++ b/arch/avr32/mach-at32ap/pm.h
+@@ -4,6 +4,14 @@
+ #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
+ #define __ARCH_AVR32_MACH_AT32AP_PM_H__
+ 
++/*
++ * We can reduce the code size a bit by using a constant here. Since
++ * this file is only used on AVR32 AP CPUs with segmentation enabled,
++ * it's safe to not use ioremap. Generic drivers should of course
++ * never do this.
++ */
++#define AT32_PM_BASE	0xfff00000
++
+ /* PM register offsets */
+ #define PM_MCCTRL				0x0000
+ #define PM_CKSEL				0x0004
+diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
+index 099212d..26f29c6 100644
+--- a/arch/avr32/mm/dma-coherent.c
++++ b/arch/avr32/mm/dma-coherent.c
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size,
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
+index 82cf708..480760b 100644
+--- a/arch/avr32/mm/init.c
++++ b/arch/avr32/mm/init.c
+@@ -224,19 +224,9 @@ void free_initmem(void)
+ 
+ #ifdef CONFIG_BLK_DEV_INITRD
+ 
+-static int keep_initrd;
+-
+ void free_initrd_mem(unsigned long start, unsigned long end)
+ {
+-	if (!keep_initrd)
+-		free_area(start, end, "initrd");
+-}
+-
+-static int __init keepinitrd_setup(char *__unused)
+-{
+-	keep_initrd = 1;
+-	return 1;
++	free_area(start, end, "initrd");
+ }
+ 
+-__setup("keepinitrd", keepinitrd_setup);
+ #endif
+diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig
+index 37bddc1..8c30dec 100644
+--- a/drivers/char/watchdog/Kconfig
++++ b/drivers/char/watchdog/Kconfig
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c
+index 54a5161..fb5ed64 100644
+--- a/drivers/char/watchdog/at32ap700x_wdt.c
++++ b/drivers/char/watchdog/at32ap700x_wdt.c
+@@ -6,6 +6,19 @@
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
++ *
++ *
++ * Errata: WDT Clear is blocked after WDT Reset
++ *
++ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR
++ * register, preventing the program to clear the next Watchdog Timer Reset.
++ *
++ * If you still want to use the WDT after a WDT reset a small code can be
++ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset
++ * and use a GPIO pin to reset the system. This method requires that one of the
++ * GPIO pins are available and connected externally to the RESET_N pin. After
++ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave
++ * the pin tristated with pullup.
+  */
+ 
+ #include <linux/init.h>
+@@ -44,6 +57,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
+ 
+ #define WDT_CLR			0x04
+ 
++#define WDT_RCAUSE		0x10
++#define WDT_RCAUSE_POR		   0
++#define WDT_RCAUSE_EXT		   2
++#define WDT_RCAUSE_WDT		   3
++#define WDT_RCAUSE_JTAG		   4
++#define WDT_RCAUSE_SERP		   5
++
+ #define WDT_BIT(name)		(1 << WDT_##name)
+ #define WDT_BF(name, value)	((value) << WDT_##name)
+ 
+@@ -56,6 +76,7 @@ struct wdt_at32ap700x {
+ 	void __iomem		*regs;
+ 	spinlock_t		io_lock;
+ 	int			timeout;
++	int			boot_status;
+ 	unsigned long		users;
+ 	struct miscdevice	miscdev;
+ };
+@@ -126,7 +147,7 @@ static int at32_wdt_close(struct inode *inode, struct file *file)
+ 		at32_wdt_stop();
+ 	} else {
+ 		dev_dbg(wdt->miscdev.parent,
+-			"Unexpected close, not stopping watchdog!\n");
++			"unexpected close, not stopping watchdog!\n");
+ 		at32_wdt_pat();
+ 	}
+ 	clear_bit(1, &wdt->users);
+@@ -154,6 +175,33 @@ static int at32_wdt_settimeout(int time)
+ 	return 0;
+ }
+ 
++/*
++ * Get the watchdog status.
++ */
++static int at32_wdt_get_status(void)
++{
++	int rcause;
++	int status = 0;
++
++	rcause = wdt_readl(wdt, RCAUSE);
++
++	switch (rcause) {
++	case WDT_BIT(RCAUSE_EXT):
++		status = WDIOF_EXTERN1;
++		break;
++	case WDT_BIT(RCAUSE_WDT):
++		status = WDIOF_CARDRESET;
++		break;
++	case WDT_BIT(RCAUSE_POR):  /* fall through */
++	case WDT_BIT(RCAUSE_JTAG): /* fall through */
++	case WDT_BIT(RCAUSE_SERP): /* fall through */
++	default:
++		break;
++	}
++
++	return status;
++}
++
+ static struct watchdog_info at32_wdt_info = {
+ 	.identity	= "at32ap700x watchdog",
+ 	.options	= WDIOF_SETTIMEOUT |
+@@ -194,10 +242,12 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file,
+ 	case WDIOC_GETTIMEOUT:
+ 		ret = put_user(wdt->timeout, p);
+ 		break;
+-	case WDIOC_GETSTATUS: /* fall through */
+-	case WDIOC_GETBOOTSTATUS:
++	case WDIOC_GETSTATUS:
+ 		ret = put_user(0, p);
+ 		break;
++	case WDIOC_GETBOOTSTATUS:
++		ret = put_user(wdt->boot_status, p);
++		break;
+ 	case WDIOC_SETOPTIONS:
+ 		ret = get_user(time, p);
+ 		if (ret)
+@@ -282,8 +332,19 @@ static int __init at32_wdt_probe(struct platform_device *pdev)
+ 		dev_dbg(&pdev->dev, "could not map I/O memory\n");
+ 		goto err_free;
+ 	}
++
+ 	spin_lock_init(&wdt->io_lock);
+-	wdt->users = 0;
++	wdt->boot_status = at32_wdt_get_status();
++
++	/* Work-around for watchdog silicon errata. */
++	if (wdt->boot_status & WDIOF_CARDRESET) {
++		dev_info(&pdev->dev, "CPU must be reset with external "
++				"reset or POR due to silicon errata.\n");
++		ret = -EIO;
++		goto err_iounmap;
++	} else {
++		wdt->users = 0;
++	}
+ 	wdt->miscdev.minor = WATCHDOG_MINOR;
+ 	wdt->miscdev.name = "watchdog";
+ 	wdt->miscdev.fops = &at32_wdt_fops;
+diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
+index 9f3a4cd..6f5bcd6 100644
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -80,6 +80,14 @@ config I2C_AT91
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
+index 5b752e4..e4644a8 100644
+--- a/drivers/i2c/busses/Makefile
++++ b/drivers/i2c/busses/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c
+new file mode 100644
+index 0000000..3f78b31
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.c
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h
+new file mode 100644
+index 0000000..1aca065
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.h
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 73e248f..9e848cc 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY
+ 
+ 	  If you are not sure, say Y here.
+ 
++config ATMEL_SSC
++	tristate "Device driver for Atmel SSC peripheral"
++	depends on AVR32 || ARCH_AT91
++	---help---
++	  This option enables device driver support for Atmel Syncronized
++	  Serial Communication peripheral (SSC).
++
++	  The SSC peripheral supports a wide variety of serial frame based
++	  communications, i.e. I2S, SPI, etc.
+ 
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index b5ce0e3..40d8ed1 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
+ obj-$(CONFIG_SONY_LAPTOP)	+= sony-laptop.o
+ obj-$(CONFIG_THINKPAD_ACPI)	+= thinkpad_acpi.o
+ obj-$(CONFIG_EEPROM_93CX6)	+= eeprom_93cx6.o
++obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
+new file mode 100644
+index 0000000..058ccac
+--- /dev/null
++++ b/drivers/misc/atmel-ssc.c
+@@ -0,0 +1,174 @@
++/*
++ * Atmel SSC driver
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/list.h>
++#include <linux/spinlock.h>
++#include <linux/atmel-ssc.h>
++
++/* Serialize access to ssc_list and user count */
++static DEFINE_SPINLOCK(user_lock);
++static LIST_HEAD(ssc_list);
++
++struct ssc_device *ssc_request(unsigned int ssc_num)
++{
++	int ssc_valid = 0;
++	struct ssc_device *ssc;
++
++	spin_lock(&user_lock);
++	list_for_each_entry(ssc, &ssc_list, list) {
++		if (ssc->pdev->id == ssc_num) {
++			ssc_valid = 1;
++			break;
++		}
++	}
++
++	if (!ssc_valid) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "could not find requested device\n");
++		return ERR_PTR(-ENODEV);
++	}
++
++	if (ssc->user) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "module busy\n");
++		return ERR_PTR(-EBUSY);
++	}
++	ssc->user++;
++	spin_unlock(&user_lock);
++
++	clk_enable(ssc->clk);
++
++	return ssc;
++}
++EXPORT_SYMBOL(ssc_request);
++
++void ssc_free(struct ssc_device *ssc)
++{
++	spin_lock(&user_lock);
++	if (ssc->user) {
++		ssc->user--;
++		clk_disable(ssc->clk);
++	} else {
++		dev_dbg(&ssc->pdev->dev, "device already free\n");
++	}
++	spin_unlock(&user_lock);
++}
++EXPORT_SYMBOL(ssc_free);
++
++static int __init ssc_probe(struct platform_device *pdev)
++{
++	int retval = 0;
++	struct resource *regs;
++	struct ssc_device *ssc;
++
++	ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL);
++	if (!ssc) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		retval = -ENOMEM;
++		goto out;
++	}
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resource defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->clk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(ssc->clk)) {
++		dev_dbg(&pdev->dev, "no pclk clock defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
++
++	ssc->pdev = pdev;
++	ssc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!ssc->regs) {
++		dev_dbg(&pdev->dev, "ioremap failed\n");
++		retval = -EINVAL;
++		goto out_clk;
++	}
++
++	/* disable all interrupts */
++	clk_enable(ssc->clk);
++	ssc_writel(ssc->regs, IDR, ~0UL);
++	ssc_readl(ssc->regs, SR);
++	clk_disable(ssc->clk);
++
++	ssc->irq = platform_get_irq(pdev, 0);
++	if (!ssc->irq) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		retval = -ENXIO;
++		goto out_unmap;
++	}
++
++	spin_lock(&user_lock);
++	list_add_tail(&ssc->list, &ssc_list);
++	spin_unlock(&user_lock);
++
++	platform_set_drvdata(pdev, ssc);
++
++	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
++			ssc->regs, ssc->irq);
++
++	goto out;
++
++out_unmap:
++	iounmap(ssc->regs);
++out_clk:
++	clk_put(ssc->clk);
++out_free:
++	kfree(ssc);
++out:
++	return retval;
++}
++
++static int __devexit ssc_remove(struct platform_device *pdev)
++{
++	struct ssc_device *ssc = platform_get_drvdata(pdev);
++
++	spin_lock(&user_lock);
++	iounmap(ssc->regs);
++	clk_put(ssc->clk);
++	list_del(&ssc->list);
++	kfree(ssc);
++	spin_unlock(&user_lock);
++
++	return 0;
++}
++
++static struct platform_driver ssc_driver = {
++	.remove		= __devexit_p(ssc_remove),
++	.driver		= {
++		.name		= "ssc",
++	},
++};
++
++static int __init ssc_init(void)
++{
++	return platform_driver_probe(&ssc_driver, ssc_probe);
++}
++module_init(ssc_init);
++
++static void __exit ssc_exit(void)
++{
++	platform_driver_unregister(&ssc_driver);
++}
++module_exit(ssc_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index e23082f..1de1716 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -74,6 +74,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
+index 6685f64..4b8e6e2 100644
+--- a/drivers/mmc/host/Makefile
++++ b/drivers/mmc/host/Makefile
+@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ 
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+new file mode 100644
+index 0000000..6792ad9
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = MMC_ERR_NONE;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = MMC_ERR_TIMEOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = MMC_ERR_BADCRC;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = MMC_ERR_FAILED;
++
++	if (cmd->error != MMC_ERR_NONE) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = MMC_ERR_INVALID;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = MMC_ERR_BADCRC;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = MMC_ERR_TIMEOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = MMC_ERR_FIFO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = MMC_ERR_TIMEOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = MMC_ERR_TIMEOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = MMC_ERR_TIMEOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h
+new file mode 100644
+index 0000000..60d15c4
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.h
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
+index 2f19fa7..94304ca 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0001.c
++++ b/drivers/mtd/chips/cfi_cmdset_0001.c
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
+index 1f64458..205977b 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = {
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
+index c0c77f8..7623315 100644
+--- a/drivers/pcmcia/Kconfig
++++ b/drivers/pcmcia/Kconfig
+@@ -271,6 +271,13 @@ config AT91_CF
+ 	  Say Y here to support the CompactFlash controller on AT91 chips.
+ 	  Or choose M to compile the driver as a module named "at91_cf".
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
+index 4276965..08d7ffa 100644
+--- a/drivers/pcmcia/Makefile
++++ b/drivers/pcmcia/Makefile
+@@ -37,6 +37,7 @@ obj-$(CONFIG_PCMCIA_VRC4171)			+= vrc4171_card.o
+ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc4173_cardu.o
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c
+new file mode 100644
+index 0000000..ebe1495
+--- /dev/null
++++ b/drivers/pcmcia/at32_cf.c
+@@ -0,0 +1,531 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin)
++		cf->vcc_pin = request_pin(pdev, board->reset_pin,
++					  "cf_vcc");
++	if (board->ready_pin)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c
+index d154dee..06a85d7 100644
+--- a/drivers/pcmcia/cistpl.c
++++ b/drivers/pcmcia/cistpl.c
+@@ -25,6 +25,7 @@
+ #include <linux/ioport.h>
+ #include <asm/io.h>
+ #include <asm/byteorder.h>
++#include <asm/unaligned.h>
+ 
+ #include <pcmcia/cs_types.h>
+ #include <pcmcia/ss.h>
+@@ -401,6 +402,15 @@ EXPORT_SYMBOL(pcmcia_replace_cis);
+     
+ ======================================================================*/
+ 
++static inline u16 cis_get_u16(void *ptr)
++{
++	return le16_to_cpu(get_unaligned((__le16 *) ptr));
++}
++static inline u32 cis_get_u32(void *ptr)
++{
++	return le32_to_cpu(get_unaligned((__le32 *) ptr));
++}
++
+ typedef struct tuple_flags {
+     u_int		link_space:4;
+     u_int		has_link:1;
+@@ -461,7 +471,7 @@ static int follow_link(struct pcmcia_socket *s, tuple_t *tuple)
+ 	/* Get indirect link from the MFC tuple */
+ 	read_cis_cache(s, LINK_SPACE(tuple->Flags),
+ 		       tuple->LinkOffset, 5, link);
+-	ofs = le32_to_cpu(*(__le32 *)(link+1));
++	ofs = cis_get_u32(link + 1);
+ 	SPACE(tuple->Flags) = (link[0] == CISTPL_MFC_ATTR);
+ 	/* Move to the next indirect link */
+ 	tuple->LinkOffset += 5;
+@@ -668,10 +678,10 @@ static int parse_checksum(tuple_t *tuple, cistpl_checksum_t *csum)
+     u_char *p;
+     if (tuple->TupleDataLen < 5)
+ 	return CS_BAD_TUPLE;
+-    p = (u_char *)tuple->TupleData;
+-    csum->addr = tuple->CISOffset+(short)le16_to_cpu(*(__le16 *)p)-2;
+-    csum->len = le16_to_cpu(*(__le16 *)(p + 2));
+-    csum->sum = *(p+4);
++    p = (u_char *) tuple->TupleData;
++    csum->addr = tuple->CISOffset + cis_get_u16(p) - 2;
++    csum->len = cis_get_u16(p + 2);
++    csum->sum = *(p + 4);
+     return CS_SUCCESS;
+ }
+ 
+@@ -681,7 +691,7 @@ static int parse_longlink(tuple_t *tuple, cistpl_longlink_t *link)
+ {
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    link->addr = le32_to_cpu(*(__le32 *)tuple->TupleData);
++    link->addr = cis_get_u32(tuple->TupleData);
+     return CS_SUCCESS;
+ }
+ 
+@@ -700,7 +710,8 @@ static int parse_longlink_mfc(tuple_t *tuple,
+ 	return CS_BAD_TUPLE;
+     for (i = 0; i < link->nfn; i++) {
+ 	link->fn[i].space = *p; p++;
+-	link->fn[i].addr = le32_to_cpu(*(__le32 *)p); p += 4;
++	link->fn[i].addr = cis_get_u32(p);
++	p += 4;
+     }
+     return CS_SUCCESS;
+ }
+@@ -787,12 +798,10 @@ static int parse_jedec(tuple_t *tuple, cistpl_jedec_t *jedec)
+ 
+ static int parse_manfid(tuple_t *tuple, cistpl_manfid_t *m)
+ {
+-    __le16 *p;
+     if (tuple->TupleDataLen < 4)
+ 	return CS_BAD_TUPLE;
+-    p = (__le16 *)tuple->TupleData;
+-    m->manf = le16_to_cpu(p[0]);
+-    m->card = le16_to_cpu(p[1]);
++    m->manf = cis_get_u16(tuple->TupleData);
++    m->card = cis_get_u16(tuple->TupleData + 2);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1091,7 +1100,7 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x20:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
+ 	entry->mem.win[0].card_addr = 0;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 2;
+@@ -1099,9 +1108,8 @@ static int parse_cftable_entry(tuple_t *tuple,
+ 	break;
+     case 0x40:
+ 	entry->mem.nwin = 1;
+-	entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8;
+-	entry->mem.win[0].card_addr =
+-	    le16_to_cpu(*(__le16 *)(p+2)) << 8;
++	entry->mem.win[0].len = cis_get_u16(p) << 8;
++	entry->mem.win[0].card_addr = cis_get_u16(p + 2) << 8;
+ 	entry->mem.win[0].host_addr = 0;
+ 	p += 4;
+ 	if (p > q) return CS_BAD_TUPLE;
+@@ -1138,7 +1146,7 @@ static int parse_bar(tuple_t *tuple, cistpl_bar_t *bar)
+     p = (u_char *)tuple->TupleData;
+     bar->attr = *p;
+     p += 2;
+-    bar->size = le32_to_cpu(*(__le32 *)p);
++    bar->size = cis_get_u32(p);
+     return CS_SUCCESS;
+ }
+ 
+@@ -1151,7 +1159,7 @@ static int parse_config_cb(tuple_t *tuple, cistpl_config_t *config)
+ 	return CS_BAD_TUPLE;
+     config->last_idx = *(++p);
+     p++;
+-    config->base = le32_to_cpu(*(__le32 *)p);
++    config->base = cis_get_u32(p);
+     config->subtuples = tuple->TupleDataLen - 6;
+     return CS_SUCCESS;
+ }
+@@ -1267,7 +1275,7 @@ static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2)
+ 
+     v2->vers = p[0];
+     v2->comply = p[1];
+-    v2->dindex = le16_to_cpu(*(__le16 *)(p+2));
++    v2->dindex = cis_get_u16(p +2 );
+     v2->vspec8 = p[6];
+     v2->vspec9 = p[7];
+     v2->nhdr = p[8];
+@@ -1308,8 +1316,8 @@ static int parse_format(tuple_t *tuple, cistpl_format_t *fmt)
+ 
+     fmt->type = p[0];
+     fmt->edc = p[1];
+-    fmt->offset = le32_to_cpu(*(__le32 *)(p+2));
+-    fmt->length = le32_to_cpu(*(__le32 *)(p+6));
++    fmt->offset = cis_get_u32(p + 2);
++    fmt->length = cis_get_u32(p + 6);
+ 
+     return CS_SUCCESS;
+ }
+diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
+index b046974..bc90604 100644
+--- a/drivers/spi/atmel_spi.c
++++ b/drivers/spi/atmel_spi.c
+@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi)
+ 		csr |= SPI_BIT(NCPHA);
+ 
+ 	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
+index 767aed5..f81d08d 100644
+--- a/drivers/usb/gadget/Kconfig
++++ b/drivers/usb/gadget/Kconfig
+@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES
+ 	   driver on a new board.   Enable these files by choosing "Y"
+ 	   here.  If in doubt, or to conserve kernel memory, say "N".
+ 
++config USB_GADGET_DEBUG_FS
++	boolean "Debugging information files in debugfs"
++	depends on USB_GADGET && DEBUG_FS
++	help
++	   Some of the drivers in the "gadget" framework can expose
++	   debugging information in files under /sys/kernel/debug/.
++	   The information in these files may help when you're
++	   troubleshooting or bringing up a driver on a new board.
++	   Enable these files by choosing "Y" here.  If in doubt, or
++	   to conserve kernel memory, say "N".
++
+ config	USB_GADGET_SELECTED
+ 	boolean
+ 
+@@ -103,6 +114,20 @@ config USB_AMD5536UDC
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
++config USB_GADGET_ATMEL_USBA
++	boolean "Atmel USBA"
++	select USB_GADGET_DUALSPEED
++	depends on AVR32
++	help
++	  USBA is the integrated high-speed USB Device controller on
++	  the AT32AP700x processors from Atmel.
++
++config USB_ATMEL_USBA
++	tristate
++	depends on USB_GADGET_ATMEL_USBA
++	default USB_GADGET
++	select USB_GADGET_SELECTED
++
+ config USB_GADGET_FSL_USB2
+ 	boolean "Freescale Highspeed USB DR Peripheral Controller"
+ 	depends on MPC834x || PPC_MPC831x
+@@ -228,7 +253,6 @@ config USB_LH7A40X
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
+ 
+-
+ config USB_GADGET_OMAP
+ 	boolean "OMAP USB Device Controller"
+ 	depends on ARCH_OMAP
+diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
+index 1bc0f03..904e57b 100644
+--- a/drivers/usb/gadget/Makefile
++++ b/drivers/usb/gadget/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
+ obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
+ obj-$(CONFIG_USB_S3C2410)	+= s3c2410_udc.o
+ obj-$(CONFIG_USB_AT91)		+= at91_udc.o
++obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
+ obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
+ obj-$(CONFIG_USB_M66592)	+= m66592-udc.o
+ 
+diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
+new file mode 100644
+index 0000000..e35362d
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.c
+@@ -0,0 +1,2038 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/list.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ch9.h>
++#include <linux/usb_gadget.h>
++#include <linux/delay.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
++
++#include "atmel_usba_udc.h"
++
++
++static struct usba_udc the_udc;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/uaccess.h>
++
++static int queue_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_ep *ep = inode->i_private;
++	struct usba_request *req, *req_copy;
++	struct list_head *queue_data;
++
++	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
++	if (!queue_data)
++		return -ENOMEM;
++	INIT_LIST_HEAD(queue_data);
++
++	spin_lock_irq(&ep->udc->lock);
++	list_for_each_entry(req, &ep->queue, queue) {
++		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
++		if (!req_copy)
++			goto fail;
++		memcpy(req_copy, req, sizeof(*req_copy));
++		list_add_tail(&req_copy->queue, queue_data);
++	}
++	spin_unlock_irq(&ep->udc->lock);
++
++	file->private_data = queue_data;
++	return 0;
++
++fail:
++	spin_unlock_irq(&ep->udc->lock);
++	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return -ENOMEM;
++}
++
++/*
++ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
++ *
++ * b: buffer address
++ * l: buffer length
++ * I/i: interrupt/no interrupt
++ * Z/z: zero/no zero
++ * S/s: short ok/short not ok
++ * s: status
++ * n: nr_packets
++ * F/f: submitted/not submitted to FIFO
++ * D/d: using/not using DMA
++ * L/l: last transaction/not last transaction
++ */
++static ssize_t queue_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct list_head *queue = file->private_data;
++	struct usba_request *req, *tmp_req;
++	size_t len, remaining, actual = 0;
++	char tmpbuf[38];
++
++	if (!access_ok(VERIFY_WRITE, buf, nbytes))
++		return -EFAULT;
++
++	mutex_lock(&file->f_dentry->d_inode->i_mutex);
++	list_for_each_entry_safe(req, tmp_req, queue, queue) {
++		len = snprintf(tmpbuf, sizeof(tmpbuf),
++				"%8p %08x %c%c%c %5d %c%c%c\n",
++				req->req.buf, req->req.length,
++				req->req.no_interrupt ? 'i' : 'I',
++				req->req.zero ? 'Z' : 'z',
++				req->req.short_not_ok ? 's' : 'S',
++				req->req.status,
++				req->submitted ? 'F' : 'f',
++				req->using_dma ? 'D' : 'd',
++				req->last_transaction ? 'L' : 'l');
++		len = min(len, sizeof(tmpbuf));
++		if (len > nbytes)
++			break;
++
++		list_del(&req->queue);
++		kfree(req);
++
++		remaining = __copy_to_user(buf, tmpbuf, len);
++		actual += len - remaining;
++		if (remaining)
++			break;
++
++		nbytes -= len;
++		buf += len;
++	}
++	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
++
++	return actual;
++}
++
++static int queue_dbg_release(struct inode *inode, struct file *file)
++{
++	struct list_head *queue_data = file->private_data;
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return 0;
++}
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_udc *udc;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	udc = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&udc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(udc->regs + i * 4);
++	spin_unlock_irq(&udc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++			file->private_data,
++			file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++const struct file_operations queue_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= queue_dbg_open,
++	.llseek		= no_llseek,
++	.read		= queue_dbg_read,
++	.release	= queue_dbg_release,
++};
++
++const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void usba_ep_init_debugfs(struct usba_udc *udc,
++		struct usba_ep *ep)
++{
++	struct dentry *ep_root;
++
++	ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
++	if (!ep_root)
++		goto err_root;
++	ep->debugfs_dir = ep_root;
++
++	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
++						ep, &queue_dbg_fops);
++	if (!ep->debugfs_queue)
++		goto err_queue;
++
++	if (ep->can_dma) {
++		ep->debugfs_dma_status
++			= debugfs_create_u32("dma_status", 0400, ep_root,
++					&ep->last_dma_status);
++		if (!ep->debugfs_dma_status)
++			goto err_dma_status;
++	}
++	if (ep_is_control(ep)) {
++		ep->debugfs_state
++			= debugfs_create_u32("state", 0400, ep_root,
++					&ep->state);
++		if (!ep->debugfs_state)
++			goto err_state;
++	}
++
++	return;
++
++err_state:
++	if (ep->can_dma)
++		debugfs_remove(ep->debugfs_dma_status);
++err_dma_status:
++	debugfs_remove(ep->debugfs_queue);
++err_queue:
++	debugfs_remove(ep_root);
++err_root:
++	dev_err(&ep->udc->pdev->dev,
++		"failed to create debugfs directory for %s\n", ep->ep.name);
++}
++
++static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++	debugfs_remove(ep->debugfs_queue);
++	debugfs_remove(ep->debugfs_dma_status);
++	debugfs_remove(ep->debugfs_state);
++	debugfs_remove(ep->debugfs_dir);
++	ep->debugfs_dma_status = NULL;
++	ep->debugfs_dir = NULL;
++}
++
++static void usba_init_debugfs(struct usba_udc *udc)
++{
++	struct dentry *root, *regs;
++	struct resource *regs_resource;
++
++	root = debugfs_create_dir(udc->gadget.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	udc->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
++				CTRL_IOMEM_ID);
++	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
++	udc->debugfs_regs = regs;
++
++	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
++
++	return;
++
++err_regs:
++	debugfs_remove(root);
++err_root:
++	udc->debugfs_root = NULL;
++	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++}
++
++static void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
++	debugfs_remove(udc->debugfs_regs);
++	debugfs_remove(udc->debugfs_root);
++	udc->debugfs_regs = NULL;
++	udc->debugfs_root = NULL;
++}
++#else
++static inline void usba_ep_init_debugfs(struct usba_udc *udc,
++					 struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
++
++}
++
++static inline void usba_init_debugfs(struct usba_udc *udc)
++{
++
++}
++
++static inline void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++
++}
++#endif
++
++static int vbus_is_present(struct usba_udc *udc)
++{
++	if (udc->vbus_pin != -1)
++		return gpio_get_value(udc->vbus_pin);
++
++	/* No Vbus detection: Assume always present */
++	return 1;
++}
++
++static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
++{
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
++	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
++		tmp = *(unsigned long *)buf;
++		if (len >= 4) {
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++			__raw_writel(tmp, fifo);
++		} else {
++			do {
++				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
++				__raw_writeb(tmp >> 24, fifo);
++				fifo++;
++				tmp <<= 8;
++			} while (--len);
++			break;
++		}
++	}
++}
++
++static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++{
++	union {
++		unsigned long *w;
++		unsigned char *b;
++	} p;
++	unsigned long tmp;
++
++	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
++	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
++		if (len >= 4) {
++			tmp = __raw_readl(fifo);
++			*p.w = tmp;
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++		} else {
++			do {
++				tmp = __raw_readb(fifo);
++				*p.b = tmp;
++				DBG(DBG_FIFO, " -> %02lx\n", tmp);
++				fifo++, p.b++;
++			} while (--len);
++		}
++	}
++}
++
++static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
++{
++	unsigned int transaction_len;
++
++	transaction_len = req->req.length - req->req.actual;
++	req->last_transaction = 1;
++	if (transaction_len > ep->ep.maxpacket) {
++		transaction_len = ep->ep.maxpacket;
++		req->last_transaction = 0;
++	} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
++		req->last_transaction = 0;
++
++	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
++		ep->ep.name, req, transaction_len,
++		req->last_transaction ? ", done" : "");
++
++	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	req->req.actual += transaction_len;
++}
++
++static void submit_request(struct usba_ep *ep, struct usba_request *req)
++{
++	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
++		ep->ep.name, req, req->req.length);
++
++	req->req.actual = 0;
++	req->submitted = 1;
++
++	if (req->using_dma) {
++		if (req->req.length == 0) {
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++			return;
++		}
++
++		if (req->req.zero)
++			usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
++		else
++			usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
++
++		usba_dma_writel(ep, ADDRESS, req->req.dma);
++		usba_dma_writel(ep, CONTROL, req->ctrl);
++	} else {
++		next_fifo_transaction(ep, req);
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		} else {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		}
++	}
++}
++
++static void submit_next_request(struct usba_ep *ep)
++{
++	struct usba_request *req;
++
++	if (list_empty(&ep->queue)) {
++		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
++		return;
++	}
++
++	req = list_entry(ep->queue.next, struct usba_request, queue);
++	if (!req->submitted)
++		submit_request(ep, req);
++}
++
++static void send_status(struct usba_udc *udc, struct usba_ep *ep)
++{
++	ep->state = STATUS_STAGE_IN;
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++}
++
++static void receive_data(struct usba_ep *ep)
++{
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req;
++	unsigned long status;
++	unsigned int bytecount, nr_busy;
++	int is_complete = 0;
++
++	status = usba_ep_readl(ep, STA);
++	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
++
++	while (nr_busy > 0) {
++		if (list_empty(&ep->queue)) {
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			break;
++		}
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++		bytecount = USBA_BFEXT(BYTE_COUNT, status);
++
++		if (status & (1 << 31))
++			is_complete = 1;
++		if (req->req.actual + bytecount >= req->req.length) {
++			is_complete = 1;
++			bytecount = req->req.length - req->req.actual;
++		}
++
++		copy_from_fifo(req->req.buf + req->req.actual,
++				ep->fifo, bytecount);
++		req->req.actual += bytecount;
++
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++
++		if (is_complete) {
++			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
++			req->req.status = 0;
++			list_del_init(&req->queue);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			spin_unlock(&udc->lock);
++			req->req.complete(&ep->ep, &req->req);
++			spin_lock(&udc->lock);
++		}
++
++		status = usba_ep_readl(ep, STA);
++		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++
++		if (is_complete && ep_is_control(ep)) {
++			send_status(udc, ep);
++			break;
++		}
++	}
++}
++
++static void
++request_complete(struct usba_ep *ep, struct usba_request *req, int status)
++{
++	struct usba_udc *udc = ep->udc;
++
++	WARN_ON(!list_empty(&req->queue));
++
++	if (req->req.status == -EINPROGRESS)
++		req->req.status = status;
++
++	if (req->mapped) {
++		dma_unmap_single(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->req.dma = DMA_ADDR_INVALID;
++		req->mapped = 0;
++	}
++
++	DBG(DBG_GADGET | DBG_REQ,
++		"%s: req %p complete: status %d, actual %u\n",
++		ep->ep.name, req, req->req.status, req->req.actual);
++
++	spin_unlock(&udc->lock);
++	req->req.complete(&ep->ep, &req->req);
++	spin_lock(&udc->lock);
++}
++
++static void
++request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
++{
++	struct usba_request *req, *tmp_req;
++
++	list_for_each_entry_safe(req, tmp_req, list, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, status);
++	}
++}
++
++static int
++usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags, ept_cfg, maxpacket;
++	unsigned int nr_trans;
++
++	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
++
++	maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
++
++	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
++			|| ep->index == 0
++			|| desc->bDescriptorType != USB_DT_ENDPOINT
++			|| maxpacket == 0
++			|| maxpacket > ep->fifo_size) {
++		DBG(DBG_ERR, "ep_enable: Invalid argument");
++		return -EINVAL;
++	}
++
++	ep->is_isoc = 0;
++	ep->is_in = 0;
++
++	if (maxpacket <= 8)
++		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
++	else
++		/* LSB is bit 1, not 0 */
++		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
++
++	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
++			ep->ep.name, ept_cfg, maxpacket);
++
++	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
++		ep->is_in = 1;
++		ept_cfg |= USBA_EPT_DIR_IN;
++	}
++
++	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
++	case USB_ENDPOINT_XFER_CONTROL:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
++		break;
++	case USB_ENDPOINT_XFER_ISOC:
++		if (!ep->can_isoc) {
++			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
++					ep->ep.name);
++			return -EINVAL;
++		}
++
++		/*
++		 * Bits 11:12 specify number of _additional_
++		 * transactions per microframe.
++		 */
++		nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
++		if (nr_trans > 3)
++			return -EINVAL;
++
++		ep->is_isoc = 1;
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
++
++		/*
++		 * Do triple-buffering on high-bandwidth iso endpoints.
++		 */
++		if (nr_trans > 1 && ep->nr_banks == 3)
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
++		else
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
++		break;
++	case USB_ENDPOINT_XFER_BULK:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	case USB_ENDPOINT_XFER_INT:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	}
++
++	spin_lock_irqsave(&ep->udc->lock, flags);
++
++	if (ep->desc) {
++		spin_unlock_irqrestore(&ep->udc->lock, flags);
++		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
++		return -EBUSY;
++	}
++
++	ep->desc = desc;
++	ep->ep.maxpacket = maxpacket;
++
++	usba_ep_writel(ep, CFG, ept_cfg);
++	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++
++	if (ep->can_dma) {
++		u32 ctrl;
++
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)
++					| USBA_BF(DMA_INT, 1 << ep->index)));
++		ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
++		usba_ep_writel(ep, CTL_ENB, ctrl);
++	} else {
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)));
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
++			(unsigned long)usba_ep_readl(ep, CFG));
++	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
++			(unsigned long)usba_readl(udc, INT_ENB));
++
++	return 0;
++}
++
++static int usba_ep_disable(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	LIST_HEAD(req_list);
++	unsigned long flags;
++
++	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (!ep->desc) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
++		return -EINVAL;
++	}
++	ep->desc = NULL;
++
++	list_splice_init(&ep->queue, &req_list);
++	if (ep->can_dma) {
++		usba_dma_writel(ep, CONTROL, 0);
++		usba_dma_writel(ep, ADDRESS, 0);
++		usba_dma_readl(ep, STATUS);
++	}
++	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
++	usba_writel(udc, INT_ENB,
++			usba_readl(udc, INT_ENB)
++			& ~USBA_BF(EPT_INT, 1 << ep->index));
++
++	request_complete_list(ep, &req_list, -ESHUTDOWN);
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static struct usb_request *
++usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
++{
++	struct usba_request *req;
++
++	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
++
++	req = kzalloc(sizeof(*req), gfp_flags);
++	if (!req)
++		return NULL;
++
++	INIT_LIST_HEAD(&req->queue);
++	req->req.dma = DMA_ADDR_INVALID;
++
++	return &req->req;
++}
++
++static void
++usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_request *req = to_usba_req(_req);
++
++	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
++
++	kfree(req);
++}
++
++static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
++		struct usba_request *req, gfp_t gfp_flags)
++{
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
++		ep->ep.name, req->req.length, req->req.dma,
++		req->req.zero ? 'Z' : 'z',
++		req->req.short_not_ok ? 'S' : 's',
++		req->req.no_interrupt ? 'I' : 'i');
++
++	if (req->req.length > 0x10000) {
++		/* Lengths from 0 to 65536 (inclusive) are supported */
++		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
++		return -EINVAL;
++	}
++
++	req->using_dma = 1;
++
++	if (req->req.dma == DMA_ADDR_INVALID) {
++		req->req.dma = dma_map_single(
++			&udc->pdev->dev, req->req.buf, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 1;
++	} else {
++		dma_sync_single_for_device(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 0;
++	}
++
++	req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
++			| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
++			| USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
++
++	if (ep->is_in)
++		req->ctrl |= USBA_DMA_END_BUF_EN;
++
++	/*
++	 * Add this request to the queue and submit for DMA if
++	 * possible. Check if we're still alive first -- we may have
++	 * received a reset since last time we checked.
++	 */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		if (list_empty(&ep->queue))
++			submit_request(ep, req);
++
++		list_add_tail(&req->queue, &ep->queue);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int
++usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
++{
++	struct usba_request *req = to_usba_req(_req);
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret;
++
++	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
++			ep->ep.name, req, _req->length);
++
++	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
++		return -ESHUTDOWN;
++
++	req->submitted = 0;
++	req->using_dma = 0;
++	req->last_transaction = 0;
++
++	_req->status = -EINPROGRESS;
++	_req->actual = 0;
++
++	if (ep->can_dma)
++		return queue_dma(udc, ep, req, gfp_flags);
++
++	/* May have received a reset since last time we checked */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		list_add_tail(&req->queue, &ep->queue);
++
++		if (ep->is_in || (ep_is_control(ep)
++				&& (ep->state == DATA_STAGE_IN
++					|| ep->state == STATUS_STAGE_IN)))
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		else
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static void
++usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
++{
++	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
++}
++
++static int stop_dma(struct usba_ep *ep, u32 *pstatus)
++{
++	unsigned int timeout;
++	u32 status;
++
++	/*
++	 * Stop the DMA controller. When writing both CH_EN
++	 * and LINK to 0, the other bits are not affected.
++	 */
++	usba_dma_writel(ep, CONTROL, 0);
++
++	/* Wait for the FIFO to empty */
++	for (timeout = 40; timeout; --timeout) {
++		status = usba_dma_readl(ep, STATUS);
++		if (!(status & USBA_DMA_CH_EN))
++			break;
++		udelay(1);
++	}
++
++	if (pstatus)
++		*pstatus = status;
++
++	if (timeout == 0) {
++		dev_err(&ep->udc->pdev->dev,
++			"%s: timed out waiting for DMA FIFO to empty\n",
++			ep->ep.name);
++		return -ETIMEDOUT;
++	}
++
++	return 0;
++}
++
++static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req = to_usba_req(_req);
++	unsigned long flags;
++	u32 status;
++
++	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
++			ep->ep.name, req);
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	if (req->using_dma) {
++		/*
++		 * If this request is currently being transferred,
++		 * stop the DMA controller and reset the FIFO.
++		 */
++		if (ep->queue.next == &req->queue) {
++			status = usba_dma_readl(ep, STATUS);
++			if (status & USBA_DMA_CH_EN)
++				stop_dma(ep, &status);
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++			ep->last_dma_status = status;
++#endif
++
++			usba_writel(udc, EPT_RST, 1 << ep->index);
++
++			usba_update_req(ep, req, status);
++		}
++	}
++
++	/*
++	 * Errors should stop the queue from advancing until the
++	 * completion function returns.
++	 */
++	list_del_init(&req->queue);
++
++	request_complete(ep, req, -ECONNRESET);
++
++	/* Process the next request if any */
++	submit_next_request(ep);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++}
++
++static int usba_ep_set_halt(struct usb_ep *_ep, int value)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret = 0;
++
++	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
++			value ? "set" : "clear");
++
++	if (!ep->desc) {
++		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
++				ep->ep.name);
++		return -ENODEV;
++	}
++	if (ep->is_isoc) {
++		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
++				ep->ep.name);
++		return -ENOTTY;
++	}
++
++	spin_lock_irqsave(&udc->lock, flags);
++
++	/*
++	 * We can't halt IN endpoints while there are still data to be
++	 * transferred
++	 */
++	if (!list_empty(&ep->queue)
++			|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
++					& USBA_BF(BUSY_BANKS, -1L))))) {
++		ret = -EAGAIN;
++	} else {
++		if (value)
++			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++		else
++			usba_ep_writel(ep, CLR_STA,
++					USBA_FORCE_STALL | USBA_TOGGLE_CLR);
++		usba_ep_readl(ep, STA);
++	}
++
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
++}
++
++static int usba_ep_fifo_status(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++
++	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++}
++
++static void usba_ep_fifo_flush(struct usb_ep *_ep)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++
++	usba_writel(udc, EPT_RST, 1 << ep->index);
++}
++
++static const struct usb_ep_ops usba_ep_ops = {
++	.enable		= usba_ep_enable,
++	.disable	= usba_ep_disable,
++	.alloc_request	= usba_ep_alloc_request,
++	.free_request	= usba_ep_free_request,
++	.queue		= usba_ep_queue,
++	.dequeue	= usba_ep_dequeue,
++	.set_halt	= usba_ep_set_halt,
++	.fifo_status	= usba_ep_fifo_status,
++	.fifo_flush	= usba_ep_fifo_flush,
++};
++
++static int usba_udc_get_frame(struct usb_gadget *gadget)
++{
++	struct usba_udc *udc = to_usba_udc(gadget);
++
++	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
++}
++
++static const struct usb_gadget_ops usba_udc_ops = {
++	.get_frame	= usba_udc_get_frame,
++};
++
++#define EP(nam, idx, maxpkt, maxbk, dma, isoc)			\
++{								\
++	.ep	= {						\
++		.ops		= &usba_ep_ops,			\
++		.name		= nam,				\
++		.maxpacket	= maxpkt,			\
++	},							\
++	.udc		= &the_udc,				\
++	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
++	.fifo_size	= maxpkt,				\
++	.nr_banks	= maxbk,				\
++	.index		= idx,					\
++	.can_dma	= dma,					\
++	.can_isoc	= isoc,					\
++}
++
++static struct usba_ep usba_ep[] = {
++	EP("ep0", 0, 64, 1, 0, 0),
++	EP("ep1in-bulk", 1, 512, 2, 1, 1),
++	EP("ep2out-bulk", 2, 512, 2, 1, 1),
++	EP("ep3in-int", 3, 64, 3, 1, 0),
++	EP("ep4out-int", 4, 64, 3, 1, 0),
++	EP("ep5in-iso", 5, 1024, 3, 1, 1),
++	EP("ep6out-iso", 6, 1024, 3, 1, 1),
++};
++#undef EP
++
++static struct usb_endpoint_descriptor usba_ep0_desc = {
++	.bLength = USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType = USB_DT_ENDPOINT,
++	.bEndpointAddress = 0,
++	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
++	.wMaxPacketSize = __constant_cpu_to_le16(64),
++	/* FIXME: I have no idea what to put here */
++	.bInterval = 1,
++};
++
++static void nop_release(struct device *dev)
++{
++
++}
++
++static struct usba_udc the_udc = {
++	.gadget	= {
++		.ops		= &usba_udc_ops,
++		.ep0		= &usba_ep[0].ep,
++		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
++		.is_dualspeed	= 1,
++		.name		= "atmel_usba_udc",
++		.dev	= {
++			.bus_id		= "gadget",
++			.release	= nop_release,
++		},
++	},
++
++	.lock	= SPIN_LOCK_UNLOCKED,
++};
++
++/*
++ * Called with interrupts disabled and udc->lock held.
++ */
++static void reset_all_endpoints(struct usba_udc *udc)
++{
++	struct usba_ep *ep;
++	struct usba_request *req, *tmp_req;
++
++	usba_writel(udc, EPT_RST, ~0UL);
++
++	ep = to_usba_ep(udc->gadget.ep0);
++	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, -ECONNRESET);
++	}
++
++	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
++		if (ep->desc)
++			usba_ep_disable(&ep->ep);
++	}
++}
++
++static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
++{
++	struct usba_ep *ep;
++
++	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
++		return to_usba_ep(udc->gadget.ep0);
++
++	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
++		u8 bEndpointAddress;
++
++		if (!ep->desc)
++			continue;
++		bEndpointAddress = ep->desc->bEndpointAddress;
++		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
++			continue;
++		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
++				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
++			return ep;
++	}
++
++	return NULL;
++}
++
++/* Called with interrupts disabled and udc->lock held */
++static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
++{
++	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++	ep->state = WAIT_FOR_SETUP;
++}
++
++static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
++{
++	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
++		return 1;
++	return 0;
++}
++
++static inline void set_address(struct usba_udc *udc, unsigned int addr)
++{
++	u32 regval;
++
++	DBG(DBG_BUS, "setting address %u...\n", addr);
++	regval = usba_readl(udc, CTRL);
++	regval = USBA_BFINS(DEV_ADDR, addr, regval);
++	usba_writel(udc, CTRL, regval);
++}
++
++static int do_test_mode(struct usba_udc *udc)
++{
++	static const char test_packet_buffer[] = {
++		/* JKJKJKJK * 9 */
++		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++		/* JJKKJJKK * 8 */
++		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
++		/* JJKKJJKK * 8 */
++		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
++		/* JJJJJJJKKKKKKK * 8 */
++		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		/* JJJJJJJK * 8 */
++		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
++		/* {JKKKKKKK * 10}, JK */
++		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
++	};
++	struct usba_ep *ep;
++	struct device *dev = &udc->pdev->dev;
++	int test_mode;
++
++	test_mode = udc->test_mode;
++
++	/* Start from a clean slate */
++	reset_all_endpoints(udc);
++
++	switch (test_mode) {
++	case 0x0100:
++		/* Test_J */
++		usba_writel(udc, TST, USBA_TST_J_MODE);
++		dev_info(dev, "Entering Test_J mode...\n");
++		break;
++	case 0x0200:
++		/* Test_K */
++		usba_writel(udc, TST, USBA_TST_K_MODE);
++		dev_info(dev, "Entering Test_K mode...\n");
++		break;
++	case 0x0300:
++		/*
++		 * Test_SE0_NAK: Force high-speed mode and set up ep0
++		 * for Bulk IN transfers
++		 */
++		ep = &usba_ep[0];
++		usba_writel(udc, TST,
++				USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
++		}
++		break;
++	case 0x0400:
++		/* Test_Packet */
++		ep = &usba_ep[0];
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_Packet: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			usba_writel(udc, TST, USBA_TST_PKT_MODE);
++			copy_to_fifo(ep->fifo, test_packet_buffer,
++					sizeof(test_packet_buffer));
++			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++			dev_info(dev, "Entering Test_Packet mode...\n");
++		}
++		break;
++	default:
++		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
++		return -EINVAL;
++	}
++
++	return 0;
++}
++
++/* Avoid overly long expressions */
++static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
++		return true;
++	return false;
++}
++
++static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
++		return true;
++	return false;
++}
++
++static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
++		struct usb_ctrlrequest *crq)
++{
++	int retval = 0;;
++
++	switch (crq->bRequest) {
++	case USB_REQ_GET_STATUS: {
++		u16 status;
++
++		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
++			/* Self-powered, no remote wakeup */
++			status = __constant_cpu_to_le16(1 << 0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
++			status = __constant_cpu_to_le16(0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
++			struct usba_ep *target;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			status = 0;
++			if (is_stalled(udc, target))
++				status |= __constant_cpu_to_le16(1);
++		} else
++			goto delegate;
++
++		/* Write directly to the FIFO. No queueing is done. */
++		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
++			goto stall;
++		ep->state = DATA_STAGE_IN;
++		__raw_writew(status, ep->fifo);
++		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++		break;
++	}
++
++	case USB_REQ_CLEAR_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				/* Can't CLEAR_FEATURE TEST_MODE */
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
++			if (target->index != 0)
++				usba_ep_writel(target, CLR_STA,
++						USBA_TOGGLE_CLR);
++		} else {
++			goto delegate;
++		}
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_test_mode(crq)) {
++				send_status(udc, ep);
++				ep->state = STATUS_STAGE_TEST;
++				udc->test_mode = le16_to_cpu(crq->wIndex);
++				return 0;
++			} else if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
++
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
++
++			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
++		} else
++			goto delegate;
++
++		send_status(udc, ep);
++		break;
++	}
++
++	case USB_REQ_SET_ADDRESS:
++		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
++			goto delegate;
++
++		set_address(udc, le16_to_cpu(crq->wValue));
++		send_status(udc, ep);
++		ep->state = STATUS_STAGE_ADDR;
++		break;
++
++	default:
++delegate:
++		spin_unlock(&udc->lock);
++		retval = udc->driver->setup(&udc->gadget, crq);
++		spin_lock(&udc->lock);
++	}
++
++	return retval;
++
++stall:
++	printk(KERN_ERR
++		"udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
++		"halting endpoint...\n",
++		ep->ep.name, crq->bRequestType, crq->bRequest,
++		le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
++		le16_to_cpu(crq->wLength));
++	set_protocol_stall(udc, ep);
++	return -1;
++}
++
++static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++restart:
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
++			ep->ep.name, ep->state, epstatus, epctrl);
++
++	req = NULL;
++	if (!list_empty(&ep->queue))
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		if (req->submitted)
++			next_fifo_transaction(ep, req);
++		else
++			submit_request(ep, req);
++
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		}
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
++		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
++
++		switch (ep->state) {
++		case DATA_STAGE_IN:
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = STATUS_STAGE_OUT;
++			break;
++		case STATUS_STAGE_ADDR:
++			/* Activate our new address */
++			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
++						| USBA_FADDR_EN));
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_IN:
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++				submit_next_request(ep);
++			}
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_TEST:
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			if (do_test_mode(udc))
++				set_protocol_stall(udc, ep);
++			break;
++		default:
++			printk(KERN_ERR
++				"udc: %s: TXCOMP: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		switch (ep->state) {
++		case STATUS_STAGE_OUT:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++			}
++			ep->state = WAIT_FOR_SETUP;
++			break;
++
++		case DATA_STAGE_OUT:
++			receive_data(ep);
++			break;
++
++		default:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			printk(KERN_ERR
++				"udc: %s: RXRDY: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
++
++		goto restart;
++	}
++	if (epstatus & USBA_RX_SETUP) {
++		union {
++			struct usb_ctrlrequest crq;
++			unsigned long data[2];
++		} crq;
++		unsigned int pkt_len;
++		int ret;
++
++		if (ep->state != WAIT_FOR_SETUP) {
++			/*
++			 * Didn't expect a SETUP packet at this
++			 * point. Clean up any pending requests (which
++			 * may be successful).
++			 */
++			int status = -EPROTO;
++
++			/*
++			 * RXRDY and TXCOMP are dropped when SETUP
++			 * packets arrive.  Just pretend we received
++			 * the status packet.
++			 */
++			if (ep->state == STATUS_STAGE_OUT
++					|| ep->state == STATUS_STAGE_IN) {
++				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++				status = 0;
++			}
++
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, status);
++			}
++		}
++
++		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
++		if (pkt_len != sizeof(crq)) {
++			printk(KERN_WARNING "udc: Invalid packet length %u "
++				"(expected %lu)\n", pkt_len, sizeof(crq));
++			set_protocol_stall(udc, ep);
++			return;
++		}
++
++		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
++		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
++
++		/* Free up one bank in the FIFO so that we can
++		 * generate or receive a reply right away. */
++		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
++
++		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
++			ep->state, crq.crq.bRequestType,
++			crq.crq.bRequest); */
++
++		if (crq.crq.bRequestType & USB_DIR_IN) {
++			/*
++			 * The USB 2.0 spec states that "if wLength is
++			 * zero, there is no data transfer phase."
++			 * However, testusb #14 seems to actually
++			 * expect a data phase even if wLength = 0...
++			 */
++			ep->state = DATA_STAGE_IN;
++		} else {
++			if (crq.crq.wLength != __constant_cpu_to_le16(0))
++				ep->state = DATA_STAGE_OUT;
++			else
++				ep->state = STATUS_STAGE_IN;
++		}
++
++		ret = -1;
++		if (ep->index == 0)
++			ret = handle_ep0_setup(udc, ep, &crq.crq);
++		else {
++			spin_unlock(&udc->lock);
++			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++			spin_lock(&udc->lock);
++		}
++
++		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
++			crq.crq.bRequestType, crq.crq.bRequest,
++			le16_to_cpu(crq.crq.wLength), ep->state, ret);
++
++		if (ret < 0) {
++			/* Let the host know that we failed */
++			set_protocol_stall(udc, ep);
++		}
++	}
++}
++
++static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
++
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
++
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
++
++	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
++
++		if (list_empty(&ep->queue)) {
++			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			return;
++		}
++
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++
++		if (req->using_dma) {
++			/* Send a zero-length packet */
++			usba_ep_writel(ep, SET_STA,
++					USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_DIS,
++					USBA_TX_PK_RDY);
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		} else {
++			if (req->submitted)
++				next_fifo_transaction(ep, req);
++			else
++				submit_request(ep, req);
++
++			if (req->last_transaction) {
++				list_del_init(&req->queue);
++				submit_next_request(ep);
++				request_complete(ep, req, 0);
++			}
++		}
++
++		epstatus = usba_ep_readl(ep, STA);
++		epctrl = usba_ep_readl(ep, CTL);
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
++		receive_data(ep);
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++	}
++}
++
++static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
++{
++	struct usba_request *req;
++	u32 status, control, pending;
++
++	status = usba_dma_readl(ep, STATUS);
++	control = usba_dma_readl(ep, CONTROL);
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	ep->last_dma_status = status;
++#endif
++	pending = status & control;
++	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
++
++	if (status & USBA_DMA_CH_EN) {
++		dev_err(&udc->pdev->dev,
++			"DMA_CH_EN is set after transfer is finished!\n");
++		dev_err(&udc->pdev->dev,
++			"status=%#08x, pending=%#08x, control=%#08x\n",
++			status, pending, control);
++
++		/*
++		 * try to pretend nothing happened. We might have to
++		 * do something here...
++		 */
++	}
++
++	if (list_empty(&ep->queue))
++		/* Might happen if a reset comes along at the right moment */
++		return;
++
++	if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++		usba_update_req(ep, req, status);
++
++		list_del_init(&req->queue);
++		submit_next_request(ep);
++		request_complete(ep, req, 0);
++	}
++}
++
++static irqreturn_t usba_udc_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	u32 status;
++	u32 dma_status;
++	u32 ep_status;
++
++	spin_lock(&udc->lock);
++
++	status = usba_readl(udc, INT_STA);
++	DBG(DBG_INT, "irq, status=%#08x\n", status);
++
++	if (status & USBA_DET_SUSPEND) {
++		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
++		DBG(DBG_BUS, "Suspend detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->suspend) {
++			spin_unlock(&udc->lock);
++			udc->driver->suspend(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	if (status & USBA_WAKE_UP) {
++		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
++		DBG(DBG_BUS, "Wake Up CPU detected\n");
++	}
++
++	if (status & USBA_END_OF_RESUME) {
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
++		DBG(DBG_BUS, "Resume detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->resume) {
++			spin_unlock(&udc->lock);
++			udc->driver->resume(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
++
++	dma_status = USBA_BFEXT(DMA_INT, status);
++	if (dma_status) {
++		int i;
++
++		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
++			if (dma_status & (1 << i))
++				usba_dma_irq(udc, &usba_ep[i]);
++	}
++
++	ep_status = USBA_BFEXT(EPT_INT, status);
++	if (ep_status) {
++		int i;
++
++		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
++			if (ep_status & (1 << i)) {
++				if (ep_is_control(&usba_ep[i]))
++					usba_control_irq(udc, &usba_ep[i]);
++				else
++					usba_ep_irq(udc, &usba_ep[i]);
++			}
++	}
++
++	if (status & USBA_END_OF_RESET) {
++		struct usba_ep *ep0;
++
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
++		reset_all_endpoints(udc);
++
++		if (status & USBA_HIGH_SPEED) {
++			DBG(DBG_BUS, "High-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_HIGH;
++		} else {
++			DBG(DBG_BUS, "Full-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_FULL;
++		}
++
++		ep0 = &usba_ep[0];
++		ep0->desc = &usba_ep0_desc;
++		ep0->state = WAIT_FOR_SETUP;
++		usba_ep_writel(ep0, CFG,
++				(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
++				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
++		usba_ep_writel(ep0, CTL_ENB,
++				USBA_EPT_ENABLE | USBA_RX_SETUP);
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++				| USBA_BF(EPT_INT, 1)
++				| USBA_DET_SUSPEND
++				| USBA_END_OF_RESUME));
++
++		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
++			dev_warn(&udc->pdev->dev,
++				 "WARNING: EP0 configuration is invalid!\n");
++	}
++
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t usba_vbus_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	int vbus;
++
++	/* debounce */
++	udelay(10);
++
++	spin_lock(&udc->lock);
++
++	/* May happen if Vbus pin toggles during probe() */
++	if (!udc->driver)
++		goto out;
++
++	vbus = gpio_get_value(udc->vbus_pin);
++	if (vbus != udc->vbus_prev) {
++		if (vbus) {
++			usba_writel(udc, CTRL, USBA_EN_USBA);
++			usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++		} else {
++			udc->gadget.speed = USB_SPEED_UNKNOWN;
++			reset_all_endpoints(udc);
++			usba_writel(udc, CTRL, 0);
++			spin_unlock(&udc->lock);
++			udc->driver->disconnect(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++		udc->vbus_prev = vbus;
++	}
++
++out:
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
++}
++
++int usb_gadget_register_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++	int ret;
++
++	if (!udc->pdev)
++		return -ENODEV;
++
++	spin_lock_irqsave(&udc->lock, flags);
++	if (udc->driver) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		return -EBUSY;
++	}
++
++	udc->driver = driver;
++	udc->gadget.dev.driver = &driver->driver;
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	clk_enable(udc->pclk);
++	clk_enable(udc->hclk);
++
++	ret = driver->bind(&udc->gadget);
++	if (ret) {
++		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
++			driver->driver.name, ret);
++		goto err_driver_bind;
++	}
++
++	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++
++	udc->vbus_prev = 0;
++	if (udc->vbus_pin != -1)
++		enable_irq(gpio_to_irq(udc->vbus_pin));
++
++	/* If Vbus is present, enable the controller and wait for reset */
++	spin_lock_irqsave(&udc->lock, flags);
++	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
++		usba_writel(udc, CTRL, USBA_EN_USBA);
++		usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return 0;
++
++err_driver_bind:
++	udc->driver = NULL;
++	udc->gadget.dev.driver = NULL;
++	return ret;
++}
++EXPORT_SYMBOL(usb_gadget_register_driver);
++
++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
++{
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++
++	if (!udc->pdev)
++		return -ENODEV;
++	if (driver != udc->driver)
++		return -EINVAL;
++
++	if (udc->vbus_pin != -1)
++		disable_irq(gpio_to_irq(udc->vbus_pin));
++
++	spin_lock_irqsave(&udc->lock, flags);
++	udc->gadget.speed = USB_SPEED_UNKNOWN;
++	reset_all_endpoints(udc);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	/* This will also disable the DP pullup */
++	usba_writel(udc, CTRL, 0);
++
++	driver->unbind(&udc->gadget);
++	udc->gadget.dev.driver = NULL;
++	udc->driver = NULL;
++
++	clk_disable(udc->hclk);
++	clk_disable(udc->pclk);
++
++	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++
++	return 0;
++}
++EXPORT_SYMBOL(usb_gadget_unregister_driver);
++
++static int __init usba_udc_probe(struct platform_device *pdev)
++{
++	struct usba_platform_data *pdata = pdev->dev.platform_data;
++	struct resource *regs, *fifo;
++	struct clk *pclk, *hclk;
++	struct usba_udc *udc = &the_udc;
++	int irq, ret, i;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
++	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
++	if (!regs || !fifo)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto err_get_hclk;
++	}
++
++	udc->pdev = pdev;
++	udc->pclk = pclk;
++	udc->hclk = hclk;
++	udc->vbus_pin = -1;
++
++	ret = -ENOMEM;
++	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!udc->regs) {
++		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
++		goto err_map_regs;
++	}
++	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
++		 (unsigned long)regs->start, udc->regs);
++	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
++	if (!udc->fifo) {
++		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
++		goto err_map_fifo;
++	}
++	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
++		 (unsigned long)fifo->start, udc->fifo);
++
++	device_initialize(&udc->gadget.dev);
++	udc->gadget.dev.parent = &pdev->dev;
++	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
++
++	platform_set_drvdata(pdev, udc);
++
++	/* Make sure we start from a clean slate */
++	clk_enable(pclk);
++	usba_writel(udc, CTRL, 0);
++	clk_disable(pclk);
++
++	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
++	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
++	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
++	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
++		struct usba_ep *ep = &usba_ep[i];
++
++		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
++		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
++		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
++
++		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
++	}
++
++	ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
++	if (ret) {
++		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
++			irq, ret);
++		goto err_request_irq;
++	}
++	udc->irq = irq;
++
++	ret = device_add(&udc->gadget.dev);
++	if (ret) {
++		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
++		goto err_device_add;
++	}
++
++	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
++		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
++			udc->vbus_pin = pdata->vbus_pin;
++
++			ret = request_irq(gpio_to_irq(udc->vbus_pin),
++					usba_vbus_irq, 0,
++					"atmel_usba_udc", udc);
++			if (ret) {
++				gpio_free(udc->vbus_pin);
++				udc->vbus_pin = -1;
++				dev_warn(&udc->pdev->dev,
++					 "failed to request vbus irq; "
++					 "assuming always on\n");
++			} else {
++				disable_irq(gpio_to_irq(udc->vbus_pin));
++			}
++		}
++	}
++
++	usba_init_debugfs(udc);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_init_debugfs(udc, &usba_ep[i]);
++
++	return 0;
++
++err_device_add:
++	free_irq(irq, udc);
++err_request_irq:
++	iounmap(udc->fifo);
++err_map_fifo:
++	iounmap(udc->regs);
++err_map_regs:
++	clk_put(hclk);
++err_get_hclk:
++	clk_put(pclk);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return ret;
++}
++
++static int __exit usba_udc_remove(struct platform_device *pdev)
++{
++	struct usba_udc *udc;
++	int i;
++
++	udc = platform_get_drvdata(pdev);
++
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_cleanup_debugfs(&usba_ep[i]);
++	usba_cleanup_debugfs(udc);
++
++	if (udc->vbus_pin != -1)
++		gpio_free(udc->vbus_pin);
++
++	free_irq(udc->irq, udc);
++	iounmap(udc->fifo);
++	iounmap(udc->regs);
++	clk_put(udc->hclk);
++	clk_put(udc->pclk);
++
++	device_unregister(&udc->gadget.dev);
++
++	return 0;
++}
++
++static struct platform_driver udc_driver = {
++	.remove		= __exit_p(usba_udc_remove),
++	.driver		= {
++		.name		= "atmel_usba_udc",
++	},
++};
++
++static int __init udc_init(void)
++{
++	return platform_driver_probe(&udc_driver, usba_udc_probe);
++}
++module_init(udc_init);
++
++static void __exit udc_exit(void)
++{
++	platform_driver_unregister(&udc_driver);
++}
++module_exit(udc_exit);
++
++MODULE_DESCRIPTION("Atmel USBA UDC driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h
+new file mode 100644
+index 0000000..f4f0f8b
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.h
+@@ -0,0 +1,350 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
++#define __LINUX_USB_GADGET_USBA_UDC_H__
++
++/* USB register offsets */
++#define USBA_CTRL				0x0000
++#define USBA_FNUM				0x0004
++#define USBA_INT_ENB				0x0010
++#define USBA_INT_STA				0x0014
++#define USBA_INT_CLR				0x0018
++#define USBA_EPT_RST				0x001c
++#define USBA_TST				0x00e0
++
++/* USB endpoint register offsets */
++#define USBA_EPT_CFG				0x0000
++#define USBA_EPT_CTL_ENB			0x0004
++#define USBA_EPT_CTL_DIS			0x0008
++#define USBA_EPT_CTL				0x000c
++#define USBA_EPT_SET_STA			0x0014
++#define USBA_EPT_CLR_STA			0x0018
++#define USBA_EPT_STA				0x001c
++
++/* USB DMA register offsets */
++#define USBA_DMA_NXT_DSC			0x0000
++#define USBA_DMA_ADDRESS			0x0004
++#define USBA_DMA_CONTROL			0x0008
++#define USBA_DMA_STATUS				0x000c
++
++/* Bitfields in CTRL */
++#define USBA_DEV_ADDR_OFFSET			0
++#define USBA_DEV_ADDR_SIZE			7
++#define USBA_FADDR_EN				(1 <<  7)
++#define USBA_EN_USBA				(1 <<  8)
++#define USBA_DETACH				(1 <<  9)
++#define USBA_REMOTE_WAKE_UP			(1 << 10)
++
++/* Bitfields in FNUM */
++#define USBA_MICRO_FRAME_NUM_OFFSET		0
++#define USBA_MICRO_FRAME_NUM_SIZE		3
++#define USBA_FRAME_NUMBER_OFFSET		3
++#define USBA_FRAME_NUMBER_SIZE			11
++#define USBA_FRAME_NUM_ERROR			(1 << 31)
++
++/* Bitfields in INT_ENB/INT_STA/INT_CLR */
++#define USBA_HIGH_SPEED				(1 <<  0)
++#define USBA_DET_SUSPEND			(1 <<  1)
++#define USBA_MICRO_SOF				(1 <<  2)
++#define USBA_SOF				(1 <<  3)
++#define USBA_END_OF_RESET			(1 <<  4)
++#define USBA_WAKE_UP				(1 <<  5)
++#define USBA_END_OF_RESUME			(1 <<  6)
++#define USBA_UPSTREAM_RESUME			(1 <<  7)
++#define USBA_EPT_INT_OFFSET			8
++#define USBA_EPT_INT_SIZE			16
++#define USBA_DMA_INT_OFFSET			24
++#define USBA_DMA_INT_SIZE			8
++
++/* Bitfields in EPT_RST */
++#define USBA_RST_OFFSET				0
++#define USBA_RST_SIZE				16
++
++/* Bitfields in USBA_TST */
++#define USBA_SPEED_CFG_OFFSET			0
++#define USBA_SPEED_CFG_SIZE			2
++#define USBA_TST_J_MODE				(1 <<  2)
++#define USBA_TST_K_MODE				(1 <<  3)
++#define USBA_TST_PKT_MODE			(1 <<  4)
++#define USBA_OPMODE2				(1 <<  5)
++
++/* Bitfields in EPT_CFG */
++#define USBA_EPT_SIZE_OFFSET			0
++#define USBA_EPT_SIZE_SIZE			3
++#define USBA_EPT_DIR_IN				(1 <<  3)
++#define USBA_EPT_TYPE_OFFSET			4
++#define USBA_EPT_TYPE_SIZE			2
++#define USBA_BK_NUMBER_OFFSET			6
++#define USBA_BK_NUMBER_SIZE			2
++#define USBA_NB_TRANS_OFFSET			8
++#define USBA_NB_TRANS_SIZE			2
++#define USBA_EPT_MAPPED				(1 << 31)
++
++/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
++#define USBA_EPT_ENABLE				(1 <<  0)
++#define USBA_AUTO_VALID				(1 <<  1)
++#define USBA_INTDIS_DMA				(1 <<  3)
++#define USBA_NYET_DIS				(1 <<  4)
++#define USBA_DATAX_RX				(1 <<  6)
++#define USBA_MDATA_RX				(1 <<  7)
++/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
++#define USBA_BUSY_BANK_IE			(1 << 18)
++
++/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
++#define USBA_FORCE_STALL			(1 <<  5)
++#define USBA_TOGGLE_CLR				(1 <<  6)
++#define USBA_TOGGLE_SEQ_OFFSET			6
++#define USBA_TOGGLE_SEQ_SIZE			2
++#define USBA_ERR_OVFLW				(1 <<  8)
++#define USBA_RX_BK_RDY				(1 <<  9)
++#define USBA_KILL_BANK				(1 <<  9)
++#define USBA_TX_COMPLETE			(1 << 10)
++#define USBA_TX_PK_RDY				(1 << 11)
++#define USBA_ISO_ERR_TRANS			(1 << 11)
++#define USBA_RX_SETUP				(1 << 12)
++#define USBA_ISO_ERR_FLOW			(1 << 12)
++#define USBA_STALL_SENT				(1 << 13)
++#define USBA_ISO_ERR_CRC			(1 << 13)
++#define USBA_ISO_ERR_NBTRANS			(1 << 13)
++#define USBA_NAK_IN				(1 << 14)
++#define USBA_ISO_ERR_FLUSH			(1 << 14)
++#define USBA_NAK_OUT				(1 << 15)
++#define USBA_CURRENT_BANK_OFFSET		16
++#define USBA_CURRENT_BANK_SIZE			2
++#define USBA_BUSY_BANKS_OFFSET			18
++#define USBA_BUSY_BANKS_SIZE			2
++#define USBA_BYTE_COUNT_OFFSET			20
++#define USBA_BYTE_COUNT_SIZE			11
++#define USBA_SHORT_PACKET			(1 << 31)
++
++/* Bitfields in DMA_CONTROL */
++#define USBA_DMA_CH_EN				(1 <<  0)
++#define USBA_DMA_LINK				(1 <<  1)
++#define USBA_DMA_END_TR_EN			(1 <<  2)
++#define USBA_DMA_END_BUF_EN			(1 <<  3)
++#define USBA_DMA_END_TR_IE			(1 <<  4)
++#define USBA_DMA_END_BUF_IE			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_IE			(1 <<  6)
++#define USBA_DMA_BURST_LOCK			(1 <<  7)
++#define USBA_DMA_BUF_LEN_OFFSET			16
++#define USBA_DMA_BUF_LEN_SIZE			16
++
++/* Bitfields in DMA_STATUS */
++#define USBA_DMA_CH_ACTIVE			(1 <<  1)
++#define USBA_DMA_END_TR_ST			(1 <<  4)
++#define USBA_DMA_END_BUF_ST			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_ST			(1 <<  6)
++
++/* Constants for SPEED_CFG */
++#define USBA_SPEED_CFG_NORMAL			0
++#define USBA_SPEED_CFG_FORCE_HIGH		2
++#define USBA_SPEED_CFG_FORCE_FULL		3
++
++/* Constants for EPT_SIZE */
++#define USBA_EPT_SIZE_8				0
++#define USBA_EPT_SIZE_16			1
++#define USBA_EPT_SIZE_32			2
++#define USBA_EPT_SIZE_64			3
++#define USBA_EPT_SIZE_128			4
++#define USBA_EPT_SIZE_256			5
++#define USBA_EPT_SIZE_512			6
++#define USBA_EPT_SIZE_1024			7
++
++/* Constants for EPT_TYPE */
++#define USBA_EPT_TYPE_CONTROL			0
++#define USBA_EPT_TYPE_ISO			1
++#define USBA_EPT_TYPE_BULK			2
++#define USBA_EPT_TYPE_INT			3
++
++/* Constants for BK_NUMBER */
++#define USBA_BK_NUMBER_ZERO			0
++#define USBA_BK_NUMBER_ONE			1
++#define USBA_BK_NUMBER_DOUBLE			2
++#define USBA_BK_NUMBER_TRIPLE			3
++
++/* Bit manipulation macros */
++#define USBA_BF(name, value)					\
++	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
++	 << USBA_##name##_OFFSET)
++#define USBA_BFEXT(name, value)					\
++	(((value) >> USBA_##name##_OFFSET)			\
++	 & ((1 << USBA_##name##_SIZE) - 1))
++#define USBA_BFINS(name, value, old)				\
++	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
++		    << USBA_##name##_OFFSET))			\
++	 | USBA_BF(name, value))
++
++/* Register access macros */
++#define usba_readl(udc, reg)					\
++	__raw_readl((udc)->regs + USBA_##reg)
++#define usba_writel(udc, reg, value)				\
++	__raw_writel((value), (udc)->regs + USBA_##reg)
++#define usba_ep_readl(ep, reg)					\
++	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
++#define usba_ep_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
++#define usba_dma_readl(ep, reg)					\
++	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
++#define usba_dma_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
++
++/* Calculate base address for a given endpoint or DMA controller */
++#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
++#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
++#define USBA_FIFO_BASE(x)	((x) << 16)
++
++/* Synth parameters */
++#define USBA_NR_ENDPOINTS	7
++
++#define EP0_FIFO_SIZE		64
++#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
++#define EP0_NR_BANKS		1
++
++/*
++ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to
++ * provide this information?
++ */
++#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++
++#define FIFO_IOMEM_ID	0
++#define CTRL_IOMEM_ID	1
++
++#ifdef DEBUG
++#define DBG_ERR		0x0001	/* report all error returns */
++#define DBG_HW		0x0002	/* debug hardware initialization */
++#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
++#define DBG_INT		0x0008	/* interrupts */
++#define DBG_BUS		0x0010	/* report changes in bus state */
++#define DBG_QUEUE	0x0020  /* debug request queue processing */
++#define DBG_FIFO	0x0040  /* debug FIFO contents */
++#define DBG_DMA		0x0080  /* debug DMA handling */
++#define DBG_REQ		0x0100	/* print out queued request length */
++#define DBG_ALL		0xffff
++#define DBG_NONE	0x0000
++
++#define DEBUG_LEVEL	(DBG_ERR)
++#define DBG(level, fmt, ...)					\
++	do {							\
++		if ((level) & DEBUG_LEVEL)			\
++			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
++	} while (0)
++#else
++#define DBG(level, fmt...)
++#endif
++
++enum usba_ctrl_state {
++	WAIT_FOR_SETUP,
++	DATA_STAGE_IN,
++	DATA_STAGE_OUT,
++	STATUS_STAGE_IN,
++	STATUS_STAGE_OUT,
++	STATUS_STAGE_ADDR,
++	STATUS_STAGE_TEST,
++};
++/*
++  EP_STATE_IDLE,
++  EP_STATE_SETUP,
++  EP_STATE_IN_DATA,
++  EP_STATE_OUT_DATA,
++  EP_STATE_SET_ADDR_STATUS,
++  EP_STATE_RX_STATUS,
++  EP_STATE_TX_STATUS,
++  EP_STATE_HALT,
++*/
++
++struct usba_dma_desc {
++	dma_addr_t next;
++	dma_addr_t addr;
++	u32 ctrl;
++};
++
++struct usba_ep {
++	int					state;
++	void __iomem				*ep_regs;
++	void __iomem				*dma_regs;
++	void __iomem				*fifo;
++	struct usb_ep				ep;
++	struct usba_udc				*udc;
++
++	struct list_head			queue;
++	const struct usb_endpoint_descriptor	*desc;
++
++	u16					fifo_size;
++	u8					nr_banks;
++	u8					index;
++	unsigned int				can_dma:1;
++	unsigned int				can_isoc:1;
++	unsigned int				is_isoc:1;
++	unsigned int				is_in:1;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	u32					last_dma_status;
++	struct dentry				*debugfs_dir;
++	struct dentry				*debugfs_queue;
++	struct dentry				*debugfs_dma_status;
++	struct dentry				*debugfs_state;
++#endif
++};
++
++struct usba_request {
++	struct usb_request			req;
++	struct list_head			queue;
++
++	u32					ctrl;
++
++	unsigned int				submitted:1;
++	unsigned int				last_transaction:1;
++	unsigned int				using_dma:1;
++	unsigned int				mapped:1;
++};
++
++struct usba_udc {
++	/* Protect hw registers from concurrent modifications */
++	spinlock_t lock;
++
++	void __iomem *regs;
++	void __iomem *fifo;
++
++	struct usb_gadget gadget;
++	struct usb_gadget_driver *driver;
++	struct platform_device *pdev;
++	int irq;
++	int vbus_pin;
++	struct clk *pclk;
++	struct clk *hclk;
++
++	int test_mode;
++	int vbus_prev;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	struct dentry *debugfs_root;
++	struct dentry *debugfs_regs;
++#endif
++};
++
++static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
++{
++	return container_of(ep, struct usba_ep, ep);
++}
++
++static inline struct usba_request *to_usba_req(struct usb_request *req)
++{
++	return container_of(req, struct usba_request, req);
++}
++
++static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
++{
++	return container_of(gadget, struct usba_udc, gadget);
++}
++
++#define ep_is_control(ep)	((ep)->index == 0)
++#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
++
++#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
+diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
+index 235b618..bb361ab 100644
+--- a/drivers/video/atmel_lcdfb.c
++++ b/drivers/video/atmel_lcdfb.c
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 2580f5f..b6f936a 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE
+ 	  To have support for your specific LCD panel you will have to
+ 	  select the proper drivers which depend on this option.
+ 
++config LCD_LTV350QV
++	tristate "Samsung LTV350QV LCD Panel"
++	depends on LCD_CLASS_DEVICE && SPI_MASTER
++	default n
++	help
++	  If you have a Samsung LTV350QV LCD panel, say y to include a
++	  power control driver for it.  The panel starts up in power
++	  off state, so you need this driver in order to see any
++	  output.
++
++	  The LTV350QV panel is present on all ATSTK1000 boards.
++
+ #
+ # Backlight
+ #
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index c6e2266..965a78b 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -1,6 +1,8 @@
+ # Backlight & LCD drivers
+ 
+ obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
++obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
++
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c
+new file mode 100644
+index 0000000..751dc53
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.c
+@@ -0,0 +1,339 @@
++/*
++ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/lcd.h>
++#include <linux/module.h>
++#include <linux/spi/spi.h>
++
++#include "ltv350qv.h"
++
++#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++
++struct ltv350qv {
++	struct spi_device	*spi;
++	u8			*buffer;
++	int			power;
++	struct lcd_device	*ld;
++};
++
++/*
++ * The power-on and power-off sequences are taken from the
++ * LTV350QV-F04 data sheet from Samsung. The register definitions are
++ * taken from the S6F2002 command list also from Samsung. Both
++ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
++ *
++ * There's still some voodoo going on here, but it's a lot better than
++ * in the first incarnation of the driver where all we had was the raw
++ * numbers from the initialization sequence.
++ */
++static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++{
++	struct spi_message msg;
++	struct spi_transfer index_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++	struct spi_transfer value_xfer = {
++		.len		= 3,
++	};
++
++	spi_message_init(&msg);
++
++	/* register index */
++	lcd->buffer[0] = LTV_OPC_INDEX;
++	lcd->buffer[1] = 0x00;
++	lcd->buffer[2] = reg & 0x7f;
++	index_xfer.tx_buf = lcd->buffer;
++	spi_message_add_tail(&index_xfer, &msg);
++
++	/* register value */
++	lcd->buffer[4] = LTV_OPC_DATA;
++	lcd->buffer[5] = val >> 8;
++	lcd->buffer[6] = val;
++	value_xfer.tx_buf = lcd->buffer + 4;
++	spi_message_add_tail(&value_xfer, &msg);
++
++	return spi_sync(lcd->spi, &msg);
++}
++
++/* The comments are taken straight from the data sheet */
++static int ltv350qv_power_on(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Power On Reset Display off State */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
++		goto err;
++	msleep(15);
++
++	/* Power Setting Function 1 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
++		goto err;
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
++		goto err_power1;
++
++	/* Power Setting Function 2 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			       | LTV_SUPPLY_CURRENT(5)))
++		goto err_power2;
++
++	msleep(55);
++
++	/* Instruction Setting */
++	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
++				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
++	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
++				  LTV_DS_SAME | LTV_CHS_480
++				  | LTV_DF_RGB | LTV_RGB_BGR);
++	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
++				  LTV_VSPL_ACTIVE_LOW
++				  | LTV_HSPL_ACTIVE_LOW
++				  | LTV_DPL_SAMPLE_RISING
++				  | LTV_EPL_ACTIVE_LOW
++				  | LTV_SS_RIGHT_TO_LEFT);
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
++	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
++	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
++	if (ret)
++		goto err_settings;
++
++	/* Wait more than 2 frames */
++	msleep(20);
++
++	/* Display On Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
++				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
++	if (ret)
++		goto err_disp_on;
++
++	/* Display should now be ON. Phew. */
++	return 0;
++
++err_disp_on:
++	/*
++	 * Try to recover. Error handling probably isn't very useful
++	 * at this point, just make a best effort to switch the panel
++	 * off.
++	 */
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			   | LTV_SUPPLY_CURRENT(5));
++	ltv350qv_write_reg(lcd, LTV_GATECTL2,
++			   LTV_NW_INV_1LINE | LTV_FWI(3));
++err_settings:
++err_power2:
++err_power1:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++	msleep(1);
++err:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++	return -EIO;
++}
++
++static int ltv350qv_power_off(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Display Off Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE
++				 | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++
++	/* Power down setting 1 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++
++	/* Wait at least 1 ms */
++	msleep(1);
++
++	/* Power down setting 2 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++
++	/*
++	 * No point in trying to recover here. If we can't switch the
++	 * panel off, what are we supposed to do other than inform the
++	 * user about the failure?
++	 */
++	if (ret)
++		return -EIO;
++
++	/* Display power should now be OFF */
++	return 0;
++}
++
++static int ltv350qv_power(struct ltv350qv *lcd, int power)
++{
++	int ret = 0;
++
++	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_on(lcd);
++	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_off(lcd);
++
++	if (!ret)
++		lcd->power = power;
++
++	return ret;
++}
++
++static int ltv350qv_set_power(struct lcd_device *ld, int power)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return ltv350qv_power(lcd, power);
++}
++
++static int ltv350qv_get_power(struct lcd_device *ld)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return lcd->power;
++}
++
++static struct lcd_ops ltv_ops = {
++	.get_power	= ltv350qv_get_power,
++	.set_power	= ltv350qv_set_power,
++};
++
++static int __devinit ltv350qv_probe(struct spi_device *spi)
++{
++	struct ltv350qv *lcd;
++	struct lcd_device *ld;
++	int ret;
++
++	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
++	if (!lcd)
++		return -ENOMEM;
++
++	lcd->spi = spi;
++	lcd->power = FB_BLANK_POWERDOWN;
++	lcd->buffer = kzalloc(8, GFP_KERNEL);
++
++	ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops);
++	if (IS_ERR(ld)) {
++		ret = PTR_ERR(ld);
++		goto out_free_lcd;
++	}
++	lcd->ld = ld;
++
++	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	if (ret)
++		goto out_unregister;
++
++	dev_set_drvdata(&spi->dev, lcd);
++
++	return 0;
++
++out_unregister:
++	lcd_device_unregister(ld);
++out_free_lcd:
++	kfree(lcd);
++	return ret;
++}
++
++static int __devexit ltv350qv_remove(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	lcd_device_unregister(lcd->ld);
++	kfree(lcd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int ltv350qv_suspend(struct spi_device *spi,
++			    pm_message_t state, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == SUSPEND_POWER_DOWN)
++		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++
++	return 0;
++}
++
++static int ltv350qv_resume(struct spi_device *spi, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == RESUME_POWER_ON)
++		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++
++	return 0;
++}
++#else
++#define ltv350qv_suspend	NULL
++#define ltv350qv_resume		NULL
++#endif
++
++/* Power down all displays on reboot, poweroff or halt */
++static void ltv350qv_shutdown(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++}
++
++static struct spi_driver ltv350qv_driver = {
++	.driver = {
++		.name		= "ltv350qv",
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++
++	.probe		= ltv350qv_probe,
++	.remove		= __devexit_p(ltv350qv_remove),
++	.shutdown	= ltv350qv_shutdown,
++	.suspend	= ltv350qv_suspend,
++	.resume		= ltv350qv_resume,
++};
++
++static int __init ltv350qv_init(void)
++{
++	return spi_register_driver(&ltv350qv_driver);
++}
++
++static void __exit ltv350qv_exit(void)
++{
++	spi_unregister_driver(&ltv350qv_driver);
++}
++module_init(ltv350qv_init);
++module_exit(ltv350qv_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h
+new file mode 100644
+index 0000000..189112e
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.h
+@@ -0,0 +1,95 @@
++/*
++ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LTV350QV_H
++#define __LTV350QV_H
++
++#define LTV_OPC_INDEX	0x74
++#define LTV_OPC_DATA	0x76
++
++#define LTV_ID		0x00		/* ID Read */
++#define LTV_IFCTL	0x01		/* Display Interface Control */
++#define LTV_DATACTL	0x02		/* Display Data Control */
++#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
++#define LTV_GATECTL1	0x04		/* Gate Control 1 */
++#define LTV_GATECTL2	0x05		/* Gate Control 2 */
++#define LTV_VBP		0x06		/* Vertical Back Porch */
++#define LTV_HBP		0x07		/* Horizontal Back Porch */
++#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
++#define LTV_PWRCTL1	0x09		/* Power Control 1 */
++#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
++#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
++
++/* Bit definitions for LTV_IFCTL */
++#define LTV_IM			(1 << 15)
++#define LTV_NMD			(1 << 14)
++#define LTV_SSMD		(1 << 13)
++#define LTV_REV			(1 <<  7)
++#define LTV_NL(x)		(((x) & 0x001f) << 0)
++
++/* Bit definitions for LTV_DATACTL */
++#define LTV_DS_SAME		(0 << 12)
++#define LTV_DS_D_TO_S		(1 << 12)
++#define LTV_DS_S_TO_D		(2 << 12)
++#define LTV_CHS_384		(0 <<  9)
++#define LTV_CHS_480		(1 <<  9)
++#define LTV_CHS_492		(2 <<  9)
++#define LTV_DF_RGB		(0 <<  6)
++#define LTV_DF_RGBX		(1 <<  6)
++#define LTV_DF_XRGB		(2 <<  6)
++#define LTV_RGB_RGB		(0 <<  2)
++#define LTV_RGB_BGR		(1 <<  2)
++#define LTV_RGB_GRB		(2 <<  2)
++#define LTV_RGB_RBG		(3 <<  2)
++
++/* Bit definitions for LTV_ENTRY_MODE */
++#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
++#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
++#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
++#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
++#define LTV_DPL_SAMPLE_RISING	(0 << 13)
++#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
++#define LTV_EPL_ACTIVE_LOW	(0 << 12)
++#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
++#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
++#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
++#define LTV_STB			(1 <<  1)
++
++/* Bit definitions for LTV_GATECTL1 */
++#define LTV_CLW(x)		(((x) & 0x0007) << 12)
++#define LTV_GAON		(1 <<  5)
++#define LTV_SDR			(1 <<  3)
++
++/* Bit definitions for LTV_GATECTL2 */
++#define LTV_NW_INV_FRAME	(0 << 14)
++#define LTV_NW_INV_1LINE	(1 << 14)
++#define LTV_NW_INV_2LINE	(2 << 14)
++#define LTV_DSC			(1 << 12)
++#define LTV_GIF			(1 <<  8)
++#define LTV_FHN			(1 <<  7)
++#define LTV_FTI(x)		(((x) & 0x0003) << 4)
++#define LTV_FWI(x)		(((x) & 0x0003) << 0)
++
++/* Bit definitions for LTV_SOTCTL */
++#define LTV_SDT(x)		(((x) & 0x0007) << 10)
++#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
++
++/* Bit definitions for LTV_PWRCTL1 */
++#define LTV_VCOM_DISABLE	(1 << 14)
++#define LTV_VCOMOUT_ENABLE	(1 << 11)
++#define LTV_POWER_ON		(1 <<  9)
++#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
++#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
++
++/* Bit definitions for LTV_PWRCTL2 */
++#define LTV_VCOML_ENABLE	(1 << 13)
++#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
++#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
++
++#endif /* __LTV350QV_H */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h
+deleted file mode 100644
+index 3914d7b..0000000
+--- a/include/asm-avr32/arch-at32ap/at32ap7000.h
++++ /dev/null
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h
+new file mode 100644
+index 0000000..99684d6
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap/at32ap700x.h
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 0215965..7aa1c29 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -6,6 +6,8 @@
+ 
+ #include <linux/types.h>
+ 
++#define GPIO_PIN_NONE	(-1)
++
+ /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
+ void at32_add_system_devices(void);
+ 
+@@ -31,11 +33,26 @@ struct spi_board_info;
+ struct platform_device *
+ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
+ struct atmel_lcdfb_info;
+ struct platform_device *
+ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ 		     unsigned long fbmem_start, unsigned long fbmem_len);
+ 
++struct usba_platform_data {
++	int vbus_pin;
++};
++struct platform_device *
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
++
++struct ide_platform_data {
++	u8      cs;
++};
++struct platform_device *
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -50,4 +67,26 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++struct platform_device *at32_add_device_ac97c(unsigned int id);
++struct platform_device *at32_add_device_abdac(unsigned int id);
++
++struct cf_platform_data {
++	int	detect_pin;
++	int	reset_pin;
++	int	vcc_pin;
++	int	ready_pin;
++	u8	cs;
++};
++struct platform_device *
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		struct cf_platform_data *data);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h
+index a762f42..0dc2026 100644
+--- a/include/asm-avr32/arch-at32ap/cpu.h
++++ b/include/asm-avr32/arch-at32ap/cpu.h
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h
+index ee59e40..4ec6abc 100644
+--- a/include/asm-avr32/arch-at32ap/io.h
++++ b/include/asm-avr32/arch-at32ap/io.h
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
+index 9930871..135e034 100644
+--- a/include/asm-avr32/arch-at32ap/portmux.h
++++ b/include/asm-avr32/arch-at32ap/portmux.h
+@@ -19,10 +19,23 @@
+ #define AT32_GPIOF_OUTPUT	0x00000002	/* (OUT) Enable output driver */
+ #define AT32_GPIOF_HIGH		0x00000004	/* (OUT) Set output high */
+ #define AT32_GPIOF_DEGLITCH	0x00000008	/* (IN) Filter glitches */
++#define AT32_GPIOF_MULTIDRV	0x00000010	/* Enable multidriver option */
+ 
+ void at32_select_periph(unsigned int pin, unsigned int periph,
+ 			unsigned long flags);
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
+index 07152b7..c98eea4 100644
+--- a/include/asm-avr32/arch-at32ap/smc.h
++++ b/include/asm-avr32/arch-at32ap/smc.h
+@@ -15,22 +15,50 @@
+ /*
+  * All timing parameters are in nanoseconds.
+  */
++struct smc_timing {
++	/* Delay from address valid to assertion of given strobe */
++	int ncs_read_setup;
++	int nrd_setup;
++	int ncs_write_setup;
++	int nwe_setup;
++
++	/* Pulse length of given strobe */
++	int ncs_read_pulse;
++	int nrd_pulse;
++	int ncs_write_pulse;
++	int nwe_pulse;
++
++	/* Total cycle length of given operation */
++	int read_cycle;
++	int write_cycle;
++
++	/* Minimal recovery times, will extend cycle if needed */
++	int ncs_read_recover;
++	int nrd_recover;
++	int ncs_write_recover;
++	int nwe_recover;
++};
++
++/*
++ * All timing parameters are in clock cycles.
++ */
+ struct smc_config {
++
+ 	/* Delay from address valid to assertion of given strobe */
+-	u16		ncs_read_setup;
+-	u16		nrd_setup;
+-	u16		ncs_write_setup;
+-	u16		nwe_setup;
++	u8		ncs_read_setup;
++	u8		nrd_setup;
++	u8		ncs_write_setup;
++	u8		nwe_setup;
+ 
+ 	/* Pulse length of given strobe */
+-	u16		ncs_read_pulse;
+-	u16		nrd_pulse;
+-	u16		ncs_write_pulse;
+-	u16		nwe_pulse;
++	u8		ncs_read_pulse;
++	u8		nrd_pulse;
++	u8		ncs_write_pulse;
++	u8		nwe_pulse;
+ 
+ 	/* Total cycle length of given operation */
+-	u16		read_cycle;
+-	u16		write_cycle;
++	u8		read_cycle;
++	u8		write_cycle;
+ 
+ 	/* Bus width in bytes */
+ 	u8		bus_width;
+@@ -76,6 +104,9 @@ struct smc_config {
+ 	unsigned int	tdf_mode:1;
+ };
+ 
++extern void smc_set_timing(struct smc_config *config,
++			   const struct smc_timing *timing);
++
+ extern int smc_set_configuration(int cs, const struct smc_config *config);
+ extern struct smc_config *smc_get_configuration(int cs);
+ 
+diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h
+new file mode 100644
+index 0000000..56a4965
+--- /dev/null
++++ b/include/asm-avr32/dma-controller.h
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
+index 21bb60b..81e3426 100644
+--- a/include/asm-avr32/dma-mapping.h
++++ b/include/asm-avr32/dma-mapping.h
+@@ -264,7 +264,11 @@ static inline void
+ dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ 			size_t size, enum dma_data_direction direction)
+ {
+-	dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+@@ -309,12 +313,11 @@ static inline void
+ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ 		    int nents, enum dma_data_direction direction)
+ {
+-	int i;
+-
+-	for (i = 0; i < nents; i++) {
+-		dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
+-			       sg[i].length, direction);
+-	}
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h
+index a8236ba..dc2d527 100644
+--- a/include/asm-avr32/system.h
++++ b/include/asm-avr32/system.h
+@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
+ 
+ extern void __xchg_called_with_bad_pointer(void);
+ 
+-#ifdef __CHECKER__
+-extern unsigned long __builtin_xchg(void *ptr, unsigned long x);
+-#endif
++static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
++{
++	u32 ret;
+ 
+-#define xchg_u32(val, m) __builtin_xchg((void *)m, val)
++	asm volatile("xchg %[ret], %[m], %[val]"
++			: [ret] "=&r"(ret), "=m"(*m)
++			: "m"(*m), [m] "r"(m), [val] "r"(val)
++			: "memory");
++	return ret;
++}
+ 
+ static inline unsigned long __xchg(unsigned long x,
+ 				       volatile void *ptr,
+diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
+index 3b4e35b..de09009 100644
+--- a/include/asm-avr32/unistd.h
++++ b/include/asm-avr32/unistd.h
+@@ -303,6 +303,19 @@
+ #ifdef __KERNEL__
+ #define NR_syscalls		282
+ 
++/* Old stuff */
++#define __IGNORE_uselib
++#define __IGNORE_mmap
++
++/* NUMA stuff */
++#define __IGNORE_mbind
++#define __IGNORE_get_mempolicy
++#define __IGNORE_set_mempolicy
++#define __IGNORE_migrate_pages
++#define __IGNORE_move_pages
++
++/* SMP stuff */
++#define __IGNORE_getcpu
+ 
+ #define __ARCH_WANT_IPC_PARSE_VERSION
+ #define __ARCH_WANT_STAT64
+diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
+new file mode 100644
+index 0000000..0602339
+--- /dev/null
++++ b/include/linux/atmel-ssc.h
+@@ -0,0 +1,312 @@
++#ifndef __INCLUDE_ATMEL_SSC_H
++#define __INCLUDE_ATMEL_SSC_H
++
++#include <linux/platform_device.h>
++#include <linux/list.h>
++
++struct ssc_device {
++	struct list_head	list;
++	void __iomem		*regs;
++	struct platform_device	*pdev;
++	struct clk		*clk;
++	int			user;
++	int			irq;
++};
++
++struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
++void ssc_free(struct ssc_device *ssc);
++
++/* SSC register offsets */
++
++/* SSC Control Register */
++#define SSC_CR				0x00000000
++#define SSC_CR_RXDIS_SIZE			 1
++#define SSC_CR_RXDIS_OFFSET			 1
++#define SSC_CR_RXEN_SIZE			 1
++#define SSC_CR_RXEN_OFFSET			 0
++#define SSC_CR_SWRST_SIZE			 1
++#define SSC_CR_SWRST_OFFSET			15
++#define SSC_CR_TXDIS_SIZE			 1
++#define SSC_CR_TXDIS_OFFSET			 9
++#define SSC_CR_TXEN_SIZE			 1
++#define SSC_CR_TXEN_OFFSET			 8
++
++/* SSC Clock Mode Register */
++#define SSC_CMR				0x00000004
++#define SSC_CMR_DIV_SIZE			12
++#define SSC_CMR_DIV_OFFSET			 0
++
++/* SSC Receive Clock Mode Register */
++#define SSC_RCMR			0x00000010
++#define SSC_RCMR_CKG_SIZE			 2
++#define SSC_RCMR_CKG_OFFSET			 6
++#define SSC_RCMR_CKI_SIZE			 1
++#define SSC_RCMR_CKI_OFFSET			 5
++#define SSC_RCMR_CKO_SIZE			 3
++#define SSC_RCMR_CKO_OFFSET			 2
++#define SSC_RCMR_CKS_SIZE			 2
++#define SSC_RCMR_CKS_OFFSET			 0
++#define SSC_RCMR_PERIOD_SIZE			 8
++#define SSC_RCMR_PERIOD_OFFSET			24
++#define SSC_RCMR_START_SIZE			 4
++#define SSC_RCMR_START_OFFSET			 8
++#define SSC_RCMR_STOP_SIZE			 1
++#define SSC_RCMR_STOP_OFFSET			12
++#define SSC_RCMR_STTDLY_SIZE			 8
++#define SSC_RCMR_STTDLY_OFFSET			16
++
++/* SSC Receive Frame Mode Register */
++#define SSC_RFMR			0x00000014
++#define SSC_RFMR_DATLEN_SIZE			 5
++#define SSC_RFMR_DATLEN_OFFSET			 0
++#define SSC_RFMR_DATNB_SIZE			 4
++#define SSC_RFMR_DATNB_OFFSET			 8
++#define SSC_RFMR_FSEDGE_SIZE			 1
++#define SSC_RFMR_FSEDGE_OFFSET			24
++#define SSC_RFMR_FSLEN_SIZE			 4
++#define SSC_RFMR_FSLEN_OFFSET			16
++#define SSC_RFMR_FSOS_SIZE			 4
++#define SSC_RFMR_FSOS_OFFSET			20
++#define SSC_RFMR_LOOP_SIZE			 1
++#define SSC_RFMR_LOOP_OFFSET			 5
++#define SSC_RFMR_MSBF_SIZE			 1
++#define SSC_RFMR_MSBF_OFFSET			 7
++
++/* SSC Transmit Clock Mode Register */
++#define SSC_TCMR			0x00000018
++#define SSC_TCMR_CKG_SIZE			 2
++#define SSC_TCMR_CKG_OFFSET			 6
++#define SSC_TCMR_CKI_SIZE			 1
++#define SSC_TCMR_CKI_OFFSET			 5
++#define SSC_TCMR_CKO_SIZE			 3
++#define SSC_TCMR_CKO_OFFSET			 2
++#define SSC_TCMR_CKS_SIZE			 2
++#define SSC_TCMR_CKS_OFFSET			 0
++#define SSC_TCMR_PERIOD_SIZE			 8
++#define SSC_TCMR_PERIOD_OFFSET			24
++#define SSC_TCMR_START_SIZE			 4
++#define SSC_TCMR_START_OFFSET			 8
++#define SSC_TCMR_STTDLY_SIZE			 8
++#define SSC_TCMR_STTDLY_OFFSET			16
++
++/* SSC Transmit Frame Mode Register */
++#define SSC_TFMR			0x0000001c
++#define SSC_TFMR_DATDEF_SIZE			 1
++#define SSC_TFMR_DATDEF_OFFSET			 5
++#define SSC_TFMR_DATLEN_SIZE			 5
++#define SSC_TFMR_DATLEN_OFFSET			 0
++#define SSC_TFMR_DATNB_SIZE			 4
++#define SSC_TFMR_DATNB_OFFSET			 8
++#define SSC_TFMR_FSDEN_SIZE			 1
++#define SSC_TFMR_FSDEN_OFFSET			23
++#define SSC_TFMR_FSEDGE_SIZE			 1
++#define SSC_TFMR_FSEDGE_OFFSET			24
++#define SSC_TFMR_FSLEN_SIZE			 4
++#define SSC_TFMR_FSLEN_OFFSET			16
++#define SSC_TFMR_FSOS_SIZE			 3
++#define SSC_TFMR_FSOS_OFFSET			20
++#define SSC_TFMR_MSBF_SIZE			 1
++#define SSC_TFMR_MSBF_OFFSET			 7
++
++/* SSC Receive Hold Register */
++#define SSC_RHR				0x00000020
++#define SSC_RHR_RDAT_SIZE			32
++#define SSC_RHR_RDAT_OFFSET			 0
++
++/* SSC Transmit Hold Register */
++#define SSC_THR				0x00000024
++#define SSC_THR_TDAT_SIZE			32
++#define SSC_THR_TDAT_OFFSET			 0
++
++/* SSC Receive Sync. Holding Register */
++#define SSC_RSHR			0x00000030
++#define SSC_RSHR_RSDAT_SIZE			16
++#define SSC_RSHR_RSDAT_OFFSET			 0
++
++/* SSC Transmit Sync. Holding Register */
++#define SSC_TSHR			0x00000034
++#define SSC_TSHR_TSDAT_SIZE			16
++#define SSC_TSHR_RSDAT_OFFSET			 0
++
++/* SSC Receive Compare 0 Register */
++#define SSC_RC0R			0x00000038
++#define SSC_RC0R_CP0_SIZE			16
++#define SSC_RC0R_CP0_OFFSET			 0
++
++/* SSC Receive Compare 1 Register */
++#define SSC_RC1R			0x0000003c
++#define SSC_RC1R_CP1_SIZE			16
++#define SSC_RC1R_CP1_OFFSET			 0
++
++/* SSC Status Register */
++#define SSC_SR				0x00000040
++#define SSC_SR_CP0_SIZE				 1
++#define SSC_SR_CP0_OFFSET			 8
++#define SSC_SR_CP1_SIZE				 1
++#define SSC_SR_CP1_OFFSET			 9
++#define SSC_SR_ENDRX_SIZE			 1
++#define SSC_SR_ENDRX_OFFSET			 6
++#define SSC_SR_ENDTX_SIZE			 1
++#define SSC_SR_ENDTX_OFFSET			 2
++#define SSC_SR_OVRUN_SIZE			 1
++#define SSC_SR_OVRUN_OFFSET			 5
++#define SSC_SR_RXBUFF_SIZE			 1
++#define SSC_SR_RXBUFF_OFFSET			 7
++#define SSC_SR_RXEN_SIZE			 1
++#define SSC_SR_RXEN_OFFSET			17
++#define SSC_SR_RXRDY_SIZE			 1
++#define SSC_SR_RXRDY_OFFSET			 4
++#define SSC_SR_RXSYN_SIZE			 1
++#define SSC_SR_RXSYN_OFFSET			11
++#define SSC_SR_TXBUFE_SIZE			 1
++#define SSC_SR_TXBUFE_OFFSET			 3
++#define SSC_SR_TXEMPTY_SIZE			 1
++#define SSC_SR_TXEMPTY_OFFSET			 1
++#define SSC_SR_TXEN_SIZE			 1
++#define SSC_SR_TXEN_OFFSET			16
++#define SSC_SR_TXRDY_SIZE			 1
++#define SSC_SR_TXRDY_OFFSET			 0
++#define SSC_SR_TXSYN_SIZE			 1
++#define SSC_SR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Enable Register */
++#define SSC_IER				0x00000044
++#define SSC_IER_CP0_SIZE			 1
++#define SSC_IER_CP0_OFFSET			 8
++#define SSC_IER_CP1_SIZE			 1
++#define SSC_IER_CP1_OFFSET			 9
++#define SSC_IER_ENDRX_SIZE			 1
++#define SSC_IER_ENDRX_OFFSET			 6
++#define SSC_IER_ENDTX_SIZE			 1
++#define SSC_IER_ENDTX_OFFSET			 2
++#define SSC_IER_OVRUN_SIZE			 1
++#define SSC_IER_OVRUN_OFFSET			 5
++#define SSC_IER_RXBUFF_SIZE			 1
++#define SSC_IER_RXBUFF_OFFSET			 7
++#define SSC_IER_RXRDY_SIZE			 1
++#define SSC_IER_RXRDY_OFFSET			 4
++#define SSC_IER_RXSYN_SIZE			 1
++#define SSC_IER_RXSYN_OFFSET			11
++#define SSC_IER_TXBUFE_SIZE			 1
++#define SSC_IER_TXBUFE_OFFSET			 3
++#define SSC_IER_TXEMPTY_SIZE			 1
++#define SSC_IER_TXEMPTY_OFFSET			 1
++#define SSC_IER_TXRDY_SIZE			 1
++#define SSC_IER_TXRDY_OFFSET			 0
++#define SSC_IER_TXSYN_SIZE			 1
++#define SSC_IER_TXSYN_OFFSET			10
++
++/* SSC Interrupt Disable Register */
++#define SSC_IDR				0x00000048
++#define SSC_IDR_CP0_SIZE			 1
++#define SSC_IDR_CP0_OFFSET			 8
++#define SSC_IDR_CP1_SIZE			 1
++#define SSC_IDR_CP1_OFFSET			 9
++#define SSC_IDR_ENDRX_SIZE			 1
++#define SSC_IDR_ENDRX_OFFSET			 6
++#define SSC_IDR_ENDTX_SIZE			 1
++#define SSC_IDR_ENDTX_OFFSET			 2
++#define SSC_IDR_OVRUN_SIZE			 1
++#define SSC_IDR_OVRUN_OFFSET			 5
++#define SSC_IDR_RXBUFF_SIZE			 1
++#define SSC_IDR_RXBUFF_OFFSET			 7
++#define SSC_IDR_RXRDY_SIZE			 1
++#define SSC_IDR_RXRDY_OFFSET			 4
++#define SSC_IDR_RXSYN_SIZE			 1
++#define SSC_IDR_RXSYN_OFFSET			11
++#define SSC_IDR_TXBUFE_SIZE			 1
++#define SSC_IDR_TXBUFE_OFFSET			 3
++#define SSC_IDR_TXEMPTY_SIZE			 1
++#define SSC_IDR_TXEMPTY_OFFSET			 1
++#define SSC_IDR_TXRDY_SIZE			 1
++#define SSC_IDR_TXRDY_OFFSET			 0
++#define SSC_IDR_TXSYN_SIZE			 1
++#define SSC_IDR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Mask Register */
++#define SSC_IMR				0x0000004c
++#define SSC_IMR_CP0_SIZE			 1
++#define SSC_IMR_CP0_OFFSET			 8
++#define SSC_IMR_CP1_SIZE			 1
++#define SSC_IMR_CP1_OFFSET			 9
++#define SSC_IMR_ENDRX_SIZE			 1
++#define SSC_IMR_ENDRX_OFFSET			 6
++#define SSC_IMR_ENDTX_SIZE			 1
++#define SSC_IMR_ENDTX_OFFSET			 2
++#define SSC_IMR_OVRUN_SIZE			 1
++#define SSC_IMR_OVRUN_OFFSET			 5
++#define SSC_IMR_RXBUFF_SIZE			 1
++#define SSC_IMR_RXBUFF_OFFSET			 7
++#define SSC_IMR_RXRDY_SIZE			 1
++#define SSC_IMR_RXRDY_OFFSET			 4
++#define SSC_IMR_RXSYN_SIZE			 1
++#define SSC_IMR_RXSYN_OFFSET			11
++#define SSC_IMR_TXBUFE_SIZE			 1
++#define SSC_IMR_TXBUFE_OFFSET			 3
++#define SSC_IMR_TXEMPTY_SIZE			 1
++#define SSC_IMR_TXEMPTY_OFFSET			 1
++#define SSC_IMR_TXRDY_SIZE			 1
++#define SSC_IMR_TXRDY_OFFSET			 0
++#define SSC_IMR_TXSYN_SIZE			 1
++#define SSC_IMR_TXSYN_OFFSET			10
++
++/* SSC PDC Receive Pointer Register */
++#define SSC_PDC_RPR			0x00000100
++
++/* SSC PDC Receive Counter Register */
++#define SSC_PDC_RCR			0x00000104
++
++/* SSC PDC Transmit Pointer Register */
++#define SSC_PDC_TPR			0x00000108
++
++/* SSC PDC Receive Next Pointer Register */
++#define SSC_PDC_RNPR			0x00000110
++
++/* SSC PDC Receive Next Counter Register */
++#define SSC_PDC_RNCR			0x00000114
++
++/* SSC PDC Transmit Counter Register */
++#define SSC_PDC_TCR			0x0000010c
++
++/* SSC PDC Transmit Next Pointer Register */
++#define SSC_PDC_TNPR			0x00000118
++
++/* SSC PDC Transmit Next Counter Register */
++#define SSC_PDC_TNCR			0x0000011c
++
++/* SSC PDC Transfer Control Register */
++#define SSC_PDC_PTCR			0x00000120
++#define SSC_PDC_PTCR_RXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_RXTDIS_OFFSET		 1
++#define SSC_PDC_PTCR_RXTEN_SIZE			 1
++#define SSC_PDC_PTCR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTCR_TXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_TXTDIS_OFFSET		 9
++#define SSC_PDC_PTCR_TXTEN_SIZE			 1
++#define SSC_PDC_PTCR_TXTEN_OFFSET		 8
++
++/* SSC PDC Transfer Status Register */
++#define SSC_PDC_PTSR			0x00000124
++#define SSC_PDC_PTSR_RXTEN_SIZE			 1
++#define SSC_PDC_PTSR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTSR_TXTEN_SIZE			 1
++#define SSC_PDC_PTSR_TXTEN_OFFSET		 8
++
++/* Bit manipulation macros */
++#define SSC_BIT(name)					\
++	(1 << SSC_##name##_OFFSET)
++#define SSC_BF(name, value)				\
++	(((value) & ((1 << SSC_##name##_SIZE) - 1))	\
++	 << SSC_##name##_OFFSET)
++#define SSC_BFEXT(name, value)				\
++	(((value) >> SSC_##name##_OFFSET)		\
++	 & ((1 << SSC_##name##_SIZE) - 1))
++#define SSC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << SSC_##name##_SIZE) - 1)	\
++	<< SSC_##name##_OFFSET)) | SSC_BF(name, value))
++
++/* Register access macros */
++#define ssc_readl(base, reg)		__raw_readl(base + SSC_##reg)
++#define ssc_writel(base, reg, value)	__raw_writel((value), base + SSC_##reg)
++
++#endif /* __INCLUDE_ATMEL_SSC_H */
+diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h
+new file mode 100644
+index 0000000..0f20a70
+--- /dev/null
++++ b/include/linux/spi/at73c213.h
+@@ -0,0 +1,25 @@
++/*
++ * Board-specific data used to set up AT73c213 audio DAC driver.
++ */
++
++#ifndef __LINUX_SPI_AT73C213_H
++#define __LINUX_SPI_AT73C213_H
++
++/**
++ * at73c213_board_info - how the external DAC is wired to the device.
++ *
++ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio.
++ * @dac_clk: the external clock used to provide master clock to the DAC.
++ * @shortname: a short discription for the DAC, seen by userspace tools.
++ *
++ * This struct contains the configuration of the hardware connection to the
++ * external DAC. The DAC needs a master clock and a I2S audio stream. It also
++ * provides a name which is used to identify it in userspace tools.
++ */
++struct at73c213_board_info {
++	int		ssc_id;
++	struct clk	*dac_clk;
++	char		shortname[32];
++};
++
++#endif /* __LINUX_SPI_AT73C213_H */
+diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h
+index c1d1629..5f38803 100644
+--- a/include/pcmcia/cs_types.h
++++ b/include/pcmcia/cs_types.h
+@@ -21,7 +21,7 @@
+ #include <sys/types.h>
+ #endif
+ 
+-#if defined(__arm__) || defined(__mips__)
++#if defined(__arm__) || defined(__mips__) || defined(__avr32__)
+ /* This (ioaddr_t) is exposed to userspace & hence cannot be changed. */
+ typedef u_int   ioaddr_t;
+ #else
+diff --git a/init/do_mounts.c b/init/do_mounts.c
+index 4efa1e5..0e88ed1 100644
+--- a/init/do_mounts.c
++++ b/init/do_mounts.c
+@@ -219,8 +219,14 @@ __setup("root=", root_dev_setup);
+ 
+ static int __init rootwait_setup(char *str)
+ {
+-	if (*str)
++	if (*str && *str != '=')
+ 		return 0;
++
++	if (*str)
++		printk(KERN_WARNING
++			"WARNING: \"rootwait=1\" is deprecated, "
++			"use \"rootwait\" instead.\n");
++
+ 	root_wait = 1;
+ 	return 1;
+ }
+diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
+index f7844f6..6631586 100755
+--- a/scripts/checkstack.pl
++++ b/scripts/checkstack.pl
+@@ -12,6 +12,7 @@
+ #	sh64 port by Paul Mundt
+ #	Random bits by Matt Mackall <mpm@selenic.com>
+ #	M68k port by Geert Uytterhoeven and Andreas Schwab
++#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
+ #
+ #	Usage:
+ #	objdump -d vmlinux | stackcheck.pl [arch]
+@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs);
+ 	if ($arch eq 'arm') {
+ 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
+ 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
++	} elsif ($arch eq 'avr32') {
++		#8000008a:       20 1d           sub sp,4
++		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
++		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
+ 	} elsif ($arch =~ /^i[3456]86$/) {
+ 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
+ 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
+diff --git a/sound/Kconfig b/sound/Kconfig
+index e48b9b3..29a9979 100644
+--- a/sound/Kconfig
++++ b/sound/Kconfig
+@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
++if SPI
++source "sound/spi/Kconfig"
++endif
++
+ source "sound/mips/Kconfig"
+ 
+ source "sound/sh/Kconfig"
+diff --git a/sound/Makefile b/sound/Makefile
+index 3ead922..e655df7 100644
+--- a/sound/Makefile
++++ b/sound/Makefile
+@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o
+ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/
++obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig
+new file mode 100644
+index 0000000..17d1d91
+--- /dev/null
++++ b/sound/avr32/Kconfig
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile
+new file mode 100644
+index 0000000..5d87d0e
+--- /dev/null
++++ b/sound/avr32/Makefile
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+new file mode 100644
+index 0000000..0ec0b1c
+--- /dev/null
++++ b/sound/avr32/ac97c.c
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h
+new file mode 100644
+index 0000000..96246e7
+--- /dev/null
++++ b/sound/avr32/ac97c.h
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
+index af37cd0..e3cc557 100644
+--- a/sound/oss/Kconfig
++++ b/sound/oss/Kconfig
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff --git a/sound/oss/Makefile b/sound/oss/Makefile
+index 1200670..fafc246 100644
+--- a/sound/oss/Makefile
++++ b/sound/oss/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o ad1848.o
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
+diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c
+new file mode 100644
+index 0000000..cb997d7
+--- /dev/null
++++ b/sound/oss/at32_abdac.c
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h
+new file mode 100644
+index 0000000..3c88e25
+--- /dev/null
++++ b/sound/oss/at32_abdac.h
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig
+new file mode 100644
+index 0000000..0d08c29
+--- /dev/null
++++ b/sound/spi/Kconfig
+@@ -0,0 +1,31 @@
++#SPI drivers
++
++menu "SPI devices"
++	depends on SND != n
++
++config SND_AT73C213
++	tristate "Atmel AT73C213 DAC driver"
++	depends on ATMEL_SSC
++	select SND_PCM
++	help
++	  Say Y here if you want to use the Atmel AT73C213 external DAC. This
++	  DAC can be found on Atmel development boards.
++
++	  This driver requires the Atmel SSC driver for sound sink, a
++	  peripheral found on most AT91 and AVR32 microprocessors.
++
++	  To compile this driver as a module, choose M here: the module will be
++	  called snd-at73c213.
++
++config SND_AT73C213_TARGET_BITRATE
++	int "Target bitrate for AT73C213"
++	depends on SND_AT73C213
++	default "48000"
++	range 8000 50000
++	help
++	  Sets the target bitrate for the bitrate calculator in the driver.
++	  Limited by hardware to be between 8000 Hz and 50000 Hz.
++
++	  Set to 48000 Hz by default.
++
++endmenu
+diff --git a/sound/spi/Makefile b/sound/spi/Makefile
+new file mode 100644
+index 0000000..026fb73
+--- /dev/null
++++ b/sound/spi/Makefile
+@@ -0,0 +1,5 @@
++# Makefile for SPI drivers
++
++snd-at73c213-objs		:= at73c213.o
++
++obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
+diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c
+new file mode 100644
+index 0000000..f514f47
+--- /dev/null
++++ b/sound/spi/at73c213.c
+@@ -0,0 +1,1121 @@
++/*
++ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
++ *
++ * Copyright (C) 2006-2007 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++
++/*#define DEBUG*/
++
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/initval.h>
++#include <sound/control.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++
++#include <linux/atmel-ssc.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
++
++#include "at73c213.h"
++
++#define BITRATE_MIN	 8000 /* Hardware limit? */
++#define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
++#define BITRATE_MAX	50000 /* Hardware limit. */
++
++/* Initial (hardware reset) AT73C213 register values. */
++static u8 snd_at73c213_original_image[18] =
++{
++	0x00,	/* 00 - CTRL    */
++	0x05,	/* 01 - LLIG    */
++	0x05,	/* 02 - RLIG    */
++	0x08,	/* 03 - LPMG    */
++	0x08,	/* 04 - RPMG    */
++	0x00,	/* 05 - LLOG    */
++	0x00,	/* 06 - RLOG    */
++	0x22,	/* 07 - OLC     */
++	0x09,	/* 08 - MC      */
++	0x00,	/* 09 - CSFC    */
++	0x00,	/* 0A - MISC    */
++	0x00,	/* 0B -         */
++	0x00,	/* 0C - PRECH   */
++	0x05,	/* 0D - AUXG    */
++	0x00,	/* 0E -         */
++	0x00,	/* 0F -         */
++	0x00,	/* 10 - RST     */
++	0x00,	/* 11 - PA_CTRL */
++};
++
++struct snd_at73c213 {
++	struct snd_card			*card;
++	struct snd_pcm			*pcm;
++	struct snd_pcm_substream	*substream;
++	struct at73c213_board_info	*board;
++	int				irq;
++	int				period;
++	unsigned long			bitrate;
++	struct clk			*bitclk;
++	struct ssc_device		*ssc;
++	struct spi_device		*spi;
++	u8				spi_wbuffer[2];
++	u8				spi_rbuffer[2];
++	/* Image of the SPI registers in AT73C213. */
++	u8				reg_image[18];
++	/* Protect registers against concurrent access. */
++	spinlock_t			lock;
++};
++
++#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
++
++static int
++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
++{
++	struct spi_message msg;
++	struct spi_transfer msg_xfer = {
++		.len		= 2,
++		.cs_change	= 0,
++	};
++	int retval;
++
++	spi_message_init(&msg);
++
++	chip->spi_wbuffer[0] = reg;
++	chip->spi_wbuffer[1] = val;
++
++	msg_xfer.tx_buf = chip->spi_wbuffer;
++	msg_xfer.rx_buf = chip->spi_rbuffer;
++	spi_message_add_tail(&msg_xfer, &msg);
++
++	retval = spi_sync(chip->spi, &msg);
++
++	if (!retval)
++		chip->reg_image[reg] = val;
++
++	return retval;
++}
++
++static struct snd_pcm_hardware snd_at73c213_playback_hw = {
++	.info		= SNDRV_PCM_INFO_INTERLEAVED |
++			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
++	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
++	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
++	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
++	.channels_min	= 2,
++	.channels_max	= 2,
++	.buffer_bytes_max = 64 * 1024 - 1,
++	.period_bytes_min = 512,
++	.period_bytes_max = 64 * 1024 - 1,
++	.periods_min	= 4,
++	.periods_max	= 1024,
++};
++
++/*
++ * Calculate and set bitrate and divisions.
++ */
++static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
++{
++	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
++	unsigned long dac_rate_new, ssc_div, status;
++	unsigned long ssc_div_max, ssc_div_min;
++	int max_tries;
++
++	/*
++	 * We connect two clocks here, picking divisors so the I2S clocks
++	 * out data at the same rate the DAC clocks it in ... and as close
++	 * as practical to the desired target rate.
++	 *
++	 * The DAC master clock (MCLK) is programmable, and is either 256
++	 * or (not here) 384 times the I2S output clock (BCLK).
++	 */
++
++	/* SSC clock / (bitrate * stereo * 16-bit). */
++	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
++	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
++	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
++	max_tries = (ssc_div_max - ssc_div_min) / 2;
++
++	if (max_tries < 1)
++		max_tries = 1;
++
++	/* ssc_div must be a power of 2. */
++	ssc_div = (ssc_div + 1) & ~1UL;
++
++	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
++		ssc_div -= 2;
++		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
++			return -ENXIO;
++	}
++
++	/* Search for a possible bitrate. */
++	do {
++		/* SSC clock / (ssc divider * 16-bit * stereo). */
++		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
++			return -ENXIO;
++
++		/* 256 / (2 * 16) = 8 */
++		dac_rate_new = 8 * (ssc_rate / ssc_div);
++
++		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
++		if (status < 0)
++			return status;
++
++		/* Ignore difference smaller than 256 Hz. */
++		if ((status/256) == (dac_rate_new/256))
++			goto set_rate;
++
++		ssc_div += 2;
++	} while (--max_tries);
++
++	/* Not able to find a valid bitrate. */
++	return -ENXIO;
++
++set_rate:
++	status = clk_set_rate(chip->board->dac_clk, status);
++	if (status < 0)
++		return status;
++
++	/* Set divider in SSC device. */
++	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
++
++	/* SSC clock / (ssc divider * 16-bit * stereo). */
++	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
++
++	dev_info(&chip->spi->dev,
++			"at73c213: supported bitrate is %lu (%lu divider)\n",
++			chip->bitrate, ssc_div);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	snd_at73c213_playback_hw.rate_min = chip->bitrate;
++	snd_at73c213_playback_hw.rate_max = chip->bitrate;
++	runtime->hw = snd_at73c213_playback_hw;
++	chip->substream = substream;
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	chip->substream = NULL;
++	return 0;
++}
++
++static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
++				 struct snd_pcm_hw_params *hw_params)
++{
++	return snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++}
++
++static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size;
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++
++	chip->period = 0;
++
++	ssc_writel(chip->ssc->regs, PDC_TPR,
++			(long)runtime->dma_addr);
++	ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2);
++	ssc_writel(chip->ssc->regs, PDC_TNPR,
++			(long)runtime->dma_addr + block_size);
++	ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
++				   int cmd)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	int retval = 0;
++
++	spin_lock(&chip->lock);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
++		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
++		break;
++	default:
++		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
++		retval = -EINVAL;
++		break;
++	}
++
++	spin_unlock(&chip->lock);
++
++	return retval;
++}
++
++static snd_pcm_uframes_t
++snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
++		- (unsigned long)runtime->dma_addr;
++
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++static struct snd_pcm_ops at73c213_playback_ops = {
++	.open		= snd_at73c213_pcm_open,
++	.close		= snd_at73c213_pcm_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_at73c213_pcm_hw_params,
++	.hw_free	= snd_at73c213_pcm_hw_free,
++	.prepare	= snd_at73c213_pcm_prepare,
++	.trigger	= snd_at73c213_pcm_trigger,
++	.pointer	= snd_at73c213_pcm_pointer,
++};
++
++static void snd_at73c213_pcm_free(struct snd_pcm *pcm)
++{
++	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
++	if (chip->pcm) {
++		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
++		chip->pcm = NULL;
++	}
++}
++
++static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
++{
++	struct snd_pcm *pcm;
++	int retval;
++
++	retval = snd_pcm_new(chip->card, chip->card->shortname,
++			device, 1, 0, &pcm);
++	if (retval < 0)
++		goto out;
++
++	pcm->private_data = chip;
++	pcm->private_free = snd_at73c213_pcm_free;
++	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
++	strcpy(pcm->name, "at73c213");
++	chip->pcm = pcm;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
++
++	retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm,
++			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
++			64 * 1024, 64 * 1024);
++out:
++	return retval;
++}
++
++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
++{
++	struct snd_at73c213 *chip = dev_id;
++	struct snd_pcm_runtime *runtime = chip->substream->runtime;
++	u32 status;
++	int offset;
++	int block_size;
++	int next_period;
++	int retval = IRQ_NONE;
++
++	spin_lock(&chip->lock);
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++	status = ssc_readl(chip->ssc->regs, IMR);
++
++	if (status & SSC_BIT(IMR_ENDTX)) {
++		chip->period++;
++		if (chip->period == runtime->periods)
++			chip->period = 0;
++		next_period = chip->period + 1;
++		if (next_period == runtime->periods)
++			next_period = 0;
++
++		offset = block_size * next_period;
++
++		ssc_writel(chip->ssc->regs, PDC_TNPR,
++				(long)runtime->dma_addr + offset);
++		ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++		retval = IRQ_HANDLED;
++	}
++
++	ssc_readl(chip->ssc->regs, IMR);
++	spin_unlock(&chip->lock);
++
++	if (status & SSC_BIT(IMR_ENDTX))
++		snd_pcm_period_elapsed(chip->substream);
++
++	return retval;
++}
++
++/*
++ * Mixer functions.
++ */
++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	val = (ucontrol->value.integer.value[0] & mask);
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
++	change = val != chip->reg_image[reg];
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++
++	if (mask == 1)
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	else
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++
++	uinfo->count = 2;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] =
++		(chip->reg_image[left_reg] >> shift_left) & mask;
++	ucontrol->value.integer.value[1] =
++		(chip->reg_image[right_reg] >> shift_right) & mask;
++
++	if (invert) {
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++		ucontrol->value.integer.value[1] =
++			(mask - ucontrol->value.integer.value[1]);
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++	int change, retval;
++	unsigned short val1, val2;
++
++	val1 = ucontrol->value.integer.value[0] & mask;
++	val2 = ucontrol->value.integer.value[1] & mask;
++	if (invert) {
++		val1 = mask - val1;
++		val2 = mask - val2;
++	}
++	val1 <<= shift_left;
++	val2 <<= shift_right;
++
++	spin_lock_irq(&chip->lock);
++
++	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
++	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
++	change = val1 != chip->reg_image[left_reg]
++		|| val2 != chip->reg_image[right_reg];
++	retval = snd_at73c213_write_reg(chip, left_reg, val1);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++	retval = snd_at73c213_write_reg(chip, right_reg, val2);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(0x01 - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	if (ucontrol->value.integer.value[0])
++		val = mask;
++	else
++		val = 0;
++
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val |= (chip->reg_image[reg] & ~(mask << shift));
++	change = val != chip->reg_image[reg];
++
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
++
++	return 0;
++}
++
++static int snd_at73c213_line_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++static int snd_at73c213_aux_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
++}
++
++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_mono_switch_info,				\
++	.get = snd_at73c213_mono_switch_get,				\
++	.put = snd_at73c213_mono_switch_put,				\
++	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
++}
++
++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_stereo_info,				\
++	.get = snd_at73c213_stereo_get,					\
++	.put = snd_at73c213_stereo_put,					\
++	.private_value = (left_reg | (right_reg << 8)			\
++			| (shift_left << 16) | (shift_right << 19)	\
++			| (mask << 24) | (invert << 22))		\
++}
++
++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "PA Playback Volume",
++	.index	= 0,
++	.info	= snd_at73c213_pa_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Aux Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_aux_capture_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Line Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_line_capture_volume_info,
++	.get	= snd_at73c213_stereo_get,
++	.put	= snd_at73c213_stereo_put,
++	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
++		| (0x1f << 24) | (1 << 22),
++},
++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
++};
++
++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
++{
++	struct snd_card *card;
++	int errval, idx;
++
++	if (chip == NULL || chip->pcm == NULL)
++		return -EINVAL;
++
++	card = chip->card;
++
++	strcpy(card->mixername, chip->pcm->name);
++
++	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
++		errval = snd_ctl_add(card,
++				snd_ctl_new1(&snd_at73c213_controls[idx],
++					chip));
++		if (errval < 0)
++			goto cleanup;
++	}
++
++	return 0;
++
++cleanup:
++	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
++		struct snd_kcontrol *kctl;
++		kctl = snd_ctl_find_numid(card, idx);
++		if (kctl)
++			snd_ctl_remove(card, kctl);
++	}
++	return errval;
++}
++
++/*
++ * Device functions
++ */
++static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
++{
++	/*
++	 * Continuous clock output.
++	 * Starts on falling TF.
++	 * Delay 1 cycle (1 bit).
++	 * Periode is 16 bit (16 - 1).
++	 */
++	ssc_writel(chip->ssc->regs, TCMR,
++			SSC_BF(TCMR_CKO, 1)
++			| SSC_BF(TCMR_START, 4)
++			| SSC_BF(TCMR_STTDLY, 1)
++			| SSC_BF(TCMR_PERIOD, 16 - 1));
++	/*
++	 * Data length is 16 bit (16 - 1).
++	 * Transmit MSB first.
++	 * Transmit 2 words each transfer.
++	 * Frame sync length is 16 bit (16 - 1).
++	 * Frame starts on negative pulse.
++	 */
++	ssc_writel(chip->ssc->regs, TFMR,
++			SSC_BF(TFMR_DATLEN, 16 - 1)
++			| SSC_BIT(TFMR_MSBF)
++			| SSC_BF(TFMR_DATNB, 1)
++			| SSC_BF(TFMR_FSLEN, 16 - 1)
++			| SSC_BF(TFMR_FSOS, 1));
++
++	return 0;
++}
++
++static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
++{
++	int retval;
++	unsigned char dac_ctrl = 0;
++
++	retval = snd_at73c213_set_bitrate(chip);
++	if (retval)
++		goto out;
++
++	/* Enable DAC master clock. */
++	clk_enable(chip->board->dac_clk);
++
++	/* Initialize at73c213 on SPI bus. */
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
++	if (retval)
++		goto out_clk;
++	msleep(1);
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
++	if (retval)
++		goto out_clk;
++
++	/* Precharge everything. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
++			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
++	if (retval)
++		goto out_clk;
++
++	msleep(50);
++
++	/* Stop precharging PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL,
++			(1<<PA_CTRL_APALP) | 0x0f);
++	if (retval)
++		goto out_clk;
++
++	msleep(450);
++
++	/* Stop precharging DAC, turn on master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
++	if (retval)
++		goto out_clk;
++
++	msleep(1);
++
++	/* Turn on DAC. */
++	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
++		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
++
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
++	if (retval)
++		goto out_clk;
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out_clk;
++
++	/* Enable I2S device, i.e. clock output. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	goto out;
++
++out_clk:
++	clk_disable(chip->board->dac_clk);
++out:
++	return retval;
++}
++
++static int snd_at73c213_dev_free(struct snd_device *device)
++{
++	struct snd_at73c213 *chip = device->device_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	if (chip->irq >= 0) {
++		free_irq(chip->irq, chip);
++		chip->irq = -1;
++	}
++
++	return 0;
++}
++
++static int __devinit snd_at73c213_dev_init(struct snd_card *card,
++					 struct spi_device *spi)
++{
++	static struct snd_device_ops ops = {
++		.dev_free	= snd_at73c213_dev_free,
++	};
++	struct snd_at73c213 *chip = get_chip(card);
++	int irq, retval;
++
++	irq = chip->ssc->irq;
++	if (irq < 0)
++		return irq;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->irq = -1;
++
++	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
++	if (retval) {
++		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
++		goto out;
++	}
++	chip->irq = irq;
++
++	memcpy(&chip->reg_image, &snd_at73c213_original_image,
++			sizeof(snd_at73c213_original_image));
++
++	retval = snd_at73c213_ssc_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_chip_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_pcm_new(chip, 0);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_mixer(chip);
++	if (retval)
++		goto out_snd_dev;
++
++	snd_card_set_dev(card, &spi->dev);
++
++	goto out;
++
++out_snd_dev:
++	snd_device_free(card, chip);
++out_irq:
++	free_irq(chip->irq, chip);
++	chip->irq = -1;
++out:
++	return retval;
++}
++
++static int snd_at73c213_probe(struct spi_device *spi)
++{
++	struct snd_card			*card;
++	struct snd_at73c213		*chip;
++	struct at73c213_board_info	*board;
++	int				retval;
++	char				id[16];
++
++	board = spi->dev.platform_data;
++	if (!board) {
++		dev_dbg(&spi->dev, "no platform_data\n");
++		return -ENXIO;
++	}
++
++	if (!board->dac_clk) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return -ENXIO;
++	}
++
++	if (IS_ERR(board->dac_clk)) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return PTR_ERR(board->dac_clk);
++	}
++
++	retval = -ENOMEM;
++
++	/* Allocate "card" using some unused identifiers. */
++	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
++	card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
++	if (!card)
++		goto out;
++
++	chip = card->private_data;
++	chip->spi = spi;
++	chip->board = board;
++
++	chip->ssc = ssc_request(board->ssc_id);
++	if (IS_ERR(chip->ssc)) {
++		dev_dbg(&spi->dev, "could not get ssc%d device\n",
++				board->ssc_id);
++		retval = PTR_ERR(chip->ssc);
++		goto out_card;
++	}
++
++	retval = snd_at73c213_dev_init(card, spi);
++	if (retval)
++		goto out_ssc;
++
++	strcpy(card->driver, "at73c213");
++	strcpy(card->shortname, board->shortname);
++	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
++
++	retval = snd_card_register(card);
++	if (retval)
++		goto out_ssc;
++
++	dev_set_drvdata(&spi->dev, card);
++
++	goto out;
++
++out_ssc:
++	ssc_free(chip->ssc);
++out_card:
++	snd_card_free(card);
++out:
++	return retval;
++}
++
++static int __devexit snd_at73c213_remove(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++	int retval;
++
++	/* Stop playback. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out;
++
++	/* Turn off PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f));
++	if (retval)
++		goto out;
++	msleep(10);
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f);
++	if (retval)
++		goto out;
++
++	/* Turn off external DAC. */
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
++	if (retval)
++		goto out;
++	msleep(2);
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
++	if (retval)
++		goto out;
++
++	/* Turn off master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
++	if (retval)
++		goto out;
++
++out:
++	/* Stop DAC master clock. */
++	clk_disable(chip->board->dac_clk);
++
++	ssc_free(chip->ssc);
++	snd_card_free(card);
++	dev_set_drvdata(&spi->dev, NULL);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	clk_disable(chip->board->dac_clk);
++
++	return 0;
++}
++
++static int snd_at73c213_resume(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	clk_enable(chip->board->dac_clk);
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	return 0;
++}
++#else
++#define snd_at73c213_suspend NULL
++#define snd_at73c213_resume NULL
++#endif
++
++static struct spi_driver at73c213_driver = {
++	.driver		= {
++		.name	= "at73c213",
++	},
++	.probe		= snd_at73c213_probe,
++	.suspend	= snd_at73c213_suspend,
++	.resume		= snd_at73c213_resume,
++	.remove		= __devexit_p(snd_at73c213_remove),
++};
++
++static int __init at73c213_init(void)
++{
++	return spi_register_driver(&at73c213_driver);
++}
++module_init(at73c213_init);
++
++static void __exit at73c213_exit(void)
++{
++	spi_unregister_driver(&at73c213_driver);
++}
++module_exit(at73c213_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h
+new file mode 100644
+index 0000000..fd8b372
+--- /dev/null
++++ b/sound/spi/at73c213.h
+@@ -0,0 +1,119 @@
++/*
++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 - 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++
++#ifndef _SND_AT73C213_H
++#define _SND_AT73C213_H
++
++/* DAC control register */
++#define DAC_CTRL		0x00
++#define DAC_CTRL_ONPADRV	7
++#define DAC_CTRL_ONAUXIN	6
++#define DAC_CTRL_ONDACR		5
++#define DAC_CTRL_ONDACL		4
++#define DAC_CTRL_ONLNOR		3
++#define DAC_CTRL_ONLNOL		2
++#define DAC_CTRL_ONLNIR		1
++#define DAC_CTRL_ONLNIL		0
++
++/* DAC left line in gain register */
++#define DAC_LLIG		0x01
++#define DAC_LLIG_LLIG		0
++
++/* DAC right line in gain register */
++#define DAC_RLIG		0x02
++#define DAC_RLIG_RLIG		0
++
++/* DAC Left Master Playback Gain Register */
++#define DAC_LMPG		0x03
++#define DAC_LMPG_LMPG		0
++
++/* DAC Right Master Playback Gain Register */
++#define DAC_RMPG		0x04
++#define DAC_RMPG_RMPG		0
++
++/* DAC Left Line Out Gain Register */
++#define DAC_LLOG		0x05
++#define DAC_LLOG_LLOG		0
++
++/* DAC Right Line Out Gain Register */
++#define DAC_RLOG		0x06
++#define DAC_RLOG_RLOG		0
++
++/* DAC Output Level Control Register */
++#define DAC_OLC			0x07
++#define DAC_OLC_RSHORT		7
++#define DAC_OLC_ROLC		4
++#define DAC_OLC_LSHORT		3
++#define DAC_OLC_LOLC		0
++
++/* DAC Mixer Control Register */
++#define DAC_MC			0x08
++#define DAC_MC_INVR		5
++#define DAC_MC_INVL		4
++#define DAC_MC_RMSMIN2		3
++#define DAC_MC_RMSMIN1		2
++#define DAC_MC_LMSMIN2		1
++#define DAC_MC_LMSMIN1		0
++
++/* DAC Clock and Sampling Frequency Control Register */
++#define DAC_CSFC		0x09
++#define DAC_CSFC_OVRSEL		4
++
++/* DAC Miscellaneous Register */
++#define DAC_MISC		0x0A
++#define DAC_MISC_VCMCAPSEL	7
++#define DAC_MISC_DINTSEL	4
++#define DAC_MISC_DITHEN		3
++#define DAC_MISC_DEEMPEN	2
++#define DAC_MISC_NBITS		0
++
++/* DAC Precharge Control Register */
++#define DAC_PRECH		0x0C
++#define DAC_PRECH_PRCHGPDRV	7
++#define DAC_PRECH_PRCHGAUX1	6
++#define DAC_PRECH_PRCHGLNOR	5
++#define DAC_PRECH_PRCHGLNOL	4
++#define DAC_PRECH_PRCHGLNIR	3
++#define DAC_PRECH_PRCHGLNIL	2
++#define DAC_PRECH_PRCHG		1
++#define DAC_PRECH_ONMSTR	0
++
++/* DAC Auxiliary Input Gain Control Register */
++#define DAC_AUXG		0x0D
++#define DAC_AUXG_AUXG		0
++
++/* DAC Reset Register */
++#define DAC_RST			0x10
++#define DAC_RST_RESMASK		2
++#define DAC_RST_RESFILZ		1
++#define DAC_RST_RSTZ		0
++
++/* Power Amplifier Control Register */
++#define PA_CTRL			0x11
++#define PA_CTRL_APAON		6
++#define PA_CTRL_APAPRECH	5
++#define PA_CTRL_APALP		4
++#define PA_CTRL_APAGAIN		0
++
++#endif /* _SND_AT73C213_H */
diff --git a/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-200-gpio_mouse-setup-for-atstk1000-board.patch b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-200-gpio_mouse-setup-for-atstk1000-board.patch
new file mode 100644
index 000000000..365ee494d
--- /dev/null
+++ b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-200-gpio_mouse-setup-for-atstk1000-board.patch
@@ -0,0 +1,130 @@
+>From 9c5fa914202d20756c56e0c4fd76035ed8f8ced8 Mon Sep 17 00:00:00 2001
+From: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
+Date: Mon, 6 Aug 2007 08:31:14 +0200
+Subject: [PATCH 1/1] Add gpio_mouse board setup to atstk1000 board
+
+This patch adds a gpio_mouse_platform_data to the atstk1000 board code and
+registers a gpio_mouse platform_device. This will enable a GPIO mouse on header
+J1 on GPIO of the ATSTK1000 development kit. The board code is enabled/disabled
+in menuconfig.
+
+By connecting J1 (GPIO) to J25 (SWITCH) you can use the following keys to
+simulate a mouse:
+
+SW0: right
+SW1: down
+SW2: up
+SW3: left
+SW5: right button
+SW6: middle button
+SW7: left button
+
+Signed-off-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
+---
+ arch/avr32/boards/atstk1000/Kconfig     |   16 ++++++++++
+ arch/avr32/boards/atstk1000/atstk1002.c |   48 +++++++++++++++++++++++++++++++
+ 2 files changed, 64 insertions(+), 0 deletions(-)
+
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 718578f..d99d4bd 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -52,6 +52,22 @@ config BOARD_ATSTK100X_SPI1
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
++config BOARD_ATSTK1002_GPIO_MOUSE
++	bool "Configure gpio_mouse on GPIO J1 header"
++	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	help
++	  Enable gpio_mouse board configuration on GPIO 0 to 7. Connecting a
++	  10-pin flat cable from J1 (GPIO) to J25 (SWITCH) will let a user give
++	  mouse inputs using the the switches SW0 to SW7.
++
++	  SW0: right
++	  SW1: down
++	  SW2: up
++	  SW3: left
++	  SW5: right button
++	  SW6: middle button
++	  SW7: left button
++
+ config BOARD_ATSTK1000_J2_LED
+ 	bool
+ 	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index c958fd4..c7560e5 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -16,6 +16,7 @@
+ #include <linux/types.h>
+ #include <linux/spi/spi.h>
+ #include <linux/spi/at73c213.h>
++#include <linux/gpio_mouse.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+@@ -100,6 +101,49 @@ static struct mci_platform_data __initdata mci0_data = {
+ 	.cs		= 4,
+ };
+ 
++#ifdef CONFIG_BOARD_ATSTK1002_GPIO_MOUSE
++static struct gpio_mouse_platform_data gpio_mouse0_data = {
++	.polarity	= GPIO_MOUSE_POLARITY_ACT_LOW,
++	{
++		{
++			.up		= GPIO_PIN_PB(2),
++			.down		= GPIO_PIN_PB(1),
++			.left		= GPIO_PIN_PB(3),
++			.right		= GPIO_PIN_PB(0),
++			.bleft		= GPIO_PIN_PB(7),
++			.bmiddle	= GPIO_PIN_PB(6),
++			.bright		= GPIO_PIN_PB(5),
++		},
++	},
++	.scan_ms	= 10,
++};
++
++static struct platform_device gpio_mouse0_device = {
++	.name		= "gpio_mouse",
++	.id		= 0,
++	.dev		= {
++		.platform_data = &gpio_mouse0_data,
++	},
++};
++
++static void __init add_device_gpio_mouse0(void)
++{
++	struct platform_device *pdev = &gpio_mouse0_device;
++	struct gpio_mouse_platform_data *data = pdev->dev.platform_data;
++
++	at32_select_gpio(data->up, 0);
++	at32_select_gpio(data->down, 0);
++	at32_select_gpio(data->left, 0);
++	at32_select_gpio(data->right, 0);
++
++	at32_select_gpio(data->bleft, 0);
++	at32_select_gpio(data->bmiddle, 0);
++	at32_select_gpio(data->bright, 0);
++
++	platform_device_register(pdev);
++}
++#endif
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -269,6 +313,10 @@ static int __init atstk1002_init(void)
+ 	atstk1000_setup_j2_leds();
+ 	atstk1002_setup_extdac();
+ 
++#ifdef CONFIG_BOARD_ATSTK1002_GPIO_MOUSE
++	add_device_gpio_mouse0();
++#endif
++
+ 	return 0;
+ }
+ postcore_initcall(atstk1002_init);
+-- 
+1.5.2.3
+
diff --git a/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.24-100-avr32-git.1.patch b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
new file mode 100644
index 000000000..173000063
--- /dev/null
+++ b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.24-100-avr32-git.1.patch
@@ -0,0 +1,16922 @@
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9261_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9261_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PB27, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PB28, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c
+--- linux-2.6.24/arch/arm/mach-at91/at91sam9rl_devices.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/arm/mach-at91/at91sam9rl_devices.c	2008-02-01 14:51:35.000000000 -0500
+@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct 
+ 	at91_set_B_periph(AT91_PIN_PC24, 0);	/* LCDD22 */
+ 	at91_set_B_periph(AT91_PIN_PC25, 0);	/* LCDD23 */
+ 
++#ifdef CONFIG_FB_INTSRAM
++	{
++		void __iomem *fb;
++		struct resource *fb_res = &lcdc_resources[2];
++		size_t fb_len = fb_res->end - fb_res->start + 1;
++
++		fb = ioremap_writecombine(fb_res->start, fb_len);
++		if (fb) {
++			memset(fb, 0, fb_len);
++			iounmap(fb, fb_len);
++		}
++	}
++#endif
++
+ 	lcdc_data = *data;
+ 	platform_device_register(&at91_lcdc_device);
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/Kconfig linux-avr32/arch/avr32/boards/atngw100/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atngw100/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,12 @@
++# NGW100 customization
++
++config BOARD_ATNGW100_I2C_GPIO
++	bool "Use GPIO for i2c instead of built-in TWI module"
++	help
++	  The driver for the built-in TWI module has been plagued by
++	  various problems, while the i2c-gpio driver is based on the
++	  trusty old i2c-algo-bit bitbanging engine, making it work
++	  on pretty much any setup.
++
++	  Choose 'Y' here if you're having i2c-related problems and
++	  want to rule out the i2c bus driver.
+diff -Nrup linux-2.6.24/arch/avr32/boards/atngw100/setup.c linux-avr32/arch/avr32/boards/atngw100/setup.c
+--- linux-2.6.24/arch/avr32/boards/atngw100/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atngw100/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -20,7 +20,7 @@
+ #include <asm/io.h>
+ #include <asm/setup.h>
+ 
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_
+ 	},
+ };
+ 
++static struct mci_platform_data __initdata mci0_data = {
++	.detect_pin	= GPIO_PIN_PC(25),
++	.wp_pin		= GPIO_PIN_PE(0),
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_l
+ 	}
+ };
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+ 	.sda_pin		= GPIO_PIN_PA(6),
+ 	.scl_pin		= GPIO_PIN_PA(7),
+@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_d
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
++#endif
+ 
+ static int __init atngw100_init(void)
+ {
+@@ -157,6 +164,7 @@ static int __init atngw100_init(void)
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ 
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+@@ -165,11 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
++#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
+ 	at32_select_gpio(i2c_gpio_data.sda_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	at32_select_gpio(i2c_gpio_data.scl_pin,
+ 		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
++#else
++	at32_add_device_twi(0);
++#endif
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1000.h	2008-02-01 14:51:35.000000000 -0500
+@@ -12,4 +12,6 @@
+ 
+ extern struct atmel_lcdfb_info atstk1000_lcdc_data;
+ 
++void atstk1000_setup_j2_leds(void);
++
+ #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1002.c	2008-02-01 14:51:35.000000000 -0500
+@@ -11,7 +11,6 @@
+ #include <linux/etherdevice.h>
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+-#include <linux/leds.h>
+ #include <linux/platform_device.h>
+ #include <linux/string.h>
+ #include <linux/types.h>
+@@ -22,7 +21,7 @@
+ 
+ #include <asm/io.h>
+ #include <asm/setup.h>
+-#include <asm/arch/at32ap7000.h>
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
+ #include <asm/arch/init.h>
+ #include <asm/arch/portmux.h>
+@@ -49,18 +48,16 @@ static struct eth_platform_data __initda
+ 	},
+ };
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static struct at73c213_board_info at73c213_data = {
+ 	.ssc_id		= 0,
+ 	.shortname	= "AVR32 STK1000 external DAC",
+ };
+ #endif
+-#endif
+ 
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ static struct spi_board_info spi0_board_info[] __initdata = {
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ 	{
+ 		/* AT73C213 */
+ 		.modalias	= "at73c213",
+@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_
+ };
+ #endif
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ static struct spi_board_info spi1_board_info[] __initdata = { {
+ 	/* patch in custom entries here */
+ } };
+ #endif
+ 
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
+ /*
+  * The next two functions should go away as the boot loader is
+  * supposed to initialize the macb address registers with a valid
+@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct pl
+ 	clk_put(pclk);
+ }
+ 
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
+-
+-static struct gpio_led stk_j2_led[] = {
+-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
+-#define LEDSTRING "J2 jumpered to LED8"
+-	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
+-	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
+-	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
+-	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
+-	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
+-			.default_trigger = "heartbeat", },
+-#else	/* RGB */
+-#define LEDSTRING "J2 jumpered to RGB LEDs"
+-	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
+-	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
+-	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
+-
+-	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
+-			.default_trigger = "heartbeat", },
+-	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
+-	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
+-			.default_trigger = "heartbeat", },
+-	/* PB16, PB30 unused */
+-#endif
+-};
+-
+-static struct gpio_led_platform_data stk_j2_led_data = {
+-	.num_leds	= ARRAY_SIZE(stk_j2_led),
+-	.leds		= stk_j2_led,
+-};
+-
+-static struct platform_device stk_j2_led_dev = {
+-	.name		= "leds-gpio",
+-	.id		= 2,	/* gpio block J2 */
+-	.dev		= {
+-		.platform_data	= &stk_j2_led_data,
+-	},
+-};
+-
+-static void setup_j2_leds(void)
+-{
+-	unsigned	i;
+-
+-	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
+-		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
+-
+-	printk("STK1002: " LEDSTRING "\n");
+-	platform_device_register(&stk_j2_led_dev);
+-}
+-
+-#else
+-static void setup_j2_leds(void)
+-{
+-}
+-#endif
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-static void __init at73c213_set_clk(struct at73c213_board_info *info)
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1002_setup_extdac(void)
+ {
+ 	struct clk *gclk;
+ 	struct clk *pll;
+@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(stru
+ 	}
+ 
+ 	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
+-	info->dac_clk = gclk;
++	at73c213_data.dac_clk = gclk;
+ 
+ err_set_clk:
+ 	clk_put(pll);
+@@ -229,12 +179,16 @@ err_pll:
+ err_gclk:
+ 	return;
+ }
+-#endif
+-#endif
++#else
++static void __init atstk1002_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
+ 
+ void __init setup_board(void)
+ {
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
+ #else
+ 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
+@@ -271,7 +225,7 @@ static int __init atstk1002_init(void)
+ 
+ 	at32_add_system_devices();
+ 
+-#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
+ 	at32_add_device_usart(1);
+ #else
+ 	at32_add_device_usart(0);
+@@ -281,12 +235,16 @@ static int __init atstk1002_init(void)
+ #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
+ #endif
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ #endif
+-#ifdef CONFIG_BOARD_ATSTK1002_SPI1
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
++	at32_add_device_twi(0);
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+@@ -294,17 +252,18 @@ static int __init atstk1002_init(void)
+ 			     fbmem_start, fbmem_size);
+ #endif
+ 	at32_add_device_usba(0, NULL);
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
++	at32_add_device_cf(0, 2, &cf0_data);
+ 
+-	setup_j2_leds();
+-
+-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
+-	at73c213_set_clk(&at73c213_data);
+-#endif
+-#endif
++	atstk1000_setup_j2_leds();
++	atstk1002_setup_extdac();
+ 
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1003.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1003.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,181 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	/*
++	 * We can control the LTV350QV LCD panel, but it isn't much
++	 * point since we don't have an LCD controller...
++	 */
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++static struct cf_platform_data __initdata cf0_data = {
++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS
++	.detect_pin	= CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN,
++	.reset_pin	= CONFIG_BOARD_ATSTK1000_CF_RESET_PIN,
++#else
++	.detect_pin	= GPIO_PIN_NONE,
++	.reset_pin	= GPIO_PIN_NONE,
++#endif
++	.vcc_pin	= GPIO_PIN_NONE,
++	.ready_pin	= GPIO_PIN_PB(27),
++	.cs		= 4,
++};
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1003_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1003_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1003_init(void)
++{
++	/*
++	 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
++	 * SDRAM-specific pins so that nobody messes with them.
++	 */
++	at32_reserve_pin(GPIO_PIN_PE(0));	/* DATA[16]	*/
++	at32_reserve_pin(GPIO_PIN_PE(1));	/* DATA[17]	*/
++	at32_reserve_pin(GPIO_PIN_PE(2));	/* DATA[18]	*/
++	at32_reserve_pin(GPIO_PIN_PE(3));	/* DATA[19]	*/
++	at32_reserve_pin(GPIO_PIN_PE(4));	/* DATA[20]	*/
++	at32_reserve_pin(GPIO_PIN_PE(5));	/* DATA[21]	*/
++	at32_reserve_pin(GPIO_PIN_PE(6));	/* DATA[22]	*/
++	at32_reserve_pin(GPIO_PIN_PE(7));	/* DATA[23]	*/
++	at32_reserve_pin(GPIO_PIN_PE(8));	/* DATA[24]	*/
++	at32_reserve_pin(GPIO_PIN_PE(9));	/* DATA[25]	*/
++	at32_reserve_pin(GPIO_PIN_PE(10));	/* DATA[26]	*/
++	at32_reserve_pin(GPIO_PIN_PE(11));	/* DATA[27]	*/
++	at32_reserve_pin(GPIO_PIN_PE(12));	/* DATA[28]	*/
++	at32_reserve_pin(GPIO_PIN_PE(13));	/* DATA[29]	*/
++	at32_reserve_pin(GPIO_PIN_PE(14));	/* DATA[30]	*/
++	at32_reserve_pin(GPIO_PIN_PE(15));	/* DATA[31]	*/
++	at32_reserve_pin(GPIO_PIN_PE(26));	/* SDCS		*/
++
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++	at32_add_device_cf(0, 2, &cf0_data);
++
++	atstk1000_setup_j2_leds();
++	atstk1003_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1003_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/atstk1004.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/atstk1004.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,152 @@
++/*
++ * ATSTK1003 daughterboard-specific init code
++ *
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/string.h>
++#include <linux/types.h>
++
++#include <linux/spi/at73c213.h>
++#include <linux/spi/spi.h>
++
++#include <video/atmel_lcdc.h>
++
++#include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/init.h>
++#include <asm/arch/portmux.h>
++
++#include "atstk1000.h"
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++static struct spi_board_info spi0_board_info[] __initdata = {
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
++	{
++		/* QVGA display */
++		.modalias	= "ltv350qv",
++		.max_speed_hz	= 16000000,
++		.chip_select	= 1,
++		.mode		= SPI_MODE_3,
++	},
++};
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++static struct spi_board_info spi1_board_info[] __initdata = { {
++	/* patch in custom entries here */
++} };
++#endif
++
++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
++static void __init atstk1004_setup_extdac(void)
++{
++	struct clk *gclk;
++	struct clk *pll;
++
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
++
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
++
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	at73c213_data.dac_clk = gclk;
++
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
++}
++#else
++static void __init atstk1004_setup_extdac(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
++
++void __init setup_board(void)
++{
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
++#else
++	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
++#endif
++	/* USART 2/unused: expansion connector */
++	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
++
++	at32_setup_serial_console(0);
++}
++
++static int __init atstk1004_init(void)
++{
++	at32_add_system_devices();
++
++#ifdef	CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_usart(1);
++#else
++	at32_add_device_usart(0);
++#endif
++	at32_add_device_usart(2);
++
++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
++	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
++#endif
++#ifdef CONFIG_BOARD_ATSTK100X_SPI1
++	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
++	at32_add_device_mci(0, NULL);
++#endif
++	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
++			     fbmem_start, fbmem_size);
++	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
++	at32_add_device_abdac(0);
++#endif
++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
++	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#endif
++
++	atstk1000_setup_j2_leds();
++	atstk1004_setup_extdac();
++
++	return 0;
++}
++postcore_initcall(atstk1004_init);
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig linux-avr32/arch/avr32/boards/atstk1000/Kconfig
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,34 +1,53 @@
+ # STK1000 customization
+ 
+-if BOARD_ATSTK1002
++if BOARD_ATSTK1000
+ 
+-config BOARD_ATSTK1002_CUSTOM
+-	bool "Non-default STK-1002 jumper settings"
++choice
++	prompt "ATSTK1000 CPU daughterboard type"
++	default BOARD_ATSTK1002
++
++config BOARD_ATSTK1002
++	bool "ATSTK1002"
++	select CPU_AT32AP7000
++
++config BOARD_ATSTK1003
++	bool "ATSTK1003"
++	select CPU_AT32AP7001
++
++config BOARD_ATSTK1004
++	bool "ATSTK1004"
++	select CPU_AT32AP7002
++
++endchoice
++
++
++config BOARD_ATSTK100X_CUSTOM
++	bool "Non-default STK1002/STK1003/STK1004 jumper settings"
+ 	help
+ 	  You will normally leave the jumpers on the CPU card at their
+ 	  default settings.  If you need to use certain peripherals,
+ 	  you will need to change some of those jumpers.
+ 
+-if BOARD_ATSTK1002_CUSTOM
++if BOARD_ATSTK100X_CUSTOM
+ 
+-config BOARD_ATSTK1002_SW1_CUSTOM
++config BOARD_ATSTK100X_SW1_CUSTOM
+ 	bool "SW1: use SSC1 (not SPI0)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface,
+ 	  and means you can't initialize the on-board QVGA display.
+ 
+-config BOARD_ATSTK1002_SW2_CUSTOM
++config BOARD_ATSTK100X_SW2_CUSTOM
+ 	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
+ 	help
+ 	  If you change this you'll want an updated boot loader putting
+ 	  the console on UART-C not UART-A.
+ 
+-config BOARD_ATSTK1002_SW3_CUSTOM
++config BOARD_ATSTK100X_SW3_CUSTOM
+ 	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
+ 	help
+ 	  This also prevents using the external DAC as an audio interface.
+ 
+-config BOARD_ATSTK1002_SW4_CUSTOM
++config BOARD_ATSTK100X_SW4_CUSTOM
+ 	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
+ 	help
+ 	  To use the camera interface you'll need a custom card (on the
+@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM
+ 
+ config BOARD_ATSTK1002_SW5_CUSTOM
+ 	bool "SW5: use MACB1 (not LCDC)"
++	depends on BOARD_ATSTK1002
+ 
+ config BOARD_ATSTK1002_SW6_CUSTOM
+ 	bool "SW6: more GPIOs (not MACB0)"
++	depends on BOARD_ATSTK1002
+ 
+ endif	# custom
+ 
+-config BOARD_ATSTK1002_SPI1
++config BOARD_ATSTK100X_SPI1
+ 	bool "Configure SPI1 controller"
+-	depends on !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
+ 	help
+ 	  All the signals for the second SPI controller are available on
+ 	  GPIO lines and accessed through the J1 jumper block.  Say "y"
+ 	  here to configure that SPI controller.
+ 
+-config BOARD_ATSTK1002_J2_LED
++config BOARD_ATSTK1000_J2_LED
+ 	bool
+-	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
++	default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB
+ 
+ choice
+ 	prompt "LEDs connected to J2:"
+-	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
++	depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM
+ 	optional
+ 	help
+ 	  Select this if you have jumpered the J2 jumper block to the
+@@ -64,16 +85,64 @@ choice
+ 	  IDC cable.  A default "heartbeat" trigger is provided, but
+ 	  you can of course override this.
+ 
+-config BOARD_ATSTK1002_J2_LED8
++config BOARD_ATSTK1000_J2_LED8
+ 	bool "LED0..LED7"
+ 	help
+ 	  Select this if J2 is jumpered to LED0..LED7 amber leds.
+ 
+-config BOARD_ATSTK1002_J2_RGB
++config BOARD_ATSTK1000_J2_RGB
+ 	bool "RGB leds"
+ 	help
+ 	  Select this if J2 is jumpered to the RGB leds.
+ 
+ endchoice
+ 
+-endif	# stk 1002
++config BOARD_ATSTK1000_EXTDAC
++	bool
++	depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM
++	default y
++
++config BOARD_ATSTK100X_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000 kit doesn't ship with an AC97 codec on
++	  board, so say N unless you've got an expansion board with an
++	  AC97 codec on it that you want to use.
++
++config BOARD_ATSTK1000_CF_HACKS
++	bool "ATSTK1000 CompactFlash hacks"
++	depends on !BOARD_ATSTK100X_SW4_CUSTOM
++	help
++	  Select this if you have re-routed the CompactFlash RESET and
++	  CD signals to GPIOs on your STK1000. This is necessary for
++	  reset and card detection to work properly, although some CF
++	  cards may be able to cope without reset.
++
++config BOARD_ATSTK1000_CF_RESET_PIN
++	hex "CompactFlash RESET pin"
++	default 0x30
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash RESET
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x30, which is pin 16 on PIOB, aka GPIO14.
++
++config BOARD_ATSTK1000_CF_DETECT_PIN
++	hex "CompactFlash DETECT pin"
++	default 0x3e
++	depends on BOARD_ATSTK1000_CF_HACKS
++	help
++	  Select which GPIO pin to use for the CompactFlash CD
++	  signal. This is specified as a hexadecimal number and should
++	  be defined as 0x20 * gpio_port + pin.
++
++	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
++
++endif	# stk 1000
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/Makefile linux-avr32/arch/avr32/boards/atstk1000/Makefile
+--- linux-2.6.24/arch/avr32/boards/atstk1000/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,2 +1,4 @@
+ obj-y				+= setup.o flash.o
+ obj-$(CONFIG_BOARD_ATSTK1002)	+= atstk1002.o
++obj-$(CONFIG_BOARD_ATSTK1003)	+= atstk1003.o
++obj-$(CONFIG_BOARD_ATSTK1004)	+= atstk1004.o
+diff -Nrup linux-2.6.24/arch/avr32/boards/atstk1000/setup.c linux-avr32/arch/avr32/boards/atstk1000/setup.c
+--- linux-2.6.24/arch/avr32/boards/atstk1000/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/boards/atstk1000/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -10,13 +10,17 @@
+ #include <linux/bootmem.h>
+ #include <linux/fb.h>
+ #include <linux/init.h>
++#include <linux/platform_device.h>
+ #include <linux/types.h>
+ #include <linux/linkage.h>
+ 
+ #include <video/atmel_lcdc.h>
+ 
+ #include <asm/setup.h>
++
++#include <asm/arch/at32ap700x.h>
+ #include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
+ 
+ #include "atstk1000.h"
+ 
+@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk
+ 	.default_monspecs	= &atstk1000_default_monspecs,
+ 	.guard_time		= 2,
+ };
++
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED
++#include <linux/leds.h>
++
++static struct gpio_led stk1000_j2_led[] = {
++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8
++#define LEDSTRING "J2 jumpered to LED8"
++	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
++	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
++	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
++	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
++	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
++	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
++	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
++			.default_trigger = "heartbeat", },
++#else	/* RGB */
++#define LEDSTRING "J2 jumpered to RGB LEDs"
++	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
++	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
++	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
++
++	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
++			.default_trigger = "heartbeat", },
++	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
++	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
++			.default_trigger = "heartbeat", },
++	/* PB16, PB30 unused */
++#endif
++};
++
++static struct gpio_led_platform_data stk1000_j2_led_data = {
++	.num_leds	= ARRAY_SIZE(stk1000_j2_led),
++	.leds		= stk1000_j2_led,
++};
++
++static struct platform_device stk1000_j2_led_dev = {
++	.name		= "leds-gpio",
++	.id		= 2,	/* gpio block J2 */
++	.dev		= {
++		.platform_data	= &stk1000_j2_led_data,
++	},
++};
++
++void __init atstk1000_setup_j2_leds(void)
++{
++	unsigned	i;
++
++	for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++)
++		at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++
++	printk("STK1000: " LEDSTRING "\n");
++	platform_device_register(&stk1000_j2_led_dev);
++}
++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */
++void __init atstk1000_setup_j2_leds(void)
++{
++
++}
++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */
+diff -Nrup linux-2.6.24/arch/avr32/configs/atngw100_defconfig linux-avr32/arch/avr32/configs/atngw100_defconfig
+--- linux-2.6.24/arch/avr32/configs/atngw100_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atngw100_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,46 +1,51 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:40:05 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:20:41 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+ CONFIG_BSD_PROCESS_ACCT=y
+ CONFIG_BSD_PROCESS_ACCT_V3=y
+ # CONFIG_TASKSTATS is not set
+-# CONFIG_UTS_NS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
+ # CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ # CONFIG_RELAY is not set
+ CONFIG_BLK_DEV_INITRD=y
+@@ -61,35 +66,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ CONFIG_MODULE_FORCE_UNLOAD=y
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ CONFIG_KMOD=y
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -111,6 +109,7 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+ # CONFIG_BOARD_ATSTK1000 is not set
+ CONFIG_BOARD_ATNGW100=y
+@@ -119,9 +118,9 @@ CONFIG_LOADER_U_BOOT=y
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -141,9 +140,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -153,13 +154,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -213,6 +232,7 @@ CONFIG_INET_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_TRANSPORT=y
+ CONFIG_INET_XFRM_MODE_TUNNEL=y
+ CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+@@ -240,6 +260,7 @@ CONFIG_IPV6_SIT=y
+ # CONFIG_NETWORK_SECMARK is not set
+ CONFIG_NETFILTER=y
+ # CONFIG_NETFILTER_DEBUG is not set
++CONFIG_BRIDGE_NETFILTER=y
+ 
+ #
+ # Core Netfilter Configuration
+@@ -252,6 +273,7 @@ CONFIG_NF_CONNTRACK_MARK=y
+ # CONFIG_NF_CONNTRACK_EVENTS is not set
+ CONFIG_NF_CT_PROTO_GRE=m
+ # CONFIG_NF_CT_PROTO_SCTP is not set
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
+ CONFIG_NF_CONNTRACK_AMANDA=m
+ CONFIG_NF_CONNTRACK_FTP=m
+ CONFIG_NF_CONNTRACK_H323=m
+@@ -269,9 +291,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m
+ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+ CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+ # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+ CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
+ CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+ CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+ CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+ CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+ # CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+@@ -284,6 +308,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
+ CONFIG_NETFILTER_XT_MATCH_MARK=m
+ CONFIG_NETFILTER_XT_MATCH_POLICY=m
+ CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+ CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+ CONFIG_NETFILTER_XT_MATCH_QUOTA=m
+ CONFIG_NETFILTER_XT_MATCH_REALM=m
+@@ -292,6 +317,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m
+ CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
+ CONFIG_NETFILTER_XT_MATCH_STRING=m
+ CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++# CONFIG_NETFILTER_XT_MATCH_TIME is not set
++# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+ CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
+ 
+ #
+@@ -359,13 +386,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
+ CONFIG_IP6_NF_MANGLE=m
+ CONFIG_IP6_NF_TARGET_HL=m
+ CONFIG_IP6_NF_RAW=m
++
++#
++# Bridge: Netfilter Configuration
++#
++# CONFIG_BRIDGE_NF_EBTABLES is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ CONFIG_VLAN_8021Q=m
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -373,10 +406,6 @@ CONFIG_VLAN_8021Q=m
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ CONFIG_NET_CLS_ROUTE=y
+ 
+@@ -384,6 +413,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -397,6 +427,7 @@ CONFIG_NET_CLS_ROUTE=y
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -405,16 +436,13 @@ CONFIG_NET_CLS_ROUTE=y
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -434,6 +462,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -493,20 +522,8 @@ CONFIG_MTD_DATAFLASH=y
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -517,11 +534,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++# CONFIG_MISC_DEVICES is not set
+ # CONFIG_IDE is not set
+ 
+ #
+@@ -529,30 +542,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ #
+ # CONFIG_RAID_ATTRS is not set
+ # CONFIG_SCSI is not set
++# CONFIG_SCSI_DMA is not set
+ # CONFIG_SCSI_NETLINK is not set
+ # CONFIG_ATA is not set
+-
+-#
+-# Multi-device support (RAID and LVM)
+-#
+ # CONFIG_MD is not set
+-
+-#
+-# Network device support
+-#
+ CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
+ # CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -571,21 +596,14 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ CONFIG_PPP_MPPE=m
+ CONFIG_PPPOE=m
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+@@ -620,23 +638,50 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
+-
+-#
+-# TPM devices
+-#
+ # CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+ # SPI support
+@@ -655,13 +700,25 @@ CONFIG_SPI_ATMEL=y
+ # SPI Protocol Masters
+ #
+ # CONFIG_SPI_AT25 is not set
+-# CONFIG_SPI_SPIDEV is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# Watchdog Device Drivers
+ #
+-# CONFIG_W1 is not set
+-# CONFIG_HWMON is not set
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -678,23 +735,21 @@ CONFIG_SPI_ATMEL=y
+ #
+ # Graphics support
+ #
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
+ # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
+ 
+ #
+ # Sound
+ #
+ # CONFIG_SOUND is not set
+-
+-#
+-# USB support
+-#
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -706,12 +761,47 @@ CONFIG_SPI_ATMEL=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
+ 
+ #
+-# LED devices
++# MMC/SD Host Controller Drivers
+ #
++CONFIG_MMC_SPI=m
+ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ 
+@@ -726,53 +816,71 @@ CONFIG_LEDS_GPIO=y
+ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+-
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# LED drivers
+-#
+-
+-#
+-# LED Triggers
+-#
+-
+-#
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+ #
+-CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS=m
+ # CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
+-CONFIG_JBD=y
+-# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD=m
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -781,7 +889,8 @@ CONFIG_JBD=y
+ # CONFIG_OCFS2_FS is not set
+ # CONFIG_MINIX_FS is not set
+ # CONFIG_ROMFS_FS is not set
+-# CONFIG_INOTIFY is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
+ # CONFIG_QUOTA is not set
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+@@ -814,8 +923,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=y
++CONFIG_CONFIGFS_FS=m
+ 
+ #
+ # Miscellaneous filesystems
+@@ -830,10 +938,12 @@ CONFIG_CONFIGFS_FS=y
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+ CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -842,19 +952,21 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+ # CONFIG_NFS_V4 is not set
+ # CONFIG_NFS_DIRECTIO is not set
+-# CONFIG_NFSD is not set
++CONFIG_NFSD=m
++CONFIG_NFSD_V3=y
++# CONFIG_NFSD_V3_ACL is not set
++# CONFIG_NFSD_V4 is not set
++CONFIG_NFSD_TCP=y
+ CONFIG_ROOT_NFS=y
+ CONFIG_LOCKD=y
+ CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
+ CONFIG_NFS_COMMON=y
+ CONFIG_SUNRPC=y
+ # CONFIG_SUNRPC_BIND34 is not set
+@@ -871,23 +983,18 @@ CONFIG_CIFS=m
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+-CONFIG_NLS=y
++CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+-# CONFIG_NLS_CODEPAGE_437 is not set
++CONFIG_NLS_CODEPAGE_437=m
+ # CONFIG_NLS_CODEPAGE_737 is not set
+ # CONFIG_NLS_CODEPAGE_775 is not set
+-CONFIG_NLS_CODEPAGE_850=y
++CONFIG_NLS_CODEPAGE_850=m
+ # CONFIG_NLS_CODEPAGE_852 is not set
+ # CONFIG_NLS_CODEPAGE_855 is not set
+ # CONFIG_NLS_CODEPAGE_857 is not set
+@@ -908,7 +1015,7 @@ CONFIG_NLS_CODEPAGE_850=y
+ # CONFIG_NLS_CODEPAGE_1250 is not set
+ # CONFIG_NLS_CODEPAGE_1251 is not set
+ # CONFIG_NLS_ASCII is not set
+-CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_ISO8859_2 is not set
+ # CONFIG_NLS_ISO8859_3 is not set
+ # CONFIG_NLS_ISO8859_4 is not set
+@@ -921,18 +1028,19 @@ CONFIG_NLS_ISO8859_1=y
+ # CONFIG_NLS_ISO8859_15 is not set
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+-CONFIG_NLS_UTF8=y
+-
+-#
+-# Distributed Lock Manager
+-#
++CONFIG_NLS_UTF8=m
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -941,12 +1049,17 @@ CONFIG_MAGIC_SYSRQ=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -954,21 +1067,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ # CONFIG_FORCED_INLINING is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+ CONFIG_CRYPTO=y
+ CONFIG_CRYPTO_ALGAPI=y
+ CONFIG_CRYPTO_BLKCIPHER=y
+@@ -989,6 +1102,7 @@ CONFIG_CRYPTO_ECB=m
+ CONFIG_CRYPTO_CBC=y
+ CONFIG_CRYPTO_PCBC=m
+ # CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
+ # CONFIG_CRYPTO_CRYPTD is not set
+ CONFIG_CRYPTO_DES=y
+ # CONFIG_CRYPTO_FCRYPT is not set
+@@ -1002,15 +1116,14 @@ CONFIG_CRYPTO_DES=y
+ CONFIG_CRYPTO_ARC4=m
+ # CONFIG_CRYPTO_KHAZAD is not set
+ # CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
+ CONFIG_CRYPTO_DEFLATE=y
+ # CONFIG_CRYPTO_MICHAEL_MIC is not set
+ # CONFIG_CRYPTO_CRC32C is not set
+ # CONFIG_CRYPTO_CAMELLIA is not set
+ # CONFIG_CRYPTO_TEST is not set
+-
+-#
+-# Hardware crypto devices
+-#
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_HW=y
+ 
+ #
+ # Library routines
+@@ -1018,8 +1131,9 @@ CONFIG_CRYPTO_DEFLATE=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1002_defconfig linux-avr32/arch/avr32/configs/atstk1002_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1002_defconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1002_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -1,48 +1,48 @@
+ #
+ # Automatically generated make config: don't edit
+-# Linux kernel version: 2.6.22-rc5
+-# Sat Jun 23 15:32:08 2007
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:07:43 2008
+ #
+ CONFIG_AVR32=y
+ CONFIG_GENERIC_GPIO=y
+ CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ CONFIG_HARDIRQS_SW_RESEND=y
+ CONFIG_GENERIC_IRQ_PROBE=y
+ CONFIG_RWSEM_GENERIC_SPINLOCK=y
+ CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+ # CONFIG_ARCH_HAS_ILOG2_U32 is not set
+ # CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
+ CONFIG_GENERIC_HWEIGHT=y
+ CONFIG_GENERIC_CALIBRATE_DELAY=y
+ CONFIG_GENERIC_BUG=y
+ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+ 
+ #
+-# Code maturity level options
++# General setup
+ #
+ CONFIG_EXPERIMENTAL=y
+ CONFIG_BROKEN_ON_SMP=y
+ CONFIG_INIT_ENV_ARG_LIMIT=32
+-
+-#
+-# General setup
+-#
+ CONFIG_LOCALVERSION=""
+ # CONFIG_LOCALVERSION_AUTO is not set
+ CONFIG_SWAP=y
+ CONFIG_SYSVIPC=y
+-# CONFIG_IPC_NS is not set
+ CONFIG_SYSVIPC_SYSCTL=y
+ CONFIG_POSIX_MQUEUE=y
+-CONFIG_BSD_PROCESS_ACCT=y
+-CONFIG_BSD_PROCESS_ACCT_V3=y
+-CONFIG_TASKSTATS=y
+-CONFIG_TASK_DELAY_ACCT=y
+-# CONFIG_TASK_XACCT is not set
+-# CONFIG_UTS_NS is not set
+-CONFIG_AUDIT=y
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
+ # CONFIG_IKCONFIG is not set
+ CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
+ CONFIG_SYSFS_DEPRECATED=y
+ CONFIG_RELAY=y
+ CONFIG_BLK_DEV_INITRD=y
+@@ -63,35 +63,28 @@ CONFIG_FUTEX=y
+ CONFIG_ANON_INODES=y
+ CONFIG_EPOLL=y
+ CONFIG_SIGNALFD=y
+-CONFIG_TIMERFD=y
+ CONFIG_EVENTFD=y
+ CONFIG_SHMEM=y
+ CONFIG_VM_EVENT_COUNTERS=y
+-# CONFIG_SLUB_DEBUG is not set
++CONFIG_SLUB_DEBUG=y
+ # CONFIG_SLAB is not set
+ CONFIG_SLUB=y
+ # CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
+ CONFIG_RT_MUTEXES=y
+ # CONFIG_TINY_SHMEM is not set
+ CONFIG_BASE_SMALL=1
+-
+-#
+-# Loadable module support
+-#
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+ # CONFIG_MODULE_FORCE_UNLOAD is not set
+ # CONFIG_MODVERSIONS is not set
+ # CONFIG_MODULE_SRCVERSION_ALL is not set
+ # CONFIG_KMOD is not set
+-
+-#
+-# Block layer
+-#
+ CONFIG_BLOCK=y
+ # CONFIG_LBD is not set
+ # CONFIG_BLK_DEV_IO_TRACE is not set
+ # CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
+ 
+ #
+ # IO Schedulers
+@@ -99,12 +92,12 @@ CONFIG_BLOCK=y
+ CONFIG_IOSCHED_NOOP=y
+ # CONFIG_IOSCHED_AS is not set
+ # CONFIG_IOSCHED_DEADLINE is not set
+-# CONFIG_IOSCHED_CFQ is not set
++CONFIG_IOSCHED_CFQ=y
+ # CONFIG_DEFAULT_AS is not set
+ # CONFIG_DEFAULT_DEADLINE is not set
+-# CONFIG_DEFAULT_CFQ is not set
+-CONFIG_DEFAULT_NOOP=y
+-CONFIG_DEFAULT_IOSCHED="noop"
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
+ 
+ #
+ # System Type and features
+@@ -113,18 +106,27 @@ CONFIG_SUBARCH_AVR32B=y
+ CONFIG_MMU=y
+ CONFIG_PERFORMANCE_COUNTERS=y
+ CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
+ CONFIG_CPU_AT32AP7000=y
+-CONFIG_BOARD_ATSTK1002=y
+ CONFIG_BOARD_ATSTK1000=y
+ # CONFIG_BOARD_ATNGW100 is not set
++CONFIG_BOARD_ATSTK1002=y
++# CONFIG_BOARD_ATSTK1003 is not set
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
+ CONFIG_LOADER_U_BOOT=y
+ 
+ #
+ # Atmel AVR32 AP options
+ #
+-# CONFIG_AP7000_32_BIT_SMC is not set
+-CONFIG_AP7000_16_BIT_SMC=y
+-# CONFIG_AP7000_8_BIT_SMC is not set
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
+ CONFIG_LOAD_ADDRESS=0x10000000
+ CONFIG_ENTRY_ADDRESS=0x90000000
+ CONFIG_PHYS_OFFSET=0x10000000
+@@ -144,9 +146,11 @@ CONFIG_FLATMEM_MANUAL=y
+ CONFIG_FLATMEM=y
+ CONFIG_FLAT_NODE_MEM_MAP=y
+ # CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+ CONFIG_SPLIT_PTLOCK_CPUS=4
+ # CONFIG_RESOURCES_64BIT is not set
+ CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
+ # CONFIG_OWNERSHIP_TRACE is not set
+ # CONFIG_HZ_100 is not set
+ CONFIG_HZ_250=y
+@@ -156,13 +160,31 @@ CONFIG_HZ=250
+ CONFIG_CMDLINE=""
+ 
+ #
+-# Bus options
++# Power management options
+ #
+-# CONFIG_ARCH_SUPPORTS_MSI is not set
+ 
+ #
+-# PCCARD (PCMCIA/CardBus) support
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
+ #
++# CONFIG_ARCH_SUPPORTS_MSI is not set
+ # CONFIG_PCCARD is not set
+ 
+ #
+@@ -182,7 +204,12 @@ CONFIG_NET=y
+ CONFIG_PACKET=y
+ CONFIG_PACKET_MMAP=y
+ CONFIG_UNIX=y
+-# CONFIG_NET_KEY is not set
++CONFIG_XFRM=y
++CONFIG_XFRM_USER=m
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++CONFIG_NET_KEY=m
++# CONFIG_NET_KEY_MIGRATE is not set
+ CONFIG_INET=y
+ # CONFIG_IP_MULTICAST is not set
+ # CONFIG_IP_ADVANCED_ROUTER is not set
+@@ -191,36 +218,52 @@ CONFIG_IP_PNP=y
+ CONFIG_IP_PNP_DHCP=y
+ # CONFIG_IP_PNP_BOOTP is not set
+ # CONFIG_IP_PNP_RARP is not set
+-# CONFIG_NET_IPIP is not set
+-# CONFIG_NET_IPGRE is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
+ # CONFIG_ARPD is not set
+ # CONFIG_SYN_COOKIES is not set
+-# CONFIG_INET_AH is not set
+-# CONFIG_INET_ESP is not set
++CONFIG_INET_AH=m
++CONFIG_INET_ESP=m
+ # CONFIG_INET_IPCOMP is not set
+ # CONFIG_INET_XFRM_TUNNEL is not set
+-# CONFIG_INET_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+-# CONFIG_INET_XFRM_MODE_BEET is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=m
++CONFIG_INET_XFRM_MODE_TUNNEL=m
++CONFIG_INET_XFRM_MODE_BEET=m
++# CONFIG_INET_LRO is not set
+ CONFIG_INET_DIAG=y
+ CONFIG_INET_TCP_DIAG=y
+ # CONFIG_TCP_CONG_ADVANCED is not set
+ CONFIG_TCP_CONG_CUBIC=y
+ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_TCP_MD5SIG is not set
+-# CONFIG_IPV6 is not set
+-# CONFIG_INET6_XFRM_TUNNEL is not set
+-# CONFIG_INET6_TUNNEL is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++CONFIG_INET6_AH=m
++CONFIG_INET6_ESP=m
++CONFIG_INET6_IPCOMP=m
++# CONFIG_IPV6_MIP6 is not set
++CONFIG_INET6_XFRM_TUNNEL=m
++CONFIG_INET6_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++CONFIG_IPV6_TUNNEL=m
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
+ # CONFIG_NETWORK_SECMARK is not set
+ # CONFIG_NETFILTER is not set
+ # CONFIG_IP_DCCP is not set
+ # CONFIG_IP_SCTP is not set
+ # CONFIG_TIPC is not set
+ # CONFIG_ATM is not set
+-# CONFIG_BRIDGE is not set
++CONFIG_BRIDGE=m
+ # CONFIG_VLAN_8021Q is not set
+ # CONFIG_DECNET is not set
++CONFIG_LLC=m
+ # CONFIG_LLC2 is not set
+ # CONFIG_IPX is not set
+ # CONFIG_ATALK is not set
+@@ -228,16 +271,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_LAPB is not set
+ # CONFIG_ECONET is not set
+ # CONFIG_WAN_ROUTER is not set
+-
+-#
+-# QoS and/or fair queueing
+-#
+ # CONFIG_NET_SCHED is not set
+ 
+ #
+ # Network testing
+ #
+ # CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
+ # CONFIG_HAMRADIO is not set
+ # CONFIG_IRDA is not set
+ # CONFIG_BT is not set
+@@ -251,6 +291,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ # CONFIG_MAC80211 is not set
+ # CONFIG_IEEE80211 is not set
+ # CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
+ 
+ #
+ # Device Drivers
+@@ -259,16 +300,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
+ #
+ # Generic Driver Options
+ #
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+ CONFIG_STANDALONE=y
+ # CONFIG_PREVENT_FIRMWARE_BUILD is not set
+ # CONFIG_FW_LOADER is not set
+ # CONFIG_DEBUG_DRIVER is not set
+ # CONFIG_DEBUG_DEVRES is not set
+ # CONFIG_SYS_HYPERVISOR is not set
+-
+-#
+-# Connector - unified userspace <-> kernelspace linker
+-#
+ # CONFIG_CONNECTOR is not set
+ CONFIG_MTD=y
+ # CONFIG_MTD_DEBUG is not set
+@@ -288,6 +326,7 @@ CONFIG_MTD_BLOCK=y
+ # CONFIG_INFTL is not set
+ # CONFIG_RFD_FTL is not set
+ # CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
+ 
+ #
+ # RAM/ROM/Flash chip drivers
+@@ -327,6 +366,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ #
+ # Self-contained MTD device drivers
+ #
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
+ # CONFIG_MTD_SLRAM is not set
+ # CONFIG_MTD_PHRAM is not set
+ # CONFIG_MTD_MTDRAM is not set
+@@ -345,20 +386,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+ # UBI - Unsorted block images
+ #
+ # CONFIG_MTD_UBI is not set
+-
+-#
+-# Parallel port support
+-#
+ # CONFIG_PARPORT is not set
+-
+-#
+-# Plug and Play support
+-#
+-# CONFIG_PNPACPI is not set
+-
+-#
+-# Block devices
+-#
++CONFIG_BLK_DEV=y
+ # CONFIG_BLK_DEV_COW_COMMON is not set
+ CONFIG_BLK_DEV_LOOP=m
+ # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+@@ -369,42 +398,87 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
+ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+ # CONFIG_CDROM_PKTCDVD is not set
+ # CONFIG_ATA_OVER_ETH is not set
+-
+-#
+-# Misc devices
+-#
+-# CONFIG_BLINK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
+ # CONFIG_IDE is not set
+ 
+ #
+ # SCSI device support
+ #
+ # CONFIG_RAID_ATTRS is not set
+-# CONFIG_SCSI is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
+ # CONFIG_SCSI_NETLINK is not set
+-# CONFIG_ATA is not set
++# CONFIG_SCSI_PROC_FS is not set
+ 
+ #
+-# Multi-device support (RAID and LVM)
++# SCSI support type (disk, tape, CD-ROM)
+ #
+-# CONFIG_MD is not set
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
+ 
+ #
+-# Network device support
++# SCSI Transports
+ #
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_LOWLEVEL is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
+ CONFIG_NETDEVICES=y
+-CONFIG_DUMMY=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
+ # CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
+ # CONFIG_EQUALIZER is not set
+ CONFIG_TUN=m
+-# CONFIG_PHYLIB is not set
++# CONFIG_VETH is not set
++CONFIG_PHYLIB=y
+ 
+ #
+-# Ethernet (10 or 100Mbit)
++# MII PHY device drivers
+ #
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
+ CONFIG_NET_ETHERNET=y
+-CONFIG_MII=y
++# CONFIG_MII is not set
+ CONFIG_MACB=y
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_B44 is not set
+ # CONFIG_NETDEV_1000 is not set
+ # CONFIG_NETDEV_10000 is not set
+ 
+@@ -423,27 +497,54 @@ CONFIG_PPP_DEFLATE=m
+ CONFIG_PPP_BSDCOMP=m
+ # CONFIG_PPP_MPPE is not set
+ # CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
+ # CONFIG_SLIP is not set
+ CONFIG_SLHC=m
+ # CONFIG_SHAPER is not set
+ # CONFIG_NETCONSOLE is not set
+ # CONFIG_NETPOLL is not set
+ # CONFIG_NET_POLL_CONTROLLER is not set
+-
+-#
+-# ISDN subsystem
+-#
+ # CONFIG_ISDN is not set
+-
+-#
+-# Telephony Support
+-#
+ # CONFIG_PHONE is not set
+ 
+ #
+ # Input device support
+ #
+-# CONFIG_INPUT is not set
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=m
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
+ 
+ #
+ # Hardware I/O ports
+@@ -472,35 +573,87 @@ CONFIG_SERIAL_CORE=y
+ CONFIG_SERIAL_CORE_CONSOLE=y
+ CONFIG_UNIX98_PTYS=y
+ # CONFIG_LEGACY_PTYS is not set
+-
+-#
+-# IPMI
+-#
+ # CONFIG_IPMI_HANDLER is not set
+-# CONFIG_WATCHDOG is not set
+ # CONFIG_HW_RANDOM is not set
+ # CONFIG_RTC is not set
+ # CONFIG_GEN_RTC is not set
+ # CONFIG_R3964 is not set
+ # CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
+ 
+ #
+-# TPM devices
++# SPI support
+ #
+-# CONFIG_TCG_TPM is not set
+-# CONFIG_I2C is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
+ 
+ #
+-# SPI support
++# SPI Master Controller Drivers
+ #
+-# CONFIG_SPI is not set
+-# CONFIG_SPI_MASTER is not set
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
+ 
+ #
+-# Dallas's 1-wire bus
++# SPI Protocol Masters
+ #
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
+ # CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
+ # CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
+ 
+ #
+ # Multifunction device drivers
+@@ -517,23 +670,94 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # Graphics support
+ #
+-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ 
+ #
+ # Display device support
+ #
+ # CONFIG_DISPLAY_SUPPORT is not set
+-# CONFIG_VGASTATE is not set
+-# CONFIG_FB is not set
++# CONFIG_LOGO is not set
+ 
+ #
+ # Sound
+ #
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++# CONFIG_SND_VERBOSE_PROCFS is not set
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
+ 
+ #
+-# USB support
++# Open Sound System
+ #
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
+ # CONFIG_USB_ARCH_HAS_HCD is not set
+ # CONFIG_USB_ARCH_HAS_OHCI is not set
+ # CONFIG_USB_ARCH_HAS_EHCI is not set
+@@ -545,47 +769,116 @@ CONFIG_UNIX98_PTYS=y
+ #
+ # USB Gadget Support
+ #
+-# CONFIG_USB_GADGET is not set
+-# CONFIG_MMC is not set
+-
+-#
+-# LED devices
+-#
+-# CONFIG_NEW_LEDS is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=m
+ 
+ #
+ # LED drivers
+ #
++CONFIG_LEDS_GPIO=m
+ 
+ #
+ # LED Triggers
+ #
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=m
++CONFIG_LEDS_TRIGGER_HEARTBEAT=m
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
+ 
+ #
+-# InfiniBand support
++# RTC interfaces
+ #
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
++# I2C RTC drivers
+ #
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
+ 
+ #
+-# Real Time Clock
++# SPI RTC drivers
+ #
+-# CONFIG_RTC_CLASS is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
+ 
+ #
+-# DMA Engine support
++# Platform RTC drivers
+ #
+-# CONFIG_DMA_ENGINE is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
+ 
+ #
+-# DMA Clients
++# on-CPU RTC drivers
+ #
++CONFIG_RTC_DRV_AT32AP700X=y
+ 
+ #
+-# DMA Devices
++# Userspace I/O
+ #
++# CONFIG_UIO is not set
+ 
+ #
+ # File systems
+@@ -593,8 +886,11 @@ CONFIG_UNIX98_PTYS=y
+ CONFIG_EXT2_FS=m
+ # CONFIG_EXT2_FS_XATTR is not set
+ # CONFIG_EXT2_FS_XIP is not set
+-# CONFIG_EXT3_FS is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
+ # CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
+ # CONFIG_REISERFS_FS is not set
+ # CONFIG_JFS_FS is not set
+ # CONFIG_FS_POSIX_ACL is not set
+@@ -609,7 +905,7 @@ CONFIG_INOTIFY_USER=y
+ # CONFIG_DNOTIFY is not set
+ # CONFIG_AUTOFS_FS is not set
+ # CONFIG_AUTOFS4_FS is not set
+-# CONFIG_FUSE_FS is not set
++CONFIG_FUSE_FS=m
+ 
+ #
+ # CD-ROM/DVD Filesystems
+@@ -637,8 +933,7 @@ CONFIG_SYSFS=y
+ CONFIG_TMPFS=y
+ # CONFIG_TMPFS_POSIX_ACL is not set
+ # CONFIG_HUGETLB_PAGE is not set
+-CONFIG_RAMFS=y
+-CONFIG_CONFIGFS_FS=m
++# CONFIG_CONFIGFS_FS is not set
+ 
+ #
+ # Miscellaneous filesystems
+@@ -652,11 +947,12 @@ CONFIG_CONFIGFS_FS=m
+ # CONFIG_EFS_FS is not set
+ CONFIG_JFFS2_FS=y
+ CONFIG_JFFS2_FS_DEBUG=0
+-CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+ # CONFIG_JFFS2_SUMMARY is not set
+ # CONFIG_JFFS2_FS_XATTR is not set
+ # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+ CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
+ CONFIG_JFFS2_RTIME=y
+ # CONFIG_JFFS2_RUBIN is not set
+ # CONFIG_CRAMFS is not set
+@@ -665,10 +961,7 @@ CONFIG_JFFS2_RTIME=y
+ # CONFIG_QNX4FS_FS is not set
+ # CONFIG_SYSV_FS is not set
+ # CONFIG_UFS_FS is not set
+-
+-#
+-# Network File Systems
+-#
++CONFIG_NETWORK_FILESYSTEMS=y
+ CONFIG_NFS_FS=y
+ CONFIG_NFS_V3=y
+ # CONFIG_NFS_V3_ACL is not set
+@@ -688,17 +981,12 @@ CONFIG_SUNRPC=y
+ # CONFIG_NCP_FS is not set
+ # CONFIG_CODA_FS is not set
+ # CONFIG_AFS_FS is not set
+-# CONFIG_9P_FS is not set
+ 
+ #
+ # Partition Types
+ #
+ # CONFIG_PARTITION_ADVANCED is not set
+ CONFIG_MSDOS_PARTITION=y
+-
+-#
+-# Native Language Support
+-#
+ CONFIG_NLS=m
+ CONFIG_NLS_DEFAULT="iso8859-1"
+ CONFIG_NLS_CODEPAGE_437=m
+@@ -739,17 +1027,18 @@ CONFIG_NLS_ISO8859_1=m
+ # CONFIG_NLS_KOI8_R is not set
+ # CONFIG_NLS_KOI8_U is not set
+ CONFIG_NLS_UTF8=m
+-
+-#
+-# Distributed Lock Manager
+-#
+ # CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
+ 
+ #
+ # Kernel hacking
+ #
+-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+ # CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
+ CONFIG_ENABLE_MUST_CHECK=y
+ CONFIG_MAGIC_SYSRQ=y
+ # CONFIG_UNUSED_SYMBOLS is not set
+@@ -758,12 +1047,17 @@ CONFIG_DEBUG_FS=y
+ CONFIG_DEBUG_KERNEL=y
+ # CONFIG_DEBUG_SHIRQ is not set
+ CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
+ # CONFIG_SCHEDSTATS is not set
+ # CONFIG_TIMER_STATS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
+ # CONFIG_DEBUG_RT_MUTEXES is not set
+ # CONFIG_RT_MUTEX_TESTER is not set
+ # CONFIG_DEBUG_SPINLOCK is not set
+ # CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
+ # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+ # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+ # CONFIG_DEBUG_KOBJECT is not set
+@@ -771,22 +1065,63 @@ CONFIG_DEBUG_BUGVERBOSE=y
+ # CONFIG_DEBUG_INFO is not set
+ # CONFIG_DEBUG_VM is not set
+ # CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
+ CONFIG_FRAME_POINTER=y
+ CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
+ # CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
+ # CONFIG_FAULT_INJECTION is not set
+-# CONFIG_KPROBES is not set
++# CONFIG_SAMPLES is not set
+ 
+ #
+ # Security options
+ #
+ # CONFIG_KEYS is not set
+ # CONFIG_SECURITY is not set
+-
+-#
+-# Cryptographic options
+-#
+-# CONFIG_CRYPTO is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_CRYPTO=y
++CONFIG_CRYPTO_ALGAPI=m
++CONFIG_CRYPTO_BLKCIPHER=m
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_MANAGER=m
++CONFIG_CRYPTO_HMAC=m
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_MD4 is not set
++CONFIG_CRYPTO_MD5=m
++CONFIG_CRYPTO_SHA1=m
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_WP512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_ECB is not set
++CONFIG_CRYPTO_CBC=m
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_XTS is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++CONFIG_CRYPTO_DES=m
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_AES is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_SEED is not set
++CONFIG_CRYPTO_DEFLATE=m
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_TEST is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_HW is not set
+ 
+ #
+ # Library routines
+@@ -794,10 +1129,10 @@ CONFIG_FORCED_INLINING=y
+ CONFIG_BITREVERSE=y
+ CONFIG_CRC_CCITT=m
+ # CONFIG_CRC16 is not set
+-# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC_ITU_T=m
+ CONFIG_CRC32=y
++CONFIG_CRC7=m
+ # CONFIG_LIBCRC32C is not set
+-CONFIG_AUDIT_GENERIC=y
+ CONFIG_ZLIB_INFLATE=y
+ CONFIG_ZLIB_DEFLATE=y
+ CONFIG_PLIST=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1003_defconfig linux-avr32/arch/avr32/configs/atstk1003_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1003_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1003_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1015 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 22:54:34 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++CONFIG_POSIX_MQUEUE=y
++CONFIG_BSD_PROCESS_ACCT=y
++CONFIG_BSD_PROCESS_ACCT_V3=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++# CONFIG_TASK_XACCT is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++CONFIG_AUDIT=y
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++CONFIG_FAIR_GROUP_SCHED=y
++CONFIG_FAIR_USER_SCHED=y
++# CONFIG_FAIR_CGROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_RELAY=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++CONFIG_FUTEX=y
++CONFIG_ANON_INODES=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++# CONFIG_KMOD is not set
++CONFIG_BLOCK=y
++# CONFIG_LBD is not set
++# CONFIG_BLK_DEV_IO_TRACE is not set
++# CONFIG_LSF is not set
++# CONFIG_BLK_DEV_BSG is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++# CONFIG_IOSCHED_AS is not set
++# CONFIG_IOSCHED_DEADLINE is not set
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7001=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++CONFIG_BOARD_ATSTK1003=y
++# CONFIG_BOARD_ATSTK1004 is not set
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set
++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_NET_TCPPROBE is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++CONFIG_MTD_DATAFLASH=m
++CONFIG_MTD_M25P80=m
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=m
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++CONFIG_BLK_DEV_RAM=m
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_EEPROM_93CX6 is not set
++CONFIG_ATMEL_SSC=m
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_SCSI_DEBUG is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_PATA_AT32=m
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_MD is not set
++CONFIG_NETDEVICES=y
++# CONFIG_NETDEVICES_MULTIQUEUE is not set
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_NET_ETHERNET is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++# CONFIG_WLAN_80211 is not set
++# CONFIG_WAN is not set
++CONFIG_PPP=m
++# CONFIG_PPP_MULTILINK is not set
++# CONFIG_PPP_FILTER is not set
++CONFIG_PPP_ASYNC=m
++# CONFIG_PPP_SYNC_TTY is not set
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++# CONFIG_PPP_MPPE is not set
++# CONFIG_PPPOE is not set
++# CONFIG_PPPOL2TP is not set
++# CONFIG_SLIP is not set
++CONFIG_SLHC=m
++# CONFIG_SHAPER is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=m
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ATKBD is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++CONFIG_KEYBOARD_GPIO=m
++CONFIG_INPUT_MOUSE=y
++# CONFIG_MOUSE_PS2 is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++CONFIG_MOUSE_GPIO=m
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_I2C=m
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=m
++
++#
++# I2C Algorithms
++#
++CONFIG_I2C_ALGOBIT=m
++# CONFIG_I2C_ALGOPCF is not set
++# CONFIG_I2C_ALGOPCA is not set
++
++#
++# I2C Hardware Bus support
++#
++CONFIG_I2C_GPIO=m
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_SENSORS_DS1337 is not set
++# CONFIG_SENSORS_DS1374 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_EEPROM is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++CONFIG_SPI_SPIDEV=m
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Sound
++#
++CONFIG_SOUND=m
++
++#
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++
++#
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# SoC Audio support for SuperH
++#
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++# CONFIG_HID_SUPPORT is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++CONFIG_USB_GADGETFS=m
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++CONFIG_MMC=m
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD Card Drivers
++#
++CONFIG_MMC_BLOCK=m
++# CONFIG_MMC_BLOCK_BOUNCE is not set
++# CONFIG_SDIO_UART is not set
++
++#
++# MMC/SD Host Controller Drivers
++#
++CONFIG_MMC_SPI=m
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++CONFIG_LEDS_GPIO=y
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++CONFIG_UIO=m
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=m
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=m
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4DEV_FS is not set
++CONFIG_JBD=m
++# CONFIG_JBD_DEBUG is not set
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_ROMFS_FS is not set
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=m
++CONFIG_MSDOS_FS=m
++CONFIG_VFAT_FS=m
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++
++#
++# Miscellaneous filesystems
++#
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_CRAMFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++
++#
++# Partition Types
++#
++# CONFIG_PARTITION_ADVANCED is not set
++CONFIG_MSDOS_PARTITION=y
++CONFIG_NLS=m
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=m
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=m
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++# CONFIG_DLM is not set
++CONFIG_INSTRUMENTATION=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++# CONFIG_MARKERS is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++CONFIG_SCHED_DEBUG=y
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_INFO is not set
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++CONFIG_FRAME_POINTER=y
++CONFIG_FORCED_INLINING=y
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_LKDTM is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++CONFIG_CRC7=m
++# CONFIG_LIBCRC32C is not set
++CONFIG_AUDIT_GENERIC=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/configs/atstk1004_defconfig linux-avr32/arch/avr32/configs/atstk1004_defconfig
+--- linux-2.6.24/arch/avr32/configs/atstk1004_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/configs/atstk1004_defconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,621 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.24-rc7
++# Wed Jan  9 23:04:20 2008
++#
++CONFIG_AVR32=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_TIME=y
++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_ARCH_SUPPORTS_OPROFILE=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_BUG=y
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++# CONFIG_SYSVIPC is not set
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_AUDIT is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_FAIR_GROUP_SCHED is not set
++CONFIG_SYSFS_DEPRECATED=y
++# CONFIG_RELAY is not set
++# CONFIG_BLK_DEV_INITRD is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_EMBEDDED=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++# CONFIG_BASE_FULL is not set
++# CONFIG_FUTEX is not set
++# CONFIG_EPOLL is not set
++# CONFIG_SIGNALFD is not set
++# CONFIG_EVENTFD is not set
++CONFIG_SHMEM=y
++CONFIG_VM_EVENT_COUNTERS=y
++# CONFIG_SLAB is not set
++# CONFIG_SLUB is not set
++CONFIG_SLOB=y
++# CONFIG_TINY_SHMEM is not set
++CONFIG_BASE_SMALL=1
++# CONFIG_MODULES is not set
++# CONFIG_BLOCK is not set
++
++#
++# System Type and features
++#
++CONFIG_SUBARCH_AVR32B=y
++CONFIG_MMU=y
++CONFIG_PERFORMANCE_COUNTERS=y
++CONFIG_PLATFORM_AT32AP=y
++CONFIG_CPU_AT32AP700X=y
++CONFIG_CPU_AT32AP7002=y
++CONFIG_BOARD_ATSTK1000=y
++# CONFIG_BOARD_ATNGW100 is not set
++# CONFIG_BOARD_ATSTK1002 is not set
++# CONFIG_BOARD_ATSTK1003 is not set
++CONFIG_BOARD_ATSTK1004=y
++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set
++# CONFIG_BOARD_ATSTK100X_SPI1 is not set
++# CONFIG_BOARD_ATSTK1000_J2_LED is not set
++CONFIG_BOARD_ATSTK1000_EXTDAC=y
++CONFIG_LOADER_U_BOOT=y
++
++#
++# Atmel AVR32 AP options
++#
++# CONFIG_AP700X_32_BIT_SMC is not set
++CONFIG_AP700X_16_BIT_SMC=y
++# CONFIG_AP700X_8_BIT_SMC is not set
++CONFIG_LOAD_ADDRESS=0x10000000
++CONFIG_ENTRY_ADDRESS=0x90000000
++CONFIG_PHYS_OFFSET=0x10000000
++CONFIG_PREEMPT_NONE=y
++# CONFIG_PREEMPT_VOLUNTARY is not set
++# CONFIG_PREEMPT is not set
++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set
++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set
++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set
++CONFIG_ARCH_FLATMEM_ENABLE=y
++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++# CONFIG_SPARSEMEM_STATIC is not set
++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_RESOURCES_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_OWNERSHIP_TRACE is not set
++# CONFIG_HZ_100 is not set
++CONFIG_HZ_250=y
++# CONFIG_HZ_300 is not set
++# CONFIG_HZ_1000 is not set
++CONFIG_HZ=250
++CONFIG_CMDLINE=""
++
++#
++# Power management options
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++# CONFIG_CPU_FREQ_DEBUG is not set
++# CONFIG_CPU_FREQ_STAT is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++CONFIG_CPU_FREQ_GOV_ONDEMAND=y
++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_AT32AP=y
++
++#
++# Bus options
++#
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++
++#
++# Executable file formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Networking
++#
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++# CONFIG_IP_MULTICAST is not set
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_PNP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++# CONFIG_INET_LRO is not set
++# CONFIG_INET_DIAG is not set
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++
++#
++# Wireless
++#
++# CONFIG_CFG80211 is not set
++# CONFIG_WIRELESS_EXT is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_IEEE80211 is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++# CONFIG_PREVENT_FIRMWARE_BUILD is not set
++# CONFIG_FW_LOADER is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_GEN_PROBE=y
++# CONFIG_MTD_CFI_ADV_OPTIONS is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_CFI_INTELEXT is not set
++CONFIG_MTD_CFI_AMDSTD=y
++# CONFIG_MTD_CFI_STAA is not set
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++CONFIG_MTD_PHYSMAP_START=0x8000000
++CONFIG_MTD_PHYSMAP_LEN=0x0
++CONFIG_MTD_PHYSMAP_BANKWIDTH=2
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++# CONFIG_MTD_M25P80 is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++# CONFIG_MTD_NAND is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# UBI - Unsorted block images
++#
++# CONFIG_MTD_UBI is not set
++# CONFIG_PARPORT is not set
++# CONFIG_MISC_DEVICES is not set
++
++#
++# SCSI device support
++#
++# CONFIG_SCSI_DMA is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_NETDEVICES is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++# CONFIG_INPUT is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_ATMEL=y
++CONFIG_SERIAL_ATMEL_CONSOLE=y
++# CONFIG_SERIAL_ATMEL_TTYAT is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++CONFIG_UNIX98_PTYS=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_RTC is not set
++# CONFIG_GEN_RTC is not set
++# CONFIG_R3964 is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_I2C is not set
++
++#
++# SPI support
++#
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_ATMEL=y
++# CONFIG_SPI_BITBANG is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_AT25 is not set
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_WATCHDOG=y
++# CONFIG_WATCHDOG_NOWAYOUT is not set
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++CONFIG_AT32AP700X_WDT=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB_POSSIBLE=y
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_SM501 is not set
++
++#
++# Multimedia devices
++#
++# CONFIG_VIDEO_DEV is not set
++# CONFIG_DVB_CORE is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_SYS_FOPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_S1D13XXX is not set
++CONFIG_FB_ATMEL=y
++# CONFIG_FB_VIRTUAL is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_LCD_CLASS_DEVICE=y
++CONFIG_LCD_LTV350QV=y
++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_LOGO is not set
++
++#
++# Sound
++#
++# CONFIG_SOUND is not set
++CONFIG_USB_SUPPORT=y
++# CONFIG_USB_ARCH_HAS_HCD is not set
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++# CONFIG_USB_ARCH_HAS_EHCI is not set
++
++#
++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
++#
++
++#
++# USB Gadget Support
++#
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++CONFIG_USB_GADGET_ATMEL_USBA=y
++CONFIG_USB_ATMEL_USBA=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_PXA2XX is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_ETH=y
++# CONFIG_USB_ETH_RNDIS is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_MMC is not set
++# CONFIG_NEW_LEDS is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++# CONFIG_RTC_INTF_PROC is not set
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_AT32AP700X=y
++
++#
++# Userspace I/O
++#
++# CONFIG_UIO is not set
++
++#
++# File systems
++#
++# CONFIG_INOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_KCORE=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++
++#
++# Miscellaneous filesystems
++#
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++# CONFIG_JFFS2_FS_WRITEBUFFER is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++# CONFIG_NETWORK_FILESYSTEMS is not set
++# CONFIG_NLS is not set
++# CONFIG_DLM is not set
++# CONFIG_INSTRUMENTATION is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
++# CONFIG_SAMPLES is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++# CONFIG_CRYPTO is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++# CONFIG_CRC_CCITT is not set
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.c linux-avr32/arch/avr32/drivers/dw-dmac.c
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,761 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/dmapool.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++
++#include "dw-dmac.h"
++
++#define DMAC_NR_CHANNELS 3
++#define DMAC_MAX_BLOCKSIZE 4095
++
++enum {
++	CH_STATE_FREE = 0,
++	CH_STATE_ALLOCATED,
++	CH_STATE_BUSY,
++};
++
++struct dw_dma_lli {
++	dma_addr_t	sar;
++	dma_addr_t	dar;
++	dma_addr_t	llp;
++	u32		ctllo;
++	u32		ctlhi;
++	u32		sstat;
++	u32		dstat;
++};
++
++struct dw_dma_block {
++	struct dw_dma_lli *lli_vaddr;
++	dma_addr_t lli_dma_addr;
++};
++
++struct dw_dma_channel {
++	unsigned int state;
++        int is_cyclic;
++	struct dma_request_sg *req_sg;
++	struct dma_request_cyclic *req_cyclic;
++	unsigned int nr_blocks;
++	int direction;
++	struct dw_dma_block *block;
++};
++
++struct dw_dma_controller {
++	spinlock_t lock;
++	void * __iomem	regs;
++	struct dma_pool *lli_pool;
++	struct clk *hclk;
++	struct dma_controller dma;
++	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
++};
++#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
++
++#define dmac_writel_hi(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_readl_hi(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
++#define dmac_writel_lo(dmac, reg, value) \
++	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
++#define dmac_readl_lo(dmac, reg) \
++	__raw_readl((dmac)->regs + DW_DMAC_##reg)
++#define dmac_chan_writel_hi(dmac, chan, reg, value) \
++	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
++			       + DW_DMAC_CHAN_##reg + 4))
++#define dmac_chan_readl_hi(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
++#define dmac_chan_writel_lo(dmac, chan, reg, value) \
++	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define dmac_chan_readl_lo(dmac, chan, reg) \
++	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
++#define set_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
++#define clear_channel_bit(dmac, reg, chan) \
++	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
++
++static int dmac_alloc_channel(struct dma_controller *_dmac)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long flags;
++	int i;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++	for (i = 0; i < DMAC_NR_CHANNELS; i++)
++		if (dmac->channel[i].state == CH_STATE_FREE)
++			break;
++
++	if (i < DMAC_NR_CHANNELS) {
++		chan = &dmac->channel[i];
++		chan->state = CH_STATE_ALLOCATED;
++	} else {
++		i = -EBUSY;
++	}
++
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	return i;
++}
++
++static void dmac_release_channel(struct dma_controller *_dmac, int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS
++	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
++
++	dmac->channel[channel].state = CH_STATE_FREE;
++}
++
++static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
++					    unsigned int nr_blocks)
++{
++	struct dw_dma_block *block;
++	void *p;
++	unsigned int i;
++
++	block = kmalloc(nr_blocks * sizeof(*block),
++			GFP_KERNEL);
++	if (unlikely(!block))
++		return NULL;
++
++	for (i = 0; i < nr_blocks; i++) {
++		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
++				   &block[i].lli_dma_addr);
++		block[i].lli_vaddr = p;
++		if (unlikely(!p))
++			goto fail;
++	}
++
++	return block;
++
++fail:
++	for (i = 0; i < nr_blocks; i++) {
++		if (!block[i].lli_vaddr)
++			break;
++		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
++			      block[i].lli_dma_addr);
++	}
++	kfree(block);
++	return NULL;
++}
++
++static void cleanup_channel(struct dw_dma_controller *dmac,
++			    struct dw_dma_channel *chan)
++{
++	unsigned int i;
++
++	if (chan->nr_blocks > 1) {
++		for (i = 0; i < chan->nr_blocks; i++)
++			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
++				      chan->block[i].lli_dma_addr);
++		kfree(chan->block);
++	}
++
++	chan->state = CH_STATE_ALLOCATED;
++}
++
++static int dmac_prepare_request_sg(struct dma_controller *_dmac,
++				   struct dma_request_sg *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->req_sg = req;
++	chan->is_cyclic = 0;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++	 * There may be limitations in the driver and/or the DMA
++	 * controller that prevents us from sending a whole
++	 * scatterlist item in one go.  Taking this into account,
++	 * calculate the number of block transfers we need to set up.
++	 *
++	 * FIXME: Let the peripheral driver know about the maximum
++	 * block size we support. We really don't want to use a
++	 * different block size than what was suggested by the
++	 * peripheral.
++	 *
++	 * Each block will get its own Linked List Item (LLI) below.
++	 */
++	block_size = req->block_size;
++	nr_blocks = req->nr_blocks;
++	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
++		 block_size, nr_blocks, req->nr_sg);
++
++	BUG_ON(nr_blocks == 0);
++	chan->nr_blocks = nr_blocks;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size >> req->width;
++	ctllo = ((req->direction << 20)
++		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++	if (nr_blocks == 1) {
++		/* Only one block: No need to use block chaining */
++		if (direction == DMA_TO_DEVICE) {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->sg->dma_address);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->data_reg);
++			ctllo |= 2 << 7; // no dst increment
++		} else {
++			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
++					    req->data_reg);
++			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
++					    req->sg->dma_address);
++			ctllo |= 2 << 9; // no src increment
++		}
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
++		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
++	} else {
++		struct dw_dma_lli *lli, *lli_prev = NULL;
++		int j = 0, offset = 0;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, nr_blocks);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Map scatterlist items to blocks. One scatterlist
++		 * item may need more than one block for the reasons
++		 * mentioned above.
++		 */
++		for (i = 0; i < nr_blocks; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++					 i - 1, chan->block[i - 1].lli_vaddr,
++					 chan->block[i - 1].lli_dma_addr,
++					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
++					 lli_prev->ctllo, lli_prev->ctlhi);
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->sg[j].dma_address + offset;
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->sg[j].dma_address + offset;
++			}
++			lli_prev = lli;
++
++			offset += block_size;
++			if (offset > req->sg[j].length) {
++				j++;
++				offset = 0;
++			}
++		}
++
++		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++			 i - 1, chan->block[i - 1].lli_vaddr,
++			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++			 lli_prev->dar, lli_prev->llp,
++			 lli_prev->ctllo, lli_prev->ctlhi);
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	set_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
++                                       struct dma_request_cyclic *req)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++	unsigned long ctlhi, ctllo, cfghi, cfglo;
++	unsigned long block_size;
++	int ret, i, direction;
++	unsigned long flags;
++
++	spin_lock_irqsave(&dmac->lock, flags);
++
++        block_size = (req->buffer_size/req->periods) >> req->width;
++
++	ret = -EINVAL;
++	if (req->req.channel >= DMAC_NR_CHANNELS
++	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
++            || (req->periods == 0)
++	    || block_size > DMAC_MAX_BLOCKSIZE) {
++		spin_unlock_irqrestore(&dmac->lock, flags);
++		return -EINVAL;
++	}
++
++	chan = &dmac->channel[req->req.channel];
++	chan->state = CH_STATE_BUSY;
++	chan->is_cyclic = 1;
++        chan->req_cyclic = req;
++
++	/*
++	 * We have marked the channel as busy, so no need to keep the
++	 * lock as long as we only touch the channel-specific
++	 * registers
++	 */
++	spin_unlock_irqrestore(&dmac->lock, flags);
++
++	/*
++          Setup
++	 */
++	BUG_ON(req->buffer_size % req->periods);
++	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
++
++	chan->nr_blocks = req->periods;
++
++	ret = -EINVAL;
++	cfglo = cfghi = 0;
++	switch (req->direction) {
++	case DMA_DIR_MEM_TO_PERIPH:
++		direction = DMA_TO_DEVICE;
++		cfghi = req->periph_id << (43 - 32);
++		break;
++
++	case DMA_DIR_PERIPH_TO_MEM:
++		direction = DMA_FROM_DEVICE;
++		cfghi = req->periph_id << (39 - 32);
++		break;
++	default:
++		goto out_unclaim_channel;
++	}
++
++        chan->direction = direction;
++
++	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
++	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
++
++	ctlhi = block_size;
++	ctllo = ((req->direction << 20)
++		 | (req->width << 4) | (req->width << 1)
++		 | (1 << 0));		 // interrupt enable
++
++        {
++		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
++
++		ret = -ENOMEM;
++		chan->block = allocate_blocks(dmac, req->periods);
++		if (!chan->block)
++			goto out_unclaim_channel;
++
++		if (direction == DMA_TO_DEVICE)
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
++		else
++			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
++
++		/*
++		 * Set up a linked list items where each period gets
++		 * an item. The linked list item for the last period
++		 * points back to the star of the buffer making a
++		 * cyclic buffer.
++		 */
++		for (i = 0; i < req->periods; i++) {
++			lli = chan->block[i].lli_vaddr;
++			if (lli_prev) {
++				lli_prev->llp = chan->block[i].lli_dma_addr;
++				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++				   i - 1, chan->block[i - 1].lli_vaddr,
++				   chan->block[i - 1].lli_dma_addr,
++				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
++				   lli_prev->ctllo, lli_prev->ctlhi);*/
++			}
++			lli->llp = 0;
++			lli->ctllo = ctllo;
++			lli->ctlhi = ctlhi;
++			if (direction == DMA_TO_DEVICE) {
++				lli->sar = req->buffer_start + i*(block_size << req->width);
++				lli->dar = req->data_reg;
++			} else {
++				lli->sar = req->data_reg;
++				lli->dar = req->buffer_start + i*(block_size << req->width);
++			}
++			lli_prev = lli;
++		}
++		lli->llp = chan->block[0].lli_dma_addr;
++
++		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
++		  i - 1, chan->block[i - 1].lli_vaddr,
++		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
++		  lli_prev->dar, lli_prev->llp,
++		  lli_prev->ctllo, lli_prev->ctlhi); */
++
++		/*
++		 * SAR, DAR and CTL are initialized from the LLI. We
++		 * only have to enable the LLI bits in CTL.
++		 */
++		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
++				    chan->block[0].lli_dma_addr);
++		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
++	}
++
++	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
++	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
++	if (req->req.block_complete)
++		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++	else
++		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
++
++	return 0;
++
++out_unclaim_channel:
++	chan->state = CH_STATE_ALLOCATED;
++	return ret;
++}
++
++static int dmac_start_request(struct dma_controller *_dmac,
++			      unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	set_channel_bit(dmac, CH_EN, channel);
++
++	return 0;
++}
++
++static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
++                                       unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++        dma_addr_t current_pos;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++        chan = &dmac->channel[channel];
++
++	switch (chan->direction) {
++	case DMA_TO_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
++		break;
++	case DMA_FROM_DEVICE:
++		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
++		break;
++	default:
++		return 0;
++	}
++
++
++        if (!current_pos) {
++		if (chan->is_cyclic) {
++			current_pos = chan->req_cyclic->buffer_start;
++		} else {
++			current_pos = chan->req_sg->sg->dma_address;
++		}
++	}
++
++	return current_pos;
++}
++
++
++static int dmac_stop_request(struct dma_controller *_dmac,
++                             unsigned int channel)
++{
++	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
++	struct dw_dma_channel *chan;
++
++	BUG_ON(channel >= DMAC_NR_CHANNELS);
++
++	chan = &dmac->channel[channel];
++	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
++		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
++		 dmac_chan_readl_lo(dmac, channel, DAR),
++		 dmac_chan_readl_lo(dmac, channel, LLP),
++		 dmac_chan_readl_hi(dmac, channel, CTL),
++		 dmac_chan_readl_lo(dmac, channel, CTL));
++
++	if (chan->state == CH_STATE_BUSY) {
++		clear_channel_bit(dmac, CH_EN, channel);
++		cleanup_channel(dmac, &dmac->channel[channel]);
++	}
++
++	return 0;
++}
++
++
++static void dmac_block_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_BLOCK);
++
++	while (status) {
++		struct dma_request *req;
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic
++			       || !chan->req_cyclic->req.block_complete);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
++			req = &chan->req_sg->req;
++                }
++		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
++		req->block_complete(req);
++		status = dmac_readl_lo(dmac, STATUS_BLOCK);
++	}
++}
++
++static void dmac_xfer_complete(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	struct dma_request *req;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_XFER);
++
++	while (status) {
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
++
++                req = &chan->req_sg->req;
++                BUG_ON(!req);
++                cleanup_channel(dmac, chan);
++                if (req->xfer_complete)
++			req->xfer_complete(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static void dmac_error(struct dw_dma_controller *dmac)
++{
++	struct dw_dma_channel *chan;
++	unsigned long status, chanid;
++
++	status = dmac_readl_lo(dmac, STATUS_ERROR);
++
++	while (status) {
++		struct dma_request *req;
++
++		chanid = __ffs(status);
++		chan = &dmac->channel[chanid];
++
++		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
++		clear_channel_bit(dmac, CH_EN, chanid);
++
++                if (chan->is_cyclic) {
++			BUG_ON(!chan->req_cyclic);
++			req = &chan->req_cyclic->req;
++                } else {
++			BUG_ON(!chan->req_sg);
++			req = &chan->req_sg->req;
++                }
++
++		cleanup_channel(dmac, chan);
++		if (req->error)
++			req->error(req);
++
++		status = dmac_readl_lo(dmac, STATUS_XFER);
++	}
++}
++
++static irqreturn_t dmac_interrupt(int irq, void *dev_id)
++{
++	struct dw_dma_controller *dmac = dev_id;
++	unsigned long status;
++	int ret = IRQ_NONE;
++
++	spin_lock(&dmac->lock);
++
++	status = dmac_readl_lo(dmac, STATUS_INT);
++
++	while (status) {
++		ret = IRQ_HANDLED;
++		if (status & 0x10)
++			dmac_error(dmac);
++		if (status & 0x02)
++			dmac_block_complete(dmac);
++		if (status & 0x01)
++			dmac_xfer_complete(dmac);
++
++		status = dmac_readl_lo(dmac, STATUS_INT);
++	}
++
++	spin_unlock(&dmac->lock);
++	return ret;
++}
++
++static int __devinit dmac_probe(struct platform_device *pdev)
++{
++	struct dw_dma_controller *dmac;
++	struct resource *regs;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
++	if (!dmac)
++		return -ENOMEM;
++	memset(dmac, 0, sizeof(*dmac));
++
++	dmac->hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(dmac->hclk)) {
++		ret = PTR_ERR(dmac->hclk);
++		goto out_free_dmac;
++	}
++	clk_enable(dmac->hclk);
++
++	ret = -ENOMEM;
++	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
++					 sizeof(struct dw_dma_lli), 4, 0);
++	if (!dmac->lli_pool)
++		goto out_disable_clk;
++
++	spin_lock_init(&dmac->lock);
++	dmac->dma.dev = &pdev->dev;
++	dmac->dma.alloc_channel = dmac_alloc_channel;
++	dmac->dma.release_channel = dmac_release_channel;
++	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
++	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
++	dmac->dma.start_request = dmac_start_request;
++	dmac->dma.stop_request = dmac_stop_request;
++	dmac->dma.get_current_pos = dmac_get_current_pos;
++
++	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dmac->regs)
++		goto out_free_pool;
++
++	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
++			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* Enable the DMA controller */
++	dmac_writel_lo(dmac, CFG, 1);
++
++	register_dma_controller(&dmac->dma);
++
++	printk(KERN_INFO
++	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
++	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
++
++	return 0;
++
++out_unmap_regs:
++	iounmap(dmac->regs);
++out_free_pool:
++	dma_pool_destroy(dmac->lli_pool);
++out_disable_clk:
++	clk_disable(dmac->hclk);
++	clk_put(dmac->hclk);
++out_free_dmac:
++	kfree(dmac);
++	return ret;
++}
++
++static struct platform_driver dmac_driver = {
++	.probe		= dmac_probe,
++	.driver		= {
++		.name		= "dmaca",
++	},
++};
++
++static int __init dmac_init(void)
++{
++	return platform_driver_register(&dmac_driver);
++}
++subsys_initcall(dmac_init);
++
++static void __exit dmac_exit(void)
++{
++	platform_driver_unregister(&dmac_driver);
++}
++module_exit(dmac_exit);
++
++MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/arch/avr32/drivers/dw-dmac.h linux-avr32/arch/avr32/drivers/dw-dmac.h
+--- linux-2.6.24/arch/avr32/drivers/dw-dmac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/dw-dmac.h	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,42 @@
++/*
++ * Driver for the Synopsys DesignWare DMA Controller
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __AVR32_DW_DMAC_H__
++#define __AVR32_DW_DMAC_H__
++
++#define DW_DMAC_CFG		0x398
++#define DW_DMAC_CH_EN		0x3a0
++
++#define DW_DMAC_STATUS_XFER	0x2e8
++#define DW_DMAC_STATUS_BLOCK	0x2f0
++#define DW_DMAC_STATUS_ERROR	0x308
++
++#define DW_DMAC_MASK_XFER	0x310
++#define DW_DMAC_MASK_BLOCK	0x318
++#define DW_DMAC_MASK_ERROR	0x330
++
++#define DW_DMAC_CLEAR_XFER	0x338
++#define DW_DMAC_CLEAR_BLOCK	0x340
++#define DW_DMAC_CLEAR_ERROR	0x358
++
++#define DW_DMAC_STATUS_INT	0x360
++
++#define DW_DMAC_CHAN_SAR	0x000
++#define DW_DMAC_CHAN_DAR	0x008
++#define DW_DMAC_CHAN_LLP	0x010
++#define DW_DMAC_CHAN_CTL	0x018
++#define DW_DMAC_CHAN_SSTAT	0x020
++#define DW_DMAC_CHAN_DSTAT	0x028
++#define DW_DMAC_CHAN_SSTATAR	0x030
++#define DW_DMAC_CHAN_DSTATAR	0x038
++#define DW_DMAC_CHAN_CFG	0x040
++#define DW_DMAC_CHAN_SGR	0x048
++#define DW_DMAC_CHAN_DSR	0x050
++
++#endif /* __AVR32_DW_DMAC_H__ */
+diff -Nrup linux-2.6.24/arch/avr32/drivers/Makefile linux-avr32/arch/avr32/drivers/Makefile
+--- linux-2.6.24/arch/avr32/drivers/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/drivers/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig linux-avr32/arch/avr32/Kconfig
+--- linux-2.6.24/arch/avr32/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32
+ config ARCH_HAS_ILOG2_U64
+ 	def_bool n
+ 
++config ARCH_SUPPORTS_OPROFILE
++	def_bool y
++
+ config GENERIC_HWEIGHT
+ 	def_bool y
+ 
+@@ -81,19 +84,23 @@ config PLATFORM_AT32AP
+ 	select MMU
+ 	select PERFORMANCE_COUNTERS
+ 
+-choice
+-	prompt "AVR32 CPU type"
+-	default CPU_AT32AP7000
++#
++# CPU types
++#
+ 
+-config CPU_AT32AP7000
+-	bool "AT32AP7000"
++# AP7000 derivatives
++config CPU_AT32AP700X
++	bool
+ 	select PLATFORM_AT32AP
+-endchoice
+-
+-#
+-# CPU Daughterboards for ATSTK1000
+-config BOARD_ATSTK1002
++config CPU_AT32AP7000
++	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7001
+ 	bool
++	select CPU_AT32AP700X
++config CPU_AT32AP7002
++	bool
++	select CPU_AT32AP700X
+ 
+ choice
+ 	prompt "AVR32 board type"
+@@ -101,15 +108,18 @@ choice
+ 
+ config BOARD_ATSTK1000
+ 	bool "ATSTK1000 evaluation board"
+-	select BOARD_ATSTK1002 if CPU_AT32AP7000
+ 
+ config BOARD_ATNGW100
+ 	bool "ATNGW100 Network Gateway"
++	select CPU_AT32AP7000
+ endchoice
+ 
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig"
+ 
+ config LOAD_ADDRESS
+ 	hex
+-	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config ENTRY_ADDRESS
+ 	hex
+-	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
++	default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y
+ 
+ config PHYS_OFFSET
+ 	hex
+-	default 0x10000000 if CPU_AT32AP7000=y
++	default 0x10000000 if CPU_AT32AP700X=y
+ 
+ source "kernel/Kconfig.preempt"
+ 
+@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config NMI_DEBUGGING
++	bool "NMI Debugging"
++	default n
++	help
++	  Say Y here and pass the nmi_debug command-line parameter to
++	  the kernel to turn on NMI debugging. Depending on the value
++	  of the nmi_debug option, various pieces of information will
++	  be dumped to the console when a Non-Maskable Interrupt
++	  happens.
++
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+@@ -219,6 +243,8 @@ source "drivers/Kconfig"
+ 
+ source "fs/Kconfig"
+ 
++source "kernel/Kconfig.instrumentation"
++
+ source "arch/avr32/Kconfig.debug"
+ 
+ source "security/Kconfig"
+diff -Nrup linux-2.6.24/arch/avr32/Kconfig.debug linux-avr32/arch/avr32/Kconfig.debug
+--- linux-2.6.24/arch/avr32/Kconfig.debug	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Kconfig.debug	2008-02-01 14:51:35.000000000 -0500
+@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT
+ 
+ source "lib/Kconfig.debug"
+ 
+-config KPROBES
+-	bool "Kprobes"
+-	depends on DEBUG_KERNEL
+-	help
+-	  Kprobes allows you to trap at almost any kernel address and
+-          execute a callback function.  register_kprobe() establishes
+-          a probepoint and specifies the callback.  Kprobes is useful
+-          for kernel debugging, non-intrusive instrumentation and testing.
+-          If in doubt, say "N".
+-
+ endmenu
+diff -Nrup linux-2.6.24/arch/avr32/kernel/cpu.c linux-avr32/arch/avr32/kernel/cpu.c
+--- linux-2.6.24/arch/avr32/kernel/cpu.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/cpu.c	2008-02-01 14:51:35.000000000 -0500
+@@ -13,6 +13,7 @@
+ #include <linux/percpu.h>
+ #include <linux/param.h>
+ #include <linux/errno.h>
++#include <linux/clk.h>
+ 
+ #include <asm/setup.h>
+ #include <asm/sysreg.h>
+@@ -187,9 +188,20 @@ static int __init topology_init(void)
+ 
+ subsys_initcall(topology_init);
+ 
++struct chip_id_map {
++	u16	mid;
++	u16	pn;
++	const char *name;
++};
++
++static const struct chip_id_map chip_names[] = {
++	{ .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" },
++};
++#define NR_CHIP_NAMES ARRAY_SIZE(chip_names)
++
+ static const char *cpu_names[] = {
+ 	"Morgan",
+-	"AP7000",
++	"AP7",
+ };
+ #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
+ 
+@@ -206,12 +218,32 @@ static const char *mmu_types[] = {
+ 	"MPU"
+ };
+ 
++static const char *cpu_feature_flags[] = {
++	"rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu",
++};
++
++static const char *get_chip_name(struct avr32_cpuinfo *cpu)
++{
++	unsigned int i;
++	unsigned int mid = avr32_get_manufacturer_id(cpu);
++	unsigned int pn = avr32_get_product_number(cpu);
++
++	for (i = 0; i < NR_CHIP_NAMES; i++) {
++		if (chip_names[i].mid == mid && chip_names[i].pn == pn)
++			return chip_names[i].name;
++	}
++
++	return "(unknown)";
++}
++
+ void __init setup_processor(void)
+ {
+ 	unsigned long config0, config1;
+ 	unsigned long features;
+ 	unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
++	unsigned device_id;
+ 	unsigned tmp;
++	unsigned i;
+ 
+ 	config0 = sysreg_read(CONFIG0);
+ 	config1 = sysreg_read(CONFIG1);
+@@ -221,11 +253,14 @@ void __init setup_processor(void)
+ 	arch_rev = SYSREG_BFEXT(AR, config0);
+ 	mmu_type = SYSREG_BFEXT(MMUT, config0);
+ 
++	device_id = ocd_read(DID);
++
+ 	boot_cpu_data.arch_type = arch_id;
+ 	boot_cpu_data.cpu_type = cpu_id;
+ 	boot_cpu_data.arch_revision = arch_rev;
+ 	boot_cpu_data.cpu_revision = cpu_rev;
+ 	boot_cpu_data.tlb_config = mmu_type;
++	boot_cpu_data.device_id = device_id;
+ 
+ 	tmp = SYSREG_BFEXT(ILSZ, config1);
+ 	if (tmp) {
+@@ -247,41 +282,34 @@ void __init setup_processor(void)
+ 		return;
+ 	}
+ 
+-	printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
++	printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
++	printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n",
+ 		cpu_names[cpu_id], cpu_id, cpu_rev,
+ 		arch_names[arch_id], arch_rev);
+ 	printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
+ 
+ 	printk ("CPU: features:");
+ 	features = 0;
+-	if (config0 & SYSREG_BIT(CONFIG0_R)) {
++	if (config0 & SYSREG_BIT(CONFIG0_R))
+ 		features |= AVR32_FEATURE_RMW;
+-		printk(" rmw");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_D)) {
++	if (config0 & SYSREG_BIT(CONFIG0_D))
+ 		features |= AVR32_FEATURE_DSP;
+-		printk(" dsp");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_S)) {
++	if (config0 & SYSREG_BIT(CONFIG0_S))
+ 		features |= AVR32_FEATURE_SIMD;
+-		printk(" simd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_O)) {
++	if (config0 & SYSREG_BIT(CONFIG0_O))
+ 		features |= AVR32_FEATURE_OCD;
+-		printk(" ocd");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_P)) {
++	if (config0 & SYSREG_BIT(CONFIG0_P))
+ 		features |= AVR32_FEATURE_PCTR;
+-		printk(" perfctr");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_J)) {
++	if (config0 & SYSREG_BIT(CONFIG0_J))
+ 		features |= AVR32_FEATURE_JAVA;
+-		printk(" java");
+-	}
+-	if (config0 & SYSREG_BIT(CONFIG0_F)) {
++	if (config0 & SYSREG_BIT(CONFIG0_F))
+ 		features |= AVR32_FEATURE_FPU;
+-		printk(" fpu");
+-	}
++
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (features & (1 << i))
++			printk(" %s", cpu_feature_flags[i]);
++
+ 	printk("\n");
+ 	boot_cpu_data.features = features;
+ }
+@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, vo
+ {
+ 	unsigned int icache_size, dcache_size;
+ 	unsigned int cpu = smp_processor_id();
++	unsigned int freq;
++	unsigned int i;
+ 
+ 	icache_size = boot_cpu_data.icache.ways *
+ 		boot_cpu_data.icache.sets *
+@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, vo
+ 
+ 	seq_printf(m, "processor\t: %d\n", cpu);
+ 
++	seq_printf(m, "chip type\t: %s revision %c\n",
++			get_chip_name(&boot_cpu_data),
++			avr32_get_chip_revision(&boot_cpu_data) + 'A');
+ 	if (boot_cpu_data.arch_type < NR_ARCH_NAMES)
+-		seq_printf(m, "cpu family\t: %s revision %d\n",
++		seq_printf(m, "cpu arch\t: %s revision %d\n",
+ 			   arch_names[boot_cpu_data.arch_type],
+ 			   boot_cpu_data.arch_revision);
+ 	if (boot_cpu_data.cpu_type < NR_CPU_NAMES)
+-		seq_printf(m, "cpu type\t: %s revision %d\n",
++		seq_printf(m, "cpu core\t: %s revision %d\n",
+ 			   cpu_names[boot_cpu_data.cpu_type],
+ 			   boot_cpu_data.cpu_revision);
+ 
++	freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000;
++	seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000);
++
+ 	seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
+ 		   icache_size >> 10,
+ 		   boot_cpu_data.icache.ways,
+@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, vo
+ 		   boot_cpu_data.dcache.ways,
+ 		   boot_cpu_data.dcache.sets,
+ 		   boot_cpu_data.dcache.linesz);
+-	seq_printf(m, "bogomips\t: %lu.%02lu\n",
++
++	seq_printf(m, "features\t:");
++	for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++)
++		if (boot_cpu_data.features & (1 << i))
++			seq_printf(m, " %s", cpu_feature_flags[i]);
++
++	seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
+ 		   boot_cpu_data.loops_per_jiffy / (500000/HZ),
+ 		   (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100);
+ 
+@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, v
+ 
+ }
+ 
+-struct seq_operations cpuinfo_op = {
++const struct seq_operations cpuinfo_op = {
+ 	.start	= c_start,
+ 	.next	= c_next,
+ 	.stop	= c_stop,
+diff -Nrup linux-2.6.24/arch/avr32/kernel/dma-controller.c linux-avr32/arch/avr32/kernel/dma-controller.c
+--- linux-2.6.24/arch/avr32/kernel/dma-controller.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/dma-controller.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,34 @@
++/*
++ * Preliminary DMA controller framework for AVR32
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <asm/dma-controller.h>
++
++static LIST_HEAD(controllers);
++
++int register_dma_controller(struct dma_controller *dmac)
++{
++	static int next_id;
++
++	dmac->id = next_id++;
++	list_add_tail(&dmac->list, &controllers);
++
++	return 0;
++}
++EXPORT_SYMBOL(register_dma_controller);
++
++struct dma_controller *find_dma_controller(int id)
++{
++	struct dma_controller *dmac;
++
++	list_for_each_entry(dmac, &controllers, list)
++		if (dmac->id == id)
++			return dmac;
++	return NULL;
++}
++EXPORT_SYMBOL(find_dma_controller);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/irq.c linux-avr32/arch/avr32/kernel/irq.c
+--- linux-2.6.24/arch/avr32/kernel/irq.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/irq.c	2008-02-01 14:51:35.000000000 -0500
+@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq)
+ 	printk("unexpected IRQ %u\n", irq);
+ }
+ 
++/* May be overridden by platform code */
++int __weak nmi_enable(void)
++{
++	return -ENOSYS;
++}
++
++void __weak nmi_disable(void)
++{
++
++}
++
+ #ifdef CONFIG_PROC_FS
+ int show_interrupts(struct seq_file *p, void *v)
+ {
+diff -Nrup linux-2.6.24/arch/avr32/kernel/kprobes.c linux-avr32/arch/avr32/kernel/kprobes.c
+--- linux-2.6.24/arch/avr32/kernel/kprobes.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/kprobes.c	2008-02-01 14:51:35.000000000 -0500
+@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct
+ void __kprobes arch_arm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("arming kprobe at %p\n", p->addr);
++	ocd_enable(NULL);
+ 	*p->addr = BREAKPOINT_INSTRUCTION;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kp
+ void __kprobes arch_disarm_kprobe(struct kprobe *p)
+ {
+ 	pr_debug("disarming kprobe at %p\n", p->addr);
++	ocd_disable(NULL);
+ 	*p->addr = p->opcode;
+ 	flush_icache_range((unsigned long)p->addr,
+ 			   (unsigned long)p->addr + sizeof(kprobe_opcode_t));
+@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(stru
+ 
+ int __init arch_init_kprobes(void)
+ {
+-	printk("KPROBES: Enabling monitor mode (MM|DBE)...\n");
+-	ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
+-
+ 	/* TODO: Register kretprobe trampoline */
+ 	return 0;
+ }
+diff -Nrup linux-2.6.24/arch/avr32/kernel/Makefile linux-avr32/arch/avr32/kernel/Makefile
+--- linux-2.6.24/arch/avr32/kernel/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -6,9 +6,11 @@ extra-y				:= head.o vmlinux.lds
+ 
+ obj-$(CONFIG_SUBARCH_AVR32B)	+= entry-avr32b.o
+ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+-obj-y				+= setup.o traps.o semaphore.o ptrace.o
++obj-y				+= setup.o traps.o semaphore.o ocd.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+ obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
++obj-$(CONFIG_NMI_DEBUGGING)	+= nmi_debug.o
+diff -Nrup linux-2.6.24/arch/avr32/kernel/nmi_debug.c linux-avr32/arch/avr32/kernel/nmi_debug.c
+--- linux-2.6.24/arch/avr32/kernel/nmi_debug.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/nmi_debug.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/kdebug.h>
++#include <linux/notifier.h>
++#include <linux/sched.h>
++
++#include <asm/irq.h>
++
++enum nmi_action {
++	NMI_SHOW_STATE	= 1 << 0,
++	NMI_SHOW_REGS	= 1 << 1,
++	NMI_DIE		= 1 << 2,
++	NMI_DEBOUNCE	= 1 << 3,
++};
++
++static unsigned long nmi_actions;
++
++static int nmi_debug_notify(struct notifier_block *self,
++		unsigned long val, void *data)
++{
++	struct die_args *args = data;
++
++	if (likely(val != DIE_NMI))
++		return NOTIFY_DONE;
++
++	if (nmi_actions & NMI_SHOW_STATE)
++		show_state();
++	if (nmi_actions & NMI_SHOW_REGS)
++		show_regs(args->regs);
++	if (nmi_actions & NMI_DEBOUNCE)
++		mdelay(10);
++	if (nmi_actions & NMI_DIE)
++		return NOTIFY_BAD;
++
++	return NOTIFY_OK;
++}
++
++static struct notifier_block nmi_debug_nb = {
++	.notifier_call = nmi_debug_notify,
++};
++
++static int __init nmi_debug_setup(char *str)
++{
++	char *p, *sep;
++
++	register_die_notifier(&nmi_debug_nb);
++	if (nmi_enable()) {
++		printk(KERN_WARNING "Unable to enable NMI.\n");
++		return 0;
++	}
++
++	if (*str != '=')
++		return 0;
++
++	for (p = str + 1; *p; p = sep + 1) {
++		sep = strchr(p, ',');
++		if (sep)
++			*sep = 0;
++		if (strcmp(p, "state") == 0)
++			nmi_actions |= NMI_SHOW_STATE;
++		else if (strcmp(p, "regs") == 0)
++			nmi_actions |= NMI_SHOW_REGS;
++		else if (strcmp(p, "debounce") == 0)
++			nmi_actions |= NMI_DEBOUNCE;
++		else if (strcmp(p, "die") == 0)
++			nmi_actions |= NMI_DIE;
++		else
++			printk(KERN_WARNING "NMI: Unrecognized action `%s'\n",
++				p);
++		if (!sep)
++			break;
++	}
++
++	return 0;
++}
++__setup("nmi_debug", nmi_debug_setup);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ocd.c linux-avr32/arch/avr32/kernel/ocd.c
+--- linux-2.6.24/arch/avr32/kernel/ocd.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ocd.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,163 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/init.h>
++#include <linux/sched.h>
++#include <linux/spinlock.h>
++
++#include <asm/ocd.h>
++
++static long ocd_count;
++static spinlock_t ocd_lock;
++
++/**
++ * ocd_enable - enable on-chip debugging
++ * @child: task to be debugged
++ *
++ * If @child is non-NULL, ocd_enable() first checks if debugging has
++ * already been enabled for @child, and if it has, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging
++ * has not already been enabled for it, ocd_enable() increments the
++ * reference count and enables the debugging hardware.
++ */
++void ocd_enable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (child)
++		pr_debug("ocd_enable: child=%s [%u]\n",
++				child->comm, child->pid);
++	else
++		pr_debug("ocd_enable (no child)\n");
++
++	if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count++;
++		dc = ocd_read(DC);
++		dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT);
++		ocd_write(DC, dc);
++		spin_unlock(&ocd_lock);
++	}
++}
++
++/**
++ * ocd_disable - disable on-chip debugging
++ * @child: task that was being debugged, but isn't anymore
++ *
++ * If @child is non-NULL, ocd_disable() checks if debugging is enabled
++ * for @child, and if it isn't, does nothing.
++ *
++ * If @child is NULL (e.g. when debugging the kernel), or debugging is
++ * enabled, ocd_disable() decrements the reference count, and if it
++ * reaches zero, disables the debugging hardware.
++ */
++void ocd_disable(struct task_struct *child)
++{
++	u32 dc;
++
++	if (!child)
++		pr_debug("ocd_disable (no child)\n");
++	else if (test_tsk_thread_flag(child, TIF_DEBUG))
++		pr_debug("ocd_disable: child=%s [%u]\n",
++				child->comm, child->pid);
++
++	if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) {
++		spin_lock(&ocd_lock);
++		ocd_count--;
++
++		WARN_ON(ocd_count < 0);
++
++		if (ocd_count <= 0) {
++			dc = ocd_read(DC);
++			dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT));
++			ocd_write(DC, dc);
++		}
++		spin_unlock(&ocd_lock);
++	}
++}
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/module.h>
++
++static struct dentry *ocd_debugfs_root;
++static struct dentry *ocd_debugfs_DC;
++static struct dentry *ocd_debugfs_DS;
++static struct dentry *ocd_debugfs_count;
++
++static u64 ocd_DC_get(void *data)
++{
++	return ocd_read(DC);
++}
++static void ocd_DC_set(void *data, u64 val)
++{
++	ocd_write(DC, val);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n");
++
++static u64 ocd_DS_get(void *data)
++{
++	return ocd_read(DS);
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n");
++
++static u64 ocd_count_get(void *data)
++{
++	return ocd_count;
++}
++DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n");
++
++static void ocd_debugfs_init(void)
++{
++	struct dentry *root;
++
++	root = debugfs_create_dir("ocd", NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	ocd_debugfs_root = root;
++
++	ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR,
++				root, NULL, &fops_DC);
++	if (!ocd_debugfs_DC)
++		goto err_DC;
++
++	ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root,
++				NULL, &fops_DS);
++	if (!ocd_debugfs_DS)
++		goto err_DS;
++
++	ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root,
++				NULL, &fops_count);
++	if (!ocd_debugfs_count)
++		goto err_count;
++
++	return;
++
++err_count:
++	debugfs_remove(ocd_debugfs_DS);
++err_DS:
++	debugfs_remove(ocd_debugfs_DC);
++err_DC:
++	debugfs_remove(ocd_debugfs_root);
++err_root:
++	printk(KERN_WARNING "OCD: Failed to create debugfs entries\n");
++}
++#else
++static inline void ocd_debugfs_init(void)
++{
++
++}
++#endif
++
++static int __init ocd_init(void)
++{
++	spin_lock_init(&ocd_lock);
++	ocd_debugfs_init();
++	return 0;
++}
++arch_initcall(ocd_init);
+diff -Nrup linux-2.6.24/arch/avr32/kernel/process.c linux-avr32/arch/avr32/kernel/process.c
+--- linux-2.6.24/arch/avr32/kernel/process.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/process.c	2008-02-01 14:51:35.000000000 -0500
+@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread);
+  */
+ void exit_thread(void)
+ {
+-	/* nothing to do */
++	ocd_disable(current);
+ }
+ 
+ void flush_thread(void)
+@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long cl
+ 	p->thread.cpu_context.ksp = (unsigned long)childregs;
+ 	p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
+ 
++	if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG))
++		ocd_enable(p);
++
+ 	return 0;
+ }
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/ptrace.c linux-avr32/arch/avr32/kernel/ptrace.c
+--- linux-2.6.24/arch/avr32/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/ptrace.c	2008-02-01 14:51:35.000000000 -0500
+@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *
+ {
+ 	clear_tsk_thread_flag(child, TIF_SINGLE_STEP);
+ 	clear_tsk_thread_flag(child, TIF_BREAKPOINT);
++	ocd_disable(child);
+ }
+ 
+ /*
+@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *chi
+ {
+ 	int ret;
+ 
+-	pr_debug("ptrace: Enabling monitor mode...\n");
+-	ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT)
+-			| (1 << OCD_DC_DBE_BIT));
+-
+ 	switch (request) {
+ 	/* Read the word at location addr in the child process */
+ 	case PTRACE_PEEKTEXT:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/setup.c linux-avr32/arch/avr32/kernel/setup.c
+--- linux-2.6.24/arch/avr32/kernel/setup.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/setup.c	2008-02-01 14:51:35.000000000 -0500
+@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char
+ 			printk(KERN_WARNING
+ 			       "Failed to allocate framebuffer memory\n");
+ 			fbmem_size = 0;
++		} else {
++			memset(__va(fbmem_start), 0, fbmem_size);
+ 		}
+ 	}
+ 
+diff -Nrup linux-2.6.24/arch/avr32/kernel/signal.c linux-avr32/arch/avr32/kernel/signal.c
+--- linux-2.6.24/arch/avr32/kernel/signal.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/signal.c	2008-02-01 14:51:35.000000000 -0500
+@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigs
+ 	if (!user_mode(regs))
+ 		return 0;
+ 
+-	if (try_to_freeze()) {
+-		signr = 0;
+-		if (!signal_pending(current))
+-			goto no_signal;
+-	}
+-
+ 	if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ 		oldset = &current->saved_sigmask;
+ 	else if (!oldset)
+ 		oldset = &current->blocked;
+ 
+ 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+-no_signal:
+ 	if (syscall) {
+ 		switch (regs->r12) {
+ 		case -ERESTART_RESTARTBLOCK:
+diff -Nrup linux-2.6.24/arch/avr32/kernel/traps.c linux-avr32/arch/avr32/kernel/traps.c
+--- linux-2.6.24/arch/avr32/kernel/traps.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/kernel/traps.c	2008-02-01 14:51:35.000000000 -0500
+@@ -9,6 +9,7 @@
+ #include <linux/bug.h>
+ #include <linux/init.h>
+ #include <linux/kallsyms.h>
++#include <linux/kdebug.h>
+ #include <linux/module.h>
+ #include <linux/notifier.h>
+ #include <linux/sched.h>
+@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_re
+ 
+ asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
+ {
+-	printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n");
+-	show_regs_log_lvl(regs, KERN_ALERT);
+-	show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT);
++	int ret;
++
++	nmi_enter();
++
++	ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT);
++	switch (ret) {
++	case NOTIFY_OK:
++	case NOTIFY_STOP:
++		return;
++	case NOTIFY_BAD:
++		die("Fatal Non-Maskable Interrupt", regs, SIGINT);
++	default:
++		break;
++	}
++
++	printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
++	nmi_disable();
+ }
+ 
+ asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap7000.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap7000.c	1969-12-31 19:00:00.000000000 -0500
+@@ -1,1730 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#include <linux/clk.h>
+-#include <linux/fb.h>
+-#include <linux/init.h>
+-#include <linux/platform_device.h>
+-#include <linux/dma-mapping.h>
+-#include <linux/spi/spi.h>
+-
+-#include <asm/io.h>
+-
+-#include <asm/arch/at32ap7000.h>
+-#include <asm/arch/board.h>
+-#include <asm/arch/portmux.h>
+-
+-#include <video/atmel_lcdc.h>
+-
+-#include "clock.h"
+-#include "hmatrix.h"
+-#include "pio.h"
+-#include "pm.h"
+-
+-
+-#define PBMEM(base)					\
+-	{						\
+-		.start		= base,			\
+-		.end		= base + 0x3ff,		\
+-		.flags		= IORESOURCE_MEM,	\
+-	}
+-#define IRQ(num)					\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-#define NAMED_IRQ(num, _name)				\
+-	{						\
+-		.start		= num,			\
+-		.end		= num,			\
+-		.name		= _name,		\
+-		.flags		= IORESOURCE_IRQ,	\
+-	}
+-
+-/* REVISIT these assume *every* device supports DMA, but several
+- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
+- */
+-#define DEFINE_DEV(_name, _id)					\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-#define DEFINE_DEV_DATA(_name, _id)				\
+-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
+-static struct platform_device _name##_id##_device = {		\
+-	.name		= #_name,				\
+-	.id		= _id,					\
+-	.dev		= {					\
+-		.dma_mask = &_name##_id##_dma_mask,		\
+-		.platform_data	= &_name##_id##_data,		\
+-		.coherent_dma_mask = DMA_32BIT_MASK,		\
+-	},							\
+-	.resource	= _name##_id##_resource,		\
+-	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
+-}
+-
+-#define select_peripheral(pin, periph, flags)			\
+-	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
+-
+-#define DEV_CLK(_name, devname, bus, _index)			\
+-static struct clk devname##_##_name = {				\
+-	.name		= #_name,				\
+-	.dev		= &devname##_device.dev,		\
+-	.parent		= &bus##_clk,				\
+-	.mode		= bus##_clk_mode,			\
+-	.get_rate	= bus##_clk_get_rate,			\
+-	.index		= _index,				\
+-}
+-
+-static DEFINE_SPINLOCK(pm_lock);
+-
+-unsigned long at32ap7000_osc_rates[3] = {
+-	[0] = 32768,
+-	/* FIXME: these are ATSTK1002-specific */
+-	[1] = 20000000,
+-	[2] = 12000000,
+-};
+-
+-static unsigned long osc_get_rate(struct clk *clk)
+-{
+-	return at32ap7000_osc_rates[clk->index];
+-}
+-
+-static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
+-{
+-	unsigned long div, mul, rate;
+-
+-	if (!(control & PM_BIT(PLLEN)))
+-		return 0;
+-
+-	div = PM_BFEXT(PLLDIV, control) + 1;
+-	mul = PM_BFEXT(PLLMUL, control) + 1;
+-
+-	rate = clk->parent->get_rate(clk->parent);
+-	rate = (rate + div / 2) / div;
+-	rate *= mul;
+-
+-	return rate;
+-}
+-
+-static unsigned long pll0_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL0);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-static unsigned long pll1_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-
+-	control = pm_readl(PLL1);
+-
+-	return pll_get_rate(clk, control);
+-}
+-
+-/*
+- * The AT32AP7000 has five primary clock sources: One 32kHz
+- * oscillator, two crystal oscillators and two PLLs.
+- */
+-static struct clk osc32k = {
+-	.name		= "osc32k",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-static struct clk osc0 = {
+-	.name		= "osc0",
+-	.get_rate	= osc_get_rate,
+-	.users		= 1,
+-	.index		= 1,
+-};
+-static struct clk osc1 = {
+-	.name		= "osc1",
+-	.get_rate	= osc_get_rate,
+-	.index		= 2,
+-};
+-static struct clk pll0 = {
+-	.name		= "pll0",
+-	.get_rate	= pll0_get_rate,
+-	.parent		= &osc0,
+-};
+-static struct clk pll1 = {
+-	.name		= "pll1",
+-	.get_rate	= pll1_get_rate,
+-	.parent		= &osc0,
+-};
+-
+-/*
+- * The main clock can be either osc0 or pll0.  The boot loader may
+- * have chosen one for us, so we don't really know which one until we
+- * have a look at the SM.
+- */
+-static struct clk *main_clock;
+-
+-/*
+- * Synchronous clocks are generated from the main clock. The clocks
+- * must satisfy the constraint
+- *   fCPU >= fHSB >= fPB
+- * i.e. each clock must not be faster than its parent.
+- */
+-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
+-{
+-	return main_clock->get_rate(main_clock) >> shift;
+-};
+-
+-static void cpu_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(CPU_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(CPU_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long cpu_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(CPUDIV))
+-		shift = PM_BFEXT(CPUSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, child_div, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(CKSEL);
+-
+-	if (control & PM_BIT(HSBDIV))
+-		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
+-	else
+-		child_div = 1;
+-
+-	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(CPUDIV);
+-	} else {
+-		unsigned int cpusel;
+-		div = (parent_rate + rate / 2) / rate;
+-		if (div > child_div)
+-			div = child_div;
+-		cpusel = (div > 1) ? (fls(div) - 2) : 0;
+-		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
+-		actual_rate = parent_rate / (1 << (cpusel + 1));
+-	}
+-
+-	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
+-			clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(CKSEL, control);
+-
+-	return actual_rate;
+-}
+-
+-static void hsb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(HSB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(HSB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long hsb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(HSBDIV))
+-		shift = PM_BFEXT(HSBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pba_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBA_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBA_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pba_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBADIV))
+-		shift = PM_BFEXT(PBASEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static void pbb_clk_mode(struct clk *clk, int enabled)
+-{
+-	unsigned long flags;
+-	u32 mask;
+-
+-	spin_lock_irqsave(&pm_lock, flags);
+-	mask = pm_readl(PBB_MASK);
+-	if (enabled)
+-		mask |= 1 << clk->index;
+-	else
+-		mask &= ~(1 << clk->index);
+-	pm_writel(PBB_MASK, mask);
+-	spin_unlock_irqrestore(&pm_lock, flags);
+-}
+-
+-static unsigned long pbb_clk_get_rate(struct clk *clk)
+-{
+-	unsigned long cksel, shift = 0;
+-
+-	cksel = pm_readl(CKSEL);
+-	if (cksel & PM_BIT(PBBDIV))
+-		shift = PM_BFEXT(PBBSEL, cksel) + 1;
+-
+-	return bus_clk_get_rate(clk, shift);
+-}
+-
+-static struct clk cpu_clk = {
+-	.name		= "cpu",
+-	.get_rate	= cpu_clk_get_rate,
+-	.set_rate	= cpu_clk_set_rate,
+-	.users		= 1,
+-};
+-static struct clk hsb_clk = {
+-	.name		= "hsb",
+-	.parent		= &cpu_clk,
+-	.get_rate	= hsb_clk_get_rate,
+-};
+-static struct clk pba_clk = {
+-	.name		= "pba",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 1,
+-};
+-static struct clk pbb_clk = {
+-	.name		= "pbb",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 2,
+-};
+-
+-/* --------------------------------------------------------------------
+- *  Generic Clock operations
+- * -------------------------------------------------------------------- */
+-
+-static void genclk_mode(struct clk *clk, int enabled)
+-{
+-	u32 control;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (enabled)
+-		control |= PM_BIT(CEN);
+-	else
+-		control &= ~PM_BIT(CEN);
+-	pm_writel(GCCTRL(clk->index), control);
+-}
+-
+-static unsigned long genclk_get_rate(struct clk *clk)
+-{
+-	u32 control;
+-	unsigned long div = 1;
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(DIVEN))
+-		div = 2 * (PM_BFEXT(DIV, control) + 1);
+-
+-	return clk->parent->get_rate(clk->parent) / div;
+-}
+-
+-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
+-{
+-	u32 control;
+-	unsigned long parent_rate, actual_rate, div;
+-
+-	parent_rate = clk->parent->get_rate(clk->parent);
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (rate > 3 * parent_rate / 4) {
+-		actual_rate = parent_rate;
+-		control &= ~PM_BIT(DIVEN);
+-	} else {
+-		div = (parent_rate + rate) / (2 * rate) - 1;
+-		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
+-		actual_rate = parent_rate / (2 * (div + 1));
+-	}
+-
+-	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
+-		clk->name, rate, actual_rate);
+-
+-	if (apply)
+-		pm_writel(GCCTRL(clk->index), control);
+-
+-	return actual_rate;
+-}
+-
+-int genclk_set_parent(struct clk *clk, struct clk *parent)
+-{
+-	u32 control;
+-
+-	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
+-		clk->name, parent->name, clk->parent->name);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-
+-	if (parent == &osc1 || parent == &pll1)
+-		control |= PM_BIT(OSCSEL);
+-	else if (parent == &osc0 || parent == &pll0)
+-		control &= ~PM_BIT(OSCSEL);
+-	else
+-		return -EINVAL;
+-
+-	if (parent == &pll0 || parent == &pll1)
+-		control |= PM_BIT(PLLSEL);
+-	else
+-		control &= ~PM_BIT(PLLSEL);
+-
+-	pm_writel(GCCTRL(clk->index), control);
+-	clk->parent = parent;
+-
+-	return 0;
+-}
+-
+-static void __init genclk_init_parent(struct clk *clk)
+-{
+-	u32 control;
+-	struct clk *parent;
+-
+-	BUG_ON(clk->index > 7);
+-
+-	control = pm_readl(GCCTRL(clk->index));
+-	if (control & PM_BIT(OSCSEL))
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
+-	else
+-		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-
+-	clk->parent = parent;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System peripherals
+- * -------------------------------------------------------------------- */
+-static struct resource at32_pm0_resource[] = {
+-	{
+-		.start	= 0xfff00000,
+-		.end	= 0xfff0007f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(20),
+-};
+-
+-static struct resource at32ap700x_rtc0_resource[] = {
+-	{
+-		.start	= 0xfff00080,
+-		.end	= 0xfff000af,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(21),
+-};
+-
+-static struct resource at32_wdt0_resource[] = {
+-	{
+-		.start	= 0xfff000b0,
+-		.end	= 0xfff000cf,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-};
+-
+-static struct resource at32_eic0_resource[] = {
+-	{
+-		.start	= 0xfff00100,
+-		.end	= 0xfff0013f,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(19),
+-};
+-
+-DEFINE_DEV(at32_pm, 0);
+-DEFINE_DEV(at32ap700x_rtc, 0);
+-DEFINE_DEV(at32_wdt, 0);
+-DEFINE_DEV(at32_eic, 0);
+-
+-/*
+- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
+- * is always running.
+- */
+-static struct clk at32_pm_pclk = {
+-	.name		= "pclk",
+-	.dev		= &at32_pm0_device.dev,
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 0,
+-};
+-
+-static struct resource intc0_resource[] = {
+-	PBMEM(0xfff00400),
+-};
+-struct platform_device at32_intc0_device = {
+-	.name		= "intc",
+-	.id		= 0,
+-	.resource	= intc0_resource,
+-	.num_resources	= ARRAY_SIZE(intc0_resource),
+-};
+-DEV_CLK(pclk, at32_intc0, pbb, 1);
+-
+-static struct clk ebi_clk = {
+-	.name		= "ebi",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-};
+-static struct clk hramc_clk = {
+-	.name		= "hramc",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.users		= 1,
+-	.index		= 3,
+-};
+-
+-static struct resource smc0_resource[] = {
+-	PBMEM(0xfff03400),
+-};
+-DEFINE_DEV(smc, 0);
+-DEV_CLK(pclk, smc0, pbb, 13);
+-DEV_CLK(mck, smc0, hsb, 0);
+-
+-static struct platform_device pdc_device = {
+-	.name		= "pdc",
+-	.id		= 0,
+-};
+-DEV_CLK(hclk, pdc, hsb, 4);
+-DEV_CLK(pclk, pdc, pba, 16);
+-
+-static struct clk pico_clk = {
+-	.name		= "pico",
+-	.parent		= &cpu_clk,
+-	.mode		= cpu_clk_mode,
+-	.get_rate	= cpu_clk_get_rate,
+-	.users		= 1,
+-};
+-
+-static struct resource dmaca0_resource[] = {
+-	{
+-		.start	= 0xff200000,
+-		.end	= 0xff20ffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(2),
+-};
+-DEFINE_DEV(dmaca, 0);
+-DEV_CLK(hclk, dmaca0, hsb, 10);
+-
+-/* --------------------------------------------------------------------
+- * HMATRIX
+- * -------------------------------------------------------------------- */
+-
+-static struct clk hmatrix_clk = {
+-	.name		= "hmatrix_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 2,
+-	.users		= 1,
+-};
+-#define HMATRIX_BASE	((void __iomem *)0xfff00800)
+-
+-#define hmatrix_readl(reg)					\
+-	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
+-#define hmatrix_writel(reg,value)				\
+-	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
+-
+-/*
+- * Set bits in the HMATRIX Special Function Register (SFR) used by the
+- * External Bus Interface (EBI). This can be used to enable special
+- * features like CompactFlash support, NAND Flash support, etc. on
+- * certain chipselects.
+- */
+-static inline void set_ebi_sfr_bits(u32 mask)
+-{
+-	u32 sfr;
+-
+-	clk_enable(&hmatrix_clk);
+-	sfr = hmatrix_readl(SFR4);
+-	sfr |= mask;
+-	hmatrix_writel(SFR4, sfr);
+-	clk_disable(&hmatrix_clk);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  System Timer/Counter (TC)
+- * -------------------------------------------------------------------- */
+-static struct resource at32_systc0_resource[] = {
+-	PBMEM(0xfff00c00),
+-	IRQ(22),
+-};
+-struct platform_device at32_systc0_device = {
+-	.name		= "systc",
+-	.id		= 0,
+-	.resource	= at32_systc0_resource,
+-	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
+-};
+-DEV_CLK(pclk, at32_systc0, pbb, 3);
+-
+-/* --------------------------------------------------------------------
+- *  PIO
+- * -------------------------------------------------------------------- */
+-
+-static struct resource pio0_resource[] = {
+-	PBMEM(0xffe02800),
+-	IRQ(13),
+-};
+-DEFINE_DEV(pio, 0);
+-DEV_CLK(mck, pio0, pba, 10);
+-
+-static struct resource pio1_resource[] = {
+-	PBMEM(0xffe02c00),
+-	IRQ(14),
+-};
+-DEFINE_DEV(pio, 1);
+-DEV_CLK(mck, pio1, pba, 11);
+-
+-static struct resource pio2_resource[] = {
+-	PBMEM(0xffe03000),
+-	IRQ(15),
+-};
+-DEFINE_DEV(pio, 2);
+-DEV_CLK(mck, pio2, pba, 12);
+-
+-static struct resource pio3_resource[] = {
+-	PBMEM(0xffe03400),
+-	IRQ(16),
+-};
+-DEFINE_DEV(pio, 3);
+-DEV_CLK(mck, pio3, pba, 13);
+-
+-static struct resource pio4_resource[] = {
+-	PBMEM(0xffe03800),
+-	IRQ(17),
+-};
+-DEFINE_DEV(pio, 4);
+-DEV_CLK(mck, pio4, pba, 14);
+-
+-void __init at32_add_system_devices(void)
+-{
+-	platform_device_register(&at32_pm0_device);
+-	platform_device_register(&at32_intc0_device);
+-	platform_device_register(&at32ap700x_rtc0_device);
+-	platform_device_register(&at32_wdt0_device);
+-	platform_device_register(&at32_eic0_device);
+-	platform_device_register(&smc0_device);
+-	platform_device_register(&pdc_device);
+-	platform_device_register(&dmaca0_device);
+-
+-	platform_device_register(&at32_systc0_device);
+-
+-	platform_device_register(&pio0_device);
+-	platform_device_register(&pio1_device);
+-	platform_device_register(&pio2_device);
+-	platform_device_register(&pio3_device);
+-	platform_device_register(&pio4_device);
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USART
+- * -------------------------------------------------------------------- */
+-
+-static struct atmel_uart_data atmel_usart0_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart0_resource[] = {
+-	PBMEM(0xffe00c00),
+-	IRQ(6),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 0);
+-DEV_CLK(usart, atmel_usart0, pba, 3);
+-
+-static struct atmel_uart_data atmel_usart1_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart1_resource[] = {
+-	PBMEM(0xffe01000),
+-	IRQ(7),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 1);
+-DEV_CLK(usart, atmel_usart1, pba, 4);
+-
+-static struct atmel_uart_data atmel_usart2_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart2_resource[] = {
+-	PBMEM(0xffe01400),
+-	IRQ(8),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 2);
+-DEV_CLK(usart, atmel_usart2, pba, 5);
+-
+-static struct atmel_uart_data atmel_usart3_data = {
+-	.use_dma_tx	= 1,
+-	.use_dma_rx	= 1,
+-};
+-static struct resource atmel_usart3_resource[] = {
+-	PBMEM(0xffe01800),
+-	IRQ(9),
+-};
+-DEFINE_DEV_DATA(atmel_usart, 3);
+-DEV_CLK(usart, atmel_usart3, pba, 6);
+-
+-static inline void configure_usart0_pins(void)
+-{
+-	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart1_pins(void)
+-{
+-	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
+-	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart2_pins(void)
+-{
+-	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static inline void configure_usart3_pins(void)
+-{
+-	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
+-	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
+-}
+-
+-static struct platform_device *__initdata at32_usarts[4];
+-
+-void __init at32_map_usart(unsigned int hw_id, unsigned int line)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (hw_id) {
+-	case 0:
+-		pdev = &atmel_usart0_device;
+-		configure_usart0_pins();
+-		break;
+-	case 1:
+-		pdev = &atmel_usart1_device;
+-		configure_usart1_pins();
+-		break;
+-	case 2:
+-		pdev = &atmel_usart2_device;
+-		configure_usart2_pins();
+-		break;
+-	case 3:
+-		pdev = &atmel_usart3_device;
+-		configure_usart3_pins();
+-		break;
+-	default:
+-		return;
+-	}
+-
+-	if (PXSEG(pdev->resource[0].start) == P4SEG) {
+-		/* Addresses in the P4 segment are permanently mapped 1:1 */
+-		struct atmel_uart_data *data = pdev->dev.platform_data;
+-		data->regs = (void __iomem *)pdev->resource[0].start;
+-	}
+-
+-	pdev->id = line;
+-	at32_usarts[line] = pdev;
+-}
+-
+-struct platform_device *__init at32_add_device_usart(unsigned int id)
+-{
+-	platform_device_register(at32_usarts[id]);
+-	return at32_usarts[id];
+-}
+-
+-struct platform_device *atmel_default_console_device;
+-
+-void __init at32_setup_serial_console(unsigned int usart_id)
+-{
+-	atmel_default_console_device = at32_usarts[usart_id];
+-}
+-
+-/* --------------------------------------------------------------------
+- *  Ethernet
+- * -------------------------------------------------------------------- */
+-
+-static struct eth_platform_data macb0_data;
+-static struct resource macb0_resource[] = {
+-	PBMEM(0xfff01800),
+-	IRQ(25),
+-};
+-DEFINE_DEV_DATA(macb, 0);
+-DEV_CLK(hclk, macb0, hsb, 8);
+-DEV_CLK(pclk, macb0, pbb, 6);
+-
+-static struct eth_platform_data macb1_data;
+-static struct resource macb1_resource[] = {
+-	PBMEM(0xfff01c00),
+-	IRQ(26),
+-};
+-DEFINE_DEV_DATA(macb, 1);
+-DEV_CLK(hclk, macb1, hsb, 9);
+-DEV_CLK(pclk, macb1, pbb, 7);
+-
+-struct platform_device *__init
+-at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &macb0_device;
+-
+-		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
+-		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
+-		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
+-		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
+-		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
+-		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
+-		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
+-		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
+-		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
+-		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
+-			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
+-			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
+-			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
+-			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
+-			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
+-			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
+-			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
+-			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	case 1:
+-		pdev = &macb1_device;
+-
+-		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
+-		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
+-		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
+-		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
+-		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
+-		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
+-		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
+-		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
+-		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
+-		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
+-
+-		if (!data->is_rmii) {
+-			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
+-			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
+-			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
+-			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
+-			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
+-			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
+-			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
+-			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
+-			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
+-		}
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
+-	platform_device_register(pdev);
+-
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SPI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_spi0_resource[] = {
+-	PBMEM(0xffe00000),
+-	IRQ(3),
+-};
+-DEFINE_DEV(atmel_spi, 0);
+-DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+-
+-static struct resource atmel_spi1_resource[] = {
+-	PBMEM(0xffe00400),
+-	IRQ(4),
+-};
+-DEFINE_DEV(atmel_spi, 1);
+-DEV_CLK(spi_clk, atmel_spi1, pba, 1);
+-
+-static void __init
+-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+-		      unsigned int n, const u8 *pins)
+-{
+-	unsigned int pin, mode;
+-
+-	for (; n; n--, b++) {
+-		b->bus_num = bus_num;
+-		if (b->chip_select >= 4)
+-			continue;
+-		pin = (unsigned)b->controller_data;
+-		if (!pin) {
+-			pin = pins[b->chip_select];
+-			b->controller_data = (void *)pin;
+-		}
+-		mode = AT32_GPIOF_OUTPUT;
+-		if (!(b->mode & SPI_CS_HIGH))
+-			mode |= AT32_GPIOF_HIGH;
+-		at32_select_gpio(pin, mode);
+-	}
+-}
+-
+-struct platform_device *__init
+-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+-{
+-	/*
+-	 * Manage the chipselects as GPIOs, normally using the same pins
+-	 * the SPI controller expects; but boards can use other pins.
+-	 */
+-	static u8 __initdata spi0_pins[] =
+-		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+-		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+-	static u8 __initdata spi1_pins[] =
+-		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+-		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_spi0_device;
+-		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
+-		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
+-		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
+-		at32_spi_setup_slaves(0, b, n, spi0_pins);
+-		break;
+-
+-	case 1:
+-		pdev = &atmel_spi1_device;
+-		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
+-		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
+-		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
+-		at32_spi_setup_slaves(1, b, n, spi1_pins);
+-		break;
+-
+-	default:
+-		return NULL;
+-	}
+-
+-	spi_register_board_info(b, n);
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  TWI
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_twi0_resource[] __initdata = {
+-	PBMEM(0xffe00800),
+-	IRQ(5),
+-};
+-static struct clk atmel_twi0_pclk = {
+-	.name		= "twi_pclk",
+-	.parent		= &pba_clk,
+-	.mode		= pba_clk_mode,
+-	.get_rate	= pba_clk_get_rate,
+-	.index		= 2,
+-};
+-
+-struct platform_device *__init at32_add_device_twi(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_twi", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_twi0_resource,
+-				ARRAY_SIZE(atmel_twi0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
+-	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
+-
+-	atmel_twi0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * MMC
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_mci0_resource[] __initdata = {
+-	PBMEM(0xfff02400),
+-	IRQ(28),
+-};
+-static struct clk atmel_mci0_pclk = {
+-	.name		= "mci_clk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 9,
+-};
+-
+-struct platform_device *__init at32_add_device_mci(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_mci", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_mci0_resource,
+-				ARRAY_SIZE(atmel_mci0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
+-	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
+-	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
+-	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
+-	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
+-	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
+-
+-	atmel_mci0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  LCDC
+- * -------------------------------------------------------------------- */
+-static struct atmel_lcdfb_info atmel_lcdfb0_data;
+-static struct resource atmel_lcdfb0_resource[] = {
+-	{
+-		.start		= 0xff000000,
+-		.end		= 0xff000fff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(1),
+-	{
+-		/* Placeholder for pre-allocated fb memory */
+-		.start		= 0x00000000,
+-		.end		= 0x00000000,
+-		.flags		= 0,
+-	},
+-};
+-DEFINE_DEV_DATA(atmel_lcdfb, 0);
+-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
+-static struct clk atmel_lcdfb0_pixclk = {
+-	.name		= "lcdc_clk",
+-	.dev		= &atmel_lcdfb0_device.dev,
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 7,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+-		     unsigned long fbmem_start, unsigned long fbmem_len)
+-{
+-	struct platform_device *pdev;
+-	struct atmel_lcdfb_info *info;
+-	struct fb_monspecs *monspecs;
+-	struct fb_videomode *modedb;
+-	unsigned int modedb_size;
+-
+-	/*
+-	 * Do a deep copy of the fb data, monspecs and modedb. Make
+-	 * sure all allocations are done before setting up the
+-	 * portmux.
+-	 */
+-	monspecs = kmemdup(data->default_monspecs,
+-			   sizeof(struct fb_monspecs), GFP_KERNEL);
+-	if (!monspecs)
+-		return NULL;
+-
+-	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
+-	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
+-	if (!modedb)
+-		goto err_dup_modedb;
+-	monspecs->modedb = modedb;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &atmel_lcdfb0_device;
+-		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
+-		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
+-		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
+-		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
+-		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
+-		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
+-		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
+-		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
+-		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
+-		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
+-		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
+-		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
+-		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
+-		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
+-		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
+-		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
+-		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
+-		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
+-		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
+-		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
+-		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
+-		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
+-		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
+-		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
+-		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
+-		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
+-		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
+-		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
+-		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
+-		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
+-		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
+-
+-		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
+-		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
+-		break;
+-
+-	default:
+-		goto err_invalid_id;
+-	}
+-
+-	if (fbmem_len) {
+-		pdev->resource[2].start = fbmem_start;
+-		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
+-		pdev->resource[2].flags = IORESOURCE_MEM;
+-	}
+-
+-	info = pdev->dev.platform_data;
+-	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
+-	info->default_monspecs = monspecs;
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-
+-err_invalid_id:
+-	kfree(modedb);
+-err_dup_modedb:
+-	kfree(monspecs);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  SSC
+- * -------------------------------------------------------------------- */
+-static struct resource ssc0_resource[] = {
+-	PBMEM(0xffe01c00),
+-	IRQ(10),
+-};
+-DEFINE_DEV(ssc, 0);
+-DEV_CLK(pclk, ssc0, pba, 7);
+-
+-static struct resource ssc1_resource[] = {
+-	PBMEM(0xffe02000),
+-	IRQ(11),
+-};
+-DEFINE_DEV(ssc, 1);
+-DEV_CLK(pclk, ssc1, pba, 8);
+-
+-static struct resource ssc2_resource[] = {
+-	PBMEM(0xffe02400),
+-	IRQ(12),
+-};
+-DEFINE_DEV(ssc, 2);
+-DEV_CLK(pclk, ssc2, pba, 9);
+-
+-struct platform_device *__init
+-at32_add_device_ssc(unsigned int id, unsigned int flags)
+-{
+-	struct platform_device *pdev;
+-
+-	switch (id) {
+-	case 0:
+-		pdev = &ssc0_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
+-		break;
+-	case 1:
+-		pdev = &ssc1_device;
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
+-		break;
+-	case 2:
+-		pdev = &ssc2_device;
+-		if (flags & ATMEL_SSC_TD)
+-			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
+-		if (flags & ATMEL_SSC_RD)
+-			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
+-		if (flags & ATMEL_SSC_TK)
+-			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
+-		if (flags & ATMEL_SSC_TF)
+-			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
+-		if (flags & ATMEL_SSC_RF)
+-			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
+-		if (flags & ATMEL_SSC_RK)
+-			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
+-		break;
+-	default:
+-		return NULL;
+-	}
+-
+-	platform_device_register(pdev);
+-	return pdev;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  USB Device Controller
+- * -------------------------------------------------------------------- */
+-static struct resource usba0_resource[] __initdata = {
+-	{
+-		.start		= 0xff300000,
+-		.end		= 0xff3fffff,
+-		.flags		= IORESOURCE_MEM,
+-	}, {
+-		.start		= 0xfff03000,
+-		.end		= 0xfff033ff,
+-		.flags		= IORESOURCE_MEM,
+-	},
+-	IRQ(31),
+-};
+-static struct clk usba0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 12,
+-};
+-static struct clk usba0_hclk = {
+-	.name		= "hclk",
+-	.parent		= &hsb_clk,
+-	.mode		= hsb_clk_mode,
+-	.get_rate	= hsb_clk_get_rate,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init
+-at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_usba_udc", 0);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, usba0_resource,
+-					  ARRAY_SIZE(usba0_resource)))
+-		goto out_free_pdev;
+-
+-	if (data) {
+-		if (platform_device_add_data(pdev, data, sizeof(*data)))
+-			goto out_free_pdev;
+-
+-		if (data->vbus_pin != GPIO_PIN_NONE)
+-			at32_select_gpio(data->vbus_pin, 0);
+-	}
+-
+-	usba0_pclk.dev = &pdev->dev;
+-	usba0_hclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-
+-	return pdev;
+-
+-out_free_pdev:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * IDE / CompactFlash
+- * -------------------------------------------------------------------- */
+-static struct resource at32_smc_cs4_resource[] __initdata = {
+-	{
+-		.start	= 0x04000000,
+-		.end	= 0x07ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-static struct resource at32_smc_cs5_resource[] __initdata = {
+-	{
+-		.start	= 0x20000000,
+-		.end	= 0x23ffffff,
+-		.flags	= IORESOURCE_MEM,
+-	},
+-	IRQ(~0UL), /* Magic IRQ will be overridden */
+-};
+-
+-static int __init at32_init_ide_or_cf(struct platform_device *pdev,
+-		unsigned int cs, unsigned int extint)
+-{
+-	static unsigned int extint_pin_map[4] __initdata = {
+-		GPIO_PIN_PB(25),
+-		GPIO_PIN_PB(26),
+-		GPIO_PIN_PB(27),
+-		GPIO_PIN_PB(28),
+-	};
+-	static bool common_pins_initialized __initdata = false;
+-	unsigned int extint_pin;
+-	int ret;
+-
+-	if (extint >= ARRAY_SIZE(extint_pin_map))
+-		return -EINVAL;
+-	extint_pin = extint_pin_map[extint];
+-
+-	switch (cs) {
+-	case 4:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs4_resource,
+-				ARRAY_SIZE(at32_smc_cs4_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
+-		break;
+-	case 5:
+-		ret = platform_device_add_resources(pdev,
+-				at32_smc_cs5_resource,
+-				ARRAY_SIZE(at32_smc_cs5_resource));
+-		if (ret)
+-			return ret;
+-
+-		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
+-		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-
+-	if (!common_pins_initialized) {
+-		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
+-		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
+-		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
+-		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
+-		common_pins_initialized = true;
+-	}
+-
+-	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
+-
+-	pdev->resource[1].start = EIM_IRQ_BASE + extint;
+-	pdev->resource[1].end = pdev->resource[1].start;
+-
+-	return 0;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_ide(unsigned int id, unsigned int extint,
+-		    struct ide_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_ide", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct ide_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-struct platform_device *__init
+-at32_add_device_cf(unsigned int id, unsigned int extint,
+-		    struct cf_platform_data *data)
+-{
+-	struct platform_device *pdev;
+-
+-	pdev = platform_device_alloc("at32_cf", id);
+-	if (!pdev)
+-		goto fail;
+-
+-	if (platform_device_add_data(pdev, data,
+-				sizeof(struct cf_platform_data)))
+-		goto fail;
+-
+-	if (at32_init_ide_or_cf(pdev, data->cs, extint))
+-		goto fail;
+-
+-	if (data->detect_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
+-	if (data->reset_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->reset_pin, 0);
+-	if (data->vcc_pin != GPIO_PIN_NONE)
+-		at32_select_gpio(data->vcc_pin, 0);
+-	/* READY is used as extint, so we can't select it as gpio */
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-fail:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * AC97C
+- * -------------------------------------------------------------------- */
+-static struct resource atmel_ac97c0_resource[] __initdata = {
+-	PBMEM(0xfff02800),
+-	IRQ(29),
+-};
+-static struct clk atmel_ac97c0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 10,
+-};
+-
+-struct platform_device *__init at32_add_device_ac97c(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("atmel_ac97c", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
+-				ARRAY_SIZE(atmel_ac97c0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
+-	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
+-	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
+-	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
+-
+-	atmel_ac97c0_pclk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- * ABDAC
+- * -------------------------------------------------------------------- */
+-static struct resource abdac0_resource[] __initdata = {
+-	PBMEM(0xfff02000),
+-	IRQ(27),
+-};
+-static struct clk abdac0_pclk = {
+-	.name		= "pclk",
+-	.parent		= &pbb_clk,
+-	.mode		= pbb_clk_mode,
+-	.get_rate	= pbb_clk_get_rate,
+-	.index		= 8,
+-};
+-static struct clk abdac0_sample_clk = {
+-	.name		= "sample_clk",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 6,
+-};
+-
+-struct platform_device *__init at32_add_device_abdac(unsigned int id)
+-{
+-	struct platform_device *pdev;
+-
+-	if (id != 0)
+-		return NULL;
+-
+-	pdev = platform_device_alloc("abdac", id);
+-	if (!pdev)
+-		return NULL;
+-
+-	if (platform_device_add_resources(pdev, abdac0_resource,
+-				ARRAY_SIZE(abdac0_resource)))
+-		goto err_add_resources;
+-
+-	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
+-	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
+-	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
+-	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
+-
+-	abdac0_pclk.dev = &pdev->dev;
+-	abdac0_sample_clk.dev = &pdev->dev;
+-
+-	platform_device_add(pdev);
+-	return pdev;
+-
+-err_add_resources:
+-	platform_device_put(pdev);
+-	return NULL;
+-}
+-
+-/* --------------------------------------------------------------------
+- *  GCLK
+- * -------------------------------------------------------------------- */
+-static struct clk gclk0 = {
+-	.name		= "gclk0",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 0,
+-};
+-static struct clk gclk1 = {
+-	.name		= "gclk1",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 1,
+-};
+-static struct clk gclk2 = {
+-	.name		= "gclk2",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 2,
+-};
+-static struct clk gclk3 = {
+-	.name		= "gclk3",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 3,
+-};
+-static struct clk gclk4 = {
+-	.name		= "gclk4",
+-	.mode		= genclk_mode,
+-	.get_rate	= genclk_get_rate,
+-	.set_rate	= genclk_set_rate,
+-	.set_parent	= genclk_set_parent,
+-	.index		= 4,
+-};
+-
+-struct clk *at32_clock_list[] = {
+-	&osc32k,
+-	&osc0,
+-	&osc1,
+-	&pll0,
+-	&pll1,
+-	&cpu_clk,
+-	&hsb_clk,
+-	&pba_clk,
+-	&pbb_clk,
+-	&at32_pm_pclk,
+-	&at32_intc0_pclk,
+-	&hmatrix_clk,
+-	&ebi_clk,
+-	&hramc_clk,
+-	&smc0_pclk,
+-	&smc0_mck,
+-	&pdc_hclk,
+-	&pdc_pclk,
+-	&dmaca0_hclk,
+-	&pico_clk,
+-	&pio0_mck,
+-	&pio1_mck,
+-	&pio2_mck,
+-	&pio3_mck,
+-	&pio4_mck,
+-	&at32_systc0_pclk,
+-	&atmel_usart0_usart,
+-	&atmel_usart1_usart,
+-	&atmel_usart2_usart,
+-	&atmel_usart3_usart,
+-	&macb0_hclk,
+-	&macb0_pclk,
+-	&macb1_hclk,
+-	&macb1_pclk,
+-	&atmel_spi0_spi_clk,
+-	&atmel_spi1_spi_clk,
+-	&atmel_twi0_pclk,
+-	&atmel_mci0_pclk,
+-	&atmel_lcdfb0_hck1,
+-	&atmel_lcdfb0_pixclk,
+-	&ssc0_pclk,
+-	&ssc1_pclk,
+-	&ssc2_pclk,
+-	&usba0_hclk,
+-	&usba0_pclk,
+-	&atmel_ac97c0_pclk,
+-	&abdac0_pclk,
+-	&abdac0_sample_clk,
+-	&gclk0,
+-	&gclk1,
+-	&gclk2,
+-	&gclk3,
+-	&gclk4,
+-};
+-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+-
+-void __init at32_portmux_init(void)
+-{
+-	at32_init_pio(&pio0_device);
+-	at32_init_pio(&pio1_device);
+-	at32_init_pio(&pio2_device);
+-	at32_init_pio(&pio3_device);
+-	at32_init_pio(&pio4_device);
+-}
+-
+-void __init at32_clock_init(void)
+-{
+-	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
+-	int i;
+-
+-	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
+-		main_clock = &pll0;
+-		cpu_clk.parent = &pll0;
+-	} else {
+-		main_clock = &osc0;
+-		cpu_clk.parent = &osc0;
+-	}
+-
+-	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
+-		pll0.parent = &osc1;
+-	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
+-		pll1.parent = &osc1;
+-
+-	genclk_init_parent(&gclk0);
+-	genclk_init_parent(&gclk1);
+-	genclk_init_parent(&gclk2);
+-	genclk_init_parent(&gclk3);
+-	genclk_init_parent(&gclk4);
+-	genclk_init_parent(&atmel_lcdfb0_pixclk);
+-	genclk_init_parent(&abdac0_sample_clk);
+-
+-	/*
+-	 * Turn on all clocks that have at least one user already, and
+-	 * turn off everything else. We only do this for module
+-	 * clocks, and even though it isn't particularly pretty to
+-	 * check the address of the mode function, it should do the
+-	 * trick...
+-	 */
+-	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
+-		struct clk *clk = at32_clock_list[i];
+-
+-		if (clk->users == 0)
+-			continue;
+-
+-		if (clk->mode == &cpu_clk_mode)
+-			cpu_mask |= 1 << clk->index;
+-		else if (clk->mode == &hsb_clk_mode)
+-			hsb_mask |= 1 << clk->index;
+-		else if (clk->mode == &pba_clk_mode)
+-			pba_mask |= 1 << clk->index;
+-		else if (clk->mode == &pbb_clk_mode)
+-			pbb_mask |= 1 << clk->index;
+-	}
+-
+-	pm_writel(CPU_MASK, cpu_mask);
+-	pm_writel(HSB_MASK, hsb_mask);
+-	pm_writel(PBA_MASK, pba_mask);
+-	pm_writel(PBB_MASK, pbb_mask);
+-}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/at32ap700x.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/at32ap700x.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,1809 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/dma-mapping.h>
++#include <linux/spi/spi.h>
++
++#include <asm/io.h>
++#include <asm/irq.h>
++
++#include <asm/arch/at32ap700x.h>
++#include <asm/arch/board.h>
++#include <asm/arch/portmux.h>
++
++#include <video/atmel_lcdc.h>
++
++#include "clock.h"
++#include "hmatrix.h"
++#include "pio.h"
++#include "pm.h"
++
++
++#define PBMEM(base)					\
++	{						\
++		.start		= base,			\
++		.end		= base + 0x3ff,		\
++		.flags		= IORESOURCE_MEM,	\
++	}
++#define IRQ(num)					\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++#define NAMED_IRQ(num, _name)				\
++	{						\
++		.start		= num,			\
++		.end		= num,			\
++		.name		= _name,		\
++		.flags		= IORESOURCE_IRQ,	\
++	}
++
++/* REVISIT these assume *every* device supports DMA, but several
++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more.
++ */
++#define DEFINE_DEV(_name, _id)					\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++#define DEFINE_DEV_DATA(_name, _id)				\
++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK;		\
++static struct platform_device _name##_id##_device = {		\
++	.name		= #_name,				\
++	.id		= _id,					\
++	.dev		= {					\
++		.dma_mask = &_name##_id##_dma_mask,		\
++		.platform_data	= &_name##_id##_data,		\
++		.coherent_dma_mask = DMA_32BIT_MASK,		\
++	},							\
++	.resource	= _name##_id##_resource,		\
++	.num_resources	= ARRAY_SIZE(_name##_id##_resource),	\
++}
++
++#define select_peripheral(pin, periph, flags)			\
++	at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags)
++
++#define DEV_CLK(_name, devname, bus, _index)			\
++static struct clk devname##_##_name = {				\
++	.name		= #_name,				\
++	.dev		= &devname##_device.dev,		\
++	.parent		= &bus##_clk,				\
++	.mode		= bus##_clk_mode,			\
++	.get_rate	= bus##_clk_get_rate,			\
++	.index		= _index,				\
++}
++
++static DEFINE_SPINLOCK(pm_lock);
++
++unsigned long at32ap7000_osc_rates[3] = {
++	[0] = 32768,
++	/* FIXME: these are ATSTK1002-specific */
++	[1] = 20000000,
++	[2] = 12000000,
++};
++
++static unsigned long osc_get_rate(struct clk *clk)
++{
++	return at32ap7000_osc_rates[clk->index];
++}
++
++static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
++{
++	unsigned long div, mul, rate;
++
++	if (!(control & PM_BIT(PLLEN)))
++		return 0;
++
++	div = PM_BFEXT(PLLDIV, control) + 1;
++	mul = PM_BFEXT(PLLMUL, control) + 1;
++
++	rate = clk->parent->get_rate(clk->parent);
++	rate = (rate + div / 2) / div;
++	rate *= mul;
++
++	return rate;
++}
++
++static unsigned long pll0_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL0);
++
++	return pll_get_rate(clk, control);
++}
++
++static unsigned long pll1_get_rate(struct clk *clk)
++{
++	u32 control;
++
++	control = pm_readl(PLL1);
++
++	return pll_get_rate(clk, control);
++}
++
++/*
++ * The AT32AP7000 has five primary clock sources: One 32kHz
++ * oscillator, two crystal oscillators and two PLLs.
++ */
++static struct clk osc32k = {
++	.name		= "osc32k",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++static struct clk osc0 = {
++	.name		= "osc0",
++	.get_rate	= osc_get_rate,
++	.users		= 1,
++	.index		= 1,
++};
++static struct clk osc1 = {
++	.name		= "osc1",
++	.get_rate	= osc_get_rate,
++	.index		= 2,
++};
++static struct clk pll0 = {
++	.name		= "pll0",
++	.get_rate	= pll0_get_rate,
++	.parent		= &osc0,
++};
++static struct clk pll1 = {
++	.name		= "pll1",
++	.get_rate	= pll1_get_rate,
++	.parent		= &osc0,
++};
++
++/*
++ * The main clock can be either osc0 or pll0.  The boot loader may
++ * have chosen one for us, so we don't really know which one until we
++ * have a look at the SM.
++ */
++static struct clk *main_clock;
++
++/*
++ * Synchronous clocks are generated from the main clock. The clocks
++ * must satisfy the constraint
++ *   fCPU >= fHSB >= fPB
++ * i.e. each clock must not be faster than its parent.
++ */
++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift)
++{
++	return main_clock->get_rate(main_clock) >> shift;
++};
++
++static void cpu_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(CPU_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(CPU_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long cpu_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(CPUDIV))
++		shift = PM_BFEXT(CPUSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, child_div, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(CKSEL);
++
++	if (control & PM_BIT(HSBDIV))
++		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
++	else
++		child_div = 1;
++
++	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(CPUDIV);
++	} else {
++		unsigned int cpusel;
++		div = (parent_rate + rate / 2) / rate;
++		if (div > child_div)
++			div = child_div;
++		cpusel = (div > 1) ? (fls(div) - 2) : 0;
++		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
++		actual_rate = parent_rate / (1 << (cpusel + 1));
++	}
++
++	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
++			clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(CKSEL, control);
++
++	return actual_rate;
++}
++
++static void hsb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(HSB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(HSB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long hsb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(HSBDIV))
++		shift = PM_BFEXT(HSBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pba_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBA_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBA_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pba_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBADIV))
++		shift = PM_BFEXT(PBASEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static void pbb_clk_mode(struct clk *clk, int enabled)
++{
++	unsigned long flags;
++	u32 mask;
++
++	spin_lock_irqsave(&pm_lock, flags);
++	mask = pm_readl(PBB_MASK);
++	if (enabled)
++		mask |= 1 << clk->index;
++	else
++		mask &= ~(1 << clk->index);
++	pm_writel(PBB_MASK, mask);
++	spin_unlock_irqrestore(&pm_lock, flags);
++}
++
++static unsigned long pbb_clk_get_rate(struct clk *clk)
++{
++	unsigned long cksel, shift = 0;
++
++	cksel = pm_readl(CKSEL);
++	if (cksel & PM_BIT(PBBDIV))
++		shift = PM_BFEXT(PBBSEL, cksel) + 1;
++
++	return bus_clk_get_rate(clk, shift);
++}
++
++static struct clk cpu_clk = {
++	.name		= "cpu",
++	.get_rate	= cpu_clk_get_rate,
++	.set_rate	= cpu_clk_set_rate,
++	.users		= 1,
++};
++static struct clk hsb_clk = {
++	.name		= "hsb",
++	.parent		= &cpu_clk,
++	.get_rate	= hsb_clk_get_rate,
++};
++static struct clk pba_clk = {
++	.name		= "pba",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 1,
++};
++static struct clk pbb_clk = {
++	.name		= "pbb",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 2,
++};
++
++/* --------------------------------------------------------------------
++ *  Generic Clock operations
++ * -------------------------------------------------------------------- */
++
++static void genclk_mode(struct clk *clk, int enabled)
++{
++	u32 control;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (enabled)
++		control |= PM_BIT(CEN);
++	else
++		control &= ~PM_BIT(CEN);
++	pm_writel(GCCTRL(clk->index), control);
++}
++
++static unsigned long genclk_get_rate(struct clk *clk)
++{
++	u32 control;
++	unsigned long div = 1;
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(DIVEN))
++		div = 2 * (PM_BFEXT(DIV, control) + 1);
++
++	return clk->parent->get_rate(clk->parent) / div;
++}
++
++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
++{
++	u32 control;
++	unsigned long parent_rate, actual_rate, div;
++
++	parent_rate = clk->parent->get_rate(clk->parent);
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (rate > 3 * parent_rate / 4) {
++		actual_rate = parent_rate;
++		control &= ~PM_BIT(DIVEN);
++	} else {
++		div = (parent_rate + rate) / (2 * rate) - 1;
++		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
++		actual_rate = parent_rate / (2 * (div + 1));
++	}
++
++	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
++		clk->name, rate, actual_rate);
++
++	if (apply)
++		pm_writel(GCCTRL(clk->index), control);
++
++	return actual_rate;
++}
++
++int genclk_set_parent(struct clk *clk, struct clk *parent)
++{
++	u32 control;
++
++	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
++		clk->name, parent->name, clk->parent->name);
++
++	control = pm_readl(GCCTRL(clk->index));
++
++	if (parent == &osc1 || parent == &pll1)
++		control |= PM_BIT(OSCSEL);
++	else if (parent == &osc0 || parent == &pll0)
++		control &= ~PM_BIT(OSCSEL);
++	else
++		return -EINVAL;
++
++	if (parent == &pll0 || parent == &pll1)
++		control |= PM_BIT(PLLSEL);
++	else
++		control &= ~PM_BIT(PLLSEL);
++
++	pm_writel(GCCTRL(clk->index), control);
++	clk->parent = parent;
++
++	return 0;
++}
++
++static void __init genclk_init_parent(struct clk *clk)
++{
++	u32 control;
++	struct clk *parent;
++
++	BUG_ON(clk->index > 7);
++
++	control = pm_readl(GCCTRL(clk->index));
++	if (control & PM_BIT(OSCSEL))
++		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
++	else
++		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
++
++	clk->parent = parent;
++}
++
++/* --------------------------------------------------------------------
++ *  System peripherals
++ * -------------------------------------------------------------------- */
++static struct resource at32_pm0_resource[] = {
++	{
++		.start	= 0xfff00000,
++		.end	= 0xfff0007f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(20),
++};
++
++static struct resource at32ap700x_rtc0_resource[] = {
++	{
++		.start	= 0xfff00080,
++		.end	= 0xfff000af,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(21),
++};
++
++static struct resource at32_wdt0_resource[] = {
++	{
++		.start	= 0xfff000b0,
++		.end	= 0xfff000cf,
++		.flags	= IORESOURCE_MEM,
++	},
++};
++
++static struct resource at32_eic0_resource[] = {
++	{
++		.start	= 0xfff00100,
++		.end	= 0xfff0013f,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(19),
++};
++
++DEFINE_DEV(at32_pm, 0);
++DEFINE_DEV(at32ap700x_rtc, 0);
++DEFINE_DEV(at32_wdt, 0);
++DEFINE_DEV(at32_eic, 0);
++
++/*
++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
++ * is always running.
++ */
++static struct clk at32_pm_pclk = {
++	.name		= "pclk",
++	.dev		= &at32_pm0_device.dev,
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.users		= 1,
++	.index		= 0,
++};
++
++static struct resource intc0_resource[] = {
++	PBMEM(0xfff00400),
++};
++struct platform_device at32_intc0_device = {
++	.name		= "intc",
++	.id		= 0,
++	.resource	= intc0_resource,
++	.num_resources	= ARRAY_SIZE(intc0_resource),
++};
++DEV_CLK(pclk, at32_intc0, pbb, 1);
++
++static struct clk ebi_clk = {
++	.name		= "ebi",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++};
++static struct clk hramc_clk = {
++	.name		= "hramc",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.users		= 1,
++	.index		= 3,
++};
++
++static struct resource smc0_resource[] = {
++	PBMEM(0xfff03400),
++};
++DEFINE_DEV(smc, 0);
++DEV_CLK(pclk, smc0, pbb, 13);
++DEV_CLK(mck, smc0, hsb, 0);
++
++static struct platform_device pdc_device = {
++	.name		= "pdc",
++	.id		= 0,
++};
++DEV_CLK(hclk, pdc, hsb, 4);
++DEV_CLK(pclk, pdc, pba, 16);
++
++static struct clk pico_clk = {
++	.name		= "pico",
++	.parent		= &cpu_clk,
++	.mode		= cpu_clk_mode,
++	.get_rate	= cpu_clk_get_rate,
++	.users		= 1,
++};
++
++static struct resource dmaca0_resource[] = {
++	{
++		.start	= 0xff200000,
++		.end	= 0xff20ffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(2),
++};
++DEFINE_DEV(dmaca, 0);
++DEV_CLK(hclk, dmaca0, hsb, 10);
++
++/* --------------------------------------------------------------------
++ * HMATRIX
++ * -------------------------------------------------------------------- */
++
++static struct clk hmatrix_clk = {
++	.name		= "hmatrix_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 2,
++	.users		= 1,
++};
++#define HMATRIX_BASE	((void __iomem *)0xfff00800)
++
++#define hmatrix_readl(reg)					\
++	__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
++#define hmatrix_writel(reg,value)				\
++	__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
++
++/*
++ * Set bits in the HMATRIX Special Function Register (SFR) used by the
++ * External Bus Interface (EBI). This can be used to enable special
++ * features like CompactFlash support, NAND Flash support, etc. on
++ * certain chipselects.
++ */
++static inline void set_ebi_sfr_bits(u32 mask)
++{
++	u32 sfr;
++
++	clk_enable(&hmatrix_clk);
++	sfr = hmatrix_readl(SFR4);
++	sfr |= mask;
++	hmatrix_writel(SFR4, sfr);
++	clk_disable(&hmatrix_clk);
++}
++
++/* --------------------------------------------------------------------
++ *  System Timer/Counter (TC)
++ * -------------------------------------------------------------------- */
++static struct resource at32_systc0_resource[] = {
++	PBMEM(0xfff00c00),
++	IRQ(22),
++};
++struct platform_device at32_systc0_device = {
++	.name		= "systc",
++	.id		= 0,
++	.resource	= at32_systc0_resource,
++	.num_resources	= ARRAY_SIZE(at32_systc0_resource),
++};
++DEV_CLK(pclk, at32_systc0, pbb, 3);
++
++/* --------------------------------------------------------------------
++ *  PIO
++ * -------------------------------------------------------------------- */
++
++static struct resource pio0_resource[] = {
++	PBMEM(0xffe02800),
++	IRQ(13),
++};
++DEFINE_DEV(pio, 0);
++DEV_CLK(mck, pio0, pba, 10);
++
++static struct resource pio1_resource[] = {
++	PBMEM(0xffe02c00),
++	IRQ(14),
++};
++DEFINE_DEV(pio, 1);
++DEV_CLK(mck, pio1, pba, 11);
++
++static struct resource pio2_resource[] = {
++	PBMEM(0xffe03000),
++	IRQ(15),
++};
++DEFINE_DEV(pio, 2);
++DEV_CLK(mck, pio2, pba, 12);
++
++static struct resource pio3_resource[] = {
++	PBMEM(0xffe03400),
++	IRQ(16),
++};
++DEFINE_DEV(pio, 3);
++DEV_CLK(mck, pio3, pba, 13);
++
++static struct resource pio4_resource[] = {
++	PBMEM(0xffe03800),
++	IRQ(17),
++};
++DEFINE_DEV(pio, 4);
++DEV_CLK(mck, pio4, pba, 14);
++
++void __init at32_add_system_devices(void)
++{
++	platform_device_register(&at32_pm0_device);
++	platform_device_register(&at32_intc0_device);
++	platform_device_register(&at32ap700x_rtc0_device);
++	platform_device_register(&at32_wdt0_device);
++	platform_device_register(&at32_eic0_device);
++	platform_device_register(&smc0_device);
++	platform_device_register(&pdc_device);
++	platform_device_register(&dmaca0_device);
++
++	platform_device_register(&at32_systc0_device);
++
++	platform_device_register(&pio0_device);
++	platform_device_register(&pio1_device);
++	platform_device_register(&pio2_device);
++	platform_device_register(&pio3_device);
++	platform_device_register(&pio4_device);
++}
++
++/* --------------------------------------------------------------------
++ *  USART
++ * -------------------------------------------------------------------- */
++
++static struct atmel_uart_data atmel_usart0_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart0_resource[] = {
++	PBMEM(0xffe00c00),
++	IRQ(6),
++};
++DEFINE_DEV_DATA(atmel_usart, 0);
++DEV_CLK(usart, atmel_usart0, pba, 3);
++
++static struct atmel_uart_data atmel_usart1_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart1_resource[] = {
++	PBMEM(0xffe01000),
++	IRQ(7),
++};
++DEFINE_DEV_DATA(atmel_usart, 1);
++DEV_CLK(usart, atmel_usart1, pba, 4);
++
++static struct atmel_uart_data atmel_usart2_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart2_resource[] = {
++	PBMEM(0xffe01400),
++	IRQ(8),
++};
++DEFINE_DEV_DATA(atmel_usart, 2);
++DEV_CLK(usart, atmel_usart2, pba, 5);
++
++static struct atmel_uart_data atmel_usart3_data = {
++	.use_dma_tx	= 1,
++	.use_dma_rx	= 1,
++};
++static struct resource atmel_usart3_resource[] = {
++	PBMEM(0xffe01800),
++	IRQ(9),
++};
++DEFINE_DEV_DATA(atmel_usart, 3);
++DEV_CLK(usart, atmel_usart3, pba, 6);
++
++static inline void configure_usart0_pins(void)
++{
++	select_peripheral(PA(8),  PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PA(9),  PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart1_pins(void)
++{
++	select_peripheral(PA(17), PERIPH_A, 0);	/* RXD	*/
++	select_peripheral(PA(18), PERIPH_A, 0);	/* TXD	*/
++}
++
++static inline void configure_usart2_pins(void)
++{
++	select_peripheral(PB(26), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(27), PERIPH_B, 0);	/* TXD	*/
++}
++
++static inline void configure_usart3_pins(void)
++{
++	select_peripheral(PB(18), PERIPH_B, 0);	/* RXD	*/
++	select_peripheral(PB(17), PERIPH_B, 0);	/* TXD	*/
++}
++
++static struct platform_device *__initdata at32_usarts[4];
++
++void __init at32_map_usart(unsigned int hw_id, unsigned int line)
++{
++	struct platform_device *pdev;
++
++	switch (hw_id) {
++	case 0:
++		pdev = &atmel_usart0_device;
++		configure_usart0_pins();
++		break;
++	case 1:
++		pdev = &atmel_usart1_device;
++		configure_usart1_pins();
++		break;
++	case 2:
++		pdev = &atmel_usart2_device;
++		configure_usart2_pins();
++		break;
++	case 3:
++		pdev = &atmel_usart3_device;
++		configure_usart3_pins();
++		break;
++	default:
++		return;
++	}
++
++	if (PXSEG(pdev->resource[0].start) == P4SEG) {
++		/* Addresses in the P4 segment are permanently mapped 1:1 */
++		struct atmel_uart_data *data = pdev->dev.platform_data;
++		data->regs = (void __iomem *)pdev->resource[0].start;
++	}
++
++	pdev->id = line;
++	at32_usarts[line] = pdev;
++}
++
++struct platform_device *__init at32_add_device_usart(unsigned int id)
++{
++	platform_device_register(at32_usarts[id]);
++	return at32_usarts[id];
++}
++
++struct platform_device *atmel_default_console_device;
++
++void __init at32_setup_serial_console(unsigned int usart_id)
++{
++	atmel_default_console_device = at32_usarts[usart_id];
++}
++
++/* --------------------------------------------------------------------
++ *  Ethernet
++ * -------------------------------------------------------------------- */
++
++#ifdef CONFIG_CPU_AT32AP7000
++static struct eth_platform_data macb0_data;
++static struct resource macb0_resource[] = {
++	PBMEM(0xfff01800),
++	IRQ(25),
++};
++DEFINE_DEV_DATA(macb, 0);
++DEV_CLK(hclk, macb0, hsb, 8);
++DEV_CLK(pclk, macb0, pbb, 6);
++
++static struct eth_platform_data macb1_data;
++static struct resource macb1_resource[] = {
++	PBMEM(0xfff01c00),
++	IRQ(26),
++};
++DEFINE_DEV_DATA(macb, 1);
++DEV_CLK(hclk, macb1, hsb, 9);
++DEV_CLK(pclk, macb1, pbb, 7);
++
++struct platform_device *__init
++at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &macb0_device;
++
++		select_peripheral(PC(3),  PERIPH_A, 0);	/* TXD0	*/
++		select_peripheral(PC(4),  PERIPH_A, 0);	/* TXD1	*/
++		select_peripheral(PC(7),  PERIPH_A, 0);	/* TXEN	*/
++		select_peripheral(PC(8),  PERIPH_A, 0);	/* TXCK */
++		select_peripheral(PC(9),  PERIPH_A, 0);	/* RXD0	*/
++		select_peripheral(PC(10), PERIPH_A, 0);	/* RXD1	*/
++		select_peripheral(PC(13), PERIPH_A, 0);	/* RXER	*/
++		select_peripheral(PC(15), PERIPH_A, 0);	/* RXDV	*/
++		select_peripheral(PC(16), PERIPH_A, 0);	/* MDC	*/
++		select_peripheral(PC(17), PERIPH_A, 0);	/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(0),  PERIPH_A, 0);	/* COL	*/
++			select_peripheral(PC(1),  PERIPH_A, 0);	/* CRS	*/
++			select_peripheral(PC(2),  PERIPH_A, 0);	/* TXER	*/
++			select_peripheral(PC(5),  PERIPH_A, 0);	/* TXD2	*/
++			select_peripheral(PC(6),  PERIPH_A, 0);	/* TXD3 */
++			select_peripheral(PC(11), PERIPH_A, 0);	/* RXD2	*/
++			select_peripheral(PC(12), PERIPH_A, 0);	/* RXD3	*/
++			select_peripheral(PC(14), PERIPH_A, 0);	/* RXCK	*/
++			select_peripheral(PC(18), PERIPH_A, 0);	/* SPD	*/
++		}
++		break;
++
++	case 1:
++		pdev = &macb1_device;
++
++		select_peripheral(PD(13), PERIPH_B, 0);		/* TXD0	*/
++		select_peripheral(PD(14), PERIPH_B, 0);		/* TXD1	*/
++		select_peripheral(PD(11), PERIPH_B, 0);		/* TXEN	*/
++		select_peripheral(PD(12), PERIPH_B, 0);		/* TXCK */
++		select_peripheral(PD(10), PERIPH_B, 0);		/* RXD0	*/
++		select_peripheral(PD(6),  PERIPH_B, 0);		/* RXD1	*/
++		select_peripheral(PD(5),  PERIPH_B, 0);		/* RXER	*/
++		select_peripheral(PD(4),  PERIPH_B, 0);		/* RXDV	*/
++		select_peripheral(PD(3),  PERIPH_B, 0);		/* MDC	*/
++		select_peripheral(PD(2),  PERIPH_B, 0);		/* MDIO	*/
++
++		if (!data->is_rmii) {
++			select_peripheral(PC(19), PERIPH_B, 0);	/* COL	*/
++			select_peripheral(PC(23), PERIPH_B, 0);	/* CRS	*/
++			select_peripheral(PC(26), PERIPH_B, 0);	/* TXER	*/
++			select_peripheral(PC(27), PERIPH_B, 0);	/* TXD2	*/
++			select_peripheral(PC(28), PERIPH_B, 0);	/* TXD3 */
++			select_peripheral(PC(29), PERIPH_B, 0);	/* RXD2	*/
++			select_peripheral(PC(30), PERIPH_B, 0);	/* RXD3	*/
++			select_peripheral(PC(24), PERIPH_B, 0);	/* RXCK	*/
++			select_peripheral(PD(15), PERIPH_B, 0);	/* SPD	*/
++		}
++		break;
++
++	default:
++		return NULL;
++	}
++
++	memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data));
++	platform_device_register(pdev);
++
++	return pdev;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  SPI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_spi0_resource[] = {
++	PBMEM(0xffe00000),
++	IRQ(3),
++};
++DEFINE_DEV(atmel_spi, 0);
++DEV_CLK(spi_clk, atmel_spi0, pba, 0);
++
++static struct resource atmel_spi1_resource[] = {
++	PBMEM(0xffe00400),
++	IRQ(4),
++};
++DEFINE_DEV(atmel_spi, 1);
++DEV_CLK(spi_clk, atmel_spi1, pba, 1);
++
++static void __init
++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
++		      unsigned int n, const u8 *pins)
++{
++	unsigned int pin, mode;
++
++	for (; n; n--, b++) {
++		b->bus_num = bus_num;
++		if (b->chip_select >= 4)
++			continue;
++		pin = (unsigned)b->controller_data;
++		if (!pin) {
++			pin = pins[b->chip_select];
++			b->controller_data = (void *)pin;
++		}
++		mode = AT32_GPIOF_OUTPUT;
++		if (!(b->mode & SPI_CS_HIGH))
++			mode |= AT32_GPIOF_HIGH;
++		at32_select_gpio(pin, mode);
++	}
++}
++
++struct platform_device *__init
++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
++{
++	/*
++	 * Manage the chipselects as GPIOs, normally using the same pins
++	 * the SPI controller expects; but boards can use other pins.
++	 */
++	static u8 __initdata spi0_pins[] =
++		{ GPIO_PIN_PA(3), GPIO_PIN_PA(4),
++		  GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
++	static u8 __initdata spi1_pins[] =
++		{ GPIO_PIN_PB(2), GPIO_PIN_PB(3),
++		  GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_spi0_device;
++		select_peripheral(PA(0),  PERIPH_A, 0);	/* MISO	 */
++		select_peripheral(PA(1),  PERIPH_A, 0);	/* MOSI	 */
++		select_peripheral(PA(2),  PERIPH_A, 0);	/* SCK	 */
++		at32_spi_setup_slaves(0, b, n, spi0_pins);
++		break;
++
++	case 1:
++		pdev = &atmel_spi1_device;
++		select_peripheral(PB(0),  PERIPH_B, 0);	/* MISO  */
++		select_peripheral(PB(1),  PERIPH_B, 0);	/* MOSI  */
++		select_peripheral(PB(5),  PERIPH_B, 0);	/* SCK   */
++		at32_spi_setup_slaves(1, b, n, spi1_pins);
++		break;
++
++	default:
++		return NULL;
++	}
++
++	spi_register_board_info(b, n);
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  TWI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_twi0_resource[] __initdata = {
++	PBMEM(0xffe00800),
++	IRQ(5),
++};
++static struct clk atmel_twi0_pclk = {
++	.name		= "twi_pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 2,
++};
++
++struct platform_device *__init at32_add_device_twi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_twi", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_twi0_resource,
++				ARRAY_SIZE(atmel_twi0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
++	select_peripheral(PA(7),  PERIPH_A, 0);	/* SDL	*/
++
++	atmel_twi0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * MMC
++ * -------------------------------------------------------------------- */
++static struct resource atmel_mci0_resource[] __initdata = {
++	PBMEM(0xfff02400),
++	IRQ(28),
++};
++static struct clk atmel_mci0_pclk = {
++	.name		= "mci_clk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 9,
++};
++
++struct platform_device *__init
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_mci", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_resources(pdev, atmel_mci0_resource,
++				ARRAY_SIZE(atmel_mci0_resource)))
++		goto fail;
++
++	if (data && platform_device_add_data(pdev, data,
++				sizeof(struct mci_platform_data)))
++		goto fail;
++
++	select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
++	select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
++	select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
++	select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
++	select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
++	select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
++
++	if (data) {
++		if (data->detect_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->detect_pin, 0);
++		if (data->wp_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->wp_pin, 0);
++	}
++
++	atmel_mci0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  LCDC
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++static struct atmel_lcdfb_info atmel_lcdfb0_data;
++static struct resource atmel_lcdfb0_resource[] = {
++	{
++		.start		= 0xff000000,
++		.end		= 0xff000fff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(1),
++	{
++		/* Placeholder for pre-allocated fb memory */
++		.start		= 0x00000000,
++		.end		= 0x00000000,
++		.flags		= 0,
++	},
++};
++DEFINE_DEV_DATA(atmel_lcdfb, 0);
++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7);
++static struct clk atmel_lcdfb0_pixclk = {
++	.name		= "lcdc_clk",
++	.dev		= &atmel_lcdfb0_device.dev,
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 7,
++};
++
++struct platform_device *__init
++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
++		     unsigned long fbmem_start, unsigned long fbmem_len)
++{
++	struct platform_device *pdev;
++	struct atmel_lcdfb_info *info;
++	struct fb_monspecs *monspecs;
++	struct fb_videomode *modedb;
++	unsigned int modedb_size;
++
++	/*
++	 * Do a deep copy of the fb data, monspecs and modedb. Make
++	 * sure all allocations are done before setting up the
++	 * portmux.
++	 */
++	monspecs = kmemdup(data->default_monspecs,
++			   sizeof(struct fb_monspecs), GFP_KERNEL);
++	if (!monspecs)
++		return NULL;
++
++	modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len;
++	modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL);
++	if (!modedb)
++		goto err_dup_modedb;
++	monspecs->modedb = modedb;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_lcdfb0_device;
++		select_peripheral(PC(19), PERIPH_A, 0);	/* CC	  */
++		select_peripheral(PC(20), PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PC(21), PERIPH_A, 0);	/* PCLK	  */
++		select_peripheral(PC(22), PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PC(23), PERIPH_A, 0);	/* DVAL	  */
++		select_peripheral(PC(24), PERIPH_A, 0);	/* MODE	  */
++		select_peripheral(PC(25), PERIPH_A, 0);	/* PWR	  */
++		select_peripheral(PC(26), PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PC(27), PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PC(28), PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PC(29), PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PC(30), PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PC(31), PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PD(0),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PD(1),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PD(2),  PERIPH_A, 0);	/* DATA8  */
++		select_peripheral(PD(3),  PERIPH_A, 0);	/* DATA9  */
++		select_peripheral(PD(4),  PERIPH_A, 0);	/* DATA10 */
++		select_peripheral(PD(5),  PERIPH_A, 0);	/* DATA11 */
++		select_peripheral(PD(6),  PERIPH_A, 0);	/* DATA12 */
++		select_peripheral(PD(7),  PERIPH_A, 0);	/* DATA13 */
++		select_peripheral(PD(8),  PERIPH_A, 0);	/* DATA14 */
++		select_peripheral(PD(9),  PERIPH_A, 0);	/* DATA15 */
++		select_peripheral(PD(10), PERIPH_A, 0);	/* DATA16 */
++		select_peripheral(PD(11), PERIPH_A, 0);	/* DATA17 */
++		select_peripheral(PD(12), PERIPH_A, 0);	/* DATA18 */
++		select_peripheral(PD(13), PERIPH_A, 0);	/* DATA19 */
++		select_peripheral(PD(14), PERIPH_A, 0);	/* DATA20 */
++		select_peripheral(PD(15), PERIPH_A, 0);	/* DATA21 */
++		select_peripheral(PD(16), PERIPH_A, 0);	/* DATA22 */
++		select_peripheral(PD(17), PERIPH_A, 0);	/* DATA23 */
++
++		clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
++		clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
++		break;
++
++	default:
++		goto err_invalid_id;
++	}
++
++	if (fbmem_len) {
++		pdev->resource[2].start = fbmem_start;
++		pdev->resource[2].end = fbmem_start + fbmem_len - 1;
++		pdev->resource[2].flags = IORESOURCE_MEM;
++	}
++
++	info = pdev->dev.platform_data;
++	memcpy(info, data, sizeof(struct atmel_lcdfb_info));
++	info->default_monspecs = monspecs;
++
++	platform_device_register(pdev);
++	return pdev;
++
++err_invalid_id:
++	kfree(modedb);
++err_dup_modedb:
++	kfree(monspecs);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ *  PWM
++ * -------------------------------------------------------------------- */
++static struct resource atmel_pwm0_resource[] __initdata = {
++	PBMEM(0xfff01400),
++	IRQ(24),
++};
++static struct clk atmel_pwm0_mck = {
++	.name		= "mck",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 5,
++};
++
++struct platform_device *__init at32_add_device_pwm(u32 mask)
++{
++	struct platform_device *pdev;
++
++	if (!mask)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_pwm", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_pwm0_resource,
++				ARRAY_SIZE(atmel_pwm0_resource)))
++		goto out_free_pdev;
++
++	if (platform_device_add_data(pdev, &mask, sizeof(mask)))
++		goto out_free_pdev;
++
++	if (mask & (1 << 0))
++		select_peripheral(PA(28), PERIPH_A, 0);
++	if (mask & (1 << 1))
++		select_peripheral(PA(29), PERIPH_A, 0);
++	if (mask & (1 << 2))
++		select_peripheral(PA(21), PERIPH_B, 0);
++	if (mask & (1 << 3))
++		select_peripheral(PA(22), PERIPH_B, 0);
++
++	atmel_pwm0_mck.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  SSC
++ * -------------------------------------------------------------------- */
++static struct resource ssc0_resource[] = {
++	PBMEM(0xffe01c00),
++	IRQ(10),
++};
++DEFINE_DEV(ssc, 0);
++DEV_CLK(pclk, ssc0, pba, 7);
++
++static struct resource ssc1_resource[] = {
++	PBMEM(0xffe02000),
++	IRQ(11),
++};
++DEFINE_DEV(ssc, 1);
++DEV_CLK(pclk, ssc1, pba, 8);
++
++static struct resource ssc2_resource[] = {
++	PBMEM(0xffe02400),
++	IRQ(12),
++};
++DEFINE_DEV(ssc, 2);
++DEV_CLK(pclk, ssc2, pba, 9);
++
++struct platform_device *__init
++at32_add_device_ssc(unsigned int id, unsigned int flags)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &ssc0_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
++		break;
++	case 1:
++		pdev = &ssc1_device;
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
++		break;
++	case 2:
++		pdev = &ssc2_device;
++		if (flags & ATMEL_SSC_TD)
++			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
++		if (flags & ATMEL_SSC_RD)
++			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
++		if (flags & ATMEL_SSC_TK)
++			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
++		if (flags & ATMEL_SSC_TF)
++			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
++		if (flags & ATMEL_SSC_RF)
++			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
++		if (flags & ATMEL_SSC_RK)
++			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
++ *  USB Device Controller
++ * -------------------------------------------------------------------- */
++static struct resource usba0_resource[] __initdata = {
++	{
++		.start		= 0xff300000,
++		.end		= 0xff3fffff,
++		.flags		= IORESOURCE_MEM,
++	}, {
++		.start		= 0xfff03000,
++		.end		= 0xfff033ff,
++		.flags		= IORESOURCE_MEM,
++	},
++	IRQ(31),
++};
++static struct clk usba0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 12,
++};
++static struct clk usba0_hclk = {
++	.name		= "hclk",
++	.parent		= &hsb_clk,
++	.mode		= hsb_clk_mode,
++	.get_rate	= hsb_clk_get_rate,
++	.index		= 6,
++};
++
++struct platform_device *__init
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_usba_udc", 0);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, usba0_resource,
++					  ARRAY_SIZE(usba0_resource)))
++		goto out_free_pdev;
++
++	if (data) {
++		if (platform_device_add_data(pdev, data, sizeof(*data)))
++			goto out_free_pdev;
++
++		if (data->vbus_pin != GPIO_PIN_NONE)
++			at32_select_gpio(data->vbus_pin, 0);
++	}
++
++	usba0_pclk.dev = &pdev->dev;
++	usba0_hclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++
++	return pdev;
++
++out_free_pdev:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * IDE / CompactFlash
++ * -------------------------------------------------------------------- */
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001)
++static struct resource at32_smc_cs4_resource[] __initdata = {
++	{
++		.start	= 0x04000000,
++		.end	= 0x07ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++static struct resource at32_smc_cs5_resource[] __initdata = {
++	{
++		.start	= 0x20000000,
++		.end	= 0x23ffffff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(~0UL), /* Magic IRQ will be overridden */
++};
++
++static int __init at32_init_ide_or_cf(struct platform_device *pdev,
++		unsigned int cs, unsigned int extint)
++{
++	static unsigned int extint_pin_map[4] __initdata = {
++		GPIO_PIN_PB(25),
++		GPIO_PIN_PB(26),
++		GPIO_PIN_PB(27),
++		GPIO_PIN_PB(28),
++	};
++	static bool common_pins_initialized __initdata = false;
++	unsigned int extint_pin;
++	int ret;
++
++	if (extint >= ARRAY_SIZE(extint_pin_map))
++		return -EINVAL;
++	extint_pin = extint_pin_map[extint];
++
++	switch (cs) {
++	case 4:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs4_resource,
++				ARRAY_SIZE(at32_smc_cs4_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(21), PERIPH_A, 0); /* NCS4   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS4A));
++		break;
++	case 5:
++		ret = platform_device_add_resources(pdev,
++				at32_smc_cs5_resource,
++				ARRAY_SIZE(at32_smc_cs5_resource));
++		if (ret)
++			return ret;
++
++		select_peripheral(PE(22), PERIPH_A, 0); /* NCS5   -> OE_N  */
++		set_ebi_sfr_bits(HMATRIX_BIT(CS5A));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (!common_pins_initialized) {
++		select_peripheral(PE(19), PERIPH_A, 0);	/* CFCE1  -> CS0_N */
++		select_peripheral(PE(20), PERIPH_A, 0);	/* CFCE2  -> CS1_N */
++		select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW  -> DIR   */
++		select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT  <- IORDY */
++		common_pins_initialized = true;
++	}
++
++	at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH);
++
++	pdev->resource[1].start = EIM_IRQ_BASE + extint;
++	pdev->resource[1].end = pdev->resource[1].start;
++
++	return 0;
++}
++
++struct platform_device *__init
++at32_add_device_ide(unsigned int id, unsigned int extint,
++		    struct ide_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_ide", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ide_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++struct platform_device *__init
++at32_add_device_cf(unsigned int id, unsigned int extint,
++		    struct cf_platform_data *data)
++{
++	struct platform_device *pdev;
++
++	pdev = platform_device_alloc("at32_cf", id);
++	if (!pdev)
++		goto fail;
++
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct cf_platform_data)))
++		goto fail;
++
++	if (at32_init_ide_or_cf(pdev, data->cs, extint))
++		goto fail;
++
++	if (data->detect_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH);
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
++	if (data->vcc_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->vcc_pin, 0);
++	/* READY is used as extint, so we can't select it as gpio */
++
++	platform_device_add(pdev);
++	return pdev;
++
++fail:
++	platform_device_put(pdev);
++	return NULL;
++}
++#endif
++
++/* --------------------------------------------------------------------
++ * AC97C
++ * -------------------------------------------------------------------- */
++static struct resource atmel_ac97c0_resource[] __initdata = {
++	PBMEM(0xfff02800),
++	IRQ(29),
++};
++static struct clk atmel_ac97c0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 10,
++};
++
++struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_ac97c", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, atmel_ac97c0_resource,
++				ARRAY_SIZE(atmel_ac97c0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++
++	atmel_ac97c0_pclk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ * ABDAC
++ * -------------------------------------------------------------------- */
++static struct resource abdac0_resource[] __initdata = {
++	PBMEM(0xfff02000),
++	IRQ(27),
++};
++static struct clk abdac0_pclk = {
++	.name		= "pclk",
++	.parent		= &pbb_clk,
++	.mode		= pbb_clk_mode,
++	.get_rate	= pbb_clk_get_rate,
++	.index		= 8,
++};
++static struct clk abdac0_sample_clk = {
++	.name		= "sample_clk",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 6,
++};
++
++struct platform_device *__init at32_add_device_abdac(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (id != 0)
++		return NULL;
++
++	pdev = platform_device_alloc("abdac", id);
++	if (!pdev)
++		return NULL;
++
++	if (platform_device_add_resources(pdev, abdac0_resource,
++				ARRAY_SIZE(abdac0_resource)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
++	select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
++	select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
++	select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
++
++	abdac0_pclk.dev = &pdev->dev;
++	abdac0_sample_clk.dev = &pdev->dev;
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
++ *  GCLK
++ * -------------------------------------------------------------------- */
++static struct clk gclk0 = {
++	.name		= "gclk0",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 0,
++};
++static struct clk gclk1 = {
++	.name		= "gclk1",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 1,
++};
++static struct clk gclk2 = {
++	.name		= "gclk2",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 2,
++};
++static struct clk gclk3 = {
++	.name		= "gclk3",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 3,
++};
++static struct clk gclk4 = {
++	.name		= "gclk4",
++	.mode		= genclk_mode,
++	.get_rate	= genclk_get_rate,
++	.set_rate	= genclk_set_rate,
++	.set_parent	= genclk_set_parent,
++	.index		= 4,
++};
++
++struct clk *at32_clock_list[] = {
++	&osc32k,
++	&osc0,
++	&osc1,
++	&pll0,
++	&pll1,
++	&cpu_clk,
++	&hsb_clk,
++	&pba_clk,
++	&pbb_clk,
++	&at32_pm_pclk,
++	&at32_intc0_pclk,
++	&hmatrix_clk,
++	&ebi_clk,
++	&hramc_clk,
++	&smc0_pclk,
++	&smc0_mck,
++	&pdc_hclk,
++	&pdc_pclk,
++	&dmaca0_hclk,
++	&pico_clk,
++	&pio0_mck,
++	&pio1_mck,
++	&pio2_mck,
++	&pio3_mck,
++	&pio4_mck,
++	&at32_systc0_pclk,
++	&atmel_usart0_usart,
++	&atmel_usart1_usart,
++	&atmel_usart2_usart,
++	&atmel_usart3_usart,
++	&atmel_pwm0_mck,
++#if defined(CONFIG_CPU_AT32AP7000)
++	&macb0_hclk,
++	&macb0_pclk,
++	&macb1_hclk,
++	&macb1_pclk,
++#endif
++	&atmel_spi0_spi_clk,
++	&atmel_spi1_spi_clk,
++	&atmel_twi0_pclk,
++	&atmel_mci0_pclk,
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	&atmel_lcdfb0_hck1,
++	&atmel_lcdfb0_pixclk,
++#endif
++	&ssc0_pclk,
++	&ssc1_pclk,
++	&ssc2_pclk,
++	&usba0_hclk,
++	&usba0_pclk,
++	&atmel_ac97c0_pclk,
++	&abdac0_pclk,
++	&abdac0_sample_clk,
++	&gclk0,
++	&gclk1,
++	&gclk2,
++	&gclk3,
++	&gclk4,
++};
++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
++
++void __init at32_portmux_init(void)
++{
++	at32_init_pio(&pio0_device);
++	at32_init_pio(&pio1_device);
++	at32_init_pio(&pio2_device);
++	at32_init_pio(&pio3_device);
++	at32_init_pio(&pio4_device);
++}
++
++void __init at32_clock_init(void)
++{
++	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
++	int i;
++
++	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
++		main_clock = &pll0;
++		cpu_clk.parent = &pll0;
++	} else {
++		main_clock = &osc0;
++		cpu_clk.parent = &osc0;
++	}
++
++	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
++		pll0.parent = &osc1;
++	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
++		pll1.parent = &osc1;
++
++	genclk_init_parent(&gclk0);
++	genclk_init_parent(&gclk1);
++	genclk_init_parent(&gclk2);
++	genclk_init_parent(&gclk3);
++	genclk_init_parent(&gclk4);
++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002)
++	genclk_init_parent(&atmel_lcdfb0_pixclk);
++#endif
++	genclk_init_parent(&abdac0_sample_clk);
++
++	/*
++	 * Turn on all clocks that have at least one user already, and
++	 * turn off everything else. We only do this for module
++	 * clocks, and even though it isn't particularly pretty to
++	 * check the address of the mode function, it should do the
++	 * trick...
++	 */
++	for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
++		struct clk *clk = at32_clock_list[i];
++
++		if (clk->users == 0)
++			continue;
++
++		if (clk->mode == &cpu_clk_mode)
++			cpu_mask |= 1 << clk->index;
++		else if (clk->mode == &hsb_clk_mode)
++			hsb_mask |= 1 << clk->index;
++		else if (clk->mode == &pba_clk_mode)
++			pba_mask |= 1 << clk->index;
++		else if (clk->mode == &pbb_clk_mode)
++			pbb_mask |= 1 << clk->index;
++	}
++
++	pm_writel(CPU_MASK, cpu_mask);
++	pm_writel(HSB_MASK, hsb_mask);
++	pm_writel(PBA_MASK, pba_mask);
++	pm_writel(PBB_MASK, pbb_mask);
++}
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/extint.c linux-avr32/arch/avr32/mach-at32ap/extint.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/extint.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/extint.c	2008-02-01 14:51:35.000000000 -0500
+@@ -26,16 +26,10 @@
+ #define EIC_MODE				0x0014
+ #define EIC_EDGE				0x0018
+ #define EIC_LEVEL				0x001c
+-#define EIC_TEST				0x0020
+ #define EIC_NMIC				0x0024
+ 
+-/* Bitfields in TEST */
+-#define EIC_TESTEN_OFFSET			31
+-#define EIC_TESTEN_SIZE				1
+-
+ /* Bitfields in NMIC */
+-#define EIC_EN_OFFSET				0
+-#define EIC_EN_SIZE				1
++#define EIC_NMIC_ENABLE				(1 << 0)
+ 
+ /* Bit manipulation macros */
+ #define EIC_BIT(name)					\
+@@ -63,6 +57,9 @@ struct eic {
+ 	unsigned int first_irq;
+ };
+ 
++static struct eic *nmi_eic;
++static bool nmi_enabled;
++
+ static void eic_ack_irq(unsigned int irq)
+ {
+ 	struct eic *eic = get_irq_chip_data(irq);
+@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int
+ 		eic_writel(eic, EDGE, edge);
+ 		eic_writel(eic, LEVEL, level);
+ 
+-		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
+ 			flow_type |= IRQ_LEVEL;
++			__set_irq_handler_unlocked(irq, handle_level_irq);
++		} else
++			__set_irq_handler_unlocked(irq, handle_edge_irq);
+ 		desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ 		desc->status |= flow_type;
+ 	}
+@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = {
+ static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
+ {
+ 	struct eic *eic = desc->handler_data;
+-	struct irq_desc *ext_desc;
+ 	unsigned long status, pending;
+-	unsigned int i, ext_irq;
++	unsigned int i;
+ 
+ 	status = eic_readl(eic, ISR);
+ 	pending = status & eic_readl(eic, IMR);
+@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int i
+ 		i = fls(pending) - 1;
+ 		pending &= ~(1 << i);
+ 
+-		ext_irq = i + eic->first_irq;
+-		ext_desc = irq_desc + ext_irq;
+-		if (ext_desc->status & IRQ_LEVEL)
+-			handle_level_irq(ext_irq, ext_desc);
+-		else
+-			handle_edge_irq(ext_irq, ext_desc);
++		generic_handle_irq(i + eic->first_irq);
+ 	}
+ }
+ 
++int nmi_enable(void)
++{
++	nmi_enabled = true;
++
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE);
++
++	return 0;
++}
++
++void nmi_disable(void)
++{
++	if (nmi_eic)
++		eic_writel(nmi_eic, NMIC, 0);
++
++	nmi_enabled = false;
++}
++
+ static int __init eic_probe(struct platform_device *pdev)
+ {
+ 	struct eic *eic;
+@@ -214,14 +226,13 @@ static int __init eic_probe(struct platf
+ 	pattern = eic_readl(eic, MODE);
+ 	nr_irqs = fls(pattern);
+ 
+-	/* Trigger on falling edge unless overridden by driver */
+-	eic_writel(eic, MODE, 0UL);
++	/* Trigger on low level unless overridden by driver */
+ 	eic_writel(eic, EDGE, 0UL);
++	eic_writel(eic, LEVEL, 0UL);
+ 
+ 	eic->chip = &eic_chip;
+ 
+ 	for (i = 0; i < nr_irqs; i++) {
+-		/* NOTE the handler we set here is ignored by the demux */
+ 		set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
+ 					 handle_level_irq);
+ 		set_irq_chip_data(eic->first_irq + i, eic);
+@@ -230,6 +241,16 @@ static int __init eic_probe(struct platf
+ 	set_irq_chained_handler(int_irq, demux_eic_irq);
+ 	set_irq_data(int_irq, eic);
+ 
++	if (pdev->id == 0) {
++		nmi_eic = eic;
++		if (nmi_enabled)
++			/*
++			 * Someone tried to enable NMI before we were
++			 * ready. Do it now.
++			 */
++			nmi_enable();
++	}
++
+ 	dev_info(&pdev->dev,
+ 		 "External Interrupt Controller at 0x%p, IRQ %u\n",
+ 		 eic->regs, int_irq);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/gpio-dev.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/gpio-dev.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,573 @@
++/*
++ * GPIO /dev and configfs interface
++ *
++ * Copyright (C) 2006-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/kernel.h>
++#include <linux/configfs.h>
++#include <linux/cdev.h>
++#include <linux/device.h>
++#include <linux/fs.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/poll.h>
++#include <linux/uaccess.h>
++#include <linux/wait.h>
++
++#include <asm/gpio.h>
++#include <asm/arch/portmux.h>
++
++#define GPIO_DEV_MAX			8
++
++static struct class *gpio_dev_class;
++static dev_t gpio_devt;
++
++struct gpio_item {
++	spinlock_t lock;
++
++	int enabled;
++	int initialized;
++	int port;
++	u32 pin_mask;
++	u32 oe_mask;
++
++	/* Pin state last time we read it (for blocking reads) */
++	u32 pin_state;
++	int changed;
++
++	wait_queue_head_t change_wq;
++	struct fasync_struct *async_queue;
++
++	int id;
++	struct class_device *gpio_dev;
++	struct cdev char_dev;
++	struct config_item item;
++};
++
++struct gpio_attribute {
++	struct configfs_attribute attr;
++	ssize_t (*show)(struct gpio_item *, char *);
++	ssize_t (*store)(struct gpio_item *, const char *, size_t);
++};
++
++static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
++{
++	struct gpio_item *gpio = dev_id;
++	u32 old_state, new_state;
++
++	old_state = gpio->pin_state;
++	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++	gpio->pin_state = new_state;
++
++	if (new_state != old_state) {
++		gpio->changed = 1;
++		wake_up_interruptible(&gpio->change_wq);
++
++		if (gpio->async_queue)
++			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int gpio_dev_open(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = container_of(inode->i_cdev,
++					      struct gpio_item,
++					      char_dev);
++	unsigned int irq;
++	unsigned int i;
++	int ret;
++
++	nonseekable_open(inode, file);
++	config_item_get(&gpio->item);
++	file->private_data = gpio;
++
++	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
++						       gpio->pin_mask);
++	gpio->changed = 1;
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			ret = request_irq(irq, gpio_dev_interrupt, 0,
++					  "gpio-dev", gpio);
++			if (ret)
++				goto err_irq;
++		}
++	}
++
++	return 0;
++
++err_irq:
++	while (i--) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return ret;
++}
++
++static int gpio_dev_fasync(int fd, struct file *file, int mode)
++{
++	struct gpio_item *gpio = file->private_data;
++
++	return fasync_helper(fd, file, mode, &gpio->async_queue);
++}
++
++static int gpio_dev_release(struct inode *inode, struct file *file)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int irq;
++	unsigned int i;
++
++	gpio_dev_fasync(-1, file, 0);
++
++	for (i = 0; i < 32; i++) {
++		if (gpio->pin_mask & (1 << i)) {
++			irq = gpio_to_irq(32 * gpio->port + i);
++			free_irq(irq, gpio);
++		}
++	}
++
++	config_item_put(&gpio->item);
++
++	return 0;
++}
++
++static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
++{
++	struct gpio_item *gpio = file->private_data;
++	unsigned int mask = 0;
++
++	poll_wait(file, &gpio->change_wq, wait);
++	if (gpio->changed)
++		mask |= POLLIN | POLLRDNORM;
++
++	return mask;
++}
++
++static ssize_t gpio_dev_read(struct file *file, char __user *buf,
++			     size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value;
++
++	spin_lock_irq(&gpio->lock);
++	while (!gpio->changed) {
++		spin_unlock_irq(&gpio->lock);
++
++		if (file->f_flags & O_NONBLOCK)
++			return -EAGAIN;
++
++		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
++			return -ERESTARTSYS;
++
++		spin_lock_irq(&gpio->lock);
++	}
++
++	gpio->changed = 0;
++	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
++
++	spin_unlock_irq(&gpio->lock);
++
++	count = min(count, (size_t)4);
++	if (copy_to_user(buf, &value, count))
++		return -EFAULT;
++
++	return count;
++}
++
++static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
++			      size_t count, loff_t *offset)
++{
++	struct gpio_item *gpio = file->private_data;
++	u32 value = 0;
++	u32 mask = ~0UL;
++
++	count = min(count, (size_t)4);
++	if (copy_from_user(&value, buf, count))
++		return -EFAULT;
++
++	/* Assuming big endian */
++	mask <<= (4 - count) * 8;
++	mask &= gpio->pin_mask;
++
++	at32_gpio_set_value_multiple(gpio->port, value, mask);
++
++	return count;
++}
++
++static struct file_operations gpio_dev_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.open		= gpio_dev_open,
++	.release	= gpio_dev_release,
++	.fasync		= gpio_dev_fasync,
++	.poll		= gpio_dev_poll,
++	.read		= gpio_dev_read,
++	.write		= gpio_dev_write,
++};
++
++static struct gpio_item *to_gpio_item(struct config_item *item)
++{
++	return item ? container_of(item, struct gpio_item, item) : NULL;
++}
++
++static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->port);
++}
++
++static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	unsigned long id;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	id = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Switching PIO is not allowed when live... */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		ret = -ENXIO;
++		if (at32_gpio_port_is_valid(id)) {
++			gpio->port = id;
++			ret = count;
++		}
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->pin_mask);
++}
++
++static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
++				   const char *page, size_t count)
++{
++	u32 new_mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	new_mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* Can't update the pin mask while live. */
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask &= new_mask;
++		gpio->pin_mask = new_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "0x%08x\n", gpio->oe_mask);
++}
++
++static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	u32 mask;
++	char *p = (char *)page;
++	ssize_t ret = -EINVAL;
++
++	mask = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	spin_lock(&gpio->lock);
++	if (!gpio->enabled) {
++		gpio->oe_mask = mask & gpio->pin_mask;
++		ret = count;
++	}
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
++{
++	return sprintf(page, "%d\n", gpio->enabled);
++}
++
++static ssize_t gpio_store_enabled(struct gpio_item *gpio,
++				  const char *page, size_t count)
++{
++	char *p = (char *)page;
++	int enabled;
++	int ret;
++
++	enabled = simple_strtoul(p, &p, 0);
++	if (!p || (*p && (*p != '\n')))
++		return -EINVAL;
++
++	/* make it a boolean value */
++	enabled = !!enabled;
++
++	if (gpio->enabled == enabled)
++		/* No change; do nothing. */
++		return count;
++
++	BUG_ON(gpio->id >= GPIO_DEV_MAX);
++
++	if (!enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++	} else {
++		if (gpio->port < 0 || !gpio->pin_mask)
++			return -ENODEV;
++	}
++
++	/* Disallow any updates to gpio_id or pin_mask */
++	spin_lock(&gpio->lock);
++	gpio->enabled = enabled;
++	spin_unlock(&gpio->lock);
++
++	if (!enabled)
++		return count;
++
++	/* Now, try to allocate the pins */
++	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
++	if (ret)
++		goto err_alloc_pins;
++
++	gpio->initialized = 1;
++
++	cdev_init(&gpio->char_dev, &gpio_dev_fops);
++	gpio->char_dev.owner = THIS_MODULE;
++	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
++	if (ret < 0)
++		goto err_cdev_add;
++	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
++					     MKDEV(MAJOR(gpio_devt), gpio->id),
++					     NULL,
++					     "gpio%d", gpio->id);
++	if (IS_ERR(gpio->gpio_dev)) {
++		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
++		ret = PTR_ERR(gpio->gpio_dev);
++		goto err_class_dev;
++	}
++
++	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
++	       gpio->id, gpio->port, gpio->pin_mask,
++	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
++
++	return 0;
++
++err_class_dev:
++	cdev_del(&gpio->char_dev);
++err_cdev_add:
++	at32_deselect_pins(gpio->port, gpio->pin_mask);
++	gpio->initialized = 0;
++err_alloc_pins:
++	spin_lock(&gpio->lock);
++	gpio->enabled = 0;
++	spin_unlock(&gpio->lock);
++
++	return ret;
++}
++
++static struct gpio_attribute gpio_item_attr_gpio_id = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "gpio_id",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_gpio_id,
++	.store = gpio_store_gpio_id,
++};
++static struct gpio_attribute gpio_item_attr_pin_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "pin_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_pin_mask,
++	.store = gpio_store_pin_mask,
++};
++static struct gpio_attribute gpio_item_attr_oe_mask = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "oe_mask",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_oe_mask,
++	.store = gpio_store_oe_mask,
++};
++static struct gpio_attribute gpio_item_attr_enabled = {
++	.attr = {
++		.ca_owner = THIS_MODULE,
++		.ca_name = "enabled",
++		.ca_mode = S_IRUGO | S_IWUSR,
++	},
++	.show = gpio_show_enabled,
++	.store = gpio_store_enabled,
++};
++
++static struct configfs_attribute *gpio_item_attrs[] = {
++	&gpio_item_attr_gpio_id.attr,
++	&gpio_item_attr_pin_mask.attr,
++	&gpio_item_attr_oe_mask.attr,
++	&gpio_item_attr_enabled.attr,
++	NULL,
++};
++
++static ssize_t gpio_show_attr(struct config_item *item,
++			      struct configfs_attribute *attr,
++			      char *page)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = 0;
++
++	if (gpio_attr->show)
++		ret = gpio_attr->show(gpio_item, page);
++	return ret;
++}
++
++static ssize_t gpio_store_attr(struct config_item *item,
++			       struct configfs_attribute *attr,
++			       const char *page, size_t count)
++{
++	struct gpio_item *gpio_item = to_gpio_item(item);
++	struct gpio_attribute *gpio_attr
++		= container_of(attr, struct gpio_attribute, attr);
++	ssize_t ret = -EINVAL;
++
++	if (gpio_attr->store)
++		ret = gpio_attr->store(gpio_item, page, count);
++	return ret;
++}
++
++static void gpio_release(struct config_item *item)
++{
++	kfree(to_gpio_item(item));
++}
++
++static struct configfs_item_operations gpio_item_ops = {
++	.release		= gpio_release,
++	.show_attribute		= gpio_show_attr,
++	.store_attribute	= gpio_store_attr,
++};
++
++static struct config_item_type gpio_item_type = {
++	.ct_item_ops	= &gpio_item_ops,
++	.ct_attrs	= gpio_item_attrs,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct config_item *gpio_make_item(struct config_group *group,
++					  const char *name)
++{
++	static int next_id;
++	struct gpio_item *gpio;
++
++	if (next_id >= GPIO_DEV_MAX)
++		return NULL;
++
++	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
++	if (!gpio)
++		return NULL;
++
++	gpio->id = next_id++;
++	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
++	spin_lock_init(&gpio->lock);
++	init_waitqueue_head(&gpio->change_wq);
++
++	return &gpio->item;
++}
++
++static void gpio_drop_item(struct config_group *group,
++			   struct config_item *item)
++{
++	struct gpio_item *gpio = to_gpio_item(item);
++
++	spin_lock(&gpio->lock);
++	if (gpio->enabled) {
++		class_device_unregister(gpio->gpio_dev);
++		cdev_del(&gpio->char_dev);
++	}
++
++	if (gpio->initialized) {
++		at32_deselect_pins(gpio->port, gpio->pin_mask);
++		gpio->initialized = 0;
++		gpio->enabled = 0;
++	}
++	spin_unlock(&gpio->lock);
++}
++
++static struct configfs_group_operations gpio_group_ops = {
++	.make_item	= gpio_make_item,
++	.drop_item	= gpio_drop_item,
++};
++
++static struct config_item_type gpio_group_type = {
++	.ct_group_ops	= &gpio_group_ops,
++	.ct_owner	= THIS_MODULE,
++};
++
++static struct configfs_subsystem gpio_subsys = {
++	.su_group = {
++		.cg_item = {
++			 .ci_namebuf = "gpio",
++			 .ci_type = &gpio_group_type,
++		 },
++	},
++};
++
++static int __init gpio_dev_init(void)
++{
++	int err;
++
++	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
++	if (IS_ERR(gpio_dev_class)) {
++		err = PTR_ERR(gpio_dev_class);
++		goto err_class_create;
++	}
++
++	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
++	if (err < 0)
++		goto err_alloc_chrdev;
++
++	/* Configfs initialization */
++	config_group_init(&gpio_subsys.su_group);
++	mutex_init(&gpio_subsys.su_mutex);
++	err = configfs_register_subsystem(&gpio_subsys);
++	if (err)
++		goto err_register_subsys;
++
++	return 0;
++
++err_register_subsys:
++	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
++err_alloc_chrdev:
++	class_destroy(gpio_dev_class);
++err_class_create:
++	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
++	return err;
++}
++late_initcall(gpio_dev_init);
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Kconfig linux-avr32/arch/avr32/mach-at32ap/Kconfig
+--- linux-2.6.24/arch/avr32/mach-at32ap/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Kconfig	2008-02-01 14:51:35.000000000 -0500
+@@ -3,9 +3,9 @@ if PLATFORM_AT32AP
+ menu "Atmel AVR32 AP options"
+ 
+ choice
+-	prompt "AT32AP7000 static memory bus width"
+-	depends on CPU_AT32AP7000
+-	default AP7000_16_BIT_SMC
++	prompt "AT32AP700x static memory bus width"
++	depends on CPU_AT32AP700X
++	default AP700X_16_BIT_SMC
+ 	help
+ 	  Define the width of the AP7000 external static memory interface.
+ 	  This is used to determine how to mangle the address and/or data
+@@ -15,17 +15,24 @@ choice
+ 	  width for all chip selects, excluding the flash (which is using
+ 	  raw access and is thus not affected by any of this.)
+ 
+-config AP7000_32_BIT_SMC
++config AP700X_32_BIT_SMC
+ 	bool "32 bit"
+ 
+-config AP7000_16_BIT_SMC
++config AP700X_16_BIT_SMC
+ 	bool "16 bit"
+ 
+-config AP7000_8_BIT_SMC
++config AP700X_8_BIT_SMC
+ 	bool "8 bit"
+ 
+ endchoice
+ 
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
+ 
+ endif # PLATFORM_AT32AP
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/Makefile linux-avr32/arch/avr32/mach-at32ap/Makefile
+--- linux-2.6.24/arch/avr32/mach-at32ap/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -1,4 +1,5 @@
+ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+-obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= at32ap700x.o
++obj-$(CONFIG_CPU_AT32AP700X)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff -Nrup linux-2.6.24/arch/avr32/mach-at32ap/pio.c linux-avr32/arch/avr32/mach-at32ap/pio.c
+--- linux-2.6.24/arch/avr32/mach-at32ap/pio.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mach-at32ap/pio.c	2008-02-01 14:51:35.000000000 -0500
+@@ -162,6 +162,82 @@ fail:
+ 	dump_stack();
+ }
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port)
++{
++	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
++}
++
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
++
++	/* Try to allocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		if (old & pins)
++			return -EBUSY;
++
++		new = old | pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++
++	/* That went well, now configure the port */
++	pio_writel(pio, OER, oe_mask);
++	pio_writel(pio, PER, pins);
++
++	return 0;
++}
++
++void at32_deselect_pins(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++	u32 old, new;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* Return to a "safe" mux configuration */
++	pio_writel(pio, PUER, pins);
++	pio_writel(pio, ODR, pins);
++
++	/* Deallocate the pins */
++	do {
++		old = pio->pinmux_mask;
++		new = old & ~pins;
++	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
++}
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	return pio_readl(pio, PDSR) & pins;
++}
++
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
++{
++	struct pio_device *pio;
++
++	pio = &pio_dev[port];
++	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
++
++	/* No atomic updates for now... */
++	pio_writel(pio, CODR, ~value & mask);
++	pio_writel(pio, SODR, value & mask);
++}
++
++#endif /* CONFIG_GPIO_DEV */
++
++
+ /*--------------------------------------------------------------------------*/
+ 
+ /* GPIO API */
+diff -Nrup linux-2.6.24/arch/avr32/Makefile linux-avr32/arch/avr32/Makefile
+--- linux-2.6.24/arch/avr32/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -16,7 +16,7 @@ KBUILD_AFLAGS	+= -mrelax -mno-pic
+ CFLAGS_MODULE	+= -mno-relax
+ LDFLAGS_vmlinux	+= --relax
+ 
+-cpuflags-$(CONFIG_CPU_AT32AP7000)	+= -mcpu=ap7000
++cpuflags-$(CONFIG_PLATFORM_AT32AP)	+= -march=ap
+ 
+ KBUILD_CFLAGS	+= $(cpuflags-y)
+ KBUILD_AFLAGS	+= $(cpuflags-y)
+@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/a
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-$(CONFIG_OPROFILE)		+= arch/avr32/oprofile/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff -Nrup linux-2.6.24/arch/avr32/mm/dma-coherent.c linux-avr32/arch/avr32/mm/dma-coherent.c
+--- linux-2.6.24/arch/avr32/mm/dma-coherent.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/dma-coherent.c	2008-02-01 14:51:35.000000000 -0500
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct d
+ 	struct page *page, *free, *end;
+ 	int order;
+ 
++	/* Following is a work-around (a.k.a. hack) to prevent pages
++	 * with __GFP_COMP being passed to split_page() which cannot
++	 * handle them.  The real problem is that this flag probably
++	 * should be 0 on AVR32 as it is not supported on this
++	 * platform--see CONFIG_HUGETLB_PAGE. */
++	gfp &= ~(__GFP_COMP);
++
+ 	size = PAGE_ALIGN(size);
+ 	order = get_order(size);
+ 
+diff -Nrup linux-2.6.24/arch/avr32/mm/tlb.c linux-avr32/arch/avr32/mm/tlb.c
+--- linux-2.6.24/arch/avr32/mm/tlb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/arch/avr32/mm/tlb.c	2008-02-01 14:51:35.000000000 -0500
+@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb
+ 	return 0;
+ }
+ 
+-static struct seq_operations tlb_ops = {
++static const struct seq_operations tlb_ops = {
+ 	.start		= tlb_start,
+ 	.next		= tlb_next,
+ 	.stop		= tlb_stop,
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/Makefile linux-avr32/arch/avr32/oprofile/Makefile
+--- linux-2.6.24/arch/avr32/oprofile/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/Makefile	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,8 @@
++obj-$(CONFIG_OPROFILE) += oprofile.o
++
++oprofile-y		:= $(addprefix ../../../drivers/oprofile/,	\
++				oprof.o cpu_buffer.o buffer_sync.o	\
++				event_buffer.o oprofile_files.o		\
++				oprofilefs.o oprofile_stats.o		\
++				timer_int.o)
++oprofile-y		+= op_model_avr32.o
+diff -Nrup linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c linux-avr32/arch/avr32/oprofile/op_model_avr32.c
+--- linux-2.6.24/arch/avr32/oprofile/op_model_avr32.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/arch/avr32/oprofile/op_model_avr32.c	2008-02-01 14:51:35.000000000 -0500
+@@ -0,0 +1,235 @@
++/*
++ * AVR32 Performance Counter Driver
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * Author: Ronny Pedersen
++ */
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/oprofile.h>
++#include <linux/sched.h>
++#include <linux/types.h>
++
++#include <asm/intc.h>
++#include <asm/sysreg.h>
++#include <asm/system.h>
++
++#define AVR32_PERFCTR_IRQ_GROUP	0
++#define AVR32_PERFCTR_IRQ_LINE	1
++
++enum { PCCNT, PCNT0, PCNT1, NR_counter };
++
++struct avr32_perf_counter {
++	unsigned long	enabled;
++	unsigned long	event;
++	unsigned long	count;
++	unsigned long	unit_mask;
++	unsigned long	kernel;
++	unsigned long	user;
++
++	u32		ie_mask;
++	u32		flag_mask;
++};
++
++static struct avr32_perf_counter counter[NR_counter] = {
++	{
++		.ie_mask	= SYSREG_BIT(IEC),
++		.flag_mask	= SYSREG_BIT(FC),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE0),
++		.flag_mask	= SYSREG_BIT(F0),
++	}, {
++		.ie_mask	= SYSREG_BIT(IE1),
++		.flag_mask	= SYSREG_BIT(F1),
++	},
++};
++
++static void avr32_perf_counter_reset(void)
++{
++	/* Reset all counter and disable/clear all interrupts */
++	sysreg_write(PCCR, (SYSREG_BIT(PCCR_R)
++				| SYSREG_BIT(PCCR_C)
++				| SYSREG_BIT(FC)
++				| SYSREG_BIT(F0)
++				| SYSREG_BIT(F1)));
++}
++
++static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id)
++{
++	struct avr32_perf_counter *ctr = dev_id;
++	struct pt_regs *regs;
++	u32 pccr;
++
++	if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP)
++					& (1 << AVR32_PERFCTR_IRQ_LINE))))
++		return IRQ_NONE;
++
++	regs = get_irq_regs();
++	pccr = sysreg_read(PCCR);
++
++	/* Clear the interrupt flags we're about to handle */
++	sysreg_write(PCCR, pccr);
++
++	/* PCCNT */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCCNT, -ctr->count);
++		oprofile_add_sample(regs, PCCNT);
++	}
++	ctr++;
++	/* PCNT0 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT0, -ctr->count);
++		oprofile_add_sample(regs, PCNT0);
++	}
++	ctr++;
++	/* PCNT1 */
++	if (ctr->enabled && (pccr & ctr->flag_mask)) {
++		sysreg_write(PCNT1, -ctr->count);
++		oprofile_add_sample(regs, PCNT1);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int avr32_perf_counter_create_files(struct super_block *sb,
++		struct dentry *root)
++{
++	struct dentry *dir;
++	unsigned int i;
++	char filename[4];
++
++	for (i = 0; i < NR_counter; i++) {
++		snprintf(filename, sizeof(filename), "%u", i);
++		dir = oprofilefs_mkdir(sb, root, filename);
++
++		oprofilefs_create_ulong(sb, dir, "enabled",
++				&counter[i].enabled);
++		oprofilefs_create_ulong(sb, dir, "event",
++				&counter[i].event);
++		oprofilefs_create_ulong(sb, dir, "count",
++				&counter[i].count);
++
++		/* Dummy entries */
++		oprofilefs_create_ulong(sb, dir, "kernel",
++				&counter[i].kernel);
++		oprofilefs_create_ulong(sb, dir, "user",
++				&counter[i].user);
++		oprofilefs_create_ulong(sb, dir, "unit_mask",
++				&counter[i].unit_mask);
++	}
++
++	return 0;
++}
++
++static int avr32_perf_counter_setup(void)
++{
++	struct avr32_perf_counter *ctr;
++	u32 pccr;
++	int ret;
++	int i;
++
++	pr_debug("avr32_perf_counter_setup\n");
++
++	if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) {
++		printk(KERN_ERR
++			"oprofile: setup: perf counter already enabled\n");
++		return -EBUSY;
++	}
++
++	ret = request_irq(AVR32_PERFCTR_IRQ_GROUP,
++			avr32_perf_counter_interrupt, IRQF_SHARED,
++			"oprofile", counter);
++	if (ret)
++		return ret;
++
++	avr32_perf_counter_reset();
++
++	pccr = 0;
++	for (i = PCCNT; i < NR_counter; i++) {
++		ctr = &counter[i];
++		if (!ctr->enabled)
++			continue;
++
++		pr_debug("enabling counter %d...\n", i);
++
++		pccr |= ctr->ie_mask;
++
++		switch (i) {
++		case PCCNT:
++			/* PCCNT always counts cycles, so no events */
++			sysreg_write(PCCNT, -ctr->count);
++			break;
++		case PCNT0:
++			pccr |= SYSREG_BF(CONF0, ctr->event);
++			sysreg_write(PCNT0, -ctr->count);
++			break;
++		case PCNT1:
++			pccr |= SYSREG_BF(CONF1, ctr->event);
++			sysreg_write(PCNT1, -ctr->count);
++			break;
++		}
++	}
++
++	pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr);
++
++	sysreg_write(PCCR, pccr);
++
++	return 0;
++}
++
++static void avr32_perf_counter_shutdown(void)
++{
++	pr_debug("avr32_perf_counter_shutdown\n");
++
++	avr32_perf_counter_reset();
++	free_irq(AVR32_PERFCTR_IRQ_GROUP, counter);
++}
++
++static int avr32_perf_counter_start(void)
++{
++	pr_debug("avr32_perf_counter_start\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E));
++
++	return 0;
++}
++
++static void avr32_perf_counter_stop(void)
++{
++	pr_debug("avr32_perf_counter_stop\n");
++
++	sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E));
++}
++
++static struct oprofile_operations avr32_perf_counter_ops __initdata = {
++	.create_files	= avr32_perf_counter_create_files,
++	.setup		= avr32_perf_counter_setup,
++	.shutdown	= avr32_perf_counter_shutdown,
++	.start		= avr32_perf_counter_start,
++	.stop		= avr32_perf_counter_stop,
++	.cpu_type	= "avr32",
++};
++
++int __init oprofile_arch_init(struct oprofile_operations *ops)
++{
++	if (!(current_cpu_data.features & AVR32_FEATURE_PCTR))
++		return -ENODEV;
++
++	memcpy(ops, &avr32_perf_counter_ops,
++			sizeof(struct oprofile_operations));
++
++	printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n");
++
++	return 0;
++}
++
++void oprofile_arch_exit(void)
++{
++
++}
+diff -Nrup linux-2.6.24/Documentation/kernel-parameters.txt linux-avr32/Documentation/kernel-parameters.txt
+--- linux-2.6.24/Documentation/kernel-parameters.txt	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/Documentation/kernel-parameters.txt	2008-02-01 14:51:34.000000000 -0500
+@@ -34,6 +34,7 @@ parameter is applicable:
+ 	ALSA	ALSA sound support is enabled.
+ 	APIC	APIC support is enabled.
+ 	APM	Advanced Power Management support is enabled.
++	AVR32	AVR32 architecture is enabled.
+ 	AX25	Appropriate AX.25 support is enabled.
+ 	BLACKFIN Blackfin architecture is enabled.
+ 	DRM	Direct Rendering Management support is enabled.
+@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. 
+ 			of returning the full 64-bit number.
+ 			The default is to return 64-bit inode numbers.
+ 
++	nmi_debug=	[KNL,AVR32] Specify one or more actions to take
++			when a NMI is triggered.
++			Format: [state][,regs][,debounce][,die]
++
+ 	nmi_watchdog=	[KNL,BUGS=X86-32] Debugging features for SMP kernels
+ 
+ 	no387		[BUGS=X86-32] Tells the kernel to use the 387 maths
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.c	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/completion.h>
++#include <linux/io.h>
++
++#include "i2c-atmeltwi.h"
++
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
++
++
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
++
++};
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++
++/*
++ * (Re)Initialize the TWI hardware registers.
++ */
++static int twi_hwinit(struct atmel_twi *twi)
++{
++	unsigned long cdiv, ckdiv = 0;
++
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
++
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
++
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
++
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
++
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
++	return 0;
++}
++
++/*
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
++ */
++static int twi_complete(struct atmel_twi *twi, u32 mask)
++{
++	int timeout = msecs_to_jiffies(100);
++
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
++	return 0;
++}
++
++/*
++ * Generic i2c master transfer entrypoint.
++ */
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
++{
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
++
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
++}
++
++
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
++
++	/* Save state for later debug prints */
++	int old_status = status;
++
++	if (twi->mask & status) {
++
++		status &= twi->mask;
++
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
++
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
++
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
++	}
++
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
++
++	return IRQ_HANDLED;
++
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
++
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
++	}
++
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
++
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
++
++	return IRQ_HANDLED;
++}
++
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
++{
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
++}
++
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
++};
++
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
++{
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "twi_pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
++{
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
++}
++
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h
+--- linux-2.6.24/drivers/i2c/busses/i2c-atmeltwi.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/i2c-atmeltwi.h	2008-02-01 14:51:37.000000000 -0500
+@@ -0,0 +1,117 @@
++/*
++ * Register definitions for the Atmel Two-Wire Interface
++ */
++
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
++
++/* TWI register offsets */
++#define TWI_CR					0x0000
++#define TWI_MMR					0x0004
++#define TWI_SMR					0x0008
++#define TWI_IADR				0x000c
++#define TWI_CWGR				0x0010
++#define TWI_SR					0x0020
++#define TWI_IER					0x0024
++#define TWI_IDR					0x0028
++#define TWI_IMR					0x002c
++#define TWI_RHR					0x0030
++#define TWI_THR					0x0034
++
++/* Bitfields in CR */
++#define TWI_START_OFFSET			0
++#define TWI_START_SIZE				1
++#define TWI_STOP_OFFSET				1
++#define TWI_STOP_SIZE				1
++#define TWI_MSEN_OFFSET				2
++#define TWI_MSEN_SIZE				1
++#define TWI_MSDIS_OFFSET			3
++#define TWI_MSDIS_SIZE				1
++#define TWI_SVEN_OFFSET				4
++#define TWI_SVEN_SIZE				1
++#define TWI_SVDIS_OFFSET			5
++#define TWI_SVDIS_SIZE				1
++#define TWI_SWRST_OFFSET			7
++#define TWI_SWRST_SIZE				1
++
++/* Bitfields in MMR */
++#define TWI_IADRSZ_OFFSET			8
++#define TWI_IADRSZ_SIZE				2
++#define TWI_MREAD_OFFSET			12
++#define TWI_MREAD_SIZE				1
++#define TWI_DADR_OFFSET				16
++#define TWI_DADR_SIZE				7
++
++/* Bitfields in SMR */
++#define TWI_SADR_OFFSET				16
++#define TWI_SADR_SIZE				7
++
++/* Bitfields in IADR */
++#define TWI_IADR_OFFSET				0
++#define TWI_IADR_SIZE				24
++
++/* Bitfields in CWGR */
++#define TWI_CLDIV_OFFSET			0
++#define TWI_CLDIV_SIZE				8
++#define TWI_CHDIV_OFFSET			8
++#define TWI_CHDIV_SIZE				8
++#define TWI_CKDIV_OFFSET			16
++#define TWI_CKDIV_SIZE				3
++
++/* Bitfields in SR */
++#define TWI_TXCOMP_OFFSET			0
++#define TWI_TXCOMP_SIZE				1
++#define TWI_RXRDY_OFFSET			1
++#define TWI_RXRDY_SIZE				1
++#define TWI_TXRDY_OFFSET			2
++#define TWI_TXRDY_SIZE				1
++#define TWI_SVDIR_OFFSET			3
++#define TWI_SVDIR_SIZE				1
++#define TWI_SVACC_OFFSET			4
++#define TWI_SVACC_SIZE				1
++#define TWI_GCACC_OFFSET			5
++#define TWI_GCACC_SIZE				1
++#define TWI_OVRE_OFFSET				6
++#define TWI_OVRE_SIZE				1
++#define TWI_UNRE_OFFSET				7
++#define TWI_UNRE_SIZE				1
++#define TWI_NACK_OFFSET				8
++#define TWI_NACK_SIZE				1
++#define TWI_ARBLST_OFFSET			9
++#define TWI_ARBLST_SIZE				1
++
++/* Bitfields in RHR */
++#define TWI_RXDATA_OFFSET			0
++#define TWI_RXDATA_SIZE				8
++
++/* Bitfields in THR */
++#define TWI_TXDATA_OFFSET			0
++#define TWI_TXDATA_SIZE				8
++
++/* Constants for IADRSZ */
++#define TWI_IADRSZ_NO_ADDR			0
++#define TWI_IADRSZ_ONE_BYTE			1
++#define TWI_IADRSZ_TWO_BYTES			2
++#define TWI_IADRSZ_THREE_BYTES			3
++
++/* Bit manipulation macros */
++#define TWI_BIT(name)					\
++	(1 << TWI_##name##_OFFSET)
++#define TWI_BF(name, value)				\
++	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
++	 << TWI_##name##_OFFSET)
++#define TWI_BFEXT(name, value)				\
++	(((value) >> TWI_##name##_OFFSET)		\
++	 & ((1 << TWI_##name##_SIZE) - 1))
++#define TWI_BFINS(name, value, old)			\
++	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
++		    << TWI_##name##_OFFSET))		\
++	 | TWI_BF(name, (value)))
++
++/* Register access macros */
++#define twi_readl(port, reg)				\
++	__raw_readl((port)->regs + TWI_##reg)
++#define twi_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + TWI_##reg)
++
++#endif /* __ATMELTWI_H__ */
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Kconfig linux-avr32/drivers/i2c/busses/Kconfig
+--- linux-2.6.24/drivers/i2c/busses/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Kconfig	2008-02-01 14:51:37.000000000 -0500
+@@ -88,6 +88,14 @@ config I2C_AT91
+ 	  to support combined I2C messages.  Use the i2c-gpio driver
+ 	  unless your system can cope with those limitations.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff -Nrup linux-2.6.24/drivers/i2c/busses/Makefile linux-avr32/drivers/i2c/busses/Makefile
+--- linux-2.6.24/drivers/i2c/busses/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/i2c/busses/Makefile	2008-02-01 14:51:37.000000000 -0500
+@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff -Nrup linux-2.6.24/drivers/leds/Kconfig linux-avr32/drivers/leds/Kconfig
+--- linux-2.6.24/drivers/leds/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Kconfig	2008-02-01 14:51:38.000000000 -0500
+@@ -18,6 +18,13 @@ config LEDS_CLASS
+ 
+ comment "LED drivers"
+ 
++config LEDS_ATMEL_PWM
++	tristate "LED Support using Atmel PWM outputs"
++	depends on LEDS_CLASS && ATMEL_PWM
++	help
++	  This option enables support for LEDs driven using outputs
++	  of the dedicated PWM controller found on newer Atmel SOCs.
++
+ config LEDS_CORGI
+ 	tristate "LED Support for the Sharp SL-C7x0 series"
+ 	depends on LEDS_CLASS && PXA_SHARP_C7xx
+diff -Nrup linux-2.6.24/drivers/leds/leds-atmel-pwm.c linux-avr32/drivers/leds/leds-atmel-pwm.c
+--- linux-2.6.24/drivers/leds/leds-atmel-pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/leds/leds-atmel-pwm.c	2008-02-01 14:51:38.000000000 -0500
+@@ -0,0 +1,157 @@
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/leds.h>
++#include <linux/io.h>
++#include <linux/atmel_pwm.h>
++
++
++struct pwmled {
++	struct led_classdev	cdev;
++	struct pwm_channel	pwmc;
++	struct gpio_led		*desc;
++	u32			mult;
++	u8			active_low;
++};
++
++
++/*
++ * For simplicity, we use "brightness" as if it were a linear function
++ * of PWM duty cycle.  However, a logarithmic function of duty cycle is
++ * probably a better match for perceived brightness: two is half as bright
++ * as four, four is half as bright as eight, etc
++ */
++static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b)
++{
++	struct pwmled		 *led;
++
++	/* update the duty cycle for the *next* period */
++	led = container_of(cdev, struct pwmled, cdev);
++	pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b);
++}
++
++/*
++ * NOTE:  we reuse the platform_data structure of GPIO leds,
++ * but repurpose its "gpio" number as a PWM channel number.
++ */
++static int __init pwmled_probe(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++	int					status;
++
++	pdata = pdev->dev.platform_data;
++	if (!pdata || pdata->num_leds < 1)
++		return -ENODEV;
++
++	leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL);
++	if (!leds)
++		return -ENOMEM;
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++		const struct gpio_led	*dat = pdata->leds + i;
++		u32			tmp;
++
++		led->cdev.name = dat->name;
++		led->cdev.brightness = LED_OFF;
++		led->cdev.brightness_set = pwmled_brightness;
++		led->cdev.default_trigger = dat->default_trigger;
++
++		led->active_low = dat->active_low;
++
++		status = pwm_channel_alloc(dat->gpio, &led->pwmc);
++		if (status < 0)
++			goto err;
++
++		/*
++		 * Prescale clock by 2^x, so PWM counts in low MHz.
++		 * Start each cycle with the LED active, so increasing
++		 * the duty cycle gives us more time on (== brighter).
++		 */
++		tmp = 5;
++		if (!led->active_low)
++			tmp |= PWM_CPR_CPOL;
++		pwm_channel_writel(&led->pwmc, PWM_CMR, tmp);
++
++		/*
++		 * Pick a period so PWM cycles at 100+ Hz; and a multiplier
++		 * for scaling duty cycle:  brightness * mult.
++		 */
++		tmp = (led->pwmc.mck / (1 << 5)) / 100;
++		tmp /= 255;
++		led->mult = tmp;
++		pwm_channel_writel(&led->pwmc, PWM_CDTY,
++				led->cdev.brightness * 255);
++		pwm_channel_writel(&led->pwmc, PWM_CPRD,
++				LED_FULL * tmp);
++
++		pwm_channel_enable(&led->pwmc);
++
++		/* Hand it over to the LED framework */
++		status = led_classdev_register(&pdev->dev, &led->cdev);
++		if (status < 0) {
++			pwm_channel_free(&led->pwmc);
++			goto err;
++		}
++	}
++
++	platform_set_drvdata(pdev, leds);
++	return 0;
++
++err:
++	if (i > 0) {
++		for (i = i - 1; i >= 0; i--) {
++			led_classdev_unregister(&leds[i].cdev);
++			pwm_channel_free(&leds[i].pwmc);
++		}
++	}
++	kfree(leds);
++
++	return status;
++}
++
++static int __exit pwmled_remove(struct platform_device *pdev)
++{
++	const struct gpio_led_platform_data	*pdata;
++	struct pwmled				*leds;
++	unsigned				i;
++
++	pdata = pdev->dev.platform_data;
++	leds = platform_get_drvdata(pdev);
++
++	for (i = 0; i < pdata->num_leds; i++) {
++		struct pwmled		*led = leds + i;
++
++		led_classdev_unregister(&led->cdev);
++		pwm_channel_free(&led->pwmc);
++	}
++
++	kfree(leds);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver pwmled_driver = {
++	.driver = {
++		.name =		"leds-atmel-pwm",
++		.owner =	THIS_MODULE,
++	},
++	/* REVISIT add suspend() and resume() methods */
++	.remove =	__exit_p(pwmled_remove),
++};
++
++static int __init modinit(void)
++{
++	return platform_driver_probe(&pwmled_driver, pwmled_probe);
++}
++module_init(modinit);
++
++static void __exit modexit(void)
++{
++	platform_driver_unregister(&pwmled_driver);
++}
++module_exit(modexit);
++
++MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/leds/Makefile linux-avr32/drivers/leds/Makefile
+--- linux-2.6.24/drivers/leds/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/leds/Makefile	2008-02-01 14:51:38.000000000 -0500
+@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS)		+= led-class.o
+ obj-$(CONFIG_LEDS_TRIGGERS)		+= led-triggers.o
+ 
+ # LED Platform Drivers
++obj-$(CONFIG_LEDS_ATMEL_PWM)		+= leds-atmel-pwm.o
+ obj-$(CONFIG_LEDS_CORGI)		+= leds-corgi.o
+ obj-$(CONFIG_LEDS_LOCOMO)		+= leds-locomo.o
+ obj-$(CONFIG_LEDS_SPITZ)		+= leds-spitz.o
+diff -Nrup linux-2.6.24/drivers/misc/atmel_pwm.c linux-avr32/drivers/misc/atmel_pwm.c
+--- linux-2.6.24/drivers/misc/atmel_pwm.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/misc/atmel_pwm.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,409 @@
++#include <linux/module.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/atmel_pwm.h>
++
++
++/*
++ * This is a simple driver for the PWM controller found in various newer
++ * Atmel SOCs, including the AVR32 series and the AT91sam9263.
++ *
++ * Chips with current Linux ports have only 4 PWM channels, out of max 32.
++ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
++ * Docs are inconsistent about the width of the channel counter registers;
++ * it's at least 16 bits, but several places say 20 bits.
++ */
++#define	PWM_NCHAN	4		/* max 32 */
++
++struct pwm {
++	spinlock_t		lock;
++	struct platform_device	*pdev;
++	u32			mask;
++	int			irq;
++	void __iomem		*base;
++	struct clk		*clk;
++	struct pwm_channel	*channel[PWM_NCHAN];
++	void			(*handler[PWM_NCHAN])(struct pwm_channel *);
++};
++
++
++/* global PWM controller registers */
++#define PWM_MR		0x00
++#define PWM_ENA		0x04
++#define PWM_DIS		0x08
++#define PWM_SR		0x0c
++#define PWM_IER		0x10
++#define PWM_IDR		0x14
++#define PWM_IMR		0x18
++#define PWM_ISR		0x1c
++
++static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
++{
++	__raw_writel(val, p->base + offset);
++}
++
++static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
++{
++	return __raw_readl(p->base + offset);
++}
++
++static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
++{
++	return p->base + 0x200 + index * 0x20;
++}
++
++static struct pwm *pwm;
++
++static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
++{
++	struct device	*dev = &pwm->pdev->dev;
++
++	dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
++		tag,
++		pwm_readl(pwm, PWM_MR),
++		pwm_readl(pwm, PWM_SR),
++		pwm_readl(pwm, PWM_IMR));
++	dev_dbg(dev,
++		"pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
++		ch->index,
++		pwm_channel_readl(ch, PWM_CMR),
++		pwm_channel_readl(ch, PWM_CDTY),
++		pwm_channel_readl(ch, PWM_CPRD),
++		pwm_channel_readl(ch, PWM_CCNT));
++}
++
++
++/**
++ * pwm_channel_alloc - allocate an unused PWM channel
++ * @index: identifies the channel
++ * @ch: structure to be initialized
++ *
++ * Drivers allocate PWM channels according to the board's wiring, and
++ * matching board-specific setup code.  Returns zero or negative errno.
++ */
++int pwm_channel_alloc(int index, struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		status = 0;
++
++	/* insist on PWM init, with this signal pinned out */
++	if (!pwm || !(pwm->mask & 1 << index))
++		return -ENODEV;
++
++	if (index < 0 || index >= PWM_NCHAN || !ch)
++		return -EINVAL;
++	memset(ch, 0, sizeof *ch);
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	if (pwm->channel[index])
++		status = -EBUSY;
++	else {
++		clk_enable(pwm->clk);
++
++		ch->regs = pwmc_regs(pwm, index);
++		ch->index = index;
++
++		/* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
++		ch->mck = clk_get_rate(pwm->clk);
++
++		pwm->channel[index] = ch;
++		pwm->handler[index] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << index);
++		pwm_writel(pwm, PWM_IDR, 1 << index);
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return status;
++}
++EXPORT_SYMBOL(pwm_channel_alloc);
++
++static int pwmcheck(struct pwm_channel *ch)
++{
++	int		index;
++
++	if (!pwm)
++		return -ENODEV;
++	if (!ch)
++		return -EINVAL;
++	index = ch->index;
++	if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
++		return -EINVAL;
++
++	return index;
++}
++
++/**
++ * pwm_channel_free - release a previously allocated channel
++ * @ch: the channel being released
++ *
++ * The channel is completely shut down (counter and IRQ disabled),
++ * and made available for re-use.  Returns zero, or negative errno.
++ */
++int pwm_channel_free(struct pwm_channel *ch)
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->channel[t] = NULL;
++		pwm->handler[t] = NULL;
++
++		/* channel and irq are always disabled when we return */
++		pwm_writel(pwm, PWM_DIS, 1 << t);
++		pwm_writel(pwm, PWM_IDR, 1 << t);
++
++		clk_disable(pwm->clk);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_free);
++
++int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
++{
++	unsigned long	flags;
++	int		t;
++
++	/* OMITTED FUNCTIONALITY:  starting several channels in synch */
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
++		t = 0;
++		pwm_dumpregs(ch, enabled ? "enable" : "disable");
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(__pwm_channel_onoff);
++
++/**
++ * pwm_clk_alloc - allocate and configure CLKA or CLKB
++ * @prescale: from 0..10, the power of two used to divide MCK
++ * @div: from 1..255, the linear divisor to use
++ *
++ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno.  The allocated
++ * clock will run with a period of (2^prescale * div) / MCK, or twice as
++ * long if center aligned PWM output is used.  The clock must later be
++ * deconfigured using pwm_clk_free().
++ */
++int pwm_clk_alloc(unsigned prescale, unsigned div)
++{
++	unsigned long	flags;
++	u32		mr;
++	u32		val = (prescale << 8) | div;
++	int		ret = -EBUSY;
++
++	if (prescale >= 10 || div == 0 || div > 255)
++		return -EINVAL;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if ((mr & 0xffff) == 0) {
++		mr |= val;
++		ret = PWM_CPR_CLKA;
++	}
++	if ((mr & (0xffff << 16)) == 0) {
++		mr |= val << 16;
++		ret = PWM_CPR_CLKB;
++	}
++	if (ret > 0)
++		pwm_writel(pwm, PWM_MR, mr);
++	spin_unlock_irqrestore(&pwm->lock, flags);
++	return ret;
++}
++EXPORT_SYMBOL(pwm_clk_alloc);
++
++/**
++ * pwm_clk_free - deconfigure and release CLKA or CLKB
++ *
++ * Reverses the effect of pwm_clk_alloc().
++ */
++void pwm_clk_free(unsigned clk)
++{
++	unsigned long	flags;
++	u32		mr;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	mr = pwm_readl(pwm, PWM_MR);
++	if (clk == PWM_CPR_CLKA)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
++	if (clk == PWM_CPR_CLKB)
++		pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
++	spin_unlock_irqrestore(&pwm->lock, flags);
++}
++EXPORT_SYMBOL(pwm_clk_free);
++
++/**
++ * pwm_channel_handler - manage channel's IRQ handler
++ * @ch: the channel
++ * @handler: the handler to use, possibly NULL
++ *
++ * If the handler is non-null, the handler will be called after every
++ * period of this PWM channel.  If the handler is null, this channel
++ * won't generate an IRQ.
++ */
++int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch))
++{
++	unsigned long	flags;
++	int		t;
++
++	spin_lock_irqsave(&pwm->lock, flags);
++	t = pwmcheck(ch);
++	if (t >= 0) {
++		pwm->handler[t] = handler;
++		pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
++		t = 0;
++	}
++	spin_unlock_irqrestore(&pwm->lock, flags);
++
++	return t;
++}
++EXPORT_SYMBOL(pwm_channel_handler);
++
++static irqreturn_t pwm_irq(int id, void *_pwm)
++{
++	struct pwm	*p = _pwm;
++	irqreturn_t	handled = IRQ_NONE;
++	u32		irqstat;
++	int		index;
++
++	spin_lock(&p->lock);
++
++	/* ack irqs, then handle them */
++	irqstat = pwm_readl(pwm, PWM_ISR);
++
++	while (irqstat) {
++		struct pwm_channel *ch;
++		void (*handler)(struct pwm_channel *ch);
++
++		index = ffs(irqstat) - 1;
++		irqstat &= ~(1 << index);
++		ch = pwm->channel[index];
++		handler = pwm->handler[index];
++		if (handler && ch) {
++			spin_unlock(&p->lock);
++			handler(ch);
++			spin_lock(&p->lock);
++			handled = IRQ_HANDLED;
++		}
++	}
++
++	spin_unlock(&p->lock);
++	return handled;
++}
++
++static int __init pwm_probe(struct platform_device *pdev)
++{
++	struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	int irq = platform_get_irq(pdev, 0);
++	u32 *mp = pdev->dev.platform_data;
++	struct pwm *p;
++	int status = -EIO;
++
++	if (pwm)
++		return -EBUSY;
++	if (!r || irq < 0 || !mp || !*mp)
++		return -ENODEV;
++	if (*mp & ~((1<<PWM_NCHAN)-1)) {
++		dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
++			*mp, PWM_NCHAN);
++		return -EINVAL;
++	}
++
++	p = kzalloc(sizeof(*p), GFP_KERNEL);
++	if (!p)
++		return -ENOMEM;
++
++	spin_lock_init(&p->lock);
++	p->pdev = pdev;
++	p->mask = *mp;
++	p->irq = irq;
++	p->base = ioremap(r->start, r->end - r->start + 1);
++	if (!p->base)
++		goto fail;
++	p->clk = clk_get(&pdev->dev, "mck");
++	if (IS_ERR(p->clk)) {
++		status = PTR_ERR(p->clk);
++		p->clk = NULL;
++		goto fail;
++	}
++
++	status = request_irq(irq, pwm_irq, 0, pdev->name, p);
++	if (status < 0)
++		goto fail;
++
++	pwm = p;
++	platform_set_drvdata(pdev, p);
++
++	return 0;
++
++fail:
++	if (p->clk)
++		clk_put(p->clk);
++	if (p->base)
++		iounmap(p->base);
++
++	kfree(p);
++	return status;
++}
++
++static int __exit pwm_remove(struct platform_device *pdev)
++{
++	struct pwm *p = platform_get_drvdata(pdev);
++
++	if (p != pwm)
++		return -EINVAL;
++
++	clk_enable(pwm->clk);
++	pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
++	pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
++	clk_disable(pwm->clk);
++
++	pwm = NULL;
++
++	free_irq(p->irq, p);
++	clk_put(p->clk);
++	iounmap(p->base);
++	kfree(p);
++
++	return 0;
++}
++
++static struct platform_driver atmel_pwm_driver = {
++	.driver = {
++		.name = "atmel_pwm",
++		.owner = THIS_MODULE,
++	},
++	.remove = __exit_p(pwm_remove),
++
++	/* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
++	 * and all AT91sam9263 states, albeit at reduced clock rate if
++	 * MCK becomes the slow clock (i.e. what Linux labels STR).
++	 */
++};
++
++static int __init pwm_init(void)
++{
++	return platform_driver_probe(&atmel_pwm_driver, pwm_probe);
++}
++module_init(pwm_init);
++
++static void __exit pwm_exit(void)
++{
++	platform_driver_unregister(&atmel_pwm_driver);
++}
++module_exit(pwm_exit);
++
++MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/misc/Kconfig linux-avr32/drivers/misc/Kconfig
+--- linux-2.6.24/drivers/misc/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES
+ 
+ if MISC_DEVICES
+ 
++config ATMEL_PWM
++	tristate "Atmel AT32/AT91 PWM support"
++	depends on (AVR32 || AT91) && EXPERIMENTAL
++	help
++	  This option enables device driver support for the PWM channels
++	  on certain Atmel prcoessors.  Pulse Width Modulation is used for
++	  purposes including software controlled power-efficent backlights
++	  on LCD displays, motor control, and waveform generation.
++
+ config IBM_ASM
+ 	tristate "Device driver for IBM RSA service processor"
+ 	depends on X86 && PCI && INPUT && EXPERIMENTAL
+diff -Nrup linux-2.6.24/drivers/misc/Makefile linux-avr32/drivers/misc/Makefile
+--- linux-2.6.24/drivers/misc/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/misc/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM)		+= ibmasm/
+ obj-$(CONFIG_HDPU_FEATURES)	+= hdpuftrs/
+ obj-$(CONFIG_MSI_LAPTOP)     += msi-laptop.o
+ obj-$(CONFIG_ASUS_LAPTOP)     += asus-laptop.o
++obj-$(CONFIG_ATMEL_PWM)		+= atmel_pwm.o
+ obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+ obj-$(CONFIG_LKDTM)		+= lkdtm.o
+ obj-$(CONFIG_TIFM_CORE)       	+= tifm_core.o
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.c linux-avr32/drivers/mmc/host/atmel-mci.c
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.c	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,1176 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++
++#include <linux/mmc/host.h>
++
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++
++#include "atmel-mci.h"
++
++#define DRIVER_NAME "atmel_mci"
++
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
++
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
++
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
++
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
++
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
++
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
++
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
++
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
++
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
++
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
++
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++
++/* Test bit macros for completed events */
++#define mci_cmd_is_complete(host)			\
++	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_data_is_complete(host)			\
++	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_data_error_is_complete(host)		\
++	test_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_stop_sent_is_complete(host)			\
++	test_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_stop_is_complete(host)			\
++	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_dma_is_complete(host)			\
++	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_dma_error_is_complete(host)			\
++	test_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_card_detect_is_complete(host)			\
++	test_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Test and clear bit macros for pending events */
++#define mci_clear_cmd_is_pending(host)			\
++	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_is_pending(host)			\
++	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_is_pending(host)		\
++	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_is_pending(host)			\
++	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_is_pending(host)		\
++	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_is_pending(host)		\
++	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Test and set bit macros for completed events */
++#define mci_set_cmd_is_completed(host)			\
++	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_is_completed(host)			\
++	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_is_completed(host)		\
++	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_is_completed(host)			\
++	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_is_completed(host)		\
++	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_is_completed(host)		\
++	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for completed events */
++#define mci_set_cmd_complete(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
++#define mci_set_data_complete(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
++#define mci_set_data_error_complete(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->completed_events)
++#define mci_set_stop_sent_complete(host)		\
++	set_bit(EVENT_STOP_SENT, &host->completed_events)
++#define mci_set_stop_complete(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
++#define mci_set_dma_complete(host)			\
++	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
++#define mci_set_dma_error_complete(host)		\
++	set_bit(EVENT_DMA_ERROR, &host->completed_events)
++#define mci_set_card_detect_complete(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->completed_events)
++
++/* Set bit macros for pending events */
++#define mci_set_cmd_pending(host)			\
++	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_set_data_pending(host)			\
++	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_set_data_error_pending(host)		\
++	set_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_set_stop_sent_pending(host)			\
++	set_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_set_stop_pending(host)			\
++	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_set_dma_error_pending(host)			\
++	set_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_set_card_detect_pending(host)		\
++	set_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++/* Clear bit macros for pending events */
++#define mci_clear_cmd_pending(host)			\
++	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
++#define mci_clear_data_pending(host)			\
++	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
++#define mci_clear_data_error_pending(host)		\
++	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
++#define mci_clear_stop_sent_pending(host)		\
++	clear_bit(EVENT_STOP_SENT, &host->pending_events)
++#define mci_clear_stop_pending(host)			\
++	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
++#define mci_clear_dma_error_pending(host)		\
++	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
++#define mci_clear_card_detect_pending(host)		\
++	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
++
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++
++#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
++
++struct req_dbg_data {
++	unsigned int nbytes;
++	char str[DBG_REQ_BUF_SIZE];
++};
++
++static int req_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	struct mmc_request *mrq;
++	struct mmc_command *cmd, *stop;
++	struct mmc_data *data;
++	struct req_dbg_data *priv;
++	char *str;
++	unsigned long n = 0;
++
++	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
++	if (!priv)
++		return -ENOMEM;
++	str = priv->str;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++
++	spin_lock_irq(&host->mmc->lock);
++	mrq = host->mrq;
++	if (mrq) {
++		cmd = mrq->cmd;
++		data = mrq->data;
++		stop = mrq->stop;
++		n = snprintf(str, DBG_REQ_BUF_SIZE,
++			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++			     cmd->opcode, cmd->arg, cmd->flags,
++			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
++			     cmd->resp[3], cmd->error);
++		if (n < DBG_REQ_BUF_SIZE && data)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "DATA %u * %u (%u) %x (err %u)\n",
++				      data->blocks, data->blksz,
++				      data->bytes_xfered, data->flags,
++				      data->error);
++		if (n < DBG_REQ_BUF_SIZE && stop)
++			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
++				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
++				      stop->opcode, stop->arg, stop->flags,
++				      stop->resp[0], stop->resp[1],
++				      stop->resp[2], stop->resp[3],
++				      stop->error);
++	}
++	spin_unlock_irq(&host->mmc->lock);
++	mutex_unlock(&inode->i_mutex);
++
++	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
++	file->private_data = priv;
++
++	return 0;
++}
++
++static ssize_t req_dbg_read(struct file *file, char __user *buf,
++			    size_t nbytes, loff_t *ppos)
++{
++	struct req_dbg_data *priv = file->private_data;
++
++	return simple_read_from_buffer(buf, nbytes, ppos,
++				       priv->str, priv->nbytes);
++}
++
++static int req_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations req_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= req_dbg_open,
++	.llseek		= no_llseek,
++	.read		= req_dbg_read,
++	.release	= req_dbg_release,
++};
++
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct atmel_mci *host;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
++
++	mutex_lock(&inode->i_mutex);
++	host = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
++
++	spin_lock_irq(&host->mmc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(host->regs + i * 4);
++	spin_unlock_irq(&host->mmc->lock);
++
++	file->private_data = data;
++	ret = 0;
++
++out:
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++			     size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
++
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++				      file->private_data,
++				      file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
++
++	return ret;
++}
++
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
++
++static const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
++};
++
++static void atmci_init_debugfs(struct atmel_mci *host)
++{
++	struct mmc_host *mmc;
++	struct dentry *root, *regs;
++	struct resource *res;
++
++	mmc = host->mmc;
++	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	host->debugfs_root = root;
++
++	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
++
++	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
++	regs->d_inode->i_size = res->end - res->start + 1;
++	host->debugfs_regs = regs;
++
++	host->debugfs_req = debugfs_create_file("req", 0400, root,
++						host, &req_dbg_fops);
++	if (!host->debugfs_req)
++		goto err_req;
++
++	host->debugfs_pending_events
++		= debugfs_create_u32("pending_events", 0400, root,
++				     (u32 *)&host->pending_events);
++	if (!host->debugfs_pending_events)
++		goto err_pending_events;
++
++	host->debugfs_completed_events
++		= debugfs_create_u32("completed_events", 0400, root,
++				     (u32 *)&host->completed_events);
++	if (!host->debugfs_completed_events)
++		goto err_completed_events;
++
++	return;
++
++err_completed_events:
++	debugfs_remove(host->debugfs_pending_events);
++err_pending_events:
++	debugfs_remove(host->debugfs_req);
++err_req:
++	debugfs_remove(host->debugfs_regs);
++err_regs:
++	debugfs_remove(host->debugfs_root);
++err_root:
++	host->debugfs_root = NULL;
++	dev_err(&host->pdev->dev,
++		"failed to initialize debugfs for %s\n",
++		mmc_hostname(mmc));
++}
++
++static void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++	if (host->debugfs_root) {
++		debugfs_remove(host->debugfs_completed_events);
++		debugfs_remove(host->debugfs_pending_events);
++		debugfs_remove(host->debugfs_req);
++		debugfs_remove(host->debugfs_regs);
++		debugfs_remove(host->debugfs_root);
++		host->debugfs_root = NULL;
++	}
++}
++#else
++static inline void atmci_init_debugfs(struct atmel_mci *host)
++{
++
++}
++
++static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static inline unsigned int ns_to_clocks(struct atmel_mci *host,
++					unsigned int ns)
++{
++	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
++}
++
++static void atmci_set_timeout(struct atmel_mci *host,
++			      struct mmc_data *data)
++{
++	static unsigned dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20
++	};
++	unsigned timeout;
++	unsigned dtocyc, dtomul;
++
++	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
++
++	for (dtomul = 0; dtomul < 8; dtomul++) {
++		unsigned shift = dtomul_to_shift[dtomul];
++		dtocyc = (timeout + (1 << shift) - 1) >> shift;
++		if (dtocyc < 15)
++			break;
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++	}
++
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
++	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
++				| MCI_BF(DTOCYC, dtocyc)));
++}
++
++/*
++ * Return mask with command flags to be enabled for this command.
++ */
++static u32 atmci_prepare_command(struct mmc_host *mmc,
++				 struct mmc_command *cmd)
++{
++	u32 cmdr;
++
++	cmd->error = 0;
++
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
++
++	if (cmd->flags & MMC_RSP_PRESENT) {
++		if (cmd->flags & MMC_RSP_136)
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
++		else
++			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
++	}
++
++	/*
++	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
++	 * it's too difficult to determine whether this is an ACMD or
++	 * not. Better make it 64.
++	 */
++	cmdr |= MCI_BIT(MAXLAT);
++
++	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
++		cmdr |= MCI_BIT(OPDCMD);
++
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
++
++	return cmdr;
++}
++
++static void atmci_start_command(struct atmel_mci *host,
++				struct mmc_command *cmd,
++				u32 cmd_flags)
++{
++	WARN_ON(host->cmd);
++	host->cmd = cmd;
++
++	mci_writel(host, ARGR, cmd->arg);
++	mci_writel(host, CMDR, cmd_flags);
++
++	if (cmd->data)
++		dma_start_request(host->dma.req.req.dmac,
++				  host->dma.req.req.channel);
++}
++
++/*
++ * Returns a mask of flags to be set in the command register when the
++ * command to start the transfer is to be sent.
++ */
++static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 cmd_flags;
++
++	WARN_ON(host->data);
++	host->data = data;
++
++	atmci_set_timeout(host, data);
++	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
++				| MCI_BF(BLKLEN, data->blksz)));
++	host->dma.req.block_size = data->blksz;
++	host->dma.req.nr_blocks = data->blocks;
++
++	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
++	if (data->flags & MMC_DATA_STREAM)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++	else if (data->blocks > 1)
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	else
++		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
++
++	if (data->flags & MMC_DATA_READ) {
++		cmd_flags |= MCI_BIT(TRDIR);
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_FROM_DEVICE);
++		host->dma.req.periph_id = host->dma.rx_periph_id;
++		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
++		host->dma.req.data_reg = host->mapbase + MCI_RDR;
++	} else {
++		host->dma.req.nr_sg
++			= dma_map_sg(&host->pdev->dev, data->sg,
++				     data->sg_len, DMA_TO_DEVICE);
++		host->dma.req.periph_id = host->dma.tx_periph_id;
++		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
++		host->dma.req.data_reg = host->mapbase + MCI_TDR;
++	}
++	host->dma.req.sg = data->sg;
++
++	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
++
++	return cmd_flags;
++}
++
++static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_data *data = mrq->data;
++	u32 iflags;
++	u32 cmdflags = 0;
++
++	iflags = mci_readl(host, IMR);
++	if (iflags)
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
++
++	WARN_ON(host->mrq != NULL);
++	host->mrq = mrq;
++	host->pending_events = 0;
++	host->completed_events = 0;
++
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
++
++	if (mrq->stop) {
++		WARN_ON(!data);
++
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
++		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
++		if (!(data->flags & MMC_DATA_WRITE))
++			host->stop_cmdr |= MCI_BIT(TRDIR);
++		if (data->flags & MMC_DATA_STREAM)
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
++		else
++			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
++	}
++	if (data) {
++		cmdflags |= atmci_prepare_data(mmc, data);
++		iflags |= MCI_DATA_ERROR_FLAGS;
++	}
++
++	atmci_start_command(host, mrq->cmd, cmdflags);
++	mci_writel(host, IER, iflags);
++}
++
++static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
++
++	if (ios->clock) {
++		u32 clkdiv;
++
++		/* Set clock rate */
++		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
++			clkdiv = 255;
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++	}
++
++	switch (ios->bus_width) {
++	case MMC_BUS_WIDTH_1:
++		mci_writel(host, SDCR, 0);
++		break;
++	case MMC_BUS_WIDTH_4:
++		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
++		break;
++	}
++
++	switch (ios->power_mode) {
++	case MMC_POWER_ON:
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
++		break;
++	}
++}
++
++static int atmci_get_ro(struct mmc_host *mmc)
++{
++	int read_only = 0;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	if (host->wp_pin >= 0) {
++		read_only = gpio_get_value(host->wp_pin);
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
++	} else {
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
++	}
++
++	return read_only;
++}
++
++static struct mmc_host_ops atmci_ops = {
++	.request	= atmci_request,
++	.set_ios	= atmci_set_ios,
++	.get_ro		= atmci_get_ro,
++};
++
++static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	WARN_ON(host->cmd || host->data);
++	host->mrq = NULL;
++
++	mmc_request_done(mmc, mrq);
++}
++
++static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
++			  u32 flags)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
++}
++
++static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
++{
++	host->data = NULL;
++	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
++		     ((data->flags & MMC_DATA_WRITE)
++		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
++
++	/*
++	 * Data might complete before command for very short transfers
++	 * (like READ_SCR)
++	 */
++	if (mci_cmd_is_complete(host)
++	    && (!data->stop || mci_stop_is_complete(host)))
++		atmci_request_end(host->mmc, data->mrq);
++}
++
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
++{
++	if (status & MCI_BIT(RTOE))
++		cmd->error = -ETIMEDOUT;
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
++		cmd->error = -EILSEQ;
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
++		cmd->error = -EIO;
++
++	if (cmd->error) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
++}
++
++static void atmci_tasklet_func(unsigned long priv)
++{
++	struct mmc_host *mmc = (struct mmc_host *)priv;
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_request *mrq = host->mrq;
++	struct mmc_data *data = host->data;
++
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
++		 host->pending_events, host->completed_events,
++		 mci_readl(host, IMR));
++
++	if (mci_clear_cmd_is_pending(host)) {
++		mci_set_cmd_complete(host);
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_stop_is_pending(host)) {
++		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
++		if (mci_data_is_complete(host)
++		    || mci_data_error_is_complete(host))
++			atmci_request_end(mmc, mrq);
++	}
++	if (mci_clear_dma_error_is_pending(host)) {
++		mci_set_dma_error_complete(host);
++		mci_clear_data_pending(host);
++
++		/* DMA controller got bus error => invalid address */
++		data->error = -EIO;
++
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_error_is_pending(host)) {
++		u32 status = host->data_status;
++
++		mci_set_data_error_complete(host);
++		mci_clear_data_pending(host);
++
++		dma_stop_request(host->dma.req.req.dmac,
++				 host->dma.req.req.channel);
++
++		if (status & MCI_BIT(DCRCE)) {
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
++			data->error = -EILSEQ;
++		} else if (status & MCI_BIT(DTOE)) {
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
++			data->error = -ETIMEDOUT;
++		} else {
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
++			data->error = -EIO;
++		}
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
++
++		if (data->stop
++		    && !mci_set_stop_sent_is_completed(host))
++			/* TODO: Check if card is still present */
++			send_stop_cmd(host->mmc, data, 0);
++
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_data_is_pending(host)) {
++		mci_set_data_complete(host);
++		data->bytes_xfered = data->blocks * data->blksz;
++		atmci_data_complete(host, data);
++	}
++	if (mci_clear_card_detect_is_pending(host)) {
++		/* Reset controller if card is gone */
++		if (!host->present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ETIMEDOUT;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ETIMEDOUT;
++				atmci_data_complete(host, data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ETIMEDOUT;
++
++			host->cmd = NULL;
++			atmci_request_end(mmc, mrq);
++		}
++		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
++	}
++}
++
++static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
++{
++	struct atmel_mci *host = mmc_priv(mmc);
++	struct mmc_command *cmd = host->cmd;
++
++	/*
++	 * Read the response now so that we're free to send a new
++	 * command immediately.
++	 */
++	cmd->resp[0] = mci_readl(host, RSPR);
++	cmd->resp[1] = mci_readl(host, RSPR);
++	cmd->resp[2] = mci_readl(host, RSPR);
++	cmd->resp[3] = mci_readl(host, RSPR);
++
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
++	host->cmd = NULL;
++
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
++		mci_set_stop_pending(host);
++	} else {
++		if (host->mrq->stop && mci_dma_is_complete(host)
++				&& !mci_set_stop_sent_is_completed(host))
++			send_stop_cmd(host->mmc, host->data, 0);
++		host->cmd_status = status;
++		mci_set_cmd_pending(host);
++	}
++
++	tasklet_schedule(&host->tasklet);
++}
++
++static void atmci_xfer_complete(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++	struct mmc_data *data;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++	data = host->data;
++
++	/*
++	 * This callback may be called before we see the CMDRDY
++	 * interrupt under heavy irq load (possibly caused by other
++	 * drivers) or when interrupts are disabled for a long time.
++	 */
++	mci_set_dma_complete(host);
++	if (data->stop && mci_cmd_is_complete(host)
++			&& !mci_set_stop_sent_is_completed(host))
++		send_stop_cmd(host->mmc, data, 0);
++
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
++}
++
++static void atmci_dma_error(struct dma_request *_req)
++{
++	struct dma_request_sg *req = to_dma_request_sg(_req);
++	struct atmel_mci_dma *dma;
++	struct atmel_mci *host;
++
++	dma = container_of(req, struct atmel_mci_dma, req);
++	host = container_of(dma, struct atmel_mci, dma);
++
++	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++			       | MCI_DATA_ERROR_FLAGS));
++
++	mci_set_dma_error_pending(host);
++	tasklet_schedule(&host->tasklet);
++}
++
++static irqreturn_t atmci_interrupt(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++	u32 status, mask, pending;
++
++	spin_lock(&mmc->lock);
++
++	status = mci_readl(host, SR);
++	mask = mci_readl(host, IMR);
++	pending = status & mask;
++
++	do {
++		if (pending & MCI_DATA_ERROR_FLAGS) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			host->data_status = status;
++			mci_set_data_error_pending(host);
++			tasklet_schedule(&host->tasklet);
++			break;
++		}
++		if (pending & MCI_BIT(CMDRDY))
++			atmci_cmd_interrupt(mmc, status);
++		if (pending & MCI_BIT(NOTBUSY)) {
++			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
++					       | MCI_DATA_ERROR_FLAGS));
++			mci_set_data_pending(host);
++			tasklet_schedule(&host->tasklet);
++		}
++
++		status = mci_readl(host, SR);
++		mask = mci_readl(host, IMR);
++		pending = status & mask;
++	} while (pending);
++
++	spin_unlock(&mmc->lock);
++
++	return IRQ_HANDLED;
++}
++
++static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++{
++	struct mmc_host *mmc = dev_id;
++	struct atmel_mci *host = mmc_priv(mmc);
++
++	int present = !gpio_get_value(irq_to_gpio(irq));
++
++	if (present != host->present) {
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++		mci_set_card_detect_pending(host);
++		tasklet_schedule(&host->tasklet);
++	}
++	return IRQ_HANDLED;
++}
++
++static int __devinit atmci_probe(struct platform_device *pdev)
++{
++	struct mci_platform_data *board;
++	struct atmel_mci *host;
++	struct mmc_host *mmc;
++	struct resource *regs;
++	int irq;
++	int ret;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	board = pdev->dev.platform_data;
++
++	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
++	if (!mmc)
++		return -ENOMEM;
++
++	host = mmc_priv(mmc);
++	host->pdev = pdev;
++	host->mmc = mmc;
++	if (board) {
++		host->detect_pin = board->detect_pin;
++		host->wp_pin = board->wp_pin;
++	} else {
++		host->detect_pin = -1;
++		host->detect_pin = -1;
++	}
++
++	host->mck = clk_get(&pdev->dev, "mci_clk");
++	if (IS_ERR(host->mck)) {
++		ret = PTR_ERR(host->mck);
++		goto out_free_host;
++	}
++	clk_enable(host->mck);
++
++	ret = -ENOMEM;
++	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!host->regs)
++		goto out_disable_clk;
++
++	host->bus_hz = clk_get_rate(host->mck);
++	host->mapbase = regs->start;
++
++	mmc->ops = &atmci_ops;
++	mmc->f_min = (host->bus_hz + 511) / 512;
++	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
++	mmc->caps |= MMC_CAP_4_BIT_DATA;
++
++	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
++
++	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
++	if (ret)
++		goto out_unmap;
++
++	/* Assume card is present if we don't have a detect pin */
++	host->present = 1;
++	if (host->detect_pin >= 0) {
++		if (gpio_request(host->detect_pin, "mmc_detect")) {
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
++			host->detect_pin = -1;
++		} else {
++			host->present = !gpio_get_value(host->detect_pin);
++		}
++	}
++	if (host->wp_pin >= 0) {
++		if (gpio_request(host->wp_pin, "mmc_wp")) {
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
++			host->wp_pin = -1;
++		}
++	}
++
++	/* TODO: Get this information from platform data */
++	ret = -ENOMEM;
++	host->dma.req.req.dmac = find_dma_controller(0);
++	if (!host->dma.req.req.dmac) {
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
++		goto out_free_irq;
++	}
++	ret = dma_alloc_channel(host->dma.req.req.dmac);
++	if (ret < 0) {
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
++		goto out_free_irq;
++	}
++	host->dma.req.req.channel = ret;
++	host->dma.req.width = DMA_WIDTH_32BIT;
++	host->dma.req.req.xfer_complete = atmci_xfer_complete;
++	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
++	host->dma.req.req.error = atmci_dma_error;
++	host->dma.rx_periph_id = 0;
++	host->dma.tx_periph_id = 1;
++
++	mci_writel(host, CR, MCI_BIT(SWRST));
++	mci_writel(host, IDR, ~0UL);
++
++	platform_set_drvdata(pdev, host);
++
++	mmc_add_host(mmc);
++
++	if (host->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(host->detect_pin),
++				  atmci_detect_change,
++				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
++				  DRIVER_NAME, mmc);
++		if (ret) {
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
++			gpio_free(host->detect_pin);
++			host->detect_pin = -1;
++		}
++	}
++
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
++
++	atmci_init_debugfs(host);
++
++	return 0;
++
++out_free_irq:
++	if (host->detect_pin >= 0)
++		gpio_free(host->detect_pin);
++	if (host->wp_pin >= 0)
++		gpio_free(host->wp_pin);
++	free_irq(irq, mmc);
++out_unmap:
++	iounmap(host->regs);
++out_disable_clk:
++	clk_disable(host->mck);
++	clk_put(host->mck);
++out_free_host:
++	mmc_free_host(mmc);
++	return ret;
++}
++
++static int __devexit atmci_remove(struct platform_device *pdev)
++{
++	struct atmel_mci *host = platform_get_drvdata(pdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	if (host) {
++		atmci_cleanup_debugfs(host);
++
++		if (host->detect_pin >= 0) {
++			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			cancel_delayed_work(&host->mmc->detect);
++			gpio_free(host->detect_pin);
++		}
++
++		mmc_remove_host(host->mmc);
++
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
++		mci_readl(host, SR);
++
++		dma_release_channel(host->dma.req.req.dmac,
++				    host->dma.req.req.channel);
++
++		if (host->wp_pin >= 0)
++			gpio_free(host->wp_pin);
++
++		free_irq(platform_get_irq(pdev, 0), host->mmc);
++		iounmap(host->regs);
++
++		clk_disable(host->mck);
++		clk_put(host->mck);
++
++		mmc_free_host(host->mmc);
++	}
++	return 0;
++}
++
++static struct platform_driver atmci_driver = {
++	.probe		= atmci_probe,
++	.remove		= __devexit_p(atmci_remove),
++	.driver		= {
++		.name		= DRIVER_NAME,
++	},
++};
++
++static int __init atmci_init(void)
++{
++	return platform_driver_register(&atmci_driver);
++}
++
++static void __exit atmci_exit(void)
++{
++	platform_driver_unregister(&atmci_driver);
++}
++
++module_init(atmci_init);
++module_exit(atmci_exit);
++
++MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/drivers/mmc/host/atmel-mci.h linux-avr32/drivers/mmc/host/atmel-mci.h
+--- linux-2.6.24/drivers/mmc/host/atmel-mci.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/mmc/host/atmel-mci.h	2008-02-01 14:51:39.000000000 -0500
+@@ -0,0 +1,192 @@
++/*
++ * Atmel MultiMedia Card Interface driver
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
++#define __DRIVERS_MMC_ATMEL_MCI_H__
++
++/* MCI register offsets */
++#define MCI_CR					0x0000
++#define MCI_MR					0x0004
++#define MCI_DTOR				0x0008
++#define MCI_SDCR				0x000c
++#define MCI_ARGR				0x0010
++#define MCI_CMDR				0x0014
++#define MCI_BLKR				0x0018
++#define MCI_RSPR				0x0020
++#define MCI_RSPR1				0x0024
++#define MCI_RSPR2				0x0028
++#define MCI_RSPR3				0x002c
++#define MCI_RDR					0x0030
++#define MCI_TDR					0x0034
++#define MCI_SR					0x0040
++#define MCI_IER					0x0044
++#define MCI_IDR					0x0048
++#define MCI_IMR					0x004c
++
++/* Bitfields in CR */
++#define MCI_MCIEN_OFFSET			0
++#define MCI_MCIEN_SIZE				1
++#define MCI_MCIDIS_OFFSET			1
++#define MCI_MCIDIS_SIZE				1
++#define MCI_PWSEN_OFFSET			2
++#define MCI_PWSEN_SIZE				1
++#define MCI_PWSDIS_OFFSET			3
++#define MCI_PWSDIS_SIZE				1
++#define MCI_SWRST_OFFSET			7
++#define MCI_SWRST_SIZE				1
++
++/* Bitfields in MR */
++#define MCI_CLKDIV_OFFSET			0
++#define MCI_CLKDIV_SIZE				8
++#define MCI_PWSDIV_OFFSET			8
++#define MCI_PWSDIV_SIZE				3
++#define MCI_RDPROOF_OFFSET			11
++#define MCI_RDPROOF_SIZE			1
++#define MCI_WRPROOF_OFFSET			12
++#define MCI_WRPROOF_SIZE			1
++#define MCI_DMAPADV_OFFSET			14
++#define MCI_DMAPADV_SIZE			1
++#define MCI_BLKLEN_OFFSET			16
++#define MCI_BLKLEN_SIZE				16
++
++/* Bitfields in DTOR */
++#define MCI_DTOCYC_OFFSET			0
++#define MCI_DTOCYC_SIZE				4
++#define MCI_DTOMUL_OFFSET			4
++#define MCI_DTOMUL_SIZE				3
++
++/* Bitfields in SDCR */
++#define MCI_SDCSEL_OFFSET			0
++#define MCI_SDCSEL_SIZE				4
++#define MCI_SDCBUS_OFFSET			7
++#define MCI_SDCBUS_SIZE				1
++
++/* Bitfields in ARGR */
++#define MCI_ARG_OFFSET				0
++#define MCI_ARG_SIZE				32
++
++/* Bitfields in CMDR */
++#define MCI_CMDNB_OFFSET			0
++#define MCI_CMDNB_SIZE				6
++#define MCI_RSPTYP_OFFSET			6
++#define MCI_RSPTYP_SIZE				2
++#define MCI_SPCMD_OFFSET			8
++#define MCI_SPCMD_SIZE				3
++#define MCI_OPDCMD_OFFSET			11
++#define MCI_OPDCMD_SIZE				1
++#define MCI_MAXLAT_OFFSET			12
++#define MCI_MAXLAT_SIZE				1
++#define MCI_TRCMD_OFFSET			16
++#define MCI_TRCMD_SIZE				2
++#define MCI_TRDIR_OFFSET			18
++#define MCI_TRDIR_SIZE				1
++#define MCI_TRTYP_OFFSET			19
++#define MCI_TRTYP_SIZE				2
++
++/* Bitfields in BLKR */
++#define MCI_BCNT_OFFSET				0
++#define MCI_BCNT_SIZE				16
++
++/* Bitfields in RSPRn */
++#define MCI_RSP_OFFSET				0
++#define MCI_RSP_SIZE				32
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define MCI_CMDRDY_OFFSET			0
++#define MCI_CMDRDY_SIZE				1
++#define MCI_RXRDY_OFFSET			1
++#define MCI_RXRDY_SIZE				1
++#define MCI_TXRDY_OFFSET			2
++#define MCI_TXRDY_SIZE				1
++#define MCI_BLKE_OFFSET				3
++#define MCI_BLKE_SIZE				1
++#define MCI_DTIP_OFFSET				4
++#define MCI_DTIP_SIZE				1
++#define MCI_NOTBUSY_OFFSET			5
++#define MCI_NOTBUSY_SIZE			1
++#define MCI_ENDRX_OFFSET			6
++#define MCI_ENDRX_SIZE				1
++#define MCI_ENDTX_OFFSET			7
++#define MCI_ENDTX_SIZE				1
++#define MCI_RXBUFF_OFFSET			14
++#define MCI_RXBUFF_SIZE				1
++#define MCI_TXBUFE_OFFSET			15
++#define MCI_TXBUFE_SIZE				1
++#define MCI_RINDE_OFFSET			16
++#define MCI_RINDE_SIZE				1
++#define MCI_RDIRE_OFFSET			17
++#define MCI_RDIRE_SIZE				1
++#define MCI_RCRCE_OFFSET			18
++#define MCI_RCRCE_SIZE				1
++#define MCI_RENDE_OFFSET			19
++#define MCI_RENDE_SIZE				1
++#define MCI_RTOE_OFFSET				20
++#define MCI_RTOE_SIZE				1
++#define MCI_DCRCE_OFFSET			21
++#define MCI_DCRCE_SIZE				1
++#define MCI_DTOE_OFFSET				22
++#define MCI_DTOE_SIZE				1
++#define MCI_OVRE_OFFSET				30
++#define MCI_OVRE_SIZE				1
++#define MCI_UNRE_OFFSET				31
++#define MCI_UNRE_SIZE				1
++
++/* Constants for DTOMUL */
++#define MCI_DTOMUL_1_CYCLE			0
++#define MCI_DTOMUL_16_CYCLES			1
++#define MCI_DTOMUL_128_CYCLES			2
++#define MCI_DTOMUL_256_CYCLES			3
++#define MCI_DTOMUL_1024_CYCLES			4
++#define MCI_DTOMUL_4096_CYCLES			5
++#define MCI_DTOMUL_65536_CYCLES			6
++#define MCI_DTOMUL_1048576_CYCLES		7
++
++/* Constants for RSPTYP */
++#define MCI_RSPTYP_NO_RESP			0
++#define MCI_RSPTYP_48_BIT			1
++#define MCI_RSPTYP_136_BIT			2
++
++/* Constants for SPCMD */
++#define MCI_SPCMD_NO_SPEC_CMD			0
++#define MCI_SPCMD_INIT_CMD			1
++#define MCI_SPCMD_SYNC_CMD			2
++#define MCI_SPCMD_INT_CMD			4
++#define MCI_SPCMD_INT_RESP			5
++
++/* Constants for TRCMD */
++#define MCI_TRCMD_NO_TRANS			0
++#define MCI_TRCMD_START_TRANS			1
++#define MCI_TRCMD_STOP_TRANS			2
++
++/* Constants for TRTYP */
++#define MCI_TRTYP_BLOCK				0
++#define MCI_TRTYP_MULTI_BLOCK			1
++#define MCI_TRTYP_STREAM			2
++
++/* Bit manipulation macros */
++#define MCI_BIT(name)					\
++	(1 << MCI_##name##_OFFSET)
++#define MCI_BF(name,value)				\
++	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
++	 << MCI_##name##_OFFSET)
++#define MCI_BFEXT(name,value)				\
++	(((value) >> MCI_##name##_OFFSET)		\
++	 & ((1 << MCI_##name##_SIZE) - 1))
++#define MCI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
++		    << MCI_##name##_OFFSET))		\
++	 | MCI_BF(name,value))
++
++/* Register access macros */
++#define mci_readl(port,reg)				\
++	__raw_readl((port)->regs + MCI_##reg)
++#define mci_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + MCI_##reg)
++
++#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
+diff -Nrup linux-2.6.24/drivers/mmc/host/Kconfig linux-avr32/drivers/mmc/host/Kconfig
+--- linux-2.6.24/drivers/mmc/host/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Kconfig	2008-02-01 14:51:39.000000000 -0500
+@@ -91,6 +91,16 @@ config MMC_AT91
+ 
+ 	  If unsure, say N.
+ 
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
++	help
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff -Nrup linux-2.6.24/drivers/mmc/host/Makefile linux-avr32/drivers/mmc/host/Makefile
+--- linux-2.6.24/drivers/mmc/host/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mmc/host/Makefile	2008-02-01 14:51:39.000000000 -0500
+@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
+ obj-$(CONFIG_MMC_SPI)		+= mmc_spi.o
+ 
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0001.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0001.c	2008-02-01 14:51:39.000000000 -0500
+@@ -50,6 +50,7 @@
+ #define I82802AC	0x00ac
+ #define MANUFACTURER_ST         0x0020
+ #define M50LPW080       0x002F
++#define AT49BV640D	0x02de
+ 
+ static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+ static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi
+ }
+ #endif
+ 
++/* Atmel chips don't use the same PRI format as Intel chips */
++static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
++{
++	struct map_info *map = mtd->priv;
++	struct cfi_private *cfi = map->fldrv_priv;
++	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
++	struct cfi_pri_atmel atmel_pri;
++	uint32_t features = 0;
++
++	/* Reverse byteswapping */
++	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
++	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
++	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
++
++	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
++	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
++
++	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
++
++	if (atmel_pri.Features & 0x01) /* chip erase supported */
++		features |= (1<<0);
++	if (atmel_pri.Features & 0x02) /* erase suspend supported */
++		features |= (1<<1);
++	if (atmel_pri.Features & 0x04) /* program suspend supported */
++		features |= (1<<2);
++	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
++		features |= (1<<9);
++	if (atmel_pri.Features & 0x20) /* page mode read supported */
++		features |= (1<<7);
++	if (atmel_pri.Features & 0x40) /* queued erase supported */
++		features |= (1<<4);
++	if (atmel_pri.Features & 0x80) /* Protection bits supported */
++		features |= (1<<6);
++
++	extp->FeatureSupport = features;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
++}
++
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
+ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
+@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struc
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
+ #endif
+diff -Nrup linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c
+--- linux-2.6.24/drivers/mtd/chips/cfi_cmdset_0002.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/mtd/chips/cfi_cmdset_0002.c	2008-02-01 14:51:39.000000000 -0500
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(stru
+ 		extp->TopBottom = 2;
+ 	else
+ 		extp->TopBottom = 3;
++
++	/* burst write mode not supported */
++	cfi->cfiq->BufWriteTimeoutTyp = 0;
++	cfi->cfiq->BufWriteTimeoutMax = 0;
+ }
+ 
+ static void fixup_use_secsi(struct mtd_info *mtd, void *param)
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct 
+ }
+ 
+ static struct cfi_fixup cfi_fixup_table[] = {
++	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ #ifdef AMD_BOOTLOC_BUG
+ 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
+ #endif
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[
+ #if !FORCE_WORD_WRITE
+ 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
+ #endif
+-	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
+ 	{ 0, 0, NULL, NULL }
+ };
+ static struct cfi_fixup jedec_fixup_table[] = {
+diff -Nrup linux-2.6.24/drivers/pcmcia/at32_cf.c linux-avr32/drivers/pcmcia/at32_cf.c
+--- linux-2.6.24/drivers/pcmcia/at32_cf.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/drivers/pcmcia/at32_cf.c	2008-02-01 14:51:42.000000000 -0500
+@@ -0,0 +1,533 @@
++/*
++ * Driver for AVR32 Static Memory Controller: CompactFlash support
++ *
++ * Copyright (C) 2006 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/init.h>
++#include <linux/device.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++
++#include <pcmcia/ss.h>
++
++#include <asm/gpio.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++
++#include <asm/arch/smc.h>
++
++struct at32_cf_socket {
++	struct pcmcia_socket	socket;
++	int			detect_pin;
++	int			reset_pin;
++	int			vcc_pin;
++	int			ready_pin;
++	struct resource		res_attr;
++	struct resource		res_mem;
++	struct resource		res_io;
++	struct smc_config	smc;
++	unsigned int		irq;
++	unsigned int		cf_cs;
++	socket_state_t		state;
++	unsigned		present:1;
++};
++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket)
++
++/*
++ * We have the following memory layout relative to the base address:
++ *
++ *   Alt IDE Mode:      00e0 0000 -> 00ff ffff
++ *   True IDE Mode:     00c0 0000 -> 00df ffff
++ *   I/O memory:        0080 0000 -> 00bf ffff
++ *   Common memory:     0040 0000 -> 007f ffff
++ *   Attribute memory:  0000 0000 -> 003f ffff
++ */
++#define CF_ATTR_OFFSET	0x00000000
++#define CF_MEM_OFFSET	0x00400000
++#define CF_IO_OFFSET	0x00800000
++#define CF_RES_SIZE	4096
++
++#ifdef DEBUG
++
++static int pc_debug;
++module_param(pc_debug, int, 0644);
++
++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func,
++			  int level, const char *fmt, ...)
++{
++	va_list args;
++
++	if (pc_debug > level) {
++		printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func);
++		va_start(args, fmt);
++		vprintk(fmt, args);
++		va_end(args);
++	}
++}
++
++#define debug(cf, lvl, fmt, arg...)			\
++	at32_cf_debug(cf, __func__, lvl, fmt, ##arg)
++
++#else
++#define debug(cf, lvl, fmt, arg...) do { } while (0)
++#endif
++
++static inline int at32_cf_present(struct at32_cf_socket *cf)
++{
++	int present = 1;
++
++	/* If we don't have a detect pin, assume the card is present */
++	if (cf->detect_pin >= 0)
++		present = !gpio_get_value(cf->detect_pin);
++
++	return present;
++}
++
++static irqreturn_t at32_cf_irq(int irq, void *dev_id)
++{
++	struct at32_cf_socket *cf = dev_id;
++	unsigned int present;
++
++	present = at32_cf_present(cf);
++	if (present != cf->present) {
++		cf->present = present;
++		debug(cf, 3, "card %s\n", present ? "present" : "gone");
++		pcmcia_parse_events(&cf->socket, SS_DETECT);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value)
++{
++	struct at32_cf_socket *cf;
++	u_int status = 0;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	if (at32_cf_present(cf)) {
++		/* NOTE: gpio on AP7xxx is 3.3V */
++		status = SS_DETECT | SS_3VCARD;
++		if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin))
++			status |= SS_READY;
++		if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin))
++			status |= SS_POWERON;
++	}
++
++	*value = status;
++	return 0;
++}
++
++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n",
++			(state->csc_mask==0)?"<NONE> ":"",
++			(state->csc_mask&SS_DETECT)?"DETECT ":"",
++			(state->csc_mask&SS_READY)?"READY ":"",
++			(state->csc_mask&SS_BATDEAD)?"BATDEAD ":"",
++			(state->csc_mask&SS_BATWARN)?"BATWARN ":"",
++			(state->csc_mask&SS_STSCHG)?"STSCHG ":"",
++			(state->flags==0)?"<NONE> ":"",
++			(state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"",
++			(state->flags&SS_IOCARD)?"IOCARD ":"",
++			(state->flags&SS_RESET)?"RESET ":"",
++			(state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"",
++			(state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"",
++			state->Vcc, state->Vpp, state->io_irq);
++
++	/*
++	 * TODO: Allow boards to override this in case they have level
++	 * converters.
++	 */
++	switch (state->Vcc) {
++	case 0:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 0);
++		break;
++	case 33:
++		if (cf->vcc_pin >= 0)
++			gpio_set_value(cf->vcc_pin, 1);
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_set_value(cf->reset_pin, state->flags & SS_RESET);
++
++	cf->state = *state;
++
++	return 0;
++}
++
++static int at32_cf_socket_init(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	return 0;
++}
++
++static int at32_cf_suspend(struct pcmcia_socket *sock)
++{
++	debug(to_at32_cf(sock), 2, "called\n");
++
++	at32_cf_set_socket(sock, &dead_socket);
++
++	return 0;
++}
++
++static int at32_cf_set_io_map(struct pcmcia_socket *sock,
++			      struct pccard_io_map *map)
++{
++	struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket);
++	int retval;
++
++	debug(cf, 2, "map %u  speed %u start 0x%08x stop 0x%08x\n",
++		map->map, map->speed, map->start, map->stop);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags == 0) ? "<NONE>":"",
++		(map->flags & MAP_ACTIVE) ? "ACTIVE " : "",
++		(map->flags & MAP_16BIT) ? "16BIT " : "",
++		(map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "",
++		(map->flags & MAP_0WS) ? "0WS " : "",
++		(map->flags & MAP_WRPROT) ? "WRPROT " : "",
++		(map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "",
++		(map->flags & MAP_PREFETCH) ? "PREFETCH " : "");
++
++	map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_16BIT)
++		cf->smc.bus_width = 2;
++	else
++		cf->smc.bus_width = 1;
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n");
++		return retval;
++	}
++
++	map->start = cf->socket.io_offset;
++	map->stop = map->start + CF_RES_SIZE - 1;
++
++	return 0;
++}
++
++static int
++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map)
++{
++	struct at32_cf_socket *cf;
++	struct resource *res;
++	int retval;
++
++	cf = container_of(sock, struct at32_cf_socket, socket);
++
++	debug(cf, 2, "map %u speed %u card_start %08x\n",
++		map->map, map->speed, map->card_start);
++	debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n",
++		(map->flags==0)?"<NONE>":"",
++		(map->flags&MAP_ACTIVE)?"ACTIVE ":"",
++		(map->flags&MAP_16BIT)?"16BIT ":"",
++		(map->flags&MAP_AUTOSZ)?"AUTOSZ ":"",
++		(map->flags&MAP_0WS)?"0WS ":"",
++		(map->flags&MAP_WRPROT)?"WRPROT ":"",
++		(map->flags&MAP_ATTRIB)?"ATTRIB ":"",
++		(map->flags&MAP_USE_WAIT)?"USE_WAIT ":"");
++
++	if (map->card_start)
++		return -EINVAL;
++
++	map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT;
++
++	if (map->flags & MAP_ATTRIB) {
++		res = &cf->res_attr;
++
++		/* Linksys WCF12 seems to use WAIT when reading CIS */
++		map->flags |= MAP_USE_WAIT;
++	} else {
++		res = &cf->res_mem;
++	}
++
++	if (map->flags & MAP_USE_WAIT)
++		cf->smc.nwait_mode = 3;
++	else
++		cf->smc.nwait_mode = 0;
++
++	retval = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (retval) {
++		printk(KERN_ERR "at32_cf: could not set up SMC for mem\n");
++		return retval;
++	}
++
++	map->static_start = res->start;
++
++	return 0;
++}
++
++static struct pccard_operations at32_cf_ops = {
++	.init			= at32_cf_socket_init,
++	.suspend		= at32_cf_suspend,
++	.get_status		= at32_cf_get_status,
++	.set_socket		= at32_cf_set_socket,
++	.set_io_map		= at32_cf_set_io_map,
++	.set_mem_map		= at32_cf_set_mem_map,
++};
++
++static int __init request_pin(struct platform_device *pdev,
++			      unsigned int pin, const char *name)
++{
++	if (gpio_request(pin, name)) {
++		dev_warn(&pdev->dev, "failed to request %s pin\n", name);
++		return -1;
++	}
++
++	return pin;
++}
++
++static struct smc_timing at32_cf_timing __initdata = {
++	.ncs_read_setup		= 30,
++	.nrd_setup		= 100,
++	.ncs_write_setup	= 30,
++	.nwe_setup		= 100,
++
++	.ncs_read_pulse		= 360,
++	.nrd_pulse		= 290,
++	.ncs_write_pulse	= 360,
++	.nwe_pulse		= 290,
++
++	.read_cycle		= 420,
++	.write_cycle		= 420,
++};
++
++static int __init at32_cf_probe(struct platform_device *pdev)
++{
++	struct at32_cf_socket	*cf;
++	struct cf_platform_data	*board = pdev->dev.platform_data;
++	struct resource		*res_skt;
++	int			irq;
++	int			ret;
++
++	dev_dbg(&pdev->dev, "probe");
++
++	if (!board)
++		return -ENXIO;
++
++	res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!res_skt)
++		return -ENXIO;
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL);
++	if (!cf)
++		return -ENOMEM;
++
++	cf->detect_pin = -1;
++	cf->reset_pin = -1;
++	cf->vcc_pin = -1;
++	cf->ready_pin = -1;
++	cf->cf_cs = board->cs;
++
++	if (board->detect_pin != GPIO_PIN_NONE)
++		cf->detect_pin = request_pin(pdev, board->detect_pin,
++					     "cf_detect");
++	if (board->reset_pin != GPIO_PIN_NONE)
++		cf->reset_pin = request_pin(pdev, board->reset_pin,
++					    "cf_reset");
++	if (board->vcc_pin != GPIO_PIN_NONE)
++		cf->vcc_pin = request_pin(pdev, board->vcc_pin,
++					  "cf_vcc");
++	if (board->ready_pin != GPIO_PIN_NONE)
++		/* READY is also used for irq through EIM */
++		cf->ready_pin = board->ready_pin;
++
++	debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n",
++	      cf->detect_pin, cf->reset_pin, cf->vcc_pin);
++
++	cf->socket.pci_irq = irq;
++	cf->socket.ops = &at32_cf_ops;
++	cf->socket.resource_ops = &pccard_static_ops;
++	cf->socket.dev.parent = &pdev->dev;
++	cf->socket.owner = THIS_MODULE;
++	cf->socket.features =
++		SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD;
++	cf->socket.map_size = CF_RES_SIZE;
++
++	cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET;
++	cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1;
++	cf->res_attr.name = "attribute";
++	cf->res_attr.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_attr);
++	if (ret)
++		goto err_request_res_attr;
++
++	cf->res_mem.start = res_skt->start + CF_MEM_OFFSET;
++	cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1;
++	cf->res_mem.name = "memory";
++	cf->res_mem.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_mem);
++	if (ret)
++		goto err_request_res_mem;
++
++	cf->res_io.start = res_skt->start + CF_IO_OFFSET;
++	cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1;
++	cf->res_io.name = "io";
++	cf->res_io.flags = IORESOURCE_MEM;
++	ret = request_resource(res_skt, &cf->res_io);
++	if (ret)
++		goto err_request_res_io;
++
++	cf->socket.io_offset = cf->res_io.start;
++
++	if (cf->detect_pin >= 0) {
++		ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq,
++				  IRQF_SHARED, "cf_detect", cf);
++		if (ret) {
++			debug(cf, 1,
++			      "failed to request cf_detect interrupt\n");
++			goto err_detect_irq;
++		}
++	}
++
++	cf->present = at32_cf_present(cf);
++
++	/* Setup SMC timings */
++	smc_set_timing(&cf->smc, &at32_cf_timing);
++
++	cf->smc.bus_width = 2;
++	cf->smc.nrd_controlled = 1;
++	cf->smc.nwe_controlled = 1;
++	cf->smc.nwait_mode = 0;
++	cf->smc.byte_write = 0;
++	cf->smc.tdf_cycles = 8;
++	cf->smc.tdf_mode = 0;
++
++	ret = smc_set_configuration(cf->cf_cs, &cf->smc);
++	if (ret) {
++		debug(cf, 1, "failed to configure SMC\n", ret);
++		goto err_smc;
++	}
++
++	ret = pcmcia_register_socket(&cf->socket);
++	if (ret) {
++		debug(cf, 1, "failed to register socket: %d\n", ret);
++		goto err_register_socket;
++	}
++
++	if (cf->reset_pin >= 0)
++		gpio_direction_output(cf->reset_pin, 0);
++
++	platform_set_drvdata(pdev, cf);
++
++	dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n",
++		 (unsigned long)res_skt->start);
++
++	return 0;
++
++err_register_socket:
++err_smc:
++	if (cf->detect_pin >= 0)
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++err_detect_irq:
++	release_resource(&cf->res_io);
++err_request_res_io:
++	release_resource(&cf->res_mem);
++err_request_res_mem:
++	release_resource(&cf->res_attr);
++err_request_res_attr:
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++	if (cf->detect_pin >= 0)
++		gpio_free(cf->detect_pin);
++	kfree(cf);
++
++	return ret;
++}
++
++static int __exit at32_cf_remove(struct platform_device *pdev)
++{
++	struct at32_cf_socket *cf = platform_get_drvdata(pdev);
++
++	pcmcia_unregister_socket(&cf->socket);
++	if (cf->detect_pin >= 0) {
++		free_irq(gpio_to_irq(cf->detect_pin), cf);
++		gpio_free(cf->detect_pin);
++	}
++	if (cf->vcc_pin >= 0)
++		gpio_free(cf->vcc_pin);
++	if (cf->reset_pin >= 0)
++		gpio_free(cf->reset_pin);
++
++	release_resource(&cf->res_io);
++	release_resource(&cf->res_mem);
++	release_resource(&cf->res_attr);
++	kfree(cf);
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++static struct platform_driver at32_cf_driver = {
++	.remove		= __exit_p(at32_cf_remove),
++	.driver		= {
++		.name	= "at32_cf",
++		.owner	= THIS_MODULE,
++	},
++};
++
++static int __init at32_cf_init(void)
++{
++	int ret;
++
++	ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe);
++	if (ret)
++		printk(KERN_ERR "at32_cf: probe failed: %d\n", ret);
++	return ret;
++}
++
++static void __exit at32_cf_exit(void)
++{
++	platform_driver_unregister(&at32_cf_driver);
++}
++
++module_init(at32_cf_init);
++module_exit(at32_cf_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
+diff -Nrup linux-2.6.24/drivers/pcmcia/Kconfig linux-avr32/drivers/pcmcia/Kconfig
+--- linux-2.6.24/drivers/pcmcia/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Kconfig	2008-02-01 14:51:42.000000000 -0500
+@@ -276,6 +276,13 @@ config ELECTRA_CF
+ 	  Say Y here to support the CompactFlash controller on the
+ 	  PA Semi Electra eval board.
+ 
++config AT32_CF
++	tristate "AT32AP CompactFlash Controller"
++	depends on PCMCIA && AVR32 && PLATFORM_AT32AP
++	help
++	  Say Y here to support the CompactFlash controller on AT32 chips.
++	  Or choose M to compile the driver as a module named "at32_cf".
++
+ config PCCARD_NONSTATIC
+ 	tristate
+ 
+diff -Nrup linux-2.6.24/drivers/pcmcia/Makefile linux-avr32/drivers/pcmcia/Makefile
+--- linux-2.6.24/drivers/pcmcia/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/pcmcia/Makefile	2008-02-01 14:51:42.000000000 -0500
+@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173)			+= vrc417
+ obj-$(CONFIG_OMAP_CF)				+= omap_cf.o
+ obj-$(CONFIG_AT91_CF)				+= at91_cf.o
+ obj-$(CONFIG_ELECTRA_CF)			+= electra_cf.o
++obj-$(CONFIG_AT32_CF)				+= at32_cf.o
+ 
+ sa11xx_core-y					+= soc_common.o sa11xx_base.o
+ pxa2xx_core-y					+= soc_common.o pxa2xx_base.o
+diff -Nrup linux-2.6.24/drivers/spi/atmel_spi.c linux-avr32/drivers/spi/atmel_spi.c
+--- linux-2.6.24/drivers/spi/atmel_spi.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/spi/atmel_spi.c	2008-02-01 14:51:43.000000000 -0500
+@@ -51,7 +51,9 @@ struct atmel_spi {
+ 	u8			stopping;
+ 	struct list_head	queue;
+ 	struct spi_transfer	*current_transfer;
+-	unsigned long		remaining_bytes;
++	unsigned long		current_remaining_bytes;
++	struct spi_transfer	*next_transfer;
++	unsigned long		next_remaining_bytes;
+ 
+ 	void			*buffer;
+ 	dma_addr_t		buffer_dma;
+@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_s
+ 		gpio_set_value(gpio, !active);
+ }
+ 
++static inline int atmel_spi_xfer_is_last(struct spi_message *msg,
++					struct spi_transfer *xfer)
++{
++	return msg->transfers.prev == &xfer->transfer_list;
++}
++
++static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer)
++{
++	return xfer->delay_usecs == 0 && !xfer->cs_change;
++}
++
++static void atmel_spi_next_xfer_data(struct spi_master *master,
++				struct spi_transfer *xfer,
++				dma_addr_t *tx_dma,
++				dma_addr_t *rx_dma,
++				u32 *plen)
++{
++	struct atmel_spi	*as = spi_master_get_devdata(master);
++	u32			len = *plen;
++
++	/* use scratch buffer only when rx or tx data is unspecified */
++	if (xfer->rx_buf)
++		*rx_dma = xfer->rx_dma + xfer->len - len;
++	else {
++		*rx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++	}
++	if (xfer->tx_buf)
++		*tx_dma = xfer->tx_dma + xfer->len - len;
++	else {
++		*tx_dma = as->buffer_dma;
++		if (len > BUFFER_SIZE)
++			len = BUFFER_SIZE;
++		memset(as->buffer, 0, len);
++		dma_sync_single_for_device(&as->pdev->dev,
++				as->buffer_dma, len, DMA_TO_DEVICE);
++	}
++
++	*plen = len;
++}
++
+ /*
+  * Submit next transfer for DMA.
+  * lock is held, spi irq is blocked
+@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct s
+ {
+ 	struct atmel_spi	*as = spi_master_get_devdata(master);
+ 	struct spi_transfer	*xfer;
+-	u32			len;
++	u32			len, remaining, total;
+ 	dma_addr_t		tx_dma, rx_dma;
+ 
+-	xfer = as->current_transfer;
+-	if (!xfer || as->remaining_bytes == 0) {
+-		if (xfer)
+-			xfer = list_entry(xfer->transfer_list.next,
+-					struct spi_transfer, transfer_list);
+-		else
+-			xfer = list_entry(msg->transfers.next,
+-					struct spi_transfer, transfer_list);
+-		as->remaining_bytes = xfer->len;
+-		as->current_transfer = xfer;
++	if (!as->current_transfer)
++		xfer = list_entry(msg->transfers.next,
++				struct spi_transfer, transfer_list);
++	else if (!as->next_transfer)
++		xfer = list_entry(as->current_transfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++	else
++		xfer = NULL;
++
++	if (xfer) {
++		len = xfer->len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		remaining = xfer->len - len;
++
++		spi_writel(as, RPR, rx_dma);
++		spi_writel(as, TPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RCR, len);
++		spi_writel(as, TCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  start xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		xfer = as->next_transfer;
++		remaining = as->next_remaining_bytes;
+ 	}
+ 
+-	len = as->remaining_bytes;
++	as->current_transfer = xfer;
++	as->current_remaining_bytes = remaining;
+ 
+-	tx_dma = xfer->tx_dma + xfer->len - len;
+-	rx_dma = xfer->rx_dma + xfer->len - len;
++	if (remaining > 0)
++		len = remaining;
++	else if (!atmel_spi_xfer_is_last(msg, xfer)
++			&& atmel_spi_xfer_can_be_chained(xfer)) {
++		xfer = list_entry(xfer->transfer_list.next,
++				struct spi_transfer, transfer_list);
++		len = xfer->len;
++	} else
++		xfer = NULL;
+ 
+-	/* use scratch buffer only when rx or tx data is unspecified */
+-	if (!xfer->rx_buf) {
+-		rx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-	}
+-	if (!xfer->tx_buf) {
+-		tx_dma = as->buffer_dma;
+-		if (len > BUFFER_SIZE)
+-			len = BUFFER_SIZE;
+-		memset(as->buffer, 0, len);
+-		dma_sync_single_for_device(&as->pdev->dev,
+-				as->buffer_dma, len, DMA_TO_DEVICE);
+-	}
++	as->next_transfer = xfer;
+ 
+-	spi_writel(as, RPR, rx_dma);
+-	spi_writel(as, TPR, tx_dma);
++	if (xfer) {
++		total = len;
++		atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len);
++		as->next_remaining_bytes = total - len;
++
++		spi_writel(as, RNPR, rx_dma);
++		spi_writel(as, TNPR, tx_dma);
++
++		if (msg->spi->bits_per_word > 8)
++			len >>= 1;
++		spi_writel(as, RNCR, len);
++		spi_writel(as, TNCR, len);
++
++		dev_dbg(&msg->spi->dev,
++			"  next xfer %p: len %u tx %p/%08x rx %p/%08x\n",
++			xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
++			xfer->rx_buf, xfer->rx_dma);
++	} else {
++		spi_writel(as, RNCR, 0);
++		spi_writel(as, TNCR, 0);
++	}
+ 
+-	as->remaining_bytes -= len;
+-	if (msg->spi->bits_per_word > 8)
+-		len >>= 1;
+-
+-	/* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer"
+-	 * mechanism might help avoid the IRQ latency between transfers
+-	 * (and improve the nCS0 errata handling on at91rm9200 chips)
+-	 *
+-	 * We're also waiting for ENDRX before we start the next
++	/* REVISIT: We're waiting for ENDRX before we start the next
+ 	 * transfer because we need to handle some difficult timing
+ 	 * issues otherwise. If we wait for ENDTX in one transfer and
+ 	 * then starts waiting for ENDRX in the next, it's difficult
+@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct s
+ 	 *
+ 	 * It should be doable, though. Just not now...
+ 	 */
+-	spi_writel(as, TNCR, 0);
+-	spi_writel(as, RNCR, 0);
+ 	spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES));
+-
+-	dev_dbg(&msg->spi->dev,
+-		"  start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n",
+-		xfer, xfer->len, xfer->tx_buf, xfer->tx_dma,
+-		xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR));
+-
+-	spi_writel(as, RCR, len);
+-	spi_writel(as, TCR, len);
+ 	spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
+ }
+ 
+@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *ma
+ 	spin_lock(&as->lock);
+ 
+ 	as->current_transfer = NULL;
++	as->next_transfer = NULL;
+ 
+ 	/* continue if needed */
+ 	if (list_empty(&as->queue) || as->stopping)
+@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 
+ 		spi_writel(as, IDR, pending);
+ 
+-		if (as->remaining_bytes == 0) {
++		if (as->current_remaining_bytes == 0) {
+ 			msg->actual_length += xfer->len;
+ 
+ 			if (!msg->is_dma_mapped)
+@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_i
+ 			if (xfer->delay_usecs)
+ 				udelay(xfer->delay_usecs);
+ 
+-			if (msg->transfers.prev == &xfer->transfer_list) {
++			if (atmel_spi_xfer_is_last(msg, xfer)) {
+ 				/* report completed message */
+ 				atmel_spi_msg_done(master, as, msg, 0,
+ 						xfer->cs_change);
+@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_de
+ 	if (!(spi->mode & SPI_CPHA))
+ 		csr |= SPI_BIT(NCPHA);
+ 
+-	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	/* DLYBS is mostly irrelevant since we manage chipselect using GPIOs.
++	 *
++	 * DLYBCT would add delays between words, slowing down transfers.
++	 * It could potentially be useful to cope with DMA bottlenecks, but
++	 * in those cases it's probably best to just use a lower bitrate.
++	 */
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
+ 
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff -Nrup linux-2.6.24/drivers/video/atmel_lcdfb.c linux-avr32/drivers/video/atmel_lcdfb.c
+--- linux-2.6.24/drivers/video/atmel_lcdfb.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/atmel_lcdfb.c	2008-02-01 14:51:44.000000000 -0500
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lc
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+@@ -148,6 +150,8 @@ static int atmel_lcdfb_alloc_video_memor
+ 		return -ENOMEM;
+ 	}
+ 
++	memset(info->screen_base, 0, info->fix.smem_len);
++
+ 	return 0;
+ }
+ 
+@@ -203,6 +207,26 @@ static int atmel_lcdfb_check_var(struct 
+ 	var->transp.offset = var->transp.length = 0;
+ 	var->xoffset = var->yoffset = 0;
+ 
++	/* Saturate vertical and horizontal timings at maximum values */
++	var->vsync_len = min_t(u32, var->vsync_len,
++			(ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
++	var->upper_margin = min_t(u32, var->upper_margin,
++			ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
++	var->lower_margin = min_t(u32, var->lower_margin,
++			ATMEL_LCDC_VFP);
++	var->right_margin = min_t(u32, var->right_margin,
++			(ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
++	var->hsync_len = min_t(u32, var->hsync_len,
++			(ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
++	var->left_margin = min_t(u32, var->left_margin,
++			ATMEL_LCDC_HBP + 1);
++
++	/* Some parameters can't be zero */
++	var->vsync_len = max_t(u32, var->vsync_len, 1);
++	var->right_margin = max_t(u32, var->right_margin, 1);
++	var->hsync_len = max_t(u32, var->hsync_len, 1);
++	var->left_margin = max_t(u32, var->left_margin, 1);
++
+ 	switch (var->bits_per_pixel) {
+ 	case 1:
+ 	case 2:
+@@ -516,7 +540,6 @@ static int __init atmel_lcdfb_init_fbinf
+ 	struct fb_info *info = sinfo->info;
+ 	int ret = 0;
+ 
+-	memset_io(info->screen_base, 0, info->fix.smem_len);
+ 	info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
+ 
+ 	dev_info(info->device,
+@@ -645,6 +668,11 @@ static int __init atmel_lcdfb_probe(stru
+ 		info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
+ 		if (!info->screen_base)
+ 			goto release_intmem;
++
++		/*
++		 * Don't clear the framebuffer -- someone may have set
++		 * up a splash image.
++		 */
+ 	} else {
+ 		/* alocate memory buffer */
+ 		ret = atmel_lcdfb_alloc_video_memory(sinfo);
+diff -Nrup linux-2.6.24/drivers/video/console/Kconfig linux-avr32/drivers/video/console/Kconfig
+--- linux-2.6.24/drivers/video/console/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/video/console/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -6,7 +6,7 @@ menu "Console display driver support"
+ 
+ config VGA_CONSOLE
+ 	bool "VGA text console" if EMBEDDED || !X86
+-	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN
++	depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32
+ 	default y
+ 	help
+ 	  Saying Y here will allow you to use Linux in text mode through a
+diff -Nrup linux-2.6.24/drivers/watchdog/Kconfig linux-avr32/drivers/watchdog/Kconfig
+--- linux-2.6.24/drivers/watchdog/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/drivers/watchdog/Kconfig	2008-02-01 14:51:44.000000000 -0500
+@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG
+ 
+ config AT32AP700X_WDT
+ 	tristate "AT32AP700x watchdog"
+-	depends on CPU_AT32AP7000
++	depends on CPU_AT32AP700X
+ 	help
+ 	  Watchdog timer embedded into AT32AP700x devices. This will reboot
+ 	  your system when the timeout is reached.
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap7000.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap7000.h	1969-12-31 19:00:00.000000000 -0500
+@@ -1,35 +0,0 @@
+-/*
+- * Pin definitions for AT32AP7000.
+- *
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#ifndef __ASM_ARCH_AT32AP7000_H__
+-#define __ASM_ARCH_AT32AP7000_H__
+-
+-#define GPIO_PERIPH_A	0
+-#define GPIO_PERIPH_B	1
+-
+-#define NR_GPIO_CONTROLLERS	4
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip. They can
+- * also be converted to IRQ numbers by passing them through
+- * gpio_to_irq().
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-
+-#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
+-#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
+-#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
+-#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
+-#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
+-
+-#endif /* __ASM_ARCH_AT32AP7000_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/at32ap700x.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/at32ap700x.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,35 @@
++/*
++ * Pin definitions for AT32AP7000.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_ARCH_AT32AP700X_H__
++#define __ASM_ARCH_AT32AP700X_H__
++
++#define GPIO_PERIPH_A	0
++#define GPIO_PERIPH_B	1
++
++#define NR_GPIO_CONTROLLERS	4
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip. They can
++ * also be converted to IRQ numbers by passing them through
++ * gpio_to_irq().
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++
++#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
++#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
++#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
++#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
++#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))
++
++#endif /* __ASM_ARCH_AT32AP700X_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/board.h linux-avr32/include/asm-avr32/arch-at32ap/board.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/board.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/board.h	2008-02-01 14:51:45.000000000 -0500
+@@ -51,6 +51,9 @@ struct platform_device *
+ at32_add_device_ide(unsigned int id, unsigned int extint,
+ 		    struct ide_platform_data *data);
+ 
++/* mask says which PWM channels to mux */
++struct platform_device *at32_add_device_pwm(u32 mask);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -66,7 +69,13 @@ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
+ struct platform_device *at32_add_device_twi(unsigned int id);
+-struct platform_device *at32_add_device_mci(unsigned int id);
++
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
+ struct platform_device *at32_add_device_ac97c(unsigned int id);
+ struct platform_device *at32_add_device_abdac(unsigned int id);
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h linux-avr32/include/asm-avr32/arch-at32ap/cpu.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/cpu.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/cpu.h	2008-02-01 14:51:45.000000000 -0500
+@@ -14,7 +14,7 @@
+  * Only AT32AP7000 is defined for now. We can identify the specific
+  * chip at runtime, but I'm not sure if it's really worth it.
+  */
+-#ifdef CONFIG_CPU_AT32AP7000
++#ifdef CONFIG_CPU_AT32AP700X
+ # define cpu_is_at32ap7000()	(1)
+ #else
+ # define cpu_is_at32ap7000()	(0)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/io.h linux-avr32/include/asm-avr32/arch-at32ap/io.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/io.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/io.h	2008-02-01 14:51:45.000000000 -0500
+@@ -4,7 +4,7 @@
+ /* For "bizarre" halfword swapping */
+ #include <linux/byteorder/swabb.h>
+ 
+-#if defined(CONFIG_AP7000_32_BIT_SMC)
++#if defined(CONFIG_AP700X_32_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 3UL)
+ # define __swizzle_addr_w(addr)	(addr ^ 2UL)
+ # define __swizzle_addr_l(addr)	(addr)
+@@ -14,7 +14,7 @@
+ # define __mem_ioswabb(a, x)	(x)
+ # define __mem_ioswabw(a, x)	swab16(x)
+ # define __mem_ioswabl(a, x)	swab32(x)
+-#elif defined(CONFIG_AP7000_16_BIT_SMC)
++#elif defined(CONFIG_AP700X_16_BIT_SMC)
+ # define __swizzle_addr_b(addr)	(addr ^ 1UL)
+ # define __swizzle_addr_w(addr)	(addr)
+ # define __swizzle_addr_l(addr)	(addr)
+diff -Nrup linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h linux-avr32/include/asm-avr32/arch-at32ap/portmux.h
+--- linux-2.6.24/include/asm-avr32/arch-at32ap/portmux.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/arch-at32ap/portmux.h	2008-02-01 14:51:45.000000000 -0500
+@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff -Nrup linux-2.6.24/include/asm-avr32/dma-controller.h linux-avr32/include/asm-avr32/dma-controller.h
+--- linux-2.6.24/include/asm-avr32/dma-controller.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/asm-avr32/dma-controller.h	2008-02-01 14:51:45.000000000 -0500
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
++{
++	return dmac->alloc_channel(dmac);
++}
++
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
++
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
++
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
++
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
++
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
++
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
++
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
++
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
++
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/irq.h linux-avr32/include/asm-avr32/irq.h
+--- linux-2.6.24/include/asm-avr32/irq.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/irq.h	2008-02-01 14:51:45.000000000 -0500
+@@ -11,4 +11,9 @@
+ 
+ #define irq_canonicalize(i)	(i)
+ 
++#ifndef __ASSEMBLER__
++int nmi_enable(void);
++void nmi_disable(void);
++#endif
++
+ #endif /* __ASM_AVR32_IOCTLS_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/kdebug.h linux-avr32/include/asm-avr32/kdebug.h
+--- linux-2.6.24/include/asm-avr32/kdebug.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/kdebug.h	2008-02-01 14:51:45.000000000 -0500
+@@ -5,6 +5,7 @@
+ enum die_val {
+ 	DIE_BREAKPOINT,
+ 	DIE_SSTEP,
++	DIE_NMI,
+ };
+ 
+ #endif /* __ASM_AVR32_KDEBUG_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/ocd.h linux-avr32/include/asm-avr32/ocd.h
+--- linux-2.6.24/include/asm-avr32/ocd.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ocd.h	2008-02-01 14:51:45.000000000 -0500
+@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned 
+ #define ocd_read(reg)			__ocd_read(OCD_##reg)
+ #define ocd_write(reg, value)		__ocd_write(OCD_##reg, value)
+ 
++struct task_struct;
++
++void ocd_enable(struct task_struct *child);
++void ocd_disable(struct task_struct *child);
++
+ #endif /* !__ASSEMBLER__ */
+ 
+ #endif /* __ASM_AVR32_OCD_H */
+diff -Nrup linux-2.6.24/include/asm-avr32/processor.h linux-avr32/include/asm-avr32/processor.h
+--- linux-2.6.24/include/asm-avr32/processor.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/processor.h	2008-02-01 14:51:45.000000000 -0500
+@@ -57,11 +57,25 @@ struct avr32_cpuinfo {
+ 	unsigned short cpu_revision;
+ 	enum tlb_config tlb_config;
+ 	unsigned long features;
++	u32 device_id;
+ 
+ 	struct cache_info icache;
+ 	struct cache_info dcache;
+ };
+ 
++static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 1) & 0x7f;
++}
++static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 12) & 0xffff;
++}
++static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
++{
++	return (cpu->device_id >> 28) & 0x0f;
++}
++
+ extern struct avr32_cpuinfo boot_cpu_data;
+ 
+ #ifdef CONFIG_SMP
+diff -Nrup linux-2.6.24/include/asm-avr32/ptrace.h linux-avr32/include/asm-avr32/ptrace.h
+--- linux-2.6.24/include/asm-avr32/ptrace.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/ptrace.h	2008-02-01 14:51:45.000000000 -0500
+@@ -121,7 +121,15 @@ struct pt_regs {
+ };
+ 
+ #ifdef __KERNEL__
+-# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
++
++#include <asm/ocd.h>
++
++#define arch_ptrace_attach(child)       ocd_enable(child)
++
++#define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
++#define instruction_pointer(regs)       ((regs)->pc)
++#define profile_pc(regs)                instruction_pointer(regs)
++
+ extern void show_regs (struct pt_regs *);
+ 
+ static __inline__ int valid_user_regs(struct pt_regs *regs)
+@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(st
+ 	return 0;
+ }
+ 
+-#define instruction_pointer(regs) ((regs)->pc)
+-
+-#define profile_pc(regs) instruction_pointer(regs)
+ 
+ #endif /* __KERNEL__ */
+ 
+diff -Nrup linux-2.6.24/include/asm-avr32/thread_info.h linux-avr32/include/asm-avr32/thread_info.h
+--- linux-2.6.24/include/asm-avr32/thread_info.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/asm-avr32/thread_info.h	2008-02-01 14:51:45.000000000 -0500
+@@ -88,6 +88,7 @@ static inline struct thread_info *curren
+ #define TIF_MEMDIE		6
+ #define TIF_RESTORE_SIGMASK	7	/* restore signal mask in do_signal */
+ #define TIF_CPU_GOING_TO_SLEEP	8	/* CPU is entering sleep 0 mode */
++#define TIF_DEBUG		30	/* debugging enabled */
+ #define TIF_USERSPACE		31      /* true if FS sets userspace */
+ 
+ #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
+diff -Nrup linux-2.6.24/include/linux/atmel_pwm.h linux-avr32/include/linux/atmel_pwm.h
+--- linux-2.6.24/include/linux/atmel_pwm.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/include/linux/atmel_pwm.h	2008-02-01 14:51:47.000000000 -0500
+@@ -0,0 +1,70 @@
++#ifndef __LINUX_ATMEL_PWM_H
++#define __LINUX_ATMEL_PWM_H
++
++/**
++ * struct pwm_channel - driver handle to a PWM channel
++ * @regs: base of this channel's registers
++ * @index: number of this channel (0..31)
++ * @mck: base clock rate, which can be prescaled and maybe subdivided
++ *
++ * Drivers initialize a pwm_channel structure using pwm_channel_alloc().
++ * Then they configure its clock rate (derived from MCK), alignment,
++ * polarity, and duty cycle by writing directly to the channel registers,
++ * before enabling the channel by calling pwm_channel_enable().
++ *
++ * After emitting a PWM signal for the desired length of time, drivers
++ * may then pwm_channel_disable() or pwm_channel_free().  Both of these
++ * disable the channel, but when it's freed the IRQ is deconfigured and
++ * the channel must later be re-allocated and reconfigured.
++ *
++ * Note that if the period or duty cycle need to be changed while the
++ * PWM channel is operating, drivers must use the PWM_CUPD double buffer
++ * mechanism, either polling until they change or getting implicitly
++ * notified through a once-per-period interrupt handler.
++ */
++struct pwm_channel {
++	void __iomem	*regs;
++	unsigned	index;
++	unsigned long	mck;
++};
++
++extern int pwm_channel_alloc(int index, struct pwm_channel *ch);
++extern int pwm_channel_free(struct pwm_channel *ch);
++
++extern int pwm_clk_alloc(unsigned prescale, unsigned div);
++extern void pwm_clk_free(unsigned clk);
++
++extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled);
++
++#define pwm_channel_enable(ch)	__pwm_channel_onoff((ch), 1)
++#define pwm_channel_disable(ch)	__pwm_channel_onoff((ch), 0)
++
++/* periodic interrupts, mostly for CUPD changes to period or cycle */
++extern int pwm_channel_handler(struct pwm_channel *ch,
++		void (*handler)(struct pwm_channel *ch));
++
++/* per-channel registers (banked at pwm_channel->regs) */
++#define PWM_CMR		0x00		/* mode register */
++#define		PWM_CPR_CPD	(1 << 10)	/* set: CUPD modifies period */
++#define		PWM_CPR_CPOL	(1 << 9)	/* set: idle high */
++#define		PWM_CPR_CALG	(1 << 8)	/* set: center align */
++#define		PWM_CPR_CPRE	(0xf << 0)	/* mask: rate is mck/(2^pre) */
++#define		PWM_CPR_CLKA	(0xb << 0)	/* rate CLKA */
++#define		PWM_CPR_CLKB	(0xc << 0)	/* rate CLKB */
++#define PWM_CDTY	0x04		/* duty cycle (max of CPRD) */
++#define PWM_CPRD	0x08		/* period (count up from zero) */
++#define PWM_CCNT	0x0c		/* counter (20 bits?) */
++#define PWM_CUPD	0x10		/* update CPRD (or CDTY) next period */
++
++static inline void
++pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val)
++{
++	__raw_writel(val, pwmc->regs + offset);
++}
++
++static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset)
++{
++	return __raw_readl(pwmc->regs + offset);
++}
++
++#endif /* __LINUX_ATMEL_PWM_H */
+diff -Nrup linux-2.6.24/include/video/atmel_lcdc.h linux-avr32/include/video/atmel_lcdc.h
+--- linux-2.6.24/include/video/atmel_lcdc.h	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/include/video/atmel_lcdc.h	2008-02-01 14:51:47.000000000 -0500
+@@ -115,20 +115,20 @@ struct atmel_lcdfb_info {
+ #define		ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)
+ 
+ #define ATMEL_LCDC_TIM1		0x0808
+-#define	ATMEL_LCDC_VFP		(0xff <<  0)
++#define	ATMEL_LCDC_VFP		(0xffU <<  0)
+ #define	ATMEL_LCDC_VBP_OFFSET		8
+-#define	ATMEL_LCDC_VBP		(0xff <<  ATMEL_LCDC_VBP_OFFSET)
++#define	ATMEL_LCDC_VBP		(0xffU <<  ATMEL_LCDC_VBP_OFFSET)
+ #define	ATMEL_LCDC_VPW_OFFSET		16
+-#define	ATMEL_LCDC_VPW		(0x3f << ATMEL_LCDC_VPW_OFFSET)
++#define	ATMEL_LCDC_VPW		(0x3fU << ATMEL_LCDC_VPW_OFFSET)
+ #define	ATMEL_LCDC_VHDLY_OFFSET		24
+-#define	ATMEL_LCDC_VHDLY	(0xf  << ATMEL_LCDC_VHDLY_OFFSET)
++#define	ATMEL_LCDC_VHDLY	(0xfU  << ATMEL_LCDC_VHDLY_OFFSET)
+ 
+ #define ATMEL_LCDC_TIM2		0x080c
+-#define	ATMEL_LCDC_HBP		(0xff  <<  0)
++#define	ATMEL_LCDC_HBP		(0xffU  <<  0)
+ #define	ATMEL_LCDC_HPW_OFFSET		8
+-#define	ATMEL_LCDC_HPW		(0x3f  <<  ATMEL_LCDC_HPW_OFFSET)
++#define	ATMEL_LCDC_HPW		(0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
+ #define	ATMEL_LCDC_HFP_OFFSET		21
+-#define	ATMEL_LCDC_HFP		(0x7ff << ATMEL_LCDC_HFP_OFFSET)
++#define	ATMEL_LCDC_HFP		(0x7ffU << ATMEL_LCDC_HFP_OFFSET)
+ 
+ #define ATMEL_LCDC_LCDFRMCFG	0x0810
+ #define	ATMEL_LCDC_LINEVAL	(0x7ff <<  0)
+diff -Nrup linux-2.6.24/kernel/ptrace.c linux-avr32/kernel/ptrace.c
+--- linux-2.6.24/kernel/ptrace.c	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/kernel/ptrace.c	2008-02-01 14:51:47.000000000 -0500
+@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request,
+ 	lock_kernel();
+ 	if (request == PTRACE_TRACEME) {
+ 		ret = ptrace_traceme();
++		if (!ret)
++			arch_ptrace_attach(current);
+ 		goto out;
+ 	}
+ 
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.c linux-avr32/sound/avr32/ac97c.c
+--- linux-2.6.24/sound/avr32/ac97c.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.c	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
++
++#include <asm/dma-controller.h>
++
++#include "ac97c.h"
++
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
++
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
++
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
++
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
++
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
++
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
++
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
++
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
++
++	return snd_pcm_lib_free_pages(substream);
++}
++
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, OCA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
++
++	return 0;
++}
++
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
++
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
++	}
++	ac97c_writel(chip, ICA, word);
++
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
++
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, word);
++
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
++	}
++
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
++
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
++
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
++
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
++
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
++
++	return 0;
++}
++
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
++
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
++
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
++
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
++
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++
++	return pos;
++}
++
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
++
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
++
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
++
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
++
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
++
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
++
++	return 0;
++}
++
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
++
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
++
++	return err;
++}
++
++static void atmel_ac97_error(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
++
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
++
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++
++	word = (reg & 0x7f) << 16 | val;
++
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
++
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
++}
++
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
++
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
++{
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
++}
++
++static void snd_atmel_ac97_destroy(struct snd_card *card)
++{
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
++}
++
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
++
++	card->private_free = snd_atmel_ac97_destroy;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
++
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
++
++	snd_card_set_dev(card, &pdev->dev);
++
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
++
++	return err;
++}
++
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
++
++	mutex_init(&opened_mutex);
++
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
++
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
++
++	snd_atmel_ac97_reset(chip);
++
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
++
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
++
++	platform_set_drvdata(pdev, card);
++	dev++;
++
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
++
++	return 0;
++
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
++
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_disable(chip->mck);
++
++	return 0;
++}
++
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
++
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
++
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
++
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff -Nrup linux-2.6.24/sound/avr32/ac97c.h linux-avr32/sound/avr32/ac97c.h
+--- linux-2.6.24/sound/avr32/ac97c.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/ac97c.h	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,71 @@
++/*
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff -Nrup linux-2.6.24/sound/avr32/Kconfig linux-avr32/sound/avr32/Kconfig
+--- linux-2.6.24/sound/avr32/Kconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
++
++endmenu
+diff -Nrup linux-2.6.24/sound/avr32/Makefile linux-avr32/sound/avr32/Makefile
+--- linux-2.6.24/sound/avr32/Makefile	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/avr32/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff -Nrup linux-2.6.24/sound/Kconfig linux-avr32/sound/Kconfig
+--- linux-2.6.24/sound/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Kconfig	2008-02-01 14:51:48.000000000 -0500
+@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
++
+ if SPI
+ source "sound/spi/Kconfig"
+ endif
+diff -Nrup linux-2.6.24/sound/Makefile linux-avr32/sound/Makefile
+--- linux-2.6.24/sound/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/Makefile	2008-02-01 14:51:48.000000000 -0500
+@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmw
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+ obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \
+-	sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++	sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.c linux-avr32/sound/oss/at32_abdac.c
+--- linux-2.6.24/sound/oss/at32_abdac.c	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.c	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
++
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
++
++#include "at32_abdac.h"
++
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
++
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
++};
++
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
++
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
++
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
++
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
++
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
++
++	struct clk *mck;
++	struct clk *sample_clk;
++	struct platform_device *pdev;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
++
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
++
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
++
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
++
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
++
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
++{
++	int ret;
++
++	if (dac->playing)
++		return 0;
++
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
++	}
++
++	return 0;
++}
++
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
++
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
++
++	return 0;
++}
++
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
++
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	wake_up(&dac->write_wait);
++}
++
++static void abdac_dma_error(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
++
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
++
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
++
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
++
++	return IRQ_HANDLED;
++}
++
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
++
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
++}
++
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
++{
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
++
++	return dac->trans(dac, buffer, count);
++}
++
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
++
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
++
++	if (dac->dsp_settings.channels == 2)
++		order++;
++
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
++
++	return 0;
++}
++
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
++{
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
++
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
++
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
++
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
++	return ret;
++}
++
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
++{
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
++
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
++}
++
++static int abdac_dsp_release(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = file->private_data;
++
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
++}
++
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
++};
++
++static int __init abdac_probe(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
++	int ret;
++
++	if (the_dac)
++		return -EBUSY;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
++
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
++	}
++	clk_enable(mck);
++
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
++
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
++
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
++
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
++
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
++
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
++
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
++
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
++
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
++
++	/* TODO: Register mixer */
++
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
++
++	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
++}
++
++static int __exit abdac_remove(struct platform_device *pdev)
++{
++	struct at32_dac *dac;
++
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
++}
++
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
++	},
++};
++
++static int __init abdac_init(void)
++{
++	return platform_driver_probe(&abdac_driver, abdac_probe);
++}
++module_init(abdac_init);
++
++static void __exit abdac_exit(void)
++{
++	platform_driver_unregister(&abdac_driver);
++}
++module_exit(abdac_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
++MODULE_LICENSE("GPL");
+diff -Nrup linux-2.6.24/sound/oss/at32_abdac.h linux-avr32/sound/oss/at32_abdac.h
+--- linux-2.6.24/sound/oss/at32_abdac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-avr32/sound/oss/at32_abdac.h	2008-02-01 14:51:49.000000000 -0500
+@@ -0,0 +1,59 @@
++/*
++ * Register definitions for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
++
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
++
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
++
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff -Nrup linux-2.6.24/sound/oss/Kconfig linux-avr32/sound/oss/Kconfig
+--- linux-2.6.24/sound/oss/Kconfig	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Kconfig	2008-02-01 14:51:49.000000000 -0500
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff -Nrup linux-2.6.24/sound/oss/Makefile linux-avr32/sound/oss/Makefile
+--- linux-2.6.24/sound/oss/Makefile	2008-01-24 17:58:37.000000000 -0500
++++ linux-avr32/sound/oss/Makefile	2008-02-01 14:51:49.000000000 -0500
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o a
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
diff --git a/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.24-avr32-mmc.patch b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.24-avr32-mmc.patch
new file mode 100644
index 000000000..a7654b5c6
--- /dev/null
+++ b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.24-avr32-mmc.patch
@@ -0,0 +1,255 @@
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+index eeac479..7913cd8 100644
+--- a/drivers/mmc/host/atmel-mci.c
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -39,7 +39,6 @@ enum {
+ 	EVENT_STOP_COMPLETE,
+ 	EVENT_DMA_COMPLETE,
+ 	EVENT_DMA_ERROR,
+-	EVENT_CARD_DETECT,
+ };
+ 
+ struct atmel_mci_dma {
+@@ -70,6 +69,9 @@ struct atmel_mci {
+ 	int			detect_pin;
+ 	int			wp_pin;
+ 
++	/* For detect pin debouncing */
++	struct timer_list	detect_timer;
++
+ 	unsigned long		bus_hz;
+ 	unsigned long		mapbase;
+ 	struct clk		*mck;
+@@ -108,8 +110,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_dma_error_is_complete(host)			\
+ 	test_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_card_detect_is_complete(host)			\
+-	test_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Test and clear bit macros for pending events */
+ #define mci_clear_cmd_is_pending(host)			\
+@@ -124,8 +124,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_is_pending(host)		\
+ 	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_is_pending(host)		\
+-	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Test and set bit macros for completed events */
+ #define mci_set_cmd_is_completed(host)			\
+@@ -140,8 +138,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_is_completed(host)		\
+ 	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_is_completed(host)		\
+-	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for completed events */
+ #define mci_set_cmd_complete(host)			\
+@@ -158,8 +154,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_DMA_COMPLETE, &host->completed_events)
+ #define mci_set_dma_error_complete(host)		\
+ 	set_bit(EVENT_DMA_ERROR, &host->completed_events)
+-#define mci_set_card_detect_complete(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->completed_events)
+ 
+ /* Set bit macros for pending events */
+ #define mci_set_cmd_pending(host)			\
+@@ -174,8 +168,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_set_dma_error_pending(host)			\
+ 	set_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_set_card_detect_pending(host)		\
+-	set_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ /* Clear bit macros for pending events */
+ #define mci_clear_cmd_pending(host)			\
+@@ -190,8 +182,6 @@ MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
+ 	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
+ #define mci_clear_dma_error_pending(host)		\
+ 	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
+-#define mci_clear_card_detect_pending(host)		\
+-	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
+ 
+ 
+ #ifdef CONFIG_DEBUG_FS
+@@ -560,6 +550,21 @@ static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
+ 				mci_readl(host, IMR));
+ 
+ 	WARN_ON(host->mrq != NULL);
++
++	/*
++	 * We may "know" the card is gone even though there's still an
++	 * electrical connection. If so, we really need to communicate
++	 * this to the MMC core since there won't be any more
++	 * interrupts as the card is completely removed. Otherwise,
++	 * the MMC core might believe the card is still there even
++	 * though the card was just removed very slowly.
++	 */
++	if (!host->present) {
++		mrq->cmd->error = -ENOMEDIUM;
++		mmc_request_done(mmc, mrq);
++		return;
++	}
++
+ 	host->mrq = mrq;
+ 	host->pending_events = 0;
+ 	host->completed_events = 0;
+@@ -729,6 +734,61 @@ static void atmci_command_complete(struct atmel_mci *host,
+ 	}
+ }
+ 
++static void atmci_detect_change(unsigned long data)
++{
++	struct atmel_mci *host = (struct atmel_mci *)data;
++	struct mmc_request *mrq = host->mrq;
++	int present;
++
++	/*
++	 * atmci_remove() sets detect_pin to -1 before freeing the
++	 * interrupt. We must not re-enable the interrupt if it has
++	 * been freed.
++	 */
++	smp_rmb();
++	if (host->detect_pin < 0)
++		return;
++
++	enable_irq(gpio_to_irq(host->detect_pin));
++	present = !gpio_get_value(host->detect_pin);
++
++	dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
++			present, host->present);
++
++	if (present != host->present) {
++		dev_dbg(&host->mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
++		host->present = present;
++
++		/* Reset controller if card is gone */
++		if (!present) {
++			mci_writel(host, CR, MCI_BIT(SWRST));
++			mci_writel(host, IDR, ~0UL);
++			mci_writel(host, CR, MCI_BIT(MCIEN));
++		}
++
++		/* Clean up queue if present */
++		if (mrq) {
++			if (!mci_cmd_is_complete(host))
++				mrq->cmd->error = -ENOMEDIUM;
++			if (mrq->data && !mci_data_is_complete(host)
++			    && !mci_data_error_is_complete(host)) {
++				dma_stop_request(host->dma.req.req.dmac,
++						host->dma.req.req.channel);
++				host->data->error = -ENOMEDIUM;
++				atmci_data_complete(host, host->data);
++			}
++			if (mrq->stop && !mci_stop_is_complete(host))
++				mrq->stop->error = -ENOMEDIUM;
++
++			host->cmd = NULL;
++			atmci_request_end(host->mmc, mrq);
++		}
++
++		mmc_detect_change(host->mmc, 0);
++	}
++}
++
+ static void atmci_tasklet_func(unsigned long priv)
+ {
+ 	struct mmc_host *mmc = (struct mmc_host *)priv;
+@@ -806,33 +866,6 @@ static void atmci_tasklet_func(unsigned long priv)
+ 		data->bytes_xfered = data->blocks * data->blksz;
+ 		atmci_data_complete(host, data);
+ 	}
+-	if (mci_clear_card_detect_is_pending(host)) {
+-		/* Reset controller if card is gone */
+-		if (!host->present) {
+-			mci_writel(host, CR, MCI_BIT(SWRST));
+-			mci_writel(host, IDR, ~0UL);
+-			mci_writel(host, CR, MCI_BIT(MCIEN));
+-		}
+-
+-		/* Clean up queue if present */
+-		if (mrq) {
+-			if (!mci_cmd_is_complete(host))
+-				mrq->cmd->error = -ETIMEDOUT;
+-			if (mrq->data && !mci_data_is_complete(host)
+-			    && !mci_data_error_is_complete(host)) {
+-				dma_stop_request(host->dma.req.req.dmac,
+-						host->dma.req.req.channel);
+-				host->data->error = -ETIMEDOUT;
+-				atmci_data_complete(host, data);
+-			}
+-			if (mrq->stop && !mci_stop_is_complete(host))
+-				mrq->stop->error = -ETIMEDOUT;
+-
+-			host->cmd = NULL;
+-			atmci_request_end(mmc, mrq);
+-		}
+-		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
+-	}
+ }
+ 
+ static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
+@@ -957,20 +990,19 @@ static irqreturn_t atmci_interrupt(int irq, void *dev_id)
+ 	return IRQ_HANDLED;
+ }
+ 
+-static irqreturn_t atmci_detect_change(int irq, void *dev_id)
++static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
+ {
+ 	struct mmc_host *mmc = dev_id;
+ 	struct atmel_mci *host = mmc_priv(mmc);
+ 
+-	int present = !gpio_get_value(irq_to_gpio(irq));
++	/*
++	 * Disable interrupts until the pin has stabilized and check
++	 * the state then. Use mod_timer() since we may be in the
++	 * middle of the timer routine when this interrupt triggers.
++	 */
++	disable_irq_nosync(irq);
++	mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
+ 
+-	if (present != host->present) {
+-		dev_dbg(&mmc->class_dev, "card %s\n",
+-			present ? "inserted" : "removed");
+-		host->present = present;
+-		mci_set_card_detect_pending(host);
+-		tasklet_schedule(&host->tasklet);
+-	}
+ 	return IRQ_HANDLED;
+ }
+ 
+@@ -1079,8 +1111,11 @@ static int __devinit atmci_probe(struct platform_device *pdev)
+ 	mmc_add_host(mmc);
+ 
+ 	if (host->detect_pin >= 0) {
++		setup_timer(&host->detect_timer, atmci_detect_change,
++				(unsigned long)host);
++
+ 		ret = request_irq(gpio_to_irq(host->detect_pin),
+-				  atmci_detect_change,
++				  atmci_detect_interrupt,
+ 				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+ 				  DRIVER_NAME, mmc);
+ 		if (ret) {
+@@ -1125,9 +1160,16 @@ static int __devexit atmci_remove(struct platform_device *pdev)
+ 		atmci_cleanup_debugfs(host);
+ 
+ 		if (host->detect_pin >= 0) {
+-			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
++			int pin = host->detect_pin;
++
++			/* Make sure our timer doesn't enable the interrupt */
++			host->detect_pin = -1;
++			smp_wmb();
++
++			free_irq(gpio_to_irq(pin), host->mmc);
++			del_timer_sync(&host->detect_timer);
+ 			cancel_delayed_work(&host->mmc->detect);
+-			gpio_free(host->detect_pin);
++			gpio_free(pin);
+ 		}
+ 
+ 		mmc_remove_host(host->mmc);
diff --git a/target/device/Atmel/atstk1002/target_skeleton/etc/httpd.conf b/target/device/Atmel/atstk1002/target_skeleton/etc/httpd.conf
index 86263f1e9..640f8150d 100644
--- a/target/device/Atmel/atstk1002/target_skeleton/etc/httpd.conf
+++ b/target/device/Atmel/atstk1002/target_skeleton/etc/httpd.conf
@@ -1,6 +1,2 @@
 # Allow all trafic
 A: *
-
-.asp:text/html
-/cgi-bin/webif:root:roota
-/cgi-bin/webif:admin:roota
diff --git a/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S00mountvirtfs b/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S00mountvirtfs
index 61c589102..d9e5c9249 100755
--- a/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S00mountvirtfs
+++ b/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S00mountvirtfs
@@ -58,6 +58,8 @@ if mount_fs dev /dev tmpfs "size=512k,mode=0755"; then
 	mkdir_fs /dev/pts
 	mount_fs pts /dev/pts devpts
 	mkdir_fs /dev/shm
+	# g_serial is not detected by mdev.
+	mknod /dev/ttygserial c 127 0
 fi
 
 mount_fs config /config configfs
diff --git a/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S40telnetd b/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S40telnetd
index b253c1036..e0fd2f2f3 100755
--- a/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S40telnetd
+++ b/target/device/Atmel/atstk1002/target_skeleton/etc/init.d/S40telnetd
@@ -8,7 +8,7 @@ if [ ! -x "${TELNETD}" ]; then
 	exit 1
 fi
 
-if ${TELNETD} -l /bin/ash; then
+if ${TELNETD} -l /bin/sh; then
 	echo "done"
 else
 	echo "failed"
diff --git a/target/device/Atmel/atstk1002/target_skeleton/etc/inittab b/target/device/Atmel/atstk1002/target_skeleton/etc/inittab
index 6a249d948..82672b1bd 100644
--- a/target/device/Atmel/atstk1002/target_skeleton/etc/inittab
+++ b/target/device/Atmel/atstk1002/target_skeleton/etc/inittab
@@ -1,8 +1,7 @@
 # Inittab for the ATSTK1000 development board
 #
 # Note: BusyBox init doesn't support runlevels.  The runlevels field is
-# completely ignored by BusyBox init. If you want runlevels, use
-# sysvinit.
+# completely ignored by BusyBox init. If you want runlevels, use sysvinit.
 #
 # Format for each entry: <id>:<runlevels>:<action>:<process>
 #
@@ -11,16 +10,19 @@
 # action    == one of sysinit, respawn, askfirst, wait, and once
 # process   == program to run
 
-# Run any rc scripts
+# Run the rcS script after kernel is booted.
 ::sysinit:/etc/init.d/rcS
 
-# Run a shell on the first serial port. Comment this out if you want
-# a getty instead
+# Run a shell on the first serial port. Comment out if you want a getty instead.
 ttyS0::respawn:-/bin/sh
 
-# Uncomment this to run a getty on the first serial port
+# Run a shell on the g_serial port (USB gadget device)? This shell will spawn
+# error message if the device is not connected.
+#ttygserial::respawn:-/bin/sh
+
+# Uncomment this to run a getty on the first serial port.
 #ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100
 ttyS2::respawn:/sbin/getty -L ttyS2 115200 vt100
 
-# Run a script on shutdown
+# Run a script on shutdown.
 ::shutdown:/etc/init.d/rcK
diff --git a/target/device/Atmel/atstk1002/target_skeleton/etc/proftpd.conf b/target/device/Atmel/atstk1002/target_skeleton/etc/proftpd.conf
new file mode 100644
index 000000000..86b447d37
--- /dev/null
+++ b/target/device/Atmel/atstk1002/target_skeleton/etc/proftpd.conf
@@ -0,0 +1,31 @@
+ServerName			"ATSTK1002 FTP server"
+ServerType			standalone
+DefaultServer			on
+
+# Port 21 is the standard FTP port.
+Port				21
+
+# Umask 022 is a good standard umask to prevent new dirs and files
+# from being group and world writable.
+Umask				022
+
+# Note that this ONLY works in standalone mode, in inetd mode you should use an
+# inetd server that allows you to limit maximum number of processes per service
+# (such as inetd).
+MaxInstances			5
+
+# Set the user and group under which the server will run.
+User				nobody
+Group				nogroup
+
+# To cause every FTP user to be "jailed" (chrooted) into their home
+# directory, uncomment this line.
+#DefaultRoot ~
+
+# Normally, we want files to be overwriteable.
+AllowOverwrite		on
+
+# Deny use of SITE CHMOD, uncomment the three lines below.
+#<Limit SITE_CHMOD>
+#  DenyAll
+#</Limit>
diff --git a/target/device/Atmel/atstk1002/target_skeleton/etc/samba/smb.conf b/target/device/Atmel/atstk1002/target_skeleton/etc/samba/smb.conf
index 7c1b27de6..a29571894 100644
--- a/target/device/Atmel/atstk1002/target_skeleton/etc/samba/smb.conf
+++ b/target/device/Atmel/atstk1002/target_skeleton/etc/samba/smb.conf
@@ -170,10 +170,16 @@
 #   client code page = 850
 
 #============================ Share Definitions ==============================
-;[homes]
-;   comment = Home Directories
-;   browseable = no
-;   writable = yes
+[homes]
+   comment = Home Directories
+   browseable = no
+   writable = yes
+
+[netdisk]
+   comment = Network share on STK1000
+   path = /media
+   read only = no
+   public = yes
 
 # Un-comment the following and create the netlogon directory for Domain Logons
 ; [netlogon]
diff --git a/target/device/Atmel/atstk1002/target_skeleton/proc/mounts b/target/device/Atmel/atstk1002/target_skeleton/proc/mounts
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/target/device/Atmel/atstk1002/target_skeleton/proc/mounts
diff --git a/target/device/Atmel/atstk1002/target_skeleton/tmp/resolv.conf b/target/device/Atmel/atstk1002/target_skeleton/tmp/resolv.conf
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/target/device/Atmel/atstk1002/target_skeleton/tmp/resolv.conf
diff --git a/target/device/Atmel/atstk1002/atstk1002_defconfig b/target/device/Atmel/atstk1002_defconfig
index 076406f46..9e82e3081 100644
--- a/target/device/Atmel/atstk1002/atstk1002_defconfig
+++ b/target/device/Atmel/atstk1002_defconfig
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Fri Nov  2 18:28:24 2007
+# Tue Feb 26 08:59:01 2008
 #
 BR2_HAVE_DOT_CONFIG=y
 BR2_VERSION="0.10.0-svn"
@@ -37,7 +37,7 @@ BR2_ENDIAN="BIG"
 #
 BR2_PROJECT="atstk1002"
 BR2_HOSTNAME="stk1000.example.net"
-BR2_BANNER="ATSTK1002 $(DATE)"
+BR2_BANNER="ATSTK1002 ($(DATE))"
 
 #
 # Preset Devices
@@ -53,10 +53,12 @@ BR2_TARGET_AT32AP7000=y
 # BR2_TARGET_AT32AP7002 is not set
 
 #
-# Development Board support
+# Development board support
 #
 BR2_TARGET_AVR32_ATSTK1002=y
 # BR2_TARGET_AVR32_ATNGW100 is not set
+# BR2_TARGET_AVR32_ATNGW100_BASE is not set
+# BR2_TARGET_AVR32_ATNGW100_EXPANDED is not set
 BR2_BOARD_NAME="atstk1002"
 
 #
@@ -68,6 +70,7 @@ BR2_BOARD_NAME="atstk1002"
 #
 BR2_TARGET_ATMEL_COPYTO=""
 BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
+# BR2_TARGET_VALKA is not set
 
 #
 # Generic System Support
@@ -79,7 +82,7 @@ BR2_BOARD_PATH="target/device/Atmel/$(BR2_BOARD_NAME)"
 #
 # Build options
 #
-BR2_WGET="wget --passive-ftp"
+BR2_WGET="wget --passive-ftp --retry-connrefused --waitretry=10"
 BR2_SVN_CO="svn co"
 BR2_SVN_UP="svn up"
 BR2_GIT="git clone"
@@ -92,11 +95,14 @@ BR2_DL_DIR="$(BASE_DIR)/src/dl"
 # Mirrors and Download locations
 #
 BR2_SOURCEFORGE_MIRROR="easynews"
+BR2_KERNEL_MIRROR="http://www.kernel.org/pub/"
+BR2_GNU_MIRROR="http://ftp.gnu.org/pub/gnu"
+BR2_DEBIAN_MIRROR="http://ftp.debian.org"
 
 #
 # Atmel Mirrors
 #
-BR2_ATMEL_MIRROR="ftp://www.at91.com/pub/buildroot"
+BR2_ATMEL_MIRROR="ftp://at91dist:distrib@81.80.104.162/AT91_Third_Party_Design_Flow/Linux_Host/"
 BR2_AT91_PATCH_MIRROR="http://maxim.org.za/AT91RM9200/2.6/"
 BR2_STAGING_DIR="$(BUILD_DIR)/staging_dir"
 # BR2_FPU_SUFFIX is not set
@@ -121,26 +127,15 @@ BR2_UPDATE_CONFIG=y
 #
 # Toolchain
 #
-# BR2_TOOLCHAIN_BUILDROOT is not set
+BR2_TOOLCHAIN_BUILDROOT=y
 # BR2_TOOLCHAIN_EXTERNAL is not set
-BR2_TOOLCHAIN_EXTERNAL_SOURCE=y
+# BR2_TOOLCHAIN_EXTERNAL_SOURCE is not set
 BR2_TOOLCHAIN_SOURCE=y
-BR2_TOOLCHAIN_ATMEL_AVR32_4_1_2=y
-# BR2_TOOLCHAIN_ATMEL_AVR32_4_2_1 is not set
-# BR2_TOOLCHAIN_UNKNOWNVENDOR is not set
-BR2_TOOLCHAIN_ATMEL_AVR32=y
-BR2_VENDOR_SITE="$(BR2_ATMEL_MIRROR)/Source"
-BR2_VENDOR_SUFFIX="-avr32"
-BR2_VENDOR_BINUTILS_RELEASE="-2.1.3"
-BR2_VENDOR_GCC_RELEASE="-2.0"
-BR2_VENDOR_UCLIBC_RELEASE="-2.1.3"
-BR2_VENDOR_GDB_RELEASE="-2.1.3"
-BR2_VENDOR_PATCH_DIR="target/device/Atmel/toolchain/avr32"
 BR2_EXT_GCC_VERSION_4_1_2=y
-# BR2_EXT_GCC_VERSION_4_2_1 is not set
+BR2_EXT_GCC_VERSION_4_2_1=y
 BR2_EXT_BINUTILS_VERSION_2_17=y
 BR2_EXT_UCLIBC_VERSION_0_9_29=y
-# BR2_EXT_UCLIBC_VERSION_0_9_28_3 is not set
+BR2_EXT_UCLIBC_VERSION_0_9_28_3=y
 
 #
 # Kernel Header Options
@@ -157,12 +152,12 @@ BR2_EXT_UCLIBC_VERSION_0_9_29=y
 # BR2_KERNEL_HEADERS_2_6_21_5 is not set
 # BR2_KERNEL_HEADERS_2_6_21 is not set
 # BR2_KERNEL_HEADERS_2_6_22_1 is not set
-BR2_KERNEL_HEADERS_2_6_22_10=y
+# BR2_KERNEL_HEADERS_2_6_22_10 is not set
 # BR2_KERNEL_HEADERS_2_6_22 is not set
 # BR2_KERNEL_HEADERS_2_6_23 is not set
+BR2_KERNEL_HEADERS_2_6_24=y
 # BR2_KERNEL_HEADERS_SNAP is not set
-# BR2_KERNEL_HEADERS_PATCH_DIR is not set
-BR2_DEFAULT_KERNEL_HEADERS="2.6.22.10"
+BR2_DEFAULT_KERNEL_HEADERS="2.6.24"
 
 #
 # uClibc Options
@@ -194,17 +189,18 @@ BR2_EXTRA_BINUTILS_CONFIG_OPTIONS=""
 #
 # BR2_GCC_VERSION_3_4_6 is not set
 # BR2_GCC_VERSION_4_0_4 is not set
-BR2_GCC_VERSION_4_1_2=y
+# BR2_GCC_VERSION_4_1_2 is not set
 # BR2_GCC_VERSION_4_2_0 is not set
-# BR2_GCC_VERSION_4_2_1 is not set
-# BR2_GCC_SUPPORTS_SYSROOT is not set
+BR2_GCC_VERSION_4_2_1=y
+BR2_GCC_SUPPORTS_SYSROOT=y
 # BR2_GCC_SUPPORTS_FINEGRAINEDMTUNE is not set
-BR2_GCC_VERSION="4.1.2"
+BR2_GCC_VERSION="4.2.1"
+# BR2_TOOLCHAIN_SYSROOT is not set
 # BR2_GCC_USE_SJLJ_EXCEPTIONS is not set
 BR2_EXTRA_GCC_CONFIG_OPTIONS=""
 BR2_GCC_CROSS_CXX=y
 BR2_INSTALL_LIBSTDCPP=y
-# BR2_GCC_SHARED_LIBGCC is not set
+BR2_GCC_SHARED_LIBGCC=y
 
 #
 # Ccache Options
@@ -240,7 +236,7 @@ BR2_GDB_VERSION="6.4"
 BR2_LARGEFILE=y
 BR2_INET_IPV6=y
 BR2_INET_RPC=y
-# BR2_USE_WCHAR is not set
+BR2_USE_WCHAR=y
 BR2_SOFT_FLOAT=y
 BR2_TARGET_OPTIMIZATION="-Os -pipe"
 BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
@@ -251,11 +247,11 @@ BR2_CROSS_TOOLCHAIN_TARGET_UTILS=y
 BR2_PACKAGE_BUSYBOX=y
 # BR2_BUSYBOX_VERSION_1_2_2_1 is not set
 # BR2_BUSYBOX_VERSION_1_6_1 is not set
-# BR2_BUSYBOX_VERSION_1_7_0 is not set
-# BR2_BUSYBOX_VERSION_1_7_1 is not set
-BR2_BUSYBOX_VERSION_1_7_2=y
+# BR2_BUSYBOX_VERSION_1_7_X is not set
+# BR2_BUSYBOX_VERSION_1_8_X is not set
+BR2_BUSYBOX_VERSION_1_9_X=y
 # BR2_PACKAGE_BUSYBOX_SNAPSHOT is not set
-BR2_BUSYBOX_VERSION="1.7.2"
+BR2_BUSYBOX_VERSION="1.9.1"
 BR2_PACKAGE_BUSYBOX_INSTALL_SYMLINKS=y
 BR2_PACKAGE_BUSYBOX_CONFIG="$(BR2_BOARD_PATH)/busybox-$(BR2_BUSYBOX_VERSION).config"
 BR2_PACKAGE_BUSYBOX_HIDE_OTHERS=y
@@ -265,6 +261,7 @@ BR2_PACKAGE_BUSYBOX_SKELETON=y
 # The minimum needed to build a uClibc development system
 #
 BR2_PACKAGE_BASH=y
+# B2_PACKAGE_BASH_LINK_SH is not set
 BR2_PACKAGE_BZIP2=y
 # BR2_PACKAGE_DIFFUTILS is not set
 # BR2_PACKAGE_FLEX is not set
@@ -278,6 +275,7 @@ BR2_PACKAGE_BZIP2=y
 # BR2_PACKAGE_AUTOMAKE is not set
 # BR2_PACKAGE_BISON is not set
 # BR2_PACKAGE_CCACHE_TARGET is not set
+# BR2_PACKAGE_CVS is not set
 # BR2_PACKAGE_DISTCC is not set
 # BR2_PACKAGE_DMALLOC is not set
 # BR2_PACKAGE_EXPAT is not set
@@ -301,8 +299,17 @@ BR2_HOST_FAKEROOT=y
 # BR2_PACKAGE_BSDIFF is not set
 # BR2_PACKAGE_CUSTOMIZE is not set
 # BR2_PACKAGE_DASH is not set
+# BR2_PACKAGE_FCONFIG is not set
 BR2_PACKAGE_FILE=y
+# BR2_PACKAGE_FIS is not set
 # BR2_PACKAGE_KEXEC is not set
+# BR2_PACKAGE_ICU is not set
+# BR2_PACKAGE_IPKG is not set
+# BR2_PACKAGE_CUPS is not set
+# BR2_PACKAGE_NG_SPICE_REWORK is not set
+# BR2_PACKAGE_GAMIN is not set
+# BR2_PACKAGE_STARTUP_NOTIFICATION is not set
+# BR2_PACKAGE_CLASSPATH is not set
 BR2_PACKAGE_LIBDAEMON=y
 # BR2_PACKAGE_LIBELF is not set
 # BR2_PACKAGE_LIBEVENT is not set
@@ -312,6 +319,10 @@ BR2_PACKAGE_LIBDAEMON=y
 # BR2_PACKAGE_LIBLOCKFILE is not set
 # BR2_PACKAGE_LIBSYSFS is not set
 # BR2_PACKAGE_LIBXML2 is not set
+
+#
+# libxslt	- disabled (requires pkgconfig)
+#
 # BR2_PACKAGE_LOCKFILE_PROGS is not set
 # BR2_PACKAGE_LSOF is not set
 # BR2_PACKAGE_LTP-TESTSUITE is not set
@@ -326,10 +337,16 @@ BR2_NETWORK_SUPPORT=y
 #
 # Networking applications
 #
-# BR2_PACKAGE_ARGUS is not set
+
+#
+# argus		- disabled (requires libpcap)
+#
 BR2_PACKAGE_AVAHI=y
 BR2_PACKAGE_AVAHI_AUTOIPD=y
-# BR2_PACKAGE_AVAHI_DAEMON is not set
+
+#
+# mDNS/DNS-SD daemon	- disabled (requires expat)
+#
 # BR2_PACKAGE_BOA is not set
 # BR2_PACKAGE_BIND is not set
 # BR2_PACKAGE_BRIDGE is not set
@@ -338,16 +355,24 @@ BR2_PACKAGE_AVAHI_AUTOIPD=y
 # BR2_PACKAGE_DNSMASQ is not set
 BR2_PACKAGE_DROPBEAR=y
 # BR2_PACKAGE_ETHTOOL is not set
-# BR2_PACKAGE_HASERL is not set
+BR2_PACKAGE_HASERL=y
+# BR2_PACKAGE_HASERL_VERSION_0_8_0 is not set
+BR2_PACKAGE_HASERL_VERSION_0_9_21=y
+BR2_PACKAGE_HASERL_VERSION="0.9.21"
 # BR2_PACKAGE_IRDA_UTILS is not set
 # BR2_PACKAGE_IPERF is not set
 # BR2_PACKAGE_IPROUTE2 is not set
-# BR2_PACKAGE_IPSEC_TOOLS is not set
+
+#
+# ipsec-tools	- disabled (requires openssl, flex and the flex library (libfl.a) )
+#
 # BR2_PACKAGE_IPTABLES is not set
 # BR2_PACKAGE_KISMET is not set
 # BR2_PACKAGE_L2TP is not set
 # BR2_PACKAGE_LIBCGI is not set
 # BR2_PACKAGE_LIBCGICC is not set
+# BR2_PACKAGE_LIBEXOSIP2 is not set
+# BR2_PACKAGE_LIBOSIP2 is not set
 # BR2_PACKAGE_LIBPCAP is not set
 # BR2_PACKAGE_LINKS is not set
 BR2_PACKAGE_LRZSZ=y
@@ -356,7 +381,17 @@ BR2_PACKAGE_LRZSZ=y
 # BR2_PACKAGE_MROUTED is not set
 # BR2_PACKAGE_MUTT is not set
 BR2_PACKAGE_NBD=y
-# BR2_PACKAGE_NCFTP is not set
+BR2_PACKAGE_NCFTP=y
+
+#
+# ncFTP tools selection
+#
+# BR2_PACKAGE_NCFTP_GET is not set
+# BR2_PACKAGE_NCFTP_PUT is not set
+# BR2_PACKAGE_NCFTP_LS is not set
+# BR2_PACKAGE_NCFTP_BATCH is not set
+# BR2_PACKAGE_NCFTP_SPOOLER is not set
+# BR2_PACKAGE_NCFTP_BOOKMARKS is not set
 # BR2_PACKAGE_NETKITBASE is not set
 # BR2_PACKAGE_NETKITTELNET is not set
 # BR2_PACKAGE_NETPLUG is not set
@@ -389,33 +424,7 @@ BR2_PACKAGE_PROFTPD=y
 # BR2_PACKAGE_QUAGGA_WATCHQUAGGA is not set
 # BR2_PACKAGE_QUAGGA_ISISD is not set
 BR2_PACKAGE_RSYNC=y
-BR2_PACKAGE_SAMBA=y
-
-#
-# Samba tools selection
-#
-# BR2_PACKAGE_SAMBA_CIFS is not set
-# BR2_PACKAGE_SAMBA_EVENTLOGADM is not set
-# BR2_PACKAGE_SAMBA_NET is not set
-BR2_PACKAGE_SAMBA_NMBD=y
-BR2_PACKAGE_SAMBA_NMBLOOKUP=y
-# BR2_PACKAGE_SAMBA_NTLM_AUTH is not set
-# BR2_PACKAGE_SAMBA_PDBEDIT is not set
-# BR2_PACKAGE_SAMBA_PROFILES is not set
-# BR2_PACKAGE_SAMBA_RPCCLIENT is not set
-# BR2_PACKAGE_SAMBA_SMBCACLS is not set
-BR2_PACKAGE_SAMBA_SMBCLIENT=y
-# BR2_PACKAGE_SAMBA_SMBCONTROL is not set
-# BR2_PACKAGE_SAMBA_SMBCQUOTAS is not set
-# BR2_PACKAGE_SAMBA_SMBGET is not set
-BR2_PACKAGE_SAMBA_SMBPASSWD=y
-# BR2_PACKAGE_SAMBA_SMBSPOOL is not set
-BR2_PACKAGE_SAMBA_SMBSTATUS=y
-# BR2_PACKAGE_SAMBA_SMBTREE is not set
-BR2_PACKAGE_SAMBA_SWAT=y
-# BR2_PACKAGE_SAMBA_TDB is not set
-# BR2_PACKAGE_SAMBA_TESTPARM is not set
-# BR2_PACKAGE_SAMBA_WINBINDD is not set
+# BR2_PACKAGE_SAMBA is not set
 # BR2_PACKAGE_SOCAT is not set
 # BR2_PACKAGE_STUNNEL is not set
 # BR2_PACKAGE_TCPDUMP is not set
@@ -423,14 +432,21 @@ BR2_PACKAGE_SAMBA_SWAT=y
 # BR2_PACKAGE_TFTPD is not set
 # BR2_PACKAGE_TN5250 is not set
 # BR2_PACKAGE_TTCP is not set
-# BR2_PACKAGE_VPNC is not set
+
+#
+# vpnc		- disabled (requires libgcrypt and libgpg_error)
+#
 # BR2_PACKAGE_VTUN is not set
-# BR2_PACKAGE_WIRELESS_TOOLS is not set
+BR2_PACKAGE_WIRELESS_TOOLS=y
 BR2_BLOCKDEV_SUPPORT=y
-# BR2_PACKAGE_DBUS is not set
+
+#
+# dbus not available (need expat or libxml2)
+#
 # BR2_PACKAGE_DM is not set
 # BR2_PACKAGE_DMRAID is not set
 # BR2_PACKAGE_E2FSPROGS is not set
+# BR2_PACKAGE_LIBFUSE is not set
 # BR2_PACKAGE_GADGETFS_TEST is not set
 # BR2_PACKAGE_HAL is not set
 # BR2_PACKAGE_HWDATA is not set
@@ -454,29 +470,30 @@ BR2_PACKAGE_MTD_UTILS=y
 #
 BR2_PACKAGE_MTD_FLASH_ERASE=y
 BR2_PACKAGE_MTD_FLASH_ERASEALL=y
-# BR2_PACKAGE_MTD_FLASH_INFO is not set
+BR2_PACKAGE_MTD_FLASH_INFO=y
 # BR2_PACKAGE_MTD_FLASH_LOCK is not set
 # BR2_PACKAGE_MTD_FLASH_UNLOCK is not set
-# BR2_PACKAGE_MTD_FLASHCP is not set
+BR2_PACKAGE_MTD_FLASHCP=y
 # BR2_PACKAGE_MTD_ERASE is not set
-BR2_PACKAGE_MTD_JFFS2DUMP=y
+# BR2_PACKAGE_MTD_JFFS2DUMP is not set
 # BR2_PACKAGE_MTD_JFFS3DUMP is not set
 # BR2_PACKAGE_MTD_SUMTOOL is not set
 # BR2_PACKAGE_MTD_FTL_CHECK is not set
 # BR2_PACKAGE_MTD_FTL_FORMAT is not set
 # BR2_PACKAGE_MTD_NFTL_FORMAT is not set
 # BR2_PACKAGE_MTD_NFTLDUMP is not set
-BR2_PACKAGE_MTD_MKFSJFFS2=y
+# BR2_PACKAGE_MTD_MKFSJFFS2 is not set
 # BR2_PACKAGE_MTD_MKFSJFFS is not set
 # BR2_PACKAGE_MTD_NANDDUMP is not set
 # BR2_PACKAGE_MTD_NANDWRITE is not set
 BR2_PACKAGE_MTD_MTD_DEBUG=y
 # BR2_PACKAGE_MTD_DOCFDISK is not set
 # BR2_PACKAGE_MTD_DOC_LOADBIOS is not set
+# BR2_PACKAGE_NTFS-3G is not set
 # BR2_PACKAGE_PCIUTILS is not set
 # BR2_PACKAGE_PCMCIA is not set
 # BR2_PACKAGE_RAIDTOOLS is not set
-BR2_PACKAGE_SETSERIAL=y
+# BR2_PACKAGE_SETSERIAL is not set
 # BR2_PACKAGE_SMARTMONTOOLS is not set
 # BR2_PACKAGE_USBMOUNT is not set
 # BR2_PACKAGE_USBUTILS is not set
@@ -503,9 +520,12 @@ BR2_PACKAGE_ALSA_UTILS_ALSAMIXER=y
 # BR2_PACKAGE_ALSA_UTILS_ASEQDUMP is not set
 # BR2_PACKAGE_ALSA_UTILS_ASEQNET is not set
 # BR2_PACKAGE_ALSA_UTILS_SPEAKER_TEST is not set
-# BR2_PACKAGE_ASTERISK is not set
+
+#
+# asterisk	- disabled (required openssl and mpg123)
+#
 # BR2_PACKAGE_AUMIX is not set
-BR2_PACKAGE_LIBID3TAG=y
+# BR2_PACKAGE_LIBID3TAG is not set
 BR2_PACKAGE_LIBMAD=y
 # BR2_PACKAGE_LIBMAD_TARGET_HEADERS is not set
 # BR2_PACKAGE_LIBOGG is not set
@@ -514,10 +534,10 @@ BR2_PACKAGE_LIBMAD=y
 #
 # libvorbis requires the package libogg to build
 #
-BR2_PACKAGE_MADPLAY=y
-BR2_PACKAGE_MADPLAY_ALSA=y
-BR2_PACKAGE_MPG123=y
+# BR2_PACKAGE_MADPLAY is not set
+# BR2_PACKAGE_MPG123 is not set
 BR2_PACKAGE_MPG123_ALSA=y
+# BR2_PACKAGE_SPEEX is not set
 BR2_GRAPHIC_SUPPORT=y
 
 #
@@ -542,6 +562,7 @@ BR2_PACKAGE_JPEG=y
 BR2_PACKAGE_LIBPNG=y
 BR2_PACKAGE_LIBUNGIF=y
 # BR2_PACKAGE_SDL is not set
+# BR2_PACKAGE_SDL_TTF is not set
 # BR2_PACKAGE_TIFF is not set
 
 #
@@ -560,13 +581,21 @@ BR2_PACKAGE_FBSET=y
 # BR2_PACKAGE_QTE is not set
 BR2_PACKAGE_QTOPIA4=y
 # BR2_PACKAGE_QTOPIA4_DEBUG is not set
+BR2_PACKAGE_QTOPIA4_SHARED=y
+# BR2_PACKAGE_QTOPIA4_STATIC is not set
 BR2_PACKAGE_QTOPIA4_LICENSE_TYPE_GPL=y
 # BR2_PACKAGE_QTOPIA4_LICENSE_TYPE_COMMERCIAL is not set
 BR2_PACKAGE_QTOPIA4_GPL_LICENSE_APPROVED=y
 # BR2_PACKAGE_QTOPIA4_QT3SUPPORT is not set
 BR2_PACKAGE_QTOPIA4_DEPTHS="-depths 24,16,8"
-# BR2_PACKAGE_QTOPIA4_GIF is not set
-# BR2_PACKAGE_QTOPIA4_LIBMNG is not set
+BR2_PACKAGE_QTOPIA4_GIF=y
+BR2_PACKAGE_QTOPIA4_LIBMNG=y
+BR2_PACKAGE_QTOPIA4_NOJPEG=y
+# BR2_PACKAGE_QTOPIA4_SYSTEMJPEG is not set
+# BR2_PACKAGE_QTOPIA4_QTJPEG is not set
+# BR2_PACKAGE_QTOPIA4_NOZLIB is not set
+BR2_PACKAGE_QTOPIA4_QTZLIB=y
+# BR2_PACKAGE_QTOPIA4_SYSTEMZLIB is not set
 BR2_PACKAGE_QTOPIA4_EMB_PLATFORM="$(ARCH)"
 BR2_PACKAGE_XSERVER_none=y
 # BR2_PACKAGE_XSERVER_x11r7 is not set
@@ -577,14 +606,23 @@ BR2_X11_PREFIX="/usr"
 #
 # X libraries and helper libraries
 #
-# BR2_PACKAGE_ATK is not set
+
+#
+# atk		- disabled (requires libglib2)
+#
 # BR2_PACKAGE_PANGO is not set
 # BR2_PACKAGE_LIBDRM is not set
 # BR2_PACKAGE_LIBGLIB12 is not set
 # BR2_PACKAGE_LIBGLIB2 is not set
+# BR2_PACKAGE_LIBSEXY is not set
+
+#
+# fltk		- disabled (requires Xorg(7))
+#
 # BR2_PACKAGE_FONTCONFIG is not set
 # BR2_PACKAGE_FREETYPE is not set
 # BR2_PACKAGE_TSLIB is not set
+# BR2_PACKAGE_OPENMOTIF is not set
 
 #
 # X Window managers
@@ -592,10 +630,33 @@ BR2_X11_PREFIX="/usr"
 # BR2_PACKAGE_MATCHBOX is not set
 
 #
+# blackbox		- disabled (requires Xorg(7))
+#
+
+#
 # X applications
 #
 
 #
+# dillo		- disabled (requires jpeg,libglib12,libgtk12,zlib,libpng and Xorg(7))
+#
+
+#
+# midori		- disabled (requires Xorg(7))
+#
+# BR2_PACKAGE_WEBKIT is not set
+
+#
+# synergy		- disabled (requires Xorg(7))
+#
+# BR2_PACKAGE_GQVIEW is not set
+# BR2_PACKAGE_LEAFPAD is not set
+# BR2_PACKAGE_TORSMO is not set
+# BR2_PACKAGE_PCMANFM is not set
+# BR2_PACKAGE_XSTROKE is not set
+# BR2_PACKAGE_SYLPHEED is not set
+
+#
 # Video libraries/codecs and applications
 #
 BR2_PACKAGE_MPLAYER=y
@@ -606,6 +667,12 @@ BR2_PACKAGE_LZO=y
 BR2_PACKAGE_ZLIB=y
 # BR2_PACKAGE_ZLIB_TARGET_HEADERS is not set
 # BR2_SCRIPTING_SUPPORT is not set
+# BR2_GAMES is not set
+
+#
+# Editors
+#
+# BR2_PACKAGE_VIM is not set
 
 #
 # Target filesystem options
@@ -630,9 +697,9 @@ BR2_TARGET_ROOTFS_EXT2_COPYTO=""
 # BR2_TARGET_ROOTFS_JFFS2 is not set
 # BR2_TARGET_ROOTFS_SQUASHFS is not set
 BR2_TARGET_ROOTFS_TAR=y
-# BR2_TARGET_ROOTFS_TAR_NONE is not set
+BR2_TARGET_ROOTFS_TAR_NONE=y
 # BR2_TARGET_ROOTFS_TAR_GZIP is not set
-BR2_TARGET_ROOTFS_TAR_BZIP2=y
+# BR2_TARGET_ROOTFS_TAR_BZIP2 is not set
 # BR2_TARGET_ROOTFS_TAR_LZMA is not set
 BR2_TARGET_ROOTFS_TAR_OPTIONS=""
 BR2_TARGET_ROOTFS_TAR_COPYTO=""
@@ -642,6 +709,15 @@ BR2_TARGET_ROOTFS_TAR_COPYTO=""
 #
 # bootloader for target device
 #
+BR2_TARGET_U_BOOT=y
+BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE=""
+BR2_TARGET_U_BOOT_CONFIG_BOARD="$(BR2_BOARD_NAME)_config"
+BR2_TARGET_U_BOOT_SERVERIP=""
+BR2_TARGET_U_BOOT_IPADDR=""
+BR2_TARGET_U_BOOT_ETH0ADDR=""
+BR2_TARGET_U_BOOT_ETH1ADDR=""
+BR2_TARGET_U_BOOT_BOOTARGS="console=ttyS0 root=/dev/mmcblk0p1 rootwait=1 fbmem=600k"
+BR2_TARGET_U_BOOT_BOOTCMD="mmcinit; ext2load mmc 0:1 0x90300000 /boot/uImage; bootm"
 
 #
 # Kernel
@@ -651,15 +727,17 @@ BR2_KERNEL_LINUX_ADVANCED=y
 # BR2_KERNEL_LINUX is not set
 # BR2_KERNEL_HURD is not set
 BR2_PACKAGE_LINUX=y
-BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-2.6.22.config"
+BR2_PACKAGE_LINUX_KCONFIG="$(BR2_BOARD_PATH)/$(BR2_BOARD_NAME)-linux-2.6.22.5.config"
 BR2_PACKAGE_LINUX_FORMAT="uImage"
-BR2_KERNEL_CURRENT_VERSION="2.6.23.1"
+BR2_KERNEL_CURRENT_VERSION="2.6.24"
+BR2_KERNEL_THIS_VERSION="2.6.24"
 BR2_KERNEL_SITE="http://ftp.kernel.org/pub/linux/kernel/v2.6/"
 BR2_MM_PATCH_SITE="http://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6"
 BR2_RC_MM_PATCH_DIR="$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)/2.6.$(BR2_KERNEL_NEXT_VERSION)-rc$(BR2_KERNEL_RC_LEVEL)-mm$(BR2_KERNEL_MM_LEVEL)"
 # BR2_LINUX_2_6_STABLE is not set
+BR2_LINUX_2_6_24=y
 # BR2_LINUX_2_6_23 is not set
-BR2_LINUX_2_6_22_10=y
+# BR2_LINUX_2_6_22_10 is not set
 # BR2_LINUX_2_6_22_1 is not set
 # BR2_LINUX_2_6_22 is not set
 # BR2_LINUX_2_6_21_7 is not set
@@ -671,13 +749,22 @@ BR2_LINUX_2_6_22_10=y
 #
 # Patches
 #
+BR2_KERNEL_ADD_NO_PATCH=y
+# BR2_KERNEL_ADD_LATEST_MINORPATCH is not set
+# BR2_KERNEL_ADD_MINORPATCH is not set
+# BR2_KERNEL_ADD_LATEST_RC_PATCH is not set
+# BR2_KERNEL_ADD_RC_PATCH is not set
+# BR2_KERNEL_ADD_LATEST_SNAPSHOT is not set
+# BR2_KERNEL_ADD_SNAPSHOT is not set
+# BR2_KERNEL_ADD_LATEST_MM_PATCH is not set
+# BR2_KERNEL_ADD_MM_PATCH is not set
 # BR2_KERNEL_ADD_PATCH is not set
 BR2_LINUX_BSP_PATCH=""
-BR2_KERNEL_PREPATCHED=y
-# BR2_KERNEL_BASE is not set
+# BR2_KERNEL_PREPATCHED is not set
+BR2_KERNEL_BASE=y
 # BR2_KERNEL_LATEST is not set
-BR2_DOWNLOAD_LINUX26_VERSION="2.6.22.10"
-BR2_LINUX26_VERSION="2.6.22.10"
+BR2_DOWNLOAD_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
+BR2_LINUX26_VERSION="$(BR2_KERNEL_THIS_VERSION)"
 
 #
 # Linux Kernel Configuration
@@ -694,7 +781,7 @@ BR2_LINUX_BIN_UIMAGE=y
 #
 # Destinations for linux kernel binaries
 #
-# BR2_LINUX_COPYTO_ROOTFS is not set
+BR2_LINUX_COPYTO_ROOTFS=y
 BR2_LINUX_COPYTO_TFTPBOOT=y
 BR2_LINUX_COPYTO=""
-BR2_LINUX_COPY_CONFIGURATION=y
+# BR2_LINUX_COPY_CONFIGURATION is not set
diff --git a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch b/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch
deleted file mode 100644
index adc8189a6..000000000
--- a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-001-at91+avr32.patch
+++ /dev/null
@@ -1,24575 +0,0 @@
-Index: linux-2.6.22.1/include/asm-arm/arch-at91/at91sam9260_matrix.h
-===================================================================
---- linux-2.6.22.1/include/asm-arm/arch-at91/at91sam9260_matrix.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-arm/arch-at91/at91sam9260_matrix.h	(arbetskopia)
-@@ -67,7 +67,7 @@
- #define		AT91_MATRIX_CS4A		(1 << 4)	/* Chip Select 4 Assignment */
- #define			AT91_MATRIX_CS4A_SMC		(0 << 4)
- #define			AT91_MATRIX_CS4A_SMC_CF1	(1 << 4)
--#define		AT91_MATRIX_CS5A		(1 << 5 )	/* Chip Select 5 Assignment */
-+#define		AT91_MATRIX_CS5A		(1 << 5)	/* Chip Select 5 Assignment */
- #define			AT91_MATRIX_CS5A_SMC		(0 << 5)
- #define			AT91_MATRIX_CS5A_SMC_CF2	(1 << 5)
- #define		AT91_MATRIX_DBPUC		(1 << 8)	/* Data Bus Pull-up Configuration */
-Index: linux-2.6.22.1/include/asm-arm/arch-at91/ics1523.h
-===================================================================
---- linux-2.6.22.1/include/asm-arm/arch-at91/ics1523.h	(revision 0)
-+++ linux-2.6.22.1/include/asm-arm/arch-at91/ics1523.h	(revision 0)
-@@ -0,0 +1,154 @@
-+//*----------------------------------------------------------------------------
-+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
-+//*----------------------------------------------------------------------------
-+//* The software is delivered "AS IS" without warranty or condition of any
-+//* kind, either express, implied or statutory. This includes without
-+//* limitation any warranty or condition with respect to merchantability or
-+//* fitness for any particular purpose, or against the infringements of
-+//* intellectual property rights of others.
-+//*----------------------------------------------------------------------------
-+//* File Name           : ics1523.h
-+//* Object              : Clock Generator Prototyping File.
-+//*
-+//* 1.0 08/28/02 ED     : Creation
-+//* 1.2 13/01/03 FB		: Update on lib V3
-+//*----------------------------------------------------------------------------
-+
-+#ifndef ics1523_h
-+#define ics1523_h
-+
-+/*-------------------------------------------*/
-+/* ICS1523 TWI Serial Clock Definition       */
-+/*-------------------------------------------*/
-+
-+#define		ICS_MIN_CLOCK		100		/* Min Frequency Access Clock KHz */
-+#define		ICS_MAX_CLOCK		400		/* Max Frequency Access Clock KHz */
-+#define		ICS_TRANSFER_RATE	ICS_MAX_CLOCK	/* Transfer speed to apply */
-+
-+#define		ICS_WRITE_CLK_PNB	30		/* TWCK Clock Periods required to write */
-+#define		ICS_READ_CLK_PNB	40		/* TWCK Clock Periods required to read */
-+
-+/*-------------------------------------------*/
-+/* ICS1523 Write Operation Definition        */
-+/*-------------------------------------------*/
-+
-+#define		ICS1523_ACCESS_OK	0		/* OK */
-+#define		ICS1523_ACCESS_ERROR	-1		/* NOK */
-+
-+/*-------------------------------------------*/
-+/* ICS1523 Device Addresses Definition       */
-+/*-------------------------------------------*/
-+
-+#define		ICS_ADDR		0x26		/* Device Address */
-+
-+/*--------------------------------------------------*/
-+/* ICS1523 Registers Internal Addresses Definition  */
-+/*--------------------------------------------------*/
-+
-+#define		ICS_ICR			0x0		/* Input Control Register */
-+#define		ICS_LCR			0x1		/* Loop Control Register */
-+#define		ICS_FD0			0x2		/* PLL FeedBack Divider LSBs */
-+#define		ICS_FD1			0x3		/* PLL FeedBack Divider MSBs */
-+#define		ICS_DPAO		0x4		/* Dynamic Phase Aligner Offset */
-+#define		ICS_DPAC		0x5		/* Dynamic Phase Aligner Resolution */
-+#define		ICS_OE			0x6		/* Output Enables Register */
-+#define		ICS_OD			0x7		/* Osc Divider Register */
-+#define		ICS_SWRST		0x8		/* DPA & PLL Reset Register */
-+#define		ICS_VID			0x10		/* Chip Version Register */
-+#define		ICS_RID			0x11		/* Chip Revision Register */
-+#define		ICS_SR			0x12		/* Status Register */
-+
-+/*------------------------------------------------------*/
-+/* ICS1523 Input Control Register Bits Definition       */
-+/*------------------------------------------------------*/
-+
-+#define		ICS_PDEN		0x1		/* Phase Detector Enable */
-+#define		ICS_PDPOL		0x2		/* Phase Detector Enable Polarity */
-+#define		ICS_REFPOL		0x4		/* External Reference Polarity */
-+#define		ICS_FBKPOL		0x8		/* External Feedback Polarity */
-+#define		ICS_FBKSEL		0x10		/* External Feedback Select */
-+#define		ICS_FUNCSEL		0x20		/* Function Out Select */
-+#define		ICS_ENPLS		0x40		/* Enable PLL Lock/Ref Status Output */
-+#define		ICS_ENDLS		0x80		/* Enable DPA Lock/Ref Status Output */
-+
-+/*-----------------------------------------------------*/
-+/* ICS1523 Loop Control Register Bits Definition       */
-+/*-----------------------------------------------------*/
-+
-+#define		ICS_PFD			0x7		/* Phase Detector Gain */
-+#define		ICS_PSD			0x30		/* Post-Scaler Divider */
-+
-+/*----------------------------------------------------*/
-+/* ICS1523 PLL FeedBack Divider LSBs Definition       */
-+/*----------------------------------------------------*/
-+
-+#define		ICS_FBDL		0xFF		/* PLL FeedBack Divider LSBs */
-+
-+/*----------------------------------------------------*/
-+/* ICS1523 PLL FeedBack Divider MSBs Definition       */
-+/*----------------------------------------------------*/
-+
-+#define		ICS_FBDM		0xF		/* PLL FeedBack Divider MSBs */
-+
-+/*------------------------------------------------------------*/
-+/* ICS1523 Dynamic Phase Aligner Offset Bits Definition       */
-+/*------------------------------------------------------------*/
-+
-+#define		ICS_DPAOS		0x2F		/* Dynamic Phase Aligner Offset */
-+#define		ICS_FILSEL		0x80		/* Loop Filter Select */
-+
-+/*----------------------------------------------------------------*/
-+/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition       */
-+/*----------------------------------------------------------------*/
-+
-+#define		ICS_DPARES		0x3		/* Dynamic Phase Aligner Resolution */
-+#define		ICS_MMREV		0xFC		/* Metal Mask Revision Number */
-+
-+/*-------------------------------------------------------*/
-+/* ICS1523 Output Enables Register Bits Definition       */
-+/*-------------------------------------------------------*/
-+
-+#define		ICS_OEPCK		0x1		/* Output Enable for PECL PCLK Outputs */
-+#define		ICS_OETCK		0x2		/* Output Enable for STTL CLK Output */
-+#define		ICS_OEP2		0x4		/* Output Enable for PECL CLK/2 Outputs */
-+#define		ICS_OET2		0x8		/* Output Enable for STTL CLK/2 Output */
-+#define		ICS_OEF			0x10		/* Output Enable for STTL FUNC Output */
-+#define		ICS_CLK2INV		0x20		/* CLK/2 Invert */
-+#define		ICS_OSCL		0xC0		/* SSTL Clock Scaler */
-+
-+/*----------------------------------------------------*/
-+/* ICS1523 Osc Divider Register Bits Definition       */
-+/*----------------------------------------------------*/
-+
-+#define		ICS_OSCDIV		0x7F		/* Oscillator Divider Modulus */
-+#define		ICS_INSEL		0x80		/* Input Select */
-+
-+/*---------------------------------------------------*/
-+/* ICS1523 DPA & PLL Reset Register Definition       */
-+/*---------------------------------------------------*/
-+
-+#define		ICS_DPAR		0x0A		/* DPA Reset Command */
-+#define		ICS_PLLR		0x50		/* PLL Reset Command */
-+
-+/*------------------------------------------------*/
-+/* ICS1523 Chip Version Register Definition       */
-+/*------------------------------------------------*/
-+
-+#define		ICS_CHIPV		0xFF		/* Chip Version */
-+
-+/*-------------------------------------------------*/
-+/* ICS1523 Chip Revision Register Definition       */
-+/*-------------------------------------------------*/
-+
-+#define		ICS_CHIPR		0xFF		/* Chip Revision */
-+
-+/*------------------------------------------*/
-+/* ICS1523 Status Register Definition       */
-+/*------------------------------------------*/
-+
-+#define		ICS_DPALOCK		0x1		/* DPA Lock Status */
-+#define		ICS_PLLLOCK		0x2		/* PLL Lock Status */
-+
-+int at91_ics1523_init(void);
-+
-+#endif /* ics1523_h */
-Index: linux-2.6.22.1/include/asm-arm/arch-at91/spi.h
-===================================================================
---- linux-2.6.22.1/include/asm-arm/arch-at91/spi.h	(revision 0)
-+++ linux-2.6.22.1/include/asm-arm/arch-at91/spi.h	(revision 0)
-@@ -0,0 +1,54 @@
-+/*
-+ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200
-+ *
-+ * (c) SAN People (Pty) Ltd
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#ifndef AT91_LEGACY_SPI_H
-+#define AT91_LEGACY_SPI_H
-+
-+#define SPI_MAJOR		153	/* registered device number */
-+
-+#define DEFAULT_SPI_CLK		6000000
-+
-+
-+/* Maximum number of buffers in a single SPI transfer.
-+ *  DataFlash uses maximum of 2
-+ *  spidev interface supports up to 8.
-+ */
-+#define MAX_SPI_TRANSFERS	8
-+#define NR_SPI_DEVICES		4	/* number of devices on SPI bus */
-+
-+/*
-+ * Describes the buffers for a SPI transfer.
-+ * A transmit & receive buffer must be specified for each transfer
-+ */
-+struct spi_transfer_list {
-+	void* tx[MAX_SPI_TRANSFERS];	/* transmit */
-+	int txlen[MAX_SPI_TRANSFERS];
-+	void* rx[MAX_SPI_TRANSFERS];	/* receive */
-+	int rxlen[MAX_SPI_TRANSFERS];
-+	int nr_transfers;		/* number of transfers */
-+	int curr;			/* current transfer */
-+};
-+
-+struct spi_local {
-+	unsigned int pcs;		/* Peripheral Chip Select value */
-+
-+	struct spi_transfer_list *xfers;	/* current transfer list */
-+	dma_addr_t tx, rx;		/* DMA address for current transfer */
-+	dma_addr_t txnext, rxnext;	/* DMA address for next transfer */
-+};
-+
-+
-+/* Exported functions */
-+extern void spi_access_bus(short device);
-+extern void spi_release_bus(short device);
-+extern int spi_transfer(struct spi_transfer_list* list);
-+
-+#endif
-Index: linux-2.6.22.1/include/asm-arm/arch-at91/at91_mci.h
-===================================================================
---- linux-2.6.22.1/include/asm-arm/arch-at91/at91_mci.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-arm/arch-at91/at91_mci.h	(arbetskopia)
-@@ -26,6 +26,9 @@
- #define AT91_MCI_MR		0x04		/* Mode Register */
- #define		AT91_MCI_CLKDIV		(0xff  <<  0)	/* Clock Divider */
- #define		AT91_MCI_PWSDIV		(7     <<  8)	/* Power Saving Divider */
-+#define		AT91_MCI_RDPROOF	(1     << 11)	/* Read Proof Enable [SAM926[03] only] */
-+#define		AT91_MCI_WRPROOF	(1     << 12)	/* Write Proof Enable [SAM926[03] only] */
-+#define		AT91_MCI_PDCFBYTE	(1     << 13)	/* PDC Force Byte Transfer [SAM926[03] only] */
- #define		AT91_MCI_PDCPADV	(1     << 14)	/* PDC Padding Value */
- #define		AT91_MCI_PDCMODE	(1     << 15)	/* PDC-orientated Mode */
- #define		AT91_MCI_BLKLEN		(0xfff << 18)	/* Data Block Length */
-Index: linux-2.6.22.1/include/asm-arm/arch-at91/at91_pmc.h
-===================================================================
---- linux-2.6.22.1/include/asm-arm/arch-at91/at91_pmc.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-arm/arch-at91/at91_pmc.h	(arbetskopia)
-@@ -37,7 +37,9 @@
- #define	AT91_PMC_PCDR		(AT91_PMC + 0x14)	/* Peripheral Clock Disable Register */
- #define	AT91_PMC_PCSR		(AT91_PMC + 0x18)	/* Peripheral Clock Status Register */
- 
--#define	AT91_CKGR_MOR		(AT91_PMC + 0x20)	/* Main Oscillator Register */
-+#define AT91_CKGR_UCKR		(AT91_PMC + 0x1C)	/* UTMI Clock Register [SAM9RL only] */
-+
-+#define	AT91_CKGR_MOR		(AT91_PMC + 0x20)	/* Main Oscillator Register [not on SAM9RL] */
- #define		AT91_PMC_MOSCEN		(1    << 0)		/* Main Oscillator Enable */
- #define		AT91_PMC_OSCBYPASS	(1    << 1)		/* Oscillator Bypass [AT91SAM926x only] */
- #define		AT91_PMC_OSCOUNT	(0xff << 8)		/* Main Oscillator Start-up Time */
-Index: linux-2.6.22.1/include/asm-arm/arch-at91/board.h
-===================================================================
---- linux-2.6.22.1/include/asm-arm/arch-at91/board.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-arm/arch-at91/board.h	(arbetskopia)
-@@ -64,6 +64,7 @@
- 
-  /* Ethernet (EMAC & MACB) */
- struct at91_eth_data {
-+	u32		phy_mask;
- 	u8		phy_irq_pin;	/* PHY IRQ */
- 	u8		is_rmii;	/* using RMII interface? */
- };
-@@ -124,9 +125,21 @@
- };
- extern void __init at91_add_device_ac97(struct atmel_ac97_data *data);
- 
-+ /* ISI */
-+extern void __init at91_add_device_isi(void);
-+
-  /* LEDs */
- extern u8 at91_leds_cpu;
- extern u8 at91_leds_timer;
- extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
- 
-+struct at91_gpio_led {
-+	u8		index;		/* index of LED */
-+	char*		name;		/* name of LED */
-+	u8		gpio;		/* AT91_PIN_xx */
-+	u8		flags;		/* 1=active-high */
-+	char*		trigger;	/* default trigger */
-+};
-+extern void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr);
-+
- #endif
-Index: linux-2.6.22.1/include/linux/spi/at73c213.h
-===================================================================
---- linux-2.6.22.1/include/linux/spi/at73c213.h	(revision 0)
-+++ linux-2.6.22.1/include/linux/spi/at73c213.h	(revision 0)
-@@ -0,0 +1,25 @@
-+/*
-+ * Board-specific data used to set up AT73c213 audio DAC driver.
-+ */
-+
-+#ifndef __LINUX_SPI_AT73C213_H
-+#define __LINUX_SPI_AT73C213_H
-+
-+/**
-+ * at73c213_board_info - how the external DAC is wired to the device.
-+ *
-+ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio.
-+ * @dac_clk: the external clock used to provide master clock to the DAC.
-+ * @shortname: a short discription for the DAC, seen by userspace tools.
-+ *
-+ * This struct contains the configuration of the hardware connection to the
-+ * external DAC. The DAC needs a master clock and a I2S audio stream. It also
-+ * provides a name which is used to identify it in userspace tools.
-+ */
-+struct at73c213_board_info {
-+	int		ssc_id;
-+	struct clk	*dac_clk;
-+	char		shortname[32];
-+};
-+
-+#endif /* __LINUX_SPI_AT73C213_H */
-Index: linux-2.6.22.1/include/linux/leds.h
-===================================================================
---- linux-2.6.22.1/include/linux/leds.h	(revision 1)
-+++ linux-2.6.22.1/include/linux/leds.h	(arbetskopia)
-@@ -110,4 +110,18 @@
- #define ledtrig_ide_activity() do {} while(0)
- #endif
- 
-+/* For the leds-gpio driver */
-+struct gpio_led {
-+	const char *name;
-+	char *default_trigger;
-+	unsigned 	gpio;
-+	u8 		active_low;
-+};
-+
-+struct gpio_led_platform_data {
-+	int 		num_leds;
-+	struct gpio_led *leds;
-+};
-+
-+
- #endif		/* __LINUX_LEDS_H_INCLUDED */
-Index: linux-2.6.22.1/include/linux/clk.h
-===================================================================
---- linux-2.6.22.1/include/linux/clk.h	(revision 1)
-+++ linux-2.6.22.1/include/linux/clk.h	(arbetskopia)
-@@ -121,4 +121,24 @@
-  */
- struct clk *clk_get_parent(struct clk *clk);
- 
-+/**
-+ * clk_must_disable - report whether a clock's users must disable it
-+ * @clk: one node in the clock tree
-+ *
-+ * This routine returns true only if the upcoming system state requires
-+ * disabling the specified clock.
-+ *
-+ * It's common for platform power states to constrain certain clocks (and
-+ * their descendants) to be unavailable, while other states allow that
-+ * clock to be active.  A platform's power states often include an "all on"
-+ * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and
-+ * operating states which sacrifice functionality for lower power usage.
-+ *
-+ * The constraint value is commonly tested in device driver suspend(), to
-+ * leave clocks active if they are needed for features like wakeup events.
-+ * On platforms that support reduced functionality operating states, the
-+ * constraint may also need to be tested during resume() and probe() calls.
-+ */
-+int clk_must_disable(struct clk *clk);
-+
- #endif
-Index: linux-2.6.22.1/include/linux/usb/Kbuild
-===================================================================
---- linux-2.6.22.1/include/linux/usb/Kbuild	(revision 1)
-+++ linux-2.6.22.1/include/linux/usb/Kbuild	(arbetskopia)
-@@ -1,5 +1,6 @@
- unifdef-y += audio.h
- unifdef-y += cdc.h
- unifdef-y += ch9.h
-+unifdef-y += gadgetfs.h
- unifdef-y += midi.h
- 
-Index: linux-2.6.22.1/include/linux/usb/gadgetfs.h
-===================================================================
---- linux-2.6.22.1/include/linux/usb/gadgetfs.h	(revision 0)
-+++ linux-2.6.22.1/include/linux/usb/gadgetfs.h	(revision 0)
-@@ -0,0 +1,81 @@
-+#ifndef __LINUX_USB_GADGETFS_H
-+#define __LINUX_USB_GADGETFS_H
-+
-+#include <asm/types.h>
-+#include <asm/ioctl.h>
-+
-+#include <linux/usb/ch9.h>
-+
-+/*
-+ * Filesystem based user-mode API to USB Gadget controller hardware
-+ *
-+ * Other than ep0 operations, most things are done by read() and write()
-+ * on endpoint files found in one directory.  They are configured by
-+ * writing descriptors, and then may be used for normal stream style
-+ * i/o requests.  When ep0 is configured, the device can enumerate;
-+ * when it's closed, the device disconnects from usb.  Operations on
-+ * ep0 require ioctl() operations.
-+ *
-+ * Configuration and device descriptors get written to /dev/gadget/$CHIP,
-+ * which may then be used to read usb_gadgetfs_event structs.  The driver
-+ * may activate endpoints as it handles SET_CONFIGURATION setup events,
-+ * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT
-+ * then performing data transfers by reading or writing.
-+ */
-+
-+/*
-+ * Events are delivered on the ep0 file descriptor, when the user mode driver
-+ * reads from this file descriptor after writing the descriptors.  Don't
-+ * stop polling this descriptor.
-+ */
-+
-+enum usb_gadgetfs_event_type {
-+	GADGETFS_NOP = 0,
-+
-+	GADGETFS_CONNECT,
-+	GADGETFS_DISCONNECT,
-+	GADGETFS_SETUP,
-+	GADGETFS_SUSPEND,
-+	// and likely more !
-+};
-+
-+/* NOTE:  this structure must stay the same size and layout on
-+ * both 32-bit and 64-bit kernels.
-+ */
-+struct usb_gadgetfs_event {
-+	union {
-+		// NOP, DISCONNECT, SUSPEND: nothing
-+		// ... some hardware can't report disconnection
-+
-+		// CONNECT: just the speed
-+		enum usb_device_speed	speed;
-+
-+		// SETUP: packet; DATA phase i/o precedes next event
-+		// (setup.bmRequestType & USB_DIR_IN) flags direction
-+		// ... includes SET_CONFIGURATION, SET_INTERFACE
-+		struct usb_ctrlrequest	setup;
-+	} u;
-+	enum usb_gadgetfs_event_type	type;
-+};
-+
-+
-+/* endpoint ioctls */
-+
-+/* IN transfers may be reported to the gadget driver as complete
-+ *	when the fifo is loaded, before the host reads the data;
-+ * OUT transfers may be reported to the host's "client" driver as
-+ *	complete when they're sitting in the FIFO unread.
-+ * THIS returns how many bytes are "unclaimed" in the endpoint fifo
-+ * (needed for precise fault handling, when the hardware allows it)
-+ */
-+#define	GADGETFS_FIFO_STATUS	_IO('g',1)
-+
-+/* discards any unclaimed data in the fifo. */
-+#define	GADGETFS_FIFO_FLUSH	_IO('g',2)
-+
-+/* resets endpoint halt+toggle; used to implement set_interface.
-+ * some hardware (like pxa2xx) can't support this.
-+ */
-+#define	GADGETFS_CLEAR_HALT	_IO('g',3)
-+
-+#endif /* __LINUX_USB_GADGETFS_H */
-Index: linux-2.6.22.1/include/linux/usb_gadgetfs.h
-===================================================================
---- linux-2.6.22.1/include/linux/usb_gadgetfs.h	(revision 1)
-+++ linux-2.6.22.1/include/linux/usb_gadgetfs.h	(arbetskopia)
-@@ -1,75 +0,0 @@
--
--#include <asm/types.h>
--#include <asm/ioctl.h>
--
--#include <linux/usb/ch9.h>
--
--/*
-- * Filesystem based user-mode API to USB Gadget controller hardware
-- *
-- * Almost everything can be done with only read and write operations,
-- * on endpoint files found in one directory.  They are configured by
-- * writing descriptors, and then may be used for normal stream style
-- * i/o requests.  When ep0 is configured, the device can enumerate;
-- * when it's closed, the device disconnects from usb.
-- *
-- * Configuration and device descriptors get written to /dev/gadget/$CHIP,
-- * which may then be used to read usb_gadgetfs_event structs.  The driver
-- * may activate endpoints as it handles SET_CONFIGURATION setup events,
-- * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT
-- * then performing data transfers by reading or writing.
-- */
--
--/*
-- * Events are delivered on the ep0 file descriptor, if the user mode driver
-- * reads from this file descriptor after writing the descriptors.  Don't
-- * stop polling this descriptor, if you write that kind of driver.
-- */
--
--enum usb_gadgetfs_event_type {
--	GADGETFS_NOP = 0,
--
--	GADGETFS_CONNECT,
--	GADGETFS_DISCONNECT,
--	GADGETFS_SETUP,
--	GADGETFS_SUSPEND,
--	// and likely more !
--};
--
--struct usb_gadgetfs_event {
--	enum usb_gadgetfs_event_type	type;
--	union {
--		// NOP, DISCONNECT, SUSPEND: nothing
--		// ... some hardware can't report disconnection
--
--		// CONNECT: just the speed
--		enum usb_device_speed	speed;
--
--		// SETUP: packet; DATA phase i/o precedes next event
--		// (setup.bmRequestType & USB_DIR_IN) flags direction 
--		// ... includes SET_CONFIGURATION, SET_INTERFACE
--		struct usb_ctrlrequest	setup;
--	} u;
--};
--
--
--/* endpoint ioctls */
--
--/* IN transfers may be reported to the gadget driver as complete
-- * 	when the fifo is loaded, before the host reads the data;
-- * OUT transfers may be reported to the host's "client" driver as
-- * 	complete when they're sitting in the FIFO unread.
-- * THIS returns how many bytes are "unclaimed" in the endpoint fifo
-- * (needed for precise fault handling, when the hardware allows it)
-- */
--#define	GADGETFS_FIFO_STATUS	_IO('g',1)
--
--/* discards any unclaimed data in the fifo. */
--#define	GADGETFS_FIFO_FLUSH	_IO('g',2)
--
--/* resets endpoint halt+toggle; used to implement set_interface.
-- * some hardware (like pxa2xx) can't support this.
-- */
--#define	GADGETFS_CLEAR_HALT	_IO('g',3)
--
--
-Index: linux-2.6.22.1/include/linux/atmel-ssc.h
-===================================================================
---- linux-2.6.22.1/include/linux/atmel-ssc.h	(revision 0)
-+++ linux-2.6.22.1/include/linux/atmel-ssc.h	(revision 0)
-@@ -0,0 +1,312 @@
-+#ifndef __INCLUDE_ATMEL_SSC_H
-+#define __INCLUDE_ATMEL_SSC_H
-+
-+#include <linux/platform_device.h>
-+#include <linux/list.h>
-+
-+struct ssc_device {
-+	struct list_head	list;
-+	void __iomem		*regs;
-+	struct platform_device	*pdev;
-+	struct clk		*clk;
-+	int			user;
-+	int			irq;
-+};
-+
-+struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
-+void ssc_free(struct ssc_device *ssc);
-+
-+/* SSC register offsets */
-+
-+/* SSC Control Register */
-+#define SSC_CR				0x00000000
-+#define SSC_CR_RXDIS_SIZE			 1
-+#define SSC_CR_RXDIS_OFFSET			 1
-+#define SSC_CR_RXEN_SIZE			 1
-+#define SSC_CR_RXEN_OFFSET			 0
-+#define SSC_CR_SWRST_SIZE			 1
-+#define SSC_CR_SWRST_OFFSET			15
-+#define SSC_CR_TXDIS_SIZE			 1
-+#define SSC_CR_TXDIS_OFFSET			 9
-+#define SSC_CR_TXEN_SIZE			 1
-+#define SSC_CR_TXEN_OFFSET			 8
-+
-+/* SSC Clock Mode Register */
-+#define SSC_CMR				0x00000004
-+#define SSC_CMR_DIV_SIZE			12
-+#define SSC_CMR_DIV_OFFSET			 0
-+
-+/* SSC Receive Clock Mode Register */
-+#define SSC_RCMR			0x00000010
-+#define SSC_RCMR_CKG_SIZE			 2
-+#define SSC_RCMR_CKG_OFFSET			 6
-+#define SSC_RCMR_CKI_SIZE			 1
-+#define SSC_RCMR_CKI_OFFSET			 5
-+#define SSC_RCMR_CKO_SIZE			 3
-+#define SSC_RCMR_CKO_OFFSET			 2
-+#define SSC_RCMR_CKS_SIZE			 2
-+#define SSC_RCMR_CKS_OFFSET			 0
-+#define SSC_RCMR_PERIOD_SIZE			 8
-+#define SSC_RCMR_PERIOD_OFFSET			24
-+#define SSC_RCMR_START_SIZE			 4
-+#define SSC_RCMR_START_OFFSET			 8
-+#define SSC_RCMR_STOP_SIZE			 1
-+#define SSC_RCMR_STOP_OFFSET			12
-+#define SSC_RCMR_STTDLY_SIZE			 8
-+#define SSC_RCMR_STTDLY_OFFSET			16
-+
-+/* SSC Receive Frame Mode Register */
-+#define SSC_RFMR			0x00000014
-+#define SSC_RFMR_DATLEN_SIZE			 5
-+#define SSC_RFMR_DATLEN_OFFSET			 0
-+#define SSC_RFMR_DATNB_SIZE			 4
-+#define SSC_RFMR_DATNB_OFFSET			 8
-+#define SSC_RFMR_FSEDGE_SIZE			 1
-+#define SSC_RFMR_FSEDGE_OFFSET			24
-+#define SSC_RFMR_FSLEN_SIZE			 4
-+#define SSC_RFMR_FSLEN_OFFSET			16
-+#define SSC_RFMR_FSOS_SIZE			 4
-+#define SSC_RFMR_FSOS_OFFSET			20
-+#define SSC_RFMR_LOOP_SIZE			 1
-+#define SSC_RFMR_LOOP_OFFSET			 5
-+#define SSC_RFMR_MSBF_SIZE			 1
-+#define SSC_RFMR_MSBF_OFFSET			 7
-+
-+/* SSC Transmit Clock Mode Register */
-+#define SSC_TCMR			0x00000018
-+#define SSC_TCMR_CKG_SIZE			 2
-+#define SSC_TCMR_CKG_OFFSET			 6
-+#define SSC_TCMR_CKI_SIZE			 1
-+#define SSC_TCMR_CKI_OFFSET			 5
-+#define SSC_TCMR_CKO_SIZE			 3
-+#define SSC_TCMR_CKO_OFFSET			 2
-+#define SSC_TCMR_CKS_SIZE			 2
-+#define SSC_TCMR_CKS_OFFSET			 0
-+#define SSC_TCMR_PERIOD_SIZE			 8
-+#define SSC_TCMR_PERIOD_OFFSET			24
-+#define SSC_TCMR_START_SIZE			 4
-+#define SSC_TCMR_START_OFFSET			 8
-+#define SSC_TCMR_STTDLY_SIZE			 8
-+#define SSC_TCMR_STTDLY_OFFSET			16
-+
-+/* SSC Transmit Frame Mode Register */
-+#define SSC_TFMR			0x0000001c
-+#define SSC_TFMR_DATDEF_SIZE			 1
-+#define SSC_TFMR_DATDEF_OFFSET			 5
-+#define SSC_TFMR_DATLEN_SIZE			 5
-+#define SSC_TFMR_DATLEN_OFFSET			 0
-+#define SSC_TFMR_DATNB_SIZE			 4
-+#define SSC_TFMR_DATNB_OFFSET			 8
-+#define SSC_TFMR_FSDEN_SIZE			 1
-+#define SSC_TFMR_FSDEN_OFFSET			23
-+#define SSC_TFMR_FSEDGE_SIZE			 1
-+#define SSC_TFMR_FSEDGE_OFFSET			24
-+#define SSC_TFMR_FSLEN_SIZE			 4
-+#define SSC_TFMR_FSLEN_OFFSET			16
-+#define SSC_TFMR_FSOS_SIZE			 3
-+#define SSC_TFMR_FSOS_OFFSET			20
-+#define SSC_TFMR_MSBF_SIZE			 1
-+#define SSC_TFMR_MSBF_OFFSET			 7
-+
-+/* SSC Receive Hold Register */
-+#define SSC_RHR				0x00000020
-+#define SSC_RHR_RDAT_SIZE			32
-+#define SSC_RHR_RDAT_OFFSET			 0
-+
-+/* SSC Transmit Hold Register */
-+#define SSC_THR				0x00000024
-+#define SSC_THR_TDAT_SIZE			32
-+#define SSC_THR_TDAT_OFFSET			 0
-+
-+/* SSC Receive Sync. Holding Register */
-+#define SSC_RSHR			0x00000030
-+#define SSC_RSHR_RSDAT_SIZE			16
-+#define SSC_RSHR_RSDAT_OFFSET			 0
-+
-+/* SSC Transmit Sync. Holding Register */
-+#define SSC_TSHR			0x00000034
-+#define SSC_TSHR_TSDAT_SIZE			16
-+#define SSC_TSHR_RSDAT_OFFSET			 0
-+
-+/* SSC Receive Compare 0 Register */
-+#define SSC_RC0R			0x00000038
-+#define SSC_RC0R_CP0_SIZE			16
-+#define SSC_RC0R_CP0_OFFSET			 0
-+
-+/* SSC Receive Compare 1 Register */
-+#define SSC_RC1R			0x0000003c
-+#define SSC_RC1R_CP1_SIZE			16
-+#define SSC_RC1R_CP1_OFFSET			 0
-+
-+/* SSC Status Register */
-+#define SSC_SR				0x00000040
-+#define SSC_SR_CP0_SIZE				 1
-+#define SSC_SR_CP0_OFFSET			 8
-+#define SSC_SR_CP1_SIZE				 1
-+#define SSC_SR_CP1_OFFSET			 9
-+#define SSC_SR_ENDRX_SIZE			 1
-+#define SSC_SR_ENDRX_OFFSET			 6
-+#define SSC_SR_ENDTX_SIZE			 1
-+#define SSC_SR_ENDTX_OFFSET			 2
-+#define SSC_SR_OVRUN_SIZE			 1
-+#define SSC_SR_OVRUN_OFFSET			 5
-+#define SSC_SR_RXBUFF_SIZE			 1
-+#define SSC_SR_RXBUFF_OFFSET			 7
-+#define SSC_SR_RXEN_SIZE			 1
-+#define SSC_SR_RXEN_OFFSET			17
-+#define SSC_SR_RXRDY_SIZE			 1
-+#define SSC_SR_RXRDY_OFFSET			 4
-+#define SSC_SR_RXSYN_SIZE			 1
-+#define SSC_SR_RXSYN_OFFSET			11
-+#define SSC_SR_TXBUFE_SIZE			 1
-+#define SSC_SR_TXBUFE_OFFSET			 3
-+#define SSC_SR_TXEMPTY_SIZE			 1
-+#define SSC_SR_TXEMPTY_OFFSET			 1
-+#define SSC_SR_TXEN_SIZE			 1
-+#define SSC_SR_TXEN_OFFSET			16
-+#define SSC_SR_TXRDY_SIZE			 1
-+#define SSC_SR_TXRDY_OFFSET			 0
-+#define SSC_SR_TXSYN_SIZE			 1
-+#define SSC_SR_TXSYN_OFFSET			10
-+
-+/* SSC Interrupt Enable Register */
-+#define SSC_IER				0x00000044
-+#define SSC_IER_CP0_SIZE			 1
-+#define SSC_IER_CP0_OFFSET			 8
-+#define SSC_IER_CP1_SIZE			 1
-+#define SSC_IER_CP1_OFFSET			 9
-+#define SSC_IER_ENDRX_SIZE			 1
-+#define SSC_IER_ENDRX_OFFSET			 6
-+#define SSC_IER_ENDTX_SIZE			 1
-+#define SSC_IER_ENDTX_OFFSET			 2
-+#define SSC_IER_OVRUN_SIZE			 1
-+#define SSC_IER_OVRUN_OFFSET			 5
-+#define SSC_IER_RXBUFF_SIZE			 1
-+#define SSC_IER_RXBUFF_OFFSET			 7
-+#define SSC_IER_RXRDY_SIZE			 1
-+#define SSC_IER_RXRDY_OFFSET			 4
-+#define SSC_IER_RXSYN_SIZE			 1
-+#define SSC_IER_RXSYN_OFFSET			11
-+#define SSC_IER_TXBUFE_SIZE			 1
-+#define SSC_IER_TXBUFE_OFFSET			 3
-+#define SSC_IER_TXEMPTY_SIZE			 1
-+#define SSC_IER_TXEMPTY_OFFSET			 1
-+#define SSC_IER_TXRDY_SIZE			 1
-+#define SSC_IER_TXRDY_OFFSET			 0
-+#define SSC_IER_TXSYN_SIZE			 1
-+#define SSC_IER_TXSYN_OFFSET			10
-+
-+/* SSC Interrupt Disable Register */
-+#define SSC_IDR				0x00000048
-+#define SSC_IDR_CP0_SIZE			 1
-+#define SSC_IDR_CP0_OFFSET			 8
-+#define SSC_IDR_CP1_SIZE			 1
-+#define SSC_IDR_CP1_OFFSET			 9
-+#define SSC_IDR_ENDRX_SIZE			 1
-+#define SSC_IDR_ENDRX_OFFSET			 6
-+#define SSC_IDR_ENDTX_SIZE			 1
-+#define SSC_IDR_ENDTX_OFFSET			 2
-+#define SSC_IDR_OVRUN_SIZE			 1
-+#define SSC_IDR_OVRUN_OFFSET			 5
-+#define SSC_IDR_RXBUFF_SIZE			 1
-+#define SSC_IDR_RXBUFF_OFFSET			 7
-+#define SSC_IDR_RXRDY_SIZE			 1
-+#define SSC_IDR_RXRDY_OFFSET			 4
-+#define SSC_IDR_RXSYN_SIZE			 1
-+#define SSC_IDR_RXSYN_OFFSET			11
-+#define SSC_IDR_TXBUFE_SIZE			 1
-+#define SSC_IDR_TXBUFE_OFFSET			 3
-+#define SSC_IDR_TXEMPTY_SIZE			 1
-+#define SSC_IDR_TXEMPTY_OFFSET			 1
-+#define SSC_IDR_TXRDY_SIZE			 1
-+#define SSC_IDR_TXRDY_OFFSET			 0
-+#define SSC_IDR_TXSYN_SIZE			 1
-+#define SSC_IDR_TXSYN_OFFSET			10
-+
-+/* SSC Interrupt Mask Register */
-+#define SSC_IMR				0x0000004c
-+#define SSC_IMR_CP0_SIZE			 1
-+#define SSC_IMR_CP0_OFFSET			 8
-+#define SSC_IMR_CP1_SIZE			 1
-+#define SSC_IMR_CP1_OFFSET			 9
-+#define SSC_IMR_ENDRX_SIZE			 1
-+#define SSC_IMR_ENDRX_OFFSET			 6
-+#define SSC_IMR_ENDTX_SIZE			 1
-+#define SSC_IMR_ENDTX_OFFSET			 2
-+#define SSC_IMR_OVRUN_SIZE			 1
-+#define SSC_IMR_OVRUN_OFFSET			 5
-+#define SSC_IMR_RXBUFF_SIZE			 1
-+#define SSC_IMR_RXBUFF_OFFSET			 7
-+#define SSC_IMR_RXRDY_SIZE			 1
-+#define SSC_IMR_RXRDY_OFFSET			 4
-+#define SSC_IMR_RXSYN_SIZE			 1
-+#define SSC_IMR_RXSYN_OFFSET			11
-+#define SSC_IMR_TXBUFE_SIZE			 1
-+#define SSC_IMR_TXBUFE_OFFSET			 3
-+#define SSC_IMR_TXEMPTY_SIZE			 1
-+#define SSC_IMR_TXEMPTY_OFFSET			 1
-+#define SSC_IMR_TXRDY_SIZE			 1
-+#define SSC_IMR_TXRDY_OFFSET			 0
-+#define SSC_IMR_TXSYN_SIZE			 1
-+#define SSC_IMR_TXSYN_OFFSET			10
-+
-+/* SSC PDC Receive Pointer Register */
-+#define SSC_PDC_RPR			0x00000100
-+
-+/* SSC PDC Receive Counter Register */
-+#define SSC_PDC_RCR			0x00000104
-+
-+/* SSC PDC Transmit Pointer Register */
-+#define SSC_PDC_TPR			0x00000108
-+
-+/* SSC PDC Receive Next Pointer Register */
-+#define SSC_PDC_RNPR			0x00000110
-+
-+/* SSC PDC Receive Next Counter Register */
-+#define SSC_PDC_RNCR			0x00000114
-+
-+/* SSC PDC Transmit Counter Register */
-+#define SSC_PDC_TCR			0x0000010c
-+
-+/* SSC PDC Transmit Next Pointer Register */
-+#define SSC_PDC_TNPR			0x00000118
-+
-+/* SSC PDC Transmit Next Counter Register */
-+#define SSC_PDC_TNCR			0x0000011c
-+
-+/* SSC PDC Transfer Control Register */
-+#define SSC_PDC_PTCR			0x00000120
-+#define SSC_PDC_PTCR_RXTDIS_SIZE		 1
-+#define SSC_PDC_PTCR_RXTDIS_OFFSET		 1
-+#define SSC_PDC_PTCR_RXTEN_SIZE			 1
-+#define SSC_PDC_PTCR_RXTEN_OFFSET		 0
-+#define SSC_PDC_PTCR_TXTDIS_SIZE		 1
-+#define SSC_PDC_PTCR_TXTDIS_OFFSET		 9
-+#define SSC_PDC_PTCR_TXTEN_SIZE			 1
-+#define SSC_PDC_PTCR_TXTEN_OFFSET		 8
-+
-+/* SSC PDC Transfer Status Register */
-+#define SSC_PDC_PTSR			0x00000124
-+#define SSC_PDC_PTSR_RXTEN_SIZE			 1
-+#define SSC_PDC_PTSR_RXTEN_OFFSET		 0
-+#define SSC_PDC_PTSR_TXTEN_SIZE			 1
-+#define SSC_PDC_PTSR_TXTEN_OFFSET		 8
-+
-+/* Bit manipulation macros */
-+#define SSC_BIT(name)					\
-+	(1 << SSC_##name##_OFFSET)
-+#define SSC_BF(name, value)				\
-+	(((value) & ((1 << SSC_##name##_SIZE) - 1))	\
-+	 << SSC_##name##_OFFSET)
-+#define SSC_BFEXT(name, value)				\
-+	(((value) >> SSC_##name##_OFFSET)		\
-+	 & ((1 << SSC_##name##_SIZE) - 1))
-+#define SSC_BFINS(name, value, old)			\
-+	(((old) & ~(((1 << SSC_##name##_SIZE) - 1)	\
-+	<< SSC_##name##_OFFSET)) | SSC_BF(name, value))
-+
-+/* Register access macros */
-+#define ssc_readl(base, reg)		__raw_readl(base + SSC_##reg)
-+#define ssc_writel(base, reg, value)	__raw_writel((value), base + SSC_##reg)
-+
-+#endif /* __INCLUDE_ATMEL_SSC_H */
-Index: linux-2.6.22.1/include/linux/gpio_mouse.h
-===================================================================
---- linux-2.6.22.1/include/linux/gpio_mouse.h	(revision 0)
-+++ linux-2.6.22.1/include/linux/gpio_mouse.h	(revision 0)
-@@ -0,0 +1,61 @@
-+/*
-+ * Driver for simulating a mouse on GPIO lines.
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef _GPIO_MOUSE_H
-+#define _GPIO_MOUSE_H
-+
-+#define GPIO_MOUSE_POLARITY_ACT_HIGH	0x00
-+#define GPIO_MOUSE_POLARITY_ACT_LOW	0x01
-+
-+#define GPIO_MOUSE_PIN_UP	0
-+#define GPIO_MOUSE_PIN_DOWN	1
-+#define GPIO_MOUSE_PIN_LEFT	2
-+#define GPIO_MOUSE_PIN_RIGHT	3
-+#define GPIO_MOUSE_PIN_BLEFT	4
-+#define GPIO_MOUSE_PIN_BMIDDLE	5
-+#define GPIO_MOUSE_PIN_BRIGHT	6
-+#define GPIO_MOUSE_PIN_MAX	7
-+
-+/**
-+ * struct gpio_mouse_platform_data
-+ * @scan_ms: integer in ms specifying the scan periode.
-+ * @polarity: Pin polarity, active high or low.
-+ * @up: GPIO line for up value.
-+ * @down: GPIO line for down value.
-+ * @left: GPIO line for left value.
-+ * @right: GPIO line for right value.
-+ * @bleft: GPIO line for left button.
-+ * @bmiddle: GPIO line for middle button.
-+ * @bright: GPIO line for right button.
-+ *
-+ * This struct must be added to the platform_device in the board code.
-+ * It is used by the gpio_mouse driver to setup GPIO lines and to
-+ * calculate mouse movement.
-+ */
-+struct gpio_mouse_platform_data {
-+	int scan_ms;
-+	int polarity;
-+
-+	union {
-+		struct {
-+			int up;
-+			int down;
-+			int left;
-+			int right;
-+
-+			int bleft;
-+			int bmiddle;
-+			int bright;
-+		};
-+		int pins[GPIO_MOUSE_PIN_MAX];
-+	};
-+};
-+
-+#endif /* _GPIO_MOUSE_H */
-Index: linux-2.6.22.1/include/linux/i2c-id.h
-===================================================================
---- linux-2.6.22.1/include/linux/i2c-id.h	(revision 1)
-+++ linux-2.6.22.1/include/linux/i2c-id.h	(arbetskopia)
-@@ -203,6 +203,7 @@
- 
- /* --- PCA 9564 based algorithms */
- #define I2C_HW_A_ISA		0x1a0000 /* generic ISA Bus interface card */
-+#define I2C_HW_A_PLAT		0x1a0001 /* generic platform_bus interface */
- 
- /* --- ACPI Embedded controller algorithms                              */
- #define I2C_HW_ACPI_EC          0x1f0000
-Index: linux-2.6.22.1/include/asm-avr32/unaligned.h
-===================================================================
---- linux-2.6.22.1/include/asm-avr32/unaligned.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-avr32/unaligned.h	(arbetskopia)
-@@ -7,19 +7,10 @@
-  * words, but halfwords must be halfword-aligned, and doublewords must
-  * be word-aligned.
-  *
-- * TODO: Make all this CPU-specific and optimize.
-+ * However, swapped word loads must be word-aligned so we can't
-+ * optimize word loads in general.
-  */
- 
--#include <linux/string.h>
-+#include <asm-generic/unaligned.h>
- 
--/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
--
--#define get_unaligned(ptr) \
--  ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
--
--#define put_unaligned(val, ptr)				\
--  ({ __typeof__(*(ptr)) __tmp = (val);			\
--     memmove((ptr), &__tmp, sizeof(*(ptr)));		\
--     (void)0; })
--
- #endif /* __ASM_AVR32_UNALIGNED_H */
-Index: linux-2.6.22.1/include/asm-avr32/atomic.h
-===================================================================
---- linux-2.6.22.1/include/asm-avr32/atomic.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-avr32/atomic.h	(arbetskopia)
-@@ -101,7 +101,7 @@
- 		"	mov	%1, 1\n"
- 		"1:"
- 		: "=&r"(tmp), "=&r"(result), "=o"(v->counter)
--		: "m"(v->counter), "rKs21"(a), "rKs21"(u)
-+		: "m"(v->counter), "rKs21"(a), "rKs21"(u), "1"(result)
- 		: "cc", "memory");
- 
- 	return result;
-@@ -137,7 +137,7 @@
- 			"	mov	%1, 1\n"
- 			"1:"
- 			: "=&r"(tmp), "=&r"(result), "=o"(v->counter)
--			: "m"(v->counter), "r"(a), "ir"(u)
-+			: "m"(v->counter), "r"(a), "ir"(u), "1"(result)
- 			: "cc", "memory");
- 	}
- 
-Index: linux-2.6.22.1/include/asm-avr32/dma-controller.h
-===================================================================
---- linux-2.6.22.1/include/asm-avr32/dma-controller.h	(revision 0)
-+++ linux-2.6.22.1/include/asm-avr32/dma-controller.h	(revision 0)
-@@ -0,0 +1,166 @@
-+/*
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __ASM_AVR32_DMA_CONTROLLER_H
-+#define __ASM_AVR32_DMA_CONTROLLER_H
-+
-+#include <linux/device.h>
-+
-+#define DMA_DIR_MEM_TO_MEM		0x0000
-+#define DMA_DIR_MEM_TO_PERIPH		0x0001
-+#define DMA_DIR_PERIPH_TO_MEM		0x0002
-+#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
-+
-+#define DMA_WIDTH_8BIT			0
-+#define DMA_WIDTH_16BIT			1
-+#define DMA_WIDTH_32BIT			2
-+
-+struct dma_request {
-+	struct dma_controller *dmac;
-+	struct list_head list;
-+
-+	unsigned short channel;
-+
-+	void (*xfer_complete)(struct dma_request *req);
-+	void (*block_complete)(struct dma_request *req);
-+	void (*error)(struct dma_request *req);
-+};
-+
-+struct dma_request_sg {
-+	struct dma_request req;
-+
-+	int nr_sg;
-+	struct scatterlist *sg;
-+	unsigned long block_size;
-+	unsigned int nr_blocks;
-+
-+	dma_addr_t data_reg;
-+	unsigned short periph_id;
-+
-+	unsigned char direction;
-+	unsigned char width;
-+};
-+#define to_dma_request_sg(_req)				\
-+	container_of(_req, struct dma_request_sg, req)
-+
-+struct dma_request_cyclic {
-+	struct dma_request req;
-+
-+        int periods;
-+	unsigned long buffer_size;
-+
-+        dma_addr_t buffer_start;
-+	dma_addr_t data_reg;
-+
-+	unsigned short periph_id;
-+	unsigned char direction;
-+	unsigned char width;
-+
-+        void *dev_id;
-+};
-+#define to_dma_request_cyclic(_req)				\
-+	container_of(_req, struct dma_request_cyclic, req)
-+
-+struct dma_request_memcpy {
-+	struct dma_request req;
-+
-+	dma_addr_t src_addr;
-+	unsigned int src_width;
-+	unsigned int src_stride;
-+
-+	dma_addr_t dst_addr;
-+	unsigned int dst_width;
-+	unsigned int dst_stride;
-+
-+	size_t length;
-+
-+	unsigned short src_reverse:1;
-+	unsigned short dst_reverse:1;
-+};
-+#define to_dma_request_memcpy(_req)				\
-+	container_of(_req, struct dma_request_memcpy, req)
-+
-+struct dma_controller {
-+	struct list_head list;
-+	int id;
-+	struct device *dev;
-+
-+	int (*alloc_channel)(struct dma_controller *dmac);
-+	void (*release_channel)(struct dma_controller *dmac,
-+				int channel);
-+	int (*prepare_request_sg)(struct dma_controller *dmac,
-+				  struct dma_request_sg *req);
-+        int (*prepare_request_cyclic)(struct dma_controller *dmac,
-+				      struct dma_request_cyclic *req);
-+	int (*prepare_request_memcpy)(struct dma_controller *dmac,
-+				      struct dma_request_memcpy *req);
-+	int (*start_request)(struct dma_controller *dmac,
-+			     unsigned int channel);
-+	int (*stop_request)(struct dma_controller *dmac,
-+                            unsigned int channel);
-+        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
-+                                      unsigned int channel);
-+};
-+
-+static inline int
-+dma_alloc_channel(struct dma_controller *dmac)
-+{
-+	return dmac->alloc_channel(dmac);
-+}
-+
-+static inline void
-+dma_release_channel(struct dma_controller *dmac, int chan)
-+{
-+	dmac->release_channel(dmac, chan);
-+}
-+
-+static inline int
-+dma_prepare_request_sg(struct dma_controller *dmac,
-+		       struct dma_request_sg *req)
-+{
-+	return dmac->prepare_request_sg(dmac, req);
-+}
-+
-+static inline int
-+dma_prepare_request_cyclic(struct dma_controller *dmac,
-+			   struct dma_request_cyclic *req)
-+{
-+	return dmac->prepare_request_cyclic(dmac, req);
-+}
-+
-+static inline int
-+dma_prepare_request_memcpy(struct dma_controller *dmac,
-+			   struct dma_request_memcpy *req)
-+{
-+	return dmac->prepare_request_memcpy(dmac, req);
-+}
-+
-+static inline int
-+dma_start_request(struct dma_controller *dmac,
-+		  unsigned int channel)
-+{
-+	return dmac->start_request(dmac, channel);
-+}
-+
-+static inline int
-+dma_stop_request(struct dma_controller *dmac,
-+                 unsigned int channel)
-+{
-+	return dmac->stop_request(dmac, channel);
-+}
-+
-+static inline dma_addr_t
-+dma_get_current_pos(struct dma_controller *dmac,
-+                    unsigned int channel)
-+{
-+	return dmac->get_current_pos(dmac, channel);
-+}
-+
-+extern int register_dma_controller(struct dma_controller *dmac);
-+extern struct dma_controller *find_dma_controller(int id);
-+
-+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
-Index: linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h
-===================================================================
---- linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h	(arbetskopia)
-@@ -25,4 +25,16 @@
- void at32_select_gpio(unsigned int pin, unsigned long flags);
- void at32_reserve_pin(unsigned int pin);
- 
-+#ifdef CONFIG_GPIO_DEV
-+
-+/* Gang allocators and accessors; used by the GPIO /dev driver */
-+int at32_gpio_port_is_valid(unsigned int port);
-+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
-+void at32_deselect_pins(unsigned int port, u32 pins);
-+
-+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
-+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
-+
-+#endif /* CONFIG_GPIO_DEV */
-+
- #endif /* __ASM_ARCH_PORTMUX_H__ */
-Index: linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h
-===================================================================
---- linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h	(revision 1)
-+++ linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h	(arbetskopia)
-@@ -6,6 +6,8 @@
- 
- #include <linux/types.h>
- 
-+#define GPIO_PIN_NONE	(-1)
-+
- /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
- void at32_add_system_devices(void);
- 
-@@ -21,6 +23,7 @@
- struct platform_device *at32_add_device_usart(unsigned int id);
- 
- struct eth_platform_data {
-+	u32	phy_mask;
- 	u8	is_rmii;
- };
- struct platform_device *
-@@ -30,9 +33,41 @@
- struct platform_device *
- at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
- 
-+struct platform_device *at32_add_device_twi(unsigned int id);
-+
-+struct mci_platform_data {
-+	int detect_pin;
-+	int wp_pin;
-+};
-+struct platform_device *
-+at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
-+
-+struct usba_platform_data {
-+	int vbus_pin;
-+};
-+struct platform_device *
-+at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
-+
- struct atmel_lcdfb_info;
- struct platform_device *
- at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
- 		     unsigned long fbmem_start, unsigned long fbmem_len);
- 
-+struct platform_device *at32_add_device_ac97c(unsigned int id);
-+struct platform_device *at32_add_device_abdac(unsigned int id);
-+
-+/* depending on what's hooked up, not all SSC pins will be used */
-+#define	ATMEL_SSC_TK		0x01
-+#define	ATMEL_SSC_TF		0x02
-+#define	ATMEL_SSC_TD		0x04
-+#define	ATMEL_SSC_TX		(ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
-+
-+#define	ATMEL_SSC_RK		0x10
-+#define	ATMEL_SSC_RF		0x20
-+#define	ATMEL_SSC_RD		0x40
-+#define	ATMEL_SSC_RX		(ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
-+
-+struct platform_device *
-+at32_add_device_ssc(unsigned int id, unsigned int flags);
-+
- #endif /* __ASM_ARCH_BOARD_H */
-Index: linux-2.6.22.1/scripts/checkstack.pl
-===================================================================
---- linux-2.6.22.1/scripts/checkstack.pl	(revision 1)
-+++ linux-2.6.22.1/scripts/checkstack.pl	(arbetskopia)
-@@ -12,6 +12,7 @@
- #	sh64 port by Paul Mundt
- #	Random bits by Matt Mackall <mpm@selenic.com>
- #	M68k port by Geert Uytterhoeven and Andreas Schwab
-+#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
- #
- #	Usage:
- #	objdump -d vmlinux | stackcheck.pl [arch]
-@@ -37,6 +38,10 @@
- 	if ($arch eq 'arm') {
- 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
- 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
-+	} elsif ($arch eq 'avr32') {
-+		#8000008a:       20 1d           sub sp,4
-+		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
-+		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
- 	} elsif ($arch =~ /^i[3456]86$/) {
- 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
- 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
-Index: linux-2.6.22.1/sound/Kconfig
-===================================================================
---- linux-2.6.22.1/sound/Kconfig	(revision 1)
-+++ linux-2.6.22.1/sound/Kconfig	(arbetskopia)
-@@ -63,9 +63,13 @@
- 
- source "sound/arm/Kconfig"
- 
-+if SPI
-+source "sound/spi/Kconfig"
-+endif
-+
- source "sound/mips/Kconfig"
- 
--# the following will depend on the order of config.
-+# tee following will depend on the order of config.
- # here assuming USB is defined before ALSA
- source "sound/usb/Kconfig"
- 
-Index: linux-2.6.22.1/sound/soc/at91/eti_b1_wm8731.c
-===================================================================
---- linux-2.6.22.1/sound/soc/at91/eti_b1_wm8731.c	(revision 1)
-+++ linux-2.6.22.1/sound/soc/at91/eti_b1_wm8731.c	(arbetskopia)
-@@ -34,8 +34,7 @@
- #include <sound/soc.h>
- #include <sound/soc-dapm.h>
- 
--#include <asm/arch/hardware.h>
--#include <asm/arch/at91_pio.h>
-+#include <asm/hardware.h>
- #include <asm/arch/gpio.h>
- 
- #include "../codecs/wm8731.h"
-@@ -48,13 +47,6 @@
- #define	DBG(x...)
- #endif
- 
--#define AT91_PIO_TF1	(1 << (AT91_PIN_PB6 - PIN_BASE) % 32)
--#define AT91_PIO_TK1	(1 << (AT91_PIN_PB7 - PIN_BASE) % 32)
--#define AT91_PIO_TD1	(1 << (AT91_PIN_PB8 - PIN_BASE) % 32)
--#define AT91_PIO_RD1	(1 << (AT91_PIN_PB9 - PIN_BASE) % 32)
--#define AT91_PIO_RK1	(1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
--#define AT91_PIO_RF1	(1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
--
- static struct clk *pck1_clk;
- static struct clk *pllb_clk;
- 
-@@ -277,7 +269,6 @@
- static int __init eti_b1_init(void)
- {
- 	int ret;
--	u32 ssc_pio_lines;
- 	struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
- 
- 	if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
-@@ -311,20 +302,13 @@
- 		goto fail_io_unmap;
- 	}
- 
-- 	ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
--			| AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1;
-+ 	at91_set_A_periph(AT91_PIN_PB6, 0);	/* TF1 */
-+ 	at91_set_A_periph(AT91_PIN_PB7, 0);	/* TK1 */
-+ 	at91_set_A_periph(AT91_PIN_PB8, 0);	/* TD1 */
-+ 	at91_set_A_periph(AT91_PIN_PB9, 0);	/* RD1 */
-+/* 	at91_set_A_periph(AT91_PIN_PB10, 0);*/	/* RK1 */ 	
-+ 	at91_set_A_periph(AT91_PIN_PB11, 0);	/* RF1 */
- 
--	/* Reset all PIO registers and assign lines to peripheral A */
-- 	at91_sys_write(AT91_PIOB + PIO_PDR,  ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_ODR,  ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_IDR,  ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_ASR,  ssc_pio_lines);
-- 	at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines);
--
- 	/*
- 	 * Set PCK1 parent to PLLB and its rate to 12 Mhz.
- 	 */
-Index: linux-2.6.22.1/sound/spi/Kconfig
-===================================================================
---- linux-2.6.22.1/sound/spi/Kconfig	(revision 0)
-+++ linux-2.6.22.1/sound/spi/Kconfig	(revision 0)
-@@ -0,0 +1,31 @@
-+#SPI drivers
-+
-+menu "SPI devices"
-+	depends on SND != n
-+
-+config SND_AT73C213
-+	tristate "Atmel AT73C213 DAC driver"
-+	depends on ATMEL_SSC
-+	select SND_PCM
-+	help
-+	  Say Y here if you want to use the Atmel AT73C213 external DAC. This
-+	  DAC can be found on Atmel development boards.
-+
-+	  This driver requires the Atmel SSC driver for sound sink, a
-+	  peripheral found on most AT91 and AVR32 microprocessors.
-+
-+	  To compile this driver as a module, choose M here: the module will be
-+	  called snd-at73c213.
-+
-+config SND_AT73C213_TARGET_BITRATE
-+	int "Target bitrate for AT73C213"
-+	depends on SND_AT73C213
-+	default "48000"
-+	range 8000 50000
-+	help
-+	  Sets the target bitrate for the bitrate calculator in the driver.
-+	  Limited by hardware to be between 8000 Hz and 50000 Hz.
-+
-+	  Set to 48000 Hz by default.
-+
-+endmenu
-Index: linux-2.6.22.1/sound/spi/at73c213.c
-===================================================================
---- linux-2.6.22.1/sound/spi/at73c213.c	(revision 0)
-+++ linux-2.6.22.1/sound/spi/at73c213.c	(revision 0)
-@@ -0,0 +1,1121 @@
-+/*
-+ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
-+ *
-+ * Copyright (C) 2006-2007 Atmel Norway
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation.
-+ */
-+
-+/*#define DEBUG*/
-+
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/delay.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/io.h>
-+
-+#include <sound/driver.h>
-+#include <sound/initval.h>
-+#include <sound/control.h>
-+#include <sound/core.h>
-+#include <sound/pcm.h>
-+
-+#include <linux/atmel-ssc.h>
-+
-+#include <linux/spi/spi.h>
-+#include <linux/spi/at73c213.h>
-+
-+#include "at73c213.h"
-+
-+#define BITRATE_MIN	 8000 /* Hardware limit? */
-+#define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
-+#define BITRATE_MAX	50000 /* Hardware limit. */
-+
-+/* Initial (hardware reset) AT73C213 register values. */
-+static u8 snd_at73c213_original_image[18] =
-+{
-+	0x00,	/* 00 - CTRL    */
-+	0x05,	/* 01 - LLIG    */
-+	0x05,	/* 02 - RLIG    */
-+	0x08,	/* 03 - LPMG    */
-+	0x08,	/* 04 - RPMG    */
-+	0x00,	/* 05 - LLOG    */
-+	0x00,	/* 06 - RLOG    */
-+	0x22,	/* 07 - OLC     */
-+	0x09,	/* 08 - MC      */
-+	0x00,	/* 09 - CSFC    */
-+	0x00,	/* 0A - MISC    */
-+	0x00,	/* 0B -         */
-+	0x00,	/* 0C - PRECH   */
-+	0x05,	/* 0D - AUXG    */
-+	0x00,	/* 0E -         */
-+	0x00,	/* 0F -         */
-+	0x00,	/* 10 - RST     */
-+	0x00,	/* 11 - PA_CTRL */
-+};
-+
-+struct snd_at73c213 {
-+	struct snd_card			*card;
-+	struct snd_pcm			*pcm;
-+	struct snd_pcm_substream	*substream;
-+	struct at73c213_board_info	*board;
-+	int				irq;
-+	int				period;
-+	unsigned long			bitrate;
-+	struct clk			*bitclk;
-+	struct ssc_device		*ssc;
-+	struct spi_device		*spi;
-+	u8				spi_wbuffer[2];
-+	u8				spi_rbuffer[2];
-+	/* Image of the SPI registers in AT73C213. */
-+	u8				reg_image[18];
-+	/* Protect registers against concurrent access. */
-+	spinlock_t			lock;
-+};
-+
-+#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
-+
-+static int
-+snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
-+{
-+	struct spi_message msg;
-+	struct spi_transfer msg_xfer = {
-+		.len		= 2,
-+		.cs_change	= 0,
-+	};
-+	int retval;
-+
-+	spi_message_init(&msg);
-+
-+	chip->spi_wbuffer[0] = reg;
-+	chip->spi_wbuffer[1] = val;
-+
-+	msg_xfer.tx_buf = chip->spi_wbuffer;
-+	msg_xfer.rx_buf = chip->spi_rbuffer;
-+	spi_message_add_tail(&msg_xfer, &msg);
-+
-+	retval = spi_sync(chip->spi, &msg);
-+
-+	if (!retval)
-+		chip->reg_image[reg] = val;
-+
-+	return retval;
-+}
-+
-+static struct snd_pcm_hardware snd_at73c213_playback_hw = {
-+	.info		= SNDRV_PCM_INFO_INTERLEAVED |
-+			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
-+	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
-+	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
-+	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
-+	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
-+	.channels_min	= 2,
-+	.channels_max	= 2,
-+	.buffer_bytes_max = 64 * 1024 - 1,
-+	.period_bytes_min = 512,
-+	.period_bytes_max = 64 * 1024 - 1,
-+	.periods_min	= 4,
-+	.periods_max	= 1024,
-+};
-+
-+/*
-+ * Calculate and set bitrate and divisions.
-+ */
-+static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
-+{
-+	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
-+	unsigned long dac_rate_new, ssc_div, status;
-+	unsigned long ssc_div_max, ssc_div_min;
-+	int max_tries;
-+
-+	/*
-+	 * We connect two clocks here, picking divisors so the I2S clocks
-+	 * out data at the same rate the DAC clocks it in ... and as close
-+	 * as practical to the desired target rate.
-+	 *
-+	 * The DAC master clock (MCLK) is programmable, and is either 256
-+	 * or (not here) 384 times the I2S output clock (BCLK).
-+	 */
-+
-+	/* SSC clock / (bitrate * stereo * 16-bit). */
-+	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
-+	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
-+	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
-+	max_tries = (ssc_div_max - ssc_div_min) / 2;
-+
-+	if (max_tries < 1)
-+		max_tries = 1;
-+
-+	/* ssc_div must be a power of 2. */
-+	ssc_div = (ssc_div + 1) & ~1UL;
-+
-+	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
-+		ssc_div -= 2;
-+		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
-+			return -ENXIO;
-+	}
-+
-+	/* Search for a possible bitrate. */
-+	do {
-+		/* SSC clock / (ssc divider * 16-bit * stereo). */
-+		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
-+			return -ENXIO;
-+
-+		/* 256 / (2 * 16) = 8 */
-+		dac_rate_new = 8 * (ssc_rate / ssc_div);
-+
-+		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
-+		if (status < 0)
-+			return status;
-+
-+		/* Ignore difference smaller than 256 Hz. */
-+		if ((status/256) == (dac_rate_new/256))
-+			goto set_rate;
-+
-+		ssc_div += 2;
-+	} while (--max_tries);
-+
-+	/* Not able to find a valid bitrate. */
-+	return -ENXIO;
-+
-+set_rate:
-+	status = clk_set_rate(chip->board->dac_clk, status);
-+	if (status < 0)
-+		return status;
-+
-+	/* Set divider in SSC device. */
-+	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
-+
-+	/* SSC clock / (ssc divider * 16-bit * stereo). */
-+	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
-+
-+	dev_info(&chip->spi->dev,
-+			"at73c213: supported bitrate is %lu (%lu divider)\n",
-+			chip->bitrate, ssc_div);
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
-+{
-+	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+
-+	snd_at73c213_playback_hw.rate_min = chip->bitrate;
-+	snd_at73c213_playback_hw.rate_max = chip->bitrate;
-+	runtime->hw = snd_at73c213_playback_hw;
-+	chip->substream = substream;
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
-+{
-+	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
-+	chip->substream = NULL;
-+	return 0;
-+}
-+
-+static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
-+				 struct snd_pcm_hw_params *hw_params)
-+{
-+	return snd_pcm_lib_malloc_pages(substream,
-+					params_buffer_bytes(hw_params));
-+}
-+
-+static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream)
-+{
-+	return snd_pcm_lib_free_pages(substream);
-+}
-+
-+static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
-+{
-+	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	int block_size;
-+
-+	block_size = frames_to_bytes(runtime, runtime->period_size);
-+
-+	chip->period = 0;
-+
-+	ssc_writel(chip->ssc->regs, PDC_TPR,
-+			(long)runtime->dma_addr);
-+	ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2);
-+	ssc_writel(chip->ssc->regs, PDC_TNPR,
-+			(long)runtime->dma_addr + block_size);
-+	ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
-+				   int cmd)
-+{
-+	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
-+	int retval = 0;
-+
-+	spin_lock(&chip->lock);
-+
-+	switch (cmd) {
-+	case SNDRV_PCM_TRIGGER_START:
-+		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
-+		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
-+		break;
-+	case SNDRV_PCM_TRIGGER_STOP:
-+		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
-+		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
-+		break;
-+	default:
-+		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
-+		retval = -EINVAL;
-+		break;
-+	}
-+
-+	spin_unlock(&chip->lock);
-+
-+	return retval;
-+}
-+
-+static snd_pcm_uframes_t
-+snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
-+{
-+	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	snd_pcm_uframes_t pos;
-+	unsigned long bytes;
-+
-+	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
-+		- (unsigned long)runtime->dma_addr;
-+
-+	pos = bytes_to_frames(runtime, bytes);
-+	if (pos >= runtime->buffer_size)
-+		pos -= runtime->buffer_size;
-+
-+	return pos;
-+}
-+
-+static struct snd_pcm_ops at73c213_playback_ops = {
-+	.open		= snd_at73c213_pcm_open,
-+	.close		= snd_at73c213_pcm_close,
-+	.ioctl		= snd_pcm_lib_ioctl,
-+	.hw_params	= snd_at73c213_pcm_hw_params,
-+	.hw_free	= snd_at73c213_pcm_hw_free,
-+	.prepare	= snd_at73c213_pcm_prepare,
-+	.trigger	= snd_at73c213_pcm_trigger,
-+	.pointer	= snd_at73c213_pcm_pointer,
-+};
-+
-+static void snd_at73c213_pcm_free(struct snd_pcm *pcm)
-+{
-+	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
-+	if (chip->pcm) {
-+		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
-+		chip->pcm = NULL;
-+	}
-+}
-+
-+static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
-+{
-+	struct snd_pcm *pcm;
-+	int retval;
-+
-+	retval = snd_pcm_new(chip->card, chip->card->shortname,
-+			device, 1, 0, &pcm);
-+	if (retval < 0)
-+		goto out;
-+
-+	pcm->private_data = chip;
-+	pcm->private_free = snd_at73c213_pcm_free;
-+	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
-+	strcpy(pcm->name, "at73c213");
-+	chip->pcm = pcm;
-+
-+	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
-+
-+	retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm,
-+			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
-+			64 * 1024, 64 * 1024);
-+out:
-+	return retval;
-+}
-+
-+static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
-+{
-+	struct snd_at73c213 *chip = dev_id;
-+	struct snd_pcm_runtime *runtime = chip->substream->runtime;
-+	u32 status;
-+	int offset;
-+	int block_size;
-+	int next_period;
-+	int retval = IRQ_NONE;
-+
-+	spin_lock(&chip->lock);
-+
-+	block_size = frames_to_bytes(runtime, runtime->period_size);
-+	status = ssc_readl(chip->ssc->regs, IMR);
-+
-+	if (status & SSC_BIT(IMR_ENDTX)) {
-+		chip->period++;
-+		if (chip->period == runtime->periods)
-+			chip->period = 0;
-+		next_period = chip->period + 1;
-+		if (next_period == runtime->periods)
-+			next_period = 0;
-+
-+		offset = block_size * next_period;
-+
-+		ssc_writel(chip->ssc->regs, PDC_TNPR,
-+				(long)runtime->dma_addr + offset);
-+		ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
-+		retval = IRQ_HANDLED;
-+	}
-+
-+	ssc_readl(chip->ssc->regs, IMR);
-+	spin_unlock(&chip->lock);
-+
-+	if (status & SSC_BIT(IMR_ENDTX))
-+		snd_pcm_period_elapsed(chip->substream);
-+
-+	return retval;
-+}
-+
-+/*
-+ * Mixer functions.
-+ */
-+static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
-+				 struct snd_ctl_elem_value *ucontrol)
-+{
-+	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
-+	int reg = kcontrol->private_value & 0xff;
-+	int shift = (kcontrol->private_value >> 8) & 0xff;
-+	int mask = (kcontrol->private_value >> 16) & 0xff;
-+	int invert = (kcontrol->private_value >> 24) & 0xff;
-+
-+	spin_lock_irq(&chip->lock);
-+
-+	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask;
-+
-+	if (invert)
-+		ucontrol->value.integer.value[0] =
-+			(mask - ucontrol->value.integer.value[0]);
-+
-+	spin_unlock_irq(&chip->lock);
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
-+				 struct snd_ctl_elem_value *ucontrol)
-+{
-+	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
-+	int reg = kcontrol->private_value & 0xff;
-+	int shift = (kcontrol->private_value >> 8) & 0xff;
-+	int mask = (kcontrol->private_value >> 16) & 0xff;
-+	int invert = (kcontrol->private_value >> 24) & 0xff;
-+	int change, retval;
-+	unsigned short val;
-+
-+	val = (ucontrol->value.integer.value[0] & mask);
-+	if (invert)
-+		val = mask - val;
-+	val <<= shift;
-+
-+	spin_lock_irq(&chip->lock);
-+
-+	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
-+	change = val != chip->reg_image[reg];
-+	retval = snd_at73c213_write_reg(chip, reg, val);
-+
-+	spin_unlock_irq(&chip->lock);
-+
-+	if (retval)
-+		return retval;
-+
-+	return change;
-+}
-+
-+static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
-+				  struct snd_ctl_elem_info *uinfo)
-+{
-+	int mask = (kcontrol->private_value >> 24) & 0xff;
-+
-+	if (mask == 1)
-+		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
-+	else
-+		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
-+
-+	uinfo->count = 2;
-+	uinfo->value.integer.min = 0;
-+	uinfo->value.integer.max = mask;
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
-+				 struct snd_ctl_elem_value *ucontrol)
-+{
-+	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
-+	int left_reg = kcontrol->private_value & 0xff;
-+	int right_reg = (kcontrol->private_value >> 8) & 0xff;
-+	int shift_left = (kcontrol->private_value >> 16) & 0x07;
-+	int shift_right = (kcontrol->private_value >> 19) & 0x07;
-+	int mask = (kcontrol->private_value >> 24) & 0xff;
-+	int invert = (kcontrol->private_value >> 22) & 1;
-+
-+	spin_lock_irq(&chip->lock);
-+
-+	ucontrol->value.integer.value[0] =
-+		(chip->reg_image[left_reg] >> shift_left) & mask;
-+	ucontrol->value.integer.value[1] =
-+		(chip->reg_image[right_reg] >> shift_right) & mask;
-+
-+	if (invert) {
-+		ucontrol->value.integer.value[0] =
-+			(mask - ucontrol->value.integer.value[0]);
-+		ucontrol->value.integer.value[1] =
-+			(mask - ucontrol->value.integer.value[1]);
-+	}
-+
-+	spin_unlock_irq(&chip->lock);
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
-+				 struct snd_ctl_elem_value *ucontrol)
-+{
-+	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
-+	int left_reg = kcontrol->private_value & 0xff;
-+	int right_reg = (kcontrol->private_value >> 8) & 0xff;
-+	int shift_left = (kcontrol->private_value >> 16) & 0x07;
-+	int shift_right = (kcontrol->private_value >> 19) & 0x07;
-+	int mask = (kcontrol->private_value >> 24) & 0xff;
-+	int invert = (kcontrol->private_value >> 22) & 1;
-+	int change, retval;
-+	unsigned short val1, val2;
-+
-+	val1 = ucontrol->value.integer.value[0] & mask;
-+	val2 = ucontrol->value.integer.value[1] & mask;
-+	if (invert) {
-+		val1 = mask - val1;
-+		val2 = mask - val2;
-+	}
-+	val1 <<= shift_left;
-+	val2 <<= shift_right;
-+
-+	spin_lock_irq(&chip->lock);
-+
-+	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
-+	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
-+	change = val1 != chip->reg_image[left_reg]
-+		|| val2 != chip->reg_image[right_reg];
-+	retval = snd_at73c213_write_reg(chip, left_reg, val1);
-+	if (retval) {
-+		spin_unlock_irq(&chip->lock);
-+		goto out;
-+	}
-+	retval = snd_at73c213_write_reg(chip, right_reg, val2);
-+	if (retval) {
-+		spin_unlock_irq(&chip->lock);
-+		goto out;
-+	}
-+
-+	spin_unlock_irq(&chip->lock);
-+
-+	return change;
-+
-+out:
-+	return retval;
-+}
-+
-+static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
-+				  struct snd_ctl_elem_info *uinfo)
-+{
-+	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
-+	uinfo->count = 1;
-+	uinfo->value.integer.min = 0;
-+	uinfo->value.integer.max = 1;
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
-+				 struct snd_ctl_elem_value *ucontrol)
-+{
-+	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
-+	int reg = kcontrol->private_value & 0xff;
-+	int shift = (kcontrol->private_value >> 8) & 0xff;
-+	int invert = (kcontrol->private_value >> 24) & 0xff;
-+
-+	spin_lock_irq(&chip->lock);
-+
-+	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01;
-+
-+	if (invert)
-+		ucontrol->value.integer.value[0] =
-+			(0x01 - ucontrol->value.integer.value[0]);
-+
-+	spin_unlock_irq(&chip->lock);
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
-+				 struct snd_ctl_elem_value *ucontrol)
-+{
-+	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
-+	int reg = kcontrol->private_value & 0xff;
-+	int shift = (kcontrol->private_value >> 8) & 0xff;
-+	int mask = (kcontrol->private_value >> 16) & 0xff;
-+	int invert = (kcontrol->private_value >> 24) & 0xff;
-+	int change, retval;
-+	unsigned short val;
-+
-+	if (ucontrol->value.integer.value[0])
-+		val = mask;
-+	else
-+		val = 0;
-+
-+	if (invert)
-+		val = mask - val;
-+	val <<= shift;
-+
-+	spin_lock_irq(&chip->lock);
-+
-+	val |= (chip->reg_image[reg] & ~(mask << shift));
-+	change = val != chip->reg_image[reg];
-+
-+	retval = snd_at73c213_write_reg(chip, reg, val);
-+
-+	spin_unlock_irq(&chip->lock);
-+
-+	if (retval)
-+		return retval;
-+
-+	return change;
-+}
-+
-+static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
-+				  struct snd_ctl_elem_info *uinfo)
-+{
-+	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
-+	uinfo->count = 1;
-+	uinfo->value.integer.min = 0;
-+	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_line_capture_volume_info(
-+		struct snd_kcontrol *kcontrol,
-+		struct snd_ctl_elem_info *uinfo)
-+{
-+	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
-+	uinfo->count = 2;
-+	/* When inverted will give values 0x10001 => 0. */
-+	uinfo->value.integer.min = 14;
-+	uinfo->value.integer.max = 31;
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_aux_capture_volume_info(
-+		struct snd_kcontrol *kcontrol,
-+		struct snd_ctl_elem_info *uinfo)
-+{
-+	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
-+	uinfo->count = 1;
-+	/* When inverted will give values 0x10001 => 0. */
-+	uinfo->value.integer.min = 14;
-+	uinfo->value.integer.max = 31;
-+
-+	return 0;
-+}
-+
-+#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
-+{									\
-+	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
-+	.name = xname,							\
-+	.index = xindex,						\
-+	.info = snd_at73c213_mono_switch_info,				\
-+	.get = snd_at73c213_mono_switch_get,				\
-+	.put = snd_at73c213_mono_switch_put,				\
-+	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
-+}
-+
-+#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
-+{									\
-+	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
-+	.name = xname,							\
-+	.index = xindex,						\
-+	.info = snd_at73c213_stereo_info,				\
-+	.get = snd_at73c213_stereo_get,					\
-+	.put = snd_at73c213_stereo_put,					\
-+	.private_value = (left_reg | (right_reg << 8)			\
-+			| (shift_left << 16) | (shift_right << 19)	\
-+			| (mask << 24) | (invert << 22))		\
-+}
-+
-+static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
-+AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
-+AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
-+AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
-+AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
-+AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
-+{
-+	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
-+	.name	= "PA Playback Volume",
-+	.index	= 0,
-+	.info	= snd_at73c213_pa_volume_info,
-+	.get	= snd_at73c213_mono_get,
-+	.put	= snd_at73c213_mono_put,
-+	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24),
-+},
-+AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
-+AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
-+{
-+	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
-+	.name	= "Aux Capture Volume",
-+	.index	= 0,
-+	.info	= snd_at73c213_aux_capture_volume_info,
-+	.get	= snd_at73c213_mono_get,
-+	.put	= snd_at73c213_mono_put,
-+	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
-+},
-+AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
-+{
-+	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
-+	.name	= "Line Capture Volume",
-+	.index	= 0,
-+	.info	= snd_at73c213_line_capture_volume_info,
-+	.get	= snd_at73c213_stereo_get,
-+	.put	= snd_at73c213_stereo_put,
-+	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
-+		| (0x1f << 24) | (1 << 22),
-+},
-+AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
-+};
-+
-+static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
-+{
-+	struct snd_card *card;
-+	int errval, idx;
-+
-+	if (chip == NULL || chip->pcm == NULL)
-+		return -EINVAL;
-+
-+	card = chip->card;
-+
-+	strcpy(card->mixername, chip->pcm->name);
-+
-+	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
-+		errval = snd_ctl_add(card,
-+				snd_ctl_new1(&snd_at73c213_controls[idx],
-+					chip));
-+		if (errval < 0)
-+			goto cleanup;
-+	}
-+
-+	return 0;
-+
-+cleanup:
-+	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
-+		struct snd_kcontrol *kctl;
-+		kctl = snd_ctl_find_numid(card, idx);
-+		if (kctl)
-+			snd_ctl_remove(card, kctl);
-+	}
-+	return errval;
-+}
-+
-+/*
-+ * Device functions
-+ */
-+static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
-+{
-+	/*
-+	 * Continuous clock output.
-+	 * Starts on falling TF.
-+	 * Delay 1 cycle (1 bit).
-+	 * Periode is 16 bit (16 - 1).
-+	 */
-+	ssc_writel(chip->ssc->regs, TCMR,
-+			SSC_BF(TCMR_CKO, 1)
-+			| SSC_BF(TCMR_START, 4)
-+			| SSC_BF(TCMR_STTDLY, 1)
-+			| SSC_BF(TCMR_PERIOD, 16 - 1));
-+	/*
-+	 * Data length is 16 bit (16 - 1).
-+	 * Transmit MSB first.
-+	 * Transmit 2 words each transfer.
-+	 * Frame sync length is 16 bit (16 - 1).
-+	 * Frame starts on negative pulse.
-+	 */
-+	ssc_writel(chip->ssc->regs, TFMR,
-+			SSC_BF(TFMR_DATLEN, 16 - 1)
-+			| SSC_BIT(TFMR_MSBF)
-+			| SSC_BF(TFMR_DATNB, 1)
-+			| SSC_BF(TFMR_FSLEN, 16 - 1)
-+			| SSC_BF(TFMR_FSOS, 1));
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
-+{
-+	int retval;
-+	unsigned char dac_ctrl = 0;
-+
-+	retval = snd_at73c213_set_bitrate(chip);
-+	if (retval)
-+		goto out;
-+
-+	/* Enable DAC master clock. */
-+	clk_enable(chip->board->dac_clk);
-+
-+	/* Initialize at73c213 on SPI bus. */
-+	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
-+	if (retval)
-+		goto out_clk;
-+	msleep(1);
-+	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
-+	if (retval)
-+		goto out_clk;
-+
-+	/* Precharge everything. */
-+	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
-+			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
-+	if (retval)
-+		goto out_clk;
-+
-+	msleep(50);
-+
-+	/* Stop precharging PA. */
-+	retval = snd_at73c213_write_reg(chip, PA_CTRL,
-+			(1<<PA_CTRL_APALP) | 0x0f);
-+	if (retval)
-+		goto out_clk;
-+
-+	msleep(450);
-+
-+	/* Stop precharging DAC, turn on master power. */
-+	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
-+	if (retval)
-+		goto out_clk;
-+
-+	msleep(1);
-+
-+	/* Turn on DAC. */
-+	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
-+		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
-+
-+	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
-+	if (retval)
-+		goto out_clk;
-+
-+	/* Mute sound. */
-+	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
-+	if (retval)
-+		goto out_clk;
-+	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
-+	if (retval)
-+		goto out_clk;
-+
-+	/* Enable I2S device, i.e. clock output. */
-+	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
-+
-+	goto out;
-+
-+out_clk:
-+	clk_disable(chip->board->dac_clk);
-+out:
-+	return retval;
-+}
-+
-+static int snd_at73c213_dev_free(struct snd_device *device)
-+{
-+	struct snd_at73c213 *chip = device->device_data;
-+
-+	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
-+	if (chip->irq >= 0) {
-+		free_irq(chip->irq, chip);
-+		chip->irq = -1;
-+	}
-+
-+	return 0;
-+}
-+
-+static int __devinit snd_at73c213_dev_init(struct snd_card *card,
-+					 struct spi_device *spi)
-+{
-+	static struct snd_device_ops ops = {
-+		.dev_free	= snd_at73c213_dev_free,
-+	};
-+	struct snd_at73c213 *chip = get_chip(card);
-+	int irq, retval;
-+
-+	irq = chip->ssc->irq;
-+	if (irq < 0)
-+		return irq;
-+
-+	spin_lock_init(&chip->lock);
-+	chip->card = card;
-+	chip->irq = -1;
-+
-+	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
-+	if (retval) {
-+		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
-+		goto out;
-+	}
-+	chip->irq = irq;
-+
-+	memcpy(&chip->reg_image, &snd_at73c213_original_image,
-+			sizeof(snd_at73c213_original_image));
-+
-+	retval = snd_at73c213_ssc_init(chip);
-+	if (retval)
-+		goto out_irq;
-+
-+	retval = snd_at73c213_chip_init(chip);
-+	if (retval)
-+		goto out_irq;
-+
-+	retval = snd_at73c213_pcm_new(chip, 0);
-+	if (retval)
-+		goto out_irq;
-+
-+	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
-+	if (retval)
-+		goto out_irq;
-+
-+	retval = snd_at73c213_mixer(chip);
-+	if (retval)
-+		goto out_snd_dev;
-+
-+	snd_card_set_dev(card, &spi->dev);
-+
-+	goto out;
-+
-+out_snd_dev:
-+	snd_device_free(card, chip);
-+out_irq:
-+	free_irq(chip->irq, chip);
-+	chip->irq = -1;
-+out:
-+	return retval;
-+}
-+
-+static int snd_at73c213_probe(struct spi_device *spi)
-+{
-+	struct snd_card			*card;
-+	struct snd_at73c213		*chip;
-+	struct at73c213_board_info	*board;
-+	int				retval;
-+	char				id[16];
-+
-+	board = spi->dev.platform_data;
-+	if (!board) {
-+		dev_dbg(&spi->dev, "no platform_data\n");
-+		return -ENXIO;
-+	}
-+
-+	if (!board->dac_clk) {
-+		dev_dbg(&spi->dev, "no DAC clk\n");
-+		return -ENXIO;
-+	}
-+
-+	if (IS_ERR(board->dac_clk)) {
-+		dev_dbg(&spi->dev, "no DAC clk\n");
-+		return PTR_ERR(board->dac_clk);
-+	}
-+
-+	retval = -ENOMEM;
-+
-+	/* Allocate "card" using some unused identifiers. */
-+	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
-+	card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
-+	if (!card)
-+		goto out;
-+
-+	chip = card->private_data;
-+	chip->spi = spi;
-+	chip->board = board;
-+
-+	chip->ssc = ssc_request(board->ssc_id);
-+	if (IS_ERR(chip->ssc)) {
-+		dev_dbg(&spi->dev, "could not get ssc%d device\n",
-+				board->ssc_id);
-+		retval = PTR_ERR(chip->ssc);
-+		goto out_card;
-+	}
-+
-+	retval = snd_at73c213_dev_init(card, spi);
-+	if (retval)
-+		goto out_ssc;
-+
-+	strcpy(card->driver, "at73c213");
-+	strcpy(card->shortname, board->shortname);
-+	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
-+
-+	retval = snd_card_register(card);
-+	if (retval)
-+		goto out_ssc;
-+
-+	dev_set_drvdata(&spi->dev, card);
-+
-+	goto out;
-+
-+out_ssc:
-+	ssc_free(chip->ssc);
-+out_card:
-+	snd_card_free(card);
-+out:
-+	return retval;
-+}
-+
-+static int __devexit snd_at73c213_remove(struct spi_device *spi)
-+{
-+	struct snd_card *card = dev_get_drvdata(&spi->dev);
-+	struct snd_at73c213 *chip = card->private_data;
-+	int retval;
-+
-+	/* Stop playback. */
-+	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
-+
-+	/* Mute sound. */
-+	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
-+	if (retval)
-+		goto out;
-+	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
-+	if (retval)
-+		goto out;
-+	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
-+	if (retval)
-+		goto out;
-+	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
-+	if (retval)
-+		goto out;
-+	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
-+	if (retval)
-+		goto out;
-+	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
-+	if (retval)
-+		goto out;
-+	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
-+	if (retval)
-+		goto out;
-+
-+	/* Turn off PA. */
-+	retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f));
-+	if (retval)
-+		goto out;
-+	msleep(10);
-+	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f);
-+	if (retval)
-+		goto out;
-+
-+	/* Turn off external DAC. */
-+	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
-+	if (retval)
-+		goto out;
-+	msleep(2);
-+	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
-+	if (retval)
-+		goto out;
-+
-+	/* Turn off master power. */
-+	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
-+	if (retval)
-+		goto out;
-+
-+out:
-+	/* Stop DAC master clock. */
-+	clk_disable(chip->board->dac_clk);
-+
-+	ssc_free(chip->ssc);
-+	snd_card_free(card);
-+	dev_set_drvdata(&spi->dev, NULL);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg)
-+{
-+	struct snd_card *card = dev_get_drvdata(&spi->dev);
-+	struct snd_at73c213 *chip = card->private_data;
-+
-+	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
-+	clk_disable(chip->board->dac_clk);
-+
-+	return 0;
-+}
-+
-+static int snd_at73c213_resume(struct spi_device *spi)
-+{
-+	struct snd_card *card = dev_get_drvdata(&spi->dev);
-+	struct snd_at73c213 *chip = card->private_data;
-+
-+	clk_enable(chip->board->dac_clk);
-+	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
-+
-+	return 0;
-+}
-+#else
-+#define snd_at73c213_suspend NULL
-+#define snd_at73c213_resume NULL
-+#endif
-+
-+static struct spi_driver at73c213_driver = {
-+	.driver		= {
-+		.name	= "at73c213",
-+	},
-+	.probe		= snd_at73c213_probe,
-+	.suspend	= snd_at73c213_suspend,
-+	.resume		= snd_at73c213_resume,
-+	.remove		= __devexit_p(snd_at73c213_remove),
-+};
-+
-+static int __init at73c213_init(void)
-+{
-+	return spi_register_driver(&at73c213_driver);
-+}
-+module_init(at73c213_init);
-+
-+static void __exit at73c213_exit(void)
-+{
-+	spi_unregister_driver(&at73c213_driver);
-+}
-+module_exit(at73c213_exit);
-+
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/sound/spi/Makefile
-===================================================================
---- linux-2.6.22.1/sound/spi/Makefile	(revision 0)
-+++ linux-2.6.22.1/sound/spi/Makefile	(revision 0)
-@@ -0,0 +1,5 @@
-+# Makefile for SPI drivers
-+
-+snd-at73c213-objs		:= at73c213.o
-+
-+obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
-Index: linux-2.6.22.1/sound/spi/at73c213.h
-===================================================================
---- linux-2.6.22.1/sound/spi/at73c213.h	(revision 0)
-+++ linux-2.6.22.1/sound/spi/at73c213.h	(revision 0)
-@@ -0,0 +1,119 @@
-+/*
-+ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
-+ *
-+ * Copyright (C) 2006 - 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful, but
-+ * WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+ * General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
-+ * 02111-1307, USA.
-+ *
-+ * The full GNU General Public License is included in this
-+ * distribution in the file called COPYING.
-+ */
-+
-+#ifndef _SND_AT73C213_H
-+#define _SND_AT73C213_H
-+
-+/* DAC control register */
-+#define DAC_CTRL		0x00
-+#define DAC_CTRL_ONPADRV	7
-+#define DAC_CTRL_ONAUXIN	6
-+#define DAC_CTRL_ONDACR		5
-+#define DAC_CTRL_ONDACL		4
-+#define DAC_CTRL_ONLNOR		3
-+#define DAC_CTRL_ONLNOL		2
-+#define DAC_CTRL_ONLNIR		1
-+#define DAC_CTRL_ONLNIL		0
-+
-+/* DAC left line in gain register */
-+#define DAC_LLIG		0x01
-+#define DAC_LLIG_LLIG		0
-+
-+/* DAC right line in gain register */
-+#define DAC_RLIG		0x02
-+#define DAC_RLIG_RLIG		0
-+
-+/* DAC Left Master Playback Gain Register */
-+#define DAC_LMPG		0x03
-+#define DAC_LMPG_LMPG		0
-+
-+/* DAC Right Master Playback Gain Register */
-+#define DAC_RMPG		0x04
-+#define DAC_RMPG_RMPG		0
-+
-+/* DAC Left Line Out Gain Register */
-+#define DAC_LLOG		0x05
-+#define DAC_LLOG_LLOG		0
-+
-+/* DAC Right Line Out Gain Register */
-+#define DAC_RLOG		0x06
-+#define DAC_RLOG_RLOG		0
-+
-+/* DAC Output Level Control Register */
-+#define DAC_OLC			0x07
-+#define DAC_OLC_RSHORT		7
-+#define DAC_OLC_ROLC		4
-+#define DAC_OLC_LSHORT		3
-+#define DAC_OLC_LOLC		0
-+
-+/* DAC Mixer Control Register */
-+#define DAC_MC			0x08
-+#define DAC_MC_INVR		5
-+#define DAC_MC_INVL		4
-+#define DAC_MC_RMSMIN2		3
-+#define DAC_MC_RMSMIN1		2
-+#define DAC_MC_LMSMIN2		1
-+#define DAC_MC_LMSMIN1		0
-+
-+/* DAC Clock and Sampling Frequency Control Register */
-+#define DAC_CSFC		0x09
-+#define DAC_CSFC_OVRSEL		4
-+
-+/* DAC Miscellaneous Register */
-+#define DAC_MISC		0x0A
-+#define DAC_MISC_VCMCAPSEL	7
-+#define DAC_MISC_DINTSEL	4
-+#define DAC_MISC_DITHEN		3
-+#define DAC_MISC_DEEMPEN	2
-+#define DAC_MISC_NBITS		0
-+
-+/* DAC Precharge Control Register */
-+#define DAC_PRECH		0x0C
-+#define DAC_PRECH_PRCHGPDRV	7
-+#define DAC_PRECH_PRCHGAUX1	6
-+#define DAC_PRECH_PRCHGLNOR	5
-+#define DAC_PRECH_PRCHGLNOL	4
-+#define DAC_PRECH_PRCHGLNIR	3
-+#define DAC_PRECH_PRCHGLNIL	2
-+#define DAC_PRECH_PRCHG		1
-+#define DAC_PRECH_ONMSTR	0
-+
-+/* DAC Auxiliary Input Gain Control Register */
-+#define DAC_AUXG		0x0D
-+#define DAC_AUXG_AUXG		0
-+
-+/* DAC Reset Register */
-+#define DAC_RST			0x10
-+#define DAC_RST_RESMASK		2
-+#define DAC_RST_RESFILZ		1
-+#define DAC_RST_RSTZ		0
-+
-+/* Power Amplifier Control Register */
-+#define PA_CTRL			0x11
-+#define PA_CTRL_APAON		6
-+#define PA_CTRL_APAPRECH	5
-+#define PA_CTRL_APALP		4
-+#define PA_CTRL_APAGAIN		0
-+
-+#endif /* _SND_AT73C213_H */
-Index: linux-2.6.22.1/sound/Makefile
-===================================================================
---- linux-2.6.22.1/sound/Makefile	(revision 1)
-+++ linux-2.6.22.1/sound/Makefile	(arbetskopia)
-@@ -5,7 +5,8 @@
- obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
- obj-$(CONFIG_SOUND_PRIME) += oss/
- obj-$(CONFIG_DMASOUND) += oss/
--obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/
-+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ \
-+		      sparc/ spi/ parisc/ pcmcia/ mips/ soc/
- obj-$(CONFIG_SND_AOA) += aoa/
- 
- # This one must be compilable even if sound is configured out
-Index: linux-2.6.22.1/init/do_mounts.c
-===================================================================
---- linux-2.6.22.1/init/do_mounts.c	(revision 1)
-+++ linux-2.6.22.1/init/do_mounts.c	(arbetskopia)
-@@ -25,6 +25,7 @@
- int root_mountflags = MS_RDONLY | MS_SILENT;
- char * __initdata root_device_name;
- static char __initdata saved_root_name[64];
-+int __initdata root_wait;
- 
- dev_t ROOT_DEV;
- 
-@@ -216,6 +217,14 @@
- 
- __setup("root=", root_dev_setup);
- 
-+static int __init rootwait_setup(char *line)
-+{
-+	root_wait = simple_strtol(line,NULL,0);
-+	return 1;
-+}
-+
-+__setup("rootwait=", rootwait_setup);
-+
- static char * __initdata root_mount_data;
- static int __init root_data_setup(char *str)
- {
-@@ -438,11 +447,24 @@
- 			root_device_name += 5;
- 	}
- 
--	is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR;
--
- 	if (initrd_load())
- 		goto out;
- 
-+	/* wait for any asynchronous scanning to complete */
-+	if ((ROOT_DEV == 0) && root_wait) {
-+		printk(KERN_INFO "Waiting for root device %s...\n",
-+			saved_root_name);
-+		do {
-+			while (driver_probe_done() != 0)
-+				msleep(100);
-+			ROOT_DEV = name_to_dev_t(saved_root_name);
-+			if (ROOT_DEV == 0)
-+				msleep(100);
-+		} while (ROOT_DEV == 0);
-+	}
-+
-+	is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR;
-+
- 	if (is_floppy && rd_doload && rd_load_disk(0))
- 		ROOT_DEV = Root_RAM0;
- 
-Index: linux-2.6.22.1/MAINTAINERS
-===================================================================
---- linux-2.6.22.1/MAINTAINERS	(revision 1)
-+++ linux-2.6.22.1/MAINTAINERS	(arbetskopia)
-@@ -674,6 +674,13 @@
- M:	hskinnemoen@atmel.com
- S:	Supported
- 
-+ATMEL USBA UDC DRIVER
-+P:	Haavard Skinnemoen
-+M:	hskinnemoen@atmel.com
-+L:	kernel@avr32linux.org
-+W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
-+S:	Supported
-+
- ATMEL WIRELESS DRIVER
- P:	Simon Kelley
- M:	simon@thekelleys.org.uk
-Index: linux-2.6.22.1/arch/arm/boot/compressed/head-at91rm9200.S
-===================================================================
---- linux-2.6.22.1/arch/arm/boot/compressed/head-at91rm9200.S	(revision 1)
-+++ linux-2.6.22.1/arch/arm/boot/compressed/head-at91rm9200.S	(arbetskopia)
-@@ -73,6 +73,12 @@
- 		cmp	r7, r3
- 		beq	99f
- 
-+		@ Promwad Chub : 1181
-+		mov	r3,	#(MACH_TYPE_CHUB & 0xff)
-+		orr	r3, r3, #(MACH_TYPE_CHUB & 0xff00)
-+		cmp	r7, r3
-+		beq	99f
-+
- 		@ Unknown board, use the AT91RM9200DK board
- 		@ mov	r7, #MACH_TYPE_AT91RM9200
- 		mov	r7,	#(MACH_TYPE_AT91RM9200DK & 0xff)
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-kb9202.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-kb9202.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-kb9202.c	(arbetskopia)
-@@ -37,6 +37,8 @@
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
- 
-+#include <asm/arch/at91rm9200_mc.h>
-+
- #include "generic.h"
- 
- 
-@@ -111,6 +113,48 @@
- 	.partition_info	= nand_partitions,
- };
- 
-+
-+#if defined(CONFIG_FB_S1D15605)
-+#warning "Rather pass reset pin via platform_data"
-+static struct resource kb9202_lcd_resources[] = {
-+	[0] = {
-+		.start	= AT91_CHIPSELECT_2,
-+		.end	= AT91_CHIPSELECT_2 + 0x200FF,
-+		.flags	= IORESOURCE_MEM
-+	},
-+	[1] = {	/* reset pin */
-+		.start	= AT91_PIN_PC22,
-+		.end	= AT91_PIN_PC22,
-+		.flags	= IORESOURCE_MEM
-+	},
-+};
-+
-+static struct platform_device kb9202_lcd_device = {
-+	.name		= "s1d15605fb",
-+	.id		= 0,
-+	.num_resources	= ARRAY_SIZE(kb9202_lcd_resources),
-+	.resource	= kb9202_lcd_resources,
-+};
-+
-+static void __init kb9202_add_device_lcd(void)
-+{
-+ 	/* In case the boot loader did not set the chip select mode and timing */
-+	at91_sys_write(AT91_SMC_CSR(2),
-+		AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 |
-+		AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1));
-+
-+	/* Backlight pin = output, off */
-+	at91_set_gpio_output(AT91_PIN_PC23, 0);
-+
-+	/* Reset pin = output, in reset */
-+	at91_set_gpio_output(AT91_PIN_PC22, 0);
-+
-+	platform_device_register(&kb9202_lcd_device);
-+}
-+#else
-+static void __init kb9202_add_device_lcd(void) {}
-+#endif
-+
- static void __init kb9202_board_init(void)
- {
- 	/* Serial */
-@@ -129,6 +173,8 @@
- 	at91_add_device_spi(NULL, 0);
- 	/* NAND */
- 	at91_add_device_nand(&kb9202_nand_data);
-+	/* LCD	*/
-+	kb9202_add_device_lcd();
- }
- 
- MACHINE_START(KB9200, "KB920x")
-Index: linux-2.6.22.1/arch/arm/mach-at91/Kconfig
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/Kconfig	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/Kconfig	(arbetskopia)
-@@ -97,6 +97,12 @@
- 	help
- 	  Select this if you are using Sperry-Sun's KAFA board.
- 
-+config MACH_CHUB
-+	bool "Promwad Chub board"
-+	depends on ARCH_AT91RM9200
-+	help
-+	  Select this if you are using Promwad's Chub board.
-+
- endif
- 
- # ----------------------------------------------------------
-@@ -121,6 +127,13 @@
- 	  Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
- 	  <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
- 
-+config MACH_CAM60
-+	bool "KwikByte CAM60 board"
-+	depends on ARCH_AT91SAM9260
-+	help
-+	  Select this if you are using KwikByte's CAM60 board based on the Atmel AT91SAM9260.
-+	  <http://www.kwikbyte.com>
-+
- endif
- 
- # ----------------------------------------------------------
-@@ -184,6 +197,20 @@
- 	  On AT91SAM926x boards both types of NAND flash can be present
- 	  (8 and 16 bit data bus width).
- 
-+config CSB300_WAKE_SW0
-+	bool "CSB300 SW0 irq0 wakeup"
-+	depends on MACH_CSB337 && PM
-+	help
-+	  If you have a CSB300 connected to your CSB337, this lets
-+	  SW0 serve as a wakeup button.  It uses IRQ0.
-+
-+config CSB300_WAKE_SW1
-+	bool "CSB300 SW1 gpio wakeup"
-+	depends on MACH_CSB337 && PM
-+	help
-+	  If you have a CSB300 connected to your CSB337, this lets
-+	  SW1 serve as a wakeup button.  It uses GPIO.
-+
- # ----------------------------------------------------------
- 
- comment "AT91 Feature Selections"
-@@ -194,6 +221,20 @@
- 	  Select this if you need to program one or more of the PCK0..PCK3
- 	  programmable clock outputs.
- 
-+config ATMEL_TCLIB
-+	bool "Timer/Counter Library"
-+	help
-+	  Select this if you want a library to allocate the Timer/Counter
-+	  blocks found on many Atmel processors.  This facilitates using
-+	  these modules despite processor differences.
-+
-+config AT91_SLOW_CLOCK
-+	bool "Suspend-to-RAM uses slow clock mode (EXPERIMENTAL)"
-+	depends on PM && EXPERIMENTAL
-+	help
-+	  Select this if you wish to put the CPU into slow clock mode
-+	  while in the "Suspend to RAM" state, to save more power.
-+
- endmenu
- 
- endif
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9260.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9260.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9260.c	(arbetskopia)
-@@ -269,6 +269,33 @@
- 
- 
- /* --------------------------------------------------------------------
-+ *  Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9260_tcblocks[] = {
-+	[0] = {
-+		.physaddr	= AT91SAM9260_BASE_TCB0,
-+		.irq		= { AT91SAM9260_ID_TC0, AT91SAM9260_ID_TC1, AT91SAM9260_ID_TC2 },
-+		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
-+	},
-+	[1] = {
-+		.physaddr	= AT91SAM9260_BASE_TCB1,
-+		.irq		= { AT91SAM9260_ID_TC3, AT91SAM9260_ID_TC4, AT91SAM9260_ID_TC5 },
-+		.clk		= { &tc3_clk, &tc4_clk, &tc5_clk },
-+	},
-+};
-+
-+#define at91sam9260_tc_init()	atmel_tc_init(at91sam9260_tcblocks, ARRAY_SIZE(at91sam9260_tcblocks))
-+
-+#else
-+#define at91sam9260_tc_init()	do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-  *  AT91SAM9260 processor initialization
-  * -------------------------------------------------------------------- */
- 
-@@ -315,6 +342,9 @@
- 
- 	/* Register GPIO subsystem */
- 	at91_gpio_init(at91sam9260_gpio, 3);
-+
-+	/* Initialize the Timer/Counter blocks */
-+	at91sam9260_tc_init();
- }
- 
- /* --------------------------------------------------------------------
-@@ -327,30 +357,30 @@
- static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 	7,	/* Advanced Interrupt Controller */
- 	7,	/* System Peripherals */
--	0,	/* Parallel IO Controller A */
--	0,	/* Parallel IO Controller B */
--	0,	/* Parallel IO Controller C */
-+	1,	/* Parallel IO Controller A */
-+	1,	/* Parallel IO Controller B */
-+	1,	/* Parallel IO Controller C */
- 	0,	/* Analog-to-Digital Converter */
--	6,	/* USART 0 */
--	6,	/* USART 1 */
--	6,	/* USART 2 */
-+	5,	/* USART 0 */
-+	5,	/* USART 1 */
-+	5,	/* USART 2 */
- 	0,	/* Multimedia Card Interface */
--	4,	/* USB Device Port */
--	0,	/* Two-Wire Interface */
--	6,	/* Serial Peripheral Interface 0 */
--	6,	/* Serial Peripheral Interface 1 */
-+	2,	/* USB Device Port */
-+	6,	/* Two-Wire Interface */
-+	5,	/* Serial Peripheral Interface 0 */
-+	5,	/* Serial Peripheral Interface 1 */
- 	5,	/* Serial Synchronous Controller */
- 	0,
- 	0,
- 	0,	/* Timer Counter 0 */
- 	0,	/* Timer Counter 1 */
- 	0,	/* Timer Counter 2 */
--	3,	/* USB Host port */
-+	2,	/* USB Host port */
- 	3,	/* Ethernet */
- 	0,	/* Image Sensor Interface */
--	6,	/* USART 3 */
--	6,	/* USART 4 */
--	6,	/* USART 5 */
-+	5,	/* USART 3 */
-+	5,	/* USART 4 */
-+	5,	/* USART 5 */
- 	0,	/* Timer Counter 3 */
- 	0,	/* Timer Counter 4 */
- 	0,	/* Timer Counter 5 */
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9261.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9261.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9261.c	(arbetskopia)
-@@ -247,6 +247,28 @@
- 
- 
- /* --------------------------------------------------------------------
-+ *  Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9261_tcblocks[] = {
-+	[0] = {
-+		.physaddr	= AT91SAM9261_BASE_TCB0,
-+		.irq		= { AT91SAM9261_ID_TC0, AT91SAM9261_ID_TC1, AT91SAM9261_ID_TC2 },
-+		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
-+	}
-+};
-+
-+#define at91sam9261_tc_init()	atmel_tc_init(at91sam9261_tcblocks, ARRAY_SIZE(at91sam9261_tcblocks))
-+
-+#else
-+#define at91sam9261_tc_init()	do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-  *  AT91SAM9261 processor initialization
-  * -------------------------------------------------------------------- */
- 
-@@ -267,6 +289,9 @@
- 
- 	/* Register GPIO subsystem */
- 	at91_gpio_init(at91sam9261_gpio, 3);
-+
-+	/* Initialize the Timer/Counter blocks */
-+	at91sam9261_tc_init();
- }
- 
- /* --------------------------------------------------------------------
-@@ -279,25 +304,25 @@
- static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 	7,	/* Advanced Interrupt Controller */
- 	7,	/* System Peripherals */
--	0,	/* Parallel IO Controller A */
--	0,	/* Parallel IO Controller B */
--	0,	/* Parallel IO Controller C */
-+	1,	/* Parallel IO Controller A */
-+	1,	/* Parallel IO Controller B */
-+	1,	/* Parallel IO Controller C */
- 	0,
--	6,	/* USART 0 */
--	6,	/* USART 1 */
--	6,	/* USART 2 */
-+	5,	/* USART 0 */
-+	5,	/* USART 1 */
-+	5,	/* USART 2 */
- 	0,	/* Multimedia Card Interface */
--	4,	/* USB Device Port */
--	0,	/* Two-Wire Interface */
--	6,	/* Serial Peripheral Interface 0 */
--	6,	/* Serial Peripheral Interface 1 */
--	5,	/* Serial Synchronous Controller 0 */
--	5,	/* Serial Synchronous Controller 1 */
--	5,	/* Serial Synchronous Controller 2 */
-+	2,	/* USB Device Port */
-+	6,	/* Two-Wire Interface */
-+	5,	/* Serial Peripheral Interface 0 */
-+	5,	/* Serial Peripheral Interface 1 */
-+	4,	/* Serial Synchronous Controller 0 */
-+	4,	/* Serial Synchronous Controller 1 */
-+	4,	/* Serial Synchronous Controller 2 */
- 	0,	/* Timer Counter 0 */
- 	0,	/* Timer Counter 1 */
- 	0,	/* Timer Counter 2 */
--	3,	/* USB Host port */
-+	2,	/* USB Host port */
- 	3,	/* LCD Controller */
- 	0,
- 	0,
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9260_devices.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9260_devices.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9260_devices.c	(arbetskopia)
-@@ -524,6 +524,32 @@
- #endif
- 
- 
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+	.name		= "at91_leds",
-+	.id		= -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+	if (!nr)
-+		return;
-+
-+	at91_leds.dev.platform_data = leds;
-+
-+	for ( ; nr; nr--, leds++) {
-+		leds->index = nr;	/* first record stores number of leds */
-+		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+	}
-+
-+	platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
-  *  UART
-  * -------------------------------------------------------------------- */
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9261_devices.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9261_devices.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9261_devices.c	(arbetskopia)
-@@ -14,7 +14,10 @@
- #include <asm/mach/map.h>
- 
- #include <linux/platform_device.h>
-+#include <linux/fb.h>
- 
-+#include <video/atmel_lcdc.h>
-+
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
- #include <asm/arch/at91sam9261.h>
-@@ -522,6 +525,32 @@
- #endif
- 
- 
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+	.name		= "at91_leds",
-+	.id		= -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+	if (!nr)
-+		return;
-+
-+	at91_leds.dev.platform_data = leds;
-+
-+	for ( ; nr; nr--, leds++) {
-+		leds->index = nr;	/* first record stores number of leds */
-+		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+	}
-+
-+	platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
-  *  UART
-  * -------------------------------------------------------------------- */
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9263.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9263.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9263.c	(arbetskopia)
-@@ -273,6 +273,28 @@
- 
- 
- /* --------------------------------------------------------------------
-+ *  Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9263_tcblocks[] = {
-+	[0] = {
-+		.physaddr	= AT91SAM9263_BASE_TCB0,
-+		.irq		= { AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB, AT91SAM9263_ID_TCB },
-+		.clk		= { &tcb_clk, &tcb_clk, &tcb_clk },
-+	}
-+};
-+
-+#define at91sam9263_tc_init()	atmel_tc_init(at91sam9263_tcblocks, ARRAY_SIZE(at91sam9263_tcblocks))
-+
-+#else
-+#define at91sam9263_tc_init()	do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-  *  AT91SAM9263 processor initialization
-  * -------------------------------------------------------------------- */
- 
-@@ -292,6 +314,9 @@
- 
- 	/* Register GPIO subsystem */
- 	at91_gpio_init(at91sam9263_gpio, 5);
-+
-+	/* Initialize the Timer/Counter blocks */
-+	at91sam9263_tc_init();
- }
- 
- /* --------------------------------------------------------------------
-@@ -304,34 +329,34 @@
- static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 	7,	/* Advanced Interrupt Controller (FIQ) */
- 	7,	/* System Peripherals */
--	0,	/* Parallel IO Controller A */
--	0,	/* Parallel IO Controller B */
--	0,	/* Parallel IO Controller C, D and E */
-+	1,	/* Parallel IO Controller A */
-+	1,	/* Parallel IO Controller B */
-+	1,	/* Parallel IO Controller C, D and E */
- 	0,
- 	0,
--	6,	/* USART 0 */
--	6,	/* USART 1 */
--	6,	/* USART 2 */
-+	5,	/* USART 0 */
-+	5,	/* USART 1 */
-+	5,	/* USART 2 */
- 	0,	/* Multimedia Card Interface 0 */
- 	0,	/* Multimedia Card Interface 1 */
--	4,	/* CAN */
--	0,	/* Two-Wire Interface */
--	6,	/* Serial Peripheral Interface 0 */
--	6,	/* Serial Peripheral Interface 1 */
--	5,	/* Serial Synchronous Controller 0 */
--	5,	/* Serial Synchronous Controller 1 */
--	6,	/* AC97 Controller */
-+	3,	/* CAN */
-+	6,	/* Two-Wire Interface */
-+	5,	/* Serial Peripheral Interface 0 */
-+	5,	/* Serial Peripheral Interface 1 */
-+	4,	/* Serial Synchronous Controller 0 */
-+	4,	/* Serial Synchronous Controller 1 */
-+	5,	/* AC97 Controller */
- 	0,	/* Timer Counter 0, 1 and 2 */
- 	0,	/* Pulse Width Modulation Controller */
- 	3,	/* Ethernet */
- 	0,
- 	0,	/* 2D Graphic Engine */
--	3,	/* USB Device Port */
-+	2,	/* USB Device Port */
- 	0,	/* Image Sensor Interface */
- 	3,	/* LDC Controller */
- 	0,	/* DMA Controller */
- 	0,
--	3,	/* USB Host port */
-+	2,	/* USB Host port */
- 	0,	/* Advanced Interrupt Controller (IRQ0) */
- 	0,	/* Advanced Interrupt Controller (IRQ1) */
- };
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9263_devices.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9263_devices.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9263_devices.c	(arbetskopia)
-@@ -13,7 +13,10 @@
- #include <asm/mach/map.h>
- 
- #include <linux/platform_device.h>
-+#include <linux/fb.h>
- 
-+#include <video/atmel_lcdc.h>
-+
- #include <asm/arch/board.h>
- #include <asm/arch/gpio.h>
- #include <asm/arch/at91sam9263.h>
-@@ -625,6 +628,56 @@
- 
- 
- /* --------------------------------------------------------------------
-+ *  Image Sensor Interface
-+ * -------------------------------------------------------------------- */
-+
-+#if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
-+
-+struct resource isi_resources[] = {
-+	[0] = {
-+		.start	= AT91SAM9263_BASE_ISI,
-+		.end	= AT91SAM9263_BASE_ISI + SZ_16K - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= AT91SAM9263_ID_ISI,
-+		.end	= AT91SAM9263_ID_ISI,
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device at91sam9263_isi_device = {
-+	.name		= "at91_isi",
-+	.id		= -1,
-+	.resource	= isi_resources,
-+	.num_resources	= ARRAY_SIZE(isi_resources),
-+};
-+
-+void __init at91_add_device_isi(void)
-+{
-+	at91_set_A_periph(AT91_PIN_PE0, 0);	/* ISI_D0 */
-+	at91_set_A_periph(AT91_PIN_PE1, 0);	/* ISI_D1 */
-+	at91_set_A_periph(AT91_PIN_PE2, 0);	/* ISI_D2 */
-+	at91_set_A_periph(AT91_PIN_PE3, 0);	/* ISI_D3 */
-+	at91_set_A_periph(AT91_PIN_PE4, 0);	/* ISI_D4 */
-+	at91_set_A_periph(AT91_PIN_PE5, 0);	/* ISI_D5 */
-+	at91_set_A_periph(AT91_PIN_PE6, 0);	/* ISI_D6 */
-+	at91_set_A_periph(AT91_PIN_PE7, 0);	/* ISI_D7 */
-+	at91_set_A_periph(AT91_PIN_PE8, 0);	/* ISI_PCK */
-+	at91_set_A_periph(AT91_PIN_PE9, 0);	/* ISI_HSYNC */
-+	at91_set_A_periph(AT91_PIN_PE10, 0);	/* ISI_VSYNC */
-+	at91_set_B_periph(AT91_PIN_PE11, 0);	/* ISI_MCK (PCK3) */
-+	at91_set_B_periph(AT91_PIN_PE12, 0);	/* ISI_PD8 */
-+	at91_set_B_periph(AT91_PIN_PE13, 0);	/* ISI_PD9 */
-+	at91_set_B_periph(AT91_PIN_PE14, 0);	/* ISI_PD10 */
-+	at91_set_B_periph(AT91_PIN_PE15, 0);	/* ISI_PD11 */
-+}
-+#else
-+void __init at91_add_device_isi(void) {}
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-  *  LCD Controller
-  * -------------------------------------------------------------------- */
- 
-@@ -715,6 +768,32 @@
- #endif
- 
- 
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+	.name		= "at91_leds",
-+	.id		= -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+	if (!nr)
-+		return;
-+
-+	at91_leds.dev.platform_data = leds;
-+
-+	for ( ; nr; nr--, leds++) {
-+		leds->index = nr;	/* first record stores number of leds */
-+		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+	}
-+
-+	platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
-  *  UART
-  * -------------------------------------------------------------------- */
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-chub.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-chub.c	(revision 0)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-chub.c	(revision 0)
-@@ -0,0 +1,132 @@
-+/*
-+ * linux/arch/arm/mach-at91/board-chub.c
-+ *
-+ *  Copyright (C) 2005 SAN People, adapted for Promwad Chub board
-+ *  by Kuten Ivan
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/setup.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach/irq.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#include "generic.h"
-+
-+/*
-+ * Serial port configuration.
-+ *    0 .. 3 = USART0 .. USART3
-+ *    4      = DBGU
-+ */
-+static struct at91_uart_config __initdata chub_uart_config = {
-+	.console_tty	= 0,				/* ttyS0 */
-+	.nr_tty		= 5,
-+	.tty_map	= { 4, 0, 1, 2, 3 }		/* ttyS0, ..., ttyS4 */
-+};
-+
-+static void __init chub_init_irq(void)
-+{
-+	at91rm9200_init_interrupts(NULL);
-+}
-+
-+static void __init chub_map_io(void)
-+{
-+	/* Initialize clocks: 18.432 MHz crystal */
-+	at91rm9200_initialize(18432000, AT91RM9200_PQFP);
-+
-+	/* Setup the serial ports and console */
-+	at91_init_serial(&chub_uart_config);
-+}
-+
-+static struct at91_eth_data __initdata chub_eth_data = {
-+	.phy_irq_pin	= AT91_PIN_PB29,
-+	.is_rmii	= 0,
-+};
-+
-+static struct mtd_partition __initdata chub_nand_partition[] = {
-+	{
-+		.name	= "NAND Partition 1",
-+		.offset = 0,
-+		.size	= MTDPART_SIZ_FULL,
-+	},
-+};
-+
-+static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
-+{
-+	*num_partitions = ARRAY_SIZE(chub_nand_partition);
-+	return chub_nand_partition;
-+}
-+
-+static struct at91_nand_data __initdata chub_nand_data = {
-+	.ale		= 22,
-+	.cle		= 21,
-+	.enable_pin	= AT91_PIN_PA27,
-+	.partition_info	= nand_partitions,
-+};
-+
-+static struct spi_board_info chub_spi_devices[] = {
-+	{	/* DataFlash chip */
-+		.modalias	= "mtd_dataflash",
-+		.chip_select	= 0,
-+		.max_speed_hz	= 15 * 1000 * 1000,
-+	},
-+};
-+
-+static void __init chub_board_init(void)
-+{
-+	/* Serial */
-+	at91_add_device_serial();
-+	/* I2C */
-+	at91_add_device_i2c();
-+	/* Ethernet */
-+	at91_add_device_eth(&chub_eth_data);
-+	/* SPI */
-+	at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices));
-+	/* NAND Flash */
-+	at91_add_device_nand(&chub_nand_data);
-+	/* Disable write protect for NAND */
-+	at91_set_gpio_output(AT91_PIN_PB7, 1);
-+	/* Power enable for 3x RS-232 and 1x RS-485 */
-+	at91_set_gpio_output(AT91_PIN_PB9, 1);
-+	/* Disable write protect for FRAM */
-+	at91_set_gpio_output(AT91_PIN_PA21, 1);
-+	/* Disable write protect for Dataflash */
-+	at91_set_gpio_output(AT91_PIN_PA19, 1);
-+}
-+
-+MACHINE_START(CHUB, "Promwad Chub")
-+	/* Maintainer: Ivan Kuten AT Promwad DOT com */
-+	.phys_io	= AT91_BASE_SYS,
-+	.io_pg_offst	= (AT91_VA_BASE_SYS >> 18) & 0xfffc,
-+	.boot_params	= AT91_SDRAM_BASE + 0x100,
-+	.timer		= &at91rm9200_timer,
-+	.map_io		= chub_map_io,
-+	.init_irq	= chub_init_irq,
-+	.init_machine	= chub_board_init,
-+MACHINE_END
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-sam9261ek.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-sam9261ek.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-sam9261ek.c	(arbetskopia)
-@@ -27,7 +27,10 @@
- #include <linux/spi/spi.h>
- #include <linux/spi/ads7846.h>
- #include <linux/dm9000.h>
-+#include <linux/fb.h>
- 
-+#include <video/atmel_lcdc.h>
-+
- #include <asm/hardware.h>
- #include <asm/setup.h>
- #include <asm/mach-types.h>
-@@ -251,6 +254,7 @@
- 		.bus_num	= 0,
- 		.platform_data	= &ads_info,
- 		.irq		= AT91SAM9261_ID_IRQ0,
-+		.controller_data = AT91_PIN_PA28,	/* CS pin */
- 	},
- #endif
- #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
-@@ -271,6 +275,65 @@
- };
- 
- 
-+/*
-+ * LCD Controller
-+ */
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static struct fb_videomode at91_tft_vga_modes[] = {
-+	{
-+	        .name           = "TX09D50VM1CCA @ 60",
-+		.refresh	= 60,
-+		.xres		= 240,		.yres		= 320,
-+		.pixclock	= KHZ2PICOS(4965),
-+
-+		.left_margin	= 1,		.right_margin	= 33,
-+		.upper_margin	= 1,		.lower_margin	= 0,
-+		.hsync_len	= 5,		.vsync_len	= 1,
-+
-+		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-+		.vmode		= FB_VMODE_NONINTERLACED,
-+	},
-+};
-+
-+static struct fb_monspecs at91fb_default_monspecs = {
-+	.manufacturer	= "HIT",
-+	.monitor        = "TX09D50VM1CCA",
-+
-+	.modedb		= at91_tft_vga_modes,
-+	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
-+	.hfmin		= 15000,
-+	.hfmax		= 64000,
-+	.vfmin		= 50,
-+	.vfmax		= 150,
-+};
-+
-+#define AT91SAM9261_DEFAULT_LCDCON2 	(ATMEL_LCDC_MEMOR_LITTLE \
-+					| ATMEL_LCDC_DISTYPE_TFT    \
-+					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-+
-+static void at91_lcdc_power_control(int on)
-+{
-+	if (on)
-+		at91_set_gpio_value(AT91_PIN_PA12, 0);	/* power up */
-+	else
-+		at91_set_gpio_value(AT91_PIN_PA12, 1);	/* power down */
-+}
-+
-+/* Driver datas */
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
-+	.default_bpp			= 16,
-+	.default_dmacon			= ATMEL_LCDC_DMAEN,
-+	.default_lcdcon2		= AT91SAM9261_DEFAULT_LCDCON2,
-+	.default_monspecs		= &at91fb_default_monspecs,
-+	.atmel_lcdfb_power_control	= at91_lcdc_power_control,
-+	.guard_time			= 1,
-+};
-+
-+#else
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data;
-+#endif
-+
-+
- static void __init ek_board_init(void)
- {
- 	/* Serial */
-@@ -296,6 +359,8 @@
- 	/* MMC */
- 	at91_add_device_mmc(0, &ek_mmc_data);
- #endif
-+	/* LCD Controller */
-+	at91_add_device_lcdc(&ek_lcdc_data);
- }
- 
- MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-sam9263ek.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-sam9263ek.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-sam9263ek.c	(arbetskopia)
-@@ -26,7 +26,10 @@
- #include <linux/platform_device.h>
- #include <linux/spi/spi.h>
- #include <linux/spi/ads7846.h>
-+#include <linux/fb.h>
- 
-+#include <video/atmel_lcdc.h>
-+
- #include <asm/hardware.h>
- #include <asm/setup.h>
- #include <asm/mach-types.h>
-@@ -202,6 +205,65 @@
- 
- 
- /*
-+ * LCD Controller
-+ */
-+#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
-+static struct fb_videomode at91_tft_vga_modes[] = {
-+	{
-+	        .name           = "TX09D50VM1CCA @ 60",
-+		.refresh	= 60,
-+		.xres		= 240,		.yres		= 320,
-+		.pixclock	= KHZ2PICOS(4965),
-+
-+		.left_margin	= 1,		.right_margin	= 33,
-+		.upper_margin	= 1,		.lower_margin	= 0,
-+		.hsync_len	= 5,		.vsync_len	= 1,
-+
-+		.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
-+		.vmode		= FB_VMODE_NONINTERLACED,
-+	},
-+};
-+
-+static struct fb_monspecs at91fb_default_monspecs = {
-+	.manufacturer	= "HIT",
-+	.monitor        = "TX09D70VM1CCA",
-+
-+	.modedb		= at91_tft_vga_modes,
-+	.modedb_len	= ARRAY_SIZE(at91_tft_vga_modes),
-+	.hfmin		= 15000,
-+	.hfmax		= 64000,
-+	.vfmin		= 50,
-+	.vfmax		= 150,
-+};
-+
-+#define AT91SAM9263_DEFAULT_LCDCON2 	(ATMEL_LCDC_MEMOR_LITTLE \
-+					| ATMEL_LCDC_DISTYPE_TFT    \
-+					| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
-+
-+static void at91_lcdc_power_control(int on)
-+{
-+	if (on)
-+		at91_set_gpio_value(AT91_PIN_PD12, 0);	/* power up */
-+	else
-+		at91_set_gpio_value(AT91_PIN_PD12, 1);	/* power down */
-+}
-+
-+/* Driver datas */
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
-+	.default_bpp			= 16,
-+	.default_dmacon			= ATMEL_LCDC_DMAEN,
-+	.default_lcdcon2		= AT91SAM9263_DEFAULT_LCDCON2,
-+	.default_monspecs		= &at91fb_default_monspecs,
-+	.atmel_lcdfb_power_control	= at91_lcdc_power_control,
-+	.guard_time			= 1,
-+};
-+
-+#else
-+static struct atmel_lcdfb_info __initdata ek_lcdc_data;
-+#endif
-+
-+
-+/*
-  * AC97
-  */
- static struct atmel_ac97_data ek_ac97_data = {
-@@ -230,6 +292,8 @@
- 	at91_add_device_nand(&ek_nand_data);
- 	/* I2C */
- 	at91_add_device_i2c();
-+	/* LCD Controller */
-+	at91_add_device_lcdc(&ek_lcdc_data);
- 	/* AC97 */
- 	at91_add_device_ac97(&ek_ac97_data);
- }
-Index: linux-2.6.22.1/arch/arm/mach-at91/generic.h
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/generic.h	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/generic.h	(arbetskopia)
-@@ -36,6 +36,7 @@
-  /* Power Management */
- extern void at91_irq_suspend(void);
- extern void at91_irq_resume(void);
-+extern int at91_suspend_entering_slow_clock(void);
- 
-  /* GPIO */
- #define AT91RM9200_PQFP		3	/* AT91RM9200 PQFP package has 3 banks */
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-ek.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-ek.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-ek.c	(arbetskopia)
-@@ -73,6 +73,187 @@
- 	at91rm9200_init_interrupts(NULL);
- }
- 
-+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
-+#include <video/s1d13xxxfb.h>
-+#include <asm/arch/ics1523.h>
-+
-+/* EPSON S1D13806 FB */
-+#define AT91_FB_REG_BASE	0x40000000L
-+#define	AT91_FB_REG_SIZE	0x200
-+#define AT91_FB_VMEM_BASE	0x40200000L
-+#define AT91_FB_VMEM_SIZE	0x140000L
-+
-+static void __init ek_init_video(void)
-+{
-+	/* NWAIT Signal */
-+	at91_set_A_periph(AT91_PIN_PC6, 0);
-+
-+	/* Initialization of the Static Memory Controller for Chip Select 3 */
-+	at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16			/* 16 bit */
-+				| AT91_SMC_WSEN | AT91_SMC_NWS_(5)	/* wait states */
-+				| AT91_SMC_TDF_(1)			/* float time */
-+	);
-+
-+	at91_ics1523_init();
-+}
-+
-+/* CRT:    (active)   640x480 60Hz (PCLK=CLKI=25.175MHz)
-+   Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
-+static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
-+	{S1DREG_MISC,			0x00},	/* Enable Memory/Register select bit */
-+	{S1DREG_COM_DISP_MODE,		0x00},	/* disable display output */
-+	{S1DREG_GPIO_CNF0,		0xFF},	// 0x00
-+	{S1DREG_GPIO_CNF1,		0x1F},	// 0x08
-+	{S1DREG_GPIO_CTL0,		0x00},
-+	{S1DREG_GPIO_CTL1,		0x00},
-+	{S1DREG_CLK_CNF,		0x01},	/* no divide, MCLK source is CLKI3 0x02*/
-+	{S1DREG_LCD_CLK_CNF,		0x00},
-+	{S1DREG_CRT_CLK_CNF,		0x00},
-+	{S1DREG_MPLUG_CLK_CNF,		0x00},
-+	{S1DREG_CPU2MEM_WST_SEL,	0x01},	/* 2*period(MCLK) - 4ns > period(BCLK) */
-+	{S1DREG_SDRAM_REF_RATE,		0x03},	/* 32768 <= MCLK <= 50000 (MHz) */
-+	{S1DREG_SDRAM_TC0,		0x00},	/* MCLK source freq (MHz): */
-+	{S1DREG_SDRAM_TC1,		0x01},	/* 42 <= MCLK <= 50 */
-+	{S1DREG_MEM_CNF,		0x80},	/* SDRAM Initialization - needed before mem access */
-+	{S1DREG_PANEL_TYPE,		0x25},	/* std TFT 16bit, 8bit SCP format 2, single passive LCD */
-+	{S1DREG_MOD_RATE,		0x00},	/* toggle every FPFRAME */
-+	{S1DREG_LCD_DISP_HWIDTH,	0x4F},	/* 680 pix */
-+	{S1DREG_LCD_NDISP_HPER,		0x12},	/* 152 pix */
-+	{S1DREG_TFT_FPLINE_START,	0x01},	/* 13 pix */
-+	{S1DREG_TFT_FPLINE_PWIDTH,	0x0B},	/* 96 pix */
-+	{S1DREG_LCD_DISP_VHEIGHT0,	0xDF},
-+	{S1DREG_LCD_DISP_VHEIGHT1,	0x01},	/* 480 lines */
-+	{S1DREG_LCD_NDISP_VPER,		0x2C},	/* 44 lines */
-+	{S1DREG_TFT_FPFRAME_START,	0x0A},	/* 10 lines */
-+	{S1DREG_TFT_FPFRAME_PWIDTH,	0x01},	/* 2 lines */
-+	{S1DREG_LCD_DISP_MODE,		0x05},  /* 16 bpp */
-+	{S1DREG_LCD_MISC,		0x00},	/* dithering enabled, dual panel buffer enabled */
-+	{S1DREG_LCD_DISP_START0,	0x00},
-+	{S1DREG_LCD_DISP_START1,	0xC8},
-+	{S1DREG_LCD_DISP_START2,	0x00},
-+	{S1DREG_LCD_MEM_OFF0,		0x80},
-+	{S1DREG_LCD_MEM_OFF1,		0x02},
-+	{S1DREG_LCD_PIX_PAN,		0x00},
-+	{S1DREG_LCD_DISP_FIFO_HTC,	0x3B},
-+	{S1DREG_LCD_DISP_FIFO_LTC,	0x3C},
-+	{S1DREG_CRT_DISP_HWIDTH,	0x4F},	/* 680 pix */
-+	{S1DREG_CRT_NDISP_HPER,		0x13},	/* 160 pix */
-+	{S1DREG_CRT_HRTC_START,		0x01},	/* 13 pix */
-+	{S1DREG_CRT_HRTC_PWIDTH,	0x0B},	/* 96 pix */
-+	{S1DREG_CRT_DISP_VHEIGHT0,	0xDF},
-+	{S1DREG_CRT_DISP_VHEIGHT1,	0x01},	/* 480 lines */
-+	{S1DREG_CRT_NDISP_VPER,		0x2B},	/* 44 lines */
-+	{S1DREG_CRT_VRTC_START,		0x09},	/* 10 lines */
-+	{S1DREG_CRT_VRTC_PWIDTH,	0x01},	/* 2 lines */
-+	{S1DREG_TV_OUT_CTL,		0x10},
-+	{0x005E,			0x9F},
-+	{0x005F,			0x00},
-+	{S1DREG_CRT_DISP_MODE,		0x05},	/* 16 bpp */
-+	{S1DREG_CRT_DISP_START0,	0x00},
-+	{S1DREG_CRT_DISP_START1,	0x00},
-+	{S1DREG_CRT_DISP_START2,	0x00},
-+	{S1DREG_CRT_MEM_OFF0,		0x80},
-+	{S1DREG_CRT_MEM_OFF1,		0x02},
-+	{S1DREG_CRT_PIX_PAN,		0x00},
-+	{S1DREG_CRT_DISP_FIFO_HTC,	0x3B},
-+	{S1DREG_CRT_DISP_FIFO_LTC,	0x3C},
-+	{S1DREG_LCD_CUR_CTL,		0x00},	/* inactive */
-+	{S1DREG_LCD_CUR_START,		0x01},
-+	{S1DREG_LCD_CUR_XPOS0,		0x00},
-+	{S1DREG_LCD_CUR_XPOS1,		0x00},
-+	{S1DREG_LCD_CUR_YPOS0,		0x00},
-+	{S1DREG_LCD_CUR_YPOS1,		0x00},
-+	{S1DREG_LCD_CUR_BCTL0,		0x00},
-+	{S1DREG_LCD_CUR_GCTL0,		0x00},
-+	{S1DREG_LCD_CUR_RCTL0,		0x00},
-+	{S1DREG_LCD_CUR_BCTL1,		0x1F},
-+	{S1DREG_LCD_CUR_GCTL1,		0x3F},
-+	{S1DREG_LCD_CUR_RCTL1,		0x1F},
-+	{S1DREG_LCD_CUR_FIFO_HTC,	0x00},
-+	{S1DREG_CRT_CUR_CTL,		0x00},	/* inactive */
-+	{S1DREG_CRT_CUR_START,		0x01},
-+	{S1DREG_CRT_CUR_XPOS0,		0x00},
-+	{S1DREG_CRT_CUR_XPOS1,		0x00},
-+	{S1DREG_CRT_CUR_YPOS0,		0x00},
-+	{S1DREG_CRT_CUR_YPOS1,		0x00},
-+	{S1DREG_CRT_CUR_BCTL0,		0x00},
-+	{S1DREG_CRT_CUR_GCTL0,		0x00},
-+	{S1DREG_CRT_CUR_RCTL0,		0x00},
-+	{S1DREG_CRT_CUR_BCTL1,		0x1F},
-+	{S1DREG_CRT_CUR_GCTL1,		0x3F},
-+	{S1DREG_CRT_CUR_RCTL1,		0x1F},
-+	{S1DREG_CRT_CUR_FIFO_HTC,	0x00},
-+	{S1DREG_BBLT_CTL0,		0x00},
-+	{S1DREG_BBLT_CTL0,		0x00},
-+	{S1DREG_BBLT_CC_EXP,		0x00},
-+	{S1DREG_BBLT_OP,		0x00},
-+	{S1DREG_BBLT_SRC_START0,	0x00},
-+	{S1DREG_BBLT_SRC_START1,	0x00},
-+	{S1DREG_BBLT_SRC_START2,	0x00},
-+	{S1DREG_BBLT_DST_START0,	0x00},
-+	{S1DREG_BBLT_DST_START1,	0x00},
-+	{S1DREG_BBLT_DST_START2,	0x00},
-+	{S1DREG_BBLT_MEM_OFF0,		0x00},
-+	{S1DREG_BBLT_MEM_OFF1,		0x00},
-+	{S1DREG_BBLT_WIDTH0,		0x00},
-+	{S1DREG_BBLT_WIDTH1,		0x00},
-+	{S1DREG_BBLT_HEIGHT0,		0x00},
-+	{S1DREG_BBLT_HEIGHT1,		0x00},
-+	{S1DREG_BBLT_BGC0,		0x00},
-+	{S1DREG_BBLT_BGC1,		0x00},
-+	{S1DREG_BBLT_FGC0,		0x00},
-+	{S1DREG_BBLT_FGC1,		0x00},
-+	{S1DREG_LKUP_MODE,		0x00},	/* LCD LUT r | LCD and CRT/TV LUT w */
-+	{S1DREG_LKUP_ADDR,		0x00},
-+	{S1DREG_PS_CNF,			0x10},	/* Power Save disable */
-+	{S1DREG_PS_STATUS,		0x02},	/* LCD Panel down, mem up */
-+	{S1DREG_CPU2MEM_WDOGT,		0x00},
-+	{S1DREG_COM_DISP_MODE,		0x02},	/* enable CRT display output */
-+};
-+
-+static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
-+	.initregs		= ek_s1dfb_initregs,
-+	.initregssize		= ARRAY_SIZE(ek_s1dfb_initregs),
-+	.platform_init_video	= ek_init_video,
-+};
-+
-+static u64 s1dfb_dmamask = 0xffffffffUL;
-+
-+static struct resource ek_s1dfb_resource[] = {
-+	[0] = {	/* video mem */
-+		.name   = "s1d13806 memory",
-+		.start  = AT91_FB_VMEM_BASE,
-+		.end    = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
-+		.flags  = IORESOURCE_MEM,
-+	},
-+	[1] = {	/* video registers */
-+		.name   = "s1d13806 registers",
-+		.start  = AT91_FB_REG_BASE,
-+		.end    = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
-+		.flags  = IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct platform_device ek_s1dfb_device = {
-+	.name		= "s1d13806fb",
-+	.id		= -1,
-+	.dev		= {
-+			.dma_mask		= &s1dfb_dmamask,
-+			.coherent_dma_mask	= 0xffffffff,
-+			.platform_data		= &ek_s1dfb_pdata,
-+	},
-+	.resource	= ek_s1dfb_resource,
-+	.num_resources	= ARRAY_SIZE(ek_s1dfb_resource),
-+};
-+
-+static void __init ek_add_device_video(void)
-+{
-+	platform_device_register(&ek_s1dfb_device);
-+}
-+#else
-+static void __init ek_add_device_video(void) {}
-+#endif
-+
- static struct at91_eth_data __initdata ek_eth_data = {
- 	.phy_irq_pin	= AT91_PIN_PC4,
- 	.is_rmii	= 1,
-@@ -113,7 +294,7 @@
- #define EK_FLASH_SIZE	0x200000
- 
- static struct physmap_flash_data ek_flash_data = {
--	.width	= 2,
-+	.width		= 2,
- };
- 
- static struct resource ek_flash_resource = {
-@@ -132,6 +313,18 @@
- 	.num_resources	= 1,
- };
- 
-+static struct at91_gpio_led ek_leds[] = {
-+	{
-+		.name		= "led0",
-+		.gpio		= AT91_PIN_PB1,
-+		.trigger	= "heartbeat",
-+	},
-+	{
-+		.name		= "led1",
-+		.gpio		= AT91_PIN_PB2,
-+		.trigger	= "timer",
-+	}
-+};
- 
- static void __init ek_board_init(void)
- {
-@@ -158,8 +351,10 @@
- #endif
- 	/* NOR Flash */
- 	platform_device_register(&ek_flash);
-+	/* LEDs */
-+	at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
- 	/* VGA */
--//	ek_add_device_video();
-+	ek_add_device_video();
- }
- 
- MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91rm9200.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91rm9200.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91rm9200.c	(arbetskopia)
-@@ -267,6 +267,33 @@
- 
- 
- /* --------------------------------------------------------------------
-+ *  Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91rm9200_tcblocks[] = {
-+	[0] = {
-+		.physaddr	= AT91RM9200_BASE_TCB0,
-+		.irq		= { AT91RM9200_ID_TC0, AT91RM9200_ID_TC1, AT91RM9200_ID_TC2 },
-+		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
-+	},
-+	[1] = {
-+		.physaddr	= AT91RM9200_BASE_TCB1,
-+		.irq		= { AT91RM9200_ID_TC3, AT91RM9200_ID_TC4, AT91RM9200_ID_TC5 },
-+		.clk		= { &tc3_clk, &tc4_clk, &tc5_clk },
-+	},
-+};
-+
-+#define at91rm9200_tc_init()	atmel_tc_init(at91rm9200_tcblocks, ARRAY_SIZE(at91rm9200_tcblocks))
-+
-+#else
-+#define at91rm9200_tc_init()	do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-  *  AT91RM9200 processor initialization
-  * -------------------------------------------------------------------- */
- void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks)
-@@ -288,6 +315,9 @@
- 
- 	/* Initialize GPIO subsystem */
- 	at91_gpio_init(at91rm9200_gpio, banks);
-+
-+	/* Initialize the Timer/Counter blocks */
-+	at91rm9200_tc_init();
- }
- 
- 
-@@ -301,28 +331,28 @@
- static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = {
- 	7,	/* Advanced Interrupt Controller (FIQ) */
- 	7,	/* System Peripherals */
--	0,	/* Parallel IO Controller A */
--	0,	/* Parallel IO Controller B */
--	0,	/* Parallel IO Controller C */
--	0,	/* Parallel IO Controller D */
--	6,	/* USART 0 */
--	6,	/* USART 1 */
--	6,	/* USART 2 */
--	6,	/* USART 3 */
-+	1,	/* Parallel IO Controller A */
-+	1,	/* Parallel IO Controller B */
-+	1,	/* Parallel IO Controller C */
-+	1,	/* Parallel IO Controller D */
-+	5,	/* USART 0 */
-+	5,	/* USART 1 */
-+	5,	/* USART 2 */
-+	5,	/* USART 3 */
- 	0,	/* Multimedia Card Interface */
--	4,	/* USB Device Port */
--	0,	/* Two-Wire Interface */
--	6,	/* Serial Peripheral Interface */
--	5,	/* Serial Synchronous Controller 0 */
--	5,	/* Serial Synchronous Controller 1 */
--	5,	/* Serial Synchronous Controller 2 */
-+	2,	/* USB Device Port */
-+	6,	/* Two-Wire Interface */
-+	5,	/* Serial Peripheral Interface */
-+	4,	/* Serial Synchronous Controller 0 */
-+	4,	/* Serial Synchronous Controller 1 */
-+	4,	/* Serial Synchronous Controller 2 */
- 	0,	/* Timer Counter 0 */
- 	0,	/* Timer Counter 1 */
- 	0,	/* Timer Counter 2 */
- 	0,	/* Timer Counter 3 */
- 	0,	/* Timer Counter 4 */
- 	0,	/* Timer Counter 5 */
--	3,	/* USB Host port */
-+	2,	/* USB Host port */
- 	3,	/* Ethernet MAC */
- 	0,	/* Advanced Interrupt Controller (IRQ0) */
- 	0,	/* Advanced Interrupt Controller (IRQ1) */
-Index: linux-2.6.22.1/arch/arm/mach-at91/ics1523.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/ics1523.c	(revision 0)
-+++ linux-2.6.22.1/arch/arm/mach-at91/ics1523.c	(revision 0)
-@@ -0,0 +1,207 @@
-+/*
-+ * arch/arm/mach-at91rm9200/ics1523.c
-+ *
-+ *  Copyright (C) 2003 ATMEL Rousset
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+#include <asm/hardware.h>
-+#include <asm/io.h>
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+
-+#include <asm/arch/ics1523.h>
-+#include <asm/arch/at91_twi.h>
-+#include <asm/arch/gpio.h>
-+
-+/* TWI Errors */
-+#define	AT91_TWI_ERROR	(AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
-+
-+
-+static void __iomem *twi_base;
-+
-+#define at91_twi_read(reg)		__raw_readl(twi_base + (reg))
-+#define at91_twi_write(reg, val)	__raw_writel((val), twi_base + (reg))
-+
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization of TWI CLOCK
-+ * ----------------------------------------------------------------------------- */
-+
-+static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
-+{
-+	int sclock;
-+
-+	/* Here, CKDIV = 1 and CHDIV = CLDIV  ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
-+	sclock = (10*mck_khz / ICS_TRANSFER_RATE);
-+	if (sclock % 10 >= 5)
-+		sclock = (sclock /10) - 5;
-+	else
-+		sclock = (sclock /10)- 6;
-+	sclock = (sclock + (4 - sclock %4)) >> 2;	/* div 4 */
-+
-+	at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Read a byte with TWI Interface from the Clock Generator ICS1523
-+ * ----------------------------------------------------------------------------- */
-+
-+static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
-+{
-+	int Status, nb_trial;
-+
-+	at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
-+	at91_twi_write(AT91_TWI_IADR, reg_address);
-+	at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
-+
-+	/* Program temporizing period (300us) */
-+	udelay(300);
-+
-+	/* Wait TXcomplete ... */
-+	nb_trial = 0;
-+	Status = at91_twi_read(AT91_TWI_SR);
-+	while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
-+		nb_trial++;
-+		Status = at91_twi_read(AT91_TWI_SR);
-+	}
-+
-+	if (Status & AT91_TWI_TXCOMP) {
-+		*data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
-+		return ICS1523_ACCESS_OK;
-+	}
-+	else
-+		return ICS1523_ACCESS_ERROR;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Write a byte with TWI Interface to the Clock Generator ICS1523
-+ * ----------------------------------------------------------------------------- */
-+
-+static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
-+{
-+	int Status, nb_trial;
-+
-+	at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
-+	at91_twi_write(AT91_TWI_IADR, reg_address);
-+	at91_twi_write(AT91_TWI_THR, data_out);
-+	at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
-+
-+	/* Program temporizing period (300us) */
-+	udelay(300);
-+
-+	nb_trial = 0;
-+	Status = at91_twi_read(AT91_TWI_SR);
-+	while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
-+		nb_trial++;
-+		if (Status & AT91_TWI_ERROR) {
-+			/* If Underrun OR NACK - Start again */
-+			at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
-+
-+			/*  Program temporizing period (300us) */
-+			udelay(300);
-+		}
-+		Status = at91_twi_read(AT91_TWI_SR);
-+	};
-+
-+	if (Status & AT91_TWI_TXCOMP)
-+		return ICS1523_ACCESS_OK;
-+	else
-+		return ICS1523_ACCESS_ERROR;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization of the Clock Generator ICS1523
-+ * ----------------------------------------------------------------------------- */
-+
-+int at91_ics1523_init(void)
-+{
-+	int		nb_trial;
-+	int		ack = ICS1523_ACCESS_OK;
-+	unsigned int	status = 0xffffffff;
-+	struct clk	*twi_clk;
-+
-+	/* Map in TWI peripheral */
-+	twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
-+	if (!twi_base)
-+		return -ENOMEM;
-+
-+	/* pins used for TWI interface */
-+	at91_set_A_periph(AT91_PIN_PA25, 0);            /* TWD */
-+	at91_set_multi_drive(AT91_PIN_PA25, 1);
-+	at91_set_A_periph(AT91_PIN_PA26, 0);            /* TWCK */
-+	at91_set_multi_drive(AT91_PIN_PA26, 1);
-+
-+	/* Enable the TWI clock */
-+	twi_clk = clk_get(NULL, "twi_clk");
-+	if (IS_ERR(twi_clk))
-+		return ICS1523_ACCESS_ERROR;
-+	clk_enable(twi_clk);
-+
-+	/* Disable interrupts */
-+	at91_twi_write(AT91_TWI_IDR, -1);
-+
-+	/* Reset peripheral */
-+	at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
-+
-+	/* Set Master mode */
-+	at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
-+
-+	/* Set TWI Clock Waveform Generator Register */
-+	at91_ics1523_SetTwiClock(60000);     /* MCK in KHz = 60000 KHz */
-+
-+	/* ICS1523 Initialisation */
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
-+
-+	nb_trial = 0;
-+	do {
-+		nb_trial++;
-+		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
-+		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
-+		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
-+		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
-+		ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
-+
-+		/* Program 1ms temporizing period */
-+		mdelay(1);
-+
-+		at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
-+	} while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
-+
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
-+
-+	/* Program 1ms temporizing period */
-+	mdelay(1);
-+
-+	ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
-+
-+	/* Program 1ms temporizing period */
-+	mdelay(1);
-+	
-+	/* All done - cleanup */
-+	iounmap(twi_base);
-+	clk_disable(twi_clk);
-+	clk_put(twi_clk);
-+
-+	return ack;
-+}
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91rm9200_devices.c	(arbetskopia)
-@@ -477,7 +477,18 @@
-  *  SPI
-  * -------------------------------------------------------------------- */
- 
--#if defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) || defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
-+#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)		/* legacy SPI driver */
-+#define SPI_DEVNAME	"at91_spi"
-+
-+#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE)	/* SPI bitbanging driver */
-+#define SPI_DEVNAME	"at91_spi"
-+
-+#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)	/* new SPI driver */
-+#define SPI_DEVNAME	"atmel_spi"
-+
-+#endif
-+
-+#ifdef SPI_DEVNAME
- static u64 spi_dmamask = 0xffffffffUL;
- 
- static struct resource spi_resources[] = {
-@@ -494,7 +505,7 @@
- };
- 
- static struct platform_device at91rm9200_spi_device = {
--	.name		= "at91_spi",
-+	.name		= SPI_DEVNAME,
- 	.id		= 0,
- 	.dev		= {
- 				.dma_mask		= &spi_dmamask,
-@@ -603,6 +614,32 @@
- #endif
- 
- 
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+	.name		= "at91_leds",
-+	.id		= -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+	if (!nr)
-+		return;
-+
-+	at91_leds.dev.platform_data = leds;
-+
-+	for ( ; nr; nr--, leds++) {
-+		leds->index = nr;	/* first record stores number of leds */
-+		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+	}
-+
-+	platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
-  *  UART
-  * -------------------------------------------------------------------- */
-Index: linux-2.6.22.1/arch/arm/mach-at91/Makefile
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/Makefile	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/Makefile	(arbetskopia)
-@@ -8,6 +8,8 @@
- obj-		:=
- 
- obj-$(CONFIG_PM)		+= pm.o
-+obj-$(CONFIG_AT91_SLOW_CLOCK)	+= pm_slowclock.o
-+obj-$(CONFIG_ATMEL_TCLIB)	+= tclib.o
- 
- # CPU-specific support
- obj-$(CONFIG_ARCH_AT91RM9200)	+= at91rm9200.o at91rm9200_time.o at91rm9200_devices.o
-@@ -26,10 +28,12 @@
- obj-$(CONFIG_MACH_KB9200)	+= board-kb9202.o
- obj-$(CONFIG_MACH_ATEB9200)	+= board-eb9200.o
- obj-$(CONFIG_MACH_KAFA)		+= board-kafa.o
-+obj-$(CONFIG_MACH_CHUB)		+= board-chub.o
- obj-$(CONFIG_MACH_PICOTUX2XX)	+= board-picotux200.o
- 
- # AT91SAM9260 board-specific support
- obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
-+obj-$(CONFIG_MACH_CAM60)	+= board-cam60.o
- 
- # AT91SAM9261 board-specific support
- obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
-@@ -51,7 +55,7 @@
- obj-$(CONFIG_LEDS) += $(led-y)
- 
- # VGA support
--#obj-$(CONFIG_FB_S1D13XXX)	+= ics1523.o
-+obj-$(CONFIG_FB_S1D13XXX)	+= ics1523.o
- 
- 
- ifeq ($(CONFIG_PM_DEBUG),y)
-Index: linux-2.6.22.1/arch/arm/mach-at91/tclib.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/tclib.c	(revision 0)
-+++ linux-2.6.22.1/arch/arm/mach-at91/tclib.c	(revision 0)
-@@ -0,0 +1,17 @@
-+#include <linux/clk.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock *blocks;
-+static int nblocks;
-+
-+/*
-+ * Called from the processor-specific init to register the TC Blocks.
-+ */
-+void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n)
-+{
-+	blocks = tcblocks;
-+	nblocks = n;
-+}
-Index: linux-2.6.22.1/arch/arm/mach-at91/tclib.h
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/tclib.h	(revision 0)
-+++ linux-2.6.22.1/arch/arm/mach-at91/tclib.h	(revision 0)
-@@ -0,0 +1,11 @@
-+
-+#define TC_PER_TCB	3
-+
-+struct atmel_tcblock {
-+	u32 		physaddr;
-+	void __iomem	*ioaddr;
-+	struct clk	*clk[TC_PER_TCB];
-+	int		irq[TC_PER_TCB];
-+};
-+
-+extern void __init atmel_tc_init(struct atmel_tcblock *tcblocks, int n);
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9rl.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9rl.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9rl.c	(arbetskopia)
-@@ -246,6 +246,28 @@
- 
- 
- /* --------------------------------------------------------------------
-+ *  Timer/Counter library initialization
-+ * -------------------------------------------------------------------- */
-+#ifdef CONFIG_ATMEL_TCLIB
-+
-+#include "tclib.h"
-+
-+static struct atmel_tcblock at91sam9rl_tcblocks[] = {
-+	[0] = {
-+		.physaddr	= AT91SAM9RL_BASE_TCB0,
-+		.irq		= { AT91SAM9RL_ID_TC0, AT91SAM9RL_ID_TC1, AT91SAM9RL_ID_TC2 },
-+		.clk		= { &tc0_clk, &tc1_clk, &tc2_clk },
-+	}
-+};
-+
-+#define at91sam9rl_tc_init()	atmel_tc_init(at91sam9rl_tcblocks, ARRAY_SIZE(at91sam9rl_tcblocks))
-+
-+#else
-+#define at91sam9rl_tc_init()	do {} while(0)
-+#endif
-+
-+
-+/* --------------------------------------------------------------------
-  *  AT91SAM9RL processor initialization
-  * -------------------------------------------------------------------- */
- 
-@@ -284,6 +306,9 @@
- 
- 	/* Register GPIO subsystem */
- 	at91_gpio_init(at91sam9rl_gpio, 4);
-+	
-+	/* Initialize the Timer/Counter blocks */
-+	at91sam9rl_tc_init();
- }
- 
- /* --------------------------------------------------------------------
-Index: linux-2.6.22.1/arch/arm/mach-at91/at91sam9rl_devices.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/at91sam9rl_devices.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/at91sam9rl_devices.c	(arbetskopia)
-@@ -370,6 +370,32 @@
- #endif
- 
- 
-+#if defined(CONFIG_NEW_LEDS)
-+
-+static struct platform_device at91_leds = {
-+	.name		= "at91_leds",
-+	.id		= -1,
-+};
-+
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr)
-+{
-+	if (!nr)
-+		return;
-+
-+	at91_leds.dev.platform_data = leds;
-+
-+	for ( ; nr; nr--, leds++) {
-+		leds->index = nr;	/* first record stores number of leds */
-+		at91_set_gpio_output(leds->gpio, (leds->flags & 1) == 0);
-+	}
-+
-+	platform_device_register(&at91_leds);
-+}
-+#else
-+void __init at91_gpio_leds(struct at91_gpio_led *leds, int nr) {}
-+#endif
-+
-+
- /* --------------------------------------------------------------------
-  *  UART
-  * -------------------------------------------------------------------- */
-Index: linux-2.6.22.1/arch/arm/mach-at91/pm.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/pm.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/pm.c	(arbetskopia)
-@@ -63,6 +63,7 @@
-  * Verify that all the clocks are correct before entering
-  * slow-clock mode.
-  */
-+#warning "SAM9260 only has 3 programmable clocks."
- static int at91_pm_verify_clocks(void)
- {
- 	unsigned long scsr;
-@@ -103,20 +104,15 @@
- }
- 
- /*
-- * Call this from platform driver suspend() to see how deeply to suspend.
-+ * This is called from clk_must_disable(), to see how deeply to suspend.
-  * For example, some controllers (like OHCI) need one of the PLL clocks
-  * in order to act as a wakeup source, and those are not available when
-  * going into slow clock mode.
-- *
-- * REVISIT: generalize as clk_will_be_available(clk)?  Other platforms have
-- * the very same problem (but not using at91 main_clk), and it'd be better
-- * to add one generic API rather than lots of platform-specific ones.
-  */
- int at91_suspend_entering_slow_clock(void)
- {
- 	return (target_state == PM_SUSPEND_MEM);
- }
--EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
- 
- 
- static void (*slow_clock)(void);
-@@ -205,16 +201,23 @@
- 	.enter		= at91_pm_enter,
- };
- 
-+#ifdef CONFIG_AT91_SLOW_CLOCK
-+extern void at91rm9200_slow_clock(void);
-+extern u32 at91rm9200_slow_clock_sz;
-+#endif
-+
- static int __init at91_pm_init(void)
- {
--	printk("AT91: Power Management\n");
--
--#ifdef CONFIG_AT91_PM_SLOW_CLOCK
--	/* REVISIT allocations of SRAM should be dynamically managed.
-+#ifdef CONFIG_AT91_SLOW_CLOCK
-+	/*
-+	 * REVISIT allocations of SRAM should be dynamically managed.
- 	 * FIQ handlers and other components will want SRAM/TCM too...
- 	 */
--	slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
-+	slow_clock = (void *) (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE + (3 * SZ_4K));
- 	memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
-+	printk("AT91: Power Management (with slow clock mode)\n");
-+#else
-+	printk("AT91: Power Management\n");
- #endif
- 
- 	/* Disable SDRAM low-power mode.  Cannot be used with self-refresh. */
-Index: linux-2.6.22.1/arch/arm/mach-at91/pm_slowclock.S
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/pm_slowclock.S	(revision 0)
-+++ linux-2.6.22.1/arch/arm/mach-at91/pm_slowclock.S	(revision 0)
-@@ -0,0 +1,172 @@
-+/*
-+ * arch/arm/mach-at91/pm_slow_clock.S
-+ *
-+ *  Copyright (C) 2006 Savin Zlobec
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/linkage.h>
-+#include <asm/hardware.h>
-+#include <asm/arch/at91_pmc.h>
-+#include <asm/arch/at91rm9200_mc.h>
-+
-+#define MCKRDY_TIMEOUT		1000
-+#define MOSCRDY_TIMEOUT 	1000
-+#define PLLALOCK_TIMEOUT	1000
-+
-+	.macro wait_mckrdy
-+	mov	r2, #MCKRDY_TIMEOUT
-+1:	sub	r2, r2, #1
-+	cmp	r2, #0
-+	beq	2f
-+	ldr	r3, [r1, #AT91_PMC_SR]
-+	tst	r3, #AT91_PMC_MCKRDY
-+	beq	1b
-+2:
-+	.endm
-+
-+	.macro wait_moscrdy
-+	mov	r2, #MOSCRDY_TIMEOUT
-+1:	sub	r2, r2, #1
-+	cmp	r2, #0
-+	beq	2f
-+	ldr	r3, [r1, #AT91_PMC_SR]
-+	tst	r3, #AT91_PMC_MOSCS
-+	beq	1b
-+2:
-+	.endm
-+
-+	.macro wait_pllalock
-+	mov	r2, #PLLALOCK_TIMEOUT
-+1:	sub	r2, r2, #1
-+	cmp	r2, #0
-+	beq	2f
-+	ldr	r3, [r1, #AT91_PMC_SR]
-+	tst	r3, #AT91_PMC_LOCKA
-+	beq	1b
-+2:
-+	.endm
-+
-+	.macro wait_plladis
-+	mov	r2, #PLLALOCK_TIMEOUT
-+1:	sub	r2, r2, #1
-+	cmp	r2, #0
-+	beq	2f
-+	ldr	r3, [r1, #AT91_PMC_SR]
-+	tst	r3, #AT91_PMC_LOCKA
-+	bne	1b
-+2:
-+	.endm
-+
-+	.text
-+
-+ENTRY(at91rm9200_slow_clock)
-+
-+	ldr	r1, .at91_va_base_sys
-+
-+	/* Put SDRAM in self refresh mode */
-+
-+	b	1f
-+	.align	5
-+1:	mcr	p15, 0, r0, c7, c10, 4
-+	mov	r2, #1
-+	str	r2, [r1, #AT91_SDRAMC_SRR]
-+
-+	/* Save Master clock setting */
-+
-+	ldr	r2, [r1, #AT91_PMC_MCKR]
-+	str	r2, .saved_mckr
-+
-+	/*
-+	 * Set the Master clock source to slow clock
-+	 *
-+	 * First set the CSS field, wait for MCKRDY
-+	 * and than set the PRES and MDIV fields.
-+	 *
-+	 * See eratta #2[78] for details.
-+	 */
-+
-+	bic	r2, r2, #3
-+	str	r2, [r1, #AT91_PMC_MCKR]
-+
-+	wait_mckrdy
-+
-+	mov	r2, #0
-+	str	r2, [r1, #AT91_PMC_MCKR]
-+
-+	/* Save PLLA setting and disable it */
-+
-+	ldr	r2, [r1, #AT91_CKGR_PLLAR]
-+	str	r2, .saved_pllar
-+
-+	mov	r2, #0
-+	str	r2, [r1, #AT91_CKGR_PLLAR]
-+
-+	wait_plladis
-+
-+	/* Turn off the main oscillator */
-+
-+	ldr	r2, [r1, #AT91_CKGR_MOR]
-+	bic	r2, r2, #AT91_PMC_MOSCEN
-+	str	r2, [r1, #AT91_CKGR_MOR]
-+
-+	/* Wait for interrupt */
-+
-+	mcr	p15, 0, r0, c7, c0, 4
-+
-+	/* Turn on the main oscillator */
-+
-+	ldr	r2, [r1, #AT91_CKGR_MOR]
-+	orr	r2, r2, #AT91_PMC_MOSCEN
-+	str	r2, [r1, #AT91_CKGR_MOR]
-+
-+	wait_moscrdy
-+
-+	/* Restore PLLA setting */
-+
-+	ldr	r2, .saved_pllar
-+	str	r2, [r1, #AT91_CKGR_PLLAR]
-+
-+	wait_pllalock
-+
-+	/*
-+	 * Restore master clock setting
-+	 *
-+	 * First set PRES if it was not 0,
-+	 * than set CSS and MDIV fields.
-+	 * After every change wait for
-+	 * MCKRDY.
-+	 *
-+	 * See eratta #2[78] for details.
-+	 */
-+
-+	ldr	r2, .saved_mckr
-+	tst	r2, #0x1C
-+	beq	2f
-+	and	r2, r2, #0x1C
-+	str	r2, [r1, #AT91_PMC_MCKR]
-+
-+	wait_mckrdy
-+
-+2:	ldr	r2, .saved_mckr
-+	str	r2, [r1, #AT91_PMC_MCKR]
-+
-+	wait_mckrdy
-+
-+	mov	pc, lr
-+
-+.saved_mckr:
-+	.word 0
-+
-+.saved_pllar:
-+	.word 0
-+
-+.at91_va_base_sys:
-+	.word AT91_VA_BASE_SYS
-+
-+ENTRY(at91rm9200_slow_clock_sz)
-+	.word .-at91rm9200_slow_clock
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-dk.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-dk.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-dk.c	(arbetskopia)
-@@ -73,6 +73,185 @@
- 	at91rm9200_init_interrupts(NULL);
- }
- 
-+#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
-+#include <video/s1d13xxxfb.h>
-+#include <asm/arch/ics1523.h>
-+
-+/* EPSON S1D13806 FB */
-+#define AT91_FB_REG_BASE	0x30000000L
-+#define AT91_FB_REG_SIZE	0x200
-+#define AT91_FB_VMEM_BASE	0x30200000L
-+#define AT91_FB_VMEM_SIZE	0x140000L
-+
-+static void __init dk_init_video(void)
-+{
-+	/* NWAIT Signal */
-+	at91_set_A_periph(AT91_PIN_PC6, 0);
-+
-+	/* Initialization of the Static Memory Controller for Chip Select 2 */
-+	at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16			/* 16 bit */
-+				| AT91_SMC_WSEN | AT91_SMC_NWS_(4)	/* wait states */
-+				| AT91_SMC_TDF_(1)			/* float time */
-+	);
-+
-+	at91_ics1523_init();
-+}
-+
-+/* CRT:    (active)   640x480 60Hz (PCLK=CLKI=25.175MHz)
-+   Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
-+static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
-+	{S1DREG_MISC,			0x00},	/* Enable Memory/Register select bit */
-+	{S1DREG_COM_DISP_MODE,		0x00},	/* disable display output */
-+	{S1DREG_GPIO_CNF0,		0x00},
-+	{S1DREG_GPIO_CNF1,		0x00},
-+	{S1DREG_GPIO_CTL0,		0x08},
-+	{S1DREG_GPIO_CTL1,		0x00},
-+	{S1DREG_CLK_CNF,		0x01},	/* no divide, MCLK source is CLKI3 0x02*/
-+	{S1DREG_LCD_CLK_CNF,		0x00},
-+	{S1DREG_CRT_CLK_CNF,		0x00},
-+	{S1DREG_MPLUG_CLK_CNF,		0x00},
-+	{S1DREG_CPU2MEM_WST_SEL,	0x01},	/* 2*period(MCLK) - 4ns > period(BCLK) */
-+	{S1DREG_SDRAM_REF_RATE,		0x03},	/* 32768 <= MCLK <= 50000 (MHz) */
-+	{S1DREG_SDRAM_TC0,		0x00},	/* MCLK source freq (MHz): */
-+	{S1DREG_SDRAM_TC1,		0x01},	/* 42 <= MCLK <= 50 */
-+	{S1DREG_MEM_CNF,		0x80},	/* SDRAM Initialization - needed before mem access */
-+	{S1DREG_PANEL_TYPE,		0x25},	/* std TFT 16bit, 8bit SCP format 2, single passive LCD */
-+	{S1DREG_MOD_RATE,		0x00},	/* toggle every FPFRAME */
-+	{S1DREG_LCD_DISP_HWIDTH,	0x4F},	/* 680 pix */
-+	{S1DREG_LCD_NDISP_HPER,		0x12},	/* 152 pix */
-+	{S1DREG_TFT_FPLINE_START,	0x01},	/* 13 pix */
-+	{S1DREG_TFT_FPLINE_PWIDTH,	0x0B},	/* 96 pix */
-+	{S1DREG_LCD_DISP_VHEIGHT0,	0xDF},
-+	{S1DREG_LCD_DISP_VHEIGHT1,	0x01},	/* 480 lines */
-+	{S1DREG_LCD_NDISP_VPER,		0x2C},	/* 44 lines */
-+	{S1DREG_TFT_FPFRAME_START,	0x0A},	/* 10 lines */
-+	{S1DREG_TFT_FPFRAME_PWIDTH,	0x01},	/* 2 lines */
-+	{S1DREG_LCD_DISP_MODE,		0x05},  /* 16 bpp */
-+	{S1DREG_LCD_MISC,		0x00},	/* dithering enabled, dual panel buffer enabled */
-+	{S1DREG_LCD_DISP_START0,	0x00},
-+	{S1DREG_LCD_DISP_START1,	0xC8},
-+	{S1DREG_LCD_DISP_START2,	0x00},
-+	{S1DREG_LCD_MEM_OFF0,		0x80},
-+	{S1DREG_LCD_MEM_OFF1,		0x02},
-+	{S1DREG_LCD_PIX_PAN,		0x00},
-+	{S1DREG_LCD_DISP_FIFO_HTC,	0x3B},
-+	{S1DREG_LCD_DISP_FIFO_LTC,	0x3C},
-+	{S1DREG_CRT_DISP_HWIDTH,	0x4F},	/* 680 pix */
-+	{S1DREG_CRT_NDISP_HPER,		0x13},	/* 160 pix */
-+	{S1DREG_CRT_HRTC_START,		0x01},	/* 13 pix */
-+	{S1DREG_CRT_HRTC_PWIDTH,	0x0B},	/* 96 pix */
-+	{S1DREG_CRT_DISP_VHEIGHT0,	0xDF},
-+	{S1DREG_CRT_DISP_VHEIGHT1,	0x01},	/* 480 lines */
-+	{S1DREG_CRT_NDISP_VPER,		0x2B},	/* 44 lines */
-+	{S1DREG_CRT_VRTC_START,		0x09},	/* 10 lines */
-+	{S1DREG_CRT_VRTC_PWIDTH,	0x01},	/* 2 lines */
-+	{S1DREG_TV_OUT_CTL,		0x10},
-+	{S1DREG_CRT_DISP_MODE,		0x05},	/* 16 bpp */
-+	{S1DREG_CRT_DISP_START0,	0x00},
-+	{S1DREG_CRT_DISP_START1,	0x00},
-+	{S1DREG_CRT_DISP_START2,	0x00},
-+	{S1DREG_CRT_MEM_OFF0,		0x80},
-+	{S1DREG_CRT_MEM_OFF1,		0x02},
-+	{S1DREG_CRT_PIX_PAN,		0x00},
-+	{S1DREG_CRT_DISP_FIFO_HTC,	0x3B},
-+	{S1DREG_CRT_DISP_FIFO_LTC,	0x3C},
-+	{S1DREG_LCD_CUR_CTL,		0x00},	/* inactive */
-+	{S1DREG_LCD_CUR_START,		0x01},
-+	{S1DREG_LCD_CUR_XPOS0,		0x00},
-+	{S1DREG_LCD_CUR_XPOS1,		0x00},
-+	{S1DREG_LCD_CUR_YPOS0,		0x00},
-+	{S1DREG_LCD_CUR_YPOS1,		0x00},
-+	{S1DREG_LCD_CUR_BCTL0,		0x00},
-+	{S1DREG_LCD_CUR_GCTL0,		0x00},
-+	{S1DREG_LCD_CUR_RCTL0,		0x00},
-+	{S1DREG_LCD_CUR_BCTL1,		0x1F},
-+	{S1DREG_LCD_CUR_GCTL1,		0x3F},
-+	{S1DREG_LCD_CUR_RCTL1,		0x1F},
-+	{S1DREG_LCD_CUR_FIFO_HTC,	0x00},
-+	{S1DREG_CRT_CUR_CTL,		0x00},	/* inactive */
-+	{S1DREG_CRT_CUR_START,		0x01},
-+	{S1DREG_CRT_CUR_XPOS0,		0x00},
-+	{S1DREG_CRT_CUR_XPOS1,		0x00},
-+	{S1DREG_CRT_CUR_YPOS0,		0x00},
-+	{S1DREG_CRT_CUR_YPOS1,		0x00},
-+	{S1DREG_CRT_CUR_BCTL0,		0x00},
-+	{S1DREG_CRT_CUR_GCTL0,		0x00},
-+	{S1DREG_CRT_CUR_RCTL0,		0x00},
-+	{S1DREG_CRT_CUR_BCTL1,		0x1F},
-+	{S1DREG_CRT_CUR_GCTL1,		0x3F},
-+	{S1DREG_CRT_CUR_RCTL1,		0x1F},
-+	{S1DREG_CRT_CUR_FIFO_HTC,	0x00},
-+	{S1DREG_BBLT_CTL0,		0x00},
-+	{S1DREG_BBLT_CTL0,		0x00},
-+	{S1DREG_BBLT_CC_EXP,		0x00},
-+	{S1DREG_BBLT_OP,		0x00},
-+	{S1DREG_BBLT_SRC_START0,	0x00},
-+	{S1DREG_BBLT_SRC_START1,	0x00},
-+	{S1DREG_BBLT_SRC_START2,	0x00},
-+	{S1DREG_BBLT_DST_START0,	0x00},
-+	{S1DREG_BBLT_DST_START1,	0x00},
-+	{S1DREG_BBLT_DST_START2,	0x00},
-+	{S1DREG_BBLT_MEM_OFF0,		0x00},
-+	{S1DREG_BBLT_MEM_OFF1,		0x00},
-+	{S1DREG_BBLT_WIDTH0,		0x00},
-+	{S1DREG_BBLT_WIDTH1,		0x00},
-+	{S1DREG_BBLT_HEIGHT0,		0x00},
-+	{S1DREG_BBLT_HEIGHT1,		0x00},
-+	{S1DREG_BBLT_BGC0,		0x00},
-+	{S1DREG_BBLT_BGC1,		0x00},
-+	{S1DREG_BBLT_FGC0,		0x00},
-+	{S1DREG_BBLT_FGC1,		0x00},
-+	{S1DREG_LKUP_MODE,		0x00},	/* LCD LUT r | LCD and CRT/TV LUT w */
-+	{S1DREG_LKUP_ADDR,		0x00},
-+	{S1DREG_PS_CNF,			0x00},	/* Power Save disable */
-+	{S1DREG_PS_STATUS,		0x02},	/* LCD Panel down, mem up */
-+	{S1DREG_CPU2MEM_WDOGT,		0x00},
-+	{S1DREG_COM_DISP_MODE,		0x02},	/* enable CRT display output */
-+};
-+
-+static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
-+	.initregs		= dk_s1dfb_initregs,
-+	.initregssize		= ARRAY_SIZE(dk_s1dfb_initregs),
-+	.platform_init_video	= dk_init_video,
-+};
-+
-+static u64 s1dfb_dmamask = 0xffffffffUL;
-+
-+static struct resource dk_s1dfb_resource[] = {
-+	[0] = {	/* video mem */
-+		.name   = "s1d13806 memory",
-+		.start  = AT91_FB_VMEM_BASE,
-+		.end    = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
-+		.flags  = IORESOURCE_MEM,
-+	},
-+	[1] = {	/* video registers */
-+		.name   = "s1d13806 registers",
-+		.start  = AT91_FB_REG_BASE,
-+		.end    = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
-+		.flags  = IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct platform_device dk_s1dfb_device = {
-+	.name		= "s1d13806fb",
-+	.id		= -1,
-+	.dev		= {
-+			.dma_mask		= &s1dfb_dmamask,
-+			.coherent_dma_mask	= 0xffffffff,
-+			.platform_data		= &dk_s1dfb_pdata,
-+	},
-+	.resource	= dk_s1dfb_resource,
-+	.num_resources	= ARRAY_SIZE(dk_s1dfb_resource),
-+};
-+
-+static void __init dk_add_device_video(void)
-+{
-+	platform_device_register(&dk_s1dfb_device);
-+}
-+#else
-+static void __init dk_add_device_video(void) {}
-+#endif
-+
- static struct at91_eth_data __initdata dk_eth_data = {
- 	.phy_irq_pin	= AT91_PIN_PC4,
- 	.is_rmii	= 1,
-@@ -151,7 +330,7 @@
- #define DK_FLASH_SIZE	0x200000
- 
- static struct physmap_flash_data dk_flash_data = {
--	.width	= 2,
-+	.width		= 2,
- };
- 
- static struct resource dk_flash_resource = {
-@@ -170,6 +349,13 @@
- 	.num_resources	= 1,
- };
- 
-+static struct at91_gpio_led dk_leds[] = {
-+	{
-+		.name		= "led0",
-+		.gpio		= AT91_PIN_PB2,
-+		.trigger	= "timer",
-+	}
-+};
- 
- static void __init dk_board_init(void)
- {
-@@ -200,8 +386,10 @@
- 	at91_add_device_nand(&dk_nand_data);
- 	/* NOR Flash */
- 	platform_device_register(&dk_flash);
-+	/* LEDs */
-+	at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
- 	/* VGA */
--//	dk_add_device_video();
-+	dk_add_device_video();
- }
- 
- MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-csb337.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-csb337.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-csb337.c	(arbetskopia)
-@@ -24,6 +24,7 @@
- #include <linux/module.h>
- #include <linux/platform_device.h>
- #include <linux/spi/spi.h>
-+#include <linux/interrupt.h>
- #include <linux/mtd/physmap.h>
- 
- #include <asm/hardware.h>
-@@ -59,6 +60,7 @@
- 
- 	/* Setup the LEDs */
- 	at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
-+	at91_set_gpio_output(AT91_PIN_PB2, 1);		/* third (unused) LED */
- 
- 	/* Setup the serial ports and console */
- 	at91_init_serial(&csb337_uart_config);
-@@ -149,6 +151,55 @@
- 	.num_resources	= ARRAY_SIZE(csb_flash_resources),
- };
- 
-+static struct at91_gpio_led csb337_leds[] = {
-+	{
-+		.name		= "led0",
-+		.gpio		= AT91_PIN_PB0,
-+		.trigger	= "heartbeat",
-+	},
-+	{
-+		.name		= "led1",
-+		.gpio		= AT91_PIN_PB1,
-+		.trigger	= "timer",
-+	},
-+	{
-+		.name		= "led2",
-+		.gpio		= AT91_PIN_PB2,
-+	}
-+};
-+
-+#if defined(CONFIG_CSB300_WAKE_SW0) || defined(CONFIG_CSB300_WAKE_SW1)
-+static irqreturn_t switch_irq_handler(int irq, void *context)
-+{
-+	return IRQ_HANDLED;
-+}
-+
-+static inline void __init switch_irq_setup(int irq, char *name, unsigned long mode)
-+{
-+	int res;
-+
-+	res = request_irq(irq, switch_irq_handler, IRQF_SAMPLE_RANDOM | mode, name, NULL);
-+	if (res == 0)
-+		enable_irq_wake(irq);
-+}
-+
-+static void __init csb300_switches(void)
-+{
-+#ifdef CONFIG_CSB300_WAKE_SW0
-+	at91_set_A_periph(AT91_PIN_PB29, 1);		/* IRQ0 */
-+	switch_irq_setup(AT91RM9200_ID_IRQ0, "csb300_sw0", IRQF_TRIGGER_FALLING);
-+#endif
-+#ifdef CONFIG_CSB300_WAKE_SW1
-+	at91_set_gpio_input(AT91_PIN_PB28, 1);
-+	at91_set_deglitch(AT91_PIN_PB28, 1);
-+	switch_irq_setup(AT91_PIN_PB28, "csb300_sw1", IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING);
-+#endif
-+	/* there's also SW2 at PA21, GPIO or TIOA2 */
-+}
-+#else
-+static void __init csb300_switches(void) {}
-+#endif
-+
- static void __init csb337_board_init(void)
- {
- 	/* Serial */
-@@ -168,8 +219,12 @@
- 	at91_add_device_spi(csb337_spi_devices, ARRAY_SIZE(csb337_spi_devices));
- 	/* MMC */
- 	at91_add_device_mmc(0, &csb337_mmc_data);
-+	/* LEDS */
-+	at91_gpio_leds(csb337_leds, ARRAY_SIZE(csb337_leds));
- 	/* NOR flash */
- 	platform_device_register(&csb_flash);
-+	/* Switches on CSB300 */
-+	csb300_switches();
- }
- 
- MACHINE_START(CSB337, "Cogent CSB337")
-Index: linux-2.6.22.1/arch/arm/mach-at91/clock.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/clock.c	(revision 1)
-+++ linux-2.6.22.1/arch/arm/mach-at91/clock.c	(arbetskopia)
-@@ -32,6 +32,7 @@
- #include <asm/arch/cpu.h>
- 
- #include "clock.h"
-+#include "generic.h"
- 
- 
- /*
-@@ -254,6 +255,23 @@
- 
- /*------------------------------------------------------------------------*/
- 
-+#ifdef CONFIG_PM
-+
-+int clk_must_disable(struct clk *clk)
-+{
-+	if (!at91_suspend_entering_slow_clock())
-+		return 0;
-+
-+	while (clk->parent)
-+		clk = clk->parent;
-+	return clk != &clk32k;
-+}
-+EXPORT_SYMBOL(clk_must_disable);
-+
-+#endif
-+
-+/*------------------------------------------------------------------------*/
-+
- #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
- 
- /*
-@@ -362,7 +380,7 @@
- 
- static int at91_clk_show(struct seq_file *s, void *unused)
- {
--	u32		scsr, pcsr, sr;
-+	u32		scsr, pcsr, sr, i;
- 	struct clk	*clk;
- 
- 	seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
-@@ -372,6 +390,9 @@
- 	seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
- 	seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
- 	seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
-+#warning "Hard-coded PCK"
-+  	for (i = 0; i < 4; i++)
-+  		seq_printf(s, "PCK%d = %8x\n", i, at91_sys_read(AT91_PMC_PCKR(i)));
- 	seq_printf(s, "SR   = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
- 
- 	seq_printf(s, "\n");
-Index: linux-2.6.22.1/arch/arm/mach-at91/board-cam60.c
-===================================================================
---- linux-2.6.22.1/arch/arm/mach-at91/board-cam60.c	(revision 0)
-+++ linux-2.6.22.1/arch/arm/mach-at91/board-cam60.c	(revision 0)
-@@ -0,0 +1,148 @@
-+/*
-+ * KwikByte CAM60
-+ *
-+ * based on board-sam9260ek.c
-+ *   Copyright (C) 2005 SAN People
-+ *   Copyright (C) 2006 Atmel
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
-+
-+#include <asm/hardware.h>
-+#include <asm/setup.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/arch.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach/irq.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+#include <asm/arch/at91sam926x_mc.h>
-+
-+#include "generic.h"
-+
-+
-+/*
-+ * Serial port configuration.
-+ *    0 .. 5 = USART0 .. USART5
-+ *    6      = DBGU
-+ */
-+static struct at91_uart_config __initdata cam60_uart_config = {
-+	.console_tty	= 0,				/* ttyS0 */
-+	.nr_tty		= 1,
-+	.tty_map	= { 6, -1, -1, -1, -1, -1, -1 }	/* ttyS0, ..., ttyS6 */
-+};
-+
-+static void __init cam60_map_io(void)
-+{
-+	/* Initialize processor: 10 MHz crystal */
-+	at91sam9260_initialize(10000000);
-+
-+	/* Setup the serial ports and console */
-+	at91_init_serial(&cam60_uart_config);
-+}
-+
-+static void __init cam60_init_irq(void)
-+{
-+	at91sam9260_init_interrupts(NULL);
-+}
-+
-+
-+/*
-+ * SPI devices.
-+ */
-+#if defined(CONFIG_MTD_DATAFLASH)
-+static struct mtd_partition __initdata cam60_spi_partitions[] = {
-+	{
-+		.name	= "BOOT1",
-+		.offset	= 0,
-+		.size	= 4 * 1056,
-+	},
-+	{
-+		.name	= "BOOT2",
-+		.offset	= MTDPART_OFS_NXTBLK,
-+		.size	= 256 * 1056,
-+	},
-+	{
-+		.name	= "kernel",
-+		.offset	= MTDPART_OFS_NXTBLK,
-+		.size	= 2222 * 1056,
-+	},
-+	{
-+		.name	= "file system",
-+		.offset	= MTDPART_OFS_NXTBLK,
-+		.size	= MTDPART_SIZ_FULL,
-+	},
-+};
-+
-+static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
-+	.name		= "spi_flash",
-+	.parts		= cam60_spi_partitions,
-+	.nr_parts	= ARRAY_SIZE(cam60_spi_partitions)
-+};
-+#endif
-+
-+static struct spi_board_info cam60_spi_devices[] = {
-+#if defined(CONFIG_MTD_DATAFLASH)
-+	{	/* DataFlash chip */
-+		.modalias	= "mtd_dataflash",
-+		.chip_select	= 0,
-+		.max_speed_hz	= 15 * 1000 * 1000,
-+		.bus_num	= 0,
-+		.platform_data	= &cam60_spi_flash_platform_data
-+	},
-+#endif
-+};
-+
-+
-+/*
-+ * MACB Ethernet device
-+ */
-+static struct __initdata at91_eth_data cam60_macb_data = {
-+	.phy_irq_pin	= AT91_PIN_PB5,
-+	.is_rmii	= 0,
-+};
-+
-+
-+static void __init cam60_board_init(void)
-+{
-+	/* Serial */
-+	at91_add_device_serial();
-+	/* SPI */
-+	at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
-+	/* Ethernet */
-+	at91_add_device_eth(&cam60_macb_data);
-+}
-+
-+MACHINE_START(CAM60, "KwikByte CAM60")
-+	/* Maintainer: KwikByte */
-+	.phys_io	= AT91_BASE_SYS,
-+	.io_pg_offst	= (AT91_VA_BASE_SYS >> 18) & 0xfffc,
-+	.boot_params	= AT91_SDRAM_BASE + 0x100,
-+	.timer		= &at91sam926x_timer,
-+	.map_io		= cam60_map_io,
-+	.init_irq	= cam60_init_irq,
-+	.init_machine	= cam60_board_init,
-+MACHINE_END
-Index: linux-2.6.22.1/arch/arm/configs/cam60_defconfig
-===================================================================
---- linux-2.6.22.1/arch/arm/configs/cam60_defconfig	(revision 0)
-+++ linux-2.6.22.1/arch/arm/configs/cam60_defconfig	(revision 0)
-@@ -0,0 +1,954 @@
-+#
-+# Automatically generated make config: don't edit
-+# Linux kernel version: 2.6.20
-+# Tue May  1 21:06:33 2007
-+#
-+CONFIG_ARM=y
-+# CONFIG_GENERIC_TIME is not set
-+CONFIG_MMU=y
-+CONFIG_GENERIC_HARDIRQS=y
-+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-+CONFIG_HARDIRQS_SW_RESEND=y
-+CONFIG_GENERIC_IRQ_PROBE=y
-+CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-+CONFIG_GENERIC_HWEIGHT=y
-+CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_VECTORS_BASE=0xffff0000
-+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-+
-+#
-+# Code maturity level options
-+#
-+CONFIG_EXPERIMENTAL=y
-+CONFIG_BROKEN_ON_SMP=y
-+CONFIG_INIT_ENV_ARG_LIMIT=32
-+
-+#
-+# General setup
-+#
-+CONFIG_LOCALVERSION=""
-+# CONFIG_LOCALVERSION_AUTO is not set
-+# CONFIG_SWAP is not set
-+CONFIG_SYSVIPC=y
-+# CONFIG_IPC_NS is not set
-+# CONFIG_POSIX_MQUEUE is not set
-+# CONFIG_BSD_PROCESS_ACCT is not set
-+# CONFIG_TASKSTATS is not set
-+# CONFIG_UTS_NS is not set
-+# CONFIG_AUDIT is not set
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_SYSFS_DEPRECATED=y
-+# CONFIG_RELAY is not set
-+CONFIG_INITRAMFS_SOURCE=""
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL=y
-+# CONFIG_EMBEDDED is not set
-+CONFIG_UID16=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_KALLSYMS=y
-+# CONFIG_KALLSYMS_ALL is not set
-+# CONFIG_KALLSYMS_EXTRA_PASS is not set
-+CONFIG_HOTPLUG=y
-+CONFIG_PRINTK=y
-+CONFIG_BUG=y
-+CONFIG_ELF_CORE=y
-+CONFIG_BASE_FULL=y
-+CONFIG_FUTEX=y
-+CONFIG_EPOLL=y
-+CONFIG_SHMEM=y
-+CONFIG_SLAB=y
-+CONFIG_VM_EVENT_COUNTERS=y
-+CONFIG_RT_MUTEXES=y
-+# CONFIG_TINY_SHMEM is not set
-+CONFIG_BASE_SMALL=0
-+# CONFIG_SLOB is not set
-+
-+#
-+# Loadable module support
-+#
-+CONFIG_MODULES=y
-+CONFIG_MODULE_UNLOAD=y
-+CONFIG_MODULE_FORCE_UNLOAD=y
-+# CONFIG_MODVERSIONS is not set
-+# CONFIG_MODULE_SRCVERSION_ALL is not set
-+# CONFIG_KMOD is not set
-+
-+#
-+# Block layer
-+#
-+CONFIG_BLOCK=y
-+# CONFIG_LBD is not set
-+# CONFIG_BLK_DEV_IO_TRACE is not set
-+# CONFIG_LSF is not set
-+
-+#
-+# IO Schedulers
-+#
-+CONFIG_IOSCHED_NOOP=y
-+CONFIG_IOSCHED_AS=y
-+# CONFIG_IOSCHED_DEADLINE is not set
-+# CONFIG_IOSCHED_CFQ is not set
-+CONFIG_DEFAULT_AS=y
-+# CONFIG_DEFAULT_DEADLINE is not set
-+# CONFIG_DEFAULT_CFQ is not set
-+# CONFIG_DEFAULT_NOOP is not set
-+CONFIG_DEFAULT_IOSCHED="anticipatory"
-+
-+#
-+# System Type
-+#
-+# CONFIG_ARCH_AAEC2000 is not set
-+# CONFIG_ARCH_INTEGRATOR is not set
-+# CONFIG_ARCH_REALVIEW is not set
-+# CONFIG_ARCH_VERSATILE is not set
-+CONFIG_ARCH_AT91=y
-+# CONFIG_ARCH_CLPS7500 is not set
-+# CONFIG_ARCH_CLPS711X is not set
-+# CONFIG_ARCH_CO285 is not set
-+# CONFIG_ARCH_EBSA110 is not set
-+# CONFIG_ARCH_EP93XX is not set
-+# CONFIG_ARCH_FOOTBRIDGE is not set
-+# CONFIG_ARCH_NETX is not set
-+# CONFIG_ARCH_H720X is not set
-+# CONFIG_ARCH_IMX is not set
-+# CONFIG_ARCH_IOP32X is not set
-+# CONFIG_ARCH_IOP33X is not set
-+# CONFIG_ARCH_IOP13XX is not set
-+# CONFIG_ARCH_IXP4XX is not set
-+# CONFIG_ARCH_IXP2000 is not set
-+# CONFIG_ARCH_IXP23XX is not set
-+# CONFIG_ARCH_L7200 is not set
-+# CONFIG_ARCH_PNX4008 is not set
-+# CONFIG_ARCH_PXA is not set
-+# CONFIG_ARCH_RPC is not set
-+# CONFIG_ARCH_SA1100 is not set
-+# CONFIG_ARCH_S3C2410 is not set
-+# CONFIG_ARCH_SHARK is not set
-+# CONFIG_ARCH_LH7A40X is not set
-+# CONFIG_ARCH_OMAP is not set
-+
-+#
-+# Atmel AT91 System-on-Chip
-+#
-+# CONFIG_ARCH_AT91RM9200 is not set
-+CONFIG_ARCH_AT91SAM9260=y
-+# CONFIG_ARCH_AT91SAM9261 is not set
-+# CONFIG_ARCH_AT91SAM9263 is not set
-+
-+#
-+# AT91SAM9260 Board Type
-+#
-+# CONFIG_MACH_AT91SAM9260EK is not set
-+CONFIG_MACH_CAM60=y
-+
-+#
-+# AT91 Board Options
-+#
-+
-+#
-+# AT91 Feature Selections
-+#
-+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
-+
-+#
-+# Processor Type
-+#
-+CONFIG_CPU_32=y
-+CONFIG_CPU_ARM926T=y
-+CONFIG_CPU_32v5=y
-+CONFIG_CPU_ABRT_EV5TJ=y
-+CONFIG_CPU_CACHE_VIVT=y
-+CONFIG_CPU_COPY_V4WB=y
-+CONFIG_CPU_TLB_V4WBI=y
-+CONFIG_CPU_CP15=y
-+CONFIG_CPU_CP15_MMU=y
-+
-+#
-+# Processor Features
-+#
-+# CONFIG_ARM_THUMB is not set
-+# CONFIG_CPU_ICACHE_DISABLE is not set
-+# CONFIG_CPU_DCACHE_DISABLE is not set
-+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
-+
-+#
-+# Bus support
-+#
-+
-+#
-+# PCCARD (PCMCIA/CardBus) support
-+#
-+# CONFIG_PCCARD is not set
-+
-+#
-+# Kernel Features
-+#
-+# CONFIG_PREEMPT is not set
-+# CONFIG_NO_IDLE_HZ is not set
-+CONFIG_HZ=100
-+# CONFIG_AEABI is not set
-+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-+CONFIG_SELECT_MEMORY_MODEL=y
-+CONFIG_FLATMEM_MANUAL=y
-+# CONFIG_DISCONTIGMEM_MANUAL is not set
-+# CONFIG_SPARSEMEM_MANUAL is not set
-+CONFIG_FLATMEM=y
-+CONFIG_FLAT_NODE_MEM_MAP=y
-+# CONFIG_SPARSEMEM_STATIC is not set
-+CONFIG_SPLIT_PTLOCK_CPUS=4096
-+# CONFIG_RESOURCES_64BIT is not set
-+# CONFIG_LEDS is not set
-+CONFIG_ALIGNMENT_TRAP=y
-+
-+#
-+# Boot options
-+#
-+CONFIG_ZBOOT_ROM_TEXT=0x22000000
-+CONFIG_ZBOOT_ROM_BSS=0x20004000
-+# CONFIG_ZBOOT_ROM is not set
-+CONFIG_CMDLINE="console=ttyS0,115200 noinitrd root=/dev/mtdblock3 rootfstype=jffs2 mem=64M"
-+# CONFIG_XIP_KERNEL is not set
-+
-+#
-+# Floating point emulation
-+#
-+
-+#
-+# At least one emulation must be selected
-+#
-+CONFIG_FPE_NWFPE=y
-+# CONFIG_FPE_NWFPE_XP is not set
-+# CONFIG_FPE_FASTFPE is not set
-+# CONFIG_VFP is not set
-+
-+#
-+# Userspace binary formats
-+#
-+CONFIG_BINFMT_ELF=y
-+# CONFIG_BINFMT_AOUT is not set
-+# CONFIG_BINFMT_MISC is not set
-+# CONFIG_ARTHUR is not set
-+
-+#
-+# Power management options
-+#
-+# CONFIG_PM is not set
-+# CONFIG_APM is not set
-+
-+#
-+# Networking
-+#
-+CONFIG_NET=y
-+
-+#
-+# Networking options
-+#
-+# CONFIG_NETDEBUG is not set
-+CONFIG_PACKET=y
-+# CONFIG_PACKET_MMAP is not set
-+CONFIG_UNIX=y
-+CONFIG_XFRM=y
-+# CONFIG_XFRM_USER is not set
-+# CONFIG_XFRM_SUB_POLICY is not set
-+# CONFIG_NET_KEY is not set
-+CONFIG_INET=y
-+# CONFIG_IP_MULTICAST is not set
-+# CONFIG_IP_ADVANCED_ROUTER is not set
-+CONFIG_IP_FIB_HASH=y
-+CONFIG_IP_PNP=y
-+# CONFIG_IP_PNP_DHCP is not set
-+CONFIG_IP_PNP_BOOTP=y
-+# CONFIG_IP_PNP_RARP is not set
-+# CONFIG_NET_IPIP is not set
-+# CONFIG_NET_IPGRE is not set
-+# CONFIG_ARPD is not set
-+# CONFIG_SYN_COOKIES is not set
-+# CONFIG_INET_AH is not set
-+# CONFIG_INET_ESP is not set
-+# CONFIG_INET_IPCOMP is not set
-+# CONFIG_INET_XFRM_TUNNEL is not set
-+# CONFIG_INET_TUNNEL is not set
-+CONFIG_INET_XFRM_MODE_TRANSPORT=y
-+CONFIG_INET_XFRM_MODE_TUNNEL=y
-+CONFIG_INET_XFRM_MODE_BEET=y
-+CONFIG_INET_DIAG=y
-+CONFIG_INET_TCP_DIAG=y
-+# CONFIG_TCP_CONG_ADVANCED is not set
-+CONFIG_TCP_CONG_CUBIC=y
-+CONFIG_DEFAULT_TCP_CONG="cubic"
-+# CONFIG_TCP_MD5SIG is not set
-+# CONFIG_IPV6 is not set
-+# CONFIG_INET6_XFRM_TUNNEL is not set
-+# CONFIG_INET6_TUNNEL is not set
-+# CONFIG_NETWORK_SECMARK is not set
-+# CONFIG_NETFILTER is not set
-+
-+#
-+# DCCP Configuration (EXPERIMENTAL)
-+#
-+# CONFIG_IP_DCCP is not set
-+
-+#
-+# SCTP Configuration (EXPERIMENTAL)
-+#
-+# CONFIG_IP_SCTP is not set
-+
-+#
-+# TIPC Configuration (EXPERIMENTAL)
-+#
-+# CONFIG_TIPC is not set
-+# CONFIG_ATM is not set
-+# CONFIG_BRIDGE is not set
-+# CONFIG_VLAN_8021Q is not set
-+# CONFIG_DECNET is not set
-+# CONFIG_LLC2 is not set
-+# CONFIG_IPX is not set
-+# CONFIG_ATALK is not set
-+# CONFIG_X25 is not set
-+# CONFIG_LAPB is not set
-+# CONFIG_ECONET is not set
-+# CONFIG_WAN_ROUTER is not set
-+
-+#
-+# QoS and/or fair queueing
-+#
-+# CONFIG_NET_SCHED is not set
-+
-+#
-+# Network testing
-+#
-+# CONFIG_NET_PKTGEN is not set
-+# CONFIG_HAMRADIO is not set
-+# CONFIG_IRDA is not set
-+# CONFIG_BT is not set
-+# CONFIG_IEEE80211 is not set
-+
-+#
-+# Device Drivers
-+#
-+
-+#
-+# Generic Driver Options
-+#
-+CONFIG_STANDALONE=y
-+CONFIG_PREVENT_FIRMWARE_BUILD=y
-+# CONFIG_FW_LOADER is not set
-+# CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_SYS_HYPERVISOR is not set
-+
-+#
-+# Connector - unified userspace <-> kernelspace linker
-+#
-+# CONFIG_CONNECTOR is not set
-+
-+#
-+# Memory Technology Devices (MTD)
-+#
-+CONFIG_MTD=y
-+# CONFIG_MTD_DEBUG is not set
-+CONFIG_MTD_CONCAT=y
-+CONFIG_MTD_PARTITIONS=y
-+# CONFIG_MTD_REDBOOT_PARTS is not set
-+CONFIG_MTD_CMDLINE_PARTS=y
-+# CONFIG_MTD_AFS_PARTS is not set
-+
-+#
-+# User Modules And Translation Layers
-+#
-+CONFIG_MTD_CHAR=y
-+CONFIG_MTD_BLKDEVS=y
-+CONFIG_MTD_BLOCK=y
-+# CONFIG_FTL is not set
-+# CONFIG_NFTL is not set
-+# CONFIG_INFTL is not set
-+# CONFIG_RFD_FTL is not set
-+# CONFIG_SSFDC is not set
-+
-+#
-+# RAM/ROM/Flash chip drivers
-+#
-+CONFIG_MTD_CFI=y
-+# CONFIG_MTD_JEDECPROBE is not set
-+CONFIG_MTD_GEN_PROBE=y
-+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_1=y
-+CONFIG_MTD_MAP_BANK_WIDTH_2=y
-+CONFIG_MTD_MAP_BANK_WIDTH_4=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-+CONFIG_MTD_CFI_I1=y
-+CONFIG_MTD_CFI_I2=y
-+# CONFIG_MTD_CFI_I4 is not set
-+# CONFIG_MTD_CFI_I8 is not set
-+# CONFIG_MTD_CFI_INTELEXT is not set
-+# CONFIG_MTD_CFI_AMDSTD is not set
-+# CONFIG_MTD_CFI_STAA is not set
-+# CONFIG_MTD_RAM is not set
-+# CONFIG_MTD_ROM is not set
-+# CONFIG_MTD_ABSENT is not set
-+# CONFIG_MTD_OBSOLETE_CHIPS is not set
-+
-+#
-+# Mapping drivers for chip access
-+#
-+CONFIG_MTD_COMPLEX_MAPPINGS=y
-+# CONFIG_MTD_PHYSMAP is not set
-+# CONFIG_MTD_ARM_INTEGRATOR is not set
-+# CONFIG_MTD_PLATRAM is not set
-+
-+#
-+# Self-contained MTD device drivers
-+#
-+CONFIG_MTD_DATAFLASH=y
-+# CONFIG_MTD_M25P80 is not set
-+# CONFIG_MTD_SLRAM is not set
-+# CONFIG_MTD_PHRAM is not set
-+# CONFIG_MTD_MTDRAM is not set
-+# CONFIG_MTD_BLOCK2MTD is not set
-+
-+#
-+# Disk-On-Chip Device Drivers
-+#
-+# CONFIG_MTD_DOC2000 is not set
-+# CONFIG_MTD_DOC2001 is not set
-+# CONFIG_MTD_DOC2001PLUS is not set
-+
-+#
-+# NAND Flash Device Drivers
-+#
-+# CONFIG_MTD_NAND is not set
-+
-+#
-+# OneNAND Flash Device Drivers
-+#
-+# CONFIG_MTD_ONENAND is not set
-+
-+#
-+# Parallel port support
-+#
-+# CONFIG_PARPORT is not set
-+
-+#
-+# Plug and Play support
-+#
-+
-+#
-+# Block devices
-+#
-+# CONFIG_BLK_DEV_COW_COMMON is not set
-+# CONFIG_BLK_DEV_LOOP is not set
-+# CONFIG_BLK_DEV_NBD is not set
-+CONFIG_BLK_DEV_RAM=y
-+CONFIG_BLK_DEV_RAM_COUNT=16
-+CONFIG_BLK_DEV_RAM_SIZE=8192
-+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-+CONFIG_BLK_DEV_INITRD=y
-+# CONFIG_CDROM_PKTCDVD is not set
-+# CONFIG_ATA_OVER_ETH is not set
-+
-+#
-+# SCSI device support
-+#
-+# CONFIG_RAID_ATTRS is not set
-+# CONFIG_SCSI is not set
-+# CONFIG_SCSI_NETLINK is not set
-+
-+#
-+# Serial ATA (prod) and Parallel ATA (experimental) drivers
-+#
-+# CONFIG_ATA is not set
-+
-+#
-+# Multi-device support (RAID and LVM)
-+#
-+# CONFIG_MD is not set
-+
-+#
-+# Fusion MPT device support
-+#
-+# CONFIG_FUSION is not set
-+
-+#
-+# IEEE 1394 (FireWire) support
-+#
-+
-+#
-+# I2O device support
-+#
-+
-+#
-+# Network device support
-+#
-+CONFIG_NETDEVICES=y
-+# CONFIG_DUMMY is not set
-+# CONFIG_BONDING is not set
-+# CONFIG_EQUALIZER is not set
-+# CONFIG_TUN is not set
-+
-+#
-+# PHY device support
-+#
-+# CONFIG_PHYLIB is not set
-+
-+#
-+# Ethernet (10 or 100Mbit)
-+#
-+CONFIG_NET_ETHERNET=y
-+CONFIG_MII=y
-+CONFIG_MACB=y
-+# CONFIG_SMC91X is not set
-+# CONFIG_DM9000 is not set
-+
-+#
-+# Ethernet (1000 Mbit)
-+#
-+
-+#
-+# Ethernet (10000 Mbit)
-+#
-+
-+#
-+# Token Ring devices
-+#
-+
-+#
-+# Wireless LAN (non-hamradio)
-+#
-+# CONFIG_NET_RADIO is not set
-+
-+#
-+# Wan interfaces
-+#
-+# CONFIG_WAN is not set
-+# CONFIG_PPP is not set
-+# CONFIG_SLIP is not set
-+# CONFIG_SHAPER is not set
-+# CONFIG_NETCONSOLE is not set
-+# CONFIG_NETPOLL is not set
-+# CONFIG_NET_POLL_CONTROLLER is not set
-+
-+#
-+# ISDN subsystem
-+#
-+# CONFIG_ISDN is not set
-+
-+#
-+# Input device support
-+#
-+CONFIG_INPUT=y
-+# CONFIG_INPUT_FF_MEMLESS is not set
-+
-+#
-+# Userland interfaces
-+#
-+CONFIG_INPUT_MOUSEDEV=y
-+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-+# CONFIG_INPUT_JOYDEV is not set
-+# CONFIG_INPUT_TSDEV is not set
-+# CONFIG_INPUT_EVDEV is not set
-+# CONFIG_INPUT_EVBUG is not set
-+
-+#
-+# Input Device Drivers
-+#
-+# CONFIG_INPUT_KEYBOARD is not set
-+# CONFIG_INPUT_MOUSE is not set
-+# CONFIG_INPUT_JOYSTICK is not set
-+# CONFIG_INPUT_TOUCHSCREEN is not set
-+# CONFIG_INPUT_MISC is not set
-+
-+#
-+# Hardware I/O ports
-+#
-+# CONFIG_SERIO is not set
-+# CONFIG_GAMEPORT is not set
-+
-+#
-+# Character devices
-+#
-+CONFIG_VT=y
-+CONFIG_VT_CONSOLE=y
-+CONFIG_HW_CONSOLE=y
-+# CONFIG_VT_HW_CONSOLE_BINDING is not set
-+# CONFIG_SERIAL_NONSTANDARD is not set
-+
-+#
-+# Serial drivers
-+#
-+# CONFIG_SERIAL_8250 is not set
-+
-+#
-+# Non-8250 serial port support
-+#
-+CONFIG_SERIAL_ATMEL=y
-+CONFIG_SERIAL_ATMEL_CONSOLE=y
-+# CONFIG_SERIAL_ATMEL_TTYAT is not set
-+CONFIG_SERIAL_CORE=y
-+CONFIG_SERIAL_CORE_CONSOLE=y
-+CONFIG_UNIX98_PTYS=y
-+CONFIG_LEGACY_PTYS=y
-+CONFIG_LEGACY_PTY_COUNT=256
-+
-+#
-+# IPMI
-+#
-+# CONFIG_IPMI_HANDLER is not set
-+
-+#
-+# Watchdog Cards
-+#
-+# CONFIG_WATCHDOG is not set
-+# CONFIG_HW_RANDOM is not set
-+# CONFIG_NVRAM is not set
-+# CONFIG_DTLK is not set
-+# CONFIG_R3964 is not set
-+# CONFIG_RAW_DRIVER is not set
-+
-+#
-+# TPM devices
-+#
-+# CONFIG_TCG_TPM is not set
-+
-+#
-+# I2C support
-+#
-+# CONFIG_I2C is not set
-+
-+#
-+# SPI support
-+#
-+CONFIG_SPI=y
-+# CONFIG_SPI_DEBUG is not set
-+CONFIG_SPI_MASTER=y
-+
-+#
-+# SPI Master Controller Drivers
-+#
-+CONFIG_SPI_ATMEL=y
-+# CONFIG_SPI_BITBANG is not set
-+
-+#
-+# SPI Protocol Masters
-+#
-+
-+#
-+# Dallas's 1-wire bus
-+#
-+# CONFIG_W1 is not set
-+
-+#
-+# Hardware Monitoring support
-+#
-+# CONFIG_HWMON is not set
-+# CONFIG_HWMON_VID is not set
-+
-+#
-+# Misc devices
-+#
-+# CONFIG_TIFM_CORE is not set
-+
-+#
-+# LED devices
-+#
-+# CONFIG_NEW_LEDS is not set
-+
-+#
-+# LED drivers
-+#
-+
-+#
-+# LED Triggers
-+#
-+
-+#
-+# Multimedia devices
-+#
-+# CONFIG_VIDEO_DEV is not set
-+
-+#
-+# Digital Video Broadcasting Devices
-+#
-+# CONFIG_DVB is not set
-+
-+#
-+# Graphics support
-+#
-+# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_FB is not set
-+
-+#
-+# Console display driver support
-+#
-+# CONFIG_VGA_CONSOLE is not set
-+CONFIG_DUMMY_CONSOLE=y
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-+
-+#
-+# Sound
-+#
-+# CONFIG_SOUND is not set
-+
-+#
-+# HID Devices
-+#
-+# CONFIG_HID is not set
-+
-+#
-+# USB support
-+#
-+CONFIG_USB_ARCH_HAS_HCD=y
-+CONFIG_USB_ARCH_HAS_OHCI=y
-+# CONFIG_USB_ARCH_HAS_EHCI is not set
-+# CONFIG_USB is not set
-+
-+#
-+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-+#
-+
-+#
-+# USB Gadget Support
-+#
-+# CONFIG_USB_GADGET is not set
-+
-+#
-+# MMC/SD Card support
-+#
-+# CONFIG_MMC is not set
-+
-+#
-+# Real Time Clock
-+#
-+CONFIG_RTC_LIB=y
-+# CONFIG_RTC_CLASS is not set
-+
-+#
-+# File systems
-+#
-+CONFIG_EXT2_FS=y
-+# CONFIG_EXT2_FS_XATTR is not set
-+# CONFIG_EXT2_FS_XIP is not set
-+CONFIG_EXT3_FS=y
-+CONFIG_EXT3_FS_XATTR=y
-+# CONFIG_EXT3_FS_POSIX_ACL is not set
-+# CONFIG_EXT3_FS_SECURITY is not set
-+# CONFIG_EXT4DEV_FS is not set
-+CONFIG_JBD=y
-+# CONFIG_JBD_DEBUG is not set
-+CONFIG_FS_MBCACHE=y
-+# CONFIG_REISERFS_FS is not set
-+# CONFIG_JFS_FS is not set
-+# CONFIG_FS_POSIX_ACL is not set
-+# CONFIG_XFS_FS is not set
-+# CONFIG_GFS2_FS is not set
-+# CONFIG_OCFS2_FS is not set
-+# CONFIG_MINIX_FS is not set
-+# CONFIG_ROMFS_FS is not set
-+CONFIG_INOTIFY=y
-+CONFIG_INOTIFY_USER=y
-+# CONFIG_QUOTA is not set
-+CONFIG_DNOTIFY=y
-+# CONFIG_AUTOFS_FS is not set
-+CONFIG_AUTOFS4_FS=y
-+# CONFIG_FUSE_FS is not set
-+
-+#
-+# CD-ROM/DVD Filesystems
-+#
-+# CONFIG_ISO9660_FS is not set
-+# CONFIG_UDF_FS is not set
-+
-+#
-+# DOS/FAT/NT Filesystems
-+#
-+CONFIG_FAT_FS=y
-+# CONFIG_MSDOS_FS is not set
-+CONFIG_VFAT_FS=y
-+CONFIG_FAT_DEFAULT_CODEPAGE=437
-+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-+# CONFIG_NTFS_FS is not set
-+
-+#
-+# Pseudo filesystems
-+#
-+CONFIG_PROC_FS=y
-+CONFIG_PROC_SYSCTL=y
-+CONFIG_SYSFS=y
-+CONFIG_TMPFS=y
-+# CONFIG_TMPFS_POSIX_ACL is not set
-+# CONFIG_HUGETLB_PAGE is not set
-+CONFIG_RAMFS=y
-+# CONFIG_CONFIGFS_FS is not set
-+
-+#
-+# Miscellaneous filesystems
-+#
-+# CONFIG_ADFS_FS is not set
-+# CONFIG_AFFS_FS is not set
-+# CONFIG_HFS_FS is not set
-+# CONFIG_HFSPLUS_FS is not set
-+# CONFIG_BEFS_FS is not set
-+# CONFIG_BFS_FS is not set
-+# CONFIG_EFS_FS is not set
-+CONFIG_JFFS2_FS=y
-+CONFIG_JFFS2_FS_DEBUG=0
-+CONFIG_JFFS2_FS_WRITEBUFFER=y
-+# CONFIG_JFFS2_SUMMARY is not set
-+# CONFIG_JFFS2_FS_XATTR is not set
-+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-+CONFIG_JFFS2_ZLIB=y
-+CONFIG_JFFS2_RTIME=y
-+# CONFIG_JFFS2_RUBIN is not set
-+CONFIG_CRAMFS=y
-+# CONFIG_VXFS_FS is not set
-+# CONFIG_HPFS_FS is not set
-+# CONFIG_QNX4FS_FS is not set
-+# CONFIG_SYSV_FS is not set
-+# CONFIG_UFS_FS is not set
-+
-+#
-+# Network File Systems
-+#
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V3=y
-+# CONFIG_NFS_V3_ACL is not set
-+# CONFIG_NFS_V4 is not set
-+# CONFIG_NFS_DIRECTIO is not set
-+# CONFIG_NFSD is not set
-+CONFIG_ROOT_NFS=y
-+CONFIG_LOCKD=y
-+CONFIG_LOCKD_V4=y
-+CONFIG_NFS_COMMON=y
-+CONFIG_SUNRPC=y
-+# CONFIG_RPCSEC_GSS_KRB5 is not set
-+# CONFIG_RPCSEC_GSS_SPKM3 is not set
-+# CONFIG_SMB_FS is not set
-+# CONFIG_CIFS is not set
-+# CONFIG_NCP_FS is not set
-+# CONFIG_CODA_FS is not set
-+# CONFIG_AFS_FS is not set
-+# CONFIG_9P_FS is not set
-+
-+#
-+# Partition Types
-+#
-+# CONFIG_PARTITION_ADVANCED is not set
-+CONFIG_MSDOS_PARTITION=y
-+
-+#
-+# Native Language Support
-+#
-+CONFIG_NLS=y
-+CONFIG_NLS_DEFAULT="iso8859-1"
-+CONFIG_NLS_CODEPAGE_437=y
-+# CONFIG_NLS_CODEPAGE_737 is not set
-+# CONFIG_NLS_CODEPAGE_775 is not set
-+CONFIG_NLS_CODEPAGE_850=y
-+# CONFIG_NLS_CODEPAGE_852 is not set
-+# CONFIG_NLS_CODEPAGE_855 is not set
-+# CONFIG_NLS_CODEPAGE_857 is not set
-+# CONFIG_NLS_CODEPAGE_860 is not set
-+# CONFIG_NLS_CODEPAGE_861 is not set
-+# CONFIG_NLS_CODEPAGE_862 is not set
-+# CONFIG_NLS_CODEPAGE_863 is not set
-+# CONFIG_NLS_CODEPAGE_864 is not set
-+# CONFIG_NLS_CODEPAGE_865 is not set
-+# CONFIG_NLS_CODEPAGE_866 is not set
-+# CONFIG_NLS_CODEPAGE_869 is not set
-+# CONFIG_NLS_CODEPAGE_936 is not set
-+# CONFIG_NLS_CODEPAGE_950 is not set
-+# CONFIG_NLS_CODEPAGE_932 is not set
-+# CONFIG_NLS_CODEPAGE_949 is not set
-+# CONFIG_NLS_CODEPAGE_874 is not set
-+# CONFIG_NLS_ISO8859_8 is not set
-+# CONFIG_NLS_CODEPAGE_1250 is not set
-+# CONFIG_NLS_CODEPAGE_1251 is not set
-+# CONFIG_NLS_ASCII is not set
-+CONFIG_NLS_ISO8859_1=y
-+# CONFIG_NLS_ISO8859_2 is not set
-+# CONFIG_NLS_ISO8859_3 is not set
-+# CONFIG_NLS_ISO8859_4 is not set
-+# CONFIG_NLS_ISO8859_5 is not set
-+# CONFIG_NLS_ISO8859_6 is not set
-+# CONFIG_NLS_ISO8859_7 is not set
-+# CONFIG_NLS_ISO8859_9 is not set
-+# CONFIG_NLS_ISO8859_13 is not set
-+# CONFIG_NLS_ISO8859_14 is not set
-+# CONFIG_NLS_ISO8859_15 is not set
-+# CONFIG_NLS_KOI8_R is not set
-+# CONFIG_NLS_KOI8_U is not set
-+# CONFIG_NLS_UTF8 is not set
-+
-+#
-+# Distributed Lock Manager
-+#
-+# CONFIG_DLM is not set
-+
-+#
-+# Profiling support
-+#
-+# CONFIG_PROFILING is not set
-+
-+#
-+# Kernel hacking
-+#
-+# CONFIG_PRINTK_TIME is not set
-+CONFIG_ENABLE_MUST_CHECK=y
-+# CONFIG_MAGIC_SYSRQ is not set
-+# CONFIG_UNUSED_SYMBOLS is not set
-+# CONFIG_DEBUG_FS is not set
-+# CONFIG_HEADERS_CHECK is not set
-+CONFIG_DEBUG_KERNEL=y
-+CONFIG_LOG_BUF_SHIFT=14
-+CONFIG_DETECT_SOFTLOCKUP=y
-+# CONFIG_SCHEDSTATS is not set
-+# CONFIG_DEBUG_SLAB is not set
-+# CONFIG_DEBUG_RT_MUTEXES is not set
-+# CONFIG_RT_MUTEX_TESTER is not set
-+# CONFIG_DEBUG_SPINLOCK is not set
-+# CONFIG_DEBUG_MUTEXES is not set
-+# CONFIG_DEBUG_RWSEMS is not set
-+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-+# CONFIG_DEBUG_KOBJECT is not set
-+CONFIG_DEBUG_BUGVERBOSE=y
-+# CONFIG_DEBUG_INFO is not set
-+# CONFIG_DEBUG_VM is not set
-+# CONFIG_DEBUG_LIST is not set
-+CONFIG_FRAME_POINTER=y
-+CONFIG_FORCED_INLINING=y
-+# CONFIG_RCU_TORTURE_TEST is not set
-+CONFIG_DEBUG_USER=y
-+# CONFIG_DEBUG_ERRORS is not set
-+CONFIG_DEBUG_LL=y
-+# CONFIG_DEBUG_ICEDCC is not set
-+
-+#
-+# Security options
-+#
-+# CONFIG_KEYS is not set
-+# CONFIG_SECURITY is not set
-+
-+#
-+# Cryptographic options
-+#
-+# CONFIG_CRYPTO is not set
-+
-+#
-+# Library routines
-+#
-+CONFIG_BITREVERSE=y
-+# CONFIG_CRC_CCITT is not set
-+# CONFIG_CRC16 is not set
-+CONFIG_CRC32=y
-+# CONFIG_LIBCRC32C is not set
-+CONFIG_ZLIB_INFLATE=y
-+CONFIG_ZLIB_DEFLATE=y
-+CONFIG_PLIST=y
-+CONFIG_IOMAP_COPY=y
-Index: linux-2.6.22.1/arch/arm/configs/kb9202_defconfig
-===================================================================
---- linux-2.6.22.1/arch/arm/configs/kb9202_defconfig	(revision 1)
-+++ linux-2.6.22.1/arch/arm/configs/kb9202_defconfig	(arbetskopia)
-@@ -1,19 +1,31 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.13-rc2
--# Sun Aug 14 19:26:59 2005
-+# Linux kernel version: 2.6.21
-+# Mon May  7 11:43:14 2007
- #
- CONFIG_ARM=y
-+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-+CONFIG_GENERIC_GPIO=y
-+# CONFIG_GENERIC_TIME is not set
- CONFIG_MMU=y
--CONFIG_UID16=y
-+# CONFIG_NO_IOPORT is not set
-+CONFIG_GENERIC_HARDIRQS=y
-+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-+CONFIG_HARDIRQS_SW_RESEND=y
-+CONFIG_GENERIC_IRQ_PROBE=y
- CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-+CONFIG_GENERIC_HWEIGHT=y
- CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_ZONE_DMA=y
-+CONFIG_VECTORS_BASE=0xffff0000
-+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
- 
- #
- # Code maturity level options
- #
--# CONFIG_EXPERIMENTAL is not set
--CONFIG_CLEAN_COMPILE=y
-+CONFIG_EXPERIMENTAL=y
- CONFIG_BROKEN_ON_SMP=y
- CONFIG_INIT_ENV_ARG_LIMIT=32
- 
-@@ -21,54 +33,103 @@
- # General setup
- #
- CONFIG_LOCALVERSION=""
--# CONFIG_SWAP is not set
--# CONFIG_SYSVIPC is not set
--# CONFIG_BSD_PROCESS_ACCT is not set
-+CONFIG_LOCALVERSION_AUTO=y
-+CONFIG_SWAP=y
-+CONFIG_SYSVIPC=y
-+# CONFIG_IPC_NS is not set
-+CONFIG_SYSVIPC_SYSCTL=y
-+CONFIG_POSIX_MQUEUE=y
-+CONFIG_BSD_PROCESS_ACCT=y
-+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
-+# CONFIG_TASKSTATS is not set
-+# CONFIG_UTS_NS is not set
-+CONFIG_AUDIT=y
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_SYSFS_DEPRECATED=y
-+# CONFIG_RELAY is not set
-+CONFIG_BLK_DEV_INITRD=y
-+CONFIG_INITRAMFS_SOURCE=""
-+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
- CONFIG_SYSCTL=y
--# CONFIG_AUDIT is not set
--CONFIG_HOTPLUG=y
--# CONFIG_KOBJECT_UEVENT is not set
--# CONFIG_IKCONFIG is not set
- # CONFIG_EMBEDDED is not set
-+CONFIG_UID16=y
-+CONFIG_SYSCTL_SYSCALL=y
- CONFIG_KALLSYMS=y
- # CONFIG_KALLSYMS_ALL is not set
--# CONFIG_KALLSYMS_EXTRA_PASS is not set
-+CONFIG_KALLSYMS_EXTRA_PASS=y
-+CONFIG_HOTPLUG=y
- CONFIG_PRINTK=y
- CONFIG_BUG=y
-+CONFIG_ELF_CORE=y
- CONFIG_BASE_FULL=y
- CONFIG_FUTEX=y
- CONFIG_EPOLL=y
--CONFIG_CC_OPTIMIZE_FOR_SIZE=y
- CONFIG_SHMEM=y
--CONFIG_CC_ALIGN_FUNCTIONS=0
--CONFIG_CC_ALIGN_LABELS=0
--CONFIG_CC_ALIGN_LOOPS=0
--CONFIG_CC_ALIGN_JUMPS=0
-+CONFIG_SLAB=y
-+CONFIG_VM_EVENT_COUNTERS=y
-+CONFIG_RT_MUTEXES=y
- # CONFIG_TINY_SHMEM is not set
- CONFIG_BASE_SMALL=0
-+# CONFIG_SLOB is not set
- 
- #
- # Loadable module support
- #
- CONFIG_MODULES=y
- CONFIG_MODULE_UNLOAD=y
--CONFIG_OBSOLETE_MODPARM=y
--# CONFIG_MODULE_SRCVERSION_ALL is not set
-+# CONFIG_MODULE_FORCE_UNLOAD is not set
-+CONFIG_MODVERSIONS=y
-+CONFIG_MODULE_SRCVERSION_ALL=y
- CONFIG_KMOD=y
- 
- #
-+# Block layer
-+#
-+CONFIG_BLOCK=y
-+CONFIG_LBD=y
-+# CONFIG_BLK_DEV_IO_TRACE is not set
-+# CONFIG_LSF is not set
-+
-+#
-+# IO Schedulers
-+#
-+CONFIG_IOSCHED_NOOP=y
-+CONFIG_IOSCHED_AS=y
-+CONFIG_IOSCHED_DEADLINE=y
-+CONFIG_IOSCHED_CFQ=y
-+# CONFIG_DEFAULT_AS is not set
-+# CONFIG_DEFAULT_DEADLINE is not set
-+CONFIG_DEFAULT_CFQ=y
-+# CONFIG_DEFAULT_NOOP is not set
-+CONFIG_DEFAULT_IOSCHED="cfq"
-+
-+#
- # System Type
- #
-+# CONFIG_ARCH_AAEC2000 is not set
-+# CONFIG_ARCH_INTEGRATOR is not set
-+# CONFIG_ARCH_REALVIEW is not set
-+# CONFIG_ARCH_VERSATILE is not set
-+CONFIG_ARCH_AT91=y
- # CONFIG_ARCH_CLPS7500 is not set
- # CONFIG_ARCH_CLPS711X is not set
- # CONFIG_ARCH_CO285 is not set
- # CONFIG_ARCH_EBSA110 is not set
-+# CONFIG_ARCH_EP93XX is not set
- # CONFIG_ARCH_FOOTBRIDGE is not set
--# CONFIG_ARCH_INTEGRATOR is not set
--# CONFIG_ARCH_IOP3XX is not set
-+# CONFIG_ARCH_NETX is not set
-+# CONFIG_ARCH_H720X is not set
-+# CONFIG_ARCH_IMX is not set
-+# CONFIG_ARCH_IOP32X is not set
-+# CONFIG_ARCH_IOP33X is not set
-+# CONFIG_ARCH_IOP13XX is not set
- # CONFIG_ARCH_IXP4XX is not set
- # CONFIG_ARCH_IXP2000 is not set
-+# CONFIG_ARCH_IXP23XX is not set
- # CONFIG_ARCH_L7200 is not set
-+# CONFIG_ARCH_NS9XXX is not set
-+# CONFIG_ARCH_PNX4008 is not set
- # CONFIG_ARCH_PXA is not set
- # CONFIG_ARCH_RPC is not set
- # CONFIG_ARCH_SA1100 is not set
-@@ -76,34 +137,52 @@
- # CONFIG_ARCH_SHARK is not set
- # CONFIG_ARCH_LH7A40X is not set
- # CONFIG_ARCH_OMAP is not set
--# CONFIG_ARCH_VERSATILE is not set
--# CONFIG_ARCH_IMX is not set
--# CONFIG_ARCH_H720X is not set
--# CONFIG_ARCH_AAEC2000 is not set
--CONFIG_ARCH_AT91=y
-+
-+#
-+# Atmel AT91 System-on-Chip
-+#
- CONFIG_ARCH_AT91RM9200=y
-+# CONFIG_ARCH_AT91SAM9260 is not set
-+# CONFIG_ARCH_AT91SAM9261 is not set
-+# CONFIG_ARCH_AT91SAM9263 is not set
- 
- #
--# AT91RM9200 Implementations
-+# AT91RM9200 Board Type
- #
-+# CONFIG_MACH_ONEARM is not set
- # CONFIG_ARCH_AT91RM9200DK is not set
- # CONFIG_MACH_AT91RM9200EK is not set
- # CONFIG_MACH_CSB337 is not set
- # CONFIG_MACH_CSB637 is not set
- # CONFIG_MACH_CARMEVA is not set
-+# CONFIG_MACH_ATEB9200 is not set
- CONFIG_MACH_KB9200=y
-+# CONFIG_MACH_KAFA is not set
-+# CONFIG_MACH_CHUB is not set
- 
- #
-+# AT91 Board Options
-+#
-+
-+#
-+# AT91 Feature Selections
-+#
-+# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
-+# CONFIG_ATMEL_TCLIB is not set
-+
-+#
- # Processor Type
- #
- CONFIG_CPU_32=y
- CONFIG_CPU_ARM920T=y
--CONFIG_CPU_32v4=y
-+CONFIG_CPU_32v4T=y
- CONFIG_CPU_ABRT_EV4T=y
- CONFIG_CPU_CACHE_V4WT=y
- CONFIG_CPU_CACHE_VIVT=y
- CONFIG_CPU_COPY_V4WB=y
- CONFIG_CPU_TLB_V4WBI=y
-+CONFIG_CPU_CP15=y
-+CONFIG_CPU_CP15_MMU=y
- 
- #
- # Processor Features
-@@ -112,24 +191,44 @@
- # CONFIG_CPU_ICACHE_DISABLE is not set
- # CONFIG_CPU_DCACHE_DISABLE is not set
- # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
-+# CONFIG_OUTER_CACHE is not set
- 
- #
- # Bus support
- #
--CONFIG_ISA_DMA_API=y
- 
- #
- # PCCARD (PCMCIA/CardBus) support
- #
--# CONFIG_PCCARD is not set
-+CONFIG_PCCARD=m
-+# CONFIG_PCMCIA_DEBUG is not set
-+CONFIG_PCMCIA=m
-+CONFIG_PCMCIA_LOAD_CIS=y
-+CONFIG_PCMCIA_IOCTL=y
- 
- #
-+# PC-card bridges
-+#
-+# CONFIG_AT91_CF is not set
-+
-+#
- # Kernel Features
- #
-+# CONFIG_PREEMPT is not set
- # CONFIG_NO_IDLE_HZ is not set
-+CONFIG_HZ=100
-+# CONFIG_AEABI is not set
- # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
-+CONFIG_SELECT_MEMORY_MODEL=y
-+CONFIG_FLATMEM_MANUAL=y
-+# CONFIG_DISCONTIGMEM_MANUAL is not set
-+# CONFIG_SPARSEMEM_MANUAL is not set
- CONFIG_FLATMEM=y
- CONFIG_FLAT_NODE_MEM_MAP=y
-+# CONFIG_SPARSEMEM_STATIC is not set
-+CONFIG_SPLIT_PTLOCK_CPUS=4096
-+# CONFIG_RESOURCES_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=1
- # CONFIG_LEDS is not set
- CONFIG_ALIGNMENT_TRAP=y
- 
-@@ -138,8 +237,10 @@
- #
- CONFIG_ZBOOT_ROM_TEXT=0x10000000
- CONFIG_ZBOOT_ROM_BSS=0x20040000
--CONFIG_ZBOOT_ROM=y
--CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram rw initrd=0x20210000,654933"
-+# CONFIG_ZBOOT_ROM is not set
-+CONFIG_CMDLINE="noinitrd root=/dev/mtdblock0 rootfstype=jffs2 mem=64M"
-+# CONFIG_XIP_KERNEL is not set
-+# CONFIG_KEXEC is not set
- 
- #
- # Floating point emulation
-@@ -150,6 +251,7 @@
- #
- CONFIG_FPE_NWFPE=y
- # CONFIG_FPE_NWFPE_XP is not set
-+# CONFIG_FPE_FASTFPE is not set
- 
- #
- # Userspace binary formats
-@@ -165,6 +267,96 @@
- # CONFIG_PM is not set
- 
- #
-+# Networking
-+#
-+CONFIG_NET=y
-+
-+#
-+# Networking options
-+#
-+# CONFIG_NETDEBUG is not set
-+CONFIG_PACKET=y
-+# CONFIG_PACKET_MMAP is not set
-+CONFIG_UNIX=y
-+# CONFIG_NET_KEY is not set
-+CONFIG_INET=y
-+CONFIG_IP_MULTICAST=y
-+# CONFIG_IP_ADVANCED_ROUTER is not set
-+CONFIG_IP_FIB_HASH=y
-+CONFIG_IP_PNP=y
-+# CONFIG_IP_PNP_DHCP is not set
-+# CONFIG_IP_PNP_BOOTP is not set
-+# CONFIG_IP_PNP_RARP is not set
-+# CONFIG_NET_IPIP is not set
-+# CONFIG_NET_IPGRE is not set
-+# CONFIG_IP_MROUTE is not set
-+# CONFIG_ARPD is not set
-+# CONFIG_SYN_COOKIES is not set
-+# CONFIG_INET_AH is not set
-+# CONFIG_INET_ESP is not set
-+# CONFIG_INET_IPCOMP is not set
-+# CONFIG_INET_XFRM_TUNNEL is not set
-+# CONFIG_INET_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_BEET is not set
-+# CONFIG_INET_DIAG is not set
-+# CONFIG_TCP_CONG_ADVANCED is not set
-+CONFIG_TCP_CONG_CUBIC=y
-+CONFIG_DEFAULT_TCP_CONG="cubic"
-+# CONFIG_TCP_MD5SIG is not set
-+# CONFIG_IPV6 is not set
-+# CONFIG_INET6_XFRM_TUNNEL is not set
-+# CONFIG_INET6_TUNNEL is not set
-+# CONFIG_NETWORK_SECMARK is not set
-+# CONFIG_NETFILTER is not set
-+
-+#
-+# DCCP Configuration (EXPERIMENTAL)
-+#
-+# CONFIG_IP_DCCP is not set
-+
-+#
-+# SCTP Configuration (EXPERIMENTAL)
-+#
-+CONFIG_IP_SCTP=m
-+# CONFIG_SCTP_DBG_MSG is not set
-+# CONFIG_SCTP_DBG_OBJCNT is not set
-+# CONFIG_SCTP_HMAC_NONE is not set
-+# CONFIG_SCTP_HMAC_SHA1 is not set
-+CONFIG_SCTP_HMAC_MD5=y
-+
-+#
-+# TIPC Configuration (EXPERIMENTAL)
-+#
-+# CONFIG_TIPC is not set
-+# CONFIG_ATM is not set
-+# CONFIG_BRIDGE is not set
-+# CONFIG_VLAN_8021Q is not set
-+# CONFIG_DECNET is not set
-+# CONFIG_LLC2 is not set
-+# CONFIG_IPX is not set
-+# CONFIG_ATALK is not set
-+# CONFIG_X25 is not set
-+# CONFIG_LAPB is not set
-+# CONFIG_ECONET is not set
-+# CONFIG_WAN_ROUTER is not set
-+
-+#
-+# QoS and/or fair queueing
-+#
-+# CONFIG_NET_SCHED is not set
-+
-+#
-+# Network testing
-+#
-+# CONFIG_NET_PKTGEN is not set
-+# CONFIG_HAMRADIO is not set
-+# CONFIG_IRDA is not set
-+# CONFIG_BT is not set
-+# CONFIG_IEEE80211 is not set
-+
-+#
- # Device Drivers
- #
- 
-@@ -173,15 +365,97 @@
- #
- CONFIG_STANDALONE=y
- CONFIG_PREVENT_FIRMWARE_BUILD=y
--# CONFIG_FW_LOADER is not set
--CONFIG_DEBUG_DRIVER=y
-+CONFIG_FW_LOADER=y
-+# CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_DEBUG_DEVRES is not set
-+# CONFIG_SYS_HYPERVISOR is not set
- 
- #
-+# Connector - unified userspace <-> kernelspace linker
-+#
-+# CONFIG_CONNECTOR is not set
-+
-+#
- # Memory Technology Devices (MTD)
- #
--# CONFIG_MTD is not set
-+CONFIG_MTD=y
-+# CONFIG_MTD_DEBUG is not set
-+CONFIG_MTD_CONCAT=y
-+CONFIG_MTD_PARTITIONS=y
-+# CONFIG_MTD_REDBOOT_PARTS is not set
-+CONFIG_MTD_CMDLINE_PARTS=y
-+# CONFIG_MTD_AFS_PARTS is not set
- 
- #
-+# User Modules And Translation Layers
-+#
-+CONFIG_MTD_CHAR=y
-+CONFIG_MTD_BLKDEVS=y
-+CONFIG_MTD_BLOCK=y
-+# CONFIG_FTL is not set
-+# CONFIG_NFTL is not set
-+# CONFIG_INFTL is not set
-+# CONFIG_RFD_FTL is not set
-+# CONFIG_SSFDC is not set
-+
-+#
-+# RAM/ROM/Flash chip drivers
-+#
-+# CONFIG_MTD_CFI is not set
-+# CONFIG_MTD_JEDECPROBE is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_1=y
-+CONFIG_MTD_MAP_BANK_WIDTH_2=y
-+CONFIG_MTD_MAP_BANK_WIDTH_4=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-+CONFIG_MTD_CFI_I1=y
-+CONFIG_MTD_CFI_I2=y
-+# CONFIG_MTD_CFI_I4 is not set
-+# CONFIG_MTD_CFI_I8 is not set
-+# CONFIG_MTD_RAM is not set
-+# CONFIG_MTD_ROM is not set
-+# CONFIG_MTD_ABSENT is not set
-+# CONFIG_MTD_OBSOLETE_CHIPS is not set
-+
-+#
-+# Mapping drivers for chip access
-+#
-+CONFIG_MTD_COMPLEX_MAPPINGS=y
-+# CONFIG_MTD_PLATRAM is not set
-+
-+#
-+# Self-contained MTD device drivers
-+#
-+# CONFIG_MTD_SLRAM is not set
-+# CONFIG_MTD_PHRAM is not set
-+# CONFIG_MTD_MTDRAM is not set
-+# CONFIG_MTD_BLOCK2MTD is not set
-+
-+#
-+# Disk-On-Chip Device Drivers
-+#
-+# CONFIG_MTD_DOC2000 is not set
-+# CONFIG_MTD_DOC2001 is not set
-+# CONFIG_MTD_DOC2001PLUS is not set
-+
-+#
-+# NAND Flash Device Drivers
-+#
-+CONFIG_MTD_NAND=y
-+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
-+# CONFIG_MTD_NAND_ECC_SMC is not set
-+CONFIG_MTD_NAND_IDS=y
-+# CONFIG_MTD_NAND_DISKONCHIP is not set
-+CONFIG_MTD_NAND_AT91=y
-+# CONFIG_MTD_NAND_NANDSIM is not set
-+
-+#
-+# OneNAND Flash Device Drivers
-+#
-+# CONFIG_MTD_ONENAND is not set
-+
-+#
- # Parallel port support
- #
- # CONFIG_PARPORT is not set
-@@ -189,6 +463,7 @@
- #
- # Plug and Play support
- #
-+# CONFIG_PNPACPI is not set
- 
- #
- # Block devices
-@@ -196,28 +471,27 @@
- # CONFIG_BLK_DEV_COW_COMMON is not set
- CONFIG_BLK_DEV_LOOP=y
- # CONFIG_BLK_DEV_CRYPTOLOOP is not set
--CONFIG_BLK_DEV_NBD=y
-+# CONFIG_BLK_DEV_NBD is not set
- # CONFIG_BLK_DEV_UB is not set
- CONFIG_BLK_DEV_RAM=y
- CONFIG_BLK_DEV_RAM_COUNT=16
--CONFIG_BLK_DEV_RAM_SIZE=4096
--CONFIG_BLK_DEV_INITRD=y
--CONFIG_INITRAMFS_SOURCE=""
-+CONFIG_BLK_DEV_RAM_SIZE=16384
-+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
- # CONFIG_CDROM_PKTCDVD is not set
-+# CONFIG_ATA_OVER_ETH is not set
- 
- #
--# IO Schedulers
-+# ATA/ATAPI/MFM/RLL support
- #
--CONFIG_IOSCHED_NOOP=y
--CONFIG_IOSCHED_AS=y
--CONFIG_IOSCHED_DEADLINE=y
--CONFIG_IOSCHED_CFQ=y
--# CONFIG_ATA_OVER_ETH is not set
-+# CONFIG_IDE is not set
- 
- #
- # SCSI device support
- #
-+# CONFIG_RAID_ATTRS is not set
- CONFIG_SCSI=y
-+# CONFIG_SCSI_TGT is not set
-+# CONFIG_SCSI_NETLINK is not set
- CONFIG_SCSI_PROC_FS=y
- 
- #
-@@ -233,24 +507,41 @@
- #
- # Some SCSI devices (e.g. CD jukebox) support multiple LUNs
- #
--# CONFIG_SCSI_MULTI_LUN is not set
--# CONFIG_SCSI_CONSTANTS is not set
--# CONFIG_SCSI_LOGGING is not set
-+CONFIG_SCSI_MULTI_LUN=y
-+CONFIG_SCSI_CONSTANTS=y
-+CONFIG_SCSI_LOGGING=y
-+# CONFIG_SCSI_SCAN_ASYNC is not set
- 
- #
--# SCSI Transport Attributes
-+# SCSI Transports
- #
--# CONFIG_SCSI_SPI_ATTRS is not set
-+CONFIG_SCSI_SPI_ATTRS=m
- # CONFIG_SCSI_FC_ATTRS is not set
- # CONFIG_SCSI_ISCSI_ATTRS is not set
-+# CONFIG_SCSI_SAS_ATTRS is not set
-+# CONFIG_SCSI_SAS_LIBSAS is not set
- 
- #
- # SCSI low-level drivers
- #
--# CONFIG_SCSI_SATA is not set
-+# CONFIG_ISCSI_TCP is not set
- # CONFIG_SCSI_DEBUG is not set
- 
- #
-+# PCMCIA SCSI adapter support
-+#
-+# CONFIG_PCMCIA_AHA152X is not set
-+# CONFIG_PCMCIA_FDOMAIN is not set
-+# CONFIG_PCMCIA_NINJA_SCSI is not set
-+# CONFIG_PCMCIA_QLOGIC is not set
-+# CONFIG_PCMCIA_SYM53C500 is not set
-+
-+#
-+# Serial ATA (prod) and Parallel ATA (experimental) drivers
-+#
-+# CONFIG_ATA is not set
-+
-+#
- # Multi-device support (RAID and LVM)
- #
- # CONFIG_MD is not set
-@@ -269,61 +560,8 @@
- #
- 
- #
--# Networking support
-+# Network device support
- #
--CONFIG_NET=y
--
--#
--# Networking options
--#
--CONFIG_PACKET=y
--# CONFIG_PACKET_MMAP is not set
--CONFIG_UNIX=y
--# CONFIG_NET_KEY is not set
--CONFIG_INET=y
--CONFIG_IP_MULTICAST=y
--# CONFIG_IP_ADVANCED_ROUTER is not set
--CONFIG_IP_FIB_HASH=y
--CONFIG_IP_PNP=y
--CONFIG_IP_PNP_DHCP=y
--# CONFIG_IP_PNP_BOOTP is not set
--# CONFIG_IP_PNP_RARP is not set
--# CONFIG_NET_IPIP is not set
--# CONFIG_NET_IPGRE is not set
--# CONFIG_IP_MROUTE is not set
--# CONFIG_SYN_COOKIES is not set
--# CONFIG_INET_AH is not set
--# CONFIG_INET_ESP is not set
--# CONFIG_INET_IPCOMP is not set
--# CONFIG_INET_TUNNEL is not set
--# CONFIG_IP_TCPDIAG is not set
--# CONFIG_IP_TCPDIAG_IPV6 is not set
--# CONFIG_TCP_CONG_ADVANCED is not set
--CONFIG_TCP_CONG_BIC=y
--# CONFIG_IPV6 is not set
--# CONFIG_NETFILTER is not set
--# CONFIG_BRIDGE is not set
--# CONFIG_VLAN_8021Q is not set
--# CONFIG_DECNET is not set
--# CONFIG_LLC2 is not set
--# CONFIG_IPX is not set
--# CONFIG_ATALK is not set
--
--#
--# QoS and/or fair queueing
--#
--# CONFIG_NET_SCHED is not set
--# CONFIG_NET_CLS_ROUTE is not set
--
--#
--# Network testing
--#
--# CONFIG_NET_PKTGEN is not set
--# CONFIG_NETPOLL is not set
--# CONFIG_NET_POLL_CONTROLLER is not set
--# CONFIG_HAMRADIO is not set
--# CONFIG_IRDA is not set
--# CONFIG_BT is not set
- CONFIG_NETDEVICES=y
- # CONFIG_DUMMY is not set
- # CONFIG_BONDING is not set
-@@ -331,6 +569,11 @@
- # CONFIG_TUN is not set
- 
- #
-+# PHY device support
-+#
-+# CONFIG_PHYLIB is not set
-+
-+#
- # Ethernet (10 or 100Mbit)
- #
- CONFIG_NET_ETHERNET=y
-@@ -357,11 +600,20 @@
- # CONFIG_NET_RADIO is not set
- 
- #
-+# PCMCIA network device support
-+#
-+# CONFIG_NET_PCMCIA is not set
-+
-+#
- # Wan interfaces
- #
- # CONFIG_WAN is not set
- # CONFIG_PPP is not set
- # CONFIG_SLIP is not set
-+# CONFIG_SHAPER is not set
-+# CONFIG_NETCONSOLE is not set
-+# CONFIG_NETPOLL is not set
-+# CONFIG_NET_POLL_CONTROLLER is not set
- 
- #
- # ISDN subsystem
-@@ -372,6 +624,7 @@
- # Input device support
- #
- CONFIG_INPUT=y
-+# CONFIG_INPUT_FF_MEMLESS is not set
- 
- #
- # Userland interfaces
-@@ -397,9 +650,7 @@
- #
- # Hardware I/O ports
- #
--CONFIG_SERIO=y
--# CONFIG_SERIO_SERPORT is not set
--# CONFIG_SERIO_RAW is not set
-+# CONFIG_SERIO is not set
- # CONFIG_GAMEPORT is not set
- 
- #
-@@ -408,6 +659,7 @@
- CONFIG_VT=y
- CONFIG_VT_CONSOLE=y
- CONFIG_HW_CONSOLE=y
-+# CONFIG_VT_HW_CONSOLE_BINDING is not set
- # CONFIG_SERIAL_NONSTANDARD is not set
- 
- #
-@@ -420,11 +672,11 @@
- #
- CONFIG_SERIAL_ATMEL=y
- CONFIG_SERIAL_ATMEL_CONSOLE=y
-+# CONFIG_SERIAL_ATMEL_TTYAT is not set
- CONFIG_SERIAL_CORE=y
- CONFIG_SERIAL_CORE_CONSOLE=y
- CONFIG_UNIX98_PTYS=y
--CONFIG_LEGACY_PTYS=y
--CONFIG_LEGACY_PTY_COUNT=256
-+# CONFIG_LEGACY_PTYS is not set
- 
- #
- # IPMI
-@@ -435,21 +687,23 @@
- # Watchdog Cards
- #
- # CONFIG_WATCHDOG is not set
-+# CONFIG_HW_RANDOM is not set
- # CONFIG_NVRAM is not set
--# CONFIG_RTC is not set
--# CONFIG_AT91RM9200_RTC is not set
- # CONFIG_DTLK is not set
- # CONFIG_R3964 is not set
- 
- #
--# Ftape, the floppy tape device driver
-+# PCMCIA character devices
- #
-+# CONFIG_SYNCLINK_CS is not set
-+# CONFIG_CARDMAN_4000 is not set
-+# CONFIG_CARDMAN_4040 is not set
- # CONFIG_RAW_DRIVER is not set
- 
- #
- # TPM devices
- #
--# CONFIG_AT91_SPI is not set
-+# CONFIG_TCG_TPM is not set
- 
- #
- # I2C support
-@@ -457,10 +711,50 @@
- # CONFIG_I2C is not set
- 
- #
-+# SPI support
-+#
-+# CONFIG_SPI is not set
-+# CONFIG_SPI_MASTER is not set
-+
-+#
-+# Dallas's 1-wire bus
-+#
-+# CONFIG_W1 is not set
-+
-+#
-+# Hardware Monitoring support
-+#
-+CONFIG_HWMON=y
-+# CONFIG_HWMON_VID is not set
-+# CONFIG_SENSORS_ABITUGURU is not set
-+# CONFIG_SENSORS_F71805F is not set
-+# CONFIG_SENSORS_PC87427 is not set
-+# CONFIG_SENSORS_VT1211 is not set
-+CONFIG_HWMON_DEBUG_CHIP=y
-+
-+#
- # Misc devices
- #
- 
- #
-+# Multifunction device drivers
-+#
-+# CONFIG_MFD_SM501 is not set
-+
-+#
-+# LED devices
-+#
-+# CONFIG_NEW_LEDS is not set
-+
-+#
-+# LED drivers
-+#
-+
-+#
-+# LED Triggers
-+#
-+
-+#
- # Multimedia devices
- #
- # CONFIG_VIDEO_DEV is not set
-@@ -469,100 +763,156 @@
- # Digital Video Broadcasting Devices
- #
- # CONFIG_DVB is not set
-+# CONFIG_USB_DABUSB is not set
- 
- #
- # Graphics support
- #
--# CONFIG_FB is not set
-+CONFIG_BACKLIGHT_LCD_SUPPORT=y
-+CONFIG_BACKLIGHT_CLASS_DEVICE=y
-+# CONFIG_LCD_CLASS_DEVICE is not set
-+CONFIG_BACKLIGHT_KB920x=y
-+CONFIG_FB=y
-+# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_FB_DDC is not set
-+CONFIG_FB_CFB_FILLRECT=y
-+CONFIG_FB_CFB_COPYAREA=y
-+CONFIG_FB_CFB_IMAGEBLIT=y
-+# CONFIG_FB_SVGALIB is not set
-+# CONFIG_FB_MACMODES is not set
-+# CONFIG_FB_BACKLIGHT is not set
-+CONFIG_FB_MODE_HELPERS=y
-+CONFIG_FB_TILEBLITTING=y
- 
- #
-+# Frame buffer hardware drivers
-+#
-+CONFIG_FB_S1D15605=y
-+# CONFIG_FB_S1D13XXX is not set
-+# CONFIG_FB_VIRTUAL is not set
-+
-+#
- # Console display driver support
- #
- # CONFIG_VGA_CONSOLE is not set
- CONFIG_DUMMY_CONSOLE=y
-+CONFIG_FRAMEBUFFER_CONSOLE=y
-+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-+CONFIG_FONTS=y
-+# CONFIG_FONT_8x8 is not set
-+# CONFIG_FONT_8x16 is not set
-+# CONFIG_FONT_6x11 is not set
-+# CONFIG_FONT_7x14 is not set
-+# CONFIG_FONT_PEARL_8x8 is not set
-+# CONFIG_FONT_ACORN_8x8 is not set
-+CONFIG_FONT_MINI_4x6=y
-+# CONFIG_FONT_SUN8x16 is not set
-+# CONFIG_FONT_SUN12x22 is not set
-+# CONFIG_FONT_10x18 is not set
- 
- #
-+# Logo configuration
-+#
-+# CONFIG_LOGO is not set
-+
-+#
- # Sound
- #
- # CONFIG_SOUND is not set
- 
- #
-+# HID Devices
-+#
-+CONFIG_HID=y
-+# CONFIG_HID_DEBUG is not set
-+
-+#
- # USB support
- #
- CONFIG_USB_ARCH_HAS_HCD=y
- CONFIG_USB_ARCH_HAS_OHCI=y
-+# CONFIG_USB_ARCH_HAS_EHCI is not set
- CONFIG_USB=y
--CONFIG_USB_DEBUG=y
-+# CONFIG_USB_DEBUG is not set
- 
- #
- # Miscellaneous USB options
- #
- CONFIG_USB_DEVICEFS=y
-+# CONFIG_USB_DYNAMIC_MINORS is not set
-+# CONFIG_USB_OTG is not set
- 
- #
- # USB Host Controller Drivers
- #
- # CONFIG_USB_ISP116X_HCD is not set
- CONFIG_USB_OHCI_HCD=y
--# CONFIG_USB_OHCI_BIG_ENDIAN is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
- CONFIG_USB_OHCI_LITTLE_ENDIAN=y
- # CONFIG_USB_SL811_HCD is not set
- 
- #
- # USB Device Class drivers
- #
--# CONFIG_USB_BLUETOOTH_TTY is not set
- # CONFIG_USB_ACM is not set
- # CONFIG_USB_PRINTER is not set
- 
- #
--# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
- #
-+
-+#
-+# may also be needed; see USB_STORAGE Help for more information
-+#
- CONFIG_USB_STORAGE=y
--CONFIG_USB_STORAGE_DEBUG=y
-+# CONFIG_USB_STORAGE_DEBUG is not set
-+# CONFIG_USB_STORAGE_DATAFAB is not set
- # CONFIG_USB_STORAGE_FREECOM is not set
- # CONFIG_USB_STORAGE_DPCM is not set
-+# CONFIG_USB_STORAGE_USBAT is not set
-+# CONFIG_USB_STORAGE_SDDR09 is not set
-+# CONFIG_USB_STORAGE_SDDR55 is not set
-+# CONFIG_USB_STORAGE_JUMPSHOT is not set
-+# CONFIG_USB_STORAGE_ALAUDA is not set
-+# CONFIG_USB_STORAGE_KARMA is not set
-+CONFIG_USB_LIBUSUAL=y
- 
- #
- # USB Input Devices
- #
--# CONFIG_USB_HID is not set
--
--#
--# USB HID Boot Protocol drivers
--#
--# CONFIG_USB_KBD is not set
--# CONFIG_USB_MOUSE is not set
-+CONFIG_USB_HID=y
-+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-+# CONFIG_HID_FF is not set
-+# CONFIG_USB_HIDDEV is not set
- # CONFIG_USB_AIPTEK is not set
- # CONFIG_USB_WACOM is not set
- # CONFIG_USB_ACECAD is not set
- # CONFIG_USB_KBTAB is not set
- # CONFIG_USB_POWERMATE is not set
--# CONFIG_USB_MTOUCH is not set
--# CONFIG_USB_ITMTOUCH is not set
--# CONFIG_USB_EGALAX is not set
-+# CONFIG_USB_TOUCHSCREEN is not set
-+# CONFIG_USB_YEALINK is not set
- # CONFIG_USB_XPAD is not set
- # CONFIG_USB_ATI_REMOTE is not set
-+# CONFIG_USB_ATI_REMOTE2 is not set
-+# CONFIG_USB_KEYSPAN_REMOTE is not set
-+# CONFIG_USB_APPLETOUCH is not set
-+# CONFIG_USB_GTCO is not set
- 
- #
- # USB Imaging devices
- #
-+# CONFIG_USB_MDC800 is not set
- # CONFIG_USB_MICROTEK is not set
- 
- #
--# USB Multimedia devices
--#
--# CONFIG_USB_DABUSB is not set
--
--#
--# Video4Linux support is needed for USB Multimedia device support
--#
--
--#
- # USB Network Adapters
- #
-+# CONFIG_USB_CATC is not set
- # CONFIG_USB_KAWETH is not set
- # CONFIG_USB_PEGASUS is not set
-+# CONFIG_USB_RTL8150 is not set
-+# CONFIG_USB_USBNET_MII is not set
- # CONFIG_USB_USBNET is not set
- # CONFIG_USB_MON is not set
- 
-@@ -580,12 +930,23 @@
- #
- # CONFIG_USB_EMI62 is not set
- # CONFIG_USB_EMI26 is not set
-+# CONFIG_USB_ADUTUX is not set
-+# CONFIG_USB_AUERSWALD is not set
-+# CONFIG_USB_RIO500 is not set
-+# CONFIG_USB_LEGOTOWER is not set
- # CONFIG_USB_LCD is not set
-+# CONFIG_USB_BERRY_CHARGE is not set
- # CONFIG_USB_LED is not set
-+# CONFIG_USB_CYPRESS_CY7C63 is not set
- # CONFIG_USB_CYTHERM is not set
--# CONFIG_USB_PHIDGETKIT is not set
--# CONFIG_USB_PHIDGETSERVO is not set
-+# CONFIG_USB_PHIDGET is not set
- # CONFIG_USB_IDMOUSE is not set
-+# CONFIG_USB_FTDI_ELAN is not set
-+# CONFIG_USB_APPLEDISPLAY is not set
-+# CONFIG_USB_LD is not set
-+# CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_IOWARRIOR is not set
-+# CONFIG_USB_TEST is not set
- 
- #
- # USB DSL modem support
-@@ -599,36 +960,51 @@
- #
- # MMC/SD Card support
- #
--# CONFIG_MMC is not set
-+CONFIG_MMC=y
-+# CONFIG_MMC_DEBUG is not set
-+CONFIG_MMC_BLOCK=y
-+CONFIG_MMC_AT91=y
- 
- #
-+# Real Time Clock
-+#
-+CONFIG_RTC_LIB=y
-+# CONFIG_RTC_CLASS is not set
-+
-+#
- # File systems
- #
- CONFIG_EXT2_FS=y
- CONFIG_EXT2_FS_XATTR=y
--# CONFIG_EXT2_FS_POSIX_ACL is not set
--# CONFIG_EXT2_FS_SECURITY is not set
-+CONFIG_EXT2_FS_POSIX_ACL=y
-+CONFIG_EXT2_FS_SECURITY=y
- # CONFIG_EXT2_FS_XIP is not set
- CONFIG_EXT3_FS=y
- CONFIG_EXT3_FS_XATTR=y
--# CONFIG_EXT3_FS_POSIX_ACL is not set
--# CONFIG_EXT3_FS_SECURITY is not set
-+CONFIG_EXT3_FS_POSIX_ACL=y
-+CONFIG_EXT3_FS_SECURITY=y
-+# CONFIG_EXT4DEV_FS is not set
- CONFIG_JBD=y
- # CONFIG_JBD_DEBUG is not set
- CONFIG_FS_MBCACHE=y
- # CONFIG_REISERFS_FS is not set
- # CONFIG_JFS_FS is not set
--
--#
--# XFS support
--#
-+CONFIG_FS_POSIX_ACL=y
- # CONFIG_XFS_FS is not set
-+# CONFIG_GFS2_FS is not set
-+# CONFIG_OCFS2_FS is not set
- # CONFIG_MINIX_FS is not set
- # CONFIG_ROMFS_FS is not set
--# CONFIG_QUOTA is not set
-+CONFIG_INOTIFY=y
-+CONFIG_INOTIFY_USER=y
-+CONFIG_QUOTA=y
-+# CONFIG_QFMT_V1 is not set
-+CONFIG_QFMT_V2=y
-+CONFIG_QUOTACTL=y
- CONFIG_DNOTIFY=y
--CONFIG_AUTOFS_FS=y
-+# CONFIG_AUTOFS_FS is not set
- CONFIG_AUTOFS4_FS=y
-+# CONFIG_FUSE_FS is not set
- 
- #
- # CD-ROM/DVD Filesystems
-@@ -643,25 +1019,40 @@
- CONFIG_MSDOS_FS=y
- CONFIG_VFAT_FS=y
- CONFIG_FAT_DEFAULT_CODEPAGE=437
--CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
- # CONFIG_NTFS_FS is not set
- 
- #
- # Pseudo filesystems
- #
- CONFIG_PROC_FS=y
-+CONFIG_PROC_SYSCTL=y
- CONFIG_SYSFS=y
--CONFIG_DEVPTS_FS_XATTR=y
--# CONFIG_DEVPTS_FS_SECURITY is not set
- CONFIG_TMPFS=y
--# CONFIG_TMPFS_XATTR is not set
-+# CONFIG_TMPFS_POSIX_ACL is not set
- # CONFIG_HUGETLB_PAGE is not set
- CONFIG_RAMFS=y
-+CONFIG_CONFIGFS_FS=y
- 
- #
- # Miscellaneous filesystems
- #
-+# CONFIG_ADFS_FS is not set
-+# CONFIG_AFFS_FS is not set
-+# CONFIG_HFS_FS is not set
- # CONFIG_HFSPLUS_FS is not set
-+# CONFIG_BEFS_FS is not set
-+# CONFIG_BFS_FS is not set
-+# CONFIG_EFS_FS is not set
-+CONFIG_JFFS2_FS=y
-+CONFIG_JFFS2_FS_DEBUG=0
-+CONFIG_JFFS2_FS_WRITEBUFFER=y
-+# CONFIG_JFFS2_SUMMARY is not set
-+# CONFIG_JFFS2_FS_XATTR is not set
-+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-+CONFIG_JFFS2_ZLIB=y
-+CONFIG_JFFS2_RTIME=y
-+# CONFIG_JFFS2_RUBIN is not set
- # CONFIG_CRAMFS is not set
- # CONFIG_VXFS_FS is not set
- # CONFIG_HPFS_FS is not set
-@@ -675,16 +1066,23 @@
- CONFIG_NFS_FS=y
- CONFIG_NFS_V3=y
- # CONFIG_NFS_V3_ACL is not set
-+CONFIG_NFS_V4=y
-+# CONFIG_NFS_DIRECTIO is not set
- # CONFIG_NFSD is not set
- CONFIG_ROOT_NFS=y
- CONFIG_LOCKD=y
- CONFIG_LOCKD_V4=y
- CONFIG_NFS_COMMON=y
- CONFIG_SUNRPC=y
-+CONFIG_SUNRPC_GSS=y
-+CONFIG_RPCSEC_GSS_KRB5=y
-+# CONFIG_RPCSEC_GSS_SPKM3 is not set
- # CONFIG_SMB_FS is not set
- # CONFIG_CIFS is not set
- # CONFIG_NCP_FS is not set
- # CONFIG_CODA_FS is not set
-+# CONFIG_AFS_FS is not set
-+# CONFIG_9P_FS is not set
- 
- #
- # Partition Types
-@@ -734,26 +1132,51 @@
- # CONFIG_NLS_ISO8859_15 is not set
- # CONFIG_NLS_KOI8_R is not set
- # CONFIG_NLS_KOI8_U is not set
--# CONFIG_NLS_UTF8 is not set
-+CONFIG_NLS_UTF8=y
- 
- #
-+# Distributed Lock Manager
-+#
-+# CONFIG_DLM is not set
-+
-+#
-+# Profiling support
-+#
-+# CONFIG_PROFILING is not set
-+
-+#
- # Kernel hacking
- #
- # CONFIG_PRINTK_TIME is not set
-+CONFIG_ENABLE_MUST_CHECK=y
-+CONFIG_MAGIC_SYSRQ=y
-+# CONFIG_UNUSED_SYMBOLS is not set
-+# CONFIG_DEBUG_FS is not set
-+# CONFIG_HEADERS_CHECK is not set
- CONFIG_DEBUG_KERNEL=y
--# CONFIG_MAGIC_SYSRQ is not set
--CONFIG_LOG_BUF_SHIFT=14
-+# CONFIG_DEBUG_SHIRQ is not set
-+CONFIG_LOG_BUF_SHIFT=17
-+CONFIG_DETECT_SOFTLOCKUP=y
- # CONFIG_SCHEDSTATS is not set
-+# CONFIG_TIMER_STATS is not set
- # CONFIG_DEBUG_SLAB is not set
--# CONFIG_DEBUG_SPINLOCK is not set
--# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-+# CONFIG_DEBUG_RT_MUTEXES is not set
-+# CONFIG_RT_MUTEX_TESTER is not set
-+CONFIG_DEBUG_SPINLOCK=y
-+# CONFIG_DEBUG_MUTEXES is not set
-+CONFIG_DEBUG_SPINLOCK_SLEEP=y
-+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
- # CONFIG_DEBUG_KOBJECT is not set
- CONFIG_DEBUG_BUGVERBOSE=y
- # CONFIG_DEBUG_INFO is not set
--# CONFIG_DEBUG_FS is not set
-+# CONFIG_DEBUG_VM is not set
-+# CONFIG_DEBUG_LIST is not set
- CONFIG_FRAME_POINTER=y
--CONFIG_DEBUG_USER=y
--CONFIG_DEBUG_ERRORS=y
-+CONFIG_FORCED_INLINING=y
-+# CONFIG_RCU_TORTURE_TEST is not set
-+# CONFIG_FAULT_INJECTION is not set
-+# CONFIG_DEBUG_USER is not set
-+# CONFIG_DEBUG_ERRORS is not set
- CONFIG_DEBUG_LL=y
- # CONFIG_DEBUG_ICEDCC is not set
- 
-@@ -766,7 +1189,43 @@
- #
- # Cryptographic options
- #
--# CONFIG_CRYPTO is not set
-+CONFIG_CRYPTO=y
-+CONFIG_CRYPTO_ALGAPI=y
-+CONFIG_CRYPTO_BLKCIPHER=y
-+CONFIG_CRYPTO_HASH=m
-+CONFIG_CRYPTO_MANAGER=y
-+CONFIG_CRYPTO_HMAC=m
-+# CONFIG_CRYPTO_XCBC is not set
-+# CONFIG_CRYPTO_NULL is not set
-+# CONFIG_CRYPTO_MD4 is not set
-+CONFIG_CRYPTO_MD5=y
-+# CONFIG_CRYPTO_SHA1 is not set
-+# CONFIG_CRYPTO_SHA256 is not set
-+# CONFIG_CRYPTO_SHA512 is not set
-+# CONFIG_CRYPTO_WP512 is not set
-+# CONFIG_CRYPTO_TGR192 is not set
-+# CONFIG_CRYPTO_GF128MUL is not set
-+# CONFIG_CRYPTO_ECB is not set
-+CONFIG_CRYPTO_CBC=y
-+CONFIG_CRYPTO_PCBC=m
-+# CONFIG_CRYPTO_LRW is not set
-+CONFIG_CRYPTO_DES=y
-+# CONFIG_CRYPTO_FCRYPT is not set
-+# CONFIG_CRYPTO_BLOWFISH is not set
-+# CONFIG_CRYPTO_TWOFISH is not set
-+# CONFIG_CRYPTO_SERPENT is not set
-+# CONFIG_CRYPTO_AES is not set
-+# CONFIG_CRYPTO_CAST5 is not set
-+# CONFIG_CRYPTO_CAST6 is not set
-+# CONFIG_CRYPTO_TEA is not set
-+# CONFIG_CRYPTO_ARC4 is not set
-+# CONFIG_CRYPTO_KHAZAD is not set
-+# CONFIG_CRYPTO_ANUBIS is not set
-+# CONFIG_CRYPTO_DEFLATE is not set
-+# CONFIG_CRYPTO_MICHAEL_MIC is not set
-+# CONFIG_CRYPTO_CRC32C is not set
-+# CONFIG_CRYPTO_CAMELLIA is not set
-+# CONFIG_CRYPTO_TEST is not set
- 
- #
- # Hardware crypto devices
-@@ -775,6 +1234,14 @@
- #
- # Library routines
- #
-+CONFIG_BITREVERSE=y
- # CONFIG_CRC_CCITT is not set
-+# CONFIG_CRC16 is not set
- CONFIG_CRC32=y
- # CONFIG_LIBCRC32C is not set
-+CONFIG_AUDIT_GENERIC=y
-+CONFIG_ZLIB_INFLATE=y
-+CONFIG_ZLIB_DEFLATE=y
-+CONFIG_PLIST=y
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_IOPORT=y
-Index: linux-2.6.22.1/arch/arm/configs/at91sam9260ek_defconfig
-===================================================================
---- linux-2.6.22.1/arch/arm/configs/at91sam9260ek_defconfig	(revision 1)
-+++ linux-2.6.22.1/arch/arm/configs/at91sam9260ek_defconfig	(arbetskopia)
-@@ -1,18 +1,24 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.19-rc6
--# Fri Nov 17 18:42:21 2006
-+# Linux kernel version: 2.6.21
-+# Mon May  7 11:42:02 2007
- #
- CONFIG_ARM=y
-+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-+CONFIG_GENERIC_GPIO=y
- # CONFIG_GENERIC_TIME is not set
- CONFIG_MMU=y
-+# CONFIG_NO_IOPORT is not set
- CONFIG_GENERIC_HARDIRQS=y
- CONFIG_TRACE_IRQFLAGS_SUPPORT=y
- CONFIG_HARDIRQS_SW_RESEND=y
- CONFIG_GENERIC_IRQ_PROBE=y
- CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
- CONFIG_GENERIC_HWEIGHT=y
- CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_ZONE_DMA=y
- CONFIG_VECTORS_BASE=0xffff0000
- CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
- 
-@@ -31,13 +37,16 @@
- # CONFIG_SWAP is not set
- CONFIG_SYSVIPC=y
- # CONFIG_IPC_NS is not set
-+CONFIG_SYSVIPC_SYSCTL=y
- # CONFIG_POSIX_MQUEUE is not set
- # CONFIG_BSD_PROCESS_ACCT is not set
- # CONFIG_TASKSTATS is not set
- # CONFIG_UTS_NS is not set
- # CONFIG_AUDIT is not set
- # CONFIG_IKCONFIG is not set
-+CONFIG_SYSFS_DEPRECATED=y
- # CONFIG_RELAY is not set
-+CONFIG_BLK_DEV_INITRD=y
- CONFIG_INITRAMFS_SOURCE=""
- CONFIG_CC_OPTIMIZE_FOR_SIZE=y
- CONFIG_SYSCTL=y
-@@ -76,7 +85,9 @@
- # Block layer
- #
- CONFIG_BLOCK=y
-+# CONFIG_LBD is not set
- # CONFIG_BLK_DEV_IO_TRACE is not set
-+# CONFIG_LSF is not set
- 
- #
- # IO Schedulers
-@@ -110,10 +121,12 @@
- # CONFIG_ARCH_IMX is not set
- # CONFIG_ARCH_IOP32X is not set
- # CONFIG_ARCH_IOP33X is not set
-+# CONFIG_ARCH_IOP13XX is not set
- # CONFIG_ARCH_IXP4XX is not set
- # CONFIG_ARCH_IXP2000 is not set
- # CONFIG_ARCH_IXP23XX is not set
- # CONFIG_ARCH_L7200 is not set
-+# CONFIG_ARCH_NS9XXX is not set
- # CONFIG_ARCH_PNX4008 is not set
- # CONFIG_ARCH_PXA is not set
- # CONFIG_ARCH_RPC is not set
-@@ -129,21 +142,29 @@
- # CONFIG_ARCH_AT91RM9200 is not set
- CONFIG_ARCH_AT91SAM9260=y
- # CONFIG_ARCH_AT91SAM9261 is not set
-+# CONFIG_ARCH_AT91SAM9263 is not set
- 
- #
--# AT91SAM9260 Board Type
-+# AT91SAM9260 Variants
- #
-+# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set
-+
-+#
-+# AT91SAM9260 / AT91SAM9XE Board Type
-+#
- CONFIG_MACH_AT91SAM9260EK=y
- 
- #
- # AT91 Board Options
- #
-+# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
- # CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
- 
- #
- # AT91 Feature Selections
- #
- # CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
-+# CONFIG_ATMEL_TCLIB is not set
- 
- #
- # Processor Type
-@@ -166,6 +187,7 @@
- # CONFIG_CPU_DCACHE_DISABLE is not set
- # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
- # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
-+# CONFIG_OUTER_CACHE is not set
- 
- #
- # Bus support
-@@ -193,6 +215,7 @@
- # CONFIG_SPARSEMEM_STATIC is not set
- CONFIG_SPLIT_PTLOCK_CPUS=4096
- # CONFIG_RESOURCES_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=1
- # CONFIG_LEDS is not set
- CONFIG_ALIGNMENT_TRAP=y
- 
-@@ -203,6 +226,7 @@
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
- # CONFIG_XIP_KERNEL is not set
-+# CONFIG_KEXEC is not set
- 
- #
- # Floating point emulation
-@@ -228,7 +252,6 @@
- # Power management options
- #
- # CONFIG_PM is not set
--# CONFIG_APM is not set
- 
- #
- # Networking
-@@ -242,9 +265,6 @@
- CONFIG_PACKET=y
- # CONFIG_PACKET_MMAP is not set
- CONFIG_UNIX=y
--CONFIG_XFRM=y
--# CONFIG_XFRM_USER is not set
--# CONFIG_XFRM_SUB_POLICY is not set
- # CONFIG_NET_KEY is not set
- CONFIG_INET=y
- # CONFIG_IP_MULTICAST is not set
-@@ -263,14 +283,15 @@
- # CONFIG_INET_IPCOMP is not set
- # CONFIG_INET_XFRM_TUNNEL is not set
- # CONFIG_INET_TUNNEL is not set
--CONFIG_INET_XFRM_MODE_TRANSPORT=y
--CONFIG_INET_XFRM_MODE_TUNNEL=y
--CONFIG_INET_XFRM_MODE_BEET=y
-+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_BEET is not set
- CONFIG_INET_DIAG=y
- CONFIG_INET_TCP_DIAG=y
- # CONFIG_TCP_CONG_ADVANCED is not set
- CONFIG_TCP_CONG_CUBIC=y
- CONFIG_DEFAULT_TCP_CONG="cubic"
-+# CONFIG_TCP_MD5SIG is not set
- # CONFIG_IPV6 is not set
- # CONFIG_INET6_XFRM_TUNNEL is not set
- # CONFIG_INET6_TUNNEL is not set
-@@ -328,6 +349,7 @@
- CONFIG_PREVENT_FIRMWARE_BUILD=y
- # CONFIG_FW_LOADER is not set
- # CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_DEBUG_DEVRES is not set
- # CONFIG_SYS_HYPERVISOR is not set
- 
- #
-@@ -348,6 +370,7 @@
- #
- # Plug and Play support
- #
-+# CONFIG_PNPACPI is not set
- 
- #
- # Block devices
-@@ -360,7 +383,6 @@
- CONFIG_BLK_DEV_RAM_COUNT=16
- CONFIG_BLK_DEV_RAM_SIZE=8192
- CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
--CONFIG_BLK_DEV_INITRD=y
- # CONFIG_CDROM_PKTCDVD is not set
- # CONFIG_ATA_OVER_ETH is not set
- 
-@@ -369,6 +391,7 @@
- #
- # CONFIG_RAID_ATTRS is not set
- CONFIG_SCSI=y
-+# CONFIG_SCSI_TGT is not set
- # CONFIG_SCSI_NETLINK is not set
- CONFIG_SCSI_PROC_FS=y
- 
-@@ -388,6 +411,7 @@
- CONFIG_SCSI_MULTI_LUN=y
- # CONFIG_SCSI_CONSTANTS is not set
- # CONFIG_SCSI_LOGGING is not set
-+# CONFIG_SCSI_SCAN_ASYNC is not set
- 
- #
- # SCSI Transports
-@@ -405,6 +429,11 @@
- # CONFIG_SCSI_DEBUG is not set
- 
- #
-+# Serial ATA (prod) and Parallel ATA (experimental) drivers
-+#
-+# CONFIG_ATA is not set
-+
-+#
- # Multi-device support (RAID and LVM)
- #
- # CONFIG_MD is not set
-@@ -425,7 +454,51 @@
- #
- # Network device support
- #
--# CONFIG_NETDEVICES is not set
-+CONFIG_NETDEVICES=y
-+# CONFIG_DUMMY is not set
-+# CONFIG_BONDING is not set
-+# CONFIG_EQUALIZER is not set
-+# CONFIG_TUN is not set
-+
-+#
-+# PHY device support
-+#
-+# CONFIG_PHYLIB is not set
-+
-+#
-+# Ethernet (10 or 100Mbit)
-+#
-+CONFIG_NET_ETHERNET=y
-+CONFIG_MII=y
-+CONFIG_MACB=y
-+# CONFIG_SMC91X is not set
-+# CONFIG_DM9000 is not set
-+
-+#
-+# Ethernet (1000 Mbit)
-+#
-+
-+#
-+# Ethernet (10000 Mbit)
-+#
-+
-+#
-+# Token Ring devices
-+#
-+
-+#
-+# Wireless LAN (non-hamradio)
-+#
-+# CONFIG_NET_RADIO is not set
-+
-+#
-+# Wan interfaces
-+#
-+# CONFIG_WAN is not set
-+# CONFIG_PPP is not set
-+# CONFIG_SLIP is not set
-+# CONFIG_SHAPER is not set
-+# CONFIG_NETCONSOLE is not set
- # CONFIG_NETPOLL is not set
- # CONFIG_NET_POLL_CONTROLLER is not set
- 
-@@ -517,10 +590,6 @@
- # CONFIG_NVRAM is not set
- # CONFIG_DTLK is not set
- # CONFIG_R3964 is not set
--
--#
--# Ftape, the floppy tape device driver
--#
- # CONFIG_RAW_DRIVER is not set
- 
- #
-@@ -553,9 +622,13 @@
- #
- # Misc devices
- #
--# CONFIG_TIFM_CORE is not set
- 
- #
-+# Multifunction device drivers
-+#
-+# CONFIG_MFD_SM501 is not set
-+
-+#
- # LED devices
- #
- # CONFIG_NEW_LEDS is not set
-@@ -582,7 +655,7 @@
- #
- # Graphics support
- #
--# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
- # CONFIG_FB is not set
- 
- #
-@@ -590,7 +663,6 @@
- #
- # CONFIG_VGA_CONSOLE is not set
- CONFIG_DUMMY_CONSOLE=y
--# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
- 
- #
- # Sound
-@@ -598,6 +670,12 @@
- # CONFIG_SOUND is not set
- 
- #
-+# HID Devices
-+#
-+CONFIG_HID=y
-+# CONFIG_HID_DEBUG is not set
-+
-+#
- # USB support
- #
- CONFIG_USB_ARCH_HAS_HCD=y
-@@ -610,7 +688,6 @@
- # Miscellaneous USB options
- #
- CONFIG_USB_DEVICEFS=y
--# CONFIG_USB_BANDWIDTH is not set
- # CONFIG_USB_DYNAMIC_MINORS is not set
- # CONFIG_USB_OTG is not set
- 
-@@ -619,7 +696,8 @@
- #
- # CONFIG_USB_ISP116X_HCD is not set
- CONFIG_USB_OHCI_HCD=y
--# CONFIG_USB_OHCI_BIG_ENDIAN is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
- CONFIG_USB_OHCI_LITTLE_ENDIAN=y
- # CONFIG_USB_SL811_HCD is not set
- 
-@@ -671,6 +749,7 @@
- # CONFIG_USB_ATI_REMOTE2 is not set
- # CONFIG_USB_KEYSPAN_REMOTE is not set
- # CONFIG_USB_APPLETOUCH is not set
-+# CONFIG_USB_GTCO is not set
- 
- #
- # USB Imaging devices
-@@ -708,6 +787,7 @@
- # CONFIG_USB_RIO500 is not set
- # CONFIG_USB_LEGOTOWER is not set
- # CONFIG_USB_LCD is not set
-+# CONFIG_USB_BERRY_CHARGE is not set
- # CONFIG_USB_LED is not set
- # CONFIG_USB_CYPRESS_CY7C63 is not set
- # CONFIG_USB_CYTHERM is not set
-@@ -717,6 +797,7 @@
- # CONFIG_USB_APPLEDISPLAY is not set
- # CONFIG_USB_LD is not set
- # CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_IOWARRIOR is not set
- # CONFIG_USB_TEST is not set
- 
- #
-@@ -889,6 +970,11 @@
- # CONFIG_NLS_UTF8 is not set
- 
- #
-+# Distributed Lock Manager
-+#
-+# CONFIG_DLM is not set
-+
-+#
- # Profiling support
- #
- # CONFIG_PROFILING is not set
-@@ -900,28 +986,30 @@
- CONFIG_ENABLE_MUST_CHECK=y
- # CONFIG_MAGIC_SYSRQ is not set
- # CONFIG_UNUSED_SYMBOLS is not set
-+# CONFIG_DEBUG_FS is not set
-+# CONFIG_HEADERS_CHECK is not set
- CONFIG_DEBUG_KERNEL=y
-+# CONFIG_DEBUG_SHIRQ is not set
- CONFIG_LOG_BUF_SHIFT=14
- CONFIG_DETECT_SOFTLOCKUP=y
- # CONFIG_SCHEDSTATS is not set
-+# CONFIG_TIMER_STATS is not set
- # CONFIG_DEBUG_SLAB is not set
- # CONFIG_DEBUG_RT_MUTEXES is not set
- # CONFIG_RT_MUTEX_TESTER is not set
- # CONFIG_DEBUG_SPINLOCK is not set
- # CONFIG_DEBUG_MUTEXES is not set
--# CONFIG_DEBUG_RWSEMS is not set
- # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
- # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
- # CONFIG_DEBUG_KOBJECT is not set
- CONFIG_DEBUG_BUGVERBOSE=y
- # CONFIG_DEBUG_INFO is not set
--# CONFIG_DEBUG_FS is not set
- # CONFIG_DEBUG_VM is not set
- # CONFIG_DEBUG_LIST is not set
- CONFIG_FRAME_POINTER=y
- CONFIG_FORCED_INLINING=y
--# CONFIG_HEADERS_CHECK is not set
- # CONFIG_RCU_TORTURE_TEST is not set
-+# CONFIG_FAULT_INJECTION is not set
- CONFIG_DEBUG_USER=y
- # CONFIG_DEBUG_ERRORS is not set
- CONFIG_DEBUG_LL=y
-@@ -941,9 +1029,12 @@
- #
- # Library routines
- #
-+CONFIG_BITREVERSE=y
- # CONFIG_CRC_CCITT is not set
- # CONFIG_CRC16 is not set
- CONFIG_CRC32=y
- # CONFIG_LIBCRC32C is not set
- CONFIG_ZLIB_INFLATE=y
- CONFIG_PLIST=y
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_IOPORT=y
-Index: linux-2.6.22.1/arch/arm/configs/at91sam9261ek_defconfig
-===================================================================
---- linux-2.6.22.1/arch/arm/configs/at91sam9261ek_defconfig	(revision 1)
-+++ linux-2.6.22.1/arch/arm/configs/at91sam9261ek_defconfig	(arbetskopia)
-@@ -1,18 +1,24 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.19-rc6
--# Fri Nov 17 18:00:38 2006
-+# Linux kernel version: 2.6.21
-+# Mon May  7 11:42:30 2007
- #
- CONFIG_ARM=y
-+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-+CONFIG_GENERIC_GPIO=y
- # CONFIG_GENERIC_TIME is not set
- CONFIG_MMU=y
-+# CONFIG_NO_IOPORT is not set
- CONFIG_GENERIC_HARDIRQS=y
- CONFIG_TRACE_IRQFLAGS_SUPPORT=y
- CONFIG_HARDIRQS_SW_RESEND=y
- CONFIG_GENERIC_IRQ_PROBE=y
- CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
- CONFIG_GENERIC_HWEIGHT=y
- CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_ZONE_DMA=y
- CONFIG_VECTORS_BASE=0xffff0000
- CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
- 
-@@ -31,13 +37,16 @@
- # CONFIG_SWAP is not set
- CONFIG_SYSVIPC=y
- # CONFIG_IPC_NS is not set
-+CONFIG_SYSVIPC_SYSCTL=y
- # CONFIG_POSIX_MQUEUE is not set
- # CONFIG_BSD_PROCESS_ACCT is not set
- # CONFIG_TASKSTATS is not set
- # CONFIG_UTS_NS is not set
- # CONFIG_AUDIT is not set
- # CONFIG_IKCONFIG is not set
-+CONFIG_SYSFS_DEPRECATED=y
- # CONFIG_RELAY is not set
-+CONFIG_BLK_DEV_INITRD=y
- CONFIG_INITRAMFS_SOURCE=""
- CONFIG_CC_OPTIMIZE_FOR_SIZE=y
- CONFIG_SYSCTL=y
-@@ -76,7 +85,9 @@
- # Block layer
- #
- CONFIG_BLOCK=y
-+# CONFIG_LBD is not set
- # CONFIG_BLK_DEV_IO_TRACE is not set
-+# CONFIG_LSF is not set
- 
- #
- # IO Schedulers
-@@ -110,10 +121,12 @@
- # CONFIG_ARCH_IMX is not set
- # CONFIG_ARCH_IOP32X is not set
- # CONFIG_ARCH_IOP33X is not set
-+# CONFIG_ARCH_IOP13XX is not set
- # CONFIG_ARCH_IXP4XX is not set
- # CONFIG_ARCH_IXP2000 is not set
- # CONFIG_ARCH_IXP23XX is not set
- # CONFIG_ARCH_L7200 is not set
-+# CONFIG_ARCH_NS9XXX is not set
- # CONFIG_ARCH_PNX4008 is not set
- # CONFIG_ARCH_PXA is not set
- # CONFIG_ARCH_RPC is not set
-@@ -129,6 +142,7 @@
- # CONFIG_ARCH_AT91RM9200 is not set
- # CONFIG_ARCH_AT91SAM9260 is not set
- CONFIG_ARCH_AT91SAM9261=y
-+# CONFIG_ARCH_AT91SAM9263 is not set
- 
- #
- # AT91SAM9261 Board Type
-@@ -138,12 +152,14 @@
- #
- # AT91 Board Options
- #
-+# CONFIG_MTD_AT91_DATAFLASH_CARD is not set
- # CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set
- 
- #
- # AT91 Feature Selections
- #
- # CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
-+# CONFIG_ATMEL_TCLIB is not set
- 
- #
- # Processor Type
-@@ -166,6 +182,7 @@
- # CONFIG_CPU_DCACHE_DISABLE is not set
- # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
- # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
-+# CONFIG_OUTER_CACHE is not set
- 
- #
- # Bus support
-@@ -193,6 +210,7 @@
- # CONFIG_SPARSEMEM_STATIC is not set
- CONFIG_SPLIT_PTLOCK_CPUS=4096
- # CONFIG_RESOURCES_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=1
- # CONFIG_LEDS is not set
- CONFIG_ALIGNMENT_TRAP=y
- 
-@@ -203,6 +221,7 @@
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
- # CONFIG_XIP_KERNEL is not set
-+# CONFIG_KEXEC is not set
- 
- #
- # Floating point emulation
-@@ -228,7 +247,6 @@
- # Power management options
- #
- # CONFIG_PM is not set
--# CONFIG_APM is not set
- 
- #
- # Networking
-@@ -245,6 +263,7 @@
- CONFIG_XFRM=y
- # CONFIG_XFRM_USER is not set
- # CONFIG_XFRM_SUB_POLICY is not set
-+# CONFIG_XFRM_MIGRATE is not set
- # CONFIG_NET_KEY is not set
- CONFIG_INET=y
- # CONFIG_IP_MULTICAST is not set
-@@ -271,6 +290,7 @@
- # CONFIG_TCP_CONG_ADVANCED is not set
- CONFIG_TCP_CONG_CUBIC=y
- CONFIG_DEFAULT_TCP_CONG="cubic"
-+# CONFIG_TCP_MD5SIG is not set
- # CONFIG_IPV6 is not set
- # CONFIG_INET6_XFRM_TUNNEL is not set
- # CONFIG_INET6_TUNNEL is not set
-@@ -328,6 +348,7 @@
- CONFIG_PREVENT_FIRMWARE_BUILD=y
- # CONFIG_FW_LOADER is not set
- # CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_DEBUG_DEVRES is not set
- # CONFIG_SYS_HYPERVISOR is not set
- 
- #
-@@ -350,6 +371,7 @@
- # User Modules And Translation Layers
- #
- # CONFIG_MTD_CHAR is not set
-+CONFIG_MTD_BLKDEVS=y
- CONFIG_MTD_BLOCK=y
- # CONFIG_FTL is not set
- # CONFIG_NFTL is not set
-@@ -386,6 +408,8 @@
- #
- # Self-contained MTD device drivers
- #
-+# CONFIG_MTD_DATAFLASH is not set
-+# CONFIG_MTD_M25P80 is not set
- # CONFIG_MTD_SLRAM is not set
- # CONFIG_MTD_PHRAM is not set
- # CONFIG_MTD_MTDRAM is not set
-@@ -422,6 +446,7 @@
- #
- # Plug and Play support
- #
-+# CONFIG_PNPACPI is not set
- 
- #
- # Block devices
-@@ -434,7 +459,6 @@
- CONFIG_BLK_DEV_RAM_COUNT=16
- CONFIG_BLK_DEV_RAM_SIZE=8192
- CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
--CONFIG_BLK_DEV_INITRD=y
- # CONFIG_CDROM_PKTCDVD is not set
- # CONFIG_ATA_OVER_ETH is not set
- 
-@@ -443,6 +467,7 @@
- #
- # CONFIG_RAID_ATTRS is not set
- CONFIG_SCSI=y
-+# CONFIG_SCSI_TGT is not set
- # CONFIG_SCSI_NETLINK is not set
- CONFIG_SCSI_PROC_FS=y
- 
-@@ -462,6 +487,7 @@
- CONFIG_SCSI_MULTI_LUN=y
- # CONFIG_SCSI_CONSTANTS is not set
- # CONFIG_SCSI_LOGGING is not set
-+# CONFIG_SCSI_SCAN_ASYNC is not set
- 
- #
- # SCSI Transports
-@@ -479,6 +505,11 @@
- # CONFIG_SCSI_DEBUG is not set
- 
- #
-+# Serial ATA (prod) and Parallel ATA (experimental) drivers
-+#
-+# CONFIG_ATA is not set
-+
-+#
- # Multi-device support (RAID and LVM)
- #
- # CONFIG_MD is not set
-@@ -575,7 +606,16 @@
- # CONFIG_INPUT_KEYBOARD is not set
- # CONFIG_INPUT_MOUSE is not set
- # CONFIG_INPUT_JOYSTICK is not set
--# CONFIG_INPUT_TOUCHSCREEN is not set
-+CONFIG_INPUT_TOUCHSCREEN=y
-+CONFIG_TOUCHSCREEN_ADS7846=y
-+# CONFIG_TOUCHSCREEN_GUNZE is not set
-+# CONFIG_TOUCHSCREEN_ELO is not set
-+# CONFIG_TOUCHSCREEN_MTOUCH is not set
-+# CONFIG_TOUCHSCREEN_MK712 is not set
-+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
-+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
-+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-+# CONFIG_TOUCHSCREEN_UCB1400 is not set
- # CONFIG_INPUT_MISC is not set
- 
- #
-@@ -634,10 +674,6 @@
- # CONFIG_NVRAM is not set
- # CONFIG_DTLK is not set
- # CONFIG_R3964 is not set
--
--#
--# Ftape, the floppy tape device driver
--#
- # CONFIG_RAW_DRIVER is not set
- 
- #
-@@ -662,6 +698,7 @@
- # I2C Hardware Bus support
- #
- CONFIG_I2C_AT91=y
-+CONFIG_I2C_AT91_CLOCKRATE=100000
- # CONFIG_I2C_OCORES is not set
- # CONFIG_I2C_PARPORT_LIGHT is not set
- # CONFIG_I2C_STUB is not set
-@@ -686,10 +723,22 @@
- #
- # SPI support
- #
--# CONFIG_SPI is not set
--# CONFIG_SPI_MASTER is not set
-+CONFIG_SPI=y
-+# CONFIG_SPI_DEBUG is not set
-+CONFIG_SPI_MASTER=y
- 
- #
-+# SPI Master Controller Drivers
-+#
-+CONFIG_SPI_ATMEL=y
-+# CONFIG_SPI_BITBANG is not set
-+
-+#
-+# SPI Protocol Masters
-+#
-+# CONFIG_SPI_AT25 is not set
-+
-+#
- # Dallas's 1-wire bus
- #
- # CONFIG_W1 is not set
-@@ -703,9 +752,13 @@
- #
- # Misc devices
- #
--# CONFIG_TIFM_CORE is not set
- 
- #
-+# Multifunction device drivers
-+#
-+# CONFIG_MFD_SM501 is not set
-+
-+#
- # LED devices
- #
- # CONFIG_NEW_LEDS is not set
-@@ -732,7 +785,7 @@
- #
- # Graphics support
- #
--# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
- # CONFIG_FB is not set
- 
- #
-@@ -740,7 +793,6 @@
- #
- # CONFIG_VGA_CONSOLE is not set
- CONFIG_DUMMY_CONSOLE=y
--# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
- 
- #
- # Sound
-@@ -748,6 +800,12 @@
- # CONFIG_SOUND is not set
- 
- #
-+# HID Devices
-+#
-+CONFIG_HID=y
-+# CONFIG_HID_DEBUG is not set
-+
-+#
- # USB support
- #
- CONFIG_USB_ARCH_HAS_HCD=y
-@@ -760,7 +818,6 @@
- # Miscellaneous USB options
- #
- CONFIG_USB_DEVICEFS=y
--# CONFIG_USB_BANDWIDTH is not set
- # CONFIG_USB_DYNAMIC_MINORS is not set
- # CONFIG_USB_OTG is not set
- 
-@@ -769,7 +826,8 @@
- #
- # CONFIG_USB_ISP116X_HCD is not set
- CONFIG_USB_OHCI_HCD=y
--# CONFIG_USB_OHCI_BIG_ENDIAN is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
- CONFIG_USB_OHCI_LITTLE_ENDIAN=y
- # CONFIG_USB_SL811_HCD is not set
- 
-@@ -821,6 +879,7 @@
- # CONFIG_USB_ATI_REMOTE2 is not set
- # CONFIG_USB_KEYSPAN_REMOTE is not set
- # CONFIG_USB_APPLETOUCH is not set
-+# CONFIG_USB_GTCO is not set
- 
- #
- # USB Imaging devices
-@@ -858,6 +917,7 @@
- # CONFIG_USB_RIO500 is not set
- # CONFIG_USB_LEGOTOWER is not set
- # CONFIG_USB_LCD is not set
-+# CONFIG_USB_BERRY_CHARGE is not set
- # CONFIG_USB_LED is not set
- # CONFIG_USB_CYPRESS_CY7C63 is not set
- # CONFIG_USB_CYTHERM is not set
-@@ -867,6 +927,7 @@
- # CONFIG_USB_APPLEDISPLAY is not set
- # CONFIG_USB_LD is not set
- # CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_IOWARRIOR is not set
- # CONFIG_USB_TEST is not set
- 
- #
-@@ -903,7 +964,6 @@
- # CONFIG_MMC_DEBUG is not set
- CONFIG_MMC_BLOCK=y
- CONFIG_MMC_AT91=m
--# CONFIG_MMC_TIFM_SD is not set
- 
- #
- # Real Time Clock
-@@ -973,7 +1033,6 @@
- # CONFIG_BEFS_FS is not set
- # CONFIG_BFS_FS is not set
- # CONFIG_EFS_FS is not set
--# CONFIG_JFFS_FS is not set
- # CONFIG_JFFS2_FS is not set
- CONFIG_CRAMFS=y
- # CONFIG_VXFS_FS is not set
-@@ -1045,6 +1104,11 @@
- # CONFIG_NLS_UTF8 is not set
- 
- #
-+# Distributed Lock Manager
-+#
-+# CONFIG_DLM is not set
-+
-+#
- # Profiling support
- #
- # CONFIG_PROFILING is not set
-@@ -1056,28 +1120,30 @@
- CONFIG_ENABLE_MUST_CHECK=y
- # CONFIG_MAGIC_SYSRQ is not set
- # CONFIG_UNUSED_SYMBOLS is not set
-+# CONFIG_DEBUG_FS is not set
-+# CONFIG_HEADERS_CHECK is not set
- CONFIG_DEBUG_KERNEL=y
-+# CONFIG_DEBUG_SHIRQ is not set
- CONFIG_LOG_BUF_SHIFT=14
- CONFIG_DETECT_SOFTLOCKUP=y
- # CONFIG_SCHEDSTATS is not set
-+# CONFIG_TIMER_STATS is not set
- # CONFIG_DEBUG_SLAB is not set
- # CONFIG_DEBUG_RT_MUTEXES is not set
- # CONFIG_RT_MUTEX_TESTER is not set
- # CONFIG_DEBUG_SPINLOCK is not set
- # CONFIG_DEBUG_MUTEXES is not set
--# CONFIG_DEBUG_RWSEMS is not set
- # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
- # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
- # CONFIG_DEBUG_KOBJECT is not set
- CONFIG_DEBUG_BUGVERBOSE=y
- # CONFIG_DEBUG_INFO is not set
--# CONFIG_DEBUG_FS is not set
- # CONFIG_DEBUG_VM is not set
- # CONFIG_DEBUG_LIST is not set
- CONFIG_FRAME_POINTER=y
- CONFIG_FORCED_INLINING=y
--# CONFIG_HEADERS_CHECK is not set
- # CONFIG_RCU_TORTURE_TEST is not set
-+# CONFIG_FAULT_INJECTION is not set
- CONFIG_DEBUG_USER=y
- # CONFIG_DEBUG_ERRORS is not set
- CONFIG_DEBUG_LL=y
-@@ -1097,9 +1163,12 @@
- #
- # Library routines
- #
-+CONFIG_BITREVERSE=y
- # CONFIG_CRC_CCITT is not set
- # CONFIG_CRC16 is not set
- CONFIG_CRC32=y
- # CONFIG_LIBCRC32C is not set
- CONFIG_ZLIB_INFLATE=y
- CONFIG_PLIST=y
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_IOPORT=y
-Index: linux-2.6.22.1/arch/arm/configs/at91sam9263ek_defconfig
-===================================================================
---- linux-2.6.22.1/arch/arm/configs/at91sam9263ek_defconfig	(revision 1)
-+++ linux-2.6.22.1/arch/arm/configs/at91sam9263ek_defconfig	(arbetskopia)
-@@ -1,11 +1,14 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.20-rc1
--# Mon Jan  8 16:06:54 2007
-+# Linux kernel version: 2.6.21
-+# Mon May  7 11:42:49 2007
- #
- CONFIG_ARM=y
-+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-+CONFIG_GENERIC_GPIO=y
- # CONFIG_GENERIC_TIME is not set
- CONFIG_MMU=y
-+# CONFIG_NO_IOPORT is not set
- CONFIG_GENERIC_HARDIRQS=y
- CONFIG_TRACE_IRQFLAGS_SUPPORT=y
- CONFIG_HARDIRQS_SW_RESEND=y
-@@ -15,6 +18,7 @@
- # CONFIG_ARCH_HAS_ILOG2_U64 is not set
- CONFIG_GENERIC_HWEIGHT=y
- CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_ZONE_DMA=y
- CONFIG_VECTORS_BASE=0xffff0000
- CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
- 
-@@ -33,6 +37,7 @@
- # CONFIG_SWAP is not set
- CONFIG_SYSVIPC=y
- # CONFIG_IPC_NS is not set
-+CONFIG_SYSVIPC_SYSCTL=y
- # CONFIG_POSIX_MQUEUE is not set
- # CONFIG_BSD_PROCESS_ACCT is not set
- # CONFIG_TASKSTATS is not set
-@@ -41,6 +46,7 @@
- # CONFIG_IKCONFIG is not set
- CONFIG_SYSFS_DEPRECATED=y
- # CONFIG_RELAY is not set
-+CONFIG_BLK_DEV_INITRD=y
- CONFIG_INITRAMFS_SOURCE=""
- CONFIG_CC_OPTIMIZE_FOR_SIZE=y
- CONFIG_SYSCTL=y
-@@ -120,6 +126,7 @@
- # CONFIG_ARCH_IXP2000 is not set
- # CONFIG_ARCH_IXP23XX is not set
- # CONFIG_ARCH_L7200 is not set
-+# CONFIG_ARCH_NS9XXX is not set
- # CONFIG_ARCH_PNX4008 is not set
- # CONFIG_ARCH_PXA is not set
- # CONFIG_ARCH_RPC is not set
-@@ -152,6 +159,7 @@
- # AT91 Feature Selections
- #
- # CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set
-+# CONFIG_ATMEL_TCLIB is not set
- 
- #
- # Processor Type
-@@ -174,6 +182,7 @@
- # CONFIG_CPU_DCACHE_DISABLE is not set
- # CONFIG_CPU_DCACHE_WRITETHROUGH is not set
- # CONFIG_CPU_CACHE_ROUND_ROBIN is not set
-+# CONFIG_OUTER_CACHE is not set
- 
- #
- # Bus support
-@@ -201,6 +210,7 @@
- # CONFIG_SPARSEMEM_STATIC is not set
- CONFIG_SPLIT_PTLOCK_CPUS=4096
- # CONFIG_RESOURCES_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=1
- # CONFIG_LEDS is not set
- CONFIG_ALIGNMENT_TRAP=y
- 
-@@ -211,6 +221,7 @@
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
- # CONFIG_XIP_KERNEL is not set
-+# CONFIG_KEXEC is not set
- 
- #
- # Floating point emulation
-@@ -236,7 +247,6 @@
- # Power management options
- #
- # CONFIG_PM is not set
--# CONFIG_APM is not set
- 
- #
- # Networking
-@@ -333,6 +343,7 @@
- CONFIG_PREVENT_FIRMWARE_BUILD=y
- # CONFIG_FW_LOADER is not set
- # CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_DEBUG_DEVRES is not set
- # CONFIG_SYS_HYPERVISOR is not set
- 
- #
-@@ -430,6 +441,7 @@
- #
- # Plug and Play support
- #
-+# CONFIG_PNPACPI is not set
- 
- #
- # Block devices
-@@ -443,7 +455,6 @@
- CONFIG_BLK_DEV_RAM_COUNT=16
- CONFIG_BLK_DEV_RAM_SIZE=8192
- CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
--CONFIG_BLK_DEV_INITRD=y
- # CONFIG_CDROM_PKTCDVD is not set
- # CONFIG_ATA_OVER_ETH is not set
- 
-@@ -531,6 +542,7 @@
- #
- CONFIG_NET_ETHERNET=y
- CONFIG_MII=y
-+CONFIG_MACB=y
- # CONFIG_SMC91X is not set
- # CONFIG_DM9000 is not set
- 
-@@ -685,6 +697,7 @@
- # I2C Hardware Bus support
- #
- CONFIG_I2C_AT91=y
-+CONFIG_I2C_AT91_CLOCKRATE=100000
- # CONFIG_I2C_OCORES is not set
- # CONFIG_I2C_PARPORT_LIGHT is not set
- # CONFIG_I2C_STUB is not set
-@@ -722,6 +735,7 @@
- #
- # SPI Protocol Masters
- #
-+# CONFIG_SPI_AT25 is not set
- 
- #
- # Dallas's 1-wire bus
-@@ -737,9 +751,13 @@
- #
- # Misc devices
- #
--# CONFIG_TIFM_CORE is not set
- 
- #
-+# Multifunction device drivers
-+#
-+# CONFIG_MFD_SM501 is not set
-+
-+#
- # LED devices
- #
- # CONFIG_NEW_LEDS is not set
-@@ -766,15 +784,23 @@
- #
- # Graphics support
- #
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-+CONFIG_FB=y
- # CONFIG_FIRMWARE_EDID is not set
--CONFIG_FB=y
-+# CONFIG_FB_DDC is not set
- # CONFIG_FB_CFB_FILLRECT is not set
- # CONFIG_FB_CFB_COPYAREA is not set
- # CONFIG_FB_CFB_IMAGEBLIT is not set
-+# CONFIG_FB_SVGALIB is not set
- # CONFIG_FB_MACMODES is not set
- # CONFIG_FB_BACKLIGHT is not set
- # CONFIG_FB_MODE_HELPERS is not set
- # CONFIG_FB_TILEBLITTING is not set
-+
-+#
-+# Frame buffer hardware drivers
-+#
-+# CONFIG_FB_S1D15605 is not set
- # CONFIG_FB_S1D13XXX is not set
- # CONFIG_FB_VIRTUAL is not set
- 
-@@ -789,7 +815,6 @@
- # Logo configuration
- #
- # CONFIG_LOGO is not set
--# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
- 
- #
- # Sound
-@@ -800,6 +825,7 @@
- # HID Devices
- #
- CONFIG_HID=y
-+# CONFIG_HID_DEBUG is not set
- 
- #
- # USB support
-@@ -814,9 +840,7 @@
- # Miscellaneous USB options
- #
- CONFIG_USB_DEVICEFS=y
--# CONFIG_USB_BANDWIDTH is not set
- # CONFIG_USB_DYNAMIC_MINORS is not set
--# CONFIG_USB_MULTITHREAD_PROBE is not set
- # CONFIG_USB_OTG is not set
- 
- #
-@@ -824,7 +848,8 @@
- #
- # CONFIG_USB_ISP116X_HCD is not set
- CONFIG_USB_OHCI_HCD=y
--# CONFIG_USB_OHCI_BIG_ENDIAN is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
-+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
- CONFIG_USB_OHCI_LITTLE_ENDIAN=y
- # CONFIG_USB_SL811_HCD is not set
- 
-@@ -877,6 +902,7 @@
- # CONFIG_USB_ATI_REMOTE2 is not set
- # CONFIG_USB_KEYSPAN_REMOTE is not set
- # CONFIG_USB_APPLETOUCH is not set
-+# CONFIG_USB_GTCO is not set
- 
- #
- # USB Imaging devices
-@@ -914,6 +940,7 @@
- # CONFIG_USB_RIO500 is not set
- # CONFIG_USB_LEGOTOWER is not set
- # CONFIG_USB_LCD is not set
-+# CONFIG_USB_BERRY_CHARGE is not set
- # CONFIG_USB_LED is not set
- # CONFIG_USB_CYPRESS_CY7C63 is not set
- # CONFIG_USB_CYTHERM is not set
-@@ -923,6 +950,7 @@
- # CONFIG_USB_APPLEDISPLAY is not set
- # CONFIG_USB_LD is not set
- # CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_IOWARRIOR is not set
- # CONFIG_USB_TEST is not set
- 
- #
-@@ -959,7 +987,6 @@
- # CONFIG_MMC_DEBUG is not set
- CONFIG_MMC_BLOCK=y
- CONFIG_MMC_AT91=m
--# CONFIG_MMC_TIFM_SD is not set
- 
- #
- # Real Time Clock
-@@ -1136,15 +1163,16 @@
- # CONFIG_DEBUG_FS is not set
- # CONFIG_HEADERS_CHECK is not set
- CONFIG_DEBUG_KERNEL=y
-+# CONFIG_DEBUG_SHIRQ is not set
- CONFIG_LOG_BUF_SHIFT=14
- CONFIG_DETECT_SOFTLOCKUP=y
- # CONFIG_SCHEDSTATS is not set
-+# CONFIG_TIMER_STATS is not set
- # CONFIG_DEBUG_SLAB is not set
- # CONFIG_DEBUG_RT_MUTEXES is not set
- # CONFIG_RT_MUTEX_TESTER is not set
- # CONFIG_DEBUG_SPINLOCK is not set
- # CONFIG_DEBUG_MUTEXES is not set
--# CONFIG_DEBUG_RWSEMS is not set
- # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
- # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
- # CONFIG_DEBUG_KOBJECT is not set
-@@ -1155,6 +1183,7 @@
- CONFIG_FRAME_POINTER=y
- CONFIG_FORCED_INLINING=y
- # CONFIG_RCU_TORTURE_TEST is not set
-+# CONFIG_FAULT_INJECTION is not set
- CONFIG_DEBUG_USER=y
- # CONFIG_DEBUG_ERRORS is not set
- CONFIG_DEBUG_LL=y
-@@ -1180,5 +1209,7 @@
- CONFIG_CRC32=y
- # CONFIG_LIBCRC32C is not set
- CONFIG_ZLIB_INFLATE=y
-+CONFIG_ZLIB_DEFLATE=y
- CONFIG_PLIST=y
--CONFIG_IOMAP_COPY=y
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_IOPORT=y
-Index: linux-2.6.22.1/arch/avr32/kernel/setup.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/kernel/setup.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/kernel/setup.c	(arbetskopia)
-@@ -313,7 +313,7 @@
- 
- static int __init parse_tag_rdimg(struct tag *tag)
- {
--#ifdef CONFIG_INITRD
-+#ifdef CONFIG_BLK_DEV_INITRD
- 	struct tag_mem_range *mem = &tag->u.mem_range;
- 	int ret;
- 
-@@ -323,7 +323,7 @@
- 		return 0;
- 	}
- 
--	ret = add_reserved_region(mem->start, mem->start + mem->size - 1,
-+	ret = add_reserved_region(mem->addr, mem->addr + mem->size - 1,
- 				  "initrd");
- 	if (ret) {
- 		printk(KERN_WARNING
-Index: linux-2.6.22.1/arch/avr32/kernel/dma-controller.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/kernel/dma-controller.c	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/kernel/dma-controller.c	(revision 0)
-@@ -0,0 +1,34 @@
-+/*
-+ * Preliminary DMA controller framework for AVR32
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <asm/dma-controller.h>
-+
-+static LIST_HEAD(controllers);
-+
-+int register_dma_controller(struct dma_controller *dmac)
-+{
-+	static int next_id;
-+
-+	dmac->id = next_id++;
-+	list_add_tail(&dmac->list, &controllers);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(register_dma_controller);
-+
-+struct dma_controller *find_dma_controller(int id)
-+{
-+	struct dma_controller *dmac;
-+
-+	list_for_each_entry(dmac, &controllers, list)
-+		if (dmac->id == id)
-+			return dmac;
-+	return NULL;
-+}
-+EXPORT_SYMBOL(find_dma_controller);
-Index: linux-2.6.22.1/arch/avr32/kernel/Makefile
-===================================================================
---- linux-2.6.22.1/arch/avr32/kernel/Makefile	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/kernel/Makefile	(arbetskopia)
-@@ -9,6 +9,7 @@
- obj-y				+= setup.o traps.o semaphore.o ptrace.o
- obj-y				+= signal.o sys_avr32.o process.o time.o
- obj-y				+= init_task.o switch_to.o cpu.o
-+obj-y				+= dma-controller.o
- obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
- obj-$(CONFIG_KPROBES)		+= kprobes.o
- 
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/Kconfig
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/Kconfig	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/Kconfig	(arbetskopia)
-@@ -26,6 +26,13 @@
- 
- endchoice
- 
-+config GPIO_DEV
-+	bool "GPIO /dev interface"
-+	select CONFIGFS_FS
-+	default n
-+	help
-+	  Say `Y' to enable a /dev interface to the GPIO pins.
-+
- endmenu
- 
- endif # PLATFORM_AT32AP
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c	(arbetskopia)
-@@ -17,15 +17,21 @@
- #include <asm/arch/at32ap7000.h>
- #include <asm/arch/board.h>
- #include <asm/arch/portmux.h>
--#include <asm/arch/sm.h>
- 
- #include <video/atmel_lcdc.h>
- 
- #include "clock.h"
- #include "hmatrix.h"
- #include "pio.h"
--#include "sm.h"
-+#include "pm.h"
- 
-+/*
-+ * We can reduce the code size a bit by using a constant here. Since
-+ * this file is completely chip-specific, it's safe to not use
-+ * ioremap. Generic drivers should of course never do this.
-+ */
-+#define AT32_PM_BASE	0xfff00000
-+
- #define PBMEM(base)					\
- 	{						\
- 		.start		= base,			\
-@@ -88,6 +94,8 @@
- 	.index		= _index,				\
- }
- 
-+static DEFINE_SPINLOCK(pm_lock);
-+
- unsigned long at32ap7000_osc_rates[3] = {
- 	[0] = 32768,
- 	/* FIXME: these are ATSTK1002-specific */
-@@ -104,11 +112,11 @@
- {
- 	unsigned long div, mul, rate;
- 
--	if (!(control & SM_BIT(PLLEN)))
-+	if (!(control & PM_BIT(PLLEN)))
- 		return 0;
- 
--	div = SM_BFEXT(PLLDIV, control) + 1;
--	mul = SM_BFEXT(PLLMUL, control) + 1;
-+	div = PM_BFEXT(PLLDIV, control) + 1;
-+	mul = PM_BFEXT(PLLMUL, control) + 1;
- 
- 	rate = clk->parent->get_rate(clk->parent);
- 	rate = (rate + div / 2) / div;
-@@ -121,7 +129,7 @@
- {
- 	u32 control;
- 
--	control = sm_readl(&system_manager, PM_PLL0);
-+	control = pm_readl(PLL0);
- 
- 	return pll_get_rate(clk, control);
- }
-@@ -130,7 +138,7 @@
- {
- 	u32 control;
- 
--	control = sm_readl(&system_manager, PM_PLL1);
-+	control = pm_readl(PLL1);
- 
- 	return pll_get_rate(clk, control);
- }
-@@ -187,108 +195,139 @@
- 
- static void cpu_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_CPU_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(CPU_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_CPU_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(CPU_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long cpu_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(CPUDIV))
--		shift = SM_BFEXT(CPUSEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(CPUDIV))
-+		shift = PM_BFEXT(CPUSEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
- 
-+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
-+{
-+	u32 control;
-+	unsigned long parent_rate, child_div, actual_rate, div;
-+
-+	parent_rate = clk->parent->get_rate(clk->parent);
-+	control = pm_readl(CKSEL);
-+
-+	if (control & PM_BIT(HSBDIV))
-+		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
-+	else
-+		child_div = 1;
-+
-+	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
-+		actual_rate = parent_rate;
-+		control &= ~PM_BIT(CPUDIV);
-+	} else {
-+		unsigned int cpusel;
-+		div = (parent_rate + rate / 2) / rate;
-+		if (div > child_div)
-+			div = child_div;
-+		cpusel = (div > 1) ? (fls(div) - 2) : 0;
-+		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
-+		actual_rate = parent_rate / (1 << (cpusel + 1));
-+	}
-+
-+	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
-+			clk->name, rate, actual_rate);
-+
-+	if (apply)
-+		pm_writel(CKSEL, control);
-+
-+	return actual_rate;
-+}
-+
- static void hsb_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_HSB_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(HSB_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_HSB_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(HSB_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long hsb_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(HSBDIV))
--		shift = SM_BFEXT(HSBSEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(HSBDIV))
-+		shift = PM_BFEXT(HSBSEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
- 
- static void pba_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_PBA_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(PBA_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_PBA_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(PBA_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long pba_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(PBADIV))
--		shift = SM_BFEXT(PBASEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(PBADIV))
-+		shift = PM_BFEXT(PBASEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
- 
- static void pbb_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_PBB_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(PBB_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_PBB_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(PBB_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long pbb_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(PBBDIV))
--		shift = SM_BFEXT(PBBSEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(PBBDIV))
-+		shift = PM_BFEXT(PBBSEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
-@@ -296,6 +335,7 @@
- static struct clk cpu_clk = {
- 	.name		= "cpu",
- 	.get_rate	= cpu_clk_get_rate,
-+	.set_rate	= cpu_clk_set_rate,
- 	.users		= 1,
- };
- static struct clk hsb_clk = {
-@@ -327,12 +367,12 @@
- {
- 	u32 control;
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
-+	control = pm_readl(GCCTRL(clk->index));
- 	if (enabled)
--		control |= SM_BIT(CEN);
-+		control |= PM_BIT(CEN);
- 	else
--		control &= ~SM_BIT(CEN);
--	sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control);
-+		control &= ~PM_BIT(CEN);
-+	pm_writel(GCCTRL(clk->index), control);
- }
- 
- static unsigned long genclk_get_rate(struct clk *clk)
-@@ -340,9 +380,9 @@
- 	u32 control;
- 	unsigned long div = 1;
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
--	if (control & SM_BIT(DIVEN))
--		div = 2 * (SM_BFEXT(DIV, control) + 1);
-+	control = pm_readl(GCCTRL(clk->index));
-+	if (control & PM_BIT(DIVEN))
-+		div = 2 * (PM_BFEXT(DIV, control) + 1);
- 
- 	return clk->parent->get_rate(clk->parent) / div;
- }
-@@ -353,23 +393,22 @@
- 	unsigned long parent_rate, actual_rate, div;
- 
- 	parent_rate = clk->parent->get_rate(clk->parent);
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
-+	control = pm_readl(GCCTRL(clk->index));
- 
- 	if (rate > 3 * parent_rate / 4) {
- 		actual_rate = parent_rate;
--		control &= ~SM_BIT(DIVEN);
-+		control &= ~PM_BIT(DIVEN);
- 	} else {
- 		div = (parent_rate + rate) / (2 * rate) - 1;
--		control = SM_BFINS(DIV, div, control) | SM_BIT(DIVEN);
-+		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
- 		actual_rate = parent_rate / (2 * (div + 1));
- 	}
- 
--	printk("clk %s: new rate %lu (actual rate %lu)\n",
--	       clk->name, rate, actual_rate);
-+	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
-+		clk->name, rate, actual_rate);
- 
- 	if (apply)
--		sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index,
--			  control);
-+		pm_writel(GCCTRL(clk->index), control);
- 
- 	return actual_rate;
- }
-@@ -378,24 +417,24 @@
- {
- 	u32 control;
- 
--	printk("clk %s: new parent %s (was %s)\n",
--	       clk->name, parent->name, clk->parent->name);
-+	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
-+		clk->name, parent->name, clk->parent->name);
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
-+	control = pm_readl(GCCTRL(clk->index));
- 
- 	if (parent == &osc1 || parent == &pll1)
--		control |= SM_BIT(OSCSEL);
-+		control |= PM_BIT(OSCSEL);
- 	else if (parent == &osc0 || parent == &pll0)
--		control &= ~SM_BIT(OSCSEL);
-+		control &= ~PM_BIT(OSCSEL);
- 	else
- 		return -EINVAL;
- 
- 	if (parent == &pll0 || parent == &pll1)
--		control |= SM_BIT(PLLSEL);
-+		control |= PM_BIT(PLLSEL);
- 	else
--		control &= ~SM_BIT(PLLSEL);
-+		control &= ~PM_BIT(PLLSEL);
- 
--	sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control);
-+	pm_writel(GCCTRL(clk->index), control);
- 	clk->parent = parent;
- 
- 	return 0;
-@@ -408,11 +447,11 @@
- 
- 	BUG_ON(clk->index > 7);
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
--	if (control & SM_BIT(OSCSEL))
--		parent = (control & SM_BIT(PLLSEL)) ? &pll1 : &osc1;
-+	control = pm_readl(GCCTRL(clk->index));
-+	if (control & PM_BIT(OSCSEL))
-+		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
- 	else
--		parent = (control & SM_BIT(PLLSEL)) ? &pll0 : &osc0;
-+		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
- 
- 	clk->parent = parent;
- }
-@@ -420,21 +459,53 @@
- /* --------------------------------------------------------------------
-  *  System peripherals
-  * -------------------------------------------------------------------- */
--static struct resource sm_resource[] = {
--	PBMEM(0xfff00000),
--	NAMED_IRQ(19, "eim"),
--	NAMED_IRQ(20, "pm"),
--	NAMED_IRQ(21, "rtc"),
-+static struct resource at32_pm0_resource[] = {
-+	{
-+		.start	= 0xfff00000,
-+		.end	= 0xfff0007f,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(20),
- };
--struct platform_device at32_sm_device = {
--	.name		= "sm",
--	.id		= 0,
--	.resource	= sm_resource,
--	.num_resources	= ARRAY_SIZE(sm_resource),
-+
-+static struct resource at32ap700x_rtc0_resource[] = {
-+	{
-+		.start	= 0xfff00080,
-+		.end	= 0xfff000af,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(21),
- };
--static struct clk at32_sm_pclk = {
-+
-+static struct resource at32_wdt0_resource[] = {
-+	{
-+		.start	= 0xfff000b0,
-+		.end	= 0xfff000bf,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct resource at32_eic0_resource[] = {
-+	{
-+		.start	= 0xfff00100,
-+		.end	= 0xfff0013f,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(19),
-+};
-+
-+DEFINE_DEV(at32_pm, 0);
-+DEFINE_DEV(at32ap700x_rtc, 0);
-+DEFINE_DEV(at32_wdt, 0);
-+DEFINE_DEV(at32_eic, 0);
-+
-+/*
-+ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
-+ * is always running.
-+ */
-+static struct clk at32_pm_pclk = {
- 	.name		= "pclk",
--	.dev		= &at32_sm_device.dev,
-+	.dev		= &at32_pm0_device.dev,
- 	.parent		= &pbb_clk,
- 	.mode		= pbb_clk_mode,
- 	.get_rate	= pbb_clk_get_rate,
-@@ -491,6 +562,17 @@
- 	.users		= 1,
- };
- 
-+static struct resource dmaca0_resource[] = {
-+	{
-+		.start	= 0xff200000,
-+		.end	= 0xff20ffff,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(2),
-+};
-+DEFINE_DEV(dmaca, 0);
-+DEV_CLK(hclk, dmaca0, hsb, 10);
-+
- /* --------------------------------------------------------------------
-  * HMATRIX
-  * -------------------------------------------------------------------- */
-@@ -583,12 +665,14 @@
- 
- void __init at32_add_system_devices(void)
- {
--	system_manager.eim_first_irq = EIM_IRQ_BASE;
--
--	platform_device_register(&at32_sm_device);
-+	platform_device_register(&at32_pm0_device);
- 	platform_device_register(&at32_intc0_device);
-+	platform_device_register(&at32ap700x_rtc0_device);
-+	platform_device_register(&at32_wdt0_device);
-+	platform_device_register(&at32_eic0_device);
- 	platform_device_register(&smc0_device);
- 	platform_device_register(&pdc_device);
-+	platform_device_register(&dmaca0_device);
- 
- 	platform_device_register(&at32_systc0_device);
- 
-@@ -894,6 +978,83 @@
- }
- 
- /* --------------------------------------------------------------------
-+ *  TWI
-+ * -------------------------------------------------------------------- */
-+
-+static struct resource atmel_twi0_resource[] = {
-+	PBMEM(0xffe00800),
-+	IRQ(5),
-+};
-+DEFINE_DEV(atmel_twi, 0);
-+DEV_CLK(pclk,atmel_twi0,pba,2);
-+
-+struct platform_device *__init
-+at32_add_device_twi(unsigned int id)
-+{
-+	struct platform_device *pdev;
-+
-+	switch (id) {
-+	case 0:
-+		pdev = &atmel_twi0_device;
-+		select_peripheral(PA(6),  PERIPH_A, 0);	/* SDA	*/
-+		select_peripheral(PA(7),  PERIPH_A, 0);	/* SCL	*/
-+		break;
-+
-+	default:
-+		return NULL;
-+	}
-+
-+	platform_device_register(pdev);
-+	return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-+ * MMC
-+ * -------------------------------------------------------------------- */
-+static struct mci_platform_data atmel_mci0_data = {
-+	.detect_pin	= GPIO_PIN_NONE,
-+	.wp_pin		= GPIO_PIN_NONE,
-+};
-+static struct resource atmel_mci0_resource[] = {
-+	PBMEM(0xfff02400),
-+	IRQ(28),
-+};
-+DEFINE_DEV_DATA(atmel_mci, 0);
-+DEV_CLK(mci_clk, atmel_mci0, pbb, 9);
-+
-+struct platform_device *__init
-+at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
-+{
-+	struct platform_device *pdev;
-+
-+	switch (id) {
-+	case 0:
-+		pdev = &atmel_mci0_device;
-+		select_peripheral(PA(10), PERIPH_A, 0);	/* CLK	 */
-+		select_peripheral(PA(11), PERIPH_A, 0);	/* CMD	 */
-+		select_peripheral(PA(12), PERIPH_A, 0);	/* DATA0 */
-+		select_peripheral(PA(13), PERIPH_A, 0);	/* DATA1 */
-+		select_peripheral(PA(14), PERIPH_A, 0);	/* DATA2 */
-+		select_peripheral(PA(15), PERIPH_A, 0);	/* DATA3 */
-+		break;
-+	default:
-+		return NULL;
-+	}
-+
-+	if (data) {
-+		if (data->detect_pin != GPIO_PIN_NONE)
-+			at32_select_gpio(data->detect_pin, 0);
-+		if (data->wp_pin != GPIO_PIN_NONE)
-+			at32_select_gpio(data->wp_pin, 0);
-+		memcpy(pdev->dev.platform_data, data,
-+		       sizeof(struct mci_platform_data));
-+	}
-+
-+	platform_device_register(pdev);
-+	return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-  *  LCDC
-  * -------------------------------------------------------------------- */
- static struct atmel_lcdfb_info atmel_lcdfb0_data;
-@@ -1013,6 +1174,228 @@
- }
- 
- /* --------------------------------------------------------------------
-+ *  USB Device Controller
-+ * -------------------------------------------------------------------- */
-+static struct resource usba0_resource[] __initdata = {
-+	{
-+		.name		= "fifo",
-+		.start		= 0xff300000,
-+		.end		= 0xff3fffff,
-+		.flags		= IORESOURCE_MEM,
-+	}, {
-+		.name		= "regs",
-+		.start		= 0xfff03000,
-+		.end		= 0xfff033ff,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	IRQ(31),
-+};
-+static struct clk usba0_pclk = {
-+	.name		= "pclk",
-+	.parent		= &pbb_clk,
-+	.mode		= pbb_clk_mode,
-+	.get_rate	= pbb_clk_get_rate,
-+	.index		= 12,
-+};
-+static struct clk usba0_hclk = {
-+	.name		= "hclk",
-+	.parent		= &hsb_clk,
-+	.mode		= hsb_clk_mode,
-+	.get_rate	= hsb_clk_get_rate,
-+	.index		= 6,
-+};
-+
-+struct platform_device *__init
-+at32_add_device_usba(unsigned int id, struct usba_platform_data *data)
-+{
-+	struct platform_device *pdev;
-+
-+	if (id != 0)
-+		return NULL;
-+
-+	pdev = platform_device_alloc("atmel_usba_udc", 0);
-+	if (!pdev)
-+		return NULL;
-+
-+	if (platform_device_add_resources(pdev, usba0_resource,
-+					  ARRAY_SIZE(usba0_resource)))
-+		goto out_free_pdev;
-+
-+	if (data) {
-+		if (platform_device_add_data(pdev, data, sizeof(*data)))
-+			goto out_free_pdev;
-+
-+		if (data->vbus_pin != GPIO_PIN_NONE)
-+			at32_select_gpio(data->vbus_pin, 0);
-+	}
-+
-+	usba0_pclk.dev = &pdev->dev;
-+	usba0_hclk.dev = &pdev->dev;
-+
-+	platform_device_add(pdev);
-+
-+	return pdev;
-+
-+out_free_pdev:
-+	platform_device_put(pdev);
-+	return NULL;
-+}
-+
-+/* --------------------------------------------------------------------
-+ *  SSC
-+ * -------------------------------------------------------------------- */
-+static struct resource ssc0_resource[] = {
-+	PBMEM(0xffe01c00),
-+	IRQ(10),
-+};
-+DEFINE_DEV(ssc, 0);
-+DEV_CLK(pclk, ssc0, pba, 7);
-+
-+static struct resource ssc1_resource[] = {
-+	PBMEM(0xffe02000),
-+	IRQ(11),
-+};
-+DEFINE_DEV(ssc, 1);
-+DEV_CLK(pclk, ssc1, pba, 8);
-+
-+static struct resource ssc2_resource[] = {
-+	PBMEM(0xffe02400),
-+	IRQ(12),
-+};
-+DEFINE_DEV(ssc, 2);
-+DEV_CLK(pclk, ssc2, pba, 9);
-+
-+struct platform_device *__init
-+at32_add_device_ssc(unsigned int id, unsigned int flags)
-+{
-+	struct platform_device *pdev;
-+
-+	switch (id) {
-+	case 0:
-+		pdev = &ssc0_device;
-+		if (flags & ATMEL_SSC_RF)
-+			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
-+		if (flags & ATMEL_SSC_RK)
-+			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
-+		if (flags & ATMEL_SSC_TK)
-+			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
-+		if (flags & ATMEL_SSC_TF)
-+			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
-+		if (flags & ATMEL_SSC_TD)
-+			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
-+		if (flags & ATMEL_SSC_RD)
-+			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
-+		break;
-+	case 1:
-+		pdev = &ssc1_device;
-+		if (flags & ATMEL_SSC_RF)
-+			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
-+		if (flags & ATMEL_SSC_RK)
-+			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
-+		if (flags & ATMEL_SSC_TK)
-+			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
-+		if (flags & ATMEL_SSC_TF)
-+			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
-+		if (flags & ATMEL_SSC_TD)
-+			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
-+		if (flags & ATMEL_SSC_RD)
-+			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
-+		break;
-+	case 2:
-+		pdev = &ssc2_device;
-+		if (flags & ATMEL_SSC_TD)
-+			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
-+		if (flags & ATMEL_SSC_RD)
-+			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
-+		if (flags & ATMEL_SSC_TK)
-+			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
-+		if (flags & ATMEL_SSC_TF)
-+			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
-+		if (flags & ATMEL_SSC_RF)
-+			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
-+		if (flags & ATMEL_SSC_RK)
-+			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
-+		break;
-+	default:
-+		return NULL;
-+	}
-+
-+	platform_device_register(pdev);
-+	return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-+ *  AC97C
-+ * -------------------------------------------------------------------- */
-+static struct resource atmel_ac97c0_resource[] = {
-+	PBMEM(0xfff02800),
-+	IRQ(29),
-+};
-+DEFINE_DEV(atmel_ac97c, 0);
-+DEV_CLK(pclk, atmel_ac97c0, pbb, 10);
-+
-+struct platform_device *__init
-+at32_add_device_ac97c(unsigned int id)
-+{
-+	struct platform_device *pdev;
-+
-+	switch (id) {
-+	case 0:
-+		pdev = &atmel_ac97c0_device;
-+		select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
-+		select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
-+		select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
-+		select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
-+		break;
-+	default:
-+		return NULL;
-+	}
-+
-+	platform_device_register(pdev);
-+	return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-+ *  DAC
-+ * -------------------------------------------------------------------- */
-+static struct resource abdac0_resource[] = {
-+	PBMEM(0xfff02000),
-+	IRQ(27),
-+};
-+DEFINE_DEV(abdac, 0);
-+DEV_CLK(pclk, abdac0, pbb, 8);
-+static struct clk abdac0_sample_clk = {
-+	.name           = "sample_clk",
-+	.dev            = &abdac0_device.dev,
-+	.mode           = genclk_mode,
-+	.get_rate       = genclk_get_rate,
-+	.set_rate       = genclk_set_rate,
-+	.set_parent     = genclk_set_parent,
-+	.index          = 6,
-+};
-+
-+struct platform_device *__init
-+at32_add_device_abdac(unsigned int id)
-+{
-+	struct platform_device *pdev;
-+
-+	switch (id) {
-+	case 0:
-+		pdev = &abdac0_device;
-+		select_peripheral(PB(20), PERIPH_A, 0);	/* DATA1	*/
-+		select_peripheral(PB(21), PERIPH_A, 0);	/* DATA0	*/
-+		select_peripheral(PB(22), PERIPH_A, 0);	/* DATAN1	*/
-+		select_peripheral(PB(23), PERIPH_A, 0);	/* DATAN0	*/
-+		break;
-+	default:
-+		return NULL;
-+	}
-+
-+	platform_device_register(pdev);
-+	return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
-  *  GCLK
-  * -------------------------------------------------------------------- */
- static struct clk gclk0 = {
-@@ -1066,7 +1449,7 @@
- 	&hsb_clk,
- 	&pba_clk,
- 	&pbb_clk,
--	&at32_sm_pclk,
-+	&at32_pm_pclk,
- 	&at32_intc0_pclk,
- 	&hmatrix_clk,
- 	&ebi_clk,
-@@ -1075,6 +1458,7 @@
- 	&smc0_mck,
- 	&pdc_hclk,
- 	&pdc_pclk,
-+	&dmaca0_hclk,
- 	&pico_clk,
- 	&pio0_mck,
- 	&pio1_mck,
-@@ -1092,8 +1476,18 @@
- 	&macb1_pclk,
- 	&atmel_spi0_spi_clk,
- 	&atmel_spi1_spi_clk,
-+	&atmel_twi0_pclk,
-+	&atmel_mci0_mci_clk,
- 	&atmel_lcdfb0_hck1,
- 	&atmel_lcdfb0_pixclk,
-+	&usba0_pclk,
-+	&usba0_hclk,
-+	&ssc0_pclk,
-+	&ssc1_pclk,
-+	&ssc2_pclk,
-+	&atmel_ac97c0_pclk,
-+	&abdac0_pclk,
-+	&abdac0_sample_clk,
- 	&gclk0,
- 	&gclk1,
- 	&gclk2,
-@@ -1113,18 +1507,20 @@
- 
- void __init at32_clock_init(void)
- {
--	struct at32_sm *sm = &system_manager;
- 	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
- 	int i;
- 
--	if (sm_readl(sm, PM_MCCTRL) & SM_BIT(PLLSEL))
-+	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
- 		main_clock = &pll0;
--	else
-+		cpu_clk.parent = &pll0;
-+	} else {
- 		main_clock = &osc0;
-+		cpu_clk.parent = &osc0;
-+	}
- 
--	if (sm_readl(sm, PM_PLL0) & SM_BIT(PLLOSC))
-+	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
- 		pll0.parent = &osc1;
--	if (sm_readl(sm, PM_PLL1) & SM_BIT(PLLOSC))
-+	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
- 		pll1.parent = &osc1;
- 
- 	genclk_init_parent(&gclk0);
-@@ -1133,6 +1529,7 @@
- 	genclk_init_parent(&gclk3);
- 	genclk_init_parent(&gclk4);
- 	genclk_init_parent(&atmel_lcdfb0_pixclk);
-+	genclk_init_parent(&abdac0_sample_clk);
- 
- 	/*
- 	 * Turn on all clocks that have at least one user already, and
-@@ -1157,8 +1554,8 @@
- 			pbb_mask |= 1 << clk->index;
- 	}
- 
--	sm_writel(sm, PM_CPU_MASK, cpu_mask);
--	sm_writel(sm, PM_HSB_MASK, hsb_mask);
--	sm_writel(sm, PM_PBA_MASK, pba_mask);
--	sm_writel(sm, PM_PBB_MASK, pbb_mask);
-+	pm_writel(CPU_MASK, cpu_mask);
-+	pm_writel(HSB_MASK, hsb_mask);
-+	pm_writel(PBA_MASK, pba_mask);
-+	pm_writel(PBB_MASK, pbb_mask);
- }
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/cpufreq.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/cpufreq.c	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/cpufreq.c	(revision 0)
-@@ -0,0 +1,112 @@
-+/*
-+ * Copyright (C) 2004-2007 Atmel Corporation
-+ *
-+ * Based on MIPS implementation arch/mips/kernel/time.c
-+ *   Copyright 2001 MontaVista Software Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/*#define DEBUG*/
-+
-+#include <linux/kernel.h>
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/cpufreq.h>
-+#include <linux/io.h>
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <asm/system.h>
-+
-+static struct clk *cpuclk;
-+
-+static int at32_verify_speed(struct cpufreq_policy *policy)
-+{
-+	if (policy->cpu != 0)
-+		return -EINVAL;
-+
-+	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-+			policy->cpuinfo.max_freq);
-+	return 0;
-+}
-+
-+static unsigned int at32_get_speed(unsigned int cpu)
-+{
-+	/* No SMP support */
-+	if (cpu)
-+		return 0;
-+	return (unsigned int)((clk_get_rate(cpuclk) + 500) / 1000);
-+}
-+
-+static int at32_set_target(struct cpufreq_policy *policy,
-+			  unsigned int target_freq,
-+			  unsigned int relation)
-+{
-+	struct cpufreq_freqs freqs;
-+	long freq;
-+
-+	/* Convert target_freq from kHz to Hz */
-+	freq = clk_round_rate(cpuclk, target_freq * 1000);
-+
-+	/* Check if policy->min <= new_freq <= policy->max */
-+	if(freq < (policy->min * 1000) || freq > (policy->max * 1000))
-+		return -EINVAL;
-+
-+	pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
-+
-+	freqs.old = at32_get_speed(0);
-+	freqs.new = (freq + 500) / 1000;
-+	freqs.cpu = 0;
-+	freqs.flags = 0;
-+
-+	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-+	clk_set_rate(cpuclk, freq);
-+	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-+
-+	pr_debug("cpufreq: set frequency %lu Hz\n", freq);
-+
-+	return 0;
-+}
-+
-+static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy)
-+{
-+	if (policy->cpu != 0)
-+		return -EINVAL;
-+
-+	cpuclk = clk_get(NULL, "cpu");
-+	if (IS_ERR(cpuclk)) {
-+		pr_debug("cpufreq: could not get CPU clk\n");
-+		return PTR_ERR(cpuclk);
-+	}
-+
-+	policy->cpuinfo.min_freq = (clk_round_rate(cpuclk, 1) + 500) / 1000;
-+	policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
-+	policy->cpuinfo.transition_latency = 0;
-+	policy->cur = at32_get_speed(0);
-+	policy->min = policy->cpuinfo.min_freq;
-+	policy->max = policy->cpuinfo.max_freq;
-+	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
-+
-+	printk("cpufreq: AT32AP CPU frequency driver\n");
-+
-+	return 0;
-+}
-+
-+static struct cpufreq_driver at32_driver = {
-+	.name		= "at32ap",
-+	.owner		= THIS_MODULE,
-+	.init		= at32_cpufreq_driver_init,
-+	.verify		= at32_verify_speed,
-+	.target		= at32_set_target,
-+	.get		= at32_get_speed,
-+	.flags		= CPUFREQ_STICKY,
-+};
-+
-+static int __init at32_cpufreq_init(void)
-+{
-+	return cpufreq_register_driver(&at32_driver);
-+}
-+
-+arch_initcall(at32_cpufreq_init);
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c	(revision 0)
-@@ -0,0 +1,570 @@
-+/*
-+ * GPIO /dev and configfs interface
-+ *
-+ * Copyright (C) 2006-2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/configfs.h>
-+#include <linux/cdev.h>
-+#include <linux/fs.h>
-+#include <linux/interrupt.h>
-+#include <linux/poll.h>
-+#include <linux/uaccess.h>
-+#include <linux/wait.h>
-+
-+#include <asm/gpio.h>
-+#include <asm/arch/portmux.h>
-+
-+#define GPIO_DEV_MAX			8
-+
-+static struct class *gpio_dev_class;
-+static dev_t gpio_devt;
-+
-+struct gpio_item {
-+	spinlock_t lock;
-+
-+	int enabled;
-+	int initialized;
-+	int port;
-+	u32 pin_mask;
-+	u32 oe_mask;
-+
-+	/* Pin state last time we read it (for blocking reads) */
-+	u32 pin_state;
-+	int changed;
-+
-+	wait_queue_head_t change_wq;
-+	struct fasync_struct *async_queue;
-+
-+	int id;
-+	struct class_device *gpio_dev;
-+	struct cdev char_dev;
-+	struct config_item item;
-+};
-+
-+struct gpio_attribute {
-+	struct configfs_attribute attr;
-+	ssize_t (*show)(struct gpio_item *, char *);
-+	ssize_t (*store)(struct gpio_item *, const char *, size_t);
-+};
-+
-+static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id)
-+{
-+	struct gpio_item *gpio = dev_id;
-+	u32 old_state, new_state;
-+
-+	old_state = gpio->pin_state;
-+	new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
-+	gpio->pin_state = new_state;
-+
-+	if (new_state != old_state) {
-+		gpio->changed = 1;
-+		wake_up_interruptible(&gpio->change_wq);
-+
-+		if (gpio->async_queue)
-+			kill_fasync(&gpio->async_queue, SIGIO, POLL_IN);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int gpio_dev_open(struct inode *inode, struct file *file)
-+{
-+	struct gpio_item *gpio = container_of(inode->i_cdev,
-+					      struct gpio_item,
-+					      char_dev);
-+	unsigned int irq;
-+	unsigned int i;
-+	int ret;
-+
-+	nonseekable_open(inode, file);
-+	config_item_get(&gpio->item);
-+	file->private_data = gpio;
-+
-+	gpio->pin_state = at32_gpio_get_value_multiple(gpio->port,
-+						       gpio->pin_mask);
-+	gpio->changed = 1;
-+
-+	for (i = 0; i < 32; i++) {
-+		if (gpio->pin_mask & (1 << i)) {
-+			irq = gpio_to_irq(32 * gpio->port + i);
-+			ret = request_irq(irq, gpio_dev_interrupt, 0,
-+					  "gpio-dev", gpio);
-+			if (ret)
-+				goto err_irq;
-+		}
-+	}
-+
-+	return 0;
-+
-+err_irq:
-+	while (i--) {
-+		if (gpio->pin_mask & (1 << i)) {
-+			irq = gpio_to_irq(32 * gpio->port + i);
-+			free_irq(irq, gpio);
-+		}
-+	}
-+
-+	config_item_put(&gpio->item);
-+
-+	return ret;
-+}
-+
-+static int gpio_dev_fasync(int fd, struct file *file, int mode)
-+{
-+	struct gpio_item *gpio = file->private_data;
-+
-+	return fasync_helper(fd, file, mode, &gpio->async_queue);
-+}
-+
-+static int gpio_dev_release(struct inode *inode, struct file *file)
-+{
-+	struct gpio_item *gpio = file->private_data;
-+	unsigned int irq;
-+	unsigned int i;
-+
-+	gpio_dev_fasync(-1, file, 0);
-+
-+	for (i = 0; i < 32; i++) {
-+		if (gpio->pin_mask & (1 << i)) {
-+			irq = gpio_to_irq(32 * gpio->port + i);
-+			free_irq(irq, gpio);
-+		}
-+	}
-+
-+	config_item_put(&gpio->item);
-+
-+	return 0;
-+}
-+
-+static unsigned int gpio_dev_poll(struct file *file, poll_table *wait)
-+{
-+	struct gpio_item *gpio = file->private_data;
-+	unsigned int mask = 0;
-+
-+	poll_wait(file, &gpio->change_wq, wait);
-+	if (gpio->changed)
-+		mask |= POLLIN | POLLRDNORM;
-+
-+	return mask;
-+}
-+
-+static ssize_t gpio_dev_read(struct file *file, char __user *buf,
-+			     size_t count, loff_t *offset)
-+{
-+	struct gpio_item *gpio = file->private_data;
-+	u32 value;
-+
-+	spin_lock_irq(&gpio->lock);
-+	while (!gpio->changed) {
-+		spin_unlock_irq(&gpio->lock);
-+
-+		if (file->f_flags & O_NONBLOCK)
-+			return -EAGAIN;
-+
-+		if (wait_event_interruptible(gpio->change_wq, gpio->changed))
-+			return -ERESTARTSYS;
-+
-+		spin_lock_irq(&gpio->lock);
-+	}
-+
-+	gpio->changed = 0;
-+	value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask);
-+
-+	spin_unlock_irq(&gpio->lock);
-+
-+	count = min(count, (size_t)4);
-+	if (copy_to_user(buf, &value, count))
-+		return -EFAULT;
-+
-+	return count;
-+}
-+
-+static ssize_t gpio_dev_write(struct file *file, const char __user *buf,
-+			      size_t count, loff_t *offset)
-+{
-+	struct gpio_item *gpio = file->private_data;
-+	u32 value = 0;
-+	u32 mask = ~0UL;
-+
-+	count = min(count, (size_t)4);
-+	if (copy_from_user(&value, buf, count))
-+		return -EFAULT;
-+
-+	/* Assuming big endian */
-+	mask <<= (4 - count) * 8;
-+	mask &= gpio->pin_mask;
-+
-+	at32_gpio_set_value_multiple(gpio->port, value, mask);
-+
-+	return count;
-+}
-+
-+static struct file_operations gpio_dev_fops = {
-+	.owner		= THIS_MODULE,
-+	.llseek		= no_llseek,
-+	.open		= gpio_dev_open,
-+	.release	= gpio_dev_release,
-+	.fasync		= gpio_dev_fasync,
-+	.poll		= gpio_dev_poll,
-+	.read		= gpio_dev_read,
-+	.write		= gpio_dev_write,
-+};
-+
-+static struct gpio_item *to_gpio_item(struct config_item *item)
-+{
-+	return item ? container_of(item, struct gpio_item, item) : NULL;
-+}
-+
-+static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page)
-+{
-+	return sprintf(page, "%d\n", gpio->port);
-+}
-+
-+static ssize_t gpio_store_gpio_id(struct gpio_item *gpio,
-+				  const char *page, size_t count)
-+{
-+	unsigned long id;
-+	char *p = (char *)page;
-+	ssize_t ret = -EINVAL;
-+
-+	id = simple_strtoul(p, &p, 0);
-+	if (!p || (*p && (*p != '\n')))
-+		return -EINVAL;
-+
-+	/* Switching PIO is not allowed when live... */
-+	spin_lock(&gpio->lock);
-+	if (!gpio->enabled) {
-+		ret = -ENXIO;
-+		if (at32_gpio_port_is_valid(id)) {
-+			gpio->port = id;
-+			ret = count;
-+		}
-+	}
-+	spin_unlock(&gpio->lock);
-+
-+	return ret;
-+}
-+
-+static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page)
-+{
-+	return sprintf(page, "0x%08x\n", gpio->pin_mask);
-+}
-+
-+static ssize_t gpio_store_pin_mask(struct gpio_item *gpio,
-+				   const char *page, size_t count)
-+{
-+	u32 new_mask;
-+	char *p = (char *)page;
-+	ssize_t ret = -EINVAL;
-+
-+	new_mask = simple_strtoul(p, &p, 0);
-+	if (!p || (*p && (*p != '\n')))
-+		return -EINVAL;
-+
-+	/* Can't update the pin mask while live. */
-+	spin_lock(&gpio->lock);
-+	if (!gpio->enabled) {
-+		gpio->oe_mask &= new_mask;
-+		gpio->pin_mask = new_mask;
-+		ret = count;
-+	}
-+	spin_unlock(&gpio->lock);
-+
-+	return ret;
-+}
-+
-+static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page)
-+{
-+	return sprintf(page, "0x%08x\n", gpio->oe_mask);
-+}
-+
-+static ssize_t gpio_store_oe_mask(struct gpio_item *gpio,
-+				  const char *page, size_t count)
-+{
-+	u32 mask;
-+	char *p = (char *)page;
-+	ssize_t ret = -EINVAL;
-+
-+	mask = simple_strtoul(p, &p, 0);
-+	if (!p || (*p && (*p != '\n')))
-+		return -EINVAL;
-+
-+	spin_lock(&gpio->lock);
-+	if (!gpio->enabled) {
-+		gpio->oe_mask = mask & gpio->pin_mask;
-+		ret = count;
-+	}
-+	spin_unlock(&gpio->lock);
-+
-+	return ret;
-+}
-+
-+static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page)
-+{
-+	return sprintf(page, "%d\n", gpio->enabled);
-+}
-+
-+static ssize_t gpio_store_enabled(struct gpio_item *gpio,
-+				  const char *page, size_t count)
-+{
-+	char *p = (char *)page;
-+	int enabled;
-+	int ret;
-+
-+	enabled = simple_strtoul(p, &p, 0);
-+	if (!p || (*p && (*p != '\n')))
-+		return -EINVAL;
-+
-+	/* make it a boolean value */
-+	enabled = !!enabled;
-+
-+	if (gpio->enabled == enabled)
-+		/* No change; do nothing. */
-+		return count;
-+
-+	BUG_ON(gpio->id >= GPIO_DEV_MAX);
-+
-+	if (!enabled) {
-+		class_device_unregister(gpio->gpio_dev);
-+		cdev_del(&gpio->char_dev);
-+		at32_deselect_pins(gpio->port, gpio->pin_mask);
-+		gpio->initialized = 0;
-+	} else {
-+		if (gpio->port < 0 || !gpio->pin_mask)
-+			return -ENODEV;
-+	}
-+
-+	/* Disallow any updates to gpio_id or pin_mask */
-+	spin_lock(&gpio->lock);
-+	gpio->enabled = enabled;
-+	spin_unlock(&gpio->lock);
-+
-+	if (!enabled)
-+		return count;
-+
-+	/* Now, try to allocate the pins */
-+	ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask);
-+	if (ret)
-+		goto err_alloc_pins;
-+
-+	gpio->initialized = 1;
-+
-+	cdev_init(&gpio->char_dev, &gpio_dev_fops);
-+	gpio->char_dev.owner = THIS_MODULE;
-+	ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1);
-+	if (ret < 0)
-+		goto err_cdev_add;
-+	gpio->gpio_dev = class_device_create(gpio_dev_class, NULL,
-+					     MKDEV(MAJOR(gpio_devt), gpio->id),
-+					     NULL,
-+					     "gpio%d", gpio->id);
-+	if (IS_ERR(gpio->gpio_dev)) {
-+		printk(KERN_ERR "failed to create gpio%d\n", gpio->id);
-+		ret = PTR_ERR(gpio->gpio_dev);
-+		goto err_class_dev;
-+	}
-+
-+	printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n",
-+	       gpio->id, gpio->port, gpio->pin_mask,
-+	       MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt));
-+
-+	return 0;
-+
-+err_class_dev:
-+	cdev_del(&gpio->char_dev);
-+err_cdev_add:
-+	at32_deselect_pins(gpio->port, gpio->pin_mask);
-+	gpio->initialized = 0;
-+err_alloc_pins:
-+	spin_lock(&gpio->lock);
-+	gpio->enabled = 0;
-+	spin_unlock(&gpio->lock);
-+
-+	return ret;
-+}
-+
-+static struct gpio_attribute gpio_item_attr_gpio_id = {
-+	.attr = {
-+		.ca_owner = THIS_MODULE,
-+		.ca_name = "gpio_id",
-+		.ca_mode = S_IRUGO | S_IWUSR,
-+	},
-+	.show = gpio_show_gpio_id,
-+	.store = gpio_store_gpio_id,
-+};
-+static struct gpio_attribute gpio_item_attr_pin_mask = {
-+	.attr = {
-+		.ca_owner = THIS_MODULE,
-+		.ca_name = "pin_mask",
-+		.ca_mode = S_IRUGO | S_IWUSR,
-+	},
-+	.show = gpio_show_pin_mask,
-+	.store = gpio_store_pin_mask,
-+};
-+static struct gpio_attribute gpio_item_attr_oe_mask = {
-+	.attr = {
-+		.ca_owner = THIS_MODULE,
-+		.ca_name = "oe_mask",
-+		.ca_mode = S_IRUGO | S_IWUSR,
-+	},
-+	.show = gpio_show_oe_mask,
-+	.store = gpio_store_oe_mask,
-+};
-+static struct gpio_attribute gpio_item_attr_enabled = {
-+	.attr = {
-+		.ca_owner = THIS_MODULE,
-+		.ca_name = "enabled",
-+		.ca_mode = S_IRUGO | S_IWUSR,
-+	},
-+	.show = gpio_show_enabled,
-+	.store = gpio_store_enabled,
-+};
-+
-+static struct configfs_attribute *gpio_item_attrs[] = {
-+	&gpio_item_attr_gpio_id.attr,
-+	&gpio_item_attr_pin_mask.attr,
-+	&gpio_item_attr_oe_mask.attr,
-+	&gpio_item_attr_enabled.attr,
-+	NULL,
-+};
-+
-+static ssize_t gpio_show_attr(struct config_item *item,
-+			      struct configfs_attribute *attr,
-+			      char *page)
-+{
-+	struct gpio_item *gpio_item = to_gpio_item(item);
-+	struct gpio_attribute *gpio_attr
-+		= container_of(attr, struct gpio_attribute, attr);
-+	ssize_t ret = 0;
-+
-+	if (gpio_attr->show)
-+		ret = gpio_attr->show(gpio_item, page);
-+	return ret;
-+}
-+
-+static ssize_t gpio_store_attr(struct config_item *item,
-+			       struct configfs_attribute *attr,
-+			       const char *page, size_t count)
-+{
-+	struct gpio_item *gpio_item = to_gpio_item(item);
-+	struct gpio_attribute *gpio_attr
-+		= container_of(attr, struct gpio_attribute, attr);
-+	ssize_t ret = -EINVAL;
-+
-+	if (gpio_attr->store)
-+		ret = gpio_attr->store(gpio_item, page, count);
-+	return ret;
-+}
-+
-+static void gpio_release(struct config_item *item)
-+{
-+	kfree(to_gpio_item(item));
-+}
-+
-+static struct configfs_item_operations gpio_item_ops = {
-+	.release		= gpio_release,
-+	.show_attribute		= gpio_show_attr,
-+	.store_attribute	= gpio_store_attr,
-+};
-+
-+static struct config_item_type gpio_item_type = {
-+	.ct_item_ops	= &gpio_item_ops,
-+	.ct_attrs	= gpio_item_attrs,
-+	.ct_owner	= THIS_MODULE,
-+};
-+
-+static struct config_item *gpio_make_item(struct config_group *group,
-+					  const char *name)
-+{
-+	static int next_id;
-+	struct gpio_item *gpio;
-+
-+	if (next_id >= GPIO_DEV_MAX)
-+		return NULL;
-+
-+	gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL);
-+	if (!gpio)
-+		return NULL;
-+
-+	gpio->id = next_id++;
-+	config_item_init_type_name(&gpio->item, name, &gpio_item_type);
-+	spin_lock_init(&gpio->lock);
-+	init_waitqueue_head(&gpio->change_wq);
-+
-+	return &gpio->item;
-+}
-+
-+static void gpio_drop_item(struct config_group *group,
-+			   struct config_item *item)
-+{
-+	struct gpio_item *gpio = to_gpio_item(item);
-+
-+	spin_lock(&gpio->lock);
-+	if (gpio->enabled) {
-+		class_device_unregister(gpio->gpio_dev);
-+		cdev_del(&gpio->char_dev);
-+	}
-+
-+	if (gpio->initialized) {
-+		at32_deselect_pins(gpio->port, gpio->pin_mask);
-+		gpio->initialized = 0;
-+		gpio->enabled = 0;
-+	}
-+	spin_unlock(&gpio->lock);
-+}
-+
-+static struct configfs_group_operations gpio_group_ops = {
-+	.make_item	= gpio_make_item,
-+	.drop_item	= gpio_drop_item,
-+};
-+
-+static struct config_item_type gpio_group_type = {
-+	.ct_group_ops	= &gpio_group_ops,
-+	.ct_owner	= THIS_MODULE,
-+};
-+
-+static struct configfs_subsystem gpio_subsys = {
-+	.su_group = {
-+		.cg_item = {
-+			 .ci_namebuf = "gpio",
-+			 .ci_type = &gpio_group_type,
-+		 },
-+	},
-+};
-+
-+static int __init gpio_dev_init(void)
-+{
-+	int err;
-+
-+	gpio_dev_class = class_create(THIS_MODULE, "gpio-dev");
-+	if (IS_ERR(gpio_dev_class)) {
-+		err = PTR_ERR(gpio_dev_class);
-+		goto err_class_create;
-+	}
-+
-+	err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio");
-+	if (err < 0)
-+		goto err_alloc_chrdev;
-+
-+	/* Configfs initialization */
-+	config_group_init(&gpio_subsys.su_group);
-+	init_MUTEX(&gpio_subsys.su_sem);
-+	err = configfs_register_subsystem(&gpio_subsys);
-+	if (err)
-+		goto err_register_subsys;
-+
-+	return 0;
-+
-+err_register_subsys:
-+	unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX);
-+err_alloc_chrdev:
-+	class_destroy(gpio_dev_class);
-+err_class_create:
-+	printk(KERN_WARNING "Failed to initialize gpio /dev interface\n");
-+	return err;
-+}
-+late_initcall(gpio_dev_init);
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/extint.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/extint.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/extint.c	(arbetskopia)
-@@ -17,42 +17,83 @@
- 
- #include <asm/io.h>
- 
--#include <asm/arch/sm.h>
-+/* EIC register offsets */
-+#define EIC_IER					0x0000
-+#define EIC_IDR					0x0004
-+#define EIC_IMR					0x0008
-+#define EIC_ISR					0x000c
-+#define EIC_ICR					0x0010
-+#define EIC_MODE				0x0014
-+#define EIC_EDGE				0x0018
-+#define EIC_LEVEL				0x001c
-+#define EIC_TEST				0x0020
-+#define EIC_NMIC				0x0024
- 
--#include "sm.h"
-+/* Bitfields in TEST */
-+#define EIC_TESTEN_OFFSET			31
-+#define EIC_TESTEN_SIZE				1
- 
--static void eim_ack_irq(unsigned int irq)
-+/* Bitfields in NMIC */
-+#define EIC_EN_OFFSET				0
-+#define EIC_EN_SIZE				1
-+
-+/* Bit manipulation macros */
-+#define EIC_BIT(name)					\
-+	(1 << EIC_##name##_OFFSET)
-+#define EIC_BF(name,value)				\
-+	(((value) & ((1 << EIC_##name##_SIZE) - 1))	\
-+	 << EIC_##name##_OFFSET)
-+#define EIC_BFEXT(name,value)				\
-+	(((value) >> EIC_##name##_OFFSET)		\
-+	 & ((1 << EIC_##name##_SIZE) - 1))
-+#define EIC_BFINS(name,value,old)			\
-+	(((old) & ~(((1 << EIC_##name##_SIZE) - 1)	\
-+		    << EIC_##name##_OFFSET))		\
-+	 | EIC_BF(name,value))
-+
-+/* Register access macros */
-+#define eic_readl(port,reg)				\
-+	__raw_readl((port)->regs + EIC_##reg)
-+#define eic_writel(port,reg,value)			\
-+	__raw_writel((value), (port)->regs + EIC_##reg)
-+
-+struct eic {
-+	void __iomem *regs;
-+	struct irq_chip *chip;
-+	unsigned int first_irq;
-+};
-+
-+static void eic_ack_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_ICR, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, ICR, 1 << (irq - eic->first_irq));
- }
- 
--static void eim_mask_irq(unsigned int irq)
-+static void eic_mask_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_IDR, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, IDR, 1 << (irq - eic->first_irq));
- }
- 
--static void eim_mask_ack_irq(unsigned int irq)
-+static void eic_mask_ack_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_ICR, 1 << (irq - sm->eim_first_irq));
--	sm_writel(sm, EIM_IDR, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, ICR, 1 << (irq - eic->first_irq));
-+	eic_writel(eic, IDR, 1 << (irq - eic->first_irq));
- }
- 
--static void eim_unmask_irq(unsigned int irq)
-+static void eic_unmask_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_IER, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, IER, 1 << (irq - eic->first_irq));
- }
- 
--static int eim_set_irq_type(unsigned int irq, unsigned int flow_type)
-+static int eic_set_irq_type(unsigned int irq, unsigned int flow_type)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
-+	struct eic *eic = get_irq_chip_data(irq);
- 	struct irq_desc *desc;
--	unsigned int i = irq - sm->eim_first_irq;
-+	unsigned int i = irq - eic->first_irq;
- 	u32 mode, edge, level;
--	unsigned long flags;
- 	int ret = 0;
- 
- 	flow_type &= IRQ_TYPE_SENSE_MASK;
-@@ -60,11 +101,10 @@
- 		flow_type = IRQ_TYPE_LEVEL_LOW;
- 
- 	desc = &irq_desc[irq];
--	spin_lock_irqsave(&sm->lock, flags);
- 
--	mode = sm_readl(sm, EIM_MODE);
--	edge = sm_readl(sm, EIM_EDGE);
--	level = sm_readl(sm, EIM_LEVEL);
-+	mode = eic_readl(eic, MODE);
-+	edge = eic_readl(eic, EDGE);
-+	level = eic_readl(eic, LEVEL);
- 
- 	switch (flow_type) {
- 	case IRQ_TYPE_LEVEL_LOW:
-@@ -89,9 +129,9 @@
- 	}
- 
- 	if (ret == 0) {
--		sm_writel(sm, EIM_MODE, mode);
--		sm_writel(sm, EIM_EDGE, edge);
--		sm_writel(sm, EIM_LEVEL, level);
-+		eic_writel(eic, MODE, mode);
-+		eic_writel(eic, EDGE, edge);
-+		eic_writel(eic, LEVEL, level);
- 
- 		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
- 			flow_type |= IRQ_LEVEL;
-@@ -99,35 +139,33 @@
- 		desc->status |= flow_type;
- 	}
- 
--	spin_unlock_irqrestore(&sm->lock, flags);
--
- 	return ret;
- }
- 
--struct irq_chip eim_chip = {
--	.name		= "eim",
--	.ack		= eim_ack_irq,
--	.mask		= eim_mask_irq,
--	.mask_ack	= eim_mask_ack_irq,
--	.unmask		= eim_unmask_irq,
--	.set_type	= eim_set_irq_type,
-+struct irq_chip eic_chip = {
-+	.name		= "eic",
-+	.ack		= eic_ack_irq,
-+	.mask		= eic_mask_irq,
-+	.mask_ack	= eic_mask_ack_irq,
-+	.unmask		= eic_unmask_irq,
-+	.set_type	= eic_set_irq_type,
- };
- 
--static void demux_eim_irq(unsigned int irq, struct irq_desc *desc)
-+static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
- {
--	struct at32_sm *sm = desc->handler_data;
-+	struct eic *eic = desc->handler_data;
- 	struct irq_desc *ext_desc;
- 	unsigned long status, pending;
- 	unsigned int i, ext_irq;
- 
--	status = sm_readl(sm, EIM_ISR);
--	pending = status & sm_readl(sm, EIM_IMR);
-+	status = eic_readl(eic, ISR);
-+	pending = status & eic_readl(eic, IMR);
- 
- 	while (pending) {
- 		i = fls(pending) - 1;
- 		pending &= ~(1 << i);
- 
--		ext_irq = i + sm->eim_first_irq;
-+		ext_irq = i + eic->first_irq;
- 		ext_desc = irq_desc + ext_irq;
- 		if (ext_desc->status & IRQ_LEVEL)
- 			handle_level_irq(ext_irq, ext_desc);
-@@ -136,51 +174,85 @@
- 	}
- }
- 
--static int __init eim_init(void)
-+static int __init eic_probe(struct platform_device *pdev)
- {
--	struct at32_sm *sm = &system_manager;
-+	struct eic *eic;
-+	struct resource *regs;
- 	unsigned int i;
- 	unsigned int nr_irqs;
- 	unsigned int int_irq;
-+	int ret;
- 	u32 pattern;
- 
--	/*
--	 * The EIM is really the same module as SM, so register
--	 * mapping, etc. has been taken care of already.
--	 */
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	int_irq = platform_get_irq(pdev, 0);
-+	if (!regs || !int_irq) {
-+		dev_dbg(&pdev->dev, "missing regs and/or irq resource\n");
-+		return -ENXIO;
-+	}
- 
-+	ret = -ENOMEM;
-+	eic = kzalloc(sizeof(struct eic), GFP_KERNEL);
-+	if (!eic) {
-+		dev_dbg(&pdev->dev, "no memory for eic structure\n");
-+		goto err_kzalloc;
-+	}
-+
-+	eic->first_irq = EIM_IRQ_BASE + 32 * pdev->id;
-+	eic->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!eic->regs) {
-+		dev_dbg(&pdev->dev, "failed to map regs\n");
-+		goto err_ioremap;
-+	}
-+
- 	/*
- 	 * Find out how many interrupt lines that are actually
- 	 * implemented in hardware.
- 	 */
--	sm_writel(sm, EIM_IDR, ~0UL);
--	sm_writel(sm, EIM_MODE, ~0UL);
--	pattern = sm_readl(sm, EIM_MODE);
-+	eic_writel(eic, IDR, ~0UL);
-+	eic_writel(eic, MODE, ~0UL);
-+	pattern = eic_readl(eic, MODE);
- 	nr_irqs = fls(pattern);
- 
- 	/* Trigger on falling edge unless overridden by driver */
--	sm_writel(sm, EIM_MODE, 0UL);
--	sm_writel(sm, EIM_EDGE, 0UL);
-+	eic_writel(eic, MODE, 0UL);
-+	eic_writel(eic, EDGE, 0UL);
- 
--	sm->eim_chip = &eim_chip;
-+	eic->chip = &eic_chip;
- 
- 	for (i = 0; i < nr_irqs; i++) {
- 		/* NOTE the handler we set here is ignored by the demux */
--		set_irq_chip_and_handler(sm->eim_first_irq + i, &eim_chip,
-+		set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
- 					 handle_level_irq);
--		set_irq_chip_data(sm->eim_first_irq + i, sm);
-+		set_irq_chip_data(eic->first_irq + i, eic);
- 	}
- 
--	int_irq = platform_get_irq_byname(sm->pdev, "eim");
-+	set_irq_chained_handler(int_irq, demux_eic_irq);
-+	set_irq_data(int_irq, eic);
- 
--	set_irq_chained_handler(int_irq, demux_eim_irq);
--	set_irq_data(int_irq, sm);
-+	dev_info(&pdev->dev,
-+		 "External Interrupt Controller at 0x%p, IRQ %u\n",
-+		 eic->regs, int_irq);
-+	dev_info(&pdev->dev,
-+		 "Handling %u external IRQs, starting with IRQ %u\n",
-+		 nr_irqs, eic->first_irq);
- 
--	printk("EIM: External Interrupt Module at 0x%p, IRQ %u\n",
--	       sm->regs, int_irq);
--	printk("EIM: Handling %u external IRQs, starting with IRQ %u\n",
--	       nr_irqs, sm->eim_first_irq);
-+	return 0;
- 
--	return 0;
-+err_ioremap:
-+	kfree(eic);
-+err_kzalloc:
-+	return ret;
- }
--arch_initcall(eim_init);
-+
-+static struct platform_driver eic_driver = {
-+	.driver = {
-+		.name = "at32_eic",
-+	},
-+};
-+
-+static int __init eic_init(void)
-+{
-+	return platform_driver_probe(&eic_driver, eic_probe);
-+}
-+arch_initcall(eic_init);
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/pm.h
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/pm.h	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/pm.h	(revision 0)
-@@ -0,0 +1,112 @@
-+/*
-+ * Register definitions for the Power Manager (PM)
-+ */
-+#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
-+#define __ARCH_AVR32_MACH_AT32AP_PM_H__
-+
-+/* PM register offsets */
-+#define PM_MCCTRL				0x0000
-+#define PM_CKSEL				0x0004
-+#define PM_CPU_MASK				0x0008
-+#define PM_HSB_MASK				0x000c
-+#define PM_PBA_MASK				0x0010
-+#define PM_PBB_MASK				0x0014
-+#define PM_PLL0					0x0020
-+#define PM_PLL1					0x0024
-+#define PM_IER					0x0040
-+#define PM_IDR					0x0044
-+#define PM_IMR					0x0048
-+#define PM_ISR					0x004c
-+#define PM_ICR					0x0050
-+#define PM_GCCTRL(x)				(0x0060 + 4 * (x))
-+#define PM_RCAUSE				0x00c0
-+
-+/* Bitfields in CKSEL */
-+#define PM_CPUSEL_OFFSET			0
-+#define PM_CPUSEL_SIZE				3
-+#define PM_CPUDIV_OFFSET			7
-+#define PM_CPUDIV_SIZE				1
-+#define PM_HSBSEL_OFFSET			8
-+#define PM_HSBSEL_SIZE				3
-+#define PM_HSBDIV_OFFSET			15
-+#define PM_HSBDIV_SIZE				1
-+#define PM_PBASEL_OFFSET			16
-+#define PM_PBASEL_SIZE				3
-+#define PM_PBADIV_OFFSET			23
-+#define PM_PBADIV_SIZE				1
-+#define PM_PBBSEL_OFFSET			24
-+#define PM_PBBSEL_SIZE				3
-+#define PM_PBBDIV_OFFSET			31
-+#define PM_PBBDIV_SIZE				1
-+
-+/* Bitfields in PLL0 */
-+#define PM_PLLEN_OFFSET				0
-+#define PM_PLLEN_SIZE				1
-+#define PM_PLLOSC_OFFSET			1
-+#define PM_PLLOSC_SIZE				1
-+#define PM_PLLOPT_OFFSET			2
-+#define PM_PLLOPT_SIZE				3
-+#define PM_PLLDIV_OFFSET			8
-+#define PM_PLLDIV_SIZE				8
-+#define PM_PLLMUL_OFFSET			16
-+#define PM_PLLMUL_SIZE				8
-+#define PM_PLLCOUNT_OFFSET			24
-+#define PM_PLLCOUNT_SIZE			6
-+#define PM_PLLTEST_OFFSET			31
-+#define PM_PLLTEST_SIZE				1
-+
-+/* Bitfields in ICR */
-+#define PM_LOCK0_OFFSET				0
-+#define PM_LOCK0_SIZE				1
-+#define PM_LOCK1_OFFSET				1
-+#define PM_LOCK1_SIZE				1
-+#define PM_WAKE_OFFSET				2
-+#define PM_WAKE_SIZE				1
-+#define PM_CKRDY_OFFSET				5
-+#define PM_CKRDY_SIZE				1
-+#define PM_MSKRDY_OFFSET			6
-+#define PM_MSKRDY_SIZE				1
-+
-+/* Bitfields in GCCTRL0 */
-+#define PM_OSCSEL_OFFSET			0
-+#define PM_OSCSEL_SIZE				1
-+#define PM_PLLSEL_OFFSET			1
-+#define PM_PLLSEL_SIZE				1
-+#define PM_CEN_OFFSET				2
-+#define PM_CEN_SIZE				1
-+#define PM_DIVEN_OFFSET				4
-+#define PM_DIVEN_SIZE				1
-+#define PM_DIV_OFFSET				8
-+#define PM_DIV_SIZE				8
-+
-+/* Bitfields in RCAUSE */
-+#define PM_POR_OFFSET				0
-+#define PM_POR_SIZE				1
-+#define PM_EXT_OFFSET				2
-+#define PM_EXT_SIZE				1
-+#define PM_WDT_OFFSET				3
-+#define PM_WDT_SIZE				1
-+#define PM_NTAE_OFFSET				4
-+#define PM_NTAE_SIZE				1
-+
-+/* Bit manipulation macros */
-+#define PM_BIT(name)					\
-+	(1 << PM_##name##_OFFSET)
-+#define PM_BF(name,value)				\
-+	(((value) & ((1 << PM_##name##_SIZE) - 1))	\
-+	 << PM_##name##_OFFSET)
-+#define PM_BFEXT(name,value)				\
-+	(((value) >> PM_##name##_OFFSET)		\
-+	 & ((1 << PM_##name##_SIZE) - 1))
-+#define PM_BFINS(name,value,old)\
-+	(((old) & ~(((1 << PM_##name##_SIZE) - 1)	\
-+		    << PM_##name##_OFFSET))		\
-+	 | PM_BF(name,value))
-+
-+/* Register access macros */
-+#define pm_readl(reg)							\
-+	__raw_readl((void __iomem *)AT32_PM_BASE + PM_##reg)
-+#define pm_writel(reg,value)						\
-+	__raw_writel((value), (void __iomem *)AT32_PM_BASE + PM_##reg)
-+
-+#endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/sm.h
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/sm.h	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/sm.h	(arbetskopia)
-@@ -1,242 +0,0 @@
--/*
-- * Register definitions for SM
-- *
-- * System Manager
-- */
--#ifndef __ASM_AVR32_SM_H__
--#define __ASM_AVR32_SM_H__
--
--/* SM register offsets */
--#define SM_PM_MCCTRL                            0x0000
--#define SM_PM_CKSEL                             0x0004
--#define SM_PM_CPU_MASK                          0x0008
--#define SM_PM_HSB_MASK                          0x000c
--#define SM_PM_PBA_MASK                         0x0010
--#define SM_PM_PBB_MASK                         0x0014
--#define SM_PM_PLL0                              0x0020
--#define SM_PM_PLL1                              0x0024
--#define SM_PM_VCTRL                             0x0030
--#define SM_PM_VMREF                             0x0034
--#define SM_PM_VMV                               0x0038
--#define SM_PM_IER                               0x0040
--#define SM_PM_IDR                               0x0044
--#define SM_PM_IMR                               0x0048
--#define SM_PM_ISR                               0x004c
--#define SM_PM_ICR                               0x0050
--#define SM_PM_GCCTRL                            0x0060
--#define SM_RTC_CTRL                             0x0080
--#define SM_RTC_VAL                              0x0084
--#define SM_RTC_TOP                              0x0088
--#define SM_RTC_IER                              0x0090
--#define SM_RTC_IDR                              0x0094
--#define SM_RTC_IMR                              0x0098
--#define SM_RTC_ISR                              0x009c
--#define SM_RTC_ICR                              0x00a0
--#define SM_WDT_CTRL                             0x00b0
--#define SM_WDT_CLR                              0x00b4
--#define SM_WDT_EXT                              0x00b8
--#define SM_RC_RCAUSE                            0x00c0
--#define SM_EIM_IER                              0x0100
--#define SM_EIM_IDR                              0x0104
--#define SM_EIM_IMR                              0x0108
--#define SM_EIM_ISR                              0x010c
--#define SM_EIM_ICR                              0x0110
--#define SM_EIM_MODE                             0x0114
--#define SM_EIM_EDGE                             0x0118
--#define SM_EIM_LEVEL                            0x011c
--#define SM_EIM_TEST                             0x0120
--#define SM_EIM_NMIC                             0x0124
--
--/* Bitfields in PM_MCCTRL */
--
--/* Bitfields in PM_CKSEL */
--#define SM_CPUSEL_OFFSET                        0
--#define SM_CPUSEL_SIZE                          3
--#define SM_CPUDIV_OFFSET                        7
--#define SM_CPUDIV_SIZE                          1
--#define SM_HSBSEL_OFFSET                        8
--#define SM_HSBSEL_SIZE                          3
--#define SM_HSBDIV_OFFSET                        15
--#define SM_HSBDIV_SIZE                          1
--#define SM_PBASEL_OFFSET                       16
--#define SM_PBASEL_SIZE                         3
--#define SM_PBADIV_OFFSET                       23
--#define SM_PBADIV_SIZE                         1
--#define SM_PBBSEL_OFFSET                       24
--#define SM_PBBSEL_SIZE                         3
--#define SM_PBBDIV_OFFSET                       31
--#define SM_PBBDIV_SIZE                         1
--
--/* Bitfields in PM_CPU_MASK */
--
--/* Bitfields in PM_HSB_MASK */
--
--/* Bitfields in PM_PBA_MASK */
--
--/* Bitfields in PM_PBB_MASK */
--
--/* Bitfields in PM_PLL0 */
--#define SM_PLLEN_OFFSET                         0
--#define SM_PLLEN_SIZE                           1
--#define SM_PLLOSC_OFFSET                        1
--#define SM_PLLOSC_SIZE                          1
--#define SM_PLLOPT_OFFSET                        2
--#define SM_PLLOPT_SIZE                          3
--#define SM_PLLDIV_OFFSET                        8
--#define SM_PLLDIV_SIZE                          8
--#define SM_PLLMUL_OFFSET                        16
--#define SM_PLLMUL_SIZE                          8
--#define SM_PLLCOUNT_OFFSET                      24
--#define SM_PLLCOUNT_SIZE                        6
--#define SM_PLLTEST_OFFSET                       31
--#define SM_PLLTEST_SIZE                         1
--
--/* Bitfields in PM_PLL1 */
--
--/* Bitfields in PM_VCTRL */
--#define SM_VAUTO_OFFSET                         0
--#define SM_VAUTO_SIZE                           1
--#define SM_PM_VCTRL_VAL_OFFSET                  8
--#define SM_PM_VCTRL_VAL_SIZE                    7
--
--/* Bitfields in PM_VMREF */
--#define SM_REFSEL_OFFSET                        0
--#define SM_REFSEL_SIZE                          4
--
--/* Bitfields in PM_VMV */
--#define SM_PM_VMV_VAL_OFFSET                    0
--#define SM_PM_VMV_VAL_SIZE                      8
--
--/* Bitfields in PM_IER */
--
--/* Bitfields in PM_IDR */
--
--/* Bitfields in PM_IMR */
--
--/* Bitfields in PM_ISR */
--
--/* Bitfields in PM_ICR */
--#define SM_LOCK0_OFFSET                         0
--#define SM_LOCK0_SIZE                           1
--#define SM_LOCK1_OFFSET                         1
--#define SM_LOCK1_SIZE                           1
--#define SM_WAKE_OFFSET                          2
--#define SM_WAKE_SIZE                            1
--#define SM_VOK_OFFSET                           3
--#define SM_VOK_SIZE                             1
--#define SM_VMRDY_OFFSET                         4
--#define SM_VMRDY_SIZE                           1
--#define SM_CKRDY_OFFSET                         5
--#define SM_CKRDY_SIZE                           1
--
--/* Bitfields in PM_GCCTRL */
--#define SM_OSCSEL_OFFSET                        0
--#define SM_OSCSEL_SIZE                          1
--#define SM_PLLSEL_OFFSET                        1
--#define SM_PLLSEL_SIZE                          1
--#define SM_CEN_OFFSET                           2
--#define SM_CEN_SIZE                             1
--#define SM_CPC_OFFSET                           3
--#define SM_CPC_SIZE                             1
--#define SM_DIVEN_OFFSET                         4
--#define SM_DIVEN_SIZE                           1
--#define SM_DIV_OFFSET                           8
--#define SM_DIV_SIZE                             8
--
--/* Bitfields in RTC_CTRL */
--#define SM_PCLR_OFFSET                          1
--#define SM_PCLR_SIZE                            1
--#define SM_TOPEN_OFFSET                         2
--#define SM_TOPEN_SIZE                           1
--#define SM_CLKEN_OFFSET                         3
--#define SM_CLKEN_SIZE                           1
--#define SM_PSEL_OFFSET                          8
--#define SM_PSEL_SIZE                            16
--
--/* Bitfields in RTC_VAL */
--#define SM_RTC_VAL_VAL_OFFSET                   0
--#define SM_RTC_VAL_VAL_SIZE                     31
--
--/* Bitfields in RTC_TOP */
--#define SM_RTC_TOP_VAL_OFFSET                   0
--#define SM_RTC_TOP_VAL_SIZE                     32
--
--/* Bitfields in RTC_IER */
--
--/* Bitfields in RTC_IDR */
--
--/* Bitfields in RTC_IMR */
--
--/* Bitfields in RTC_ISR */
--
--/* Bitfields in RTC_ICR */
--#define SM_TOPI_OFFSET                          0
--#define SM_TOPI_SIZE                            1
--
--/* Bitfields in WDT_CTRL */
--#define SM_KEY_OFFSET                           24
--#define SM_KEY_SIZE                             8
--
--/* Bitfields in WDT_CLR */
--
--/* Bitfields in WDT_EXT */
--
--/* Bitfields in RC_RCAUSE */
--#define SM_POR_OFFSET                           0
--#define SM_POR_SIZE                             1
--#define SM_BOD_OFFSET                           1
--#define SM_BOD_SIZE                             1
--#define SM_EXT_OFFSET                           2
--#define SM_EXT_SIZE                             1
--#define SM_WDT_OFFSET                           3
--#define SM_WDT_SIZE                             1
--#define SM_NTAE_OFFSET                          4
--#define SM_NTAE_SIZE                            1
--#define SM_SERP_OFFSET                          5
--#define SM_SERP_SIZE                            1
--
--/* Bitfields in EIM_IER */
--
--/* Bitfields in EIM_IDR */
--
--/* Bitfields in EIM_IMR */
--
--/* Bitfields in EIM_ISR */
--
--/* Bitfields in EIM_ICR */
--
--/* Bitfields in EIM_MODE */
--
--/* Bitfields in EIM_EDGE */
--#define SM_INT0_OFFSET                          0
--#define SM_INT0_SIZE                            1
--#define SM_INT1_OFFSET                          1
--#define SM_INT1_SIZE                            1
--#define SM_INT2_OFFSET                          2
--#define SM_INT2_SIZE                            1
--#define SM_INT3_OFFSET                          3
--#define SM_INT3_SIZE                            1
--
--/* Bitfields in EIM_LEVEL */
--
--/* Bitfields in EIM_TEST */
--#define SM_TESTEN_OFFSET                        31
--#define SM_TESTEN_SIZE                          1
--
--/* Bitfields in EIM_NMIC */
--#define SM_EN_OFFSET                            0
--#define SM_EN_SIZE                              1
--
--/* Bit manipulation macros */
--#define SM_BIT(name)                            (1 << SM_##name##_OFFSET)
--#define SM_BF(name,value)                       (((value) & ((1 << SM_##name##_SIZE) - 1)) << SM_##name##_OFFSET)
--#define SM_BFEXT(name,value)                    (((value) >> SM_##name##_OFFSET) & ((1 << SM_##name##_SIZE) - 1))
--#define SM_BFINS(name,value,old)                (((old) & ~(((1 << SM_##name##_SIZE) - 1) << SM_##name##_OFFSET)) | SM_BF(name,value))
--
--/* Register access macros */
--#define sm_readl(port,reg)					\
--	__raw_readl((port)->regs + SM_##reg)
--#define sm_writel(port,reg,value)				\
--	__raw_writel((value), (port)->regs + SM_##reg)
--
--#endif /* __ASM_AVR32_SM_H__ */
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/pio.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/pio.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/pio.c	(arbetskopia)
-@@ -158,6 +158,82 @@
- 	dump_stack();
- }
- 
-+#ifdef CONFIG_GPIO_DEV
-+
-+/* Gang allocators and accessors; used by the GPIO /dev driver */
-+int at32_gpio_port_is_valid(unsigned int port)
-+{
-+	return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL;
-+}
-+
-+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask)
-+{
-+	struct pio_device *pio;
-+	u32 old, new;
-+
-+	pio = &pio_dev[port];
-+	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins));
-+
-+	/* Try to allocate the pins */
-+	do {
-+		old = pio->pinmux_mask;
-+		if (old & pins)
-+			return -EBUSY;
-+
-+		new = old | pins;
-+	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
-+
-+	/* That went well, now configure the port */
-+	pio_writel(pio, OER, oe_mask);
-+	pio_writel(pio, PER, pins);
-+
-+	return 0;
-+}
-+
-+void at32_deselect_pins(unsigned int port, u32 pins)
-+{
-+	struct pio_device *pio;
-+	u32 old, new;
-+
-+	pio = &pio_dev[port];
-+	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
-+
-+	/* Return to a "safe" mux configuration */
-+	pio_writel(pio, PUER, pins);
-+	pio_writel(pio, ODR, pins);
-+
-+	/* Deallocate the pins */
-+	do {
-+		old = pio->pinmux_mask;
-+		new = old & ~pins;
-+	} while (cmpxchg(&pio->pinmux_mask, old, new) != old);
-+}
-+
-+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins)
-+{
-+	struct pio_device *pio;
-+
-+	pio = &pio_dev[port];
-+	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
-+
-+	return pio_readl(pio, PDSR) & pins;
-+}
-+
-+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask)
-+{
-+	struct pio_device *pio;
-+
-+	pio = &pio_dev[port];
-+	BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs);
-+
-+	/* No atomic updates for now... */
-+	pio_writel(pio, CODR, ~value & mask);
-+	pio_writel(pio, SODR, value & mask);
-+}
-+
-+#endif /* CONFIG_GPIO_DEV */
-+
-+
- /*--------------------------------------------------------------------------*/
- 
- /* GPIO API */
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap.c	(arbetskopia)
-@@ -11,41 +11,10 @@
- #include <linux/init.h>
- #include <linux/platform_device.h>
- 
--#include <asm/io.h>
--
- #include <asm/arch/init.h>
--#include <asm/arch/sm.h>
- 
--struct at32_sm system_manager;
--
--static int __init at32_sm_init(void)
--{
--	struct resource *regs;
--	struct at32_sm *sm = &system_manager;
--	int ret = -ENXIO;
--
--	regs = platform_get_resource(&at32_sm_device, IORESOURCE_MEM, 0);
--	if (!regs)
--		goto fail;
--
--	spin_lock_init(&sm->lock);
--	sm->pdev = &at32_sm_device;
--
--	ret = -ENOMEM;
--	sm->regs = ioremap(regs->start, regs->end - regs->start + 1);
--	if (!sm->regs)
--		goto fail;
--
--	return 0;
--
--fail:
--	printk(KERN_ERR "Failed to initialize System Manager: %d\n", ret);
--	return ret;
--}
--
- void __init setup_platform(void)
- {
--	at32_sm_init();
- 	at32_clock_init();
- 	at32_portmux_init();
- }
-Index: linux-2.6.22.1/arch/avr32/mach-at32ap/Makefile
-===================================================================
---- linux-2.6.22.1/arch/avr32/mach-at32ap/Makefile	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mach-at32ap/Makefile	(arbetskopia)
-@@ -1,3 +1,5 @@
- obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
- obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
- obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
-+obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
-+obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
-Index: linux-2.6.22.1/arch/avr32/Kconfig
-===================================================================
---- linux-2.6.22.1/arch/avr32/Kconfig	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/Kconfig	(arbetskopia)
-@@ -113,6 +113,13 @@
- 	bool "ATNGW100 Network Gateway"
- endchoice
- 
-+if BOARD_ATSTK1000
-+source "arch/avr32/boards/atstk1000/Kconfig"
-+endif
-+if BOARD_ATNGW100
-+source "arch/avr32/boards/atngw100/Kconfig"
-+endif
-+
- choice
- 	prompt "Boot loader type"
- 	default LOADER_U_BOOT
-@@ -171,6 +178,10 @@
- 	  enabling Nexus-compliant debuggers to keep track of the PID of the
- 	  currently executing task.
- 
-+config DW_DMAC
-+	tristate "Synopsys DesignWare DMA Controller support"
-+	default y if CPU_AT32AP7000
-+
- # FPU emulation goes here
- 
- source "kernel/Kconfig.hz"
-@@ -185,6 +196,27 @@
- 
- endmenu
- 
-+menu "Power managment options"
-+
-+menu "CPU Frequency scaling"
-+
-+source "drivers/cpufreq/Kconfig"
-+
-+config CPU_FREQ_AT32AP
-+	bool "CPU frequency driver for AT32AP"
-+	depends on CPU_FREQ && PLATFORM_AT32AP
-+	default n
-+	help
-+	  This enables the CPU frequency driver for AT32AP processors.
-+
-+	  For details, take a look in <file:Documentation/cpu-freq>.
-+
-+	  If in doubt, say N.
-+
-+endmenu
-+
-+endmenu
-+
- menu "Bus options"
- 
- config PCI
-Index: linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig
-===================================================================
---- linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig	(arbetskopia)
-@@ -1,7 +1,7 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.22-rc5
--# Sat Jun 23 15:40:05 2007
-+# Linux kernel version: 2.6.22.atmel.1
-+# Thu Jul 12 17:49:20 2007
- #
- CONFIG_AVR32=y
- CONFIG_GENERIC_GPIO=y
-@@ -114,6 +114,7 @@
- CONFIG_CPU_AT32AP7000=y
- # CONFIG_BOARD_ATSTK1000 is not set
- CONFIG_BOARD_ATNGW100=y
-+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
- CONFIG_LOADER_U_BOOT=y
- 
- #
-@@ -122,6 +123,7 @@
- # CONFIG_AP7000_32_BIT_SMC is not set
- CONFIG_AP7000_16_BIT_SMC=y
- # CONFIG_AP7000_8_BIT_SMC is not set
-+CONFIG_GPIO_DEV=y
- CONFIG_LOAD_ADDRESS=0x10000000
- CONFIG_ENTRY_ADDRESS=0x90000000
- CONFIG_PHYS_OFFSET=0x10000000
-@@ -145,6 +147,7 @@
- # CONFIG_RESOURCES_64BIT is not set
- CONFIG_ZONE_DMA_FLAG=0
- # CONFIG_OWNERSHIP_TRACE is not set
-+CONFIG_DW_DMAC=y
- # CONFIG_HZ_100 is not set
- CONFIG_HZ_250=y
- # CONFIG_HZ_300 is not set
-@@ -153,6 +156,27 @@
- CONFIG_CMDLINE=""
- 
- #
-+# Power managment options
-+#
-+
-+#
-+# CPU Frequency scaling
-+#
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_FREQ_TABLE=y
-+# CONFIG_CPU_FREQ_DEBUG is not set
-+CONFIG_CPU_FREQ_STAT=m
-+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
-+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-+CONFIG_CPU_FREQ_AT32AP=y
-+
-+#
- # Bus options
- #
- # CONFIG_ARCH_SUPPORTS_MSI is not set
-@@ -187,13 +211,8 @@
- # CONFIG_NET_KEY_MIGRATE is not set
- CONFIG_INET=y
- CONFIG_IP_MULTICAST=y
--CONFIG_IP_ADVANCED_ROUTER=y
--CONFIG_ASK_IP_FIB_HASH=y
--# CONFIG_IP_FIB_TRIE is not set
-+# CONFIG_IP_ADVANCED_ROUTER is not set
- CONFIG_IP_FIB_HASH=y
--# CONFIG_IP_MULTIPLE_TABLES is not set
--# CONFIG_IP_ROUTE_MULTIPATH is not set
--# CONFIG_IP_ROUTE_VERBOSE is not set
- CONFIG_IP_PNP=y
- CONFIG_IP_PNP_DHCP=y
- # CONFIG_IP_PNP_BOOTP is not set
-@@ -240,6 +259,7 @@
- # CONFIG_NETWORK_SECMARK is not set
- CONFIG_NETFILTER=y
- # CONFIG_NETFILTER_DEBUG is not set
-+CONFIG_BRIDGE_NETFILTER=y
- 
- #
- # Core Netfilter Configuration
-@@ -284,6 +304,7 @@
- CONFIG_NETFILTER_XT_MATCH_MARK=m
- CONFIG_NETFILTER_XT_MATCH_POLICY=m
- CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
- CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
- CONFIG_NETFILTER_XT_MATCH_QUOTA=m
- CONFIG_NETFILTER_XT_MATCH_REALM=m
-@@ -359,13 +380,19 @@
- CONFIG_IP6_NF_MANGLE=m
- CONFIG_IP6_NF_TARGET_HL=m
- CONFIG_IP6_NF_RAW=m
-+
-+#
-+# Bridge: Netfilter Configuration
-+#
-+# CONFIG_BRIDGE_NF_EBTABLES is not set
- # CONFIG_IP_DCCP is not set
- # CONFIG_IP_SCTP is not set
- # CONFIG_TIPC is not set
- # CONFIG_ATM is not set
--# CONFIG_BRIDGE is not set
-+CONFIG_BRIDGE=m
- CONFIG_VLAN_8021Q=m
- # CONFIG_DECNET is not set
-+CONFIG_LLC=m
- # CONFIG_LLC2 is not set
- # CONFIG_IPX is not set
- # CONFIG_ATALK is not set
-@@ -521,7 +548,6 @@
- #
- # Misc devices
- #
--# CONFIG_BLINK is not set
- # CONFIG_IDE is not set
- 
- #
-@@ -545,13 +571,26 @@
- # CONFIG_BONDING is not set
- # CONFIG_EQUALIZER is not set
- CONFIG_TUN=m
--# CONFIG_PHYLIB is not set
-+CONFIG_PHYLIB=y
- 
- #
-+# MII PHY device drivers
-+#
-+# CONFIG_MARVELL_PHY is not set
-+# CONFIG_DAVICOM_PHY is not set
-+# CONFIG_QSEMI_PHY is not set
-+# CONFIG_LXT_PHY is not set
-+# CONFIG_CICADA_PHY is not set
-+# CONFIG_VITESSE_PHY is not set
-+# CONFIG_SMSC_PHY is not set
-+# CONFIG_BROADCOM_PHY is not set
-+# CONFIG_FIXED_PHY is not set
-+
-+#
- # Ethernet (10 or 100Mbit)
- #
- CONFIG_NET_ETHERNET=y
--CONFIG_MII=y
-+# CONFIG_MII is not set
- CONFIG_MACB=y
- # CONFIG_NETDEV_1000 is not set
- # CONFIG_NETDEV_10000 is not set
-@@ -625,7 +664,15 @@
- # IPMI
- #
- # CONFIG_IPMI_HANDLER is not set
--# CONFIG_WATCHDOG is not set
-+CONFIG_WATCHDOG=y
-+# CONFIG_WATCHDOG_NOWAYOUT is not set
-+
-+#
-+# Watchdog Device Drivers
-+#
-+# CONFIG_SOFT_WATCHDOG is not set
-+CONFIG_AT32AP700X_WDT=y
-+CONFIG_AT32AP700X_WDT_TIMEOUT=2
- # CONFIG_HW_RANDOM is not set
- # CONFIG_RTC is not set
- # CONFIG_GEN_RTC is not set
-@@ -636,9 +683,44 @@
- # TPM devices
- #
- # CONFIG_TCG_TPM is not set
--# CONFIG_I2C is not set
-+CONFIG_I2C=m
-+CONFIG_I2C_BOARDINFO=y
-+CONFIG_I2C_CHARDEV=m
- 
- #
-+# I2C Algorithms
-+#
-+CONFIG_I2C_ALGOBIT=m
-+# CONFIG_I2C_ALGOPCF is not set
-+# CONFIG_I2C_ALGOPCA is not set
-+
-+#
-+# I2C Hardware Bus support
-+#
-+CONFIG_I2C_ATMELTWI=m
-+CONFIG_I2C_ATMELTWI_BAUDRATE=100000
-+CONFIG_I2C_GPIO=m
-+# CONFIG_I2C_OCORES is not set
-+# CONFIG_I2C_PARPORT_LIGHT is not set
-+# CONFIG_I2C_SIMTEC is not set
-+# CONFIG_I2C_STUB is not set
-+
-+#
-+# Miscellaneous I2C Chip support
-+#
-+# CONFIG_SENSORS_DS1337 is not set
-+# CONFIG_SENSORS_DS1374 is not set
-+# CONFIG_SENSORS_EEPROM is not set
-+# CONFIG_SENSORS_PCF8574 is not set
-+# CONFIG_SENSORS_PCA9539 is not set
-+# CONFIG_SENSORS_PCF8591 is not set
-+# CONFIG_SENSORS_MAX6875 is not set
-+# CONFIG_I2C_DEBUG_CORE is not set
-+# CONFIG_I2C_DEBUG_ALGO is not set
-+# CONFIG_I2C_DEBUG_BUS is not set
-+# CONFIG_I2C_DEBUG_CHIP is not set
-+
-+#
- # SPI support
- #
- CONFIG_SPI=y
-@@ -655,7 +737,7 @@
- # SPI Protocol Masters
- #
- # CONFIG_SPI_AT25 is not set
--# CONFIG_SPI_SPIDEV is not set
-+CONFIG_SPI_SPIDEV=m
- 
- #
- # Dallas's 1-wire bus
-@@ -706,21 +788,59 @@
- #
- # USB Gadget Support
- #
--# CONFIG_USB_GADGET is not set
--# CONFIG_MMC is not set
-+CONFIG_USB_GADGET=y
-+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-+CONFIG_USB_GADGET_SELECTED=y
-+# CONFIG_USB_GADGET_FSL_USB2 is not set
-+# CONFIG_USB_GADGET_NET2280 is not set
-+# CONFIG_USB_GADGET_PXA2XX is not set
-+# CONFIG_USB_GADGET_GOKU is not set
-+# CONFIG_USB_GADGET_LH7A40X is not set
-+CONFIG_USB_GADGET_ATMEL_USBA=y
-+CONFIG_USB_ATMEL_USBA=y
-+# CONFIG_USB_GADGET_OMAP is not set
-+# CONFIG_USB_GADGET_AT91 is not set
-+# CONFIG_USB_GADGET_DUMMY_HCD is not set
-+CONFIG_USB_GADGET_DUALSPEED=y
-+CONFIG_USB_ZERO=m
-+CONFIG_USB_ETH=m
-+CONFIG_USB_ETH_RNDIS=y
-+CONFIG_USB_GADGETFS=m
-+CONFIG_USB_FILE_STORAGE=m
-+# CONFIG_USB_FILE_STORAGE_TEST is not set
-+CONFIG_USB_G_SERIAL=m
-+# CONFIG_USB_MIDI_GADGET is not set
-+CONFIG_MMC=y
-+# CONFIG_MMC_DEBUG is not set
-+# CONFIG_MMC_UNSAFE_RESUME is not set
- 
- #
-+# MMC/SD Card Drivers
-+#
-+CONFIG_MMC_BLOCK=y
-+
-+#
-+# MMC/SD Host Controller Drivers
-+#
-+CONFIG_MMC_ATMELMCI=y
-+
-+#
- # LED devices
- #
--# CONFIG_NEW_LEDS is not set
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
- 
- #
- # LED drivers
- #
-+CONFIG_LEDS_GPIO=y
- 
- #
- # LED Triggers
- #
-+CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_TIMER=y
-+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
- 
- #
- # InfiniBand support
-@@ -733,9 +853,53 @@
- #
- # Real Time Clock
- #
--# CONFIG_RTC_CLASS is not set
-+CONFIG_RTC_LIB=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_HCTOSYS=y
-+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-+# CONFIG_RTC_DEBUG is not set
- 
- #
-+# RTC interfaces
-+#
-+CONFIG_RTC_INTF_SYSFS=y
-+CONFIG_RTC_INTF_PROC=y
-+CONFIG_RTC_INTF_DEV=y
-+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-+# CONFIG_RTC_DRV_TEST is not set
-+
-+#
-+# I2C RTC drivers
-+#
-+# CONFIG_RTC_DRV_DS1307 is not set
-+# CONFIG_RTC_DRV_DS1672 is not set
-+# CONFIG_RTC_DRV_MAX6900 is not set
-+# CONFIG_RTC_DRV_RS5C372 is not set
-+# CONFIG_RTC_DRV_ISL1208 is not set
-+# CONFIG_RTC_DRV_X1205 is not set
-+# CONFIG_RTC_DRV_PCF8563 is not set
-+# CONFIG_RTC_DRV_PCF8583 is not set
-+
-+#
-+# SPI RTC drivers
-+#
-+# CONFIG_RTC_DRV_RS5C348 is not set
-+# CONFIG_RTC_DRV_MAX6902 is not set
-+
-+#
-+# Platform RTC drivers
-+#
-+# CONFIG_RTC_DRV_DS1553 is not set
-+# CONFIG_RTC_DRV_DS1742 is not set
-+# CONFIG_RTC_DRV_M48T86 is not set
-+# CONFIG_RTC_DRV_V3020 is not set
-+
-+#
-+# on-CPU RTC drivers
-+#
-+CONFIG_RTC_DRV_AT32AP700X=y
-+
-+#
- # DMA Engine support
- #
- # CONFIG_DMA_ENGINE is not set
-@@ -767,7 +931,8 @@
- # CONFIG_OCFS2_FS is not set
- # CONFIG_MINIX_FS is not set
- # CONFIG_ROMFS_FS is not set
--# CONFIG_INOTIFY is not set
-+CONFIG_INOTIFY=y
-+CONFIG_INOTIFY_USER=y
- # CONFIG_QUOTA is not set
- # CONFIG_DNOTIFY is not set
- # CONFIG_AUTOFS_FS is not set
-@@ -922,7 +1087,7 @@
- CONFIG_ENABLE_MUST_CHECK=y
- CONFIG_MAGIC_SYSRQ=y
- # CONFIG_UNUSED_SYMBOLS is not set
--# CONFIG_DEBUG_FS is not set
-+CONFIG_DEBUG_FS=y
- # CONFIG_HEADERS_CHECK is not set
- CONFIG_DEBUG_KERNEL=y
- # CONFIG_DEBUG_SHIRQ is not set
-Index: linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig
-===================================================================
---- linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig	(arbetskopia)
-@@ -1,7 +1,7 @@
- #
- # Automatically generated make config: don't edit
--# Linux kernel version: 2.6.22-rc5
--# Sat Jun 23 15:32:08 2007
-+# Linux kernel version: 2.6.22.atmel.2
-+# Thu Jul 19 13:46:47 2007
- #
- CONFIG_AVR32=y
- CONFIG_GENERIC_GPIO=y
-@@ -80,10 +80,10 @@
- #
- CONFIG_MODULES=y
- CONFIG_MODULE_UNLOAD=y
--# CONFIG_MODULE_FORCE_UNLOAD is not set
-+CONFIG_MODULE_FORCE_UNLOAD=y
- # CONFIG_MODVERSIONS is not set
- # CONFIG_MODULE_SRCVERSION_ALL is not set
--# CONFIG_KMOD is not set
-+CONFIG_KMOD=y
- 
- #
- # Block layer
-@@ -99,12 +99,12 @@
- CONFIG_IOSCHED_NOOP=y
- # CONFIG_IOSCHED_AS is not set
- # CONFIG_IOSCHED_DEADLINE is not set
--# CONFIG_IOSCHED_CFQ is not set
-+CONFIG_IOSCHED_CFQ=y
- # CONFIG_DEFAULT_AS is not set
- # CONFIG_DEFAULT_DEADLINE is not set
--# CONFIG_DEFAULT_CFQ is not set
--CONFIG_DEFAULT_NOOP=y
--CONFIG_DEFAULT_IOSCHED="noop"
-+CONFIG_DEFAULT_CFQ=y
-+# CONFIG_DEFAULT_NOOP is not set
-+CONFIG_DEFAULT_IOSCHED="cfq"
- 
- #
- # System Type and features
-@@ -117,6 +117,11 @@
- CONFIG_BOARD_ATSTK1002=y
- CONFIG_BOARD_ATSTK1000=y
- # CONFIG_BOARD_ATNGW100 is not set
-+# CONFIG_BOARD_ATSTK1002_CUSTOM is not set
-+# CONFIG_BOARD_ATSTK1002_SPI1 is not set
-+# CONFIG_BOARD_ATSTK1002_J2_LED is not set
-+# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set
-+# CONFIG_BOARD_ATSTK1002_J2_RGB is not set
- CONFIG_LOADER_U_BOOT=y
- 
- #
-@@ -125,6 +130,7 @@
- # CONFIG_AP7000_32_BIT_SMC is not set
- CONFIG_AP7000_16_BIT_SMC=y
- # CONFIG_AP7000_8_BIT_SMC is not set
-+CONFIG_GPIO_DEV=y
- CONFIG_LOAD_ADDRESS=0x10000000
- CONFIG_ENTRY_ADDRESS=0x90000000
- CONFIG_PHYS_OFFSET=0x10000000
-@@ -148,6 +154,7 @@
- # CONFIG_RESOURCES_64BIT is not set
- CONFIG_ZONE_DMA_FLAG=0
- # CONFIG_OWNERSHIP_TRACE is not set
-+CONFIG_DW_DMAC=y
- # CONFIG_HZ_100 is not set
- CONFIG_HZ_250=y
- # CONFIG_HZ_300 is not set
-@@ -156,6 +163,27 @@
- CONFIG_CMDLINE=""
- 
- #
-+# Power managment options
-+#
-+
-+#
-+# CPU Frequency scaling
-+#
-+CONFIG_CPU_FREQ=y
-+CONFIG_CPU_FREQ_TABLE=y
-+# CONFIG_CPU_FREQ_DEBUG is not set
-+CONFIG_CPU_FREQ_STAT=m
-+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
-+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
-+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
-+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
-+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
-+CONFIG_CPU_FREQ_AT32AP=y
-+
-+#
- # Bus options
- #
- # CONFIG_ARCH_SUPPORTS_MSI is not set
-@@ -327,6 +355,8 @@
- #
- # Self-contained MTD device drivers
- #
-+CONFIG_MTD_DATAFLASH=m
-+# CONFIG_MTD_M25P80 is not set
- # CONFIG_MTD_SLRAM is not set
- # CONFIG_MTD_PHRAM is not set
- # CONFIG_MTD_MTDRAM is not set
-@@ -373,7 +403,7 @@
- #
- # Misc devices
- #
--# CONFIG_BLINK is not set
-+CONFIG_ATMEL_SSC=m
- # CONFIG_IDE is not set
- 
- #
-@@ -397,13 +427,26 @@
- # CONFIG_BONDING is not set
- # CONFIG_EQUALIZER is not set
- CONFIG_TUN=m
--# CONFIG_PHYLIB is not set
-+CONFIG_PHYLIB=y
- 
- #
-+# MII PHY device drivers
-+#
-+# CONFIG_MARVELL_PHY is not set
-+# CONFIG_DAVICOM_PHY is not set
-+# CONFIG_QSEMI_PHY is not set
-+CONFIG_LXT_PHY=y
-+# CONFIG_CICADA_PHY is not set
-+# CONFIG_VITESSE_PHY is not set
-+# CONFIG_SMSC_PHY is not set
-+# CONFIG_BROADCOM_PHY is not set
-+# CONFIG_FIXED_PHY is not set
-+
-+#
- # Ethernet (10 or 100Mbit)
- #
- CONFIG_NET_ETHERNET=y
--CONFIG_MII=y
-+# CONFIG_MII is not set
- CONFIG_MACB=y
- # CONFIG_NETDEV_1000 is not set
- # CONFIG_NETDEV_10000 is not set
-@@ -443,9 +486,44 @@
- #
- # Input device support
- #
--# CONFIG_INPUT is not set
-+CONFIG_INPUT=m
-+# CONFIG_INPUT_FF_MEMLESS is not set
-+CONFIG_INPUT_POLLDEV=m
- 
- #
-+# Userland interfaces
-+#
-+CONFIG_INPUT_MOUSEDEV=m
-+CONFIG_INPUT_MOUSEDEV_PSAUX=y
-+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-+# CONFIG_INPUT_JOYDEV is not set
-+# CONFIG_INPUT_TSDEV is not set
-+# CONFIG_INPUT_EVDEV is not set
-+# CONFIG_INPUT_EVBUG is not set
-+
-+#
-+# Input Device Drivers
-+#
-+CONFIG_INPUT_KEYBOARD=y
-+# CONFIG_KEYBOARD_ATKBD is not set
-+# CONFIG_KEYBOARD_SUNKBD is not set
-+# CONFIG_KEYBOARD_LKKBD is not set
-+# CONFIG_KEYBOARD_XTKBD is not set
-+# CONFIG_KEYBOARD_NEWTON is not set
-+# CONFIG_KEYBOARD_STOWAWAY is not set
-+CONFIG_KEYBOARD_GPIO=m
-+CONFIG_INPUT_MOUSE=y
-+# CONFIG_MOUSE_PS2 is not set
-+# CONFIG_MOUSE_SERIAL is not set
-+# CONFIG_MOUSE_VSXXXAA is not set
-+CONFIG_MOUSE_GPIO=m
-+# CONFIG_INPUT_JOYSTICK is not set
-+# CONFIG_INPUT_TABLET is not set
-+# CONFIG_INPUT_TOUCHSCREEN is not set
-+# CONFIG_INPUT_MISC is not set
-+
-+#
- # Hardware I/O ports
- #
- # CONFIG_SERIO is not set
-@@ -477,7 +555,15 @@
- # IPMI
- #
- # CONFIG_IPMI_HANDLER is not set
--# CONFIG_WATCHDOG is not set
-+CONFIG_WATCHDOG=y
-+# CONFIG_WATCHDOG_NOWAYOUT is not set
-+
-+#
-+# Watchdog Device Drivers
-+#
-+# CONFIG_SOFT_WATCHDOG is not set
-+CONFIG_AT32AP700X_WDT=y
-+CONFIG_AT32AP700X_WDT_TIMEOUT=2
- # CONFIG_HW_RANDOM is not set
- # CONFIG_RTC is not set
- # CONFIG_GEN_RTC is not set
-@@ -488,15 +574,63 @@
- # TPM devices
- #
- # CONFIG_TCG_TPM is not set
--# CONFIG_I2C is not set
-+CONFIG_I2C=m
-+CONFIG_I2C_BOARDINFO=y
-+CONFIG_I2C_CHARDEV=m
- 
- #
-+# I2C Algorithms
-+#
-+CONFIG_I2C_ALGOBIT=m
-+# CONFIG_I2C_ALGOPCF is not set
-+# CONFIG_I2C_ALGOPCA is not set
-+
-+#
-+# I2C Hardware Bus support
-+#
-+CONFIG_I2C_ATMELTWI=m
-+CONFIG_I2C_ATMELTWI_BAUDRATE=100000
-+CONFIG_I2C_GPIO=m
-+# CONFIG_I2C_OCORES is not set
-+# CONFIG_I2C_PARPORT_LIGHT is not set
-+# CONFIG_I2C_SIMTEC is not set
-+# CONFIG_I2C_STUB is not set
-+
-+#
-+# Miscellaneous I2C Chip support
-+#
-+# CONFIG_SENSORS_DS1337 is not set
-+# CONFIG_SENSORS_DS1374 is not set
-+# CONFIG_SENSORS_EEPROM is not set
-+# CONFIG_SENSORS_PCF8574 is not set
-+# CONFIG_SENSORS_PCA9539 is not set
-+# CONFIG_SENSORS_PCF8591 is not set
-+# CONFIG_SENSORS_MAX6875 is not set
-+# CONFIG_I2C_DEBUG_CORE is not set
-+# CONFIG_I2C_DEBUG_ALGO is not set
-+# CONFIG_I2C_DEBUG_BUS is not set
-+# CONFIG_I2C_DEBUG_CHIP is not set
-+
-+#
- # SPI support
- #
--# CONFIG_SPI is not set
--# CONFIG_SPI_MASTER is not set
-+CONFIG_SPI=y
-+# CONFIG_SPI_DEBUG is not set
-+CONFIG_SPI_MASTER=y
- 
- #
-+# SPI Master Controller Drivers
-+#
-+CONFIG_SPI_ATMEL=y
-+# CONFIG_SPI_BITBANG is not set
-+
-+#
-+# SPI Protocol Masters
-+#
-+# CONFIG_SPI_AT25 is not set
-+CONFIG_SPI_SPIDEV=m
-+
-+#
- # Dallas's 1-wire bus
- #
- # CONFIG_W1 is not set
-@@ -517,21 +651,93 @@
- #
- # Graphics support
- #
--# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-+CONFIG_BACKLIGHT_LCD_SUPPORT=y
-+CONFIG_LCD_CLASS_DEVICE=y
-+CONFIG_LCD_LTV350QV=y
-+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
- 
- #
- # Display device support
- #
- # CONFIG_DISPLAY_SUPPORT is not set
- # CONFIG_VGASTATE is not set
--# CONFIG_FB is not set
-+CONFIG_FB=y
-+# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_FB_DDC is not set
-+CONFIG_FB_CFB_FILLRECT=y
-+CONFIG_FB_CFB_COPYAREA=y
-+CONFIG_FB_CFB_IMAGEBLIT=y
-+# CONFIG_FB_SYS_FILLRECT is not set
-+# CONFIG_FB_SYS_COPYAREA is not set
-+# CONFIG_FB_SYS_IMAGEBLIT is not set
-+# CONFIG_FB_SYS_FOPS is not set
-+CONFIG_FB_DEFERRED_IO=y
-+# CONFIG_FB_SVGALIB is not set
-+# CONFIG_FB_MACMODES is not set
-+# CONFIG_FB_BACKLIGHT is not set
-+# CONFIG_FB_MODE_HELPERS is not set
-+# CONFIG_FB_TILEBLITTING is not set
- 
- #
-+# Frame buffer hardware drivers
-+#
-+# CONFIG_FB_S1D13XXX is not set
-+CONFIG_FB_ATMEL=y
-+# CONFIG_FB_VIRTUAL is not set
-+# CONFIG_LOGO is not set
-+
-+#
- # Sound
- #
--# CONFIG_SOUND is not set
-+CONFIG_SOUND=m
- 
- #
-+# Advanced Linux Sound Architecture
-+#
-+CONFIG_SND=m
-+CONFIG_SND_TIMER=m
-+CONFIG_SND_PCM=m
-+# CONFIG_SND_SEQUENCER is not set
-+CONFIG_SND_OSSEMUL=y
-+CONFIG_SND_MIXER_OSS=m
-+CONFIG_SND_PCM_OSS=m
-+CONFIG_SND_PCM_OSS_PLUGINS=y
-+# CONFIG_SND_DYNAMIC_MINORS is not set
-+# CONFIG_SND_SUPPORT_OLD_API is not set
-+CONFIG_SND_VERBOSE_PROCFS=y
-+# CONFIG_SND_VERBOSE_PRINTK is not set
-+# CONFIG_SND_DEBUG is not set
-+
-+#
-+# Generic devices
-+#
-+# CONFIG_SND_DUMMY is not set
-+# CONFIG_SND_MTPAV is not set
-+# CONFIG_SND_SERIAL_U16550 is not set
-+# CONFIG_SND_MPU401 is not set
-+
-+#
-+# SPI devices
-+#
-+CONFIG_SND_AT73C213=m
-+CONFIG_SND_AT73C213_TARGET_BITRATE=48000
-+
-+#
-+# System on Chip audio support
-+#
-+# CONFIG_SND_SOC is not set
-+
-+#
-+# Open Sound System
-+#
-+# CONFIG_SOUND_PRIME is not set
-+
-+#
-+# HID Devices
-+#
-+# CONFIG_HID is not set
-+
-+#
- # USB support
- #
- # CONFIG_USB_ARCH_HAS_HCD is not set
-@@ -545,21 +751,59 @@
- #
- # USB Gadget Support
- #
--# CONFIG_USB_GADGET is not set
--# CONFIG_MMC is not set
-+CONFIG_USB_GADGET=y
-+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-+CONFIG_USB_GADGET_SELECTED=y
-+# CONFIG_USB_GADGET_FSL_USB2 is not set
-+# CONFIG_USB_GADGET_NET2280 is not set
-+# CONFIG_USB_GADGET_PXA2XX is not set
-+# CONFIG_USB_GADGET_GOKU is not set
-+# CONFIG_USB_GADGET_LH7A40X is not set
-+CONFIG_USB_GADGET_ATMEL_USBA=y
-+CONFIG_USB_ATMEL_USBA=y
-+# CONFIG_USB_GADGET_OMAP is not set
-+# CONFIG_USB_GADGET_AT91 is not set
-+# CONFIG_USB_GADGET_DUMMY_HCD is not set
-+CONFIG_USB_GADGET_DUALSPEED=y
-+CONFIG_USB_ZERO=m
-+CONFIG_USB_ETH=m
-+CONFIG_USB_ETH_RNDIS=y
-+CONFIG_USB_GADGETFS=m
-+CONFIG_USB_FILE_STORAGE=m
-+# CONFIG_USB_FILE_STORAGE_TEST is not set
-+CONFIG_USB_G_SERIAL=m
-+# CONFIG_USB_MIDI_GADGET is not set
-+CONFIG_MMC=y
-+# CONFIG_MMC_DEBUG is not set
-+# CONFIG_MMC_UNSAFE_RESUME is not set
- 
- #
-+# MMC/SD Card Drivers
-+#
-+CONFIG_MMC_BLOCK=y
-+
-+#
-+# MMC/SD Host Controller Drivers
-+#
-+CONFIG_MMC_ATMELMCI=y
-+
-+#
- # LED devices
- #
--# CONFIG_NEW_LEDS is not set
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=m
- 
- #
- # LED drivers
- #
-+CONFIG_LEDS_GPIO=m
- 
- #
- # LED Triggers
- #
-+CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_TIMER=m
-+CONFIG_LEDS_TRIGGER_HEARTBEAT=m
- 
- #
- # InfiniBand support
-@@ -572,9 +816,52 @@
- #
- # Real Time Clock
- #
--# CONFIG_RTC_CLASS is not set
-+CONFIG_RTC_LIB=y
-+CONFIG_RTC_CLASS=y
-+# CONFIG_RTC_HCTOSYS is not set
-+# CONFIG_RTC_DEBUG is not set
- 
- #
-+# RTC interfaces
-+#
-+CONFIG_RTC_INTF_SYSFS=y
-+CONFIG_RTC_INTF_PROC=y
-+CONFIG_RTC_INTF_DEV=y
-+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-+# CONFIG_RTC_DRV_TEST is not set
-+
-+#
-+# I2C RTC drivers
-+#
-+# CONFIG_RTC_DRV_DS1307 is not set
-+# CONFIG_RTC_DRV_DS1672 is not set
-+# CONFIG_RTC_DRV_MAX6900 is not set
-+# CONFIG_RTC_DRV_RS5C372 is not set
-+# CONFIG_RTC_DRV_ISL1208 is not set
-+# CONFIG_RTC_DRV_X1205 is not set
-+# CONFIG_RTC_DRV_PCF8563 is not set
-+# CONFIG_RTC_DRV_PCF8583 is not set
-+
-+#
-+# SPI RTC drivers
-+#
-+# CONFIG_RTC_DRV_RS5C348 is not set
-+# CONFIG_RTC_DRV_MAX6902 is not set
-+
-+#
-+# Platform RTC drivers
-+#
-+# CONFIG_RTC_DRV_DS1553 is not set
-+# CONFIG_RTC_DRV_DS1742 is not set
-+# CONFIG_RTC_DRV_M48T86 is not set
-+# CONFIG_RTC_DRV_V3020 is not set
-+
-+#
-+# on-CPU RTC drivers
-+#
-+CONFIG_RTC_DRV_AT32AP700X=y
-+
-+#
- # DMA Engine support
- #
- # CONFIG_DMA_ENGINE is not set
-@@ -590,11 +877,14 @@
- #
- # File systems
- #
--CONFIG_EXT2_FS=m
-+CONFIG_EXT2_FS=y
- # CONFIG_EXT2_FS_XATTR is not set
- # CONFIG_EXT2_FS_XIP is not set
--# CONFIG_EXT3_FS is not set
-+CONFIG_EXT3_FS=y
-+# CONFIG_EXT3_FS_XATTR is not set
- # CONFIG_EXT4DEV_FS is not set
-+CONFIG_JBD=y
-+# CONFIG_JBD_DEBUG is not set
- # CONFIG_REISERFS_FS is not set
- # CONFIG_JFS_FS is not set
- # CONFIG_FS_POSIX_ACL is not set
-@@ -609,7 +899,7 @@
- # CONFIG_DNOTIFY is not set
- # CONFIG_AUTOFS_FS is not set
- # CONFIG_AUTOFS4_FS is not set
--# CONFIG_FUSE_FS is not set
-+CONFIG_FUSE_FS=m
- 
- #
- # CD-ROM/DVD Filesystems
-@@ -638,7 +928,7 @@
- # CONFIG_TMPFS_POSIX_ACL is not set
- # CONFIG_HUGETLB_PAGE is not set
- CONFIG_RAMFS=y
--CONFIG_CONFIGFS_FS=m
-+CONFIG_CONFIGFS_FS=y
- 
- #
- # Miscellaneous filesystems
-@@ -683,8 +973,14 @@
- # CONFIG_SUNRPC_BIND34 is not set
- # CONFIG_RPCSEC_GSS_KRB5 is not set
- # CONFIG_RPCSEC_GSS_SPKM3 is not set
--# CONFIG_SMB_FS is not set
--# CONFIG_CIFS is not set
-+CONFIG_SMB_FS=m
-+# CONFIG_SMB_NLS_DEFAULT is not set
-+CONFIG_CIFS=m
-+# CONFIG_CIFS_STATS is not set
-+# CONFIG_CIFS_WEAK_PW_HASH is not set
-+# CONFIG_CIFS_XATTR is not set
-+# CONFIG_CIFS_DEBUG2 is not set
-+# CONFIG_CIFS_EXPERIMENTAL is not set
- # CONFIG_NCP_FS is not set
- # CONFIG_CODA_FS is not set
- # CONFIG_AFS_FS is not set
-Index: linux-2.6.22.1/arch/avr32/mm/dma-coherent.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/mm/dma-coherent.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/mm/dma-coherent.c	(arbetskopia)
-@@ -41,6 +41,13 @@
- 	struct page *page, *free, *end;
- 	int order;
- 
-+	/* Following is a work-around (a.k.a. hack) to prevent pages
-+	 * with __GFP_COMP being passed to split_page() which cannot
-+	 * handle them.  The real problem is that this flag probably
-+	 * should be 0 on AVR32 as it is not supported on this
-+	 * platform--see CONFIG_HUGETLB_PAGE. */
-+	gfp &= ~(__GFP_COMP);
-+
- 	size = PAGE_ALIGN(size);
- 	order = get_order(size);
- 
-Index: linux-2.6.22.1/arch/avr32/boards/atngw100/Kconfig
-===================================================================
---- linux-2.6.22.1/arch/avr32/boards/atngw100/Kconfig	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/boards/atngw100/Kconfig	(revision 0)
-@@ -0,0 +1,12 @@
-+# NGW100 customization
-+
-+config BOARD_ATNGW100_I2C_GPIO
-+	bool "Use GPIO for i2c instead of built-in TWI module"
-+	help
-+	  The driver for the built-in TWI module has been plagued by
-+	  various problems, while the i2c-gpio driver is based on the
-+	  trusty old i2c-algo-bit bitbanging engine, making it work
-+	  on pretty much any setup.
-+
-+	  Choose 'Y' here if you're having i2c-related problems and
-+	  want to rule out the i2c bus driver.
-Index: linux-2.6.22.1/arch/avr32/boards/atngw100/setup.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/boards/atngw100/setup.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/boards/atngw100/setup.c	(arbetskopia)
-@@ -9,10 +9,12 @@
-  */
- #include <linux/clk.h>
- #include <linux/etherdevice.h>
-+#include <linux/i2c-gpio.h>
- #include <linux/init.h>
- #include <linux/linkage.h>
- #include <linux/platform_device.h>
- #include <linux/types.h>
-+#include <linux/leds.h>
- #include <linux/spi/spi.h>
- 
- #include <asm/io.h>
-@@ -21,6 +23,7 @@
- #include <asm/arch/at32ap7000.h>
- #include <asm/arch/board.h>
- #include <asm/arch/init.h>
-+#include <asm/arch/portmux.h>
- 
- /* Initialized by bootloader-specific startup code. */
- struct tag *bootloader_tags __initdata;
-@@ -39,6 +42,11 @@
- 	},
- };
- 
-+static struct mci_platform_data __initdata mci0_data = {
-+	.detect_pin	= GPIO_PIN_PC(25),
-+	.wp_pin		= GPIO_PIN_PE(0),
-+};
-+
- /*
-  * The next two functions should go away as the boot loader is
-  * supposed to initialize the macb address registers with a valid
-@@ -100,8 +108,46 @@
- 	at32_setup_serial_console(0);
- }
- 
-+static const struct gpio_led ngw_leds[] = {
-+	{ .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1,
-+		.default_trigger = "heartbeat",
-+	},
-+	{ .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, },
-+	{ .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, },
-+};
-+
-+static const struct gpio_led_platform_data ngw_led_data = {
-+	.num_leds =	ARRAY_SIZE(ngw_leds),
-+	.leds =		(void *) ngw_leds,
-+};
-+
-+static struct platform_device ngw_gpio_leds = {
-+	.name =		"leds-gpio",
-+	.id =		-1,
-+	.dev = {
-+		.platform_data = (void *) &ngw_led_data,
-+	}
-+};
-+
-+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
-+static struct i2c_gpio_platform_data i2c_gpio_data = {
-+	.sda_pin	= GPIO_PIN_PA(6),
-+	.scl_pin	= GPIO_PIN_PA(7),
-+};
-+
-+static struct platform_device i2c_gpio_device = {
-+	.name		= "i2c-gpio",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data	= &i2c_gpio_data,
-+	},
-+};
-+#endif
-+
- static int __init atngw100_init(void)
- {
-+	unsigned	i;
-+
- 	/*
- 	 * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
- 	 * reserve any pins for it.
-@@ -115,7 +161,23 @@
- 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
- 
- 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-+	at32_add_device_mci(0, &mci0_data);
-+	at32_add_device_usba(0, NULL);
- 
-+	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
-+		at32_select_gpio(ngw_leds[i].gpio,
-+				AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
-+	}
-+	platform_device_register(&ngw_gpio_leds);
-+
-+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
-+	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
-+	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
-+	platform_device_register(&i2c_gpio_device);
-+#else
-+	at32_add_device_twi(0);
-+#endif
-+
- 	return 0;
- }
- postcore_initcall(atngw100_init);
-Index: linux-2.6.22.1/arch/avr32/boards/atstk1000/Kconfig
-===================================================================
---- linux-2.6.22.1/arch/avr32/boards/atstk1000/Kconfig	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/boards/atstk1000/Kconfig	(revision 0)
-@@ -0,0 +1,95 @@
-+# STK1000 customization
-+
-+if BOARD_ATSTK1002
-+
-+config BOARD_ATSTK1002_CUSTOM
-+	bool "Non-default STK-1002 jumper settings"
-+	help
-+	  You will normally leave the jumpers on the CPU card at their
-+	  default settings.  If you need to use certain peripherals,
-+	  you will need to change some of those jumpers.
-+
-+if BOARD_ATSTK1002_CUSTOM
-+
-+config BOARD_ATSTK1002_SW1_CUSTOM
-+	bool "SW1: use SSC1 (not SPI0)"
-+	help
-+	  This also prevents using the external DAC as an audio interface,
-+	  and means you can't initialize the on-board QVGA display.
-+
-+config BOARD_ATSTK1002_SW2_CUSTOM
-+	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
-+	help
-+	  If you change this you'll want an updated boot loader putting
-+	  the console on UART-C not UART-A.
-+
-+config BOARD_ATSTK1002_SW3_CUSTOM
-+	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
-+	help
-+	  This also prevents using the external DAC as an audio interface.
-+
-+config BOARD_ATSTK1002_SW4_CUSTOM
-+	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
-+	help
-+	  To use the camera interface you'll need a custom card (on the
-+	  PCI-format connector) connect a video sensor.
-+
-+config BOARD_ATSTK1002_SW5_CUSTOM
-+	bool "SW5: use MACB1 (not LCDC)"
-+
-+config BOARD_ATSTK1002_SW6_CUSTOM
-+	bool "SW6: more GPIOs (not MACB0)"
-+
-+endif	# custom
-+
-+config BOARD_ATSTK1002_SPI1
-+	bool "Configure SPI1 controller"
-+	depends on !BOARD_ATSTK1002_SW4_CUSTOM
-+	help
-+	  All the signals for the second SPI controller are available on
-+	  GPIO lines and accessed through the J1 jumper block.  Say "y"
-+	  here to configure that SPI controller.
-+
-+config BOARD_ATSTK1002_GPIO_MOUSE
-+	bool "Configure gpio_mouse on GPIO J1 header"
-+	depends on !BOARD_ATSTK1002_SW4_CUSTOM
-+	help
-+	  Enable gpio_mouse board configuration on GPIO 0 to 7. Connecting a
-+	  10-pin flat cable from J1 (GPIO) to J25 (SWITCH) will let a user give
-+	  mouse inputs using the the switches SW0 to SW7.
-+
-+	  SW0: right
-+	  SW1: down
-+	  SW2: up
-+	  SW3: left
-+	  SW5: right button
-+	  SW6: middle button
-+	  SW7: left button
-+
-+config BOARD_ATSTK1002_J2_LED
-+	bool
-+	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
-+
-+choice
-+	prompt "LEDs connected to J2:"
-+	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
-+	optional
-+	help
-+	  Select this if you have jumpered the J2 jumper block to the
-+	  LED0..LED7 amber leds, or to the RGB leds, using a ten-pin
-+	  IDC cable.  A default "heartbeat" trigger is provided, but
-+	  you can of course override this.
-+
-+config BOARD_ATSTK1002_J2_LED8
-+	bool "LED0..LED7"
-+	help
-+	  Select this if J2 is jumpered to LED0..LED7 amber leds.
-+
-+config BOARD_ATSTK1002_J2_RGB
-+	bool "RGB leds"
-+	help
-+	  Select this if J2 is jumpered to the RGB leds.
-+
-+endchoice
-+
-+endif	# stk 1002
-Index: linux-2.6.22.1/arch/avr32/boards/atstk1000/atstk1002.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/boards/atstk1000/atstk1002.c	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/boards/atstk1000/atstk1002.c	(arbetskopia)
-@@ -11,10 +11,13 @@
- #include <linux/etherdevice.h>
- #include <linux/init.h>
- #include <linux/kernel.h>
-+#include <linux/leds.h>
- #include <linux/platform_device.h>
- #include <linux/string.h>
- #include <linux/types.h>
- #include <linux/spi/spi.h>
-+#include <linux/spi/at73c213.h>
-+#include <linux/gpio_mouse.h>
- 
- #include <video/atmel_lcdc.h>
- 
-@@ -27,17 +30,48 @@
- 
- #include "atstk1000.h"
- 
--#define	SW2_DEFAULT		/* MMCI and UART_A available */
- 
- struct eth_addr {
- 	u8 addr[6];
- };
- 
- static struct eth_addr __initdata hw_addr[2];
--static struct eth_platform_data __initdata eth_data[2];
-+static struct eth_platform_data __initdata eth_data[2] = {
-+	{
-+		/*
-+		 * The MDIO pullups on STK1000 are a bit too weak for
-+		 * the autodetection to work properly, so we have to
-+		 * mask out everything but the correct address.
-+		 */
-+		.phy_mask	= ~(1U << 16),
-+	},
-+	{
-+		.phy_mask	= ~(1U << 17),
-+	},
-+};
- 
-+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
-+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
-+static struct at73c213_board_info at73c213_data = {
-+	.ssc_id		= 0,
-+	.shortname	= "AVR32 STK1000 external DAC",
-+};
-+#endif
-+#endif
-+
-+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
- static struct spi_board_info spi0_board_info[] __initdata = {
-+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
- 	{
-+		/* AT73C213 */
-+		.modalias	= "at73c213",
-+		.max_speed_hz	= 200000,
-+		.chip_select	= 0,
-+		.mode		= SPI_MODE_1,
-+		.platform_data	= &at73c213_data,
-+	},
-+#endif
-+	{
- 		/* QVGA display */
- 		.modalias	= "ltv350qv",
- 		.max_speed_hz	= 16000000,
-@@ -45,7 +79,62 @@
- 		.mode		= SPI_MODE_3,
- 	},
- };
-+#endif
- 
-+#ifdef CONFIG_BOARD_ATSTK1002_SPI1
-+static struct spi_board_info spi1_board_info[] __initdata = { {
-+	/* patch in custom entries here */
-+} };
-+#endif
-+
-+static struct mci_platform_data __initdata mci0_data = {
-+	.detect_pin	= GPIO_PIN_NONE,
-+	.wp_pin		= GPIO_PIN_NONE,
-+};
-+
-+#ifdef CONFIG_BOARD_ATSTK1002_GPIO_MOUSE
-+static struct gpio_mouse_platform_data gpio_mouse0_data = {
-+	.polarity	= GPIO_MOUSE_POLARITY_ACT_LOW,
-+	{
-+		{
-+			.up		= GPIO_PIN_PB(2),
-+			.down		= GPIO_PIN_PB(1),
-+			.left		= GPIO_PIN_PB(3),
-+			.right		= GPIO_PIN_PB(0),
-+			.bleft		= GPIO_PIN_PB(7),
-+			.bmiddle	= GPIO_PIN_PB(6),
-+			.bright		= GPIO_PIN_PB(5),
-+		},
-+	},
-+	.scan_ms	= 10,
-+};
-+
-+static struct platform_device gpio_mouse0_device = {
-+	.name		= "gpio_mouse",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data = &gpio_mouse0_data,
-+	},
-+};
-+
-+static void __init add_device_gpio_mouse0(void)
-+{
-+	struct platform_device *pdev = &gpio_mouse0_device;
-+	struct gpio_mouse_platform_data *data = pdev->dev.platform_data;
-+
-+	at32_select_gpio(data->up, 0);
-+	at32_select_gpio(data->down, 0);
-+	at32_select_gpio(data->left, 0);
-+	at32_select_gpio(data->right, 0);
-+
-+	at32_select_gpio(data->bleft, 0);
-+	at32_select_gpio(data->bmiddle, 0);
-+	at32_select_gpio(data->bright, 0);
-+
-+	platform_device_register(pdev);
-+}
-+#endif
-+
- /*
-  * The next two functions should go away as the boot loader is
-  * supposed to initialize the macb address registers with a valid
-@@ -101,12 +190,103 @@
- 	clk_put(pclk);
- }
- 
-+#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
-+
-+static struct gpio_led stk_j2_led[] = {
-+#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
-+#define LEDSTRING "J2 jumpered to LED8"
-+	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
-+	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
-+	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
-+	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
-+	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
-+	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
-+	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
-+	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
-+			.default_trigger = "heartbeat", },
-+#else	/* RGB */
-+#define LEDSTRING "J2 jumpered to RGB LEDs"
-+	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
-+	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
-+	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
-+
-+	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
-+			.default_trigger = "heartbeat", },
-+	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
-+	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
-+			.default_trigger = "heartbeat", },
-+	/* PB16, PB30 unused */
-+#endif
-+};
-+
-+static struct gpio_led_platform_data stk_j2_led_data = {
-+	.num_leds	= ARRAY_SIZE(stk_j2_led),
-+	.leds		= stk_j2_led,
-+};
-+
-+static struct platform_device stk_j2_led_dev = {
-+	.name		= "leds-gpio",
-+	.id		= 2,	/* gpio block J2 */
-+	.dev		= {
-+		.platform_data	= &stk_j2_led_data,
-+	},
-+};
-+
-+static void setup_j2_leds(void)
-+{
-+	unsigned	i;
-+
-+	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
-+		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
-+
-+	printk("STK1002: " LEDSTRING "\n");
-+	platform_device_register(&stk_j2_led_dev);
-+}
-+
-+#else
-+static void setup_j2_leds(void)
-+{
-+}
-+#endif
-+
-+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
-+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
-+static void __init at73c213_set_clk(struct at73c213_board_info *info)
-+{
-+	struct clk *gclk;
-+	struct clk *pll;
-+
-+	gclk = clk_get(NULL, "gclk0");
-+	if (IS_ERR(gclk))
-+		goto err_gclk;
-+	pll = clk_get(NULL, "pll0");
-+	if (IS_ERR(pll))
-+		goto err_pll;
-+
-+	if (clk_set_parent(gclk, pll)) {
-+		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
-+		goto err_set_clk;
-+	}
-+
-+	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
-+	info->dac_clk = gclk;
-+
-+err_set_clk:
-+	clk_put(pll);
-+err_pll:
-+	clk_put(gclk);
-+err_gclk:
-+	return;
-+}
-+#endif
-+#endif
-+
- void __init setup_board(void)
- {
--#ifdef	SW2_DEFAULT
-+#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
-+	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
-+#else
- 	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
--#else
--	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
- #endif
- 	/* USART 2/unused: expansion connector */
- 	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
-@@ -140,19 +320,51 @@
- 
- 	at32_add_system_devices();
- 
--#ifdef	SW2_DEFAULT
-+#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
-+	at32_add_device_usart(1);
-+#else
- 	at32_add_device_usart(0);
--#else
--	at32_add_device_usart(1);
- #endif
- 	at32_add_device_usart(2);
- 
-+#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
- 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
--
--	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-+#endif
-+#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
-+	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
-+#else
- 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
- 			     fbmem_start, fbmem_size);
-+#endif
- 
-+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
-+	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-+#endif
-+#ifdef CONFIG_BOARD_ATSTK1002_SPI1
-+	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
-+#endif
-+	at32_add_device_twi(0);
-+#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
-+	at32_add_device_mci(0, &mci0_data);
-+#endif
-+	at32_add_device_usba(0, NULL);
-+	at32_add_device_abdac(0);
-+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
-+	at32_add_device_ssc(0, ATMEL_SSC_TX);
-+#endif
-+
-+	setup_j2_leds();
-+
-+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
-+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
-+	at73c213_set_clk(&at73c213_data);
-+#endif
-+#endif
-+
-+#ifdef CONFIG_BOARD_ATSTK1002_GPIO_MOUSE
-+	add_device_gpio_mouse0();
-+#endif
-+
- 	return 0;
- }
- postcore_initcall(atstk1002_init);
-Index: linux-2.6.22.1/arch/avr32/Makefile
-===================================================================
---- linux-2.6.22.1/arch/avr32/Makefile	(revision 1)
-+++ linux-2.6.22.1/arch/avr32/Makefile	(arbetskopia)
-@@ -31,6 +31,7 @@
- core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
- core-y					+= arch/avr32/kernel/
- core-y					+= arch/avr32/mm/
-+drivers-y				+= arch/avr32/drivers/
- libs-y					+= arch/avr32/lib/
- 
- archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
-Index: linux-2.6.22.1/arch/avr32/drivers/dw-dmac.h
-===================================================================
---- linux-2.6.22.1/arch/avr32/drivers/dw-dmac.h	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/drivers/dw-dmac.h	(revision 0)
-@@ -0,0 +1,42 @@
-+/*
-+ * Driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __AVR32_DW_DMAC_H__
-+#define __AVR32_DW_DMAC_H__
-+
-+#define DW_DMAC_CFG		0x398
-+#define DW_DMAC_CH_EN		0x3a0
-+
-+#define DW_DMAC_STATUS_XFER	0x2e8
-+#define DW_DMAC_STATUS_BLOCK	0x2f0
-+#define DW_DMAC_STATUS_ERROR	0x308
-+
-+#define DW_DMAC_MASK_XFER	0x310
-+#define DW_DMAC_MASK_BLOCK	0x318
-+#define DW_DMAC_MASK_ERROR	0x330
-+
-+#define DW_DMAC_CLEAR_XFER	0x338
-+#define DW_DMAC_CLEAR_BLOCK	0x340
-+#define DW_DMAC_CLEAR_ERROR	0x358
-+
-+#define DW_DMAC_STATUS_INT	0x360
-+
-+#define DW_DMAC_CHAN_SAR	0x000
-+#define DW_DMAC_CHAN_DAR	0x008
-+#define DW_DMAC_CHAN_LLP	0x010
-+#define DW_DMAC_CHAN_CTL	0x018
-+#define DW_DMAC_CHAN_SSTAT	0x020
-+#define DW_DMAC_CHAN_DSTAT	0x028
-+#define DW_DMAC_CHAN_SSTATAR	0x030
-+#define DW_DMAC_CHAN_DSTATAR	0x038
-+#define DW_DMAC_CHAN_CFG	0x040
-+#define DW_DMAC_CHAN_SGR	0x048
-+#define DW_DMAC_CHAN_DSR	0x050
-+
-+#endif /* __AVR32_DW_DMAC_H__ */
-Index: linux-2.6.22.1/arch/avr32/drivers/Makefile
-===================================================================
---- linux-2.6.22.1/arch/avr32/drivers/Makefile	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/drivers/Makefile	(revision 0)
-@@ -0,0 +1 @@
-+obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
-Index: linux-2.6.22.1/arch/avr32/drivers/dw-dmac.c
-===================================================================
---- linux-2.6.22.1/arch/avr32/drivers/dw-dmac.c	(revision 0)
-+++ linux-2.6.22.1/arch/avr32/drivers/dw-dmac.c	(revision 0)
-@@ -0,0 +1,761 @@
-+/*
-+ * Driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/dma-controller.h>
-+#include <asm/io.h>
-+
-+#include "dw-dmac.h"
-+
-+#define DMAC_NR_CHANNELS 3
-+#define DMAC_MAX_BLOCKSIZE 4095
-+
-+enum {
-+	CH_STATE_FREE = 0,
-+	CH_STATE_ALLOCATED,
-+	CH_STATE_BUSY,
-+};
-+
-+struct dw_dma_lli {
-+	dma_addr_t	sar;
-+	dma_addr_t	dar;
-+	dma_addr_t	llp;
-+	u32		ctllo;
-+	u32		ctlhi;
-+	u32		sstat;
-+	u32		dstat;
-+};
-+
-+struct dw_dma_block {
-+	struct dw_dma_lli *lli_vaddr;
-+	dma_addr_t lli_dma_addr;
-+};
-+
-+struct dw_dma_channel {
-+	unsigned int state;
-+        int is_cyclic;
-+	struct dma_request_sg *req_sg;
-+	struct dma_request_cyclic *req_cyclic;
-+	unsigned int nr_blocks;
-+	int direction;
-+	struct dw_dma_block *block;
-+};
-+
-+struct dw_dma_controller {
-+	spinlock_t lock;
-+	void * __iomem	regs;
-+	struct dma_pool *lli_pool;
-+	struct clk *hclk;
-+	struct dma_controller dma;
-+	struct dw_dma_channel channel[DMAC_NR_CHANNELS];
-+};
-+#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma)
-+
-+#define dmac_writel_hi(dmac, reg, value) \
-+	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4)
-+#define dmac_readl_hi(dmac, reg) \
-+	__raw_readl((dmac)->regs + DW_DMAC_##reg + 4)
-+#define dmac_writel_lo(dmac, reg, value) \
-+	__raw_writel((value), (dmac)->regs + DW_DMAC_##reg)
-+#define dmac_readl_lo(dmac, reg) \
-+	__raw_readl((dmac)->regs + DW_DMAC_##reg)
-+#define dmac_chan_writel_hi(dmac, chan, reg, value) \
-+	__raw_writel((value), ((dmac)->regs + 0x58 * (chan) \
-+			       + DW_DMAC_CHAN_##reg + 4))
-+#define dmac_chan_readl_hi(dmac, chan, reg) \
-+	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4)
-+#define dmac_chan_writel_lo(dmac, chan, reg, value) \
-+	__raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
-+#define dmac_chan_readl_lo(dmac, chan, reg) \
-+	__raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg)
-+#define set_channel_bit(dmac, reg, chan) \
-+	dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8)))
-+#define clear_channel_bit(dmac, reg, chan) \
-+	dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8)))
-+
-+static int dmac_alloc_channel(struct dma_controller *_dmac)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+	struct dw_dma_channel *chan;
-+	unsigned long flags;
-+	int i;
-+
-+	spin_lock_irqsave(&dmac->lock, flags);
-+	for (i = 0; i < DMAC_NR_CHANNELS; i++)
-+		if (dmac->channel[i].state == CH_STATE_FREE)
-+			break;
-+
-+	if (i < DMAC_NR_CHANNELS) {
-+		chan = &dmac->channel[i];
-+		chan->state = CH_STATE_ALLOCATED;
-+	} else {
-+		i = -EBUSY;
-+	}
-+
-+	spin_unlock_irqrestore(&dmac->lock, flags);
-+
-+	return i;
-+}
-+
-+static void dmac_release_channel(struct dma_controller *_dmac, int channel)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+
-+	BUG_ON(channel >= DMAC_NR_CHANNELS
-+	       || dmac->channel[channel].state != CH_STATE_ALLOCATED);
-+
-+	dmac->channel[channel].state = CH_STATE_FREE;
-+}
-+
-+static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac,
-+					    unsigned int nr_blocks)
-+{
-+	struct dw_dma_block *block;
-+	void *p;
-+	unsigned int i;
-+
-+	block = kmalloc(nr_blocks * sizeof(*block),
-+			GFP_KERNEL);
-+	if (unlikely(!block))
-+		return NULL;
-+
-+	for (i = 0; i < nr_blocks; i++) {
-+		p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL,
-+				   &block[i].lli_dma_addr);
-+		block[i].lli_vaddr = p;
-+		if (unlikely(!p))
-+			goto fail;
-+	}
-+
-+	return block;
-+
-+fail:
-+	for (i = 0; i < nr_blocks; i++) {
-+		if (!block[i].lli_vaddr)
-+			break;
-+		dma_pool_free(dmac->lli_pool, block[i].lli_vaddr,
-+			      block[i].lli_dma_addr);
-+	}
-+	kfree(block);
-+	return NULL;
-+}
-+
-+static void cleanup_channel(struct dw_dma_controller *dmac,
-+			    struct dw_dma_channel *chan)
-+{
-+	unsigned int i;
-+
-+	if (chan->nr_blocks > 1) {
-+		for (i = 0; i < chan->nr_blocks; i++)
-+			dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr,
-+				      chan->block[i].lli_dma_addr);
-+		kfree(chan->block);
-+	}
-+
-+	chan->state = CH_STATE_ALLOCATED;
-+}
-+
-+static int dmac_prepare_request_sg(struct dma_controller *_dmac,
-+				   struct dma_request_sg *req)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+	struct dw_dma_channel *chan;
-+	unsigned long ctlhi, ctllo, cfghi, cfglo;
-+	unsigned long block_size;
-+	unsigned int nr_blocks;
-+	int ret, i, direction;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dmac->lock, flags);
-+
-+	ret = -EINVAL;
-+	if (req->req.channel >= DMAC_NR_CHANNELS
-+	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
-+	    || req->block_size > DMAC_MAX_BLOCKSIZE) {
-+		spin_unlock_irqrestore(&dmac->lock, flags);
-+		return -EINVAL;
-+	}
-+
-+	chan = &dmac->channel[req->req.channel];
-+	chan->state = CH_STATE_BUSY;
-+	chan->req_sg = req;
-+	chan->is_cyclic = 0;
-+
-+	/*
-+	 * We have marked the channel as busy, so no need to keep the
-+	 * lock as long as we only touch the channel-specific
-+	 * registers
-+	 */
-+	spin_unlock_irqrestore(&dmac->lock, flags);
-+
-+	/*
-+	 * There may be limitations in the driver and/or the DMA
-+	 * controller that prevents us from sending a whole
-+	 * scatterlist item in one go.  Taking this into account,
-+	 * calculate the number of block transfers we need to set up.
-+	 *
-+	 * FIXME: Let the peripheral driver know about the maximum
-+	 * block size we support. We really don't want to use a
-+	 * different block size than what was suggested by the
-+	 * peripheral.
-+	 *
-+	 * Each block will get its own Linked List Item (LLI) below.
-+	 */
-+	block_size = req->block_size;
-+	nr_blocks = req->nr_blocks;
-+	pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n",
-+		 block_size, nr_blocks, req->nr_sg);
-+
-+	BUG_ON(nr_blocks == 0);
-+	chan->nr_blocks = nr_blocks;
-+
-+	ret = -EINVAL;
-+	cfglo = cfghi = 0;
-+	switch (req->direction) {
-+	case DMA_DIR_MEM_TO_PERIPH:
-+		direction = DMA_TO_DEVICE;
-+		cfghi = req->periph_id << (43 - 32);
-+		break;
-+
-+	case DMA_DIR_PERIPH_TO_MEM:
-+		direction = DMA_FROM_DEVICE;
-+		cfghi = req->periph_id << (39 - 32);
-+		break;
-+	default:
-+		goto out_unclaim_channel;
-+	}
-+
-+        chan->direction = direction;
-+
-+	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
-+	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
-+
-+	ctlhi = block_size >> req->width;
-+	ctllo = ((req->direction << 20)
-+		 // | (1 << 14) | (1 << 11) // source/dest burst trans len
-+		 | (req->width << 4) | (req->width << 1)
-+		 | (1 << 0));		 // interrupt enable
-+
-+	if (nr_blocks == 1) {
-+		/* Only one block: No need to use block chaining */
-+		if (direction == DMA_TO_DEVICE) {
-+			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
-+					    req->sg->dma_address);
-+			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
-+					    req->data_reg);
-+			ctllo |= 2 << 7; // no dst increment
-+		} else {
-+			dmac_chan_writel_lo(dmac, req->req.channel, SAR,
-+					    req->data_reg);
-+			dmac_chan_writel_lo(dmac, req->req.channel, DAR,
-+					    req->sg->dma_address);
-+			ctllo |= 2 << 9; // no src increment
-+		}
-+		dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo);
-+		dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi);
-+		pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo);
-+	} else {
-+		struct dw_dma_lli *lli, *lli_prev = NULL;
-+		int j = 0, offset = 0;
-+
-+		ret = -ENOMEM;
-+		chan->block = allocate_blocks(dmac, nr_blocks);
-+		if (!chan->block)
-+			goto out_unclaim_channel;
-+
-+		if (direction == DMA_TO_DEVICE)
-+			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
-+		else
-+			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
-+
-+		/*
-+		 * Map scatterlist items to blocks. One scatterlist
-+		 * item may need more than one block for the reasons
-+		 * mentioned above.
-+		 */
-+		for (i = 0; i < nr_blocks; i++) {
-+			lli = chan->block[i].lli_vaddr;
-+			if (lli_prev) {
-+				lli_prev->llp = chan->block[i].lli_dma_addr;
-+				pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+					 i - 1, chan->block[i - 1].lli_vaddr,
-+					 chan->block[i - 1].lli_dma_addr,
-+					 lli_prev->sar, lli_prev->dar, lli_prev->llp,
-+					 lli_prev->ctllo, lli_prev->ctlhi);
-+			}
-+			lli->llp = 0;
-+			lli->ctllo = ctllo;
-+			lli->ctlhi = ctlhi;
-+			if (direction == DMA_TO_DEVICE) {
-+				lli->sar = req->sg[j].dma_address + offset;
-+				lli->dar = req->data_reg;
-+			} else {
-+				lli->sar = req->data_reg;
-+				lli->dar = req->sg[j].dma_address + offset;
-+			}
-+			lli_prev = lli;
-+
-+			offset += block_size;
-+			if (offset > req->sg[j].length) {
-+				j++;
-+				offset = 0;
-+			}
-+		}
-+
-+		pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+			 i - 1, chan->block[i - 1].lli_vaddr,
-+			 chan->block[i - 1].lli_dma_addr, lli_prev->sar,
-+			 lli_prev->dar, lli_prev->llp,
-+			 lli_prev->ctllo, lli_prev->ctlhi);
-+
-+		/*
-+		 * SAR, DAR and CTL are initialized from the LLI. We
-+		 * only have to enable the LLI bits in CTL.
-+		 */
-+		dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0);
-+		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
-+				    chan->block[0].lli_dma_addr);
-+		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
-+	}
-+
-+	set_channel_bit(dmac, MASK_XFER, req->req.channel);
-+	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
-+	if (req->req.block_complete)
-+		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+	else
-+		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+
-+	return 0;
-+
-+out_unclaim_channel:
-+	chan->state = CH_STATE_ALLOCATED;
-+	return ret;
-+}
-+
-+static int dmac_prepare_request_cyclic(struct dma_controller *_dmac,
-+                                       struct dma_request_cyclic *req)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+	struct dw_dma_channel *chan;
-+	unsigned long ctlhi, ctllo, cfghi, cfglo;
-+	unsigned long block_size;
-+	int ret, i, direction;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dmac->lock, flags);
-+
-+        block_size = (req->buffer_size/req->periods) >> req->width;
-+
-+	ret = -EINVAL;
-+	if (req->req.channel >= DMAC_NR_CHANNELS
-+	    || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED
-+            || (req->periods == 0)
-+	    || block_size > DMAC_MAX_BLOCKSIZE) {
-+		spin_unlock_irqrestore(&dmac->lock, flags);
-+		return -EINVAL;
-+	}
-+
-+	chan = &dmac->channel[req->req.channel];
-+	chan->state = CH_STATE_BUSY;
-+	chan->is_cyclic = 1;
-+        chan->req_cyclic = req;
-+
-+	/*
-+	 * We have marked the channel as busy, so no need to keep the
-+	 * lock as long as we only touch the channel-specific
-+	 * registers
-+	 */
-+	spin_unlock_irqrestore(&dmac->lock, flags);
-+
-+	/*
-+          Setup
-+	 */
-+	BUG_ON(req->buffer_size % req->periods);
-+	/* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */
-+
-+	chan->nr_blocks = req->periods;
-+
-+	ret = -EINVAL;
-+	cfglo = cfghi = 0;
-+	switch (req->direction) {
-+	case DMA_DIR_MEM_TO_PERIPH:
-+		direction = DMA_TO_DEVICE;
-+		cfghi = req->periph_id << (43 - 32);
-+		break;
-+
-+	case DMA_DIR_PERIPH_TO_MEM:
-+		direction = DMA_FROM_DEVICE;
-+		cfghi = req->periph_id << (39 - 32);
-+		break;
-+	default:
-+		goto out_unclaim_channel;
-+	}
-+
-+        chan->direction = direction;
-+
-+	dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi);
-+	dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo);
-+
-+	ctlhi = block_size;
-+	ctllo = ((req->direction << 20)
-+		 | (req->width << 4) | (req->width << 1)
-+		 | (1 << 0));		 // interrupt enable
-+
-+        {
-+		struct dw_dma_lli *lli = NULL, *lli_prev = NULL;
-+
-+		ret = -ENOMEM;
-+		chan->block = allocate_blocks(dmac, req->periods);
-+		if (!chan->block)
-+			goto out_unclaim_channel;
-+
-+		if (direction == DMA_TO_DEVICE)
-+			ctllo |= 1 << 28 | 1 << 27 | 2 << 7;
-+		else
-+			ctllo |= 1 << 28 | 1 << 27 | 2 << 9;
-+
-+		/*
-+		 * Set up a linked list items where each period gets
-+		 * an item. The linked list item for the last period
-+		 * points back to the star of the buffer making a
-+		 * cyclic buffer.
-+		 */
-+		for (i = 0; i < req->periods; i++) {
-+			lli = chan->block[i].lli_vaddr;
-+			if (lli_prev) {
-+				lli_prev->llp = chan->block[i].lli_dma_addr;
-+				/* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+				   i - 1, chan->block[i - 1].lli_vaddr,
-+				   chan->block[i - 1].lli_dma_addr,
-+				   lli_prev->sar, lli_prev->dar, lli_prev->llp,
-+				   lli_prev->ctllo, lli_prev->ctlhi);*/
-+			}
-+			lli->llp = 0;
-+			lli->ctllo = ctllo;
-+			lli->ctlhi = ctlhi;
-+			if (direction == DMA_TO_DEVICE) {
-+				lli->sar = req->buffer_start + i*(block_size << req->width);
-+				lli->dar = req->data_reg;
-+			} else {
-+				lli->sar = req->data_reg;
-+				lli->dar = req->buffer_start + i*(block_size << req->width);
-+			}
-+			lli_prev = lli;
-+		}
-+		lli->llp = chan->block[0].lli_dma_addr;
-+
-+		/*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+		  i - 1, chan->block[i - 1].lli_vaddr,
-+		  chan->block[i - 1].lli_dma_addr, lli_prev->sar,
-+		  lli_prev->dar, lli_prev->llp,
-+		  lli_prev->ctllo, lli_prev->ctlhi); */
-+
-+		/*
-+		 * SAR, DAR and CTL are initialized from the LLI. We
-+		 * only have to enable the LLI bits in CTL.
-+		 */
-+		dmac_chan_writel_lo(dmac, req->req.channel, LLP,
-+				    chan->block[0].lli_dma_addr);
-+		dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27);
-+	}
-+
-+	clear_channel_bit(dmac, MASK_XFER, req->req.channel);
-+	set_channel_bit(dmac, MASK_ERROR, req->req.channel);
-+	if (req->req.block_complete)
-+		set_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+	else
-+		clear_channel_bit(dmac, MASK_BLOCK, req->req.channel);
-+
-+	return 0;
-+
-+out_unclaim_channel:
-+	chan->state = CH_STATE_ALLOCATED;
-+	return ret;
-+}
-+
-+static int dmac_start_request(struct dma_controller *_dmac,
-+			      unsigned int channel)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+
-+	BUG_ON(channel >= DMAC_NR_CHANNELS);
-+
-+	set_channel_bit(dmac, CH_EN, channel);
-+
-+	return 0;
-+}
-+
-+static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac,
-+                                       unsigned int channel)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+	struct dw_dma_channel *chan;
-+        dma_addr_t current_pos;
-+
-+	BUG_ON(channel >= DMAC_NR_CHANNELS);
-+
-+        chan = &dmac->channel[channel];
-+
-+	switch (chan->direction) {
-+	case DMA_TO_DEVICE:
-+		current_pos = dmac_chan_readl_lo(dmac, channel, SAR);
-+		break;
-+	case DMA_FROM_DEVICE:
-+		current_pos = dmac_chan_readl_lo(dmac, channel, DAR);
-+		break;
-+	default:
-+		return 0;
-+	}
-+
-+
-+        if (!current_pos) {
-+		if (chan->is_cyclic) {
-+			current_pos = chan->req_cyclic->buffer_start;
-+		} else {
-+			current_pos = chan->req_sg->sg->dma_address;
-+		}
-+	}
-+
-+	return current_pos;
-+}
-+
-+
-+static int dmac_stop_request(struct dma_controller *_dmac,
-+                             unsigned int channel)
-+{
-+	struct dw_dma_controller *dmac = to_dw_dmac(_dmac);
-+	struct dw_dma_channel *chan;
-+
-+	BUG_ON(channel >= DMAC_NR_CHANNELS);
-+
-+	chan = &dmac->channel[channel];
-+	pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n",
-+		 chan->state, dmac_chan_readl_lo(dmac, channel, SAR),
-+		 dmac_chan_readl_lo(dmac, channel, DAR),
-+		 dmac_chan_readl_lo(dmac, channel, LLP),
-+		 dmac_chan_readl_hi(dmac, channel, CTL),
-+		 dmac_chan_readl_lo(dmac, channel, CTL));
-+
-+	if (chan->state == CH_STATE_BUSY) {
-+		clear_channel_bit(dmac, CH_EN, channel);
-+		cleanup_channel(dmac, &dmac->channel[channel]);
-+	}
-+
-+	return 0;
-+}
-+
-+
-+static void dmac_block_complete(struct dw_dma_controller *dmac)
-+{
-+	struct dw_dma_channel *chan;
-+	unsigned long status, chanid;
-+
-+	status = dmac_readl_lo(dmac, STATUS_BLOCK);
-+
-+	while (status) {
-+		struct dma_request *req;
-+		chanid = __ffs(status);
-+		chan = &dmac->channel[chanid];
-+
-+                if (chan->is_cyclic) {
-+			BUG_ON(!chan->req_cyclic
-+			       || !chan->req_cyclic->req.block_complete);
-+			req = &chan->req_cyclic->req;
-+                } else {
-+			BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete);
-+			req = &chan->req_sg->req;
-+                }
-+		dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid);
-+		req->block_complete(req);
-+		status = dmac_readl_lo(dmac, STATUS_BLOCK);
-+	}
-+}
-+
-+static void dmac_xfer_complete(struct dw_dma_controller *dmac)
-+{
-+	struct dw_dma_channel *chan;
-+	struct dma_request *req;
-+	unsigned long status, chanid;
-+
-+	status = dmac_readl_lo(dmac, STATUS_XFER);
-+
-+	while (status) {
-+		chanid = __ffs(status);
-+		chan = &dmac->channel[chanid];
-+
-+		dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid);
-+
-+                req = &chan->req_sg->req;
-+                BUG_ON(!req);
-+                cleanup_channel(dmac, chan);
-+                if (req->xfer_complete)
-+			req->xfer_complete(req);
-+
-+		status = dmac_readl_lo(dmac, STATUS_XFER);
-+	}
-+}
-+
-+static void dmac_error(struct dw_dma_controller *dmac)
-+{
-+	struct dw_dma_channel *chan;
-+	unsigned long status, chanid;
-+
-+	status = dmac_readl_lo(dmac, STATUS_ERROR);
-+
-+	while (status) {
-+		struct dma_request *req;
-+
-+		chanid = __ffs(status);
-+		chan = &dmac->channel[chanid];
-+
-+		dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid);
-+		clear_channel_bit(dmac, CH_EN, chanid);
-+
-+                if (chan->is_cyclic) {
-+			BUG_ON(!chan->req_cyclic);
-+			req = &chan->req_cyclic->req;
-+                } else {
-+			BUG_ON(!chan->req_sg);
-+			req = &chan->req_sg->req;
-+                }
-+
-+		cleanup_channel(dmac, chan);
-+		if (req->error)
-+			req->error(req);
-+
-+		status = dmac_readl_lo(dmac, STATUS_XFER);
-+	}
-+}
-+
-+static irqreturn_t dmac_interrupt(int irq, void *dev_id)
-+{
-+	struct dw_dma_controller *dmac = dev_id;
-+	unsigned long status;
-+	int ret = IRQ_NONE;
-+
-+	spin_lock(&dmac->lock);
-+
-+	status = dmac_readl_lo(dmac, STATUS_INT);
-+
-+	while (status) {
-+		ret = IRQ_HANDLED;
-+		if (status & 0x10)
-+			dmac_error(dmac);
-+		if (status & 0x02)
-+			dmac_block_complete(dmac);
-+		if (status & 0x01)
-+			dmac_xfer_complete(dmac);
-+
-+		status = dmac_readl_lo(dmac, STATUS_INT);
-+	}
-+
-+	spin_unlock(&dmac->lock);
-+	return ret;
-+}
-+
-+static int __devinit dmac_probe(struct platform_device *pdev)
-+{
-+	struct dw_dma_controller *dmac;
-+	struct resource *regs;
-+	int ret;
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs)
-+		return -ENXIO;
-+
-+	dmac = kmalloc(sizeof(*dmac), GFP_KERNEL);
-+	if (!dmac)
-+		return -ENOMEM;
-+	memset(dmac, 0, sizeof(*dmac));
-+
-+	dmac->hclk = clk_get(&pdev->dev, "hclk");
-+	if (IS_ERR(dmac->hclk)) {
-+		ret = PTR_ERR(dmac->hclk);
-+		goto out_free_dmac;
-+	}
-+	clk_enable(dmac->hclk);
-+
-+	ret = -ENOMEM;
-+	dmac->lli_pool = dma_pool_create("dmac", &pdev->dev,
-+					 sizeof(struct dw_dma_lli), 4, 0);
-+	if (!dmac->lli_pool)
-+		goto out_disable_clk;
-+
-+	spin_lock_init(&dmac->lock);
-+	dmac->dma.dev = &pdev->dev;
-+	dmac->dma.alloc_channel = dmac_alloc_channel;
-+	dmac->dma.release_channel = dmac_release_channel;
-+	dmac->dma.prepare_request_sg = dmac_prepare_request_sg;
-+	dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic;
-+	dmac->dma.start_request = dmac_start_request;
-+	dmac->dma.stop_request = dmac_stop_request;
-+	dmac->dma.get_current_pos = dmac_get_current_pos;
-+
-+	dmac->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!dmac->regs)
-+		goto out_free_pool;
-+
-+	ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt,
-+			  IRQF_SAMPLE_RANDOM, pdev->name, dmac);
-+	if (ret)
-+		goto out_unmap_regs;
-+
-+	/* Enable the DMA controller */
-+	dmac_writel_lo(dmac, CFG, 1);
-+
-+	register_dma_controller(&dmac->dma);
-+
-+	printk(KERN_INFO
-+	       "dmac%d: DesignWare DMA controller at 0x%p irq %d\n",
-+	       dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0));
-+
-+	return 0;
-+
-+out_unmap_regs:
-+	iounmap(dmac->regs);
-+out_free_pool:
-+	dma_pool_destroy(dmac->lli_pool);
-+out_disable_clk:
-+	clk_disable(dmac->hclk);
-+	clk_put(dmac->hclk);
-+out_free_dmac:
-+	kfree(dmac);
-+	return ret;
-+}
-+
-+static struct platform_driver dmac_driver = {
-+	.probe		= dmac_probe,
-+	.driver		= {
-+		.name		= "dmaca",
-+	},
-+};
-+
-+static int __init dmac_init(void)
-+{
-+	return platform_driver_register(&dmac_driver);
-+}
-+subsys_initcall(dmac_init);
-+
-+static void __exit dmac_exit(void)
-+{
-+	platform_driver_unregister(&dmac_driver);
-+}
-+module_exit(dmac_exit);
-+
-+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/serial/atmel_serial.c
-===================================================================
---- linux-2.6.22.1/drivers/serial/atmel_serial.c	(revision 1)
-+++ linux-2.6.22.1/drivers/serial/atmel_serial.c	(arbetskopia)
-@@ -7,6 +7,8 @@
-  *  Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
-  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
-  *
-+ *  DMA support added by Chip Coldwell.
-+ *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-  * the Free Software Foundation; either version 2 of the License, or
-@@ -33,6 +35,7 @@
- #include <linux/sysrq.h>
- #include <linux/tty_flip.h>
- #include <linux/platform_device.h>
-+#include <linux/dma-mapping.h>
- #include <linux/atmel_pdc.h>
- 
- #include <asm/io.h>
-@@ -47,6 +50,11 @@
- 
- #include "atmel_serial.h"
- 
-+#define SUPPORT_PDC
-+#define PDC_BUFFER_SIZE		(L1_CACHE_BYTES << 3)
-+#warning "Revisit"
-+#define PDC_RX_TIMEOUT		(3 * 10)		/* 3 bytes */
-+
- #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
- #define SUPPORT_SYSRQ
- #endif
-@@ -107,6 +115,13 @@
- static int (*atmel_open_hook)(struct uart_port *);
- static void (*atmel_close_hook)(struct uart_port *);
- 
-+struct atmel_dma_buffer {
-+	unsigned char	*buf;
-+	dma_addr_t	dma_addr;
-+	size_t		dma_size;
-+	unsigned int	ofs;
-+};
-+
- /*
-  * We wrap our port structure around the generic uart_port.
-  */
-@@ -114,10 +129,21 @@
- 	struct uart_port	uart;		/* uart */
- 	struct clk		*clk;		/* uart clock */
- 	unsigned short		suspended;	/* is port suspended? */
-+	int			break_active;	/* break being received */
-+
-+	short			use_dma_rx;	/* enable PDC receiver */
-+	short			pdc_rx_idx;	/* current PDC RX buffer */
-+	struct atmel_dma_buffer	pdc_rx[2];	/* PDC receier */
-+
-+	short			use_dma_tx;	/* enable PDC transmitter */
-+	struct atmel_dma_buffer	pdc_tx;		/* PDC transmitter */
- };
- 
- static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
- 
-+#define PDC_RX_BUF(port)	&(port)->pdc_rx[(port)->pdc_rx_idx]
-+#define PDC_RX_SWITCH(port)	(port)->pdc_rx_idx = !(port)->pdc_rx_idx
-+
- #ifdef SUPPORT_SYSRQ
- static struct console atmel_console;
- #endif
-@@ -205,7 +231,12 @@
- {
- 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 
--	UART_PUT_IDR(port, ATMEL_US_TXRDY);
-+	if (atmel_port->use_dma_tx) {
-+		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);		/* disable PDC transmit */
-+		UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
-+	}
-+	else
-+		UART_PUT_IDR(port, ATMEL_US_TXRDY);
- }
- 
- /*
-@@ -215,7 +246,17 @@
- {
- 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 
--	UART_PUT_IER(port, ATMEL_US_TXRDY);
-+	if (atmel_port->use_dma_tx) {
-+		if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
-+			/* The transmitter is already running.  Yes, we
-+			   really need this.*/
-+			return;
-+
-+		UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
-+		UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);		/* re-enable PDC transmit */
-+	}
-+	else
-+		UART_PUT_IER(port, ATMEL_US_TXRDY);
- }
- 
- /*
-@@ -225,7 +266,12 @@
- {
- 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 
--	UART_PUT_IDR(port, ATMEL_US_RXRDY);
-+	if (atmel_port->use_dma_rx) {
-+		UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);		/* disable PDC receive */
-+		UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
-+	}
-+	else
-+		UART_PUT_IDR(port, ATMEL_US_RXRDY);
- }
- 
- /*
-@@ -248,10 +294,139 @@
- }
- 
- /*
-+ * Receive data via the PDC.  A buffer has been fulled.
-+ */
-+static void atmel_pdc_endrx(struct uart_port *port)
-+{
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+	struct tty_struct *tty = port->info->tty;
-+	struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
-+	unsigned int count;
-+
-+	count = pdc->dma_size - pdc->ofs;
-+	if (likely(count > 0)) {
-+		dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
-+		tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
-+		tty_flip_buffer_push(tty);
-+
-+		port->icount.rx += count;
-+	}
-+
-+	/* Set this buffer as the next receive buffer */
-+	pdc->ofs = 0;
-+	UART_PUT_RNPR(port, pdc->dma_addr);
-+	UART_PUT_RNCR(port, pdc->dma_size);
-+
-+	/* Switch to next buffer */
-+	PDC_RX_SWITCH(atmel_port);		/* next PDC buffer */
-+}
-+
-+/*
-+ * Receive data via the PDC.  At least one byte was received, but the
-+ * buffer was not full when the inter-character timeout expired.
-+ */
-+static void atmel_pdc_timeout(struct uart_port *port)
-+{
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+	struct tty_struct *tty = port->info->tty;
-+	struct atmel_dma_buffer *pdc = PDC_RX_BUF(atmel_port);
-+	/* unsigned */ int ofs, count;
-+
-+	ofs = UART_GET_RPR(port) - pdc->dma_addr;	/* current DMA adress */
-+	count = ofs - pdc->ofs;
-+
-+	if (likely(count > 0)) {
-+		dma_sync_single_for_cpu(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
-+		tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
-+		tty_flip_buffer_push(tty);
-+
-+		pdc->ofs = ofs;
-+		port->icount.rx += count;
-+	}
-+
-+	/* reset the UART timeout */
-+	UART_PUT_CR(port, ATMEL_US_STTTO);
-+}
-+
-+/*
-+ * Deal with parity, framing and overrun errors.
-+ */
-+static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
-+{
-+	/* clear error */
-+	UART_PUT_CR(port, ATMEL_US_RSTSTA);
-+
-+	if (status & ATMEL_US_RXBRK) {
-+		status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);	/* ignore side-effect */
-+		port->icount.brk++;
-+	}
-+	if (status & ATMEL_US_PARE)
-+		port->icount.parity++;
-+	if (status & ATMEL_US_FRAME)
-+		port->icount.frame++;
-+	if (status & ATMEL_US_OVRE)
-+		port->icount.overrun++;
-+}
-+
-+/*
-+ * A transmission via the PDC is complete.
-+ */
-+static void atmel_pdc_endtx(struct uart_port *port)
-+{
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+	struct circ_buf *xmit = &port->info->xmit;
-+	struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+
-+	xmit->tail += pdc->ofs;
-+	if (xmit->tail >= SERIAL_XMIT_SIZE)
-+		xmit->tail -= SERIAL_XMIT_SIZE;
-+
-+	port->icount.tx += pdc->ofs;
-+	pdc->ofs = 0;
-+
-+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
-+		uart_write_wakeup(port);
-+}
-+
-+/*
-+ * The PDC transmitter is idle, so either start the next transfer or
-+ * disable the transmitter.
-+ */
-+static void atmel_pdc_txbufe(struct uart_port *port)
-+{
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
-+	struct circ_buf *xmit = &port->info->xmit;
-+	struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+	int count;
-+
-+	if (!uart_circ_empty(xmit)) {
-+		/* more to transmit - setup next transfer */
-+		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);			/* disable PDC transmit */
-+		dma_sync_single_for_device(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
-+
-+		if (xmit->tail < xmit->head)
-+			count = xmit->head - xmit->tail;
-+		else
-+			count = SERIAL_XMIT_SIZE - xmit->tail;
-+		pdc->ofs = count;
-+
-+		UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
-+		UART_PUT_TCR(port, count);
-+		UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);			/* re-enable PDC transmit */
-+	}
-+	else {
-+		/* nothing left to transmit - disable the transmitter */
-+		UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);			/* disable PDC transmit */
-+		UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
-+	}
-+}
-+
-+/*
-  * Characters received (called from interrupt handler)
-  */
- static void atmel_rx_chars(struct uart_port *port)
- {
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 	struct tty_struct *tty = port->info->tty;
- 	unsigned int status, ch, flg;
- 
-@@ -267,13 +442,29 @@
- 		 * note that the error handling code is
- 		 * out of the main execution path
- 		 */
--		if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
-+		if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
-+				       | ATMEL_US_OVRE | ATMEL_US_RXBRK)
-+			     || atmel_port->break_active)) {
- 			UART_PUT_CR(port, ATMEL_US_RSTSTA);	/* clear error */
--			if (status & ATMEL_US_RXBRK) {
-+			if (status & ATMEL_US_RXBRK
-+			    && !atmel_port->break_active) {
- 				status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);	/* ignore side-effect */
- 				port->icount.brk++;
-+				atmel_port->break_active = 1;
-+				UART_PUT_IER(port, ATMEL_US_RXBRK);
- 				if (uart_handle_break(port))
- 					goto ignore_char;
-+			} else {
-+				/*
-+				 * This is either the end-of-break
-+				 * condition or we've received at
-+				 * least one character without RXBRK
-+				 * being set. In both cases, the next
-+				 * RXBRK will indicate start-of-break.
-+				 */
-+				UART_PUT_IDR(port, ATMEL_US_RXBRK);
-+				status &= ~ATMEL_US_RXBRK;
-+				atmel_port->break_active = 0;
- 			}
- 			if (status & ATMEL_US_PARE)
- 				port->icount.parity++;
-@@ -349,9 +540,27 @@
- 	status = UART_GET_CSR(port);
- 	pending = status & UART_GET_IMR(port);
- 	while (pending) {
-+		/* PDC receive */
-+		if (pending & ATMEL_US_ENDRX)
-+			atmel_pdc_endrx(port);
-+		if (pending & ATMEL_US_TIMEOUT)
-+			atmel_pdc_timeout(port);
-+		if (atmel_port->use_dma_rx && pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | ATMEL_US_FRAME | ATMEL_US_PARE))
-+			atmel_pdc_rxerr(port, pending);
-+
- 		/* Interrupt receive */
- 		if (pending & ATMEL_US_RXRDY)
- 			atmel_rx_chars(port);
-+		else if (pending & ATMEL_US_RXBRK) {
-+			/*
-+			 * End of break detected. If it came along
-+			 * with a character, atmel_rx_chars will
-+			 * handle it.
-+			 */
-+			UART_PUT_CR(port, ATMEL_US_RSTSTA);
-+			UART_PUT_IDR(port, ATMEL_US_RXBRK);
-+			atmel_port->break_active = 0;
-+		}
- 
- 		// TODO: All reads to CSR will clear these interrupts!
- 		if (pending & ATMEL_US_RIIC) port->icount.rng++;
-@@ -363,6 +572,12 @@
- 		if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
- 			wake_up_interruptible(&port->info->delta_msr_wait);
- 
-+		/* PDC transmit */
-+		if (pending & ATMEL_US_ENDTX)
-+			atmel_pdc_endtx(port);
-+		if (pending & ATMEL_US_TXBUFE)
-+			atmel_pdc_txbufe(port);
-+
- 		/* Interrupt transmit */
- 		if (pending & ATMEL_US_TXRDY)
- 			atmel_tx_chars(port);
-@@ -401,6 +616,47 @@
- 	}
- 
- 	/*
-+	 * Initialize DMA (if necessary)
-+	 */
-+	if (atmel_port->use_dma_rx) {
-+		int i;
-+
-+		for (i = 0; i < 2; i++) {
-+			struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
-+
-+			pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
-+			if (pdc->buf == NULL) {
-+				if (i != 0) {
-+					dma_unmap_single(port->dev, atmel_port->pdc_rx[0].dma_addr, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
-+					kfree(atmel_port->pdc_rx[0].buf);
-+				}
-+				free_irq(port->irq, port);
-+				return -ENOMEM;
-+			}
-+			pdc->dma_addr = dma_map_single(port->dev, pdc->buf, PDC_BUFFER_SIZE, DMA_FROM_DEVICE);
-+			pdc->dma_size = PDC_BUFFER_SIZE;
-+			pdc->ofs = 0;
-+		}
-+
-+		atmel_port->pdc_rx_idx = 0;
-+
-+		UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
-+		UART_PUT_RCR(port, PDC_BUFFER_SIZE);
-+
-+		UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
-+		UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
-+	}
-+	if (atmel_port->use_dma_tx) {
-+		struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+		struct circ_buf *xmit = &port->info->xmit;
-+
-+		pdc->buf = xmit->buf;
-+		pdc->dma_addr = dma_map_single(port->dev, pdc->buf, SERIAL_XMIT_SIZE, DMA_TO_DEVICE);
-+		pdc->dma_size = SERIAL_XMIT_SIZE;
-+		pdc->ofs = 0;
-+	}
-+
-+	/*
- 	 * If there is a specific "open" function (to register
- 	 * control line interrupts)
- 	 */
-@@ -418,8 +674,16 @@
- 	UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
- 	UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);		/* enable xmit & rcvr */
- 
--	UART_PUT_IER(port, ATMEL_US_RXRDY);		/* enable receive only */
-+	if (atmel_port->use_dma_rx) {
-+		UART_PUT_RTOR(port, PDC_RX_TIMEOUT);		/* set UART timeout */
-+		UART_PUT_CR(port, ATMEL_US_STTTO);
- 
-+		UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
-+		UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);		/* enable PDC controller */
-+	}
-+	else
-+		UART_PUT_IER(port, ATMEL_US_RXRDY);		/* enable receive only */
-+
- 	return 0;
- }
- 
-@@ -431,6 +695,31 @@
- 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 
- 	/*
-+	 * Ensure everything is stopped.
-+	 */
-+	atmel_stop_rx(port);
-+	atmel_stop_tx(port);
-+
-+	/*
-+	 * Shut-down the DMA.
-+	 */
-+	if (atmel_port->use_dma_rx) {
-+		int i;
-+
-+		for (i = 0; i < 2; i++) {
-+			struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
-+
-+			dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_FROM_DEVICE);
-+			kfree(pdc->buf);
-+		}
-+	}
-+	if (atmel_port->use_dma_tx) {
-+		struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
-+
-+		dma_unmap_single(port->dev, pdc->dma_addr, pdc->dma_size, DMA_TO_DEVICE);
-+	}
-+
-+	/*
- 	 * Disable all interrupts, port and break condition.
- 	 */
- 	UART_PUT_CR(port, ATMEL_US_RSTSTA);
-@@ -481,6 +770,7 @@
-  */
- static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
- {
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 	unsigned long flags;
- 	unsigned int mode, imr, quot, baud;
- 
-@@ -490,7 +780,7 @@
- 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
- 	quot = uart_get_divisor(port, baud);
- 
--	if (quot > 65535) {		/* BRGR is 16-bit, so switch to slower clock */
-+	if (quot > 65535) {	/* BRGR is 16-bit, so switch to slower clock */
- 		quot /= 8;
- 		mode |= ATMEL_US_USCLKS_MCK_DIV8;
- 	}
-@@ -539,6 +829,9 @@
- 	if (termios->c_iflag & (BRKINT | PARMRK))
- 		port->read_status_mask |= ATMEL_US_RXBRK;
- 
-+	if (atmel_port->use_dma_rx)	/* need to enable error interrupts */
-+		UART_PUT_IER(port, port->read_status_mask);
-+
- 	/*
- 	 * Characters to ignore
- 	 */
-@@ -717,6 +1010,13 @@
- 		clk_enable(atmel_port->clk);
- 		port->uartclk = clk_get_rate(atmel_port->clk);
- 	}
-+
-+#ifdef SUPPORT_PDC
-+	atmel_port->use_dma_rx = data->use_dma_rx;
-+	atmel_port->use_dma_tx = data->use_dma_tx;
-+	if (atmel_port->use_dma_tx)
-+		port->fifosize = PDC_BUFFER_SIZE;
-+#endif
- }
- 
- /*
-@@ -893,7 +1193,8 @@
- 	struct uart_port *port = platform_get_drvdata(pdev);
- 	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 
--	if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
-+	if (device_may_wakeup(&pdev->dev)
-+			&& !clk_must_disable(atmel_port->clk))
- 		enable_irq_wake(port->irq);
- 	else {
- 		uart_suspend_port(&atmel_uart, port);
-Index: linux-2.6.22.1/drivers/mtd/devices/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/mtd/devices/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/mtd/devices/Kconfig	(arbetskopia)
-@@ -269,5 +269,11 @@
- 	  LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
- 	  you have managed to wipe the first block.
- 
-+config MTD_AT91_DATAFLASH
-+	tristate "AT91RM9200 DataFlash AT45DBxxx (legacy driver)"
-+	depends on MTD && ARCH_AT91RM9200 && AT91_SPI
-+	help
-+	  This enables access to the DataFlash (AT45DBxxx) on the AT91RM9200.
-+	  If you have such a board, say 'Y'.
-+
- endmenu
--
-Index: linux-2.6.22.1/drivers/mtd/devices/at91_dataflash.c
-===================================================================
---- linux-2.6.22.1/drivers/mtd/devices/at91_dataflash.c	(revision 0)
-+++ linux-2.6.22.1/drivers/mtd/devices/at91_dataflash.c	(revision 0)
-@@ -0,0 +1,667 @@
-+/*
-+ * Atmel DataFlash driver for Atmel AT91RM9200 (Thunder)
-+ *
-+ *  Copyright (C) SAN People (Pty) Ltd
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+*/
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/slab.h>
-+#include <linux/pci.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+
-+#include <asm/arch/spi.h>
-+
-+#undef DEBUG_DATAFLASH
-+
-+#define DATAFLASH_MAX_DEVICES	4	/* max number of dataflash devices */
-+#undef	DATAFLASH_ALWAYS_ADD_DEVICE	/* always add whole device when using partitions? */
-+
-+#define OP_READ_CONTINUOUS	0xE8
-+#define OP_READ_PAGE		0xD2
-+#define OP_READ_BUFFER1		0xD4
-+#define OP_READ_BUFFER2		0xD6
-+#define OP_READ_STATUS		0xD7
-+
-+#define OP_ERASE_PAGE		0x81
-+#define OP_ERASE_BLOCK		0x50
-+
-+#define OP_TRANSFER_BUF1	0x53
-+#define OP_TRANSFER_BUF2	0x55
-+#define OP_COMPARE_BUF1		0x60
-+#define OP_COMPARE_BUF2		0x61
-+
-+#define OP_PROGRAM_VIA_BUF1	0x82
-+#define OP_PROGRAM_VIA_BUF2	0x85
-+
-+struct dataflash_local
-+{
-+	int spi;			/* SPI chip-select number */
-+
-+	unsigned int page_size;		/* number of bytes per page */
-+	unsigned short page_offset;	/* page offset in flash address */
-+};
-+
-+
-+/* Detected DataFlash devices */
-+static struct mtd_info* mtd_devices[DATAFLASH_MAX_DEVICES];
-+static int nr_devices = 0;
-+
-+/* ......................................................................... */
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+
-+static struct mtd_partition static_partitions_2M[] =
-+{
-+	{
-+		.name		= "bootloader",
-+		.offset		= 0,
-+		.size		= 1 * 32 * 8 * 528,	/* 1st sector = 32 blocks * 8 pages * 528 bytes */
-+		.mask_flags	= MTD_WRITEABLE,	/* read-only */
-+	},
-+	{
-+		.name		= "kernel",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= 6 * 32 * 8 * 528,	/* 6 sectors */
-+	},
-+	{
-+		.name		= "filesystem",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= MTDPART_SIZ_FULL,	/* rest = 9 sectors */
-+	}
-+};
-+
-+static struct mtd_partition static_partitions_4M[] =
-+{
-+	{
-+		.name		= "bootloader",
-+		.offset		= 0,
-+		.size		= 1 * 64 * 8 * 528,	/* 1st sector = 64 blocks * 8 pages * 528 bytes */
-+		.mask_flags	= MTD_WRITEABLE,	/* read-only */
-+	},
-+	{
-+		.name		= "kernel",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= 4 * 64 * 8 * 528,	/* 4 sectors */
-+	},
-+	{
-+		.name		= "filesystem",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= MTDPART_SIZ_FULL,	/* rest = 11 sectors */
-+	}
-+};
-+
-+#if defined(CONFIG_MACH_KAFA)
-+static struct mtd_partition static_partitions_8M[] =
-+{
-+	{
-+		name:		"romboot",
-+		offset:		0,
-+		size:		16 * 1056,	/* 160 Kb */
-+		mask_flags:	MTD_WRITEABLE,		/* read-only */
-+	},
-+	{
-+		name:		"uboot",
-+		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
-+		size:		128 * 1056,		/* 1 MB */
-+	},
-+	{
-+		name:		"kernel",
-+		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
-+		size:		1024 * 1056,		/* 1 MB */
-+	},
-+	{
-+		name:		"filesystem",
-+		offset:		MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
-+		size:		MTDPART_SIZ_FULL,
-+	}
-+};
-+
-+#elif defined(CONFIG_MACH_MULTMDP)
-+
-+static struct mtd_partition static_partitions_8M[] =
-+{
-+	{
-+		.name		= "bootloader",
-+		.offset		= 0,
-+		.size		= 12 * 1056,		/* 1st sector = 32 blocks * 8 pages * 1056 bytes */
-+		.mask_flags	= MTD_WRITEABLE,	/* read-only */
-+	},
-+	{
-+		.name		= "configuration",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= 20 * 1056,
-+	},
-+	{
-+		.name		= "kernel",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= 1520 * 1056,
-+	},
-+	{
-+		.name		= "filesystem",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= MTDPART_SIZ_FULL,
-+	}
-+};
-+
-+#else
-+
-+static struct mtd_partition static_partitions_8M[] =
-+{
-+	{
-+		.name		= "bootloader",
-+		.offset		= 0,
-+		.size		= 1 * 32 * 8 * 1056,	/* 1st sector = 32 blocks * 8 pages * 1056 bytes */
-+		.mask_flags	= MTD_WRITEABLE,	/* read-only */
-+	},
-+	{
-+		.name		= "kernel",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= 5 * 32 * 8 * 1056,	/* 5 sectors */
-+	},
-+	{
-+		.name		= "filesystem",
-+		.offset		= MTDPART_OFS_NXTBLK,
-+		.size		= MTDPART_SIZ_FULL,	/* rest = 26 sectors */
-+	}
-+};
-+#endif
-+
-+static const char *part_probes[] = { "cmdlinepart", NULL, };
-+
-+#endif
-+
-+/* ......................................................................... */
-+
-+/* Allocate a single SPI transfer descriptor.  We're assuming that if multiple
-+   SPI transfers occur at the same time, spi_access_bus() will serialize them.
-+   If this is not valid, then either (i) each dataflash 'priv' structure
-+   needs it's own transfer descriptor, (ii) we lock this one, or (iii) use
-+   another mechanism.   */
-+static struct spi_transfer_list* spi_transfer_desc;
-+
-+/*
-+ * Perform a SPI transfer to access the DataFlash device.
-+ */
-+static int do_spi_transfer(int nr, char* tx, int tx_len, char* rx, int rx_len,
-+		char* txnext, int txnext_len, char* rxnext, int rxnext_len)
-+{
-+	struct spi_transfer_list* list = spi_transfer_desc;
-+
-+	list->tx[0] = tx;	list->txlen[0] = tx_len;
-+	list->rx[0] = rx;	list->rxlen[0] = rx_len;
-+
-+	list->tx[1] = txnext;	list->txlen[1] = txnext_len;
-+	list->rx[1] = rxnext;	list->rxlen[1] = rxnext_len;
-+
-+	list->nr_transfers = nr;
-+
-+	return spi_transfer(list);
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Poll the DataFlash device until it is READY.
-+ */
-+static void at91_dataflash_waitready(void)
-+{
-+	char* command = kmalloc(2, GFP_KERNEL);
-+
-+	if (!command)
-+		return;
-+
-+	do {
-+		command[0] = OP_READ_STATUS;
-+		command[1] = 0;
-+
-+		do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
-+	} while ((command[1] & 0x80) == 0);
-+
-+	kfree(command);
-+}
-+
-+/*
-+ * Return the status of the DataFlash device.
-+ */
-+static unsigned short at91_dataflash_status(void)
-+{
-+	unsigned short status;
-+	char* command = kmalloc(2, GFP_KERNEL);
-+
-+	if (!command)
-+		return 0;
-+
-+	command[0] = OP_READ_STATUS;
-+	command[1] = 0;
-+
-+	do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
-+	status = command[1];
-+
-+	kfree(command);
-+	return status;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Erase blocks of flash.
-+ */
-+static int at91_dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
-+{
-+	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
-+	unsigned int pageaddr;
-+	char* command;
-+
-+#ifdef DEBUG_DATAFLASH
-+	printk("dataflash_erase: addr=%i len=%i\n", instr->addr, instr->len);
-+#endif
-+
-+	/* Sanity checks */
-+	if (instr->addr + instr->len > mtd->size)
-+		return -EINVAL;
-+	if ((instr->len % mtd->erasesize != 0) || (instr->len % priv->page_size != 0))
-+		return -EINVAL;
-+	if ((instr->addr % priv->page_size) != 0)
-+		return -EINVAL;
-+
-+	command = kmalloc(4, GFP_KERNEL);
-+	if (!command)
-+		return -ENOMEM;
-+
-+	while (instr->len > 0) {
-+		/* Calculate flash page address */
-+		pageaddr = (instr->addr / priv->page_size) << priv->page_offset;
-+
-+		command[0] = OP_ERASE_PAGE;
-+		command[1] = (pageaddr & 0x00FF0000) >> 16;
-+		command[2] = (pageaddr & 0x0000FF00) >> 8;
-+		command[3] = 0;
-+#ifdef DEBUG_DATAFLASH
-+		printk("ERASE: (%x) %x %x %x [%i]\n", command[0], command[1], command[2], command[3], pageaddr);
-+#endif
-+
-+		/* Send command to SPI device */
-+		spi_access_bus(priv->spi);
-+		do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
-+
-+		at91_dataflash_waitready();		/* poll status until ready */
-+		spi_release_bus(priv->spi);
-+
-+		instr->addr += priv->page_size;		/* next page */
-+		instr->len -= priv->page_size;
-+	}
-+
-+	kfree(command);
-+
-+	/* Inform MTD subsystem that erase is complete */
-+	instr->state = MTD_ERASE_DONE;
-+	if (instr->callback)
-+		instr->callback(instr);
-+
-+	return 0;
-+}
-+
-+/*
-+ * Read from the DataFlash device.
-+ *   from   : Start offset in flash device
-+ *   len    : Amount to read
-+ *   retlen : About of data actually read
-+ *   buf    : Buffer containing the data
-+ */
-+static int at91_dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
-+{
-+	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
-+	unsigned int addr;
-+	char* command;
-+
-+#ifdef DEBUG_DATAFLASH
-+	printk("dataflash_read: %lli .. %lli\n", from, from+len);
-+#endif
-+
-+	*retlen = 0;
-+
-+	/* Sanity checks */
-+	if (!len)
-+		return 0;
-+	if (from + len > mtd->size)
-+		return -EINVAL;
-+
-+	/* Calculate flash page/byte address */
-+	addr = (((unsigned)from / priv->page_size) << priv->page_offset) + ((unsigned)from % priv->page_size);
-+
-+	command = kmalloc(8, GFP_KERNEL);
-+	if (!command)
-+		return -ENOMEM;
-+
-+	command[0] = OP_READ_CONTINUOUS;
-+	command[1] = (addr & 0x00FF0000) >> 16;
-+	command[2] = (addr & 0x0000FF00) >> 8;
-+	command[3] = (addr & 0x000000FF);
-+#ifdef DEBUG_DATAFLASH
-+	printk("READ: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+
-+	/* Send command to SPI device */
-+	spi_access_bus(priv->spi);
-+	do_spi_transfer(2, command, 8, command, 8, buf, len, buf, len);
-+	spi_release_bus(priv->spi);
-+
-+	*retlen = len;
-+	kfree(command);
-+	return 0;
-+}
-+
-+/*
-+ * Write to the DataFlash device.
-+ *   to     : Start offset in flash device
-+ *   len    : Amount to write
-+ *   retlen : Amount of data actually written
-+ *   buf    : Buffer containing the data
-+ */
-+static int at91_dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
-+{
-+	struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
-+	unsigned int pageaddr, addr, offset, writelen;
-+	size_t remaining;
-+	u_char *writebuf;
-+	unsigned short status;
-+	int res = 0;
-+	char* command;
-+	char* tmpbuf = NULL;
-+
-+#ifdef DEBUG_DATAFLASH
-+	printk("dataflash_write: %lli .. %lli\n", to, to+len);
-+#endif
-+
-+	*retlen = 0;
-+
-+	/* Sanity checks */
-+	if (!len)
-+		return 0;
-+	if (to + len > mtd->size)
-+		return -EINVAL;
-+
-+	command = kmalloc(4, GFP_KERNEL);
-+	if (!command)
-+		return -ENOMEM;
-+
-+	pageaddr = ((unsigned)to / priv->page_size);
-+	offset = ((unsigned)to % priv->page_size);
-+	if (offset + len > priv->page_size)
-+		writelen = priv->page_size - offset;
-+	else
-+		writelen = len;
-+	writebuf = (u_char *)buf;
-+	remaining = len;
-+
-+	/* Allocate temporary buffer */
-+	tmpbuf = kmalloc(priv->page_size, GFP_KERNEL);
-+	if (!tmpbuf) {
-+		kfree(command);
-+		return -ENOMEM;
-+	}
-+
-+	/* Gain access to the SPI bus */
-+	spi_access_bus(priv->spi);
-+
-+	while (remaining > 0) {
-+#ifdef DEBUG_DATAFLASH
-+		printk("write @ %i:%i len=%i\n", pageaddr, offset, writelen);
-+#endif
-+
-+		/* (1) Transfer to Buffer1 */
-+		if (writelen != priv->page_size) {
-+			addr = pageaddr << priv->page_offset;
-+			command[0] = OP_TRANSFER_BUF1;
-+			command[1] = (addr & 0x00FF0000) >> 16;
-+			command[2] = (addr & 0x0000FF00) >> 8;
-+			command[3] = 0;
-+#ifdef DEBUG_DATAFLASH
-+			printk("TRANSFER: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+			do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
-+			at91_dataflash_waitready();
-+		}
-+
-+		/* (2) Program via Buffer1 */
-+		addr = (pageaddr << priv->page_offset) + offset;
-+		command[0] = OP_PROGRAM_VIA_BUF1;
-+		command[1] = (addr & 0x00FF0000) >> 16;
-+		command[2] = (addr & 0x0000FF00) >> 8;
-+		command[3] = (addr & 0x000000FF);
-+#ifdef DEBUG_DATAFLASH
-+		printk("PROGRAM: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+		do_spi_transfer(2, command, 4, command, 4, writebuf, writelen, tmpbuf, writelen);
-+		at91_dataflash_waitready();
-+
-+		/* (3) Compare to Buffer1 */
-+		addr = pageaddr << priv->page_offset;
-+		command[0] = OP_COMPARE_BUF1;
-+		command[1] = (addr & 0x00FF0000) >> 16;
-+		command[2] = (addr & 0x0000FF00) >> 8;
-+		command[3] = 0;
-+#ifdef DEBUG_DATAFLASH
-+		printk("COMPARE: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
-+#endif
-+		do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
-+		at91_dataflash_waitready();
-+
-+		/* Get result of the compare operation */
-+		status = at91_dataflash_status();
-+		if ((status & 0x40) == 1) {
-+			printk("at91_dataflash: Write error on page %i\n", pageaddr);
-+			remaining = 0;
-+			res = -EIO;
-+		}
-+
-+		remaining = remaining - writelen;
-+		pageaddr++;
-+		offset = 0;
-+		writebuf += writelen;
-+		*retlen += writelen;
-+
-+		if (remaining > priv->page_size)
-+			writelen = priv->page_size;
-+		else
-+			writelen = remaining;
-+	}
-+
-+	/* Release SPI bus */
-+	spi_release_bus(priv->spi);
-+
-+	kfree(tmpbuf);
-+	kfree(command);
-+	return res;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Initialize and register DataFlash device with MTD subsystem.
-+ */
-+static int __init add_dataflash(int channel, char *name, int IDsize,
-+		int nr_pages, int pagesize, int pageoffset)
-+{
-+	struct mtd_info *device;
-+	struct dataflash_local *priv;
-+#ifdef CONFIG_MTD_PARTITIONS
-+	struct mtd_partition *mtd_parts = 0;
-+	int mtd_parts_nr = 0;
-+#endif
-+
-+	if (nr_devices >= DATAFLASH_MAX_DEVICES) {
-+		printk(KERN_ERR "at91_dataflash: Too many devices detected\n");
-+		return 0;
-+	}
-+
-+	device = kmalloc(sizeof(struct mtd_info) + strlen(name) + 8, GFP_KERNEL);
-+	if (!device)
-+		return -ENOMEM;
-+	memset(device, 0, sizeof(struct mtd_info));
-+
-+	device->name = (char *)&device[1];
-+	sprintf(device->name, "%s.spi%d", name, channel);
-+	device->size = nr_pages * pagesize;
-+	device->erasesize = pagesize;
-+	device->writesize = pagesize;
-+	device->owner = THIS_MODULE;
-+	device->type = MTD_DATAFLASH;
-+	device->flags = MTD_WRITEABLE;
-+	device->erase = at91_dataflash_erase;
-+	device->read = at91_dataflash_read;
-+	device->write = at91_dataflash_write;
-+
-+	priv = (struct dataflash_local *) kmalloc(sizeof(struct dataflash_local), GFP_KERNEL);
-+	if (!priv) {
-+		kfree(device);
-+		return -ENOMEM;
-+	}
-+	memset(priv, 0, sizeof(struct dataflash_local));
-+
-+	priv->spi = channel;
-+	priv->page_size = pagesize;
-+	priv->page_offset = pageoffset;
-+	device->priv = priv;
-+
-+	mtd_devices[nr_devices] = device;
-+	nr_devices++;
-+	printk("at91_dataflash: %s detected [spi%i] (%i bytes)\n", name, channel, device->size);
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+#ifdef CONFIG_MTD_CMDLINE_PARTS
-+	mtd_parts_nr = parse_mtd_partitions(device, part_probes, &mtd_parts, 0);
-+#endif
-+	if (mtd_parts_nr <= 0) {
-+		switch (IDsize) {
-+			case SZ_2M:
-+				mtd_parts = static_partitions_2M;
-+				mtd_parts_nr = ARRAY_SIZE(static_partitions_2M);
-+				break;
-+			case SZ_4M:
-+				mtd_parts = static_partitions_4M;
-+				mtd_parts_nr = ARRAY_SIZE(static_partitions_4M);
-+				break;
-+			case SZ_8M:
-+				mtd_parts = static_partitions_8M;
-+				mtd_parts_nr = ARRAY_SIZE(static_partitions_8M);
-+				break;
-+		}
-+	}
-+
-+	if (mtd_parts_nr > 0) {
-+#ifdef DATAFLASH_ALWAYS_ADD_DEVICE
-+		add_mtd_device(device);
-+#endif
-+		return add_mtd_partitions(device, mtd_parts, mtd_parts_nr);
-+	}
-+#endif
-+	return add_mtd_device(device);		/* add whole device */
-+}
-+
-+/*
-+ * Detect and initialize DataFlash device connected to specified SPI channel.
-+ *
-+ *   Device            Density         ID code                 Nr Pages        Page Size       Page offset
-+ *   AT45DB011B        1Mbit   (128K)  xx0011xx (0x0c)         512             264             9
-+ *   AT45DB021B        2Mbit   (256K)  xx0101xx (0x14)         1025            264             9
-+ *   AT45DB041B        4Mbit   (512K)  xx0111xx (0x1c)         2048            264             9
-+ *   AT45DB081B        8Mbit   (1M)    xx1001xx (0x24)         4096            264             9
-+ *   AT45DB0161B       16Mbit  (2M)    xx1011xx (0x2c)         4096            528             10
-+ *   AT45DB0321B       32Mbit  (4M)    xx1101xx (0x34)         8192            528             10
-+ *   AT45DB0642        64Mbit  (8M)    xx1111xx (0x3c)         8192            1056            11
-+ *   AT45DB1282        128Mbit (16M)   xx0100xx (0x10)         16384           1056            11
-+ */
-+static int __init at91_dataflash_detect(int channel)
-+{
-+	int res = 0;
-+	unsigned short status;
-+
-+	spi_access_bus(channel);
-+	status = at91_dataflash_status();
-+	spi_release_bus(channel);
-+	if (status != 0xff) {			/* no dataflash device there */
-+		switch (status & 0x3c) {
-+			case 0x0c:	/* 0 0 1 1 */
-+				res = add_dataflash(channel, "AT45DB011B", SZ_128K, 512, 264, 9);
-+				break;
-+			case 0x14:	/* 0 1 0 1 */
-+				res = add_dataflash(channel, "AT45DB021B", SZ_256K, 1025, 264, 9);
-+				break;
-+			case 0x1c:	/* 0 1 1 1 */
-+				res = add_dataflash(channel, "AT45DB041B", SZ_512K, 2048, 264, 9);
-+				break;
-+			case 0x24:	/* 1 0 0 1 */
-+				res = add_dataflash(channel, "AT45DB081B", SZ_1M, 4096, 264, 9);
-+				break;
-+			case 0x2c:	/* 1 0 1 1 */
-+				res = add_dataflash(channel, "AT45DB161B", SZ_2M, 4096, 528, 10);
-+				break;
-+			case 0x34:	/* 1 1 0 1 */
-+				res = add_dataflash(channel, "AT45DB321B", SZ_4M, 8192, 528, 10);
-+				break;
-+			case 0x3c:	/* 1 1 1 1 */
-+				res = add_dataflash(channel, "AT45DB642", SZ_8M, 8192, 1056, 11);
-+				break;
-+// Currently unsupported since Atmel removed the "Main Memory Program via Buffer" commands.
-+//			case 0x10:	/* 0 1 0 0 */
-+//				res = add_dataflash(channel, "AT45DB1282", SZ_16M, 16384, 1056, 11);
-+//				break;
-+			default:
-+				printk(KERN_ERR "at91_dataflash: Unknown device (%x)\n", status & 0x3c);
-+		}
-+	}
-+
-+	return res;
-+}
-+
-+static int __init at91_dataflash_init(void)
-+{
-+	spi_transfer_desc = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
-+	if (!spi_transfer_desc)
-+		return -ENOMEM;
-+
-+	/* DataFlash (SPI chip select 0) */
-+	at91_dataflash_detect(0);
-+
-+#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
-+	/* DataFlash card (SPI chip select 3) */
-+	at91_dataflash_detect(3);
-+#endif
-+
-+	return 0;
-+}
-+
-+static void __exit at91_dataflash_exit(void)
-+{
-+	int i;
-+
-+	for (i = 0; i < DATAFLASH_MAX_DEVICES; i++) {
-+		if (mtd_devices[i]) {
-+#ifdef CONFIG_MTD_PARTITIONS
-+			del_mtd_partitions(mtd_devices[i]);
-+#else
-+			del_mtd_device(mtd_devices[i]);
-+#endif
-+			kfree(mtd_devices[i]->priv);
-+			kfree(mtd_devices[i]);
-+		}
-+	}
-+	nr_devices = 0;
-+	kfree(spi_transfer_desc);
-+}
-+
-+
-+module_init(at91_dataflash_init);
-+module_exit(at91_dataflash_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Andrew Victor");
-+MODULE_DESCRIPTION("DataFlash driver for Atmel AT91RM9200");
-Index: linux-2.6.22.1/drivers/mtd/devices/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/mtd/devices/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/mtd/devices/Makefile	(arbetskopia)
-@@ -18,3 +18,4 @@
- obj-$(CONFIG_MTD_DATAFLASH)	+= mtd_dataflash.o
- obj-$(CONFIG_MTD_DATAFLASH26)	+= at91_dataflash26.o
- obj-$(CONFIG_MTD_M25P80)	+= m25p80.o
-+obj-$(CONFIG_MTD_AT91_DATAFLASH)+= at91_dataflash.o
-Index: linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c
-===================================================================
---- linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c	(revision 1)
-+++ linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c	(arbetskopia)
-@@ -50,6 +50,7 @@
- #define I82802AC	0x00ac
- #define MANUFACTURER_ST         0x0020
- #define M50LPW080       0x002F
-+#define AT49BV640D	0x02de
- 
- static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
- static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-@@ -156,6 +157,47 @@
- }
- #endif
- 
-+/* Atmel chips don't use the same PRI format as Intel chips */
-+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
-+{
-+	struct map_info *map = mtd->priv;
-+	struct cfi_private *cfi = map->fldrv_priv;
-+	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
-+	struct cfi_pri_atmel atmel_pri;
-+	uint32_t features = 0;
-+
-+	/* Reverse byteswapping */
-+	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
-+	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
-+	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
-+
-+	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
-+	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
-+
-+	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
-+
-+	if (atmel_pri.Features & 0x01) /* chip erase supported */
-+		features |= (1<<0);
-+	if (atmel_pri.Features & 0x02) /* erase suspend supported */
-+		features |= (1<<1);
-+	if (atmel_pri.Features & 0x04) /* program suspend supported */
-+		features |= (1<<2);
-+	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
-+		features |= (1<<9);
-+	if (atmel_pri.Features & 0x20) /* page mode read supported */
-+		features |= (1<<7);
-+	if (atmel_pri.Features & 0x40) /* queued erase supported */
-+		features |= (1<<4);
-+	if (atmel_pri.Features & 0x80) /* Protection bits supported */
-+		features |= (1<<6);
-+
-+	extp->FeatureSupport = features;
-+
-+	/* burst write mode not supported */
-+	cfi->cfiq->BufWriteTimeoutTyp = 0;
-+	cfi->cfiq->BufWriteTimeoutMax = 0;
-+}
-+
- #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
- /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
- static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
-@@ -233,6 +275,7 @@
- }
- 
- static struct cfi_fixup cfi_fixup_table[] = {
-+	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
- #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
- 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
- #endif
-Index: linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c
-===================================================================
---- linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c	(revision 1)
-+++ linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c	(arbetskopia)
-@@ -185,6 +185,10 @@
- 		extp->TopBottom = 2;
- 	else
- 		extp->TopBottom = 3;
-+
-+	/* burst write mode not supported */
-+	cfi->cfiq->BufWriteTimeoutTyp = 0;
-+	cfi->cfiq->BufWriteTimeoutMax = 0;
- }
- 
- static void fixup_use_secsi(struct mtd_info *mtd, void *param)
-@@ -217,6 +221,7 @@
- }
- 
- static struct cfi_fixup cfi_fixup_table[] = {
-+	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
- #ifdef AMD_BOOTLOC_BUG
- 	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
- #endif
-@@ -229,7 +234,6 @@
- #if !FORCE_WORD_WRITE
- 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
- #endif
--	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
- 	{ 0, 0, NULL, NULL }
- };
- static struct cfi_fixup jedec_fixup_table[] = {
-Index: linux-2.6.22.1/drivers/spi/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/spi/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/spi/Kconfig	(arbetskopia)
-@@ -55,6 +55,7 @@
- config SPI_ATMEL
- 	tristate "Atmel SPI Controller"
- 	depends on (ARCH_AT91 || AVR32) && SPI_MASTER
-+	select SPI_AT91_MANUAL_CS if ARCH_AT91RM9200
- 	help
- 	  This selects a driver for the Atmel SPI Controller, present on
- 	  many AT32 (AVR32) and AT91 (ARM) chips.
-@@ -100,6 +101,24 @@
- 	  inexpensive battery powered microcontroller evaluation board.
- 	  This same cable can be used to flash new firmware.
- 
-+config SPI_AT91
-+	tristate "AT91RM9200 Bitbang SPI Master"
-+	depends on SPI_MASTER && ARCH_AT91RM9200 && !SPI_ATMEL && EXPERIMENTAL
-+	select SPI_BITBANG
-+	select SPI_AT91_MANUAL_CS
-+	help
-+	  This is dumb PIO bitbanging driver for the Atmel AT91RM9200.
-+	  The SPI_ATMEL driver will be its replacement, using the native
-+	  SPI hardware and its DMA controller.
-+
-+config SPI_AT91_MANUAL_CS
-+	bool
-+	depends on ARCH_AT91RM9200
-+	help
-+	  Works around an AT91RM9200 problem whereby the SPI chip-select
-+	  will be wrongly disabled.  The workaround uses those pins as
-+	  GPIOs instead of letting the SPI controller manage them.
-+
- config SPI_IMX
- 	tristate "Freescale iMX SPI controller"
- 	depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL
-Index: linux-2.6.22.1/drivers/spi/atmel_spi.c
-===================================================================
---- linux-2.6.22.1/drivers/spi/atmel_spi.c	(revision 1)
-+++ linux-2.6.22.1/drivers/spi/atmel_spi.c	(arbetskopia)
-@@ -412,8 +412,8 @@
- 		csr |= SPI_BIT(NCPHA);
- 
- 	/* TODO: DLYBS and DLYBCT */
--	csr |= SPI_BF(DLYBS, 10);
--	csr |= SPI_BF(DLYBCT, 10);
-+	csr |= SPI_BF(DLYBS, 0);
-+	csr |= SPI_BF(DLYBCT, 0);
- 
- 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
- 	npcs_pin = (unsigned int)spi->controller_data;
-Index: linux-2.6.22.1/drivers/spi/spi_at91_bitbang.c
-===================================================================
---- linux-2.6.22.1/drivers/spi/spi_at91_bitbang.c	(revision 0)
-+++ linux-2.6.22.1/drivers/spi/spi_at91_bitbang.c	(revision 0)
-@@ -0,0 +1,207 @@
-+/*
-+ * at91_spi.c - at91 SPI driver (BOOTSTRAP/BITBANG VERSION)
-+ *
-+ * Copyright (C) 2006 David Brownell
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/spi/spi.h>
-+#include <linux/spi/spi_bitbang.h>
-+
-+#include <asm/arch/gpio.h>
-+
-+
-+/*
-+ * FIXME this bitbanging version is just to help bootstrap systems until
-+ * there's a native SPI+IRQ+DMA controller driver ... such a driver should
-+ * be a drop-in replacement for this one, and much faster.
-+ *
-+ * remember:
-+ *
-+ *	- other at91 parts (like at91sam9) have multiple controllers
-+ *	  and different pin muxing; this version is at91rm9200 specfic.
-+ *
-+ *	- at91sam9261 SPI0 pins are directly muxed with MMC/SD pins.
-+ *
-+ *	- rm9200 spi chipselects drop wrongly, so the native driver
-+ *	  will need to use gpios much like this does.
-+ *
-+ *	- real hardware only allows 8..16 bits per word, while this
-+ *	  bitbanger allows 1..32 (incompatible superset).
-+ *
-+ *	- this disregards clock parameters.  with inlined gpio calls,
-+ *	  gcc 3.4.4 produces about 1.5 mbit/sec, more than 2x faster
-+ *	  than using the subroutined veresion from txrx_word().
-+ *
-+ *	- suspend/resume and <linux/clk.h> support is missing ...
-+ */
-+
-+#define	spi_miso_bit	AT91_PIN_PA0
-+#define	spi_mosi_bit	AT91_PIN_PA1
-+#define	spi_sck_bit	AT91_PIN_PA2
-+
-+struct at91_spi {
-+	struct spi_bitbang	bitbang;
-+	struct platform_device	*pdev;
-+};
-+
-+/*----------------------------------------------------------------------*/
-+
-+static inline void setsck(struct spi_device *spi, int is_on)
-+{
-+	at91_set_gpio_value(spi_sck_bit, is_on);
-+}
-+
-+static inline void setmosi(struct spi_device *spi, int is_on)
-+{
-+	at91_set_gpio_value(spi_mosi_bit, is_on);
-+}
-+
-+static inline int getmiso(struct spi_device *spi)
-+{
-+	return at91_get_gpio_value(spi_miso_bit);
-+}
-+
-+static void at91_spi_chipselect(struct spi_device *spi, int is_active)
-+{
-+	unsigned long cs = (unsigned long) spi->controller_data;
-+
-+	/* set default clock polarity */
-+	if (is_active)
-+		setsck(spi, spi->mode & SPI_CPOL);
-+
-+	/* only support active-low (default) */
-+	at91_set_gpio_value(cs, !is_active);
-+}
-+
-+/*
-+ * NOTE:  this is "as fast as we can"; it should be a function of
-+ * the device clock ...
-+ */
-+#define	spidelay(X)	do{} while(0)
-+
-+#define	EXPAND_BITBANG_TXRX
-+#include <linux/spi/spi_bitbang.h>
-+
-+static u32 at91_spi_txrx_word_mode0(struct spi_device *spi,
-+		unsigned nsecs, u32 word, u8 bits)
-+{
-+	return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, 8);
-+}
-+
-+static u32 at91_spi_txrx_word_mode1(struct spi_device *spi,
-+		unsigned nsecs, u32 word, u8 bits)
-+{
-+	return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, 8);
-+}
-+
-+static u32 at91_spi_txrx_word_mode2(struct spi_device *spi,
-+		unsigned nsecs, u32 word, u8 bits)
-+{
-+	return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, 8);
-+}
-+
-+static u32 at91_spi_txrx_word_mode3(struct spi_device *spi,
-+		unsigned nsecs, u32 word, u8 bits)
-+{
-+	return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, 8);
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+static int __init at91_spi_probe(struct platform_device *pdev)
-+{
-+	int			status;
-+	struct spi_master	*master;
-+	struct at91_spi		*at91_spi;
-+
-+	if (pdev->id != 0)	/* SPI0 bus */
-+		return -EINVAL;
-+
-+	master = spi_alloc_master(&pdev->dev, sizeof *at91_spi);
-+	if (!master)
-+		return -ENOMEM;
-+
-+	at91_spi = spi_master_get_devdata(master);
-+	at91_spi->pdev = pdev;
-+	platform_set_drvdata(pdev, at91_spi);
-+
-+	/* SPI and bitbang hookup */
-+	master->bus_num = 0;
-+	master->num_chipselect = 4;
-+
-+	at91_spi->bitbang.master = spi_master_get(master);
-+	at91_spi->bitbang.chipselect = at91_spi_chipselect;
-+	at91_spi->bitbang.txrx_word[SPI_MODE_0] = at91_spi_txrx_word_mode0;
-+	at91_spi->bitbang.txrx_word[SPI_MODE_1] = at91_spi_txrx_word_mode1;
-+	at91_spi->bitbang.txrx_word[SPI_MODE_2] = at91_spi_txrx_word_mode2;
-+	at91_spi->bitbang.txrx_word[SPI_MODE_3] = at91_spi_txrx_word_mode3;
-+
-+	status = spi_bitbang_start(&at91_spi->bitbang);
-+	if (status < 0)
-+		(void) spi_master_put(at91_spi->bitbang.master);
-+
-+	return status;
-+}
-+
-+static int __exit at91_spi_remove(struct platform_device *pdev)
-+{
-+	struct at91_spi	*at91_spi = platform_get_drvdata(pdev);
-+	int status;
-+
-+	/* stop() unregisters child devices too */
-+	status = spi_bitbang_stop(&at91_spi->bitbang);
-+	(void) spi_master_put(at91_spi->bitbang.master);
-+
-+	platform_set_drvdata(pdev, NULL);
-+	return status;
-+}
-+
-+static struct platform_driver at91_spi_driver = {
-+	.probe		= at91_spi_probe,
-+	.remove		= __exit_p(at91_spi_remove),
-+	.driver		= {
-+		.name	= "at91_spi",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init at91_spi_init(void)
-+{
-+	at91_set_gpio_output(spi_sck_bit, 0);
-+	at91_set_gpio_output(spi_mosi_bit, 0);
-+	at91_set_gpio_input(spi_miso_bit, 1 /* pullup */);
-+
-+	/* register driver */
-+	return platform_driver_register(&at91_spi_driver);
-+}
-+
-+static void __exit at91_spi_exit(void)
-+{
-+	platform_driver_unregister(&at91_spi_driver);
-+}
-+
-+device_initcall(at91_spi_init);
-+module_exit(at91_spi_exit);
-+
-+MODULE_ALIAS("at91_spi.0");
-+
-+MODULE_DESCRIPTION("AT91 SPI support (BOOTSTRAP/BITBANG VERSION)");
-+MODULE_AUTHOR("David Brownell");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/spi/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/spi/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/spi/Makefile	(arbetskopia)
-@@ -23,6 +23,7 @@
- obj-$(CONFIG_SPI_MPC83xx)		+= spi_mpc83xx.o
- obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o
- obj-$(CONFIG_SPI_S3C24XX)		+= spi_s3c24xx.o
-+obj-$(CONFIG_SPI_AT91)			+= spi_at91_bitbang.o
- # 	... add above this line ...
- 
- # SPI protocol drivers (device/link on bus)
-Index: linux-2.6.22.1/drivers/input/mouse/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/input/mouse/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/input/mouse/Kconfig	(arbetskopia)
-@@ -216,4 +216,20 @@
- 	help
- 	  Say Y here to support HIL pointers.
- 
-+config MOUSE_GPIO
-+	tristate "GPIO mouse"
-+	depends on GENERIC_GPIO
-+	select INPUT_POLLDEV
-+	help
-+	  This driver simulates a mouse on GPIO lines of various CPUs (and some
-+	  other chips).
-+
-+	  Say Y here if your device has buttons or a simple joystick connected
-+	  directly to GPIO lines. Your board-specific setup logic must also
-+	  provide a platform device and platform data saying which GPIOs are
-+	  used.
-+
-+	  To compile this driver as a module, choose M here: the
-+	  module will be called gpio_mouse.
-+
- endif
-Index: linux-2.6.22.1/drivers/input/mouse/gpio_mouse.c
-===================================================================
---- linux-2.6.22.1/drivers/input/mouse/gpio_mouse.c	(revision 0)
-+++ linux-2.6.22.1/drivers/input/mouse/gpio_mouse.c	(revision 0)
-@@ -0,0 +1,196 @@
-+/*
-+ * Driver for simulating a mouse on GPIO lines.
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/version.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/input-polldev.h>
-+#include <linux/gpio_mouse.h>
-+
-+#include <asm/gpio.h>
-+
-+/*
-+ * Timer function which is run every scan_ms ms when the device is opened.
-+ * The dev input varaible is set to the the input_dev pointer.
-+ */
-+static void gpio_mouse_scan(struct input_polled_dev *dev)
-+{
-+	struct gpio_mouse_platform_data *gpio = dev->private;
-+	struct input_dev *input = dev->input;
-+	int x, y;
-+
-+	if (gpio->bleft >= 0)
-+		input_report_key(input, BTN_LEFT,
-+				gpio_get_value(gpio->bleft) ^ gpio->polarity);
-+	if (gpio->bmiddle >= 0)
-+		input_report_key(input, BTN_MIDDLE,
-+				gpio_get_value(gpio->bmiddle) ^ gpio->polarity);
-+	if (gpio->bright >= 0)
-+		input_report_key(input, BTN_RIGHT,
-+				gpio_get_value(gpio->bright) ^ gpio->polarity);
-+
-+	x = (gpio_get_value(gpio->right) ^ gpio->polarity)
-+		- (gpio_get_value(gpio->left) ^ gpio->polarity);
-+	y = (gpio_get_value(gpio->down) ^ gpio->polarity)
-+		- (gpio_get_value(gpio->up) ^ gpio->polarity);
-+
-+	input_report_rel(input, REL_X, x);
-+	input_report_rel(input, REL_Y, y);
-+	input_sync(input);
-+}
-+
-+static int __init gpio_mouse_probe(struct platform_device *pdev)
-+{
-+	struct gpio_mouse_platform_data *pdata = pdev->dev.platform_data;
-+	struct input_polled_dev *input_poll;
-+	struct input_dev *input;
-+	int pin, i;
-+	int error;
-+
-+	if (!pdata) {
-+		dev_err(&pdev->dev, "no platform data\n");
-+		error = -ENXIO;
-+		goto out;
-+	}
-+
-+	if (pdata->scan_ms < 0) {
-+		dev_err(&pdev->dev, "invalid scan time\n");
-+		error = -EINVAL;
-+		goto out;
-+	}
-+
-+	for (i = 0; i < GPIO_MOUSE_PIN_MAX; i++) {
-+		pin = pdata->pins[i];
-+
-+		if (pin < 0) {
-+
-+			if (i <= GPIO_MOUSE_PIN_RIGHT) {
-+				/* Mouse direction is required. */
-+				dev_err(&pdev->dev,
-+					"missing GPIO for directions\n");
-+				error = -EINVAL;
-+				goto out_free_gpios;
-+			}
-+
-+			if (i == GPIO_MOUSE_PIN_BLEFT)
-+				dev_dbg(&pdev->dev, "no left button defined\n");
-+
-+		} else {
-+			error = gpio_request(pin, "gpio_mouse");
-+			if (error) {
-+				dev_err(&pdev->dev, "fail %d pin (%d idx)\n",
-+					pin, i);
-+				goto out_free_gpios;
-+			}
-+
-+			gpio_direction_input(pin);
-+		}
-+	}
-+
-+	input_poll = input_allocate_polled_device();
-+	if (!input_poll) {
-+		dev_err(&pdev->dev, "not enough memory for input device\n");
-+		error = -ENOMEM;
-+		goto out_free_gpios;
-+	}
-+
-+	platform_set_drvdata(pdev, input_poll);
-+
-+	/* set input-polldev handlers */
-+	input_poll->private = pdata;
-+	input_poll->poll = gpio_mouse_scan;
-+	input_poll->poll_interval = pdata->scan_ms;
-+
-+	input = input_poll->input;
-+	input->name = pdev->name;
-+	input->id.bustype = BUS_HOST;
-+	input->dev.parent = &pdev->dev;
-+
-+	input_set_capability(input, EV_REL, REL_X);
-+	input_set_capability(input, EV_REL, REL_Y);
-+	if (pdata->bleft >= 0)
-+		input_set_capability(input, EV_KEY, BTN_LEFT);
-+	if (pdata->bmiddle >= 0)
-+		input_set_capability(input, EV_KEY, BTN_MIDDLE);
-+	if (pdata->bright >= 0)
-+		input_set_capability(input, EV_KEY, BTN_RIGHT);
-+
-+	error = input_register_polled_device(input_poll);
-+	if (error) {
-+		dev_err(&pdev->dev, "could not register input device\n");
-+		goto out_free_polldev;
-+	}
-+
-+	dev_dbg(&pdev->dev, "%d ms scan time, buttons: %s%s%s\n",
-+			pdata->scan_ms,
-+			pdata->bleft < 0 ? "" : "left ",
-+			pdata->bmiddle < 0 ? "" : "middle ",
-+			pdata->bright < 0 ? "" : "right");
-+
-+	return 0;
-+
-+ out_free_polldev:
-+	input_free_polled_device(input_poll);
-+	platform_set_drvdata(pdev, NULL);
-+
-+ out_free_gpios:
-+	while (--i >= 0) {
-+		pin = pdata->pins[i];
-+		if (pin)
-+			gpio_free(pin);
-+	}
-+ out:
-+	return error;
-+}
-+
-+static int __devexit gpio_mouse_remove(struct platform_device *pdev)
-+{
-+	struct input_polled_dev *input = platform_get_drvdata(pdev);
-+	struct gpio_mouse_platform_data *pdata = input->private;
-+	int pin, i;
-+
-+	input_unregister_polled_device(input);
-+	input_free_polled_device(input);
-+
-+	for (i = 0; i < GPIO_MOUSE_PIN_MAX; i++) {
-+		pin = pdata->pins[i];
-+		if (pin >= 0)
-+			gpio_free(pin);
-+	}
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+struct platform_driver gpio_mouse_device_driver = {
-+	.remove		= __devexit_p(gpio_mouse_remove),
-+	.driver		= {
-+		.name	= "gpio_mouse",
-+	}
-+};
-+
-+static int __init gpio_mouse_init(void)
-+{
-+	return platform_driver_probe(&gpio_mouse_device_driver,
-+			gpio_mouse_probe);
-+}
-+module_init(gpio_mouse_init);
-+
-+static void __exit gpio_mouse_exit(void)
-+{
-+	platform_driver_unregister(&gpio_mouse_device_driver);
-+}
-+module_exit(gpio_mouse_exit);
-+
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("GPIO mouse driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/input/mouse/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/input/mouse/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/input/mouse/Makefile	(arbetskopia)
-@@ -15,6 +15,7 @@
- obj-$(CONFIG_MOUSE_SERIAL)	+= sermouse.o
- obj-$(CONFIG_MOUSE_HIL)		+= hil_ptr.o
- obj-$(CONFIG_MOUSE_VSXXXAA)	+= vsxxxaa.o
-+obj-$(CONFIG_MOUSE_GPIO)	+= gpio_mouse.o
- 
- psmouse-objs := psmouse-base.o synaptics.o
- 
-Index: linux-2.6.22.1/drivers/video/s1d15605fb.c
-===================================================================
---- linux-2.6.22.1/drivers/video/s1d15605fb.c	(revision 0)
-+++ linux-2.6.22.1/drivers/video/s1d15605fb.c	(revision 0)
-@@ -0,0 +1,659 @@
-+/*
-+ *  drivers/video/s1d15605.c
-+ *
-+ * Adapted from several sources including:
-+ * 1) Driver for AT91 LCD Controller
-+ *    Copyright (C) 2006 Atmel
-+ *
-+ * 2) Copyright (C) 2005 S. Kevin Hester
-+ *
-+ *   This file is subject to the terms and conditions of the GNU General Public
-+ *   License. See the file COPYING in the main directory of this archive for
-+ *   more details.
-+ *
-+ *   This is a basic framebuffer driver for the Optrex F-51320 128x64 mono LCD
-+ *   display.  This display uses a clone of the common Epson SED 1531 display
-+ *   controller.
-+ *
-+ *   I've heavily borrowed code from the vfb.c driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+#ifdef DEBUG
-+#define MSG(string, args...) printk("s1d15605fb:" string, ##args)
-+#else
-+#define MSG(string, args...)
-+#endif
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/interrupt.h>
-+#include <linux/clk.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+
-+#include <asm/uaccess.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#ifdef CONFIG_PMAC_BACKLIGHT
-+#include <asm/backlight.h>
-+#endif
-+
-+#define VIDEOWIDTH		128
-+#define VIDEOHEIGHT		64
-+#define VIDEODEPTH		1	/* bits/pixel */
-+#define VIDEOWIDTH_BYTES	((VIDEOWIDTH * VIDEODEPTH) / 8)
-+
-+/* The number of bytes that actually go to the device */
-+#define ACTUALVIDEOMEMSIZE	(VIDEOWIDTH_BYTES * VIDEOHEIGHT)
-+#define VIDEOMEMSIZE		PAGE_SIZE
-+
-+static struct fb_var_screeninfo s1d15605_default __initdata = {
-+	.xres		= VIDEOWIDTH,
-+	.yres		= VIDEOHEIGHT,
-+	.xres_virtual	= VIDEOWIDTH,
-+	.yres_virtual	= VIDEOHEIGHT,
-+	.bits_per_pixel	= VIDEODEPTH,
-+	.red		= { 0, 1, 0 },
-+	.green		= { 0, 1, 0 },
-+	.blue		= { 0, 1, 0 },
-+	.activate	= FB_ACTIVATE_NOW,
-+	.pixclock	= 20000,
-+	.vmode		= FB_VMODE_NONINTERLACED,
-+};
-+
-+static struct fb_fix_screeninfo s1d15605_fix __initdata = {
-+	.id		= "s1d15605",
-+	.type		= FB_TYPE_PACKED_PIXELS,
-+	.visual		= FB_VISUAL_MONO10,
-+	.xpanstep	= 0,
-+	.ypanstep	= 0,
-+	.ywrapstep	= 0,
-+	.accel		= FB_ACCEL_NONE,
-+};
-+
-+struct s1d15605fb_info {
-+	struct fb_info		*info;
-+	char			*mmio;
-+	unsigned long		reset_pin;
-+	struct platform_device	*pdev;
-+};
-+
-+/*
-+ * LCD device interface
-+ */
-+#define	RESET_DISPLAY		0xE2
-+#define	LCD_BIAS_1_9		0xA2
-+#define	ADC_SELECT_REVERSE	0xA1
-+#define	COMMON_OUTPUT_NORMAL	0xC0
-+#define	V5_RESISTOR_RATIO	0x26
-+#define	ELECTRONIC_VOLUME_SET	0x81
-+#define	ELECTRONIC_VOLUME_INIT	0x20
-+#define	POWER_CONTROL_SET	0x28
-+#define	VOLTAGE_REGULATOR	0x02
-+#define	VOLTAGE_FOLLOWER	0x01
-+#define	BOOSTER_CIRCUIT		0x04
-+#define	DISPLAY_ON		0xAF
-+#define	START_LINE_SET		0x40
-+#define	PAGE_ADDRESS_SET	0xB0
-+#define	COLUMN_ADDRESS_HIGH	0x10
-+#define	COLUMN_ADDRESS_LOW	0x00
-+#define	RESISTOR_RATIO_START	0x20
-+
-+#define	NUM_OF_PAGES		8
-+#define	NUM_OF_COLUMNS		128
-+
-+#define	WRITE_COMMAND(x)	__raw_writeb((x), (sinfo)->mmio)
-+#define	READ_COMMAND		__raw_readb((sinfo)->mmio)
-+#define	WRITE_DATA(x)		__raw_writeb((x), (sinfo)->mmio + (0x10000))
-+#define	READ_DATA		__raw_readb((sinfo)->mmio + (0x10000))
-+
-+
-+/*
-+ *	s1d15605fb_resize_framebuffer
-+ *
-+ *	Free allocated space if different.  Allocate on new of changed.
-+ *	Returns -ENOMEM if the new framebuffer can not be allocated,
-+ *	zero on success.
-+ */
-+static int s1d15605fb_resize_framebuffer(struct s1d15605fb_info *sinfo)
-+{
-+	struct fb_info			*info = sinfo->info;
-+	struct fb_fix_screeninfo	*fix = &info->fix;
-+	struct fb_var_screeninfo	*var = &info->var;
-+	unsigned int			new_size;
-+	void				*new_vaddr;
-+
-+	new_size = ((var->xres_virtual * var->yres_virtual * var->bits_per_pixel) / 8);
-+
-+	MSG("%s: x (%d) y (%d) bpp (%d): new size 0x%08x\n", __FUNCTION__,
-+		var->xres_virtual, var->yres_virtual, var->bits_per_pixel, new_size);
-+
-+	if (new_size == fix->smem_len)
-+		return 0;
-+
-+	if (fix->smem_len) {
-+		kfree(info->screen_base);
-+	}
-+
-+	new_vaddr = kmalloc(new_size, GFP_KERNEL);
-+
-+	if (!new_vaddr) {
-+		fix->smem_len = 0;
-+		return -ENOMEM;
-+	}
-+
-+	info->screen_base = new_vaddr;
-+	fix->smem_start = (unsigned)new_vaddr;
-+	fix->smem_len = new_size;
-+	fix->line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
-+
-+	dev_info(info->device,
-+		"%luKiB frame buffer at %08lx (mapped at %p)\n",
-+		(unsigned long)info->fix.smem_len / 1024,
-+		(unsigned long)info->fix.smem_start,
-+		info->screen_base);
-+
-+	return 0;
-+}
-+
-+
-+/*
-+ * The s1d15605 seems to be divided into eight 128 pixel wide pages (from top to
-+ * bottom) each page seems to be eight pixels high, where these eight pixels are
-+ * one byte
-+ */
-+static void s1d15605_update(struct fb_info *info)
-+{
-+	struct s1d15605fb_info	*sinfo = info->par;
-+	int			page, i, row, colmask;
-+	u8			retVal, *rowPtr;
-+
-+	WRITE_COMMAND(START_LINE_SET);
-+	for (page = 0; page < NUM_OF_PAGES; ++page) {
-+		WRITE_COMMAND(PAGE_ADDRESS_SET + page);
-+		WRITE_COMMAND(COLUMN_ADDRESS_HIGH);
-+		WRITE_COMMAND(COLUMN_ADDRESS_LOW);
-+
-+		for (i = 0; i < NUM_OF_COLUMNS; ++i)
-+		{
-+			/* point of opportunity: optimization */
-+			colmask = (1 << (i & 0x7));
-+			rowPtr = (u8*)(info->screen_base);
-+			rowPtr += (VIDEOWIDTH_BYTES * 8 * page);
-+			rowPtr += (i >> 3);
-+			retVal = 0;
-+			for (row = 0; row < 8; ++row)
-+			{
-+				retVal = (retVal >> 1) | (((*rowPtr) & colmask) ? 0x80 : 0);
-+				rowPtr += VIDEOWIDTH_BYTES;
-+			}
-+			WRITE_DATA(retVal);
-+		}
-+	}
-+
-+	WRITE_COMMAND(DISPLAY_ON);
-+}
-+
-+
-+/*
-+ * Setting the video mode has been split into two parts.
-+ * First part, xxxfb_check_var, must not write anything
-+ * to hardware, it should only verify and adjust var.
-+ * This means it doesn't alter par but it does use hardware
-+ * data from it to check this var.
-+ */
-+static int s1d15605_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
-+{
-+	/*
-+	 * Some very basic checks
-+	 */
-+	if (!var->xres)
-+		var->xres = 1;
-+	if (!var->yres)
-+		var->yres = 1;
-+	if (var->xres > var->xres_virtual)
-+		var->xres_virtual = var->xres;
-+	if (var->yres > var->yres_virtual)
-+		var->yres_virtual = var->yres;
-+
-+	if(var->bits_per_pixel > VIDEODEPTH)
-+		return -EINVAL;
-+
-+	/*
-+	 * Memory limit
-+	 */
-+	if (((var->yres_virtual * var->bits_per_pixel * var->yres_virtual) >> 3) >
-+			ACTUALVIDEOMEMSIZE)
-+		return -ENOMEM;
-+
-+	/*
-+	 * Now that we checked it we alter var. The reason being is that the video
-+	 * mode passed in might not work but slight changes to it might make it
-+	 * work. This way we let the user know what is acceptable.
-+	 */
-+	switch (var->bits_per_pixel) {
-+	case 1:
-+		var->red.offset = var->green.offset = var->blue.offset = 0;
-+		var->red.length = var->green.length = var->blue.length
-+			= var->bits_per_pixel;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	var->xoffset = var->yoffset = 0;
-+	var->red.msb_right = var->green.msb_right = var->blue.msb_right =
-+		var->transp.msb_right = 0;
-+
-+	return 0;
-+}
-+
-+
-+/*
-+ * This routine actually sets the video mode. It's in here where we
-+ * the hardware state info->par and fix which can be affected by the
-+ * change in par. For this driver it doesn't do much.
-+ */
-+static int s1d15605_set_par(struct fb_info *info)
-+{
-+	int	ret;
-+
-+	MSG("%s:\n", __func__);
-+	MSG("  * resolution: %ux%u (%ux%u virtual)\n",
-+		 info->var.xres, info->var.yres,
-+		 info->var.xres_virtual, info->var.yres_virtual);
-+
-+	ret = s1d15605fb_resize_framebuffer(info->par);
-+
-+	info->fix.visual = FB_VISUAL_MONO10;
-+	return ret;
-+}
-+
-+
-+/*
-+ * Set a single color register. The values supplied are already
-+ * rounded down to the hardware's capabilities (according to the
-+ * entries in the var structure). Return != 0 for invalid regno.
-+ */
-+static int s1d15605_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
-+			u_int transp, struct fb_info *info)
-+{
-+	if (regno > 1)	/* no. of hw registers - we only do mono now */
-+		return 1;
-+
-+	return 0;
-+}
-+
-+
-+/*
-+ * Currently, the routine will simply shut-off the backlight and prevent
-+ * updates/refreshes.  Modify according to application.
-+ *
-+ * 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off
-+ */
-+static int s1d15605_blank(int blank, struct fb_info *info)
-+{
-+#ifdef CONFIG_PMAC_BACKLIGHT
-+	if (blank)
-+		pmac_backlight->props.power = FB_BLANK_POWERDOWN;
-+	else
-+		pmac_backlight->props.power = FB_BLANK_UNBLANK;
-+	backlight_update_status(pmac_backlight);
-+#endif
-+	return 1;
-+}
-+
-+
-+/*
-+ * Pan or Wrap the Display
-+ *
-+ * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
-+ */
-+/*
-+static int s1d15605_pan_display(struct fb_var_screeninfo *var,
-+			struct fb_info *info)
-+{
-+	if (var->vmode & FB_VMODE_YWRAP) {
-+		if (var->yoffset < 0
-+		    || var->yoffset >= info->var.yres_virtual
-+		    || var->xoffset)
-+			return -EINVAL;
-+	} else {
-+		if (var->xoffset + var->xres > info->var.xres_virtual ||
-+		    var->yoffset + var->yres > info->var.yres_virtual)
-+			return -EINVAL;
-+	}
-+	info->var.xoffset = var->xoffset;
-+	info->var.yoffset = var->yoffset;
-+	if (var->vmode & FB_VMODE_YWRAP)
-+		info->var.vmode |= FB_VMODE_YWRAP;
-+	else
-+		info->var.vmode &= ~FB_VMODE_YWRAP;
-+	return 0;
-+}
-+*/
-+
-+
-+static void s1d15605_copyarea(struct fb_info *info, const struct fb_copyarea *region)
-+{
-+	cfb_copyarea(info, region);
-+	s1d15605_update(info);
-+}
-+
-+
-+static void s1d15605_fillrect (struct fb_info *info, const struct fb_fillrect *rect)
-+{
-+	cfb_fillrect(info, rect);
-+	s1d15605_update(info);
-+}
-+
-+
-+static void s1d15605_imageblit(struct fb_info *p, const struct fb_image *image)
-+{
-+	cfb_imageblit(p, image);
-+	s1d15605_update(p);
-+}
-+
-+
-+/*
-+ * Write the users data to our framebuffer, and then trigger a psuedo DMA
-+ */
-+static ssize_t s1d15605_write(struct file *file, const char *buf,
-+			size_t count, loff_t *ppos)
-+{
-+	unsigned long p = *ppos;
-+	struct inode *inode = file->f_dentry->d_inode;
-+	int fbidx = iminor(inode);
-+	struct fb_info *info = registered_fb[fbidx];
-+	int err;
-+
-+	if (p > info->fix.smem_len)
-+		return -ENOSPC;
-+	if (count >= info->fix.smem_len)
-+		count = info->fix.smem_len;
-+	err = 0;
-+	if (count + p > info->fix.smem_len) {
-+		count = info->fix.smem_len - p;
-+		err = -ENOSPC;
-+	}
-+	if (count) {
-+		char *base_addr;
-+
-+		base_addr = info->screen_base;
-+		count -= copy_from_user(base_addr+p, buf, count);
-+		*ppos += count;
-+		err = -EFAULT;
-+	}
-+
-+	s1d15605_update(info);
-+
-+	if (count)
-+		return count;
-+
-+	return err;
-+}
-+
-+#ifdef	USE_PRIVATE_VMA_FXS
-+static void s1d15605_vma_open(struct vm_area_struct *vma)
-+{
-+	// FIXME - store stats in the device data via vm_private_data
-+}
-+
-+
-+static void s1d15605_vma_close(struct vm_area_struct *vma)
-+{
-+	// FIXME - store stats in the device data via vm_private_data
-+}
-+
-+
-+static struct page *s1d15605_vma_nopage(struct vm_area_struct *vma,
-+				unsigned long address, int *type)
-+{
-+	struct page *page;
-+	struct fb_info *info = vma->vm_private_data;
-+
-+	page = virt_to_page(info->screen_base);
-+	get_page(page);
-+
-+	// FIXME - now someone has a link to our page, start periodically blitting
-+	// latest updates to the actual device.
-+
-+	return page;
-+}
-+
-+
-+static struct vm_operations_struct s1d15605_vm_ops = {
-+	.open	= s1d15605_vma_open,
-+	.close	= s1d15605_vma_close,
-+	.nopage	= s1d15605_vma_nopage
-+};
-+
-+
-+/* We don't do much here - because we have special vm_ops */
-+static int s1d15605_mmap(struct fb_info *info, struct vm_area_struct *vma)
-+{
-+	vma->vm_ops = &s1d15605_vm_ops;
-+	vma->vm_flags |= VM_RESERVED;
-+	vma->vm_private_data = info;
-+	s1d15605_vma_open(vma);
-+
-+	return 0;
-+}
-+#endif /* USE_PRIVATE_VMA_FXS */
-+
-+
-+static struct fb_ops s1d15605fb_ops = {
-+	.owner		= THIS_MODULE,
-+	.fb_check_var	= s1d15605_check_var,
-+	.fb_set_par	= s1d15605_set_par,
-+	.fb_setcolreg	= s1d15605_setcolreg,
-+	.fb_blank	= s1d15605_blank,
-+//	.fb_pan_display	= s1d15605_pan_display,
-+	.fb_fillrect	= s1d15605_fillrect,
-+	.fb_copyarea	= s1d15605_copyarea,
-+	.fb_imageblit	= s1d15605_imageblit,
-+	.fb_write	= s1d15605_write,
-+#ifdef	USE_PRIVATE_VMA_FXS
-+	.fb_mmap	= s1d15605_mmap,
-+#endif
-+};
-+
-+
-+static void s1d15605_device_init(struct s1d15605fb_info *sinfo) {
-+
-+	char	value;
-+
-+	/* release the reset line by reading the device - proto hardware */
-+	value = READ_COMMAND;
-+	value = READ_COMMAND;
-+
-+#ifdef CONFIG_MACH_KB9200
-+	/* new boards have dedicated reset line */
-+	gpio_set_value(sinfo->reset_pin, 1);
-+#endif
-+
-+	/* initialize the device within 5ms */
-+	WRITE_COMMAND(RESET_DISPLAY);
-+	WRITE_COMMAND(LCD_BIAS_1_9);
-+	WRITE_COMMAND(ADC_SELECT_REVERSE);
-+	WRITE_COMMAND(COMMON_OUTPUT_NORMAL);
-+	WRITE_COMMAND(V5_RESISTOR_RATIO);
-+	WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
-+	WRITE_COMMAND(ELECTRONIC_VOLUME_INIT);
-+	WRITE_COMMAND(POWER_CONTROL_SET | VOLTAGE_REGULATOR | VOLTAGE_FOLLOWER | BOOSTER_CIRCUIT);
-+	WRITE_COMMAND(DISPLAY_ON);
-+
-+	WRITE_COMMAND(RESISTOR_RATIO_START + 4);
-+	WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
-+	WRITE_COMMAND(0x33);
-+}
-+
-+
-+static int s1d15605fb_probe(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct fb_info *info;
-+	struct s1d15605fb_info *sinfo;
-+	int ret;
-+
-+	MSG("%s\n", __func__);
-+
-+	if (!(info = framebuffer_alloc(sizeof(struct s1d15605fb_info), dev))) {
-+		dev_err(dev, "Cannot allocate framebuffer struct\n");
-+		return -ENOMEM;
-+	}
-+
-+	sinfo = info->par;
-+	sinfo->info = info;
-+	sinfo->pdev = pdev;
-+
-+	if (pdev->num_resources < 2) {
-+		dev_err(dev, "Resources unusable\n");
-+		ret = -ENODEV;
-+		goto free_info;
-+	}
-+
-+	info->fbops = &s1d15605fb_ops;
-+	strcpy(info->fix.id, pdev->name);
-+
-+	info->fix.mmio_start = pdev->resource[0].start;
-+	info->fix.mmio_len = pdev->resource[0].end - pdev->resource[0].start + 1;
-+	sinfo->reset_pin = pdev->resource[1].start;
-+
-+	ret = s1d15605fb_resize_framebuffer(sinfo);
-+	if (ret < 0) {
-+		dev_err(dev, "Cannot resize framebuffer: %d\n", ret);
-+		goto free_fb;
-+	}
-+
-+	if (!request_mem_region(info->fix.mmio_start,
-+				info->fix.mmio_len, pdev->name)) {
-+		ret = -EBUSY;
-+		goto free_fb;
-+	}
-+
-+	sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
-+	if (!sinfo->mmio) {
-+		dev_err(dev, "Cannot map LCD memory region\n");
-+		goto release_mem;
-+	}
-+
-+	s1d15605_device_init(sinfo);
-+
-+	ret = fb_find_mode(&info->var, info, NULL, NULL, 0, NULL, 1);
-+
-+	if (!ret || (ret == 4))
-+		info->var = s1d15605_default;
-+
-+	info->fix = s1d15605_fix;
-+	info->flags = FBINFO_FLAG_DEFAULT |
-+/*		FBINFO_HWACCEL_YPAN | */
-+		FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
-+
-+	ret = register_framebuffer(info);
-+	if (ret < 0) {
-+		dev_err(dev, "Failed to register framebuffer device: %d\n", ret);
-+		goto unmap_mmio;
-+	}
-+
-+	dev_set_drvdata(dev, info);
-+
-+	memset(info->screen_base, 0, info->fix.smem_len);
-+	info->var.activate |= FB_ACTIVATE_NOW;
-+	ret = fb_set_var(info, &info->var);
-+	if (ret) {
-+		dev_warn(dev, "Unable to set display parameters\n");
-+	}
-+
-+	info->var.activate &= ~(FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW);
-+
-+	dev_dbg(dev, "%s SUCCESS\n", __func__);
-+
-+	dev_info(dev, "Driver $Revision: 1.1 $\n");
-+
-+	return 0;
-+
-+unmap_mmio:
-+	iounmap(sinfo->mmio);
-+release_mem:
-+	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+free_fb:
-+	kfree(info->screen_base);
-+
-+free_info:
-+	framebuffer_release(info);
-+
-+	dev_dbg(dev, "%s FAILED\n", __func__);
-+	return ret;
-+}
-+
-+
-+static int s1d15605fb_remove(struct platform_device *pdev)
-+{
-+	struct device *dev = &pdev->dev;
-+	struct fb_info *info = dev_get_drvdata(dev);
-+	struct s1d15605fb_info *sinfo = info->par;
-+
-+	if (!sinfo)
-+		return 0;
-+
-+	unregister_framebuffer(info);
-+
-+	iounmap(sinfo->mmio);
-+	release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
-+
-+	kfree(info->screen_base);
-+
-+	dev_set_drvdata(dev, NULL);
-+	framebuffer_release(info);
-+	return 0;
-+}
-+
-+
-+static struct platform_driver s1d15605fb_driver = {
-+	.probe		= s1d15605fb_probe,
-+	.remove		= s1d15605fb_remove,
-+	.driver		= {
-+		.name	= "s1d15605fb",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+
-+static int __init s1d15605fb_init(void)
-+{
-+	return platform_driver_register(&s1d15605fb_driver);
-+}
-+
-+
-+static void __exit s1d15605fb_exit(void)
-+{
-+	platform_driver_unregister(&s1d15605fb_driver);
-+}
-+
-+
-+module_init(s1d15605fb_init);
-+module_exit(s1d15605fb_exit);
-+
-+
-+MODULE_AUTHOR("KwikByte");
-+MODULE_DESCRIPTION("Epson S1D15605 LCD Controller framebuffer driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/video/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/video/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/video/Kconfig	(arbetskopia)
-@@ -822,6 +822,17 @@
- 	  framebuffer.  Product specs at
- 	  <http://www.erd.epson.com/vdc/html/products.htm>.
- 
-+config FB_S1D15605
-+	tristate "Epson S1D15605 framebuffer support"
-+	depends on FB
-+	default m if MACH_KB9200
-+	select FB_CFB_FILLRECT
-+	select FB_CFB_COPYAREA
-+	select FB_CFB_IMAGEBLIT
-+	help
-+	  Build in support for the S1D15605 Epson Research 128x64
-+	  LCD controller as a framebuffer.
-+
- config FB_S1D13XXX
- 	tristate "Epson S1D13XXX framebuffer support"
- 	depends on FB
-@@ -835,7 +846,7 @@
- 
- config FB_ATMEL
- 	tristate "AT91/AT32 LCD Controller support"
--	depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || AVR32)
-+	depends on FB && (ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || AVR32)
- 	select FB_CFB_FILLRECT
- 	select FB_CFB_COPYAREA
- 	select FB_CFB_IMAGEBLIT
-@@ -849,6 +860,16 @@
- 	  Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
- 	  to let frame buffer in external SDRAM.
- 
-+config FB_ATMEL_STN
-+	bool "Use a STN display with AT91/AT32 LCD Controller"
-+	depends on FB_ATMEL && ARCH_AT91SAM9261
-+	default n
-+	help
-+	  Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
-+	  Controller. Say N if you want to connect a TFT.
-+
-+	  If unsure, say N.
-+
- config FB_NVIDIA
- 	tristate "nVidia Framebuffer Support"
- 	depends on FB && PCI
-Index: linux-2.6.22.1/drivers/video/atmel_lcdfb.c
-===================================================================
---- linux-2.6.22.1/drivers/video/atmel_lcdfb.c	(revision 1)
-+++ linux-2.6.22.1/drivers/video/atmel_lcdfb.c	(arbetskopia)
-@@ -37,7 +37,9 @@
- #endif
- 
- #if defined(CONFIG_ARCH_AT91)
--#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
-+#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
-+					 | FBINFO_PARTIAL_PAN_OK \
-+					 | FBINFO_HWACCEL_YPAN)
- 
- static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
- 					struct fb_var_screeninfo *var)
-@@ -74,12 +76,35 @@
- 	.type		= FB_TYPE_PACKED_PIXELS,
- 	.visual		= FB_VISUAL_TRUECOLOR,
- 	.xpanstep	= 0,
--	.ypanstep	= 0,
-+	.ypanstep	= 1,
- 	.ywrapstep	= 0,
- 	.accel		= FB_ACCEL_NONE,
- };
- 
-+static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
-+{
-+	unsigned long value;
- 
-+	if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
-+		return xres;
-+
-+	value = xres;
-+	if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
-+		/* STN display */
-+		if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
-+			value *= 3;
-+		}
-+		if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
-+		   || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
-+		      && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
-+			value = DIV_ROUND_UP(value, 4);
-+		else
-+			value = DIV_ROUND_UP(value, 8);
-+	}
-+
-+	return value;
-+}
-+
- static void atmel_lcdfb_update_dma(struct fb_info *info,
- 			       struct fb_var_screeninfo *var)
- {
-@@ -181,6 +206,7 @@
- 	var->xoffset = var->yoffset = 0;
- 
- 	switch (var->bits_per_pixel) {
-+	case 1:
- 	case 2:
- 	case 4:
- 	case 8:
-@@ -195,8 +221,11 @@
- 		var->blue.offset = 10;
- 		var->red.length = var->green.length = var->blue.length = 5;
- 		break;
-+	case 32:
-+		var->transp.offset = 24;
-+		var->transp.length = 8;
-+		/* fall through */
- 	case 24:
--	case 32:
- 		var->red.offset = 0;
- 		var->green.offset = 8;
- 		var->blue.offset = 16;
-@@ -228,8 +257,10 @@
- static int atmel_lcdfb_set_par(struct fb_info *info)
- {
- 	struct atmel_lcdfb_info *sinfo = info->par;
-+	unsigned long hozval_linesz;
- 	unsigned long value;
- 	unsigned long clk_value_khz;
-+	unsigned long bits_per_line;
- 
- 	dev_dbg(info->device, "%s:\n", __func__);
- 	dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
-@@ -241,12 +272,15 @@
- 
- 	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
- 
--	if (info->var.bits_per_pixel <= 8)
-+	if (info->var.bits_per_pixel == 1)
-+		info->fix.visual = FB_VISUAL_MONO01;
-+	else if (info->var.bits_per_pixel <= 8)
- 		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
- 	else
- 		info->fix.visual = FB_VISUAL_TRUECOLOR;
- 
--	info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
-+	bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
-+	info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
- 
- 	/* Re-initialize the DMA engine... */
- 	dev_dbg(info->device, "  * update DMA engine\n");
-@@ -262,19 +296,22 @@
- 	/* Set pixel clock */
- 	clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
- 
--	value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
-+	value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
- 
--	if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
--		value++;
--
- 	value = (value / 2) - 1;
-+	dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n", value);
- 
- 	if (value <= 0) {
- 		dev_notice(info->device, "Bypassing pixel clock divider\n");
- 		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
--	} else
-+	} else {
- 		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
-+		info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
-+		dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
-+					PICOS2KHZ(info->var.pixclock));
-+	}
- 
-+
- 	/* Initialize control register 2 */
- 	value = sinfo->default_lcdcon2;
- 
-@@ -311,9 +348,14 @@
- 	dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
- 	lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
- 
-+	/* Horizontal value (aka line size) */
-+	hozval_linesz = compute_hozval(info->var.xres,
-+					lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
-+
- 	/* Display size */
--	value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
-+	value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
- 	value |= info->var.yres - 1;
-+	dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
- 	lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
- 
- 	/* FIFO Threshold: Use formula from data sheet */
-@@ -421,6 +463,15 @@
- 			ret = 0;
- 		}
- 		break;
-+
-+	case FB_VISUAL_MONO01:
-+		if (regno < 2) {
-+			val = (regno == 0) ? 0x00 : 0x1F;
-+			lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
-+			ret = 0;
-+		}
-+		break;
-+
- 	}
- 
- 	return ret;
-Index: linux-2.6.22.1/drivers/video/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/video/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/video/Makefile	(arbetskopia)
-@@ -87,7 +87,8 @@
- obj-$(CONFIG_FB_SA1100)           += sa1100fb.o
- obj-$(CONFIG_FB_HIT)              += hitfb.o
- obj-$(CONFIG_FB_EPSON1355)	  += epson1355fb.o
--obj-$(CONFIG_FB_ATMEL)		  += atmel_lcdfb.o
-+obj-$(CONFIG_FB_S1D15605)	  += s1d15605fb.o
-+obj-$(CONFIG_FB_ATMEL)            += atmel_lcdfb.o
- obj-$(CONFIG_FB_PVR2)             += pvr2fb.o
- obj-$(CONFIG_FB_VOODOO1)          += sstfb.o
- obj-$(CONFIG_FB_ARMCLCD)	  += amba-clcd.o
-Index: linux-2.6.22.1/drivers/video/backlight/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/video/backlight/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/video/backlight/Kconfig	(arbetskopia)
-@@ -8,26 +8,44 @@
- 	  Enable this to be able to choose the drivers for controlling the
- 	  backlight and the LCD panel on some platforms, for example on PDAs.
- 
--config BACKLIGHT_CLASS_DEVICE
--        tristate "Lowlevel Backlight controls"
-+#
-+# LCD
-+#
-+config LCD_CLASS_DEVICE
-+        tristate "Lowlevel LCD controls"
- 	depends on BACKLIGHT_LCD_SUPPORT
- 	default m
- 	help
--	  This framework adds support for low-level control of the LCD
--          backlight. This includes support for brightness and power.
-+	  This framework adds support for low-level control of LCD.
-+	  Some framebuffer devices connect to platform-specific LCD modules
-+	  in order to have a platform-specific way to control the flat panel
-+	  (contrast and applying power to the LCD (not to the backlight!)).
- 
- 	  To have support for your specific LCD panel you will have to
- 	  select the proper drivers which depend on this option.
- 
--config LCD_CLASS_DEVICE
--        tristate "Lowlevel LCD controls"
-+config LCD_LTV350QV
-+	tristate "Samsung LTV350QV LCD Panel"
-+	depends on LCD_CLASS_DEVICE && SPI_MASTER
-+	default n
-+	help
-+	  If you have a Samsung LTV350QV LCD panel, say y to include a
-+	  power control driver for it.  The panel starts up in power
-+	  off state, so you need this driver in order to see any
-+	  output.
-+
-+	  The LTV350QV panel is present on all ATSTK1000 boards.
-+
-+#
-+# Backlight
-+#
-+config BACKLIGHT_CLASS_DEVICE
-+        tristate "Lowlevel Backlight controls"
- 	depends on BACKLIGHT_LCD_SUPPORT
- 	default m
- 	help
--	  This framework adds support for low-level control of LCD.
--	  Some framebuffer devices connect to platform-specific LCD modules
--	  in order to have a platform-specific way to control the flat panel
--	  (contrast and applying power to the LCD (not to the backlight!)).
-+	  This framework adds support for low-level control of the LCD
-+          backlight. This includes support for brightness and power.
- 
- 	  To have support for your specific LCD panel you will have to
- 	  select the proper drivers which depend on this option.
-@@ -71,3 +89,11 @@
- 	help
- 	  If you have a Intel LE80578 (Carillo Ranch) say Y to enable the
- 	  backlight driver.
-+
-+config BACKLIGHT_KB920x
-+	tristate "KwikByte KB9202 Backlight Driver"
-+	depends on BACKLIGHT_CLASS_DEVICE && MACH_KB9200
-+	default y
-+	help
-+	  If you have a KwikByte KB9202 board, say Y to enable the
-+	  backlight driver.
-Index: linux-2.6.22.1/drivers/video/backlight/ltv350qv.c
-===================================================================
---- linux-2.6.22.1/drivers/video/backlight/ltv350qv.c	(revision 0)
-+++ linux-2.6.22.1/drivers/video/backlight/ltv350qv.c	(revision 0)
-@@ -0,0 +1,340 @@
-+/*
-+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
-+ *
-+ * Copyright (C) 2006, 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/lcd.h>
-+#include <linux/module.h>
-+#include <linux/spi/spi.h>
-+
-+#include "ltv350qv.h"
-+
-+#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
-+
-+struct ltv350qv {
-+	struct spi_device	*spi;
-+	u8			*buffer;
-+	int			power;
-+	struct lcd_device	*ld;
-+};
-+
-+/*
-+ * The power-on and power-off sequences are taken from the
-+ * LTV350QV-F04 data sheet from Samsung. The register definitions are
-+ * taken from the S6F2002 command list also from Samsung. Both
-+ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
-+ *
-+ * There's still some voodoo going on here, but it's a lot better than
-+ * in the first incarnation of the driver where all we had was the raw
-+ * numbers from the initialization sequence.
-+ */
-+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
-+{
-+	struct spi_message msg;
-+	struct spi_transfer index_xfer = {
-+		.len		= 3,
-+		.cs_change	= 1,
-+	};
-+	struct spi_transfer value_xfer = {
-+		.len		= 3,
-+		.cs_change	= 1,
-+	};
-+
-+	spi_message_init(&msg);
-+
-+	/* register index */
-+	lcd->buffer[0] = LTV_OPC_INDEX;
-+	lcd->buffer[1] = 0x00;
-+	lcd->buffer[2] = reg & 0x7f;
-+	index_xfer.tx_buf = lcd->buffer;
-+	spi_message_add_tail(&index_xfer, &msg);
-+
-+	/* register value */
-+	lcd->buffer[4] = LTV_OPC_DATA;
-+	lcd->buffer[5] = val >> 8;
-+	lcd->buffer[6] = val;
-+	value_xfer.tx_buf = lcd->buffer + 4;
-+	spi_message_add_tail(&value_xfer, &msg);
-+
-+	return spi_sync(lcd->spi, &msg);
-+}
-+
-+/* The comments are taken straight from the data sheet */
-+static int ltv350qv_power_on(struct ltv350qv *lcd)
-+{
-+	int ret;
-+
-+	/* Power On Reset Display off State */
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
-+		goto err;
-+	msleep(15);
-+
-+	/* Power Setting Function 1 */
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
-+		goto err;
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
-+		goto err_power1;
-+
-+	/* Power Setting Function 2 */
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
-+			       | LTV_SUPPLY_CURRENT(5)))
-+		goto err_power2;
-+
-+	msleep(55);
-+
-+	/* Instruction Setting */
-+	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
-+				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
-+	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
-+				  LTV_DS_SAME | LTV_CHS_480
-+				  | LTV_DF_RGB | LTV_RGB_BGR);
-+	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
-+				  LTV_VSPL_ACTIVE_LOW
-+				  | LTV_HSPL_ACTIVE_LOW
-+				  | LTV_DPL_SAMPLE_RISING
-+				  | LTV_EPL_ACTIVE_LOW
-+				  | LTV_SS_RIGHT_TO_LEFT);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+				  LTV_NW_INV_1LINE | LTV_FWI(3));
-+	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
-+	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
-+	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
-+	if (ret)
-+		goto err_settings;
-+
-+	/* Wait more than 2 frames */
-+	msleep(20);
-+
-+	/* Display On Sequence */
-+	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
-+				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
-+				 | LTV_SUPPLY_CURRENT(5));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
-+	if (ret)
-+		goto err_disp_on;
-+
-+	/* Display should now be ON. Phew. */
-+	return 0;
-+
-+err_disp_on:
-+	/*
-+	 * Try to recover. Error handling probably isn't very useful
-+	 * at this point, just make a best effort to switch the panel
-+	 * off.
-+	 */
-+	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
-+			   | LTV_SUPPLY_CURRENT(5));
-+	ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+			   LTV_NW_INV_1LINE | LTV_FWI(3));
-+err_settings:
-+err_power2:
-+err_power1:
-+	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
-+	msleep(1);
-+err:
-+	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
-+	return -EIO;
-+}
-+
-+static int ltv350qv_power_off(struct ltv350qv *lcd)
-+{
-+	int ret;
-+
-+	/* Display Off Sequence */
-+	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+				 LTV_VCOM_DISABLE
-+				 | LTV_DRIVE_CURRENT(5)
-+				 | LTV_SUPPLY_CURRENT(5));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+				  LTV_NW_INV_1LINE | LTV_FWI(3));
-+
-+	/* Power down setting 1 */
-+	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
-+
-+	/* Wait at least 1 ms */
-+	msleep(1);
-+
-+	/* Power down setting 2 */
-+	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
-+
-+	/*
-+	 * No point in trying to recover here. If we can't switch the
-+	 * panel off, what are we supposed to do other than inform the
-+	 * user about the failure?
-+	 */
-+	if (ret)
-+		return -EIO;
-+
-+	/* Display power should now be OFF */
-+	return 0;
-+}
-+
-+static int ltv350qv_power(struct ltv350qv *lcd, int power)
-+{
-+	int ret = 0;
-+
-+	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
-+		ret = ltv350qv_power_on(lcd);
-+	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
-+		ret = ltv350qv_power_off(lcd);
-+
-+	if (!ret)
-+		lcd->power = power;
-+
-+	return ret;
-+}
-+
-+static int ltv350qv_set_power(struct lcd_device *ld, int power)
-+{
-+	struct ltv350qv *lcd;
-+
-+	lcd = class_get_devdata(&ld->class_dev);
-+	return ltv350qv_power(lcd, power);
-+}
-+
-+static int ltv350qv_get_power(struct lcd_device *ld)
-+{
-+	struct ltv350qv *lcd;
-+
-+	lcd = class_get_devdata(&ld->class_dev);
-+	return lcd->power;
-+}
-+
-+static struct lcd_ops ltv_ops = {
-+	.get_power	= ltv350qv_get_power,
-+	.set_power	= ltv350qv_set_power,
-+};
-+
-+static int __devinit ltv350qv_probe(struct spi_device *spi)
-+{
-+	struct ltv350qv *lcd;
-+	struct lcd_device *ld;
-+	int ret;
-+
-+	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
-+	if (!lcd)
-+		return -ENOMEM;
-+
-+	lcd->spi = spi;
-+	lcd->power = FB_BLANK_POWERDOWN;
-+	lcd->buffer = kzalloc(8, GFP_KERNEL);
-+
-+	ld = lcd_device_register("ltv350qv", lcd, &ltv_ops);
-+	if (IS_ERR(ld)) {
-+		ret = PTR_ERR(ld);
-+		goto out_free_lcd;
-+	}
-+	lcd->ld = ld;
-+
-+	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
-+	if (ret)
-+		goto out_unregister;
-+
-+	dev_set_drvdata(&spi->dev, lcd);
-+
-+	return 0;
-+
-+out_unregister:
-+	lcd_device_unregister(ld);
-+out_free_lcd:
-+	kfree(lcd);
-+	return ret;
-+}
-+
-+static int __devexit ltv350qv_remove(struct spi_device *spi)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+	lcd_device_unregister(lcd->ld);
-+	kfree(lcd);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int ltv350qv_suspend(struct spi_device *spi,
-+			    pm_message_t state, u32 level)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+	if (level == SUSPEND_POWER_DOWN)
-+		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+
-+	return 0;
-+}
-+
-+static int ltv350qv_resume(struct spi_device *spi, u32 level)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+	if (level == RESUME_POWER_ON)
-+		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
-+
-+	return 0;
-+}
-+#else
-+#define ltv350qv_suspend	NULL
-+#define ltv350qv_resume		NULL
-+#endif
-+
-+/* Power down all displays on reboot, poweroff or halt */
-+static void ltv350qv_shutdown(struct spi_device *spi)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
-+
-+	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+}
-+
-+static struct spi_driver ltv350qv_driver = {
-+	.driver = {
-+		.name		= "ltv350qv",
-+		.bus		= &spi_bus_type,
-+		.owner		= THIS_MODULE,
-+	},
-+
-+	.probe		= ltv350qv_probe,
-+	.remove		= __devexit_p(ltv350qv_remove),
-+	.shutdown	= ltv350qv_shutdown,
-+	.suspend	= ltv350qv_suspend,
-+	.resume		= ltv350qv_resume,
-+};
-+
-+static int __init ltv350qv_init(void)
-+{
-+	return spi_register_driver(&ltv350qv_driver);
-+}
-+
-+static void __exit ltv350qv_exit(void)
-+{
-+	spi_unregister_driver(&ltv350qv_driver);
-+}
-+module_init(ltv350qv_init);
-+module_exit(ltv350qv_exit);
-+
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/video/backlight/ltv350qv.h
-===================================================================
---- linux-2.6.22.1/drivers/video/backlight/ltv350qv.h	(revision 0)
-+++ linux-2.6.22.1/drivers/video/backlight/ltv350qv.h	(revision 0)
-@@ -0,0 +1,95 @@
-+/*
-+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
-+ *
-+ * Copyright (C) 2006, 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __LTV350QV_H
-+#define __LTV350QV_H
-+
-+#define LTV_OPC_INDEX	0x74
-+#define LTV_OPC_DATA	0x76
-+
-+#define LTV_ID		0x00		/* ID Read */
-+#define LTV_IFCTL	0x01		/* Display Interface Control */
-+#define LTV_DATACTL	0x02		/* Display Data Control */
-+#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
-+#define LTV_GATECTL1	0x04		/* Gate Control 1 */
-+#define LTV_GATECTL2	0x05		/* Gate Control 2 */
-+#define LTV_VBP		0x06		/* Vertical Back Porch */
-+#define LTV_HBP		0x07		/* Horizontal Back Porch */
-+#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
-+#define LTV_PWRCTL1	0x09		/* Power Control 1 */
-+#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
-+#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
-+
-+/* Bit definitions for LTV_IFCTL */
-+#define LTV_IM			(1 << 15)
-+#define LTV_NMD			(1 << 14)
-+#define LTV_SSMD		(1 << 13)
-+#define LTV_REV			(1 <<  7)
-+#define LTV_NL(x)		(((x) & 0x001f) << 0)
-+
-+/* Bit definitions for LTV_DATACTL */
-+#define LTV_DS_SAME		(0 << 12)
-+#define LTV_DS_D_TO_S		(1 << 12)
-+#define LTV_DS_S_TO_D		(2 << 12)
-+#define LTV_CHS_384		(0 <<  9)
-+#define LTV_CHS_480		(1 <<  9)
-+#define LTV_CHS_492		(2 <<  9)
-+#define LTV_DF_RGB		(0 <<  6)
-+#define LTV_DF_RGBX		(1 <<  6)
-+#define LTV_DF_XRGB		(2 <<  6)
-+#define LTV_RGB_RGB		(0 <<  2)
-+#define LTV_RGB_BGR		(1 <<  2)
-+#define LTV_RGB_GRB		(2 <<  2)
-+#define LTV_RGB_RBG		(3 <<  2)
-+
-+/* Bit definitions for LTV_ENTRY_MODE */
-+#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
-+#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
-+#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
-+#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
-+#define LTV_DPL_SAMPLE_RISING	(0 << 13)
-+#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
-+#define LTV_EPL_ACTIVE_LOW	(0 << 12)
-+#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
-+#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
-+#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
-+#define LTV_STB			(1 <<  1)
-+
-+/* Bit definitions for LTV_GATECTL1 */
-+#define LTV_CLW(x)		(((x) & 0x0007) << 12)
-+#define LTV_GAON		(1 <<  5)
-+#define LTV_SDR			(1 <<  3)
-+
-+/* Bit definitions for LTV_GATECTL2 */
-+#define LTV_NW_INV_FRAME	(0 << 14)
-+#define LTV_NW_INV_1LINE	(1 << 14)
-+#define LTV_NW_INV_2LINE	(2 << 14)
-+#define LTV_DSC			(1 << 12)
-+#define LTV_GIF			(1 <<  8)
-+#define LTV_FHN			(1 <<  7)
-+#define LTV_FTI(x)		(((x) & 0x0003) << 4)
-+#define LTV_FWI(x)		(((x) & 0x0003) << 0)
-+
-+/* Bit definitions for LTV_SOTCTL */
-+#define LTV_SDT(x)		(((x) & 0x0007) << 10)
-+#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
-+
-+/* Bit definitions for LTV_PWRCTL1 */
-+#define LTV_VCOM_DISABLE	(1 << 14)
-+#define LTV_VCOMOUT_ENABLE	(1 << 11)
-+#define LTV_POWER_ON		(1 <<  9)
-+#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
-+#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
-+
-+/* Bit definitions for LTV_PWRCTL2 */
-+#define LTV_VCOML_ENABLE	(1 << 13)
-+#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
-+#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
-+
-+#endif /* __LTV350QV_H */
-Index: linux-2.6.22.1/drivers/video/backlight/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/video/backlight/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/video/backlight/Makefile	(arbetskopia)
-@@ -1,9 +1,12 @@
- # Backlight & LCD drivers
- 
- obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
-+obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
-+
- obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
- obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
- obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
- obj-$(CONFIG_BACKLIGHT_LOCOMO)	+= locomolcd.o
- obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
- obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
-+obj-$(CONFIG_BACKLIGHT_KB920x)	+= kb920x_bl.o
-Index: linux-2.6.22.1/drivers/video/backlight/kb920x_bl.c
-===================================================================
---- linux-2.6.22.1/drivers/video/backlight/kb920x_bl.c	(revision 0)
-+++ linux-2.6.22.1/drivers/video/backlight/kb920x_bl.c	(revision 0)
-@@ -0,0 +1,164 @@
-+/*
-+ * Backlight Driver for KB9202
-+ *
-+ * Copyright (c) 2006 KwikByte
-+ *
-+ * Based on Sharp's Corgi Backlight Driver
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/spinlock.h>
-+#include <linux/fb.h>
-+#include <linux/backlight.h>
-+
-+#include <asm/arch/gpio.h>
-+
-+/* The backlight is on(1)/off(0) */
-+#define	KB9202_DEFAULT_INTENSITY	1
-+#define	KB9202_MAX_INTENSITY		1
-+
-+static int kb9202bl_suspended;
-+static int current_intensity = 0;
-+static DEFINE_SPINLOCK(bl_lock);
-+
-+static int kb9202bl_set_intensity(struct backlight_device *bd)
-+{
-+	unsigned long flags;
-+	int intensity = bd->props.brightness;
-+
-+	if (bd->props.power != FB_BLANK_UNBLANK)
-+		intensity = 0;
-+	if (bd->props.fb_blank != FB_BLANK_UNBLANK)
-+		intensity = 0;
-+	if (kb9202bl_suspended)
-+		intensity = 0;
-+
-+	if ((!current_intensity) && (bd->props.power == FB_BLANK_UNBLANK))
-+		intensity = 1;
-+
-+	spin_lock_irqsave(&bl_lock, flags);
-+	if (intensity)
-+		gpio_set_value(AT91_PIN_PC23, 1);
-+	else
-+		gpio_set_value(AT91_PIN_PC23, 0);
-+	spin_unlock_irqrestore(&bl_lock, flags);
-+
-+	current_intensity = intensity;
-+
-+	return 0;
-+}
-+
-+static int kb9202bl_get_intensity(struct backlight_device *bd)
-+{
-+	return current_intensity;
-+}
-+
-+static struct backlight_ops kb9202bl_ops = {
-+	.get_brightness	= kb9202bl_get_intensity,
-+	.update_status	= kb9202bl_set_intensity,
-+};
-+
-+static int __init kb9202bl_probe(struct platform_device *pdev)
-+{
-+	struct backlight_device *bd;
-+
-+	bd = backlight_device_register ("kb9202-bl", &pdev->dev, NULL, &kb9202bl_ops);
-+	if (IS_ERR(bd))
-+		return PTR_ERR(bd);
-+
-+	platform_set_drvdata(pdev, bd);
-+
-+	bd->props.max_brightness = KB9202_MAX_INTENSITY;
-+	bd->props.brightness = KB9202_DEFAULT_INTENSITY;
-+	(void) kb9202bl_set_intensity(bd);
-+
-+	return 0;
-+}
-+
-+static int kb9202bl_remove(struct platform_device *pdev)
-+{
-+	struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+	bd->props.brightness = 0;
-+	bd->props.power = 0;
-+	(void) kb9202bl_set_intensity(bd);
-+
-+	backlight_device_unregister(bd);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int kb9202bl_suspend(struct platform_device *dev, pm_message_t state)
-+{
-+	struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+	kb9202bl_suspended = 1;
-+	(void) kb9202bl_set_intensity(bd);
-+	return 0;
-+}
-+
-+static int kb9202bl_resume(struct platform_device *dev)
-+{
-+	struct backlight_device *bd = platform_get_drvdata(pdev);
-+
-+	kb9202bl_suspended = 0;
-+	(void) kb9202bl_set_intensity(bd);
-+	return 0;
-+}
-+#else
-+#define kb9202bl_suspend	NULL
-+#define kb9202bl_resume		NULL
-+#endif
-+
-+static struct platform_driver kb9202bl_driver = {
-+	.probe		= kb9202bl_probe,
-+	.remove		= kb9202bl_remove,
-+	.suspend	= kb9202bl_suspend,
-+	.resume		= kb9202bl_resume,
-+	.driver		= {
-+		.name	= "kb9202-bl",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static struct platform_device *kb9202bl_device;
-+
-+static int __init kb9202bl_init(void)
-+{
-+	int ret;
-+
-+	ret = platform_driver_register(&kb9202bl_driver);
-+	if (!ret) {
-+		kb9202bl_device = platform_device_alloc("kb9202-bl", -1);
-+		if (!kb9202bl_device)
-+			return -ENOMEM;
-+
-+		ret = platform_device_add(kb9202bl_device);
-+		if (ret) {
-+			platform_device_put(kb9202bl_device);
-+			platform_driver_unregister(&kb9202bl_driver);
-+		}
-+	}
-+	return ret;
-+}
-+
-+static void __exit kb9202bl_exit(void)
-+{
-+	platform_device_unregister(kb9202bl_device);
-+	platform_driver_unregister(&kb9202bl_driver);
-+}
-+
-+module_init(kb9202bl_init);
-+module_exit(kb9202bl_exit);
-+
-+MODULE_AUTHOR("KwikByte <kb9200_dev@kwikbyte.com>");
-+MODULE_DESCRIPTION("KB9202 Backlight Driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/mmc/host/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/mmc/host/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/mmc/host/Kconfig	(arbetskopia)
-@@ -74,6 +74,16 @@
- 
- 	  If unsure, say N.
- 
-+config MMC_ATMELMCI
-+	tristate "Atmel Multimedia Card Interface support"
-+	depends on AVR32 && MMC
-+	help
-+	  This selects the Atmel Multimedia Card Interface. If you have
-+	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
-+	  slot, say Y or M here.
-+
-+	  If unsure, say N.
-+
- config MMC_IMX
- 	tristate "Motorola i.MX Multimedia Card Interface support"
- 	depends on ARCH_IMX
-Index: linux-2.6.22.1/drivers/mmc/host/at91_mci.c
-===================================================================
---- linux-2.6.22.1/drivers/mmc/host/at91_mci.c	(revision 1)
-+++ linux-2.6.22.1/drivers/mmc/host/at91_mci.c	(arbetskopia)
-@@ -85,7 +85,7 @@
- 
- #define AT91_MCI_ERRORS	(AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE	\
- 		| AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE		\
--		| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)			
-+		| AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
- 
- #define at91_mci_read(host, reg)	__raw_readl((host)->baseaddr + (reg))
- #define at91_mci_write(host, reg, val)	__raw_writel((val), (host)->baseaddr + (reg))
-@@ -560,9 +560,7 @@
- 	pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
- 		 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
- 
--	if (status & (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE |
--			AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE |
--			AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)) {
-+	if (status & (AT91_MCI_ERRORS)) {
- 		if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
- 			cmd->error = MMC_ERR_NONE;
- 		}
-@@ -663,15 +661,15 @@
- 
- 	int_status = at91_mci_read(host, AT91_MCI_SR);
- 	int_mask = at91_mci_read(host, AT91_MCI_IMR);
--	
-+
- 	pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
- 		int_status & int_mask);
--	
-+
- 	int_status = int_status & int_mask;
- 
- 	if (int_status & AT91_MCI_ERRORS) {
- 		completed = 1;
--		
-+
- 		if (int_status & AT91_MCI_UNRE)
- 			pr_debug("MMC: Underrun error\n");
- 		if (int_status & AT91_MCI_OVRE)
-@@ -819,7 +817,7 @@
- 	mmc->f_min = 375000;
- 	mmc->f_max = 25000000;
- 	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
--	mmc->caps = MMC_CAP_BYTEBLOCK;
-+	mmc->caps = MMC_CAP_BYTEBLOCK | MMC_CAP_MULTIWRITE;
- 
- 	mmc->max_blk_size = 4095;
- 	mmc->max_blk_count = mmc->max_req_size;
-@@ -893,6 +891,8 @@
- 
- 	mmc_add_host(mmc);
- 
-+	device_init_wakeup(&pdev->dev, 1);
-+
- 	/*
- 	 * monitor card insertion/removal if we can
- 	 */
-@@ -922,6 +922,8 @@
- 
- 	host = mmc_priv(mmc);
- 
-+	device_init_wakeup(&pdev->dev, 0);
-+
- 	if (host->present != -1) {
- 		free_irq(host->board->det_pin, host);
- 		cancel_delayed_work(&host->mmc->detect);
-@@ -949,8 +951,12 @@
- static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
- {
- 	struct mmc_host *mmc = platform_get_drvdata(pdev);
-+	struct at91mci_host *host = mmc_priv(mmc);
- 	int ret = 0;
- 
-+	if (device_may_wakeup(&pdev->dev))
-+		enable_irq_wake(host->board->det_pin);
-+
- 	if (mmc)
- 		ret = mmc_suspend_host(mmc, state);
- 
-@@ -960,8 +966,12 @@
- static int at91_mci_resume(struct platform_device *pdev)
- {
- 	struct mmc_host *mmc = platform_get_drvdata(pdev);
-+	struct at91mci_host *host = mmc_priv(mmc);
- 	int ret = 0;
- 
-+	if (device_may_wakeup(&pdev->dev))
-+		disable_irq_wake(host->board->det_pin);
-+
- 	if (mmc)
- 		ret = mmc_resume_host(mmc);
- 
-Index: linux-2.6.22.1/drivers/mmc/host/atmel-mci.c
-===================================================================
---- linux-2.6.22.1/drivers/mmc/host/atmel-mci.c	(revision 0)
-+++ linux-2.6.22.1/drivers/mmc/host/atmel-mci.c	(revision 0)
-@@ -0,0 +1,1217 @@
-+/*
-+ * Atmel MultiMedia Card Interface driver
-+ *
-+ * Copyright (C) 2004-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/blkdev.h>
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/ioport.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/mmc/host.h>
-+
-+#include <asm/dma-controller.h>
-+#include <asm/io.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#include "atmel-mci.h"
-+
-+#define DRIVER_NAME "atmel_mci"
-+
-+#define MCI_CMD_ERROR_FLAGS	(MCI_BIT(RINDE)	| MCI_BIT(RDIRE) |	\
-+				 MCI_BIT(RCRCE) | MCI_BIT(RENDE) |	\
-+				 MCI_BIT(RTOE))
-+#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
-+				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
-+
-+enum {
-+	EVENT_CMD_COMPLETE = 0,
-+	EVENT_CMD_ERROR,
-+	EVENT_DATA_COMPLETE,
-+	EVENT_DATA_ERROR,
-+	EVENT_STOP_SENT,
-+	EVENT_STOP_COMPLETE,
-+	EVENT_STOP_ERROR,
-+	EVENT_DMA_ERROR,
-+	EVENT_CARD_DETECT,
-+};
-+
-+struct atmel_mci_dma {
-+	struct dma_request_sg	req;
-+	unsigned short		rx_periph_id;
-+	unsigned short		tx_periph_id;
-+};
-+
-+struct atmel_mci {
-+	struct mmc_host		*mmc;
-+	void __iomem		*regs;
-+	struct atmel_mci_dma	dma;
-+
-+	struct mmc_request	*mrq;
-+	struct mmc_command	*cmd;
-+	struct mmc_data		*data;
-+
-+	u32			stop_cmdr;
-+	u32			stop_iflags;
-+
-+	struct tasklet_struct	tasklet;
-+	unsigned long		pending_events;
-+	unsigned long		completed_events;
-+	u32			error_status;
-+
-+	int			present;
-+	int			detect_pin;
-+	int			wp_pin;
-+
-+	unsigned long		bus_hz;
-+	unsigned long		mapbase;
-+	struct clk		*mck;
-+	struct platform_device	*pdev;
-+
-+#ifdef CONFIG_DEBUG_FS
-+	struct dentry		*debugfs_root;
-+	struct dentry		*debugfs_regs;
-+	struct dentry		*debugfs_req;
-+	struct dentry		*debugfs_pending_events;
-+	struct dentry		*debugfs_completed_events;
-+#endif
-+};
-+
-+/* Those printks take an awful lot of time... */
-+#ifndef DEBUG
-+static unsigned int fmax = 15000000U;
-+#else
-+static unsigned int fmax = 1000000U;
-+#endif
-+module_param(fmax, uint, 0444);
-+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
-+
-+/* Test bit macros for completed events */
-+#define mci_cmd_is_complete(host)			\
-+	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_cmd_error_is_complete(host)			\
-+	test_bit(EVENT_CMD_ERROR, &host->completed_events)
-+#define mci_data_is_complete(host)			\
-+	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
-+#define mci_data_error_is_complete(host)		\
-+	test_bit(EVENT_DATA_ERROR, &host->completed_events)
-+#define mci_stop_sent_is_complete(host)			\
-+	test_bit(EVENT_STOP_SENT, &host->completed_events)
-+#define mci_stop_is_complete(host)			\
-+	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_stop_error_is_complete(host)		\
-+	test_bit(EVENT_STOP_ERROR, &host->completed_events)
-+#define mci_dma_error_is_complete(host)			\
-+	test_bit(EVENT_DMA_ERROR, &host->completed_events)
-+#define mci_card_detect_is_complete(host)			\
-+	test_bit(EVENT_CARD_DETECT, &host->completed_events)
-+
-+/* Test and clear bit macros for pending events */
-+#define mci_clear_cmd_is_pending(host)			\
-+	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_clear_cmd_error_is_pending(host)		\
-+	test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events)
-+#define mci_clear_data_is_pending(host)			\
-+	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
-+#define mci_clear_data_error_is_pending(host)		\
-+	test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events)
-+#define mci_clear_stop_sent_is_pending(host)		\
-+	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
-+#define mci_clear_stop_is_pending(host)			\
-+	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_clear_stop_error_is_pending(host)		\
-+	test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events)
-+#define mci_clear_dma_error_is_pending(host)		\
-+	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
-+#define mci_clear_card_detect_is_pending(host)		\
-+	test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events)
-+
-+/* Test and set bit macros for completed events */
-+#define mci_set_cmd_is_completed(host)			\
-+	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_set_cmd_error_is_completed(host)		\
-+	test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events)
-+#define mci_set_data_is_completed(host)			\
-+	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
-+#define mci_set_data_error_is_completed(host)		\
-+	test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events)
-+#define mci_set_stop_sent_is_completed(host)		\
-+	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
-+#define mci_set_stop_is_completed(host)			\
-+	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_set_stop_error_is_completed(host)		\
-+	test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events)
-+#define mci_set_dma_error_is_completed(host)		\
-+	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
-+#define mci_set_card_detect_is_completed(host)		\
-+	test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events)
-+
-+/* Set bit macros for completed events */
-+#define mci_set_cmd_complete(host)			\
-+	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_set_cmd_error_complete(host)		\
-+	set_bit(EVENT_CMD_ERROR, &host->completed_events)
-+#define mci_set_data_complete(host)			\
-+	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
-+#define mci_set_data_error_complete(host)		\
-+	set_bit(EVENT_DATA_ERROR, &host->completed_events)
-+#define mci_set_stop_sent_complete(host)		\
-+	set_bit(EVENT_STOP_SENT, &host->completed_events)
-+#define mci_set_stop_complete(host)			\
-+	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_set_stop_error_complete(host)		\
-+	set_bit(EVENT_STOP_ERROR, &host->completed_events)
-+#define mci_set_dma_error_complete(host)		\
-+	set_bit(EVENT_DMA_ERROR, &host->completed_events)
-+#define mci_set_card_detect_complete(host)		\
-+	set_bit(EVENT_CARD_DETECT, &host->completed_events)
-+
-+/* Set bit macros for pending events */
-+#define mci_set_cmd_pending(host)			\
-+	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_set_cmd_error_pending(host)			\
-+	set_bit(EVENT_CMD_ERROR, &host->pending_events)
-+#define mci_set_data_pending(host)			\
-+	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
-+#define mci_set_data_error_pending(host)		\
-+	set_bit(EVENT_DATA_ERROR, &host->pending_events)
-+#define mci_set_stop_sent_pending(host)			\
-+	set_bit(EVENT_STOP_SENT, &host->pending_events)
-+#define mci_set_stop_pending(host)			\
-+	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_set_stop_error_pending(host)		\
-+	set_bit(EVENT_STOP_ERROR, &host->pending_events)
-+#define mci_set_dma_error_pending(host)			\
-+	set_bit(EVENT_DMA_ERROR, &host->pending_events)
-+#define mci_set_card_detect_pending(host)		\
-+	set_bit(EVENT_CARD_DETECT, &host->pending_events)
-+
-+/* Clear bit macros for pending events */
-+#define mci_clear_cmd_pending(host)			\
-+	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_clear_cmd_error_pending(host)		\
-+	clear_bit(EVENT_CMD_ERROR, &host->pending_events)
-+#define mci_clear_data_pending(host)			\
-+	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
-+#define mci_clear_data_error_pending(host)		\
-+	clear_bit(EVENT_DATA_ERROR, &host->pending_events)
-+#define mci_clear_stop_sent_pending(host)		\
-+	clear_bit(EVENT_STOP_SENT, &host->pending_events)
-+#define mci_clear_stop_pending(host)			\
-+	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_clear_stop_error_pending(host)		\
-+	clear_bit(EVENT_STOP_ERROR, &host->pending_events)
-+#define mci_clear_dma_error_pending(host)		\
-+	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
-+#define mci_clear_card_detect_pending(host)		\
-+	clear_bit(EVENT_CARD_DETECT, &host->pending_events)
-+
-+
-+#ifdef CONFIG_DEBUG_FS
-+#include <linux/debugfs.h>
-+
-+#define DBG_REQ_BUF_SIZE	(4096 - sizeof(unsigned int))
-+
-+struct req_dbg_data {
-+	unsigned int nbytes;
-+	char str[DBG_REQ_BUF_SIZE];
-+};
-+
-+static int req_dbg_open(struct inode *inode, struct file *file)
-+{
-+	struct atmel_mci *host;
-+	struct mmc_request *mrq;
-+	struct mmc_command *cmd, *stop;
-+	struct mmc_data *data;
-+	struct req_dbg_data *priv;
-+	char *str;
-+	unsigned long n = 0;
-+
-+	priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+	str = priv->str;
-+
-+	mutex_lock(&inode->i_mutex);
-+	host = inode->i_private;
-+
-+	spin_lock_irq(&host->mmc->lock);
-+	mrq = host->mrq;
-+	if (mrq) {
-+		cmd = mrq->cmd;
-+		data = mrq->data;
-+		stop = mrq->stop;
-+		n = snprintf(str, DBG_REQ_BUF_SIZE,
-+			     "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
-+			     cmd->opcode, cmd->arg, cmd->flags,
-+			     cmd->resp[0], cmd->resp[1], cmd->resp[2],
-+			     cmd->resp[3], cmd->error);
-+		if (n < DBG_REQ_BUF_SIZE && data)
-+			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
-+				      "DATA %u * %u (%u) %x (err %u)\n",
-+				      data->blocks, data->blksz,
-+				      data->bytes_xfered, data->flags,
-+				      data->error);
-+		if (n < DBG_REQ_BUF_SIZE && stop)
-+			n += snprintf(str + n, DBG_REQ_BUF_SIZE - n,
-+				      "CMD%u(0x%x) %x %x %x %x %x (err %u)\n",
-+				      stop->opcode, stop->arg, stop->flags,
-+				      stop->resp[0], stop->resp[1],
-+				      stop->resp[2], stop->resp[3],
-+				      stop->error);
-+	}
-+	spin_unlock_irq(&host->mmc->lock);
-+	mutex_unlock(&inode->i_mutex);
-+
-+	priv->nbytes = min(n, DBG_REQ_BUF_SIZE);
-+	file->private_data = priv;
-+
-+	return 0;
-+}
-+
-+static ssize_t req_dbg_read(struct file *file, char __user *buf,
-+			    size_t nbytes, loff_t *ppos)
-+{
-+	struct req_dbg_data *priv = file->private_data;
-+
-+	return simple_read_from_buffer(buf, nbytes, ppos,
-+				       priv->str, priv->nbytes);
-+}
-+
-+static int req_dbg_release(struct inode *inode, struct file *file)
-+{
-+	kfree(file->private_data);
-+	return 0;
-+}
-+
-+static const struct file_operations req_dbg_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= req_dbg_open,
-+	.llseek		= no_llseek,
-+	.read		= req_dbg_read,
-+	.release	= req_dbg_release,
-+};
-+
-+static int regs_dbg_open(struct inode *inode, struct file *file)
-+{
-+	struct atmel_mci *host;
-+	unsigned int i;
-+	u32 *data;
-+	int ret = -ENOMEM;
-+
-+	mutex_lock(&inode->i_mutex);
-+	host = inode->i_private;
-+	data = kmalloc(inode->i_size, GFP_KERNEL);
-+	if (!data)
-+		goto out;
-+
-+	spin_lock_irq(&host->mmc->lock);
-+	for (i = 0; i < inode->i_size / 4; i++)
-+		data[i] = __raw_readl(host->regs + i * 4);
-+	spin_unlock_irq(&host->mmc->lock);
-+
-+	file->private_data = data;
-+	ret = 0;
-+
-+out:
-+	mutex_unlock(&inode->i_mutex);
-+
-+	return ret;
-+}
-+
-+static ssize_t regs_dbg_read(struct file *file, char __user *buf,
-+			     size_t nbytes, loff_t *ppos)
-+{
-+	struct inode *inode = file->f_dentry->d_inode;
-+	int ret;
-+
-+	mutex_lock(&inode->i_mutex);
-+	ret = simple_read_from_buffer(buf, nbytes, ppos,
-+				      file->private_data,
-+				      file->f_dentry->d_inode->i_size);
-+	mutex_unlock(&inode->i_mutex);
-+
-+	return ret;
-+}
-+
-+static int regs_dbg_release(struct inode *inode, struct file *file)
-+{
-+	kfree(file->private_data);
-+	return 0;
-+}
-+
-+static const struct file_operations regs_dbg_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= regs_dbg_open,
-+	.llseek		= generic_file_llseek,
-+	.read		= regs_dbg_read,
-+	.release	= regs_dbg_release,
-+};
-+
-+static void atmci_init_debugfs(struct atmel_mci *host)
-+{
-+	struct mmc_host *mmc;
-+	struct dentry *root, *regs;
-+	struct resource *res;
-+
-+	mmc = host->mmc;
-+	root = debugfs_create_dir(mmc_hostname(mmc), NULL);
-+	if (IS_ERR(root) || !root)
-+		goto err_root;
-+	host->debugfs_root = root;
-+
-+	regs = debugfs_create_file("regs", 0400, root, host, &regs_dbg_fops);
-+	if (!regs)
-+		goto err_regs;
-+
-+	res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
-+	regs->d_inode->i_size = res->end - res->start + 1;
-+	host->debugfs_regs = regs;
-+
-+	host->debugfs_req = debugfs_create_file("req", 0400, root,
-+						host, &req_dbg_fops);
-+	if (!host->debugfs_req)
-+		goto err_req;
-+
-+	host->debugfs_pending_events
-+		= debugfs_create_u32("pending_events", 0400, root,
-+				     (u32 *)&host->pending_events);
-+	if (!host->debugfs_pending_events)
-+		goto err_pending_events;
-+
-+	host->debugfs_completed_events
-+		= debugfs_create_u32("completed_events", 0400, root,
-+				     (u32 *)&host->completed_events);
-+	if (!host->debugfs_completed_events)
-+		goto err_completed_events;
-+
-+	return;
-+
-+err_completed_events:
-+	debugfs_remove(host->debugfs_pending_events);
-+err_pending_events:
-+	debugfs_remove(host->debugfs_req);
-+err_req:
-+	debugfs_remove(host->debugfs_regs);
-+err_regs:
-+	debugfs_remove(host->debugfs_root);
-+err_root:
-+	host->debugfs_root = NULL;
-+	dev_err(&host->pdev->dev,
-+		"failed to initialize debugfs for %s\n",
-+		mmc_hostname(mmc));
-+}
-+
-+static void atmci_cleanup_debugfs(struct atmel_mci *host)
-+{
-+	if (host->debugfs_root) {
-+		debugfs_remove(host->debugfs_completed_events);
-+		debugfs_remove(host->debugfs_pending_events);
-+		debugfs_remove(host->debugfs_req);
-+		debugfs_remove(host->debugfs_regs);
-+		debugfs_remove(host->debugfs_root);
-+		host->debugfs_root = NULL;
-+	}
-+}
-+#else
-+static inline void atmci_init_debugfs(struct atmel_mci *host)
-+{
-+
-+}
-+
-+static inline void atmci_cleanup_debugfs(struct atmel_mci *host)
-+{
-+
-+}
-+#endif /* CONFIG_DEBUG_FS */
-+
-+static inline unsigned int ns_to_clocks(struct atmel_mci *host,
-+					unsigned int ns)
-+{
-+	return (ns * (host->bus_hz / 1000000) + 999) / 1000;
-+}
-+
-+static void atmci_set_timeout(struct atmel_mci *host,
-+			      struct mmc_data *data)
-+{
-+	static unsigned dtomul_to_shift[] = {
-+		0, 4, 7, 8, 10, 12, 16, 20
-+	};
-+	unsigned timeout;
-+	unsigned dtocyc, dtomul;
-+
-+	timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
-+
-+	for (dtomul = 0; dtomul < 8; dtomul++) {
-+		unsigned shift = dtomul_to_shift[dtomul];
-+		dtocyc = (timeout + (1 << shift) - 1) >> shift;
-+		if (dtocyc < 15)
-+			break;
-+	}
-+
-+	if (dtomul >= 8) {
-+		dtomul = 7;
-+		dtocyc = 15;
-+	}
-+
-+	pr_debug("%s: setting timeout to %u cycles\n",
-+		 mmc_hostname(host->mmc),
-+		 dtocyc << dtomul_to_shift[dtomul]);
-+	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
-+				| MCI_BF(DTOCYC, dtocyc)));
-+}
-+
-+/*
-+ * Return mask with interrupt flags to be handled for this command.
-+ */
-+static u32 atmci_prepare_command(struct mmc_host *mmc,
-+				 struct mmc_command *cmd,
-+				 u32 *cmd_flags)
-+{
-+	u32 cmdr;
-+	u32 iflags;
-+
-+	cmd->error = MMC_ERR_NONE;
-+
-+	cmdr = 0;
-+	BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0);
-+	cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr);
-+
-+	if (cmd->flags & MMC_RSP_PRESENT) {
-+		if (cmd->flags & MMC_RSP_136)
-+			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT);
-+		else
-+			cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT);
-+	}
-+
-+	/*
-+	 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
-+	 * it's too difficult to determine whether this is an ACMD or
-+	 * not. Better make it 64.
-+	 */
-+	cmdr |= MCI_BIT(MAXLAT);
-+
-+	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
-+		cmdr |= MCI_BIT(OPDCMD);
-+
-+	iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS;
-+	if (!(cmd->flags & MMC_RSP_CRC))
-+		iflags &= ~MCI_BIT(RCRCE);
-+
-+	pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
-+		 mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags,
-+		 (unsigned long)cmdr);
-+
-+	*cmd_flags = cmdr;
-+	return iflags;
-+}
-+
-+static void atmci_start_command(struct atmel_mci *host,
-+				struct mmc_command *cmd,
-+				u32 cmd_flags)
-+{
-+	WARN_ON(host->cmd);
-+	host->cmd = cmd;
-+
-+	mci_writel(host, ARGR, cmd->arg);
-+	mci_writel(host, CMDR, cmd_flags);
-+
-+	if (cmd->data)
-+		dma_start_request(host->dma.req.req.dmac,
-+				  host->dma.req.req.channel);
-+}
-+
-+/*
-+ * Returns a mask of flags to be set in the command register when the
-+ * command to start the transfer is to be sent.
-+ */
-+static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data)
-+{
-+	struct atmel_mci *host = mmc_priv(mmc);
-+	u32 cmd_flags;
-+
-+	WARN_ON(host->data);
-+	host->data = data;
-+
-+	atmci_set_timeout(host, data);
-+	mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks)
-+				| MCI_BF(BLKLEN, data->blksz)));
-+	host->dma.req.block_size = data->blksz;
-+	host->dma.req.nr_blocks = data->blocks;
-+
-+	cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS);
-+	if (data->flags & MMC_DATA_STREAM)
-+		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
-+	else if (data->blocks > 1)
-+		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
-+	else
-+		cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK);
-+
-+	if (data->flags & MMC_DATA_READ) {
-+		cmd_flags |= MCI_BIT(TRDIR);
-+		host->dma.req.nr_sg
-+			= dma_map_sg(&host->pdev->dev, data->sg,
-+				     data->sg_len, DMA_FROM_DEVICE);
-+		host->dma.req.periph_id = host->dma.rx_periph_id;
-+		host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM;
-+		host->dma.req.data_reg = host->mapbase + MCI_RDR;
-+	} else {
-+		host->dma.req.nr_sg
-+			= dma_map_sg(&host->pdev->dev, data->sg,
-+				     data->sg_len, DMA_TO_DEVICE);
-+		host->dma.req.periph_id = host->dma.tx_periph_id;
-+		host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH;
-+		host->dma.req.data_reg = host->mapbase + MCI_TDR;
-+	}
-+	host->dma.req.sg = data->sg;
-+
-+	dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req);
-+
-+	return cmd_flags;
-+}
-+
-+static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
-+{
-+	struct atmel_mci *host = mmc_priv(mmc);
-+	struct mmc_data *data = mrq->data;
-+	u32 iflags;
-+	u32 cmdflags = 0;
-+
-+	iflags = mci_readl(host, IMR);
-+	if (iflags)
-+		printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR));
-+
-+	WARN_ON(host->mrq != NULL);
-+	host->mrq = mrq;
-+	host->pending_events = 0;
-+	host->completed_events = 0;
-+
-+	iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags);
-+
-+	if (mrq->stop) {
-+		BUG_ON(!data);
-+
-+		host->stop_iflags = atmci_prepare_command(mmc, mrq->stop,
-+							  &host->stop_cmdr);
-+		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
-+		if (!(data->flags & MMC_DATA_WRITE))
-+			host->stop_cmdr |= MCI_BIT(TRDIR);
-+		if (data->flags & MMC_DATA_STREAM)
-+			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM);
-+		else
-+			host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK);
-+	}
-+	if (data) {
-+		cmdflags |= atmci_prepare_data(mmc, data);
-+		iflags |= MCI_DATA_ERROR_FLAGS;
-+	}
-+
-+	atmci_start_command(host, mrq->cmd, cmdflags);
-+	mci_writel(host, IER, iflags);
-+}
-+
-+static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
-+{
-+	struct atmel_mci *host = mmc_priv(mmc);
-+
-+	if (ios->clock) {
-+		u32 clkdiv;
-+
-+		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
-+		if (clkdiv > 255)
-+			clkdiv = 255;
-+		mci_writel(host, MR, (clkdiv
-+				      | MCI_BIT(WRPROOF)
-+				      | MCI_BIT(RDPROOF)));
-+	}
-+
-+	switch (ios->bus_width) {
-+	case MMC_BUS_WIDTH_1:
-+		mci_writel(host, SDCR, 0);
-+		break;
-+	case MMC_BUS_WIDTH_4:
-+		mci_writel(host, SDCR, MCI_BIT(SDCBUS));
-+		break;
-+	}
-+
-+	switch (ios->power_mode) {
-+	case MMC_POWER_OFF:
-+		mci_writel(host, CR, MCI_BIT(MCIDIS));
-+		break;
-+	case MMC_POWER_UP:
-+		mci_writel(host, CR, MCI_BIT(SWRST));
-+		break;
-+	case MMC_POWER_ON:
-+		mci_writel(host, CR, MCI_BIT(MCIEN));
-+		break;
-+	}
-+}
-+
-+static int atmci_get_ro(struct mmc_host *mmc)
-+{
-+	int read_only = 0;
-+	struct atmel_mci *host = mmc_priv(mmc);
-+
-+	if (host->wp_pin >= 0) {
-+		read_only = gpio_get_value(host->wp_pin);
-+		pr_debug("%s: card is %s\n", mmc_hostname(mmc),
-+			 read_only ? "read-only" : "read-write");
-+	} else {
-+		pr_debug("%s: no pin for checking read-only switch."
-+			 " Assuming write-enable.\n", mmc_hostname(mmc));
-+	}
-+
-+	return read_only;
-+}
-+
-+static struct mmc_host_ops atmci_ops = {
-+	.request	= atmci_request,
-+	.set_ios	= atmci_set_ios,
-+	.get_ro		= atmci_get_ro,
-+};
-+
-+static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
-+{
-+	struct atmel_mci *host = mmc_priv(mmc);
-+
-+	WARN_ON(host->cmd || host->data);
-+	host->mrq = NULL;
-+
-+	mmc_request_done(mmc, mrq);
-+}
-+
-+static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data,
-+			  u32 flags)
-+{
-+	struct atmel_mci *host = mmc_priv(mmc);
-+
-+	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
-+	mci_writel(host, IER, host->stop_iflags);
-+}
-+
-+static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
-+{
-+	host->data = NULL;
-+	dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg,
-+		     ((data->flags & MMC_DATA_WRITE)
-+		      ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
-+
-+	/*
-+	 * Data might complete before command for very short transfers
-+	 * (like READ_SCR)
-+	 */
-+	if (mci_cmd_is_complete(host)
-+	    && (!data->stop || mci_stop_is_complete(host)))
-+		atmci_request_end(host->mmc, data->mrq);
-+}
-+
-+static void atmci_command_error(struct mmc_host *mmc,
-+				struct mmc_command *cmd,
-+				u32 status)
-+{
-+	pr_debug("%s: command error: status=0x%08x\n",
-+		 mmc_hostname(mmc), status);
-+
-+	if (status & MCI_BIT(RTOE))
-+		cmd->error = MMC_ERR_TIMEOUT;
-+	else if (status & MCI_BIT(RCRCE))
-+		cmd->error = MMC_ERR_BADCRC;
-+	else
-+		cmd->error = MMC_ERR_FAILED;
-+}
-+
-+static void atmci_tasklet_func(unsigned long priv)
-+{
-+	struct mmc_host *mmc = (struct mmc_host *)priv;
-+	struct atmel_mci *host = mmc_priv(mmc);
-+	struct mmc_request *mrq = host->mrq;
-+	struct mmc_data *data = host->data;
-+
-+	pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n",
-+		 host->pending_events, host->completed_events,
-+		 mci_readl(host, IMR));
-+
-+	if (mci_clear_cmd_error_is_pending(host)) {
-+		struct mmc_command *cmd;
-+
-+		mci_set_cmd_error_complete(host);
-+		mci_clear_cmd_pending(host);
-+		cmd = host->mrq->cmd;
-+
-+		if (cmd->data) {
-+			dma_stop_request(host->dma.req.req.dmac,
-+					 host->dma.req.req.channel);
-+			host->data = NULL;
-+		}
-+
-+		atmci_command_error(mmc, cmd, host->error_status);
-+		atmci_request_end(mmc, cmd->mrq);
-+	}
-+	if (mci_clear_stop_error_is_pending(host)) {
-+		mci_set_stop_error_complete(host);
-+		mci_clear_stop_pending(host);
-+		atmci_command_error(mmc, host->mrq->stop,
-+				    host->error_status);
-+		if (!host->data)
-+			atmci_request_end(mmc, host->mrq);
-+	}
-+	if (mci_clear_cmd_is_pending(host)) {
-+		mci_set_cmd_complete(host);
-+		if (!mrq->data || mci_data_is_complete(host)
-+		    || mci_data_error_is_complete(host))
-+			atmci_request_end(mmc, mrq);
-+	}
-+	if (mci_clear_stop_is_pending(host)) {
-+		mci_set_stop_complete(host);
-+		if (mci_data_is_complete(host)
-+		    || mci_data_error_is_complete(host))
-+			atmci_request_end(mmc, mrq);
-+	}
-+	if (mci_clear_dma_error_is_pending(host)) {
-+		mci_set_dma_error_complete(host);
-+		mci_clear_data_pending(host);
-+
-+		/* DMA controller got bus error => invalid address */
-+		data->error = MMC_ERR_INVALID;
-+
-+		printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n",
-+		       mmc_hostname(mmc), host->data->bytes_xfered);
-+
-+		if (data->stop
-+		    && !mci_set_stop_sent_is_completed(host))
-+			/* TODO: Check if card is still present */
-+			send_stop_cmd(host->mmc, data, 0);
-+
-+		atmci_data_complete(host, data);
-+	}
-+	if (mci_clear_data_error_is_pending(host)) {
-+		u32 status = host->error_status;
-+
-+		mci_set_data_error_complete(host);
-+		mci_clear_data_pending(host);
-+
-+		dma_stop_request(host->dma.req.req.dmac,
-+				 host->dma.req.req.channel);
-+
-+		printk(KERN_DEBUG "%s: data error: status=0x%08x\n",
-+		       mmc_hostname(host->mmc), status);
-+
-+		if (status & MCI_BIT(DCRCE)) {
-+			printk(KERN_DEBUG "%s: Data CRC error\n",
-+			       mmc_hostname(host->mmc));
-+			data->error = MMC_ERR_BADCRC;
-+		} else if (status & MCI_BIT(DTOE)) {
-+			printk(KERN_DEBUG "%s: Data Timeout error\n",
-+			       mmc_hostname(host->mmc));
-+			data->error = MMC_ERR_TIMEOUT;
-+		} else {
-+			printk(KERN_DEBUG "%s: Data FIFO error\n",
-+			       mmc_hostname(host->mmc));
-+			data->error = MMC_ERR_FIFO;
-+		}
-+		printk(KERN_DEBUG "%s: Bytes xfered: %u\n",
-+		       mmc_hostname(host->mmc), data->bytes_xfered);
-+
-+		if (data->stop
-+		    && !mci_set_stop_sent_is_completed(host))
-+			/* TODO: Check if card is still present */
-+			send_stop_cmd(host->mmc, data, 0);
-+
-+		atmci_data_complete(host, data);
-+	}
-+	if (mci_clear_data_is_pending(host)) {
-+		mci_set_data_complete(host);
-+		data->bytes_xfered = data->blocks * data->blksz;
-+		atmci_data_complete(host, data);
-+	}
-+	if (mci_clear_card_detect_is_pending(host)) {
-+		/* Reset controller if card is gone */
-+		if (!host->present) {
-+			mci_writel(host, CR, MCI_BIT(SWRST));
-+			mci_writel(host, IDR, ~0UL);
-+			mci_writel(host, CR, MCI_BIT(MCIEN));
-+		}
-+
-+		/* Clean up queue if present */
-+		if (mrq) {
-+			if (!mci_cmd_is_complete(host)
-+			    && !mci_cmd_error_is_complete(host)) {
-+				mrq->cmd->error = MMC_ERR_TIMEOUT;
-+			}
-+			if (mrq->data && !mci_data_is_complete(host)
-+			    && !mci_data_error_is_complete(host)) {
-+				dma_stop_request(host->dma.req.req.dmac,
-+						host->dma.req.req.channel);
-+				host->data->error = MMC_ERR_TIMEOUT;
-+				atmci_data_complete(host, data);
-+			}
-+			if (mrq->stop && !mci_stop_is_complete(host)
-+			    && !mci_stop_error_is_complete(host)) {
-+				mrq->stop->error = MMC_ERR_TIMEOUT;
-+			}
-+
-+			host->cmd = NULL;
-+			atmci_request_end(mmc, mrq);
-+		}
-+		mmc_detect_change(host->mmc, msecs_to_jiffies(100));
-+	}
-+}
-+
-+static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
-+{
-+	struct atmel_mci *host = mmc_priv(mmc);
-+	struct mmc_command *cmd = host->cmd;
-+
-+	/*
-+	 * Read the response now so that we're free to send a new
-+	 * command immediately.
-+	 */
-+	cmd->resp[0] = mci_readl(host, RSPR);
-+	cmd->resp[1] = mci_readl(host, RSPR);
-+	cmd->resp[2] = mci_readl(host, RSPR);
-+	cmd->resp[3] = mci_readl(host, RSPR);
-+
-+	mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS);
-+	host->cmd = NULL;
-+
-+	if (mci_stop_sent_is_complete(host))
-+		mci_set_stop_pending(host);
-+	else
-+		mci_set_cmd_pending(host);
-+
-+	tasklet_schedule(&host->tasklet);
-+}
-+
-+static void atmci_xfer_complete(struct dma_request *_req)
-+{
-+	struct dma_request_sg *req = to_dma_request_sg(_req);
-+	struct atmel_mci_dma *dma;
-+	struct atmel_mci *host;
-+	struct mmc_data *data;
-+
-+	dma = container_of(req, struct atmel_mci_dma, req);
-+	host = container_of(dma, struct atmel_mci, dma);
-+	data = host->data;
-+
-+	if (data->stop && !mci_set_stop_sent_is_completed(host))
-+		send_stop_cmd(host->mmc, data, 0);
-+
-+	if (data->flags & MMC_DATA_READ) {
-+		mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS);
-+		mci_set_data_pending(host);
-+		tasklet_schedule(&host->tasklet);
-+	} else {
-+		/*
-+		 * For the WRITE case, wait for NOTBUSY. This function
-+		 * is called when everything has been written to the
-+		 * controller, not when the card is done programming.
-+		 */
-+		mci_writel(host, IER, MCI_BIT(NOTBUSY));
-+	}
-+}
-+
-+static void atmci_dma_error(struct dma_request *_req)
-+{
-+	struct dma_request_sg *req = to_dma_request_sg(_req);
-+	struct atmel_mci_dma *dma;
-+	struct atmel_mci *host;
-+
-+	dma = container_of(req, struct atmel_mci_dma, req);
-+	host = container_of(dma, struct atmel_mci, dma);
-+
-+	mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
-+			       | MCI_DATA_ERROR_FLAGS));
-+
-+	mci_set_dma_error_pending(host);
-+	tasklet_schedule(&host->tasklet);
-+}
-+
-+static irqreturn_t atmci_interrupt(int irq, void *dev_id)
-+{
-+	struct mmc_host *mmc = dev_id;
-+	struct atmel_mci *host = mmc_priv(mmc);
-+	u32 status, mask, pending;
-+
-+	spin_lock(&mmc->lock);
-+
-+	status = mci_readl(host, SR);
-+	mask = mci_readl(host, IMR);
-+	pending = status & mask;
-+
-+	do {
-+		if (pending & MCI_CMD_ERROR_FLAGS) {
-+			mci_writel(host, IDR, (MCI_BIT(CMDRDY)
-+					       | MCI_BIT(NOTBUSY)
-+					       | MCI_CMD_ERROR_FLAGS
-+					       | MCI_DATA_ERROR_FLAGS));
-+			host->error_status = status;
-+			host->cmd = NULL;
-+			if (mci_stop_sent_is_complete(host))
-+				mci_set_stop_error_pending(host);
-+			else
-+				mci_set_cmd_error_pending(host);
-+			tasklet_schedule(&host->tasklet);
-+			break;
-+		}
-+		if (pending & MCI_DATA_ERROR_FLAGS) {
-+			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
-+					       | MCI_DATA_ERROR_FLAGS));
-+			host->error_status = status;
-+			mci_set_data_error_pending(host);
-+			tasklet_schedule(&host->tasklet);
-+			break;
-+		}
-+		if (pending & MCI_BIT(CMDRDY))
-+			atmci_cmd_interrupt(mmc, status);
-+		if (pending & MCI_BIT(NOTBUSY)) {
-+			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
-+					       | MCI_DATA_ERROR_FLAGS));
-+			mci_set_data_pending(host);
-+			tasklet_schedule(&host->tasklet);
-+		}
-+
-+		status = mci_readl(host, SR);
-+		mask = mci_readl(host, IMR);
-+		pending = status & mask;
-+	} while (pending);
-+
-+	spin_unlock(&mmc->lock);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t atmci_detect_change(int irq, void *dev_id)
-+{
-+	struct mmc_host *mmc = dev_id;
-+	struct atmel_mci *host = mmc_priv(mmc);
-+
-+	int present = !gpio_get_value(irq_to_gpio(irq));
-+
-+	if (present != host->present) {
-+		pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
-+			 present ? "inserted" : "removed");
-+		host->present = present;
-+		mci_set_card_detect_pending(host);
-+		tasklet_schedule(&host->tasklet);
-+	}
-+	return IRQ_HANDLED;
-+}
-+
-+static int __devinit atmci_probe(struct platform_device *pdev)
-+{
-+	struct mci_platform_data *board;
-+	struct atmel_mci *host;
-+	struct mmc_host *mmc;
-+	struct resource *regs;
-+	int irq;
-+	int ret;
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs)
-+		return -ENXIO;
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0)
-+		return irq;
-+
-+	board = pdev->dev.platform_data;
-+
-+	mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
-+	if (!mmc)
-+		return -ENOMEM;
-+
-+	host = mmc_priv(mmc);
-+	host->pdev = pdev;
-+	host->mmc = mmc;
-+	if (board) {
-+		host->detect_pin = board->detect_pin;
-+		host->wp_pin = board->wp_pin;
-+	} else {
-+		host->detect_pin = -1;
-+		host->detect_pin = -1;
-+	}
-+
-+	host->mck = clk_get(&pdev->dev, "mci_clk");
-+	if (IS_ERR(host->mck)) {
-+		ret = PTR_ERR(host->mck);
-+		goto out_free_host;
-+	}
-+	clk_enable(host->mck);
-+
-+	ret = -ENOMEM;
-+	host->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!host->regs)
-+		goto out_disable_clk;
-+
-+	host->bus_hz = clk_get_rate(host->mck);
-+	host->mapbase = regs->start;
-+
-+	mmc->ops = &atmci_ops;
-+	mmc->f_min = (host->bus_hz + 511) / 512;
-+	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
-+	mmc->ocr_avail	= 0x00100000;
-+	mmc->caps |= MMC_CAP_4_BIT_DATA;
-+
-+	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
-+
-+	ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc);
-+	if (ret)
-+		goto out_unmap;
-+
-+	/* Assume card is present if we don't have a detect pin */
-+	host->present = 1;
-+	if (host->detect_pin >= 0) {
-+		if (gpio_request(host->detect_pin, "mmc_detect")) {
-+			printk(KERN_WARNING "%s: no detect pin available\n",
-+			       mmc_hostname(host->mmc));
-+			host->detect_pin = -1;
-+		} else {
-+			host->present = !gpio_get_value(host->detect_pin);
-+		}
-+	}
-+	if (host->wp_pin >= 0) {
-+		if (gpio_request(host->wp_pin, "mmc_wp")) {
-+			printk(KERN_WARNING "%s: no WP pin available\n",
-+			       mmc_hostname(host->mmc));
-+			host->wp_pin = -1;
-+		}
-+	}
-+
-+	/* TODO: Get this information from platform data */
-+	ret = -ENOMEM;
-+	host->dma.req.req.dmac = find_dma_controller(0);
-+	if (!host->dma.req.req.dmac) {
-+		printk(KERN_ERR
-+		       "mmci: No DMA controller available, aborting\n");
-+		goto out_free_irq;
-+	}
-+	ret = dma_alloc_channel(host->dma.req.req.dmac);
-+	if (ret < 0) {
-+		printk(KERN_ERR
-+		       "mmci: Unable to allocate DMA channel, aborting\n");
-+		goto out_free_irq;
-+	}
-+	host->dma.req.req.channel = ret;
-+	host->dma.req.width = DMA_WIDTH_32BIT;
-+	host->dma.req.req.xfer_complete = atmci_xfer_complete;
-+	host->dma.req.req.block_complete = NULL; // atmci_block_complete;
-+	host->dma.req.req.error = atmci_dma_error;
-+	host->dma.rx_periph_id = 0;
-+	host->dma.tx_periph_id = 1;
-+
-+	mci_writel(host, CR, MCI_BIT(SWRST));
-+	mci_writel(host, IDR, ~0UL);
-+	mci_writel(host, CR, MCI_BIT(MCIEN));
-+
-+	platform_set_drvdata(pdev, host);
-+
-+	mmc_add_host(mmc);
-+
-+	if (host->detect_pin >= 0) {
-+		ret = request_irq(gpio_to_irq(host->detect_pin),
-+				  atmci_detect_change,
-+				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
-+				  DRIVER_NAME, mmc);
-+		if (ret) {
-+			printk(KERN_ERR
-+			       "%s: could not request IRQ %d for detect pin\n",
-+			       mmc_hostname(mmc),
-+			       gpio_to_irq(host->detect_pin));
-+			gpio_free(host->detect_pin);
-+			host->detect_pin = -1;
-+		}
-+	}
-+
-+	printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n",
-+	       mmc_hostname(mmc), host->mapbase, irq);
-+
-+	atmci_init_debugfs(host);
-+
-+	return 0;
-+
-+out_free_irq:
-+	if (host->detect_pin >= 0)
-+		gpio_free(host->detect_pin);
-+	if (host->wp_pin >= 0)
-+		gpio_free(host->wp_pin);
-+	free_irq(irq, mmc);
-+out_unmap:
-+	iounmap(host->regs);
-+out_disable_clk:
-+	clk_disable(host->mck);
-+	clk_put(host->mck);
-+out_free_host:
-+	mmc_free_host(mmc);
-+	return ret;
-+}
-+
-+static int __devexit atmci_remove(struct platform_device *pdev)
-+{
-+	struct atmel_mci *host = platform_get_drvdata(pdev);
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	if (host) {
-+		atmci_cleanup_debugfs(host);
-+
-+		if (host->detect_pin >= 0) {
-+			free_irq(gpio_to_irq(host->detect_pin), host->mmc);
-+			cancel_delayed_work(&host->mmc->detect);
-+			gpio_free(host->detect_pin);
-+		}
-+
-+		mmc_remove_host(host->mmc);
-+
-+		mci_writel(host, IDR, ~0UL);
-+		mci_writel(host, CR, MCI_BIT(MCIDIS));
-+		mci_readl(host, SR);
-+
-+		dma_release_channel(host->dma.req.req.dmac,
-+				    host->dma.req.req.channel);
-+
-+		if (host->wp_pin >= 0)
-+			gpio_free(host->wp_pin);
-+
-+		free_irq(platform_get_irq(pdev, 0), host->mmc);
-+		iounmap(host->regs);
-+
-+		clk_disable(host->mck);
-+		clk_put(host->mck);
-+
-+		mmc_free_host(host->mmc);
-+	}
-+	return 0;
-+}
-+
-+static struct platform_driver atmci_driver = {
-+	.probe		= atmci_probe,
-+	.remove		= __devexit_p(atmci_remove),
-+	.driver		= {
-+		.name		= DRIVER_NAME,
-+	},
-+};
-+
-+static int __init atmci_init(void)
-+{
-+	return platform_driver_register(&atmci_driver);
-+}
-+
-+static void __exit atmci_exit(void)
-+{
-+	platform_driver_unregister(&atmci_driver);
-+}
-+
-+module_init(atmci_init);
-+module_exit(atmci_exit);
-+
-+MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/mmc/host/atmel-mci.h
-===================================================================
---- linux-2.6.22.1/drivers/mmc/host/atmel-mci.h	(revision 0)
-+++ linux-2.6.22.1/drivers/mmc/host/atmel-mci.h	(revision 0)
-@@ -0,0 +1,192 @@
-+/*
-+ * Atmel MultiMedia Card Interface driver
-+ *
-+ * Copyright (C) 2004-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __DRIVERS_MMC_ATMEL_MCI_H__
-+#define __DRIVERS_MMC_ATMEL_MCI_H__
-+
-+/* MCI register offsets */
-+#define MCI_CR					0x0000
-+#define MCI_MR					0x0004
-+#define MCI_DTOR				0x0008
-+#define MCI_SDCR				0x000c
-+#define MCI_ARGR				0x0010
-+#define MCI_CMDR				0x0014
-+#define MCI_BLKR				0x0018
-+#define MCI_RSPR				0x0020
-+#define MCI_RSPR1				0x0024
-+#define MCI_RSPR2				0x0028
-+#define MCI_RSPR3				0x002c
-+#define MCI_RDR					0x0030
-+#define MCI_TDR					0x0034
-+#define MCI_SR					0x0040
-+#define MCI_IER					0x0044
-+#define MCI_IDR					0x0048
-+#define MCI_IMR					0x004c
-+
-+/* Bitfields in CR */
-+#define MCI_MCIEN_OFFSET			0
-+#define MCI_MCIEN_SIZE				1
-+#define MCI_MCIDIS_OFFSET			1
-+#define MCI_MCIDIS_SIZE				1
-+#define MCI_PWSEN_OFFSET			2
-+#define MCI_PWSEN_SIZE				1
-+#define MCI_PWSDIS_OFFSET			3
-+#define MCI_PWSDIS_SIZE				1
-+#define MCI_SWRST_OFFSET			7
-+#define MCI_SWRST_SIZE				1
-+
-+/* Bitfields in MR */
-+#define MCI_CLKDIV_OFFSET			0
-+#define MCI_CLKDIV_SIZE				8
-+#define MCI_PWSDIV_OFFSET			8
-+#define MCI_PWSDIV_SIZE				3
-+#define MCI_RDPROOF_OFFSET			11
-+#define MCI_RDPROOF_SIZE			1
-+#define MCI_WRPROOF_OFFSET			12
-+#define MCI_WRPROOF_SIZE			1
-+#define MCI_DMAPADV_OFFSET			14
-+#define MCI_DMAPADV_SIZE			1
-+#define MCI_BLKLEN_OFFSET			16
-+#define MCI_BLKLEN_SIZE				16
-+
-+/* Bitfields in DTOR */
-+#define MCI_DTOCYC_OFFSET			0
-+#define MCI_DTOCYC_SIZE				4
-+#define MCI_DTOMUL_OFFSET			4
-+#define MCI_DTOMUL_SIZE				3
-+
-+/* Bitfields in SDCR */
-+#define MCI_SDCSEL_OFFSET			0
-+#define MCI_SDCSEL_SIZE				4
-+#define MCI_SDCBUS_OFFSET			7
-+#define MCI_SDCBUS_SIZE				1
-+
-+/* Bitfields in ARGR */
-+#define MCI_ARG_OFFSET				0
-+#define MCI_ARG_SIZE				32
-+
-+/* Bitfields in CMDR */
-+#define MCI_CMDNB_OFFSET			0
-+#define MCI_CMDNB_SIZE				6
-+#define MCI_RSPTYP_OFFSET			6
-+#define MCI_RSPTYP_SIZE				2
-+#define MCI_SPCMD_OFFSET			8
-+#define MCI_SPCMD_SIZE				3
-+#define MCI_OPDCMD_OFFSET			11
-+#define MCI_OPDCMD_SIZE				1
-+#define MCI_MAXLAT_OFFSET			12
-+#define MCI_MAXLAT_SIZE				1
-+#define MCI_TRCMD_OFFSET			16
-+#define MCI_TRCMD_SIZE				2
-+#define MCI_TRDIR_OFFSET			18
-+#define MCI_TRDIR_SIZE				1
-+#define MCI_TRTYP_OFFSET			19
-+#define MCI_TRTYP_SIZE				2
-+
-+/* Bitfields in BLKR */
-+#define MCI_BCNT_OFFSET				0
-+#define MCI_BCNT_SIZE				16
-+
-+/* Bitfields in RSPRn */
-+#define MCI_RSP_OFFSET				0
-+#define MCI_RSP_SIZE				32
-+
-+/* Bitfields in SR/IER/IDR/IMR */
-+#define MCI_CMDRDY_OFFSET			0
-+#define MCI_CMDRDY_SIZE				1
-+#define MCI_RXRDY_OFFSET			1
-+#define MCI_RXRDY_SIZE				1
-+#define MCI_TXRDY_OFFSET			2
-+#define MCI_TXRDY_SIZE				1
-+#define MCI_BLKE_OFFSET				3
-+#define MCI_BLKE_SIZE				1
-+#define MCI_DTIP_OFFSET				4
-+#define MCI_DTIP_SIZE				1
-+#define MCI_NOTBUSY_OFFSET			5
-+#define MCI_NOTBUSY_SIZE			1
-+#define MCI_ENDRX_OFFSET			6
-+#define MCI_ENDRX_SIZE				1
-+#define MCI_ENDTX_OFFSET			7
-+#define MCI_ENDTX_SIZE				1
-+#define MCI_RXBUFF_OFFSET			14
-+#define MCI_RXBUFF_SIZE				1
-+#define MCI_TXBUFE_OFFSET			15
-+#define MCI_TXBUFE_SIZE				1
-+#define MCI_RINDE_OFFSET			16
-+#define MCI_RINDE_SIZE				1
-+#define MCI_RDIRE_OFFSET			17
-+#define MCI_RDIRE_SIZE				1
-+#define MCI_RCRCE_OFFSET			18
-+#define MCI_RCRCE_SIZE				1
-+#define MCI_RENDE_OFFSET			19
-+#define MCI_RENDE_SIZE				1
-+#define MCI_RTOE_OFFSET				20
-+#define MCI_RTOE_SIZE				1
-+#define MCI_DCRCE_OFFSET			21
-+#define MCI_DCRCE_SIZE				1
-+#define MCI_DTOE_OFFSET				22
-+#define MCI_DTOE_SIZE				1
-+#define MCI_OVRE_OFFSET				30
-+#define MCI_OVRE_SIZE				1
-+#define MCI_UNRE_OFFSET				31
-+#define MCI_UNRE_SIZE				1
-+
-+/* Constants for DTOMUL */
-+#define MCI_DTOMUL_1_CYCLE			0
-+#define MCI_DTOMUL_16_CYCLES			1
-+#define MCI_DTOMUL_128_CYCLES			2
-+#define MCI_DTOMUL_256_CYCLES			3
-+#define MCI_DTOMUL_1024_CYCLES			4
-+#define MCI_DTOMUL_4096_CYCLES			5
-+#define MCI_DTOMUL_65536_CYCLES			6
-+#define MCI_DTOMUL_1048576_CYCLES		7
-+
-+/* Constants for RSPTYP */
-+#define MCI_RSPTYP_NO_RESP			0
-+#define MCI_RSPTYP_48_BIT			1
-+#define MCI_RSPTYP_136_BIT			2
-+
-+/* Constants for SPCMD */
-+#define MCI_SPCMD_NO_SPEC_CMD			0
-+#define MCI_SPCMD_INIT_CMD			1
-+#define MCI_SPCMD_SYNC_CMD			2
-+#define MCI_SPCMD_INT_CMD			4
-+#define MCI_SPCMD_INT_RESP			5
-+
-+/* Constants for TRCMD */
-+#define MCI_TRCMD_NO_TRANS			0
-+#define MCI_TRCMD_START_TRANS			1
-+#define MCI_TRCMD_STOP_TRANS			2
-+
-+/* Constants for TRTYP */
-+#define MCI_TRTYP_BLOCK				0
-+#define MCI_TRTYP_MULTI_BLOCK			1
-+#define MCI_TRTYP_STREAM			2
-+
-+/* Bit manipulation macros */
-+#define MCI_BIT(name)					\
-+	(1 << MCI_##name##_OFFSET)
-+#define MCI_BF(name,value)				\
-+	(((value) & ((1 << MCI_##name##_SIZE) - 1))	\
-+	 << MCI_##name##_OFFSET)
-+#define MCI_BFEXT(name,value)				\
-+	(((value) >> MCI_##name##_OFFSET)		\
-+	 & ((1 << MCI_##name##_SIZE) - 1))
-+#define MCI_BFINS(name,value,old)			\
-+	(((old) & ~(((1 << MCI_##name##_SIZE) - 1)	\
-+		    << MCI_##name##_OFFSET))		\
-+	 | MCI_BF(name,value))
-+
-+/* Register access macros */
-+#define mci_readl(port,reg)				\
-+	__raw_readl((port)->regs + MCI_##reg)
-+#define mci_writel(port,reg,value)			\
-+	__raw_writel((value), (port)->regs + MCI_##reg)
-+
-+#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
-Index: linux-2.6.22.1/drivers/mmc/host/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/mmc/host/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/mmc/host/Makefile	(arbetskopia)
-@@ -14,5 +14,6 @@
- obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
- obj-$(CONFIG_MMC_OMAP)		+= omap.o
- obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
-+obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
- obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
- 
-Index: linux-2.6.22.1/drivers/misc/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/misc/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/misc/Kconfig	(arbetskopia)
-@@ -187,5 +187,15 @@
- 
- 	  If you are not sure, say Y here.
- 
-+config ATMEL_SSC
-+	tristate "Device driver for Atmel SSC peripheral"
-+	depends on AVR32 || ARCH_AT91
-+	---help---
-+	  This option enables device driver support for Atmel Syncronized
-+	  Serial Communication peripheral (SSC).
- 
-+	  The SSC peripheral supports a wide variety of serial frame based
-+	  communications, i.e. I2S, SPI, etc.
-+
-+	  If unsure, say N.
- endmenu
-Index: linux-2.6.22.1/drivers/misc/atmel-ssc.c
-===================================================================
---- linux-2.6.22.1/drivers/misc/atmel-ssc.c	(revision 0)
-+++ linux-2.6.22.1/drivers/misc/atmel-ssc.c	(revision 0)
-@@ -0,0 +1,174 @@
-+/*
-+ * Atmel SSC driver
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/list.h>
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/list.h>
-+#include <linux/spinlock.h>
-+#include <linux/atmel-ssc.h>
-+
-+/* Serialize access to ssc_list and user count */
-+static DEFINE_SPINLOCK(user_lock);
-+static LIST_HEAD(ssc_list);
-+
-+struct ssc_device *ssc_request(unsigned int ssc_num)
-+{
-+	int ssc_valid = 0;
-+	struct ssc_device *ssc;
-+
-+	spin_lock(&user_lock);
-+	list_for_each_entry(ssc, &ssc_list, list) {
-+		if (ssc->pdev->id == ssc_num) {
-+			ssc_valid = 1;
-+			break;
-+		}
-+	}
-+
-+	if (!ssc_valid) {
-+		spin_unlock(&user_lock);
-+		dev_dbg(&ssc->pdev->dev, "could not find requested device\n");
-+		return ERR_PTR(-ENODEV);
-+	}
-+
-+	if (ssc->user) {
-+		spin_unlock(&user_lock);
-+		dev_dbg(&ssc->pdev->dev, "module busy\n");
-+		return ERR_PTR(-EBUSY);
-+	}
-+	ssc->user++;
-+	spin_unlock(&user_lock);
-+
-+	clk_enable(ssc->clk);
-+
-+	return ssc;
-+}
-+EXPORT_SYMBOL(ssc_request);
-+
-+void ssc_free(struct ssc_device *ssc)
-+{
-+	spin_lock(&user_lock);
-+	if (ssc->user) {
-+		ssc->user--;
-+		clk_disable(ssc->clk);
-+	} else {
-+		dev_dbg(&ssc->pdev->dev, "device already free\n");
-+	}
-+	spin_unlock(&user_lock);
-+}
-+EXPORT_SYMBOL(ssc_free);
-+
-+static int __init ssc_probe(struct platform_device *pdev)
-+{
-+	int retval = 0;
-+	struct resource *regs;
-+	struct ssc_device *ssc;
-+
-+	ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL);
-+	if (!ssc) {
-+		dev_dbg(&pdev->dev, "out of memory\n");
-+		retval = -ENOMEM;
-+		goto out;
-+	}
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs) {
-+		dev_dbg(&pdev->dev, "no mmio resource defined\n");
-+		retval = -ENXIO;
-+		goto out_free;
-+	}
-+
-+	ssc->clk = clk_get(&pdev->dev, "pclk");
-+	if (IS_ERR(ssc->clk)) {
-+		dev_dbg(&pdev->dev, "no pclk clock defined\n");
-+		retval = -ENXIO;
-+		goto out_free;
-+	}
-+
-+	ssc->pdev = pdev;
-+	ssc->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!ssc->regs) {
-+		dev_dbg(&pdev->dev, "ioremap failed\n");
-+		retval = -EINVAL;
-+		goto out_clk;
-+	}
-+
-+	/* disable all interrupts */
-+	clk_enable(ssc->clk);
-+	ssc_writel(ssc->regs, IDR, ~0UL);
-+	ssc_readl(ssc->regs, SR);
-+	clk_disable(ssc->clk);
-+
-+	ssc->irq = platform_get_irq(pdev, 0);
-+	if (!ssc->irq) {
-+		dev_dbg(&pdev->dev, "could not get irq\n");
-+		retval = -ENXIO;
-+		goto out_unmap;
-+	}
-+
-+	spin_lock(&user_lock);
-+	list_add_tail(&ssc->list, &ssc_list);
-+	spin_unlock(&user_lock);
-+
-+	platform_set_drvdata(pdev, ssc);
-+
-+	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
-+			ssc->regs, ssc->irq);
-+
-+	goto out;
-+
-+out_unmap:
-+	iounmap(ssc->regs);
-+out_clk:
-+	clk_put(ssc->clk);
-+out_free:
-+	kfree(ssc);
-+out:
-+	return retval;
-+}
-+
-+static int __devexit ssc_remove(struct platform_device *pdev)
-+{
-+	struct ssc_device *ssc = platform_get_drvdata(pdev);
-+
-+	spin_lock(&user_lock);
-+	iounmap(ssc->regs);
-+	clk_put(ssc->clk);
-+	list_del(&ssc->list);
-+	kfree(ssc);
-+	spin_unlock(&user_lock);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver ssc_driver = {
-+	.remove		= __devexit_p(ssc_remove),
-+	.driver		= {
-+		.name		= "ssc",
-+	},
-+};
-+
-+static int __init ssc_init(void)
-+{
-+	return platform_driver_probe(&ssc_driver, ssc_probe);
-+}
-+module_init(ssc_init);
-+
-+static void __exit ssc_exit(void)
-+{
-+	platform_driver_unregister(&ssc_driver);
-+}
-+module_exit(ssc_exit);
-+
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/misc/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/misc/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/misc/Makefile	(arbetskopia)
-@@ -14,3 +14,4 @@
- obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
- obj-$(CONFIG_SONY_LAPTOP)	+= sony-laptop.o
- obj-$(CONFIG_THINKPAD_ACPI)	+= thinkpad_acpi.o
-+obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
-Index: linux-2.6.22.1/drivers/rtc/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/rtc/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/rtc/Kconfig	(arbetskopia)
-@@ -379,6 +379,13 @@
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called rtc-pl031.
- 
-+config RTC_DRV_AT32AP700X
-+	tristate "AT32AP700X series RTC"
-+	depends on RTC_CLASS && PLATFORM_AT32AP
-+	help
-+	  Driver for the internal RTC (Realtime Clock) on Atmel AVR32
-+	  AT32AP700x family processors.
-+
- config RTC_DRV_AT91RM9200
- 	tristate "AT91RM9200"
- 	depends on RTC_CLASS && ARCH_AT91RM9200
-Index: linux-2.6.22.1/drivers/rtc/rtc-at32ap700x.c
-===================================================================
---- linux-2.6.22.1/drivers/rtc/rtc-at32ap700x.c	(revision 0)
-+++ linux-2.6.22.1/drivers/rtc/rtc-at32ap700x.c	(revision 0)
-@@ -0,0 +1,317 @@
-+/*
-+ * An RTC driver for the AVR32 AT32AP700x processor series.
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/rtc.h>
-+#include <linux/io.h>
-+
-+/*
-+ * This is a bare-bones RTC. It runs during most system sleep states, but has
-+ * no battery backup and gets reset during system restart.  It must be
-+ * initialized from an external clock (network, I2C, etc) before it can be of
-+ * much use.
-+ *
-+ * The alarm functionality is limited by the hardware, not supporting
-+ * periodic interrupts.
-+ */
-+
-+#define RTC_CTRL		0x00
-+#define RTC_CTRL_EN		   0
-+#define RTC_CTRL_PCLR		   1
-+#define RTC_CTRL_TOPEN		   2
-+#define RTC_CTRL_PSEL		   8
-+
-+#define RTC_VAL			0x04
-+
-+#define RTC_TOP			0x08
-+
-+#define RTC_IER			0x10
-+#define RTC_IER_TOPI		   0
-+
-+#define RTC_IDR			0x14
-+#define RTC_IDR_TOPI		   0
-+
-+#define RTC_IMR			0x18
-+#define RTC_IMR_TOPI		   0
-+
-+#define RTC_ISR			0x1c
-+#define RTC_ISR_TOPI		   0
-+
-+#define RTC_ICR			0x20
-+#define RTC_ICR_TOPI		   0
-+
-+#define RTC_BIT(name)		(1 << RTC_##name)
-+#define RTC_BF(name, value)	((value) << RTC_##name)
-+
-+#define rtc_readl(dev, reg)				\
-+	__raw_readl((dev)->regs + RTC_##reg)
-+#define rtc_writel(dev, reg, value)			\
-+	__raw_writel((value), (dev)->regs + RTC_##reg)
-+
-+struct rtc_at32ap700x {
-+	struct rtc_device	*rtc;
-+	void __iomem		*regs;
-+	unsigned long		alarm_time;
-+	unsigned long		irq;
-+	/* Protect against concurrent register access. */
-+	spinlock_t		lock;
-+};
-+
-+static int at32_rtc_readtime(struct device *dev, struct rtc_time *tm)
-+{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	unsigned long now;
-+
-+	now = rtc_readl(rtc, VAL);
-+	rtc_time_to_tm(now, tm);
-+
-+	return 0;
-+}
-+
-+static int at32_rtc_settime(struct device *dev, struct rtc_time *tm)
-+{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	unsigned long now;
-+	int ret;
-+
-+	ret = rtc_tm_to_time(tm, &now);
-+	if (ret == 0)
-+		rtc_writel(rtc, VAL, now);
-+
-+	return ret;
-+}
-+
-+static int at32_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
-+{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+
-+	rtc_time_to_tm(rtc->alarm_time, &alrm->time);
-+	alrm->pending = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0;
-+
-+	return 0;
-+}
-+
-+static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
-+{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	unsigned long rtc_unix_time;
-+	unsigned long alarm_unix_time;
-+	int ret;
-+
-+	rtc_unix_time = rtc_readl(rtc, VAL);
-+
-+	ret = rtc_tm_to_time(&alrm->time, &alarm_unix_time);
-+	if (ret)
-+		return ret;
-+
-+	if (alarm_unix_time < rtc_unix_time)
-+		return -EINVAL;
-+
-+	spin_lock_irq(&rtc->lock);
-+	rtc->alarm_time = alarm_unix_time;
-+	rtc_writel(rtc, TOP, rtc->alarm_time);
-+	if (alrm->pending)
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				| RTC_BIT(CTRL_TOPEN));
-+	else
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				& ~RTC_BIT(CTRL_TOPEN));
-+	spin_unlock_irq(&rtc->lock);
-+
-+	return ret;
-+}
-+
-+static int at32_rtc_ioctl(struct device *dev, unsigned int cmd,
-+			unsigned long arg)
-+{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	int ret = 0;
-+
-+	spin_lock_irq(&rtc->lock);
-+
-+	switch (cmd) {
-+	case RTC_AIE_ON:
-+		if (rtc_readl(rtc, VAL) > rtc->alarm_time) {
-+			ret = -EINVAL;
-+			break;
-+		}
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				| RTC_BIT(CTRL_TOPEN));
-+		rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
-+		rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
-+		break;
-+	case RTC_AIE_OFF:
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				& ~RTC_BIT(CTRL_TOPEN));
-+		rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
-+		rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
-+		break;
-+	default:
-+		ret = -ENOIOCTLCMD;
-+		break;
-+	}
-+
-+	spin_unlock_irq(&rtc->lock);
-+
-+	return ret;
-+}
-+
-+static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id)
-+{
-+	struct rtc_at32ap700x *rtc = (struct rtc_at32ap700x *)dev_id;
-+	unsigned long isr = rtc_readl(rtc, ISR);
-+	unsigned long events = 0;
-+	int ret = IRQ_NONE;
-+
-+	spin_lock(&rtc->lock);
-+
-+	if (isr & RTC_BIT(ISR_TOPI)) {
-+		rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
-+		rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				& ~RTC_BIT(CTRL_TOPEN));
-+		rtc_writel(rtc, VAL, rtc->alarm_time);
-+		events = RTC_AF | RTC_IRQF;
-+		rtc_update_irq(rtc->rtc, 1, events);
-+		ret = IRQ_HANDLED;
-+	}
-+
-+	spin_unlock(&rtc->lock);
-+
-+	return ret;
-+}
-+
-+static struct rtc_class_ops at32_rtc_ops = {
-+	.ioctl		= at32_rtc_ioctl,
-+	.read_time	= at32_rtc_readtime,
-+	.set_time	= at32_rtc_settime,
-+	.read_alarm	= at32_rtc_readalarm,
-+	.set_alarm	= at32_rtc_setalarm,
-+};
-+
-+static int __init at32_rtc_probe(struct platform_device *pdev)
-+{
-+	struct resource	*regs;
-+	struct rtc_at32ap700x *rtc;
-+	int irq = -1;
-+	int ret;
-+
-+	rtc = kzalloc(sizeof(struct rtc_at32ap700x), GFP_KERNEL);
-+	if (!rtc) {
-+		dev_dbg(&pdev->dev, "out of memory\n");
-+		return -ENOMEM;
-+	}
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs) {
-+		dev_dbg(&pdev->dev, "no mmio resource defined\n");
-+		ret = -ENXIO;
-+		goto out;
-+	}
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		dev_dbg(&pdev->dev, "could not get irq\n");
-+		ret = -ENXIO;
-+		goto out;
-+	}
-+
-+	ret = request_irq(irq, at32_rtc_interrupt, IRQF_SHARED, "rtc", rtc);
-+	if (ret) {
-+		dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
-+		goto out;
-+	}
-+
-+	rtc->irq = irq;
-+	rtc->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!rtc->regs) {
-+		ret = -ENOMEM;
-+		dev_dbg(&pdev->dev, "could not map I/O memory\n");
-+		goto out_free_irq;
-+	}
-+	spin_lock_init(&rtc->lock);
-+
-+	/*
-+	 * Maybe init RTC: count from zero at 1 Hz, disable wrap irq.
-+	 *
-+	 * Do not reset VAL register, as it can hold an old time
-+	 * from last JTAG reset.
-+	 */
-+	if (!(rtc_readl(rtc, CTRL) & RTC_BIT(CTRL_EN))) {
-+		rtc_writel(rtc, CTRL, RTC_BIT(CTRL_PCLR));
-+		rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
-+		rtc_writel(rtc, CTRL, RTC_BF(CTRL_PSEL, 0xe)
-+				| RTC_BIT(CTRL_EN));
-+	}
-+
-+	rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
-+				&at32_rtc_ops, THIS_MODULE);
-+	if (IS_ERR(rtc->rtc)) {
-+		dev_dbg(&pdev->dev, "could not register rtc device\n");
-+		ret = PTR_ERR(rtc->rtc);
-+		goto out_iounmap;
-+	}
-+
-+	platform_set_drvdata(pdev, rtc);
-+
-+	dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n",
-+			(unsigned long)rtc->regs, rtc->irq);
-+
-+	return 0;
-+
-+out_iounmap:
-+	iounmap(rtc->regs);
-+out_free_irq:
-+	free_irq(irq, rtc);
-+out:
-+	kfree(rtc);
-+	return ret;
-+}
-+
-+static int __exit at32_rtc_remove(struct platform_device *pdev)
-+{
-+	struct rtc_at32ap700x *rtc = platform_get_drvdata(pdev);
-+
-+	free_irq(rtc->irq, rtc);
-+	iounmap(rtc->regs);
-+	rtc_device_unregister(rtc->rtc);
-+	kfree(rtc);
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+MODULE_ALIAS("at32ap700x_rtc");
-+
-+static struct platform_driver at32_rtc_driver = {
-+	.remove		= __exit_p(at32_rtc_remove),
-+	.driver		= {
-+		.name	= "at32ap700x_rtc",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init at32_rtc_init(void)
-+{
-+	return platform_driver_probe(&at32_rtc_driver, at32_rtc_probe);
-+}
-+module_init(at32_rtc_init);
-+
-+static void __exit at32_rtc_exit(void)
-+{
-+	platform_driver_unregister(&at32_rtc_driver);
-+}
-+module_exit(at32_rtc_exit);
-+
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("Real time clock for AVR32 AT32AP700x");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/rtc/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/rtc/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/rtc/Makefile	(arbetskopia)
-@@ -19,6 +19,7 @@
- obj-$(CONFIG_RTC_DRV_X1205)	+= rtc-x1205.o
- obj-$(CONFIG_RTC_DRV_ISL1208)	+= rtc-isl1208.o
- obj-$(CONFIG_RTC_DRV_TEST)	+= rtc-test.o
-+obj-$(CONFIG_RTC_DRV_AT32AP700X)	+= rtc-at32ap700x.o
- obj-$(CONFIG_RTC_DRV_DS1307)	+= rtc-ds1307.o
- obj-$(CONFIG_RTC_DRV_DS1672)	+= rtc-ds1672.o
- obj-$(CONFIG_RTC_DRV_DS1742)	+= rtc-ds1742.o
-Index: linux-2.6.22.1/drivers/char/watchdog/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/char/watchdog/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/char/watchdog/Kconfig	(arbetskopia)
-@@ -187,6 +187,26 @@
- 
- 	  Say N if you are unsure.
- 
-+# AVR32 Architecture
-+
-+config AT32AP700X_WDT
-+	tristate "AT32AP700x watchdog"
-+	depends on WATCHDOG && CPU_AT32AP7000
-+	help
-+	  Watchdog timer embedded into AT32AP700x devices. This will reboot
-+	  your system when the timeout is reached.
-+
-+config AT32AP700X_WDT_TIMEOUT
-+	int "Timeout value for AT32AP700x watchdog"
-+	depends on AT32AP700X_WDT
-+	default "2"
-+	range 1 2
-+	help
-+	  Sets the timeout value for the watchdog in AT32AP700x devices.
-+	  Limited by hardware to be 1 or 2 seconds.
-+
-+	  Set to 2 seconds by default.
-+
- # X86 (i386 + ia64 + x86_64) Architecture
- 
- config ACQUIRE_WDT
-Index: linux-2.6.22.1/drivers/char/watchdog/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/char/watchdog/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/char/watchdog/Makefile	(arbetskopia)
-@@ -36,6 +36,9 @@
- obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
- obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
- 
-+# AVR32 Architecture
-+obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
-+
- # X86 (i386 + ia64 + x86_64) Architecture
- obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
- obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
-Index: linux-2.6.22.1/drivers/char/watchdog/at32ap700x_wdt.c
-===================================================================
---- linux-2.6.22.1/drivers/char/watchdog/at32ap700x_wdt.c	(revision 0)
-+++ linux-2.6.22.1/drivers/char/watchdog/at32ap700x_wdt.c	(revision 0)
-@@ -0,0 +1,325 @@
-+/*
-+ * Watchdog driver for Atmel AT32AP700X devices
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/miscdevice.h>
-+#include <linux/fs.h>
-+#include <linux/platform_device.h>
-+#include <linux/watchdog.h>
-+#include <linux/uaccess.h>
-+#include <linux/io.h>
-+
-+#define TIMEOUT_MIN		1
-+#define TIMEOUT_DEFAULT		CONFIG_AT32AP700X_WDT_TIMEOUT
-+#define TIMEOUT_MAX		2
-+
-+/* Watchdog registers and write/read macro */
-+#define	WDT_CTRL		0x00
-+#define WDT_CTRL_EN		   0
-+#define WDT_CTRL_PSEL		   8
-+#define WDT_CTRL_KEY		  24
-+
-+#define WDT_CLR			0x04
-+
-+#define WDT_BIT(name)		(1 << WDT_##name)
-+#define WDT_BF(name,value)	((value) << WDT_##name)
-+
-+#define wdt_readl(dev,reg)				\
-+	__raw_readl((dev)->regs + WDT_##reg)
-+#define wdt_writel(dev,reg,value)			\
-+	__raw_writel((value), (dev)->regs + WDT_##reg)
-+
-+struct wdt_at32ap700x {
-+	void __iomem		*regs;
-+	int			timeout;
-+	int			users;
-+	struct miscdevice	miscdev;
-+};
-+
-+static struct wdt_at32ap700x *wdt;
-+
-+/*
-+ * Disable the watchdog.
-+ */
-+static void inline at32_wdt_stop(void)
-+{
-+	unsigned long psel = wdt_readl(wdt, CTRL) & WDT_BF(CTRL_PSEL, 0x0f);
-+	wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0x55));
-+	wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0xaa));
-+}
-+
-+/*
-+ * Enable and reset the watchdog.
-+ */
-+static void inline at32_wdt_start(void)
-+{
-+	/* 0xf is 2^16 divider = 2 sec, 0xe is 2^15 divider = 1 sec */
-+	unsigned long psel = (wdt->timeout > 1) ? 0xf : 0xe;
-+
-+	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
-+			| WDT_BF(CTRL_PSEL, psel)
-+			| WDT_BF(CTRL_KEY, 0x55));
-+	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
-+			| WDT_BF(CTRL_PSEL, psel)
-+			| WDT_BF(CTRL_KEY, 0xaa));
-+}
-+
-+/*
-+ * Pat the watchdog timer.
-+ */
-+static void inline at32_wdt_pat(void)
-+{
-+	wdt_writel(wdt, CLR, 0x42);
-+}
-+
-+/*
-+ * Watchdog device is opened, and watchdog starts running.
-+ */
-+static int at32_wdt_open(struct inode *inode, struct file *file)
-+{
-+	if (test_and_set_bit(1, &wdt->users))
-+		return -EBUSY;
-+
-+	at32_wdt_start();
-+	return nonseekable_open(inode, file);
-+}
-+
-+/*
-+ * Close the watchdog device. If CONFIG_WATCHDOG_NOWAYOUT is _not_ defined then
-+ * the watchdog is also disabled.
-+ */
-+static int at32_wdt_close(struct inode *inode, struct file *file)
-+{
-+#ifndef CONFIG_WATCHDOG_NOWAYOUT
-+	at32_wdt_stop();
-+#endif
-+	clear_bit(1, &wdt->users);
-+	return 0;
-+}
-+
-+/*
-+ * Change the watchdog time interval.
-+ */
-+static int at32_wdt_settimeout(int time)
-+{
-+	/*
-+	 * All counting occurs at 1 / SLOW_CLOCK (32 kHz) and max prescaler is
-+	 * 2 ^ 16 allowing up to 2 seconds timeout.
-+	 */
-+	if ((time < TIMEOUT_MIN) || (time > TIMEOUT_MAX))
-+		return -EINVAL;
-+
-+	/*
-+	 * Set new watchdog time. It will be used when at32_wdt_start() is
-+	 * called.
-+	 */
-+	wdt->timeout = time;
-+	return 0;
-+}
-+
-+static struct watchdog_info at32_wdt_info = {
-+	.identity	= "at32ap700x watchdog",
-+	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
-+};
-+
-+/*
-+ * Handle commands from user-space.
-+ */
-+static int at32_wdt_ioctl(struct inode *inode, struct file *file,
-+		unsigned int cmd, unsigned long arg)
-+{
-+	int ret = -ENOTTY;
-+	int time;
-+	void __user *argp = (void __user *)arg;
-+	int __user *p = argp;
-+
-+	switch (cmd) {
-+	case WDIOC_KEEPALIVE:
-+		at32_wdt_pat();
-+		ret = 0;
-+		break;
-+	case WDIOC_GETSUPPORT:
-+		ret = copy_to_user(argp, &at32_wdt_info,
-+				sizeof(at32_wdt_info)) ? -EFAULT : 0;
-+		break;
-+	case WDIOC_SETTIMEOUT:
-+		ret = get_user(time, p);
-+		if (ret)
-+			break;
-+		ret = at32_wdt_settimeout(time);
-+		if (ret)
-+			break;
-+		/* Enable new time value */
-+		at32_wdt_start();
-+		/* fall through */
-+	case WDIOC_GETTIMEOUT:
-+		ret = put_user(wdt->timeout, p);
-+		break;
-+	case WDIOC_GETSTATUS: /* fall through */
-+	case WDIOC_GETBOOTSTATUS:
-+		ret = put_user(0, p);
-+		break;
-+	case WDIOC_SETOPTIONS:
-+		ret = get_user(time, p);
-+		if (ret)
-+			break;
-+		if (time & WDIOS_DISABLECARD)
-+			at32_wdt_stop();
-+		if (time & WDIOS_ENABLECARD)
-+			at32_wdt_start();
-+		ret = 0;
-+		break;
-+	}
-+
-+	return ret;
-+}
-+
-+static ssize_t at32_wdt_write(struct file *file, const char *data, size_t len,
-+				loff_t *ppos)
-+{
-+	at32_wdt_pat();
-+	return len;
-+}
-+
-+static const struct file_operations at32_wdt_fops = {
-+	.owner		= THIS_MODULE,
-+	.llseek		= no_llseek,
-+	.ioctl		= at32_wdt_ioctl,
-+	.open		= at32_wdt_open,
-+	.release	= at32_wdt_close,
-+	.write		= at32_wdt_write,
-+};
-+
-+static int __init at32_wdt_probe(struct platform_device *pdev)
-+{
-+	struct resource	*regs;
-+	int ret;
-+
-+	if (wdt) {
-+		dev_dbg(&pdev->dev, "only 1 wdt instance supported.\n");
-+		return -EBUSY;
-+	}
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs) {
-+		dev_dbg(&pdev->dev, "missing mmio resource\n");
-+		return -ENXIO;
-+	}
-+
-+	wdt = kzalloc(sizeof(struct wdt_at32ap700x), GFP_KERNEL);
-+	if (!wdt) {
-+		dev_dbg(&pdev->dev, "no memory for wdt structure\n");
-+		return -ENOMEM;
-+	}
-+
-+	wdt->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!wdt->regs) {
-+		ret = -ENOMEM;
-+		dev_dbg(&pdev->dev, "could not map I/O memory\n");
-+		goto err_free;
-+	}
-+	wdt->users = 0;
-+	wdt->miscdev.minor = WATCHDOG_MINOR;
-+	wdt->miscdev.name = "watchdog";
-+	wdt->miscdev.fops = &at32_wdt_fops;
-+
-+	if (at32_wdt_settimeout(TIMEOUT_DEFAULT)) {
-+		at32_wdt_settimeout(TIMEOUT_MAX);
-+		dev_dbg(&pdev->dev,
-+			"default timeout invalid, set to %d sec.\n",
-+			TIMEOUT_MAX);
-+	}
-+
-+	ret = misc_register(&wdt->miscdev);
-+	if (ret) {
-+		dev_dbg(&pdev->dev, "failed to register wdt miscdev\n");
-+		goto err_iounmap;
-+	}
-+
-+	platform_set_drvdata(pdev, wdt);
-+	wdt->miscdev.parent = &pdev->dev;
-+	dev_info(&pdev->dev, "AT32AP700X WDT at 0x%p\n", wdt->regs);
-+
-+	return 0;
-+
-+err_iounmap:
-+	iounmap(wdt->regs);
-+err_free:
-+	kfree(wdt);
-+	wdt = NULL;
-+	return ret;
-+}
-+
-+static int __exit at32_wdt_remove(struct platform_device *pdev)
-+{
-+	if (wdt && platform_get_drvdata(pdev) == wdt) {
-+		misc_deregister(&wdt->miscdev);
-+		iounmap(wdt->regs);
-+		kfree(wdt);
-+		wdt = NULL;
-+		platform_set_drvdata(pdev, NULL);
-+	}
-+
-+	return 0;
-+}
-+
-+static void at32_wdt_shutdown(struct platform_device *pdev)
-+{
-+	at32_wdt_stop();
-+}
-+
-+#ifdef CONFIG_PM
-+static int at32_wdt_suspend(struct platform_device *pdev, pm_message_t message)
-+{
-+	at32_wdt_stop();
-+	return 0;
-+}
-+
-+static int at32_wdt_resume(struct platform_device *pdev)
-+{
-+	if (wdt->users)
-+		at32_wdt_start();
-+	return 0;
-+}
-+#else
-+#define at32_wdt_suspend NULL
-+#define at32_wdt_resume NULL
-+#endif
-+
-+static struct platform_driver at32_wdt_driver = {
-+	.remove		= __exit_p(at32_wdt_remove),
-+	.suspend	= at32_wdt_suspend,
-+	.resume		= at32_wdt_resume,
-+	.driver		= {
-+		.name	= "at32_wdt",
-+		.owner	= THIS_MODULE,
-+	},
-+	.shutdown	= at32_wdt_shutdown,
-+};
-+
-+static int __init at32_wdt_init(void)
-+{
-+	return platform_driver_probe(&at32_wdt_driver, at32_wdt_probe);
-+}
-+module_init(at32_wdt_init);
-+
-+static void __exit at32_wdt_exit(void)
-+{
-+	platform_driver_unregister(&at32_wdt_driver);
-+}
-+module_exit(at32_wdt_exit);
-+
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
-Index: linux-2.6.22.1/drivers/char/at91_spi.c
-===================================================================
---- linux-2.6.22.1/drivers/char/at91_spi.c	(revision 0)
-+++ linux-2.6.22.1/drivers/char/at91_spi.c	(revision 0)
-@@ -0,0 +1,336 @@
-+/*
-+ * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder)
-+ *
-+ *  Copyright (C) SAN People (Pty) Ltd
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/module.h>
-+#include <linux/sched.h>
-+#include <linux/completion.h>
-+#include <linux/interrupt.h>
-+#include <linux/clk.h>
-+#include <linux/platform_device.h>
-+#include <linux/atmel_pdc.h>
-+#include <asm/io.h>
-+#include <asm/semaphore.h>
-+
-+#include <asm/arch/at91_spi.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/spi.h>
-+
-+#undef DEBUG_SPI
-+
-+static struct spi_local spi_dev[NR_SPI_DEVICES];	/* state of the SPI devices */
-+static int spi_enabled = 0;
-+static struct semaphore spi_lock;			/* protect access to SPI bus */
-+static int current_device = -1;				/* currently selected SPI device */
-+static struct clk *spi_clk;				/* SPI clock */
-+static void __iomem *spi_base;				/* SPI peripheral base-address */
-+
-+DECLARE_COMPLETION(transfer_complete);
-+
-+
-+#define at91_spi_read(reg)		__raw_readl(spi_base + (reg))
-+#define at91_spi_write(reg, val)	__raw_writel((val), spi_base + (reg))
-+
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Access and enable the SPI bus.
-+ * This MUST be called before any transfers are performed.
-+ */
-+void spi_access_bus(short device)
-+{
-+	/* Ensure that requested device is valid */
-+	if ((device < 0) || (device >= NR_SPI_DEVICES))
-+		panic("at91_spi: spi_access_bus called with invalid device");
-+
-+	if (spi_enabled == 0) {
-+		clk_enable(spi_clk);				/* Enable Peripheral clock */
-+		at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN);	/* Enable SPI */
-+#ifdef DEBUG_SPI
-+		printk("SPI on\n");
-+#endif
-+	}
-+	spi_enabled++;
-+
-+	/* Lock the SPI bus */
-+	down(&spi_lock);
-+	current_device = device;
-+
-+	/* Configure SPI bus for device */
-+	at91_spi_write(AT91_SPI_MR, AT91_SPI_MSTR | AT91_SPI_MODFDIS | (spi_dev[device].pcs << 16));
-+}
-+
-+/*
-+ * Relinquish control of the SPI bus.
-+ */
-+void spi_release_bus(short device)
-+{
-+	if (device != current_device)
-+		panic("at91_spi: spi_release called with invalid device");
-+
-+	/* Release the SPI bus */
-+	current_device = -1;
-+	up(&spi_lock);
-+
-+	spi_enabled--;
-+	if (spi_enabled == 0) {
-+		at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS);	/* Disable SPI */
-+		clk_disable(spi_clk);				/* Disable Peripheral clock */
-+#ifdef DEBUG_SPI
-+		printk("SPI off\n");
-+#endif
-+	}
-+}
-+
-+/*
-+ * Perform a data transfer over the SPI bus
-+ */
-+int spi_transfer(struct spi_transfer_list* list)
-+{
-+	struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
-+	int tx_size;
-+
-+	if (!list)
-+		panic("at91_spi: spi_transfer called with NULL transfer list");
-+	if (current_device == -1)
-+		panic("at91_spi: spi_transfer called without acquiring bus");
-+
-+#ifdef DEBUG_SPI
-+	printk("SPI transfer start [%i]\n", list->nr_transfers);
-+#endif
-+
-+	/* If we are in 16-bit mode, we need to modify what we pass to the PDC */
-+	tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
-+
-+	/* Store transfer list */
-+	device->xfers = list;
-+	list->curr = 0;
-+
-+	/* Assume there must be at least one transfer */
-+	device->tx = dma_map_single(NULL, list->tx[0], list->txlen[0], DMA_TO_DEVICE);
-+	device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE);
-+
-+	/* Program PDC registers */
-+	at91_spi_write(ATMEL_PDC_TPR, device->tx);
-+	at91_spi_write(ATMEL_PDC_RPR, device->rx);
-+	at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size);
-+	at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size);
-+
-+	/* Is there a second transfer? */
-+	if (list->nr_transfers > 1) {
-+		device->txnext = dma_map_single(NULL, list->tx[1], list->txlen[1], DMA_TO_DEVICE);
-+		device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE);
-+
-+		/* Program Next PDC registers */
-+		at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
-+		at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
-+		at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size);
-+		at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size);
-+	}
-+	else {
-+		device->txnext = 0;
-+		device->rxnext = 0;
-+		at91_spi_write(ATMEL_PDC_TNCR, 0);
-+		at91_spi_write(ATMEL_PDC_RNCR, 0);
-+	}
-+
-+	// TODO: If we are doing consecutive transfers (at high speed, or
-+	//   small buffers), then it might be worth modifying the 'Delay between
-+	//   Consecutive Transfers' in the CSR registers.
-+	//   This is an issue if we cannot chain the next buffer fast enough
-+	//   in the interrupt handler.
-+
-+	/* Enable transmitter and receiver */
-+	at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN);
-+
-+	at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX);		/* enable buffer complete interrupt */
-+	wait_for_completion(&transfer_complete);
-+
-+#ifdef DEBUG_SPI
-+	printk("SPI transfer end\n");
-+#endif
-+
-+	return 0;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Handle interrupts from the SPI controller.
-+ */
-+static irqreturn_t at91spi_interrupt(int irq, void *dev_id)
-+{
-+	unsigned int status;
-+	struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
-+	struct spi_transfer_list *list = device->xfers;
-+
-+#ifdef DEBUG_SPI
-+	printk("SPI interrupt %i\n", current_device);
-+#endif
-+
-+	if (!list)
-+		panic("at91_spi: spi_interrupt with a NULL transfer list");
-+
-+		status = at91_spi_read(AT91_SPI_SR) & at91_spi_read(AT91_SPI_IMR);	/* read status */
-+
-+	dma_unmap_single(NULL, device->tx, list->txlen[list->curr], DMA_TO_DEVICE);
-+	dma_unmap_single(NULL, device->rx, list->rxlen[list->curr], DMA_FROM_DEVICE);
-+
-+	device->tx = device->txnext;	/* move next transfer to current transfer */
-+	device->rx = device->rxnext;
-+
-+	list->curr = list->curr + 1;
-+	if (list->curr == list->nr_transfers) {		/* all transfers complete */
-+		at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX);		/* disable interrupt */
-+
-+		/* Disable transmitter and receiver */
-+		at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-+
-+		device->xfers = NULL;
-+		complete(&transfer_complete);
-+	}
-+	else if (list->curr+1 == list->nr_transfers) {	/* no more next transfers */
-+		device->txnext = 0;
-+		device->rxnext = 0;
-+		at91_spi_write(ATMEL_PDC_TNCR, 0);
-+		at91_spi_write(ATMEL_PDC_RNCR, 0);
-+	}
-+	else {
-+		int i = (list->curr)+1;
-+
-+		/* If we are in 16-bit mode, we need to modify what we pass to the PDC */
-+		int tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
-+
-+		device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE);
-+		device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE);
-+		at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
-+		at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
-+		at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size);
-+		at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size);
-+	}
-+	return IRQ_HANDLED;
-+}
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Initialize the SPI controller
-+ */
-+static int __init at91spi_probe(struct platform_device *pdev)
-+{
-+	int i;
-+	unsigned long scbr;
-+	struct resource *res;
-+
-+	init_MUTEX(&spi_lock);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!res)
-+		return -ENXIO;
-+
-+	if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi"))
-+		return -EBUSY;
-+
-+	spi_base = ioremap(res->start, res->end - res->start + 1);
-+	if (!spi_base) {
-+		release_mem_region(res->start, res->end - res->start + 1);
-+		return -ENOMEM;
-+	}
-+
-+	spi_clk = clk_get(NULL, "spi_clk");
-+	if (IS_ERR(spi_clk)) {
-+		printk(KERN_ERR "at91_spi: no clock defined\n");
-+		iounmap(spi_base);
-+		release_mem_region(res->start, res->end - res->start + 1);
-+		return -ENODEV;
-+	}
-+
-+	at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST);	/* software reset of SPI controller */
-+
-+	/*
-+	 * Calculate the correct SPI baud-rate divisor.
-+	 */
-+	scbr = clk_get_rate(spi_clk) / (2 * DEFAULT_SPI_CLK);
-+	scbr = scbr + 1;		/* round up */
-+
-+	printk(KERN_INFO "at91_spi: Baud rate set to %ld\n", clk_get_rate(spi_clk) / (2 * scbr));
-+
-+	/* Set Chip Select registers to good defaults */
-+	for (i = 0; i < 4; i++) {
-+		at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8));
-+	}
-+
-+	at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
-+
-+	memset(&spi_dev, 0, sizeof(spi_dev));
-+	spi_dev[0].pcs = 0xE;
-+	spi_dev[1].pcs = 0xD;
-+	spi_dev[2].pcs = 0xB;
-+	spi_dev[3].pcs = 0x7;
-+
-+	if (request_irq(AT91RM9200_ID_SPI, at91spi_interrupt, 0, "spi", NULL)) {
-+		clk_put(spi_clk);
-+		iounmap(spi_base);
-+		release_mem_region(res->start, res->end - res->start + 1);
-+		return -EBUSY;
-+	}
-+
-+	at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN);		/* Enable SPI */
-+
-+	return 0;
-+}
-+
-+static int __devexit at91spi_remove(struct platform_device *pdev)
-+{
-+	struct resource *res;
-+
-+	at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS);		/* Disable SPI */
-+	clk_put(spi_clk);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	iounmap(spi_base);
-+	release_mem_region(res->start, res->end - res->start + 1);
-+
-+	free_irq(AT91RM9200_ID_SPI, 0);
-+	return 0;
-+}
-+
-+static struct platform_driver at91spi_driver = {
-+	.probe		= at91spi_probe,
-+	.remove		= __devexit_p(at91spi_remove),
-+	.driver		= {
-+		.name	= "at91_spi",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init at91spi_init(void)
-+{
-+	return platform_driver_register(&at91spi_driver);
-+}
-+
-+static void __exit at91spi_exit(void)
-+{
-+	platform_driver_unregister(&at91spi_driver);
-+}
-+
-+EXPORT_SYMBOL(spi_access_bus);
-+EXPORT_SYMBOL(spi_release_bus);
-+EXPORT_SYMBOL(spi_transfer);
-+
-+module_init(at91spi_init);
-+module_exit(at91spi_exit);
-+
-+MODULE_LICENSE("GPL")
-+MODULE_AUTHOR("Andrew Victor")
-+MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200")
-Index: linux-2.6.22.1/drivers/char/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/char/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/char/Kconfig	(arbetskopia)
-@@ -1083,5 +1083,21 @@
- 
- source "drivers/s390/char/Kconfig"
- 
-+config AT91_SPI
-+	bool "SPI driver (legacy) for AT91RM9200 processors"
-+	depends on ARCH_AT91RM9200
-+	default y
-+	help
-+	  The SPI driver gives access to this serial bus on the AT91RM9200
-+	  processor.
-+
-+config AT91_SPIDEV
-+	bool "SPI device interface (legacy) for AT91RM9200 processors"
-+	depends on ARCH_AT91RM9200 && AT91_SPI
-+	default n
-+	help
-+	  The SPI driver gives user mode access to this serial
-+	  bus on the AT91RM9200 processor.
-+
- endmenu
- 
-Index: linux-2.6.22.1/drivers/char/at91_spidev.c
-===================================================================
---- linux-2.6.22.1/drivers/char/at91_spidev.c	(revision 0)
-+++ linux-2.6.22.1/drivers/char/at91_spidev.c	(revision 0)
-@@ -0,0 +1,236 @@
-+/*
-+ * User-space interface to the SPI bus on Atmel AT91RM9200
-+ *
-+ *  Copyright (C) 2003 SAN People (Pty) Ltd
-+ *
-+ * Based on SPI driver by Rick Bronson
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/slab.h>
-+#include <linux/highmem.h>
-+#include <linux/pagemap.h>
-+#include <asm/arch/spi.h>
-+
-+#ifdef CONFIG_DEVFS_FS
-+#include <linux/devfs_fs_kernel.h>
-+#endif
-+
-+
-+#undef DEBUG_SPIDEV
-+
-+/* ......................................................................... */
-+
-+/*
-+ * Read or Write to SPI bus.
-+ */
-+static ssize_t spidev_rd_wr(struct file *file, char *buf, size_t count, loff_t *offset)
-+{
-+	unsigned int spi_device = (unsigned int) file->private_data;
-+
-+	struct mm_struct * mm;
-+	struct page ** maplist;
-+	struct spi_transfer_list* list;
-+	int    pgcount;
-+
-+	unsigned int ofs, pagelen;
-+	int res, i, err;
-+
-+	if (!count) {
-+		return 0;
-+	}
-+
-+	list = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
-+	if (!list) {
-+		return -ENOMEM;
-+	}
-+
-+	mm = current->mm;
-+
-+	pgcount = ((unsigned long)buf+count+PAGE_SIZE-1)/PAGE_SIZE - (unsigned long)buf/PAGE_SIZE;
-+
-+	if (pgcount >= MAX_SPI_TRANSFERS) {
-+		kfree(list);
-+		return -EFBIG;
-+	}
-+
-+	maplist = kmalloc (pgcount * sizeof (struct page *), GFP_KERNEL);
-+
-+	if (!maplist) {
-+		kfree(list);
-+		return -ENOMEM;
-+	}
-+	flush_cache_all();
-+	down_read(&mm->mmap_sem);
-+	err= get_user_pages(current, mm, (unsigned long)buf, pgcount, 1, 0, maplist, NULL);
-+	up_read(&mm->mmap_sem);
-+
-+	if (err < 0) {
-+		kfree(list);
-+		kfree(maplist);
-+		return err;
-+	}
-+	pgcount = err;
-+
-+#ifdef DEBUG_SPIDEV
-+	printk("spidev_rd_rw: %i %i\n", count, pgcount);
-+#endif
-+
-+	/* Set default return value = transfer length */
-+	res = count;
-+
-+	/*
-+	 * At this point, the virtual area buf[0] .. buf[count-1] will have
-+	 * corresponding pages mapped in the physical memory and locked until
-+	 * we unmap the kiobuf.  The pages cannot be swapped out or moved
-+	 * around.
-+	 */
-+	ofs = (unsigned long) buf & (PAGE_SIZE -1);
-+	pagelen = PAGE_SIZE - ofs;
-+	if (count < pagelen)
-+		pagelen = count;
-+
-+	for (i = 0; i < pgcount; i++) {
-+		flush_dcache_page(maplist[i]);
-+
-+		list->tx[i] = list->rx[i] = page_address(maplist[i]) + ofs;
-+		list->txlen[i] = list->rxlen[i] = pagelen;
-+
-+#ifdef DEBUG_SPIDEV
-+		printk("  %i: %x  (%i)\n", i, list->tx[i], list->txlen[i]);
-+#endif
-+
-+		ofs = 0;	/* all subsequent transfers start at beginning of a page */
-+		count = count - pagelen;
-+		pagelen = (count < PAGE_SIZE) ? count : PAGE_SIZE;
-+	}
-+	list->nr_transfers = pgcount;
-+
-+	/* Perform transfer on SPI bus */
-+	spi_access_bus(spi_device);
-+	spi_transfer(list);
-+	spi_release_bus(spi_device);
-+
-+	while (pgcount--) {
-+		page_cache_release (maplist[pgcount]);
-+	}
-+	flush_cache_all();
-+
-+	kfree(maplist);
-+	kfree(list);
-+
-+	return res;
-+}
-+
-+static int spidev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
-+{
-+	int spi_device = MINOR(inode->i_rdev);
-+
-+	if (spi_device >= NR_SPI_DEVICES)
-+		return -ENODEV;
-+
-+	// TODO: This interface can be used to configure the SPI bus.
-+	// Configurable options could include: Speed, Clock Polarity, Clock Phase
-+
-+	switch(cmd) {
-+		default:
-+			return -ENOIOCTLCMD;
-+	}
-+}
-+
-+/*
-+ * Open the SPI device
-+ */
-+static int spidev_open(struct inode *inode, struct file *file)
-+{
-+	unsigned int spi_device = MINOR(inode->i_rdev);
-+
-+	if (spi_device >= NR_SPI_DEVICES)
-+		return -ENODEV;
-+
-+	/*
-+	 * 'private_data' is actually a pointer, but we overload it with the
-+	 * value we want to store.
-+	 */
-+	file->private_data = (void *)spi_device;
-+
-+	return 0;
-+}
-+
-+/*
-+ * Close the SPI device
-+ */
-+static int spidev_close(struct inode *inode, struct file *file)
-+{
-+	return 0;
-+}
-+
-+/* ......................................................................... */
-+
-+static struct file_operations spidev_fops = {
-+	.owner		= THIS_MODULE,
-+	.llseek		= no_llseek,
-+	.read		= spidev_rd_wr,
-+	.write		= (int (*) (struct file *file, const char *buf, size_t count, loff_t *offset))spidev_rd_wr,
-+	.ioctl		= spidev_ioctl,
-+	.open		= spidev_open,
-+	.release	= spidev_close,
-+};
-+
-+/*
-+ * Install the SPI /dev interface driver
-+ */
-+static int __init at91_spidev_init(void)
-+{
-+#ifdef CONFIG_DEVFS_FS
-+	int i;
-+#endif
-+
-+	if (register_chrdev(SPI_MAJOR, "spi", &spidev_fops)) {
-+		printk(KERN_ERR "at91_spidev: Unable to get major %d for SPI bus\n", SPI_MAJOR);
-+		return -EIO;
-+	}
-+
-+#ifdef CONFIG_DEVFS_FS
-+	devfs_mk_dir("spi");
-+	for (i = 0; i < NR_SPI_DEVICES; i++) {
-+		devfs_mk_cdev(MKDEV(SPI_MAJOR, i), S_IFCHR | S_IRUSR | S_IWUSR, "spi/%d",i);
-+	}
-+#endif
-+	printk(KERN_INFO "AT91 SPI driver loaded\n");
-+
-+	return 0;
-+}
-+
-+/*
-+ * Remove the SPI /dev interface driver
-+ */
-+static void __exit at91_spidev_exit(void)
-+{
-+#ifdef CONFIG_DEVFS_FS
-+	int i;
-+	for (i = 0; i < NR_SPI_DEVICES; i++) {
-+		devfs_remove("spi/%d", i);
-+	}
-+
-+	devfs_remove("spi");
-+#endif
-+
-+	if (unregister_chrdev(SPI_MAJOR, "spi")) {
-+		printk(KERN_ERR "at91_spidev: Unable to release major %d for SPI bus\n", SPI_MAJOR);
-+		return;
-+	}
-+}
-+
-+module_init(at91_spidev_init);
-+module_exit(at91_spidev_exit);
-+
-+MODULE_LICENSE("GPL")
-+MODULE_AUTHOR("Andrew Victor")
-+MODULE_DESCRIPTION("SPI /dev interface for Atmel AT91RM9200")
-Index: linux-2.6.22.1/drivers/char/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/char/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/char/Makefile	(arbetskopia)
-@@ -93,6 +93,8 @@
- obj-$(CONFIG_GPIO_VR41XX)	+= vr41xx_giu.o
- obj-$(CONFIG_GPIO_TB0219)	+= tb0219.o
- obj-$(CONFIG_TELCLOCK)		+= tlclk.o
-+obj-$(CONFIG_AT91_SPI)		+= at91_spi.o
-+obj-$(CONFIG_AT91_SPIDEV)	+= at91_spidev.o
- 
- obj-$(CONFIG_WATCHDOG)		+= watchdog/
- obj-$(CONFIG_MWAVE)		+= mwave/
-Index: linux-2.6.22.1/drivers/net/macb.c
-===================================================================
---- linux-2.6.22.1/drivers/net/macb.c	(revision 1)
-+++ linux-2.6.22.1/drivers/net/macb.c	(arbetskopia)
-@@ -17,13 +17,14 @@
- #include <linux/init.h>
- #include <linux/netdevice.h>
- #include <linux/etherdevice.h>
--#include <linux/mii.h>
--#include <linux/mutex.h>
- #include <linux/dma-mapping.h>
--#include <linux/ethtool.h>
- #include <linux/platform_device.h>
-+#include <linux/phy.h>
- 
- #include <asm/arch/board.h>
-+#if defined(CONFIG_ARCH_AT91)
-+#include <asm/arch/cpu.h>
-+#endif
- 
- #include "macb.h"
- 
-@@ -85,172 +86,202 @@
- 		memcpy(bp->dev->dev_addr, addr, sizeof(addr));
- }
- 
--static void macb_enable_mdio(struct macb *bp)
-+static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
- {
--	unsigned long flags;
--	u32 reg;
--
--	spin_lock_irqsave(&bp->lock, flags);
--	reg = macb_readl(bp, NCR);
--	reg |= MACB_BIT(MPE);
--	macb_writel(bp, NCR, reg);
--	macb_writel(bp, IER, MACB_BIT(MFD));
--	spin_unlock_irqrestore(&bp->lock, flags);
--}
--
--static void macb_disable_mdio(struct macb *bp)
--{
--	unsigned long flags;
--	u32 reg;
--
--	spin_lock_irqsave(&bp->lock, flags);
--	reg = macb_readl(bp, NCR);
--	reg &= ~MACB_BIT(MPE);
--	macb_writel(bp, NCR, reg);
--	macb_writel(bp, IDR, MACB_BIT(MFD));
--	spin_unlock_irqrestore(&bp->lock, flags);
--}
--
--static int macb_mdio_read(struct net_device *dev, int phy_id, int location)
--{
--	struct macb *bp = netdev_priv(dev);
-+	struct macb *bp = bus->priv;
- 	int value;
- 
--	mutex_lock(&bp->mdio_mutex);
--
--	macb_enable_mdio(bp);
- 	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
- 			      | MACB_BF(RW, MACB_MAN_READ)
--			      | MACB_BF(PHYA, phy_id)
--			      | MACB_BF(REGA, location)
-+			      | MACB_BF(PHYA, mii_id)
-+			      | MACB_BF(REGA, regnum)
- 			      | MACB_BF(CODE, MACB_MAN_CODE)));
- 
--	wait_for_completion(&bp->mdio_complete);
-+	/* wait for end of transfer */
-+	while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-+		cpu_relax();
- 
- 	value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
--	macb_disable_mdio(bp);
--	mutex_unlock(&bp->mdio_mutex);
- 
- 	return value;
- }
- 
--static void macb_mdio_write(struct net_device *dev, int phy_id,
--			    int location, int val)
-+static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
-+			   u16 value)
- {
--	struct macb *bp = netdev_priv(dev);
-+	struct macb *bp = bus->priv;
- 
--	dev_dbg(&bp->pdev->dev, "mdio_write %02x:%02x <- %04x\n",
--		phy_id, location, val);
--
--	mutex_lock(&bp->mdio_mutex);
--	macb_enable_mdio(bp);
--
- 	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
- 			      | MACB_BF(RW, MACB_MAN_WRITE)
--			      | MACB_BF(PHYA, phy_id)
--			      | MACB_BF(REGA, location)
-+			      | MACB_BF(PHYA, mii_id)
-+			      | MACB_BF(REGA, regnum)
- 			      | MACB_BF(CODE, MACB_MAN_CODE)
--			      | MACB_BF(DATA, val)));
-+			      | MACB_BF(DATA, value)));
- 
--	wait_for_completion(&bp->mdio_complete);
-+	/* wait for end of transfer */
-+	while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-+		cpu_relax();
- 
--	macb_disable_mdio(bp);
--	mutex_unlock(&bp->mdio_mutex);
-+	return 0;
- }
- 
--static int macb_phy_probe(struct macb *bp)
-+static int macb_mdio_reset(struct mii_bus *bus)
- {
--	int phy_address;
--	u16 phyid1, phyid2;
-+	return 0;
-+}
- 
--	for (phy_address = 0; phy_address < 32; phy_address++) {
--		phyid1 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID1);
--		phyid2 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID2);
-+static void macb_handle_link_change(struct net_device *dev)
-+{
-+	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
-+	unsigned long flags;
- 
--		if (phyid1 != 0xffff && phyid1 != 0x0000
--		    && phyid2 != 0xffff && phyid2 != 0x0000)
--			break;
-+	int status_change = 0;
-+
-+	spin_lock_irqsave(&bp->lock, flags);
-+
-+	if (phydev->link) {
-+		if ((bp->speed != phydev->speed) ||
-+		    (bp->duplex != phydev->duplex)) {
-+			u32 reg;
-+
-+			reg = macb_readl(bp, NCFGR);
-+			reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
-+
-+			if (phydev->duplex)
-+				reg |= MACB_BIT(FD);
-+			if (phydev->speed)
-+				reg |= MACB_BIT(SPD);
-+
-+			macb_writel(bp, NCFGR, reg);
-+
-+			bp->speed = phydev->speed;
-+			bp->duplex = phydev->duplex;
-+			status_change = 1;
-+		}
- 	}
- 
--	if (phy_address == 32)
--		return -ENODEV;
-+	if (phydev->link != bp->link) {
-+		if (phydev->link)
-+			netif_schedule(dev);
-+		else {
-+			bp->speed = 0;
-+			bp->duplex = -1;
-+		}
-+		bp->link = phydev->link;
- 
--	dev_info(&bp->pdev->dev,
--		 "detected PHY at address %d (ID %04x:%04x)\n",
--		 phy_address, phyid1, phyid2);
-+		status_change = 1;
-+	}
- 
--	bp->mii.phy_id = phy_address;
--	return 0;
-+	spin_unlock_irqrestore(&bp->lock, flags);
-+
-+	if (status_change) {
-+		if (phydev->link)
-+			printk(KERN_INFO "%s: link up (%d/%s)\n",
-+			       dev->name, phydev->speed,
-+			       DUPLEX_FULL == phydev->duplex ? "Full":"Half");
-+		else
-+			printk(KERN_INFO "%s: link down\n", dev->name);
-+	}
- }
- 
--static void macb_set_media(struct macb *bp, int media)
-+/* based on au1000_eth. c*/
-+static int macb_mii_probe(struct net_device *dev)
- {
--	u32 reg;
-+	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = NULL;
-+	struct eth_platform_data *pdata;
-+	int phy_addr;
- 
--	spin_lock_irq(&bp->lock);
--	reg = macb_readl(bp, NCFGR);
--	reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
--	if (media & (ADVERTISE_100HALF | ADVERTISE_100FULL))
--		reg |= MACB_BIT(SPD);
--	if (media & ADVERTISE_FULL)
--		reg |= MACB_BIT(FD);
--	macb_writel(bp, NCFGR, reg);
--	spin_unlock_irq(&bp->lock);
-+	/* find the first phy */
-+	for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
-+		if (bp->mii_bus.phy_map[phy_addr]) {
-+			phydev = bp->mii_bus.phy_map[phy_addr];
-+			break;
-+		}
-+	}
-+
-+	if (!phydev) {
-+		printk (KERN_ERR "%s: no PHY found\n", dev->name);
-+		return -1;
-+	}
-+
-+	pdata = bp->pdev->dev.platform_data;
-+	/* TODO : add pin_irq */
-+
-+	/* attach the mac to the phy */
-+	if (pdata && pdata->is_rmii) {
-+		phydev = phy_connect(dev, phydev->dev.bus_id,
-+			&macb_handle_link_change, 0, PHY_INTERFACE_MODE_RMII);
-+	} else {
-+		phydev = phy_connect(dev, phydev->dev.bus_id,
-+			&macb_handle_link_change, 0, PHY_INTERFACE_MODE_MII);
-+	}
-+
-+	if (IS_ERR(phydev)) {
-+		printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
-+		return PTR_ERR(phydev);
-+	}
-+
-+	/* mask with MAC supported features */
-+	phydev->supported &= PHY_BASIC_FEATURES;
-+
-+	phydev->advertising = phydev->supported;
-+
-+	bp->link = 0;
-+	bp->speed = 0;
-+	bp->duplex = -1;
-+	bp->phy_dev = phydev;
-+
-+	return 0;
- }
- 
--static void macb_check_media(struct macb *bp, int ok_to_print, int init_media)
-+static int macb_mii_init(struct macb *bp)
- {
--	struct mii_if_info *mii = &bp->mii;
--	unsigned int old_carrier, new_carrier;
--	int advertise, lpa, media, duplex;
-+	struct eth_platform_data *pdata;
-+	int err = -ENXIO, i;
- 
--	/* if forced media, go no further */
--	if (mii->force_media)
--		return;
-+	/* Enable managment port */
-+	macb_writel(bp, NCR, MACB_BIT(MPE));
- 
--	/* check current and old link status */
--	old_carrier = netif_carrier_ok(mii->dev) ? 1 : 0;
--	new_carrier = (unsigned int) mii_link_ok(mii);
-+	bp->mii_bus.name = "MACB_mii_bus",
-+	bp->mii_bus.read = &macb_mdio_read,
-+	bp->mii_bus.write = &macb_mdio_write,
-+	bp->mii_bus.reset = &macb_mdio_reset,
-+	bp->mii_bus.id = bp->pdev->id,
-+	bp->mii_bus.priv = bp,
-+	bp->mii_bus.dev = &bp->dev->dev;
-+	pdata = bp->pdev->dev.platform_data;
- 
--	/* if carrier state did not change, assume nothing else did */
--	if (!init_media && old_carrier == new_carrier)
--		return;
-+	if (pdata)
-+		bp->mii_bus.phy_mask = pdata->phy_mask;
- 
--	/* no carrier, nothing much to do */
--	if (!new_carrier) {
--		netif_carrier_off(mii->dev);
--		printk(KERN_INFO "%s: link down\n", mii->dev->name);
--		return;
-+	bp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
-+	if (!bp->mii_bus.irq) {
-+		err = -ENOMEM;
-+		goto err_out;
- 	}
- 
--	/*
--	 * we have carrier, see who's on the other end
--	 */
--	netif_carrier_on(mii->dev);
-+	for (i = 0; i < PHY_MAX_ADDR; i++)
-+		bp->mii_bus.irq[i] = PHY_POLL;
- 
--	/* get MII advertise and LPA values */
--	if (!init_media && mii->advertising) {
--		advertise = mii->advertising;
--	} else {
--		advertise = mii->mdio_read(mii->dev, mii->phy_id, MII_ADVERTISE);
--		mii->advertising = advertise;
--	}
--	lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
-+	platform_set_drvdata(bp->dev, &bp->mii_bus);
- 
--	/* figure out media and duplex from advertise and LPA values */
--	media = mii_nway_result(lpa & advertise);
--	duplex = (media & ADVERTISE_FULL) ? 1 : 0;
-+	if (mdiobus_register(&bp->mii_bus))
-+		goto err_out_free_mdio_irq;
- 
--	if (ok_to_print)
--		printk(KERN_INFO "%s: link up, %sMbps, %s-duplex, lpa 0x%04X\n",
--		       mii->dev->name,
--		       media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? "100" : "10",
--		       duplex ? "full" : "half", lpa);
-+	if (macb_mii_probe(bp->dev) != 0) {
-+		goto err_out_unregister_bus;
-+	}
- 
--	mii->full_duplex = duplex;
-+	return 0;
- 
--	/* Let the MAC know about the new link state */
--	macb_set_media(bp, media);
-+err_out_unregister_bus:
-+	mdiobus_unregister(&bp->mii_bus);
-+err_out_free_mdio_irq:
-+	kfree(bp->mii_bus.irq);
-+err_out:
-+	return err;
- }
- 
- static void macb_update_stats(struct macb *bp)
-@@ -265,16 +296,6 @@
- 		*p += __raw_readl(reg);
- }
- 
--static void macb_periodic_task(struct work_struct *work)
--{
--	struct macb *bp = container_of(work, struct macb, periodic_task.work);
--
--	macb_update_stats(bp);
--	macb_check_media(bp, 1, 0);
--
--	schedule_delayed_work(&bp->periodic_task, HZ);
--}
--
- static void macb_tx(struct macb *bp)
- {
- 	unsigned int tail;
-@@ -519,9 +540,6 @@
- 	spin_lock(&bp->lock);
- 
- 	while (status) {
--		if (status & MACB_BIT(MFD))
--			complete(&bp->mdio_complete);
--
- 		/* close possible race with dev_close */
- 		if (unlikely(!netif_running(dev))) {
- 			macb_writel(bp, IDR, ~0UL);
-@@ -535,7 +553,8 @@
- 				 * until we have processed the buffers
- 				 */
- 				macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
--				dev_dbg(&bp->pdev->dev, "scheduling RX softirq\n");
-+				dev_dbg(&bp->pdev->dev,
-+					"scheduling RX softirq\n");
- 				__netif_rx_schedule(dev);
- 			}
- 		}
-@@ -765,7 +784,7 @@
- 	macb_writel(bp, TBQP, bp->tx_ring_dma);
- 
- 	/* Enable TX and RX */
--	macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE));
-+	macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
- 
- 	/* Enable interrupts */
- 	macb_writel(bp, IER, (MACB_BIT(RCOMP)
-@@ -776,20 +795,128 @@
- 			      | MACB_BIT(TCOMP)
- 			      | MACB_BIT(ISR_ROVR)
- 			      | MACB_BIT(HRESP)));
-+
- }
- 
--static void macb_init_phy(struct net_device *dev)
-+/*
-+ * The hash address register is 64 bits long and takes up two
-+ * locations in the memory map.  The least significant bits are stored
-+ * in EMAC_HSL and the most significant bits in EMAC_HSH.
-+ *
-+ * The unicast hash enable and the multicast hash enable bits in the
-+ * network configuration register enable the reception of hash matched
-+ * frames. The destination address is reduced to a 6 bit index into
-+ * the 64 bit hash register using the following hash function.  The
-+ * hash function is an exclusive or of every sixth bit of the
-+ * destination address.
-+ *
-+ * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
-+ * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
-+ * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
-+ * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
-+ * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
-+ * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
-+ *
-+ * da[0] represents the least significant bit of the first byte
-+ * received, that is, the multicast/unicast indicator, and da[47]
-+ * represents the most significant bit of the last byte received.  If
-+ * the hash index, hi[n], points to a bit that is set in the hash
-+ * register then the frame will be matched according to whether the
-+ * frame is multicast or unicast.  A multicast match will be signalled
-+ * if the multicast hash enable bit is set, da[0] is 1 and the hash
-+ * index points to a bit set in the hash register.  A unicast match
-+ * will be signalled if the unicast hash enable bit is set, da[0] is 0
-+ * and the hash index points to a bit set in the hash register.  To
-+ * receive all multicast frames, the hash register should be set with
-+ * all ones and the multicast hash enable bit should be set in the
-+ * network configuration register.
-+ */
-+
-+static inline int hash_bit_value(int bitnr, __u8 *addr)
- {
-+	if (addr[bitnr / 8] & (1 << (bitnr % 8)))
-+		return 1;
-+	return 0;
-+}
-+
-+/*
-+ * Return the hash index value for the specified address.
-+ */
-+static int hash_get_index(__u8 *addr)
-+{
-+	int i, j, bitval;
-+	int hash_index = 0;
-+
-+	for (j = 0; j < 6; j++) {
-+		for (i = 0, bitval = 0; i < 8; i++)
-+			bitval ^= hash_bit_value(i*6 + j, addr);
-+
-+		hash_index |= (bitval << j);
-+	}
-+
-+	return hash_index;
-+}
-+
-+/*
-+ * Add multicast addresses to the internal multicast-hash table.
-+ */
-+static void macb_sethashtable(struct net_device *dev)
-+{
-+	struct dev_mc_list *curr;
-+	unsigned long mc_filter[2];
-+	unsigned int i, bitnr;
- 	struct macb *bp = netdev_priv(dev);
- 
--	/* Set some reasonable default settings */
--	macb_mdio_write(dev, bp->mii.phy_id, MII_ADVERTISE,
--			ADVERTISE_CSMA | ADVERTISE_ALL);
--	macb_mdio_write(dev, bp->mii.phy_id, MII_BMCR,
--			(BMCR_SPEED100 | BMCR_ANENABLE
--			 | BMCR_ANRESTART | BMCR_FULLDPLX));
-+	mc_filter[0] = mc_filter[1] = 0;
-+
-+	curr = dev->mc_list;
-+	for (i = 0; i < dev->mc_count; i++, curr = curr->next) {
-+		if (!curr) break;	/* unexpected end of list */
-+
-+		bitnr = hash_get_index(curr->dmi_addr);
-+		mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
-+	}
-+
-+	macb_writel(bp, HRB, mc_filter[0]);
-+	macb_writel(bp, HRT, mc_filter[1]);
- }
- 
-+/*
-+ * Enable/Disable promiscuous and multicast modes.
-+ */
-+static void macb_set_rx_mode(struct net_device *dev)
-+{
-+	unsigned long cfg;
-+	struct macb *bp = netdev_priv(dev);
-+
-+	cfg = macb_readl(bp, NCFGR);
-+
-+	if (dev->flags & IFF_PROMISC)
-+		/* Enable promiscuous mode */
-+		cfg |= MACB_BIT(CAF);
-+	else if (dev->flags & (~IFF_PROMISC))
-+		 /* Disable promiscuous mode */
-+		cfg &= ~MACB_BIT(CAF);
-+
-+	if (dev->flags & IFF_ALLMULTI) {
-+		/* Enable all multicast mode */
-+		macb_writel(bp, HRB, -1);
-+		macb_writel(bp, HRT, -1);
-+		cfg |= MACB_BIT(NCFGR_MTI);
-+	} else if (dev->mc_count > 0) {
-+		/* Enable specific multicasts */
-+		macb_sethashtable(dev);
-+		cfg |= MACB_BIT(NCFGR_MTI);
-+	} else if (dev->flags & (~IFF_ALLMULTI)) {
-+		/* Disable all multicast mode */
-+		macb_writel(bp, HRB, 0);
-+		macb_writel(bp, HRT, 0);
-+		cfg &= ~MACB_BIT(NCFGR_MTI);
-+	}
-+
-+	macb_writel(bp, NCFGR, cfg);
-+}
-+
- static int macb_open(struct net_device *dev)
- {
- 	struct macb *bp = netdev_priv(dev);
-@@ -797,6 +924,10 @@
- 
- 	dev_dbg(&bp->pdev->dev, "open\n");
- 
-+	/* if the phy is not yet register, retry later*/
-+	if (!bp->phy_dev)
-+		return -EAGAIN;
-+
- 	if (!is_valid_ether_addr(dev->dev_addr))
- 		return -EADDRNOTAVAIL;
- 
-@@ -810,13 +941,12 @@
- 
- 	macb_init_rings(bp);
- 	macb_init_hw(bp);
--	macb_init_phy(dev);
- 
--	macb_check_media(bp, 1, 1);
-+	/* schedule a link state check */
-+	phy_start(bp->phy_dev);
-+
- 	netif_start_queue(dev);
- 
--	schedule_delayed_work(&bp->periodic_task, HZ);
--
- 	return 0;
- }
- 
-@@ -825,10 +955,11 @@
- 	struct macb *bp = netdev_priv(dev);
- 	unsigned long flags;
- 
--	cancel_rearming_delayed_work(&bp->periodic_task);
--
- 	netif_stop_queue(dev);
- 
-+	if (bp->phy_dev)
-+		phy_stop(bp->phy_dev);
-+
- 	spin_lock_irqsave(&bp->lock, flags);
- 	macb_reset_hw(bp);
- 	netif_carrier_off(dev);
-@@ -845,6 +976,9 @@
- 	struct net_device_stats *nstat = &bp->stats;
- 	struct macb_stats *hwstat = &bp->hw_stats;
- 
-+	/* read stats from hardware */
-+	macb_update_stats(bp);
-+
- 	/* Convert HW stats into netdevice stats */
- 	nstat->rx_errors = (hwstat->rx_fcs_errors +
- 			    hwstat->rx_align_errors +
-@@ -882,18 +1016,27 @@
- static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
- {
- 	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
- 
--	return mii_ethtool_gset(&bp->mii, cmd);
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_gset(phydev, cmd);
- }
- 
- static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
- {
- 	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
- 
--	return mii_ethtool_sset(&bp->mii, cmd);
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_sset(phydev, cmd);
- }
- 
--static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-+static void macb_get_drvinfo(struct net_device *dev,
-+			     struct ethtool_drvinfo *info)
- {
- 	struct macb *bp = netdev_priv(dev);
- 
-@@ -902,104 +1045,34 @@
- 	strcpy(info->bus_info, bp->pdev->dev.bus_id);
- }
- 
--static int macb_nway_reset(struct net_device *dev)
--{
--	struct macb *bp = netdev_priv(dev);
--	return mii_nway_restart(&bp->mii);
--}
--
- static struct ethtool_ops macb_ethtool_ops = {
- 	.get_settings		= macb_get_settings,
- 	.set_settings		= macb_set_settings,
- 	.get_drvinfo		= macb_get_drvinfo,
--	.nway_reset		= macb_nway_reset,
- 	.get_link		= ethtool_op_get_link,
- };
- 
- static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
- {
- 	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
- 
- 	if (!netif_running(dev))
- 		return -EINVAL;
- 
--	return generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL);
--}
-+	if (!phydev)
-+		return -ENODEV;
- 
--static ssize_t macb_mii_show(const struct device *_dev, char *buf,
--			unsigned long addr)
--{
--	struct net_device *dev = to_net_dev(_dev);
--	struct macb *bp = netdev_priv(dev);
--	ssize_t ret = -EINVAL;
--
--	if (netif_running(dev)) {
--		int value;
--		value = macb_mdio_read(dev, bp->mii.phy_id, addr);
--		ret = sprintf(buf, "0x%04x\n", (uint16_t)value);
--	}
--
--	return ret;
-+	return phy_mii_ioctl(phydev, if_mii(rq), cmd);
- }
- 
--#define MII_ENTRY(name, addr)					\
--static ssize_t show_##name(struct device *_dev,			\
--			   struct device_attribute *attr,	\
--			   char *buf)				\
--{								\
--	return macb_mii_show(_dev, buf, addr);			\
--}								\
--static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
--
--MII_ENTRY(bmcr, MII_BMCR);
--MII_ENTRY(bmsr, MII_BMSR);
--MII_ENTRY(physid1, MII_PHYSID1);
--MII_ENTRY(physid2, MII_PHYSID2);
--MII_ENTRY(advertise, MII_ADVERTISE);
--MII_ENTRY(lpa, MII_LPA);
--MII_ENTRY(expansion, MII_EXPANSION);
--
--static struct attribute *macb_mii_attrs[] = {
--	&dev_attr_bmcr.attr,
--	&dev_attr_bmsr.attr,
--	&dev_attr_physid1.attr,
--	&dev_attr_physid2.attr,
--	&dev_attr_advertise.attr,
--	&dev_attr_lpa.attr,
--	&dev_attr_expansion.attr,
--	NULL,
--};
--
--static struct attribute_group macb_mii_group = {
--	.name	= "mii",
--	.attrs	= macb_mii_attrs,
--};
--
--static void macb_unregister_sysfs(struct net_device *net)
--{
--	struct device *_dev = &net->dev;
--
--	sysfs_remove_group(&_dev->kobj, &macb_mii_group);
--}
--
--static int macb_register_sysfs(struct net_device *net)
--{
--	struct device *_dev = &net->dev;
--	int ret;
--
--	ret = sysfs_create_group(&_dev->kobj, &macb_mii_group);
--	if (ret)
--		printk(KERN_WARNING
--		       "%s: sysfs mii attribute registration failed: %d\n",
--		       net->name, ret);
--	return ret;
--}
- static int __devinit macb_probe(struct platform_device *pdev)
- {
- 	struct eth_platform_data *pdata;
- 	struct resource *regs;
- 	struct net_device *dev;
- 	struct macb *bp;
-+	struct phy_device *phydev;
- 	unsigned long pclk_hz;
- 	u32 config;
- 	int err = -ENXIO;
-@@ -1073,6 +1146,7 @@
- 	dev->stop = macb_close;
- 	dev->hard_start_xmit = macb_start_xmit;
- 	dev->get_stats = macb_get_stats;
-+	dev->set_multicast_list = macb_set_rx_mode;
- 	dev->do_ioctl = macb_ioctl;
- 	dev->poll = macb_poll;
- 	dev->weight = 64;
-@@ -1080,10 +1154,6 @@
- 
- 	dev->base_addr = regs->start;
- 
--	INIT_DELAYED_WORK(&bp->periodic_task, macb_periodic_task);
--	mutex_init(&bp->mdio_mutex);
--	init_completion(&bp->mdio_complete);
--
- 	/* Set MII management clock divider */
- 	pclk_hz = clk_get_rate(bp->pclk);
- 	if (pclk_hz <= 20000000)
-@@ -1096,20 +1166,9 @@
- 		config = MACB_BF(CLK, MACB_CLK_DIV64);
- 	macb_writel(bp, NCFGR, config);
- 
--	bp->mii.dev = dev;
--	bp->mii.mdio_read = macb_mdio_read;
--	bp->mii.mdio_write = macb_mdio_write;
--	bp->mii.phy_id_mask = 0x1f;
--	bp->mii.reg_num_mask = 0x1f;
--
- 	macb_get_hwaddr(bp);
--	err = macb_phy_probe(bp);
--	if (err) {
--		dev_err(&pdev->dev, "Failed to detect PHY, aborting.\n");
--		goto err_out_free_irq;
--	}
-+	pdata = pdev->dev.platform_data;
- 
--	pdata = pdev->dev.platform_data;
- 	if (pdata && pdata->is_rmii)
- #if defined(CONFIG_ARCH_AT91)
- 		macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
-@@ -1131,18 +1190,27 @@
- 		goto err_out_free_irq;
- 	}
- 
-+	if (macb_mii_init(bp) != 0) {
-+		goto err_out_unregister_netdev;
-+	}
-+
- 	platform_set_drvdata(pdev, dev);
- 
--	macb_register_sysfs(dev);
--
- 	printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d "
- 	       "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
- 	       dev->name, dev->base_addr, dev->irq,
- 	       dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
- 	       dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
- 
-+	phydev = bp->phy_dev;
-+	printk(KERN_INFO "%s: attached PHY driver [%s] "
-+		"(mii_bus:phy_addr=%s, irq=%d)\n",
-+		dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
-+
- 	return 0;
- 
-+err_out_unregister_netdev:
-+	unregister_netdev(dev);
- err_out_free_irq:
- 	free_irq(dev->irq, dev);
- err_out_iounmap:
-@@ -1153,7 +1221,9 @@
- 	clk_put(bp->hclk);
- #endif
- 	clk_disable(bp->pclk);
-+#ifndef CONFIG_ARCH_AT91
- err_out_put_pclk:
-+#endif
- 	clk_put(bp->pclk);
- err_out_free_dev:
- 	free_netdev(dev);
-@@ -1171,7 +1241,8 @@
- 
- 	if (dev) {
- 		bp = netdev_priv(dev);
--		macb_unregister_sysfs(dev);
-+		mdiobus_unregister(&bp->mii_bus);
-+		kfree(bp->mii_bus.irq);
- 		unregister_netdev(dev);
- 		free_irq(dev->irq, dev);
- 		iounmap(bp->regs);
-Index: linux-2.6.22.1/drivers/net/macb.h
-===================================================================
---- linux-2.6.22.1/drivers/net/macb.h	(revision 1)
-+++ linux-2.6.22.1/drivers/net/macb.h	(arbetskopia)
-@@ -383,11 +383,11 @@
- 
- 	unsigned int		rx_pending, tx_pending;
- 
--	struct delayed_work	periodic_task;
--
--	struct mutex		mdio_mutex;
--	struct completion	mdio_complete;
--	struct mii_if_info	mii;
-+	struct mii_bus		mii_bus;
-+	struct phy_device	*phy_dev;
-+	unsigned int 		link;
-+	unsigned int 		speed;
-+	unsigned int 		duplex;
- };
- 
- #endif /* _MACB_H */
-Index: linux-2.6.22.1/drivers/net/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/net/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/net/Kconfig	(arbetskopia)
-@@ -191,7 +191,7 @@
- config MACB
- 	tristate "Atmel MACB support"
- 	depends on NET_ETHERNET && (AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263)
--	select MII
-+	select PHYLIB
- 	help
- 	  The Atmel MACB ethernet interface is found on many AT32 and AT91
- 	  parts. Say Y to include support for the MACB chip.
-Index: linux-2.6.22.1/drivers/net/arm/at91_ether.c
-===================================================================
---- linux-2.6.22.1/drivers/net/arm/at91_ether.c	(revision 1)
-+++ linux-2.6.22.1/drivers/net/arm/at91_ether.c	(arbetskopia)
-@@ -894,6 +894,7 @@
- 			skb_reserve(skb, 2);
- 			memcpy(skb_put(skb, pktlen), p_recv, pktlen);
- 
-+			skb->dev = dev;
- 			skb->protocol = eth_type_trans(skb, dev);
- 			dev->last_rx = jiffies;
- 			lp->stats.rx_bytes += pktlen;
-@@ -978,14 +979,22 @@
- 	struct net_device *dev;
- 	struct at91_private *lp;
- 	unsigned int val;
--	int res;
-+	struct resource *res;
-+	int ret;
- 
- 	dev = alloc_etherdev(sizeof(struct at91_private));
- 	if (!dev)
- 		return -ENOMEM;
- 
--	dev->base_addr = AT91_VA_BASE_EMAC;
--	dev->irq = AT91RM9200_ID_EMAC;
-+	/* Get I/O base address and IRQ */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!res) {
-+		free_netdev(dev);
-+		return -ENODEV;
-+	}
-+	dev->base_addr = res->start;
-+	dev->irq = platform_get_irq(pdev, 0);
-+
- 	SET_MODULE_OWNER(dev);
- 
- 	/* Install the interrupt handler */
-@@ -1058,12 +1067,12 @@
- 	lp->phy_address = phy_address;	/* MDI address of PHY */
- 
- 	/* Register the network interface */
--	res = register_netdev(dev);
--	if (res) {
-+	ret = register_netdev(dev);
-+	if (ret) {
- 		free_irq(dev->irq, dev);
- 		free_netdev(dev);
- 		dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
--		return res;
-+		return ret;
- 	}
- 
- 	/* Determine current link speed */
-Index: linux-2.6.22.1/drivers/leds/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/leds/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/leds/Kconfig	(arbetskopia)
-@@ -77,6 +77,13 @@
- 	  This option enables support for the Soekris net4801 and net4826 error
- 	  LED.
- 
-+config LEDS_AT91
-+	tristate "LED support using AT91 GPIOs"
-+	depends on LEDS_CLASS && ARCH_AT91 && !LEDS
-+	help
-+	  This option enables support for LEDs connected to GPIO lines
-+	  on AT91-based boards.
-+
- config LEDS_WRAP
- 	tristate "LED Support for the WRAP series LEDs"
- 	depends on LEDS_CLASS && SCx200_GPIO
-@@ -95,6 +102,14 @@
- 	help
- 	  This option enables support for the front LED on Cobalt Server
- 
-+config LEDS_GPIO
-+	tristate "LED Support for GPIO connected LEDs"
-+	depends on LEDS_CLASS && GENERIC_GPIO
-+	help
-+	  This option enables support for the LEDs connected to GPIO
-+	  outputs. To be useful the particular board must have LEDs
-+	  and they must be connected to the GPIO lines.
-+
- comment "LED Triggers"
- 
- config LEDS_TRIGGERS
-Index: linux-2.6.22.1/drivers/leds/leds-at91.c
-===================================================================
---- linux-2.6.22.1/drivers/leds/leds-at91.c	(revision 0)
-+++ linux-2.6.22.1/drivers/leds/leds-at91.c	(revision 0)
-@@ -0,0 +1,140 @@
-+/*
-+ * AT91 GPIO based LED driver
-+ *
-+ * Copyright (C) 2006 David Brownell
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+static LIST_HEAD(at91_led_list);	/* list of AT91 LEDs */
-+
-+struct at91_led {
-+	struct led_classdev	cdev;
-+	struct list_head	list;
-+	struct at91_gpio_led	*led_data;
-+};
-+
-+/*
-+ * Change the state of the LED.
-+ */
-+static void at91_led_set(struct led_classdev *cdev, enum led_brightness value)
-+{
-+	struct at91_led	*led = container_of(cdev, struct at91_led, cdev);
-+	short		active = (value == LED_OFF);
-+
-+	if (led->led_data->flags & 1)	/* active high/low? */
-+		active = !active;
-+	at91_set_gpio_value(led->led_data->gpio, active);
-+}
-+
-+static int __devexit at91_led_remove(struct platform_device *pdev)
-+{
-+	struct at91_led		*led;
-+
-+	list_for_each_entry (led, &at91_led_list, list)
-+		led_classdev_unregister(&led->cdev);
-+
-+#warning "Free allocated memory"
-+	// TODO: Free memory.	kfree(led);
-+
-+	return 0;
-+}
-+
-+static int __init at91_led_probe(struct platform_device *pdev)
-+{
-+	int			status = 0;
-+	struct at91_gpio_led	*pdata = pdev->dev.platform_data;
-+	unsigned		nr_leds;
-+	struct at91_led		*led;
-+
-+	if (!pdata)
-+		return -ENODEV;
-+
-+	nr_leds = pdata->index;		/* first index stores number of LEDs */
-+
-+	while (nr_leds--) {
-+		led = kzalloc(sizeof(struct at91_led), GFP_KERNEL);
-+		if (!led) {
-+			dev_err(&pdev->dev, "No memory for device\n");
-+			status = -ENOMEM;
-+			goto cleanup;
-+		}
-+		led->led_data = pdata;
-+		led->cdev.name = pdata->name;
-+		led->cdev.brightness_set = at91_led_set,
-+		led->cdev.default_trigger = pdata->trigger;
-+
-+		status = led_classdev_register(&pdev->dev, &led->cdev);
-+		if (status < 0) {
-+			dev_err(&pdev->dev, "led_classdev_register failed - %d\n", status);
-+cleanup:
-+			at91_led_remove(pdev);
-+			break;
-+		}
-+		list_add(&led->list, &at91_led_list);
-+		pdata++;
-+	}
-+	return status;
-+}
-+
-+#ifdef CONFIG_PM
-+static int at91_led_suspend(struct platform_device *dev, pm_message_t state)
-+{
-+	struct at91_led	*led;
-+
-+	list_for_each_entry (led, &at91_led_list, list)
-+		led_classdev_suspend(&led->cdev);
-+
-+	return 0;
-+}
-+
-+static int at91_led_resume(struct platform_device *dev)
-+{
-+	struct at91_led	*led;
-+
-+	list_for_each_entry (led, &at91_led_list, list)
-+		led_classdev_resume(&led->cdev);
-+
-+	return 0;
-+}
-+#else
-+#define	at91_led_suspend	NULL
-+#define	at91_led_resume		NULL
-+#endif
-+
-+static struct platform_driver at91_led_driver = {
-+	.probe		= at91_led_probe,
-+	.remove		= __devexit_p(at91_led_remove),
-+	.suspend	= at91_led_suspend,
-+	.resume		= at91_led_resume,
-+	.driver		= {
-+		.name	= "at91_leds",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init at91_led_init(void)
-+{
-+	return platform_driver_register(&at91_led_driver);
-+}
-+module_init(at91_led_init);
-+
-+static void __exit at91_led_exit(void)
-+{
-+	platform_driver_unregister(&at91_led_driver);
-+}
-+module_exit(at91_led_exit);
-+
-+MODULE_DESCRIPTION("AT91 GPIO LED driver");
-+MODULE_AUTHOR("David Brownell");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/leds/leds-gpio.c
-===================================================================
---- linux-2.6.22.1/drivers/leds/leds-gpio.c	(revision 0)
-+++ linux-2.6.22.1/drivers/leds/leds-gpio.c	(revision 0)
-@@ -0,0 +1,199 @@
-+/*
-+ * LEDs driver for GPIOs
-+ *
-+ * Copyright (C) 2007 8D Technologies inc.
-+ * Raphael Assenat <raph@8d.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+#include <linux/workqueue.h>
-+
-+#include <asm/gpio.h>
-+
-+struct gpio_led_data {
-+	struct led_classdev cdev;
-+	unsigned gpio;
-+	struct work_struct work;
-+	u8 new_level;
-+	u8 can_sleep;
-+	u8 active_low;
-+};
-+
-+static void gpio_led_work(struct work_struct *work)
-+{
-+	struct gpio_led_data	*led_dat =
-+		container_of(work, struct gpio_led_data, work);
-+
-+	gpio_set_value_cansleep(led_dat->gpio, led_dat->new_level);
-+}
-+
-+static void gpio_led_set(struct led_classdev *led_cdev,
-+	enum led_brightness value)
-+{
-+	struct gpio_led_data *led_dat =
-+		container_of(led_cdev, struct gpio_led_data, cdev);
-+	int level;
-+
-+	if (value == LED_OFF)
-+		level = 0;
-+	else
-+		level = 1;
-+
-+	if (led_dat->active_low)
-+		level = !level;
-+
-+	/* setting GPIOs with I2C/etc requires a preemptible task context */
-+	if (led_dat->can_sleep) {
-+		if (preempt_count()) {
-+			led_dat->new_level = level;
-+			schedule_work(&led_dat->work);
-+		} else
-+			gpio_set_value_cansleep(led_dat->gpio, level);
-+	} else
-+		gpio_set_value(led_dat->gpio, level);
-+}
-+
-+static int __init gpio_led_probe(struct platform_device *pdev)
-+{
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led *cur_led;
-+	struct gpio_led_data *leds_data, *led_dat;
-+	int i, ret = 0;
-+
-+	if (!pdata)
-+		return -EBUSY;
-+
-+	leds_data = kzalloc(sizeof(struct gpio_led_data) * pdata->num_leds,
-+				GFP_KERNEL);
-+	if (!leds_data)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < pdata->num_leds; i++) {
-+		cur_led = &pdata->leds[i];
-+		led_dat = &leds_data[i];
-+
-+		led_dat->cdev.name = cur_led->name;
-+		led_dat->cdev.default_trigger = cur_led->default_trigger;
-+		led_dat->gpio = cur_led->gpio;
-+		led_dat->can_sleep = gpio_cansleep(cur_led->gpio);
-+		led_dat->active_low = cur_led->active_low;
-+		led_dat->cdev.brightness_set = gpio_led_set;
-+		led_dat->cdev.brightness = cur_led->active_low ? LED_FULL : LED_OFF;
-+
-+		ret = gpio_request(led_dat->gpio, led_dat->cdev.name);
-+		if (ret < 0)
-+			goto err;
-+
-+		gpio_direction_output(led_dat->gpio, led_dat->active_low);
-+
-+		ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
-+		if (ret < 0) {
-+			gpio_free(led_dat->gpio);
-+			goto err;
-+		}
-+
-+		INIT_WORK(&led_dat->work, gpio_led_work);
-+	}
-+
-+	platform_set_drvdata(pdev, leds_data);
-+
-+	return 0;
-+
-+err:
-+	if (i > 0) {
-+		for (i = i - 1; i >= 0; i--) {
-+			led_classdev_unregister(&leds_data[i].cdev);
-+			gpio_free(leds_data[i].gpio);
-+		}
-+	}
-+
-+	flush_scheduled_work();
-+	kfree(leds_data);
-+
-+	return ret;
-+}
-+
-+static int __exit gpio_led_remove(struct platform_device *pdev)
-+{
-+	int i;
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led_data *leds_data;
-+
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++) {
-+		led_classdev_unregister(&leds_data[i].cdev);
-+		gpio_free(leds_data[i].gpio);
-+	}
-+	
-+	kfree(leds_data);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int gpio_led_suspend(struct platform_device *pdev, pm_message_t state)
-+{
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led_data *leds_data;
-+	int i;
-+	
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++)
-+		led_classdev_suspend(&leds_data[i].cdev);
-+
-+	return 0;
-+}
-+
-+static int gpio_led_resume(struct platform_device *pdev)
-+{
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led_data *leds_data;
-+	int i;
-+
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++)
-+		led_classdev_resume(&leds_data[i].cdev);
-+
-+	return 0;
-+}
-+#else
-+#define gpio_led_suspend NULL
-+#define gpio_led_resume NULL
-+#endif
-+
-+static struct platform_driver gpio_led_driver = {
-+	.remove		= __exit_p(gpio_led_remove),
-+	.suspend	= gpio_led_suspend,
-+	.resume		= gpio_led_resume,
-+	.driver		= {
-+		.name	= "leds-gpio",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init gpio_led_init(void)
-+{
-+	return platform_driver_probe(&gpio_led_driver, gpio_led_probe);
-+}
-+
-+static void __exit gpio_led_exit(void)
-+{
-+	platform_driver_unregister(&gpio_led_driver);
-+}
-+
-+module_init(gpio_led_init);
-+module_exit(gpio_led_exit);
-+
-+MODULE_AUTHOR("Raphael Assenat <raph@8d.com>");
-+MODULE_DESCRIPTION("GPIO LED driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/leds/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/leds/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/leds/Makefile	(arbetskopia)
-@@ -16,6 +16,8 @@
- obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
- obj-$(CONFIG_LEDS_H1940)		+= leds-h1940.o
- obj-$(CONFIG_LEDS_COBALT)		+= leds-cobalt.o
-+obj-$(CONFIG_LEDS_GPIO)			+= leds-gpio.o
-+obj-$(CONFIG_LEDS_AT91)			+= leds-at91.o
- 
- # LED Triggers
- obj-$(CONFIG_LEDS_TRIGGER_TIMER)	+= ledtrig-timer.o
-Index: linux-2.6.22.1/drivers/usb/gadget/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/gadget/Kconfig	(arbetskopia)
-@@ -175,7 +175,20 @@
- 	default USB_GADGET
- 	select USB_GADGET_SELECTED
- 
-+config USB_GADGET_ATMEL_USBA
-+	boolean "Atmel USBA"
-+	select USB_GADGET_DUALSPEED
-+	depends on AVR32
-+	help
-+	  USBA is the integrated high-speed USB Device controller on
-+	  the AT32AP700x processors from Atmel.
- 
-+config USB_ATMEL_USBA
-+	tristate
-+	depends on USB_GADGET_ATMEL_USBA
-+	default USB_GADGET
-+	select USB_GADGET_SELECTED
-+
- config USB_GADGET_OMAP
- 	boolean "OMAP USB Device Controller"
- 	depends on ARCH_OMAP
-Index: linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.c
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.c	(revision 0)
-+++ linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.c	(revision 0)
-@@ -0,0 +1,2072 @@
-+/*
-+ * Driver for the Atmel USBA high speed USB device controller
-+ *
-+ * Copyright (C) 2005-2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+/* #define DEBUG */
-+
-+#include <linux/clk.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/list.h>
-+#include <linux/platform_device.h>
-+#include <linux/usb/ch9.h>
-+#include <linux/usb_gadget.h>
-+#include <linux/delay.h>
-+
-+#include <asm/gpio.h>
-+#include <asm/arch/board.h>
-+
-+#include "atmel_usba_udc.h"
-+
-+#define DMA_ADDR_INVALID (~(dma_addr_t)0)
-+
-+#define FIFO_IOMEM_ID	0
-+#define CTRL_IOMEM_ID	1
-+
-+#ifdef DEBUG
-+#define DBG_ERR		0x0001	/* report all error returns */
-+#define DBG_HW		0x0002	/* debug hardware initialization */
-+#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
-+#define DBG_INT		0x0008	/* interrupts */
-+#define DBG_BUS		0x0010	/* report changes in bus state */
-+#define DBG_QUEUE	0x0020  /* debug request queue processing */
-+#define DBG_FIFO	0x0040  /* debug FIFO contents */
-+#define DBG_DMA		0x0080  /* debug DMA handling */
-+#define DBG_REQ		0x0100	/* print out queued request length */
-+#define DBG_ALL		0xffff
-+#define DBG_NONE	0x0000
-+
-+#define DEBUG_LEVEL	(DBG_ERR)
-+#define DBG(level, fmt, ...)					\
-+	do {							\
-+		if ((level) & DEBUG_LEVEL)			\
-+			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
-+	} while (0)
-+#else
-+#define DBG(level, fmt...)
-+#endif
-+
-+static struct usba_udc the_udc;
-+
-+#ifdef CONFIG_DEBUG_FS
-+#include <linux/debugfs.h>
-+#include <linux/uaccess.h>
-+
-+static int queue_dbg_open(struct inode *inode, struct file *file)
-+{
-+	struct usba_ep *ep = inode->i_private;
-+	struct usba_request *req, *req_copy;
-+	struct list_head *queue_data;
-+
-+	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
-+	if (!queue_data)
-+		return -ENOMEM;
-+	INIT_LIST_HEAD(queue_data);
-+
-+	spin_lock_irq(&ep->udc->lock);
-+	list_for_each_entry(req, &ep->queue, queue) {
-+		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
-+		if (!req_copy)
-+			goto fail;
-+		memcpy(req_copy, req, sizeof(*req_copy));
-+		list_add_tail(&req_copy->queue, queue_data);
-+	}
-+	spin_unlock_irq(&ep->udc->lock);
-+
-+	file->private_data = queue_data;
-+	return 0;
-+
-+fail:
-+	spin_unlock_irq(&ep->udc->lock);
-+	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
-+		list_del(&req->queue);
-+		kfree(req);
-+	}
-+	kfree(queue_data);
-+	return -ENOMEM;
-+}
-+
-+/*
-+ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
-+ *
-+ * b: buffer address
-+ * l: buffer length
-+ * I/i: interrupt/no interrupt
-+ * Z/z: zero/no zero
-+ * S/s: short ok/short not ok
-+ * s: status
-+ * n: nr_packets
-+ * F/f: submitted/not submitted to FIFO
-+ * D/d: using/not using DMA
-+ * L/l: last transaction/not last transaction
-+ */
-+static ssize_t queue_dbg_read(struct file *file, char __user *buf,
-+			      size_t nbytes, loff_t *ppos)
-+{
-+	struct list_head *queue = file->private_data;
-+	struct usba_request *req, *tmp_req;
-+	size_t len, remaining, actual = 0;
-+	char tmpbuf[38];
-+
-+	if (!access_ok(VERIFY_WRITE, buf, nbytes))
-+		return -EFAULT;
-+
-+	mutex_lock(&file->f_dentry->d_inode->i_mutex);
-+	list_for_each_entry_safe(req, tmp_req, queue, queue) {
-+		len = snprintf(tmpbuf, sizeof(tmpbuf),
-+			       "%8p %08x %c%c%c %5d %c%c%c\n",
-+			       req->req.buf, req->req.length,
-+			       req->req.no_interrupt ? 'i' : 'I',
-+			       req->req.zero ? 'Z' : 'z',
-+			       req->req.short_not_ok ? 's' : 'S',
-+			       req->req.status,
-+			       req->submitted ? 'F' : 'f',
-+			       req->using_dma ? 'D' : 'd',
-+			       req->last_transaction ? 'L' : 'l');
-+		len = min(len, sizeof(tmpbuf));
-+		if (len > nbytes)
-+			break;
-+
-+		list_del(&req->queue);
-+		kfree(req);
-+
-+		remaining = __copy_to_user(buf, tmpbuf, len);
-+		actual += len - remaining;
-+		if (remaining)
-+			break;
-+
-+		nbytes -= len;
-+		buf += len;
-+	}
-+	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
-+
-+	return actual;
-+}
-+
-+static int queue_dbg_release(struct inode *inode, struct file *file)
-+{
-+	struct list_head *queue_data = file->private_data;
-+	struct usba_request *req, *tmp_req;
-+
-+	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
-+		list_del(&req->queue);
-+		kfree(req);
-+	}
-+	kfree(queue_data);
-+	return 0;
-+}
-+
-+static int regs_dbg_open(struct inode *inode, struct file *file)
-+{
-+	struct usba_udc *udc;
-+	unsigned int i;
-+	u32 *data;
-+	int ret = -ENOMEM;
-+
-+	mutex_lock(&inode->i_mutex);
-+	udc = inode->i_private;
-+	data = kmalloc(inode->i_size, GFP_KERNEL);
-+	if (!data)
-+		goto out;
-+
-+	spin_lock_irq(&udc->lock);
-+	for (i = 0; i < inode->i_size / 4; i++)
-+		data[i] = __raw_readl(udc->regs + i * 4);
-+	spin_unlock_irq(&udc->lock);
-+
-+	file->private_data = data;
-+	ret = 0;
-+
-+out:
-+	mutex_unlock(&inode->i_mutex);
-+
-+	return ret;
-+}
-+
-+static ssize_t regs_dbg_read(struct file *file, char __user *buf,
-+			     size_t nbytes, loff_t *ppos)
-+{
-+	struct inode *inode = file->f_dentry->d_inode;
-+	int ret;
-+
-+	mutex_lock(&inode->i_mutex);
-+	ret = simple_read_from_buffer(buf, nbytes, ppos,
-+				       file->private_data,
-+				       file->f_dentry->d_inode->i_size);
-+	mutex_unlock(&inode->i_mutex);
-+
-+	return ret;
-+}
-+
-+static int regs_dbg_release(struct inode *inode, struct file *file)
-+{
-+	kfree(file->private_data);
-+	return 0;
-+}
-+
-+const struct file_operations queue_dbg_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= queue_dbg_open,
-+	.llseek		= no_llseek,
-+	.read		= queue_dbg_read,
-+	.release	= queue_dbg_release,
-+};
-+
-+const struct file_operations regs_dbg_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= regs_dbg_open,
-+	.llseek		= generic_file_llseek,
-+	.read		= regs_dbg_read,
-+	.release	= regs_dbg_release,
-+};
-+
-+static void usba_ep_init_debugfs(struct usba_udc *udc,
-+				  struct usba_ep *ep)
-+{
-+	struct dentry *ep_root;
-+
-+	ep_root = debugfs_create_dir(ep_name(ep), udc->debugfs_root);
-+	if (!ep_root)
-+		goto err_root;
-+	ep->debugfs_dir = ep_root;
-+
-+	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
-+						ep, &queue_dbg_fops);
-+	if (!ep->debugfs_queue)
-+		goto err_queue;
-+
-+	if (ep_can_dma(ep)) {
-+		ep->debugfs_dma_status
-+			= debugfs_create_u32("dma_status", 0400, ep_root,
-+					     &ep->last_dma_status);
-+		if (!ep->debugfs_dma_status)
-+			goto err_dma_status;
-+	}
-+	if (ep_is_control(ep)) {
-+		ep->debugfs_state
-+			= debugfs_create_u32("state", 0400, ep_root,
-+					     &ep->state);
-+		if (!ep->debugfs_state)
-+			goto err_state;
-+	}
-+
-+	return;
-+
-+err_state:
-+	if (ep_can_dma(ep))
-+		debugfs_remove(ep->debugfs_dma_status);
-+err_dma_status:
-+	debugfs_remove(ep->debugfs_queue);
-+err_queue:
-+	debugfs_remove(ep_root);
-+err_root:
-+	dev_err(&ep->udc->pdev->dev,
-+		"failed to create debugfs directory for %s\n", ep_name(ep));
-+}
-+
-+static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
-+{
-+	debugfs_remove(ep->debugfs_queue);
-+	debugfs_remove(ep->debugfs_dma_status);
-+	debugfs_remove(ep->debugfs_state);
-+	debugfs_remove(ep->debugfs_dir);
-+	ep->debugfs_dma_status = NULL;
-+	ep->debugfs_dir = NULL;
-+}
-+
-+static void usba_init_debugfs(struct usba_udc *udc)
-+{
-+	struct dentry *root, *regs;
-+	struct resource *regs_resource;
-+
-+	root = debugfs_create_dir(udc->gadget.name, NULL);
-+	if (IS_ERR(root) || !root)
-+		goto err_root;
-+	udc->debugfs_root = root;
-+
-+	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
-+	if (!regs)
-+		goto err_regs;
-+
-+	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
-+					      CTRL_IOMEM_ID);
-+	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
-+	udc->debugfs_regs = regs;
-+
-+	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
-+
-+	return;
-+
-+err_regs:
-+	debugfs_remove(root);
-+err_root:
-+	udc->debugfs_root = NULL;
-+	dev_err(&udc->pdev->dev, "debugfs is not available\n");
-+}
-+
-+static void usba_cleanup_debugfs(struct usba_udc *udc)
-+{
-+	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
-+	debugfs_remove(udc->debugfs_regs);
-+	debugfs_remove(udc->debugfs_root);
-+	udc->debugfs_regs = NULL;
-+	udc->debugfs_root = NULL;
-+}
-+#else
-+static inline void usba_ep_init_debugfs(struct usba_udc *udc,
-+					 struct usba_ep *ep)
-+{
-+
-+}
-+
-+static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
-+{
-+
-+}
-+
-+static inline void usba_init_debugfs(struct usba_udc *udc)
-+{
-+
-+}
-+
-+static inline void usba_cleanup_debugfs(struct usba_udc *udc)
-+{
-+
-+}
-+#endif
-+
-+static int vbus_is_present(struct usba_udc *udc)
-+{
-+	if (udc->vbus_pin != -1)
-+		return gpio_get_value(udc->vbus_pin);
-+
-+	/* No Vbus detection: Assume always present */
-+	return 1;
-+}
-+
-+static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
-+{
-+	unsigned long tmp;
-+
-+	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
-+	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
-+		tmp = *(unsigned long *)buf;
-+		if (len >= 4) {
-+			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
-+			__raw_writel(tmp, fifo);
-+		} else {
-+			do {
-+				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
-+				__raw_writeb(tmp >> 24, fifo);
-+				fifo++;
-+				tmp <<= 8;
-+			} while (--len);
-+			break;
-+		}
-+	}
-+}
-+
-+static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
-+{
-+	union {
-+		unsigned long *w;
-+		unsigned char *b;
-+	} p;
-+	unsigned long tmp;
-+
-+	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
-+	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
-+		if (len >= 4) {
-+			tmp = __raw_readl(fifo);
-+			*p.w = tmp;
-+			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
-+		} else {
-+			do {
-+				tmp = __raw_readb(fifo);
-+				*p.b = tmp;
-+				DBG(DBG_FIFO, " -> %02lx\n", tmp);
-+				fifo++, p.b++;
-+			} while (--len);
-+		}
-+	}
-+}
-+
-+static void next_fifo_transaction(struct usba_ep *ep,
-+				  struct usba_request *req)
-+{
-+	unsigned int transaction_len;
-+
-+	transaction_len = req->req.length - req->req.actual;
-+	req->last_transaction = 1;
-+	if (transaction_len > ep->ep.maxpacket) {
-+		transaction_len = ep->ep.maxpacket;
-+		req->last_transaction = 0;
-+	} else if (transaction_len == ep->ep.maxpacket
-+		   && req->req.zero) {
-+		req->last_transaction = 0;
-+	}
-+	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
-+	    ep_name(ep), req, transaction_len,
-+	    req->last_transaction ? ", done" : "");
-+
-+	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
-+	usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+	req->req.actual += transaction_len;
-+}
-+
-+static void submit_request(struct usba_ep *ep, struct usba_request *req)
-+{
-+	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
-+	    ep_name(ep), req, req->req.length);
-+
-+	req->req.actual = 0;
-+	req->submitted = 1;
-+
-+	if (req->using_dma) {
-+		if (req->req.length == 0) {
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY));
-+			return;
-+		}
-+
-+		if (req->req.zero)
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(SHORT_PACKET));
-+		else
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(SHORT_PACKET));
-+
-+		usba_dma_writel(ep, ADDRESS, req->req.dma);
-+		usba_dma_writel(ep, CONTROL, req->ctrl);
-+	} else {
-+		next_fifo_transaction(ep, req);
-+		if (req->last_transaction) {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY));
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE));
-+		} else {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY));
-+		}
-+	}
-+}
-+
-+static void submit_next_request(struct usba_ep *ep)
-+{
-+	struct usba_request *req;
-+
-+	if (list_empty(&ep->queue)) {
-+		usba_ep_writel(ep, CTL_DIS, (USBA_BIT(TX_PK_RDY)
-+					      | USBA_BIT(RX_BK_RDY)));
-+		return;
-+	}
-+
-+	req = list_entry(ep->queue.next, struct usba_request, queue);
-+	if (!req->submitted)
-+		submit_request(ep, req);
-+}
-+
-+static void send_status(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	ep->state = STATUS_STAGE_IN;
-+	usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+	usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE));
-+}
-+
-+static void receive_data(struct usba_ep *ep)
-+{
-+	struct usba_udc *udc = ep->udc;
-+	struct usba_request *req;
-+	unsigned long status;
-+	unsigned int bytecount, nr_busy;
-+	int is_complete = 0;
-+
-+	status = usba_ep_readl(ep, STA);
-+	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
-+
-+	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
-+
-+	while (nr_busy > 0) {
-+		if (list_empty(&ep->queue)) {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+			break;
-+		}
-+		req = list_entry(ep->queue.next,
-+				 struct usba_request, queue);
-+
-+		bytecount = USBA_BFEXT(BYTE_COUNT, status);
-+
-+		if (status & (1 << 31))
-+			is_complete = 1;
-+		if (req->req.actual + bytecount >= req->req.length) {
-+			is_complete = 1;
-+			bytecount = req->req.length - req->req.actual;
-+		}
-+
-+		copy_from_fifo(req->req.buf + req->req.actual,
-+			       ep->fifo, bytecount);
-+		req->req.actual += bytecount;
-+
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+
-+		if (is_complete) {
-+			DBG(DBG_QUEUE, "%s: request done\n", ep_name(ep));
-+			req->req.status = 0;
-+			list_del_init(&req->queue);
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+			req->req.complete(&ep->ep, &req->req);
-+		}
-+
-+		status = usba_ep_readl(ep, STA);
-+		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
-+
-+		if (is_complete && ep_is_control(ep)) {
-+			send_status(udc, ep);
-+			break;
-+		}
-+	}
-+}
-+
-+static void request_complete(struct usba_ep *ep,
-+			     struct usba_request *req,
-+			     int status)
-+{
-+	struct usba_udc *udc = ep->udc;
-+
-+	WARN_ON(!list_empty(&req->queue));
-+
-+	if (req->req.status == -EINPROGRESS)
-+		req->req.status = status;
-+
-+	if (req->mapped) {
-+		dma_unmap_single(
-+			&udc->pdev->dev, req->req.dma, req->req.length,
-+			ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+		req->req.dma = DMA_ADDR_INVALID;
-+		req->mapped = 0;
-+	}
-+
-+	DBG(DBG_GADGET | DBG_REQ,
-+	    "%s: req %p complete: status %d, actual %u\n",
-+	    ep_name(ep), req, req->req.status, req->req.actual);
-+	req->req.complete(&ep->ep, &req->req);
-+}
-+
-+static void request_complete_list(struct usba_ep *ep,
-+				  struct list_head *list,
-+				  int status)
-+{
-+	struct usba_request *req, *tmp_req;
-+
-+	list_for_each_entry_safe(req, tmp_req, list, queue) {
-+		list_del_init(&req->queue);
-+		request_complete(ep, req, status);
-+	}
-+}
-+
-+static int usba_ep_enable(struct usb_ep *_ep,
-+			   const struct usb_endpoint_descriptor *desc)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	unsigned long flags, ept_cfg, maxpacket;
-+
-+	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep_name(ep), desc);
-+
-+	maxpacket = le16_to_cpu(desc->wMaxPacketSize);
-+
-+	if (ep->index == 0
-+	    || desc->bDescriptorType != USB_DT_ENDPOINT
-+	    || ((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
-+		!= ep->index)
-+	    || maxpacket == 0
-+	    || maxpacket > ep->fifo_size) {
-+		DBG(DBG_ERR, "ep_enable: Invalid argument");
-+		return -EINVAL;
-+	}
-+
-+	ep->is_isoc = 0;
-+	ep->is_in = 0;
-+
-+	if ((desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
-+	    == USB_ENDPOINT_XFER_ISOC) {
-+		    if (!ep->can_isoc) {
-+			    DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
-+				ep_name(ep));
-+			    return -EINVAL;
-+		    }
-+		    ep->is_isoc = 1;
-+	}
-+
-+	if (maxpacket <= 8)
-+		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
-+	else
-+		/* LSB is bit 1, not 0 */
-+		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
-+	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
-+	    ep_name(ep), ept_cfg, maxpacket);
-+
-+	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
-+		ep->is_in = 1;
-+		ept_cfg |= USBA_BIT(EPT_DIR);
-+	}
-+
-+	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
-+	case USB_ENDPOINT_XFER_CONTROL:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
-+		break;
-+	case USB_ENDPOINT_XFER_ISOC:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
-+		break;
-+	case USB_ENDPOINT_XFER_BULK:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
-+		break;
-+	case USB_ENDPOINT_XFER_INT:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
-+		break;
-+	}
-+	ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
-+
-+	spin_lock_irqsave(&ep->udc->lock, flags);
-+
-+	if (ep->desc) {
-+		spin_unlock_irqrestore(&ep->udc->lock, flags);
-+		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
-+		return -EBUSY;
-+	}
-+
-+	ep->desc = desc;
-+	ep->ep.maxpacket = maxpacket;
-+
-+	usba_ep_writel(ep, CFG, ept_cfg);
-+	usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE));
-+
-+	if (ep_can_dma(ep)) {
-+		u32 ctrl;
-+
-+		usba_writel(udc, INT_ENB,
-+			     (usba_readl(udc, INT_ENB)
-+			      | USBA_BF(EPT_INT, 1 << ep->index)
-+			      | USBA_BF(DMA_INT, 1 << ep->index)));
-+		ctrl = USBA_BIT(AUTO_VALID) | USBA_BIT(INTDIS_DMA);
-+		usba_ep_writel(ep, CTL_ENB, ctrl);
-+	} else {
-+		usba_writel(udc, INT_ENB,
-+			     (usba_readl(udc, INT_ENB)
-+			      | USBA_BF(EPT_INT, 1 << ep->index)));
-+	}
-+
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
-+	    (unsigned long)usba_ep_readl(ep, CFG));
-+	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
-+	    (unsigned long)usba_readl(udc, INT_ENB));
-+
-+	return 0;
-+}
-+
-+static int usba_ep_disable(struct usb_ep *_ep)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	LIST_HEAD(req_list);
-+	unsigned long flags;
-+
-+	DBG(DBG_GADGET, "ep_disable: %s\n", ep_name(ep));
-+
-+	spin_lock_irqsave(&udc->lock, flags);
-+
-+	if (!ep->desc) {
-+		spin_unlock_irqrestore(&udc->lock, flags);
-+		DBG(DBG_ERR, "ep_disable: %s not enabled\n",
-+		    ep_name(ep));
-+		return -EINVAL;
-+	}
-+	ep->desc = NULL;
-+
-+	list_splice_init(&ep->queue, &req_list);
-+	if (ep_can_dma(ep)) {
-+		usba_dma_writel(ep, CONTROL, 0);
-+		usba_dma_writel(ep, ADDRESS, 0);
-+		usba_dma_readl(ep, STATUS);
-+	}
-+	usba_ep_writel(ep, CTL_DIS, USBA_BIT(EPT_ENABLE));
-+	usba_writel(udc, INT_ENB, (usba_readl(udc, INT_ENB)
-+				    & ~USBA_BF(EPT_INT, 1 << ep->index)));
-+
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	request_complete_list(ep, &req_list, -ESHUTDOWN);
-+
-+	return 0;
-+}
-+
-+static struct usb_request *
-+usba_ep_alloc_request(struct usb_ep *_ep, unsigned gfp_flags)
-+{
-+	struct usba_request *req;
-+
-+	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
-+
-+	req = kzalloc(sizeof(*req), gfp_flags);
-+	if (!req)
-+		return NULL;
-+
-+	INIT_LIST_HEAD(&req->queue);
-+	req->req.dma = DMA_ADDR_INVALID;
-+
-+	return &req->req;
-+}
-+
-+static void
-+usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
-+{
-+	struct usba_request *req = to_usba_req(_req);
-+
-+	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
-+
-+	kfree(req);
-+}
-+
-+static void *usba_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes,
-+				   dma_addr_t *dma, unsigned gfp_flags)
-+{
-+	void *buf;
-+
-+	if (bytes < L1_CACHE_BYTES)
-+		bytes = L1_CACHE_BYTES;
-+
-+	buf = kmalloc(bytes, gfp_flags);
-+
-+	/*
-+	 * Seems like we have to map the buffer any chance we get.
-+	 * ether.c wants us to initialize the dma member of a
-+	 * different request than the one receiving the buffer, so one
-+	 * never knows...
-+	 *
-+	 * Ah, screw it.  The ether driver is probably wrong, and this
-+	 * is not the right place to do the mapping.  The driver
-+	 * shouldn't mess with our DMA mappings anyway.
-+	 */
-+	*dma = DMA_ADDR_INVALID;
-+
-+	return buf;
-+}
-+
-+static void usba_ep_free_buffer(struct usb_ep *_ep, void *buf,
-+				 dma_addr_t dma, unsigned bytes)
-+{
-+	DBG(DBG_GADGET, "ep_free_buffer: %s, buf %p (size %u)\n",
-+	    _ep->name, buf, bytes);
-+	kfree(buf);
-+}
-+
-+static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
-+		     struct usba_request *req, gfp_t gfp_flags)
-+{
-+	unsigned long flags;
-+	int ret;
-+
-+	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
-+	    ep_name(ep), req->req.length, req->req.dma,
-+	    req->req.zero ? 'Z' : 'z',
-+	    req->req.short_not_ok ? 'S' : 's',
-+	    req->req.no_interrupt ? 'I' : 'i');
-+
-+	if (req->req.length > 0x10000) {
-+		/* Lengths from 0 to 65536 (inclusive) are supported */
-+		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
-+		return -EINVAL;
-+	}
-+
-+	req->using_dma = 1;
-+
-+	if (req->req.dma == DMA_ADDR_INVALID) {
-+		req->req.dma = dma_map_single(
-+			&udc->pdev->dev, req->req.buf, req->req.length,
-+			ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+		req->mapped = 1;
-+	} else {
-+		dma_sync_single_for_device(
-+			&udc->pdev->dev, req->req.dma, req->req.length,
-+			ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+		req->mapped = 0;
-+	}
-+
-+	req->ctrl = (USBA_BF(DMA_BUF_LEN, req->req.length)
-+		     | USBA_BIT(DMA_CH_EN) | USBA_BIT(DMA_END_BUF_IE)
-+		     | USBA_BIT(DMA_END_TR_EN) | USBA_BIT(DMA_END_TR_IE));
-+
-+	if (ep_is_in(ep))
-+		req->ctrl |= USBA_BIT(DMA_END_BUF_EN);
-+
-+	/*
-+	 * Add this request to the queue and submit for DMA if
-+	 * possible. Check if we're still alive first -- we may have
-+	 * received a reset since last time we checked.
-+	 */
-+	ret = -ESHUTDOWN;
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (ep->desc) {
-+		if (list_empty(&ep->queue))
-+			submit_request(ep, req);
-+
-+		list_add_tail(&req->queue, &ep->queue);
-+		ret = 0;
-+	}
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	return ret;
-+}
-+
-+static int usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
-+			  gfp_t gfp_flags)
-+{
-+	struct usba_request *req = to_usba_req(_req);
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	unsigned long flags;
-+	int ret;
-+
-+	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ,
-+	    "%s: queue req %p, len %u\n", ep_name(ep), req, _req->length);
-+
-+	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN
-+	    || !ep->desc)
-+		return -ESHUTDOWN;
-+
-+	req->submitted = 0;
-+	req->using_dma = 0;
-+	req->last_transaction = 0;
-+
-+	_req->status = -EINPROGRESS;
-+	_req->actual = 0;
-+
-+	if (ep_can_dma(ep))
-+		return queue_dma(udc, ep, req, gfp_flags);
-+
-+	/* May have received a reset since last time we checked */
-+	ret = -ESHUTDOWN;
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (ep->desc) {
-+		list_add_tail(&req->queue, &ep->queue);
-+
-+		if (ep_is_in(ep)
-+		    || (ep_is_control(ep)
-+			&& (ep->state == DATA_STAGE_IN
-+			    || ep->state == STATUS_STAGE_IN)))
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY));
-+		else
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(RX_BK_RDY));
-+		ret = 0;
-+	}
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	return ret;
-+}
-+
-+static void usba_update_req(struct usba_ep *ep, struct usba_request *req,
-+			     u32 status)
-+{
-+	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
-+}
-+
-+static int stop_dma(struct usba_ep *ep, u32 *pstatus)
-+{
-+	unsigned int timeout;
-+	u32 status;
-+
-+	/*
-+	 * Stop the DMA controller. When writing both CH_EN
-+	 * and LINK to 0, the other bits are not affected.
-+	 */
-+	usba_dma_writel(ep, CONTROL, 0);
-+
-+	/* Wait for the FIFO to empty */
-+	for (timeout = 40; timeout; --timeout) {
-+		status = usba_dma_readl(ep, STATUS);
-+		if (!(status & USBA_BIT(DMA_CH_EN)))
-+			break;
-+		udelay(1);
-+	}
-+
-+	if (pstatus)
-+		*pstatus = status;
-+
-+	if (timeout == 0) {
-+		dev_err(&ep->udc->pdev->dev,
-+			"%s: timed out waiting for DMA FIFO to empty\n",
-+			ep_name(ep));
-+		return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	struct usba_request *req = to_usba_req(_req);
-+	unsigned long flags;
-+	u32 status;
-+
-+	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
-+	    ep_name(ep), req);
-+
-+	spin_lock_irqsave(&udc->lock, flags);
-+
-+	if (req->using_dma) {
-+		/*
-+		 * If this request is currently being transferred,
-+		 * stop the DMA controller and reset the FIFO.
-+		 */
-+		if (ep->queue.next == &req->queue) {
-+			status = usba_dma_readl(ep, STATUS);
-+			if (status & USBA_BIT(DMA_CH_EN))
-+				stop_dma(ep, &status);
-+
-+#ifdef CONFIG_DEBUG_FS
-+			ep->last_dma_status = status;
-+#endif
-+
-+			usba_writel(udc, EPT_RST,
-+				     1 << ep_index(ep));
-+
-+			usba_update_req(ep, req, status);
-+		}
-+	}
-+
-+	/*
-+	 * Errors should stop the queue from advancing until the
-+	 * completion function returns.
-+	 */
-+	list_del_init(&req->queue);
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	request_complete(ep, req, -ECONNRESET);
-+
-+	/* Process the next request if any */
-+	spin_lock_irqsave(&udc->lock, flags);
-+	submit_next_request(ep);
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	return 0;
-+}
-+
-+static int usba_ep_set_halt(struct usb_ep *_ep, int value)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	unsigned long flags;
-+	int ret = 0;
-+
-+	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep_name(ep),
-+	    value ? "set" : "clear");
-+
-+	if (!ep->desc) {
-+		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
-+		    ep_name(ep));
-+		return -ENODEV;
-+	}
-+	if (ep_is_isochronous(ep)) {
-+		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
-+		    ep_name(ep));
-+		return -ENOTTY;
-+	}
-+
-+	spin_lock_irqsave(&udc->lock, flags);
-+
-+	/*
-+	 * We can't halt IN endpoints while there are still data to be
-+	 * transferred
-+	 */
-+	if (!list_empty(&ep->queue)
-+	    || ((value && ep_is_in(ep)
-+		 && (usba_ep_readl(ep, STA)
-+		     & USBA_BF(BUSY_BANKS, -1L))))) {
-+		ret = -EAGAIN;
-+	} else {
-+		if (value)
-+			usba_ep_writel(ep, SET_STA, USBA_BIT(FORCE_STALL));
-+		else
-+			usba_ep_writel(ep, CLR_STA, (USBA_BIT(FORCE_STALL)
-+						     | USBA_BIT(TOGGLE_SEQ)));
-+		usba_ep_readl(ep, STA);
-+	}
-+
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	return ret;
-+}
-+
-+static int usba_ep_fifo_status(struct usb_ep *_ep)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+
-+	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
-+}
-+
-+static void usba_ep_fifo_flush(struct usb_ep *_ep)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+
-+	usba_writel(udc, EPT_RST, 1 << ep->index);
-+}
-+
-+struct usb_ep_ops usba_ep_ops = {
-+	.enable		= usba_ep_enable,
-+	.disable	= usba_ep_disable,
-+	.alloc_request	= usba_ep_alloc_request,
-+	.free_request	= usba_ep_free_request,
-+	.alloc_buffer	= usba_ep_alloc_buffer,
-+	.free_buffer	= usba_ep_free_buffer,
-+	.queue		= usba_ep_queue,
-+	.dequeue	= usba_ep_dequeue,
-+	.set_halt	= usba_ep_set_halt,
-+	.fifo_status	= usba_ep_fifo_status,
-+	.fifo_flush	= usba_ep_fifo_flush,
-+};
-+
-+static int usba_udc_get_frame(struct usb_gadget *gadget)
-+{
-+	struct usba_udc *udc = to_usba_udc(gadget);
-+
-+	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
-+}
-+
-+struct usb_gadget_ops usba_udc_ops = {
-+	.get_frame	= usba_udc_get_frame,
-+};
-+
-+#define EP(nam, type, idx, dma, isoc)				\
-+{								\
-+	.ep	= {						\
-+		.ops		= &usba_ep_ops,			\
-+		.name		= nam,				\
-+		.maxpacket	= type##_FIFO_SIZE,		\
-+	},							\
-+	.udc		= &the_udc,				\
-+	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
-+	.fifo_size	= type##_FIFO_SIZE,			\
-+	.nr_banks	= type##_NR_BANKS,			\
-+	.index		= idx,					\
-+	.can_dma	= dma,					\
-+	.can_isoc	= isoc,					\
-+}
-+
-+static struct usba_ep usba_ep[] = {
-+	EP("ep0", EP0, 0, 0, 0),
-+	EP("ep1in-bulk", BULK, 1, 1, 0),
-+	EP("ep2out-bulk", BULK, 2, 1, 0),
-+	EP("ep3in-iso", ISO, 3, 1, 1),
-+	EP("ep4out-iso", ISO, 4, 1, 1),
-+	EP("ep5in-int", INT, 5, 1, 0),
-+	EP("ep6out-int", INT, 6, 1, 0),
-+};
-+#undef EP
-+
-+static struct usb_endpoint_descriptor usba_ep0_desc = {
-+	.bLength = USB_DT_ENDPOINT_SIZE,
-+	.bDescriptorType = USB_DT_ENDPOINT,
-+	.bEndpointAddress = 0,
-+	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
-+	.wMaxPacketSize = __constant_cpu_to_le16(64),
-+	/* FIXME: I have no idea what to put here */
-+	.bInterval = 1,
-+};
-+
-+static void nop_release(struct device *dev)
-+{
-+
-+}
-+
-+static struct usba_udc the_udc = {
-+	.gadget	= {
-+		.ops		= &usba_udc_ops,
-+		.ep0		= &usba_ep[0].ep,
-+		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
-+		.is_dualspeed	= 1,
-+		.name		= "atmel_usba_udc",
-+		.dev	= {
-+			.bus_id		= "gadget",
-+			.release	= nop_release,
-+		},
-+	},
-+
-+	.lock	= SPIN_LOCK_UNLOCKED,
-+};
-+
-+/*
-+ * Called with interrupts disabled and udc->lock held.
-+ */
-+static void reset_all_endpoints(struct usba_udc *udc)
-+{
-+	struct usba_ep *ep;
-+	struct usba_request *req, *tmp_req;
-+
-+	usba_writel(udc, EPT_RST, ~0UL);
-+
-+	ep = to_usba_ep(udc->gadget.ep0);
-+	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
-+		list_del_init(&req->queue);
-+		request_complete(ep, req, -ECONNRESET);
-+	}
-+
-+	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
-+		if (ep->desc)
-+			usba_ep_disable(&ep->ep);
-+	}
-+}
-+
-+static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
-+{
-+	struct usba_ep *ep;
-+
-+	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
-+		return to_usba_ep(udc->gadget.ep0);
-+
-+	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
-+		u8 bEndpointAddress;
-+
-+		if (!ep->desc)
-+			continue;
-+		bEndpointAddress = ep->desc->bEndpointAddress;
-+		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
-+			continue;
-+		if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
-+		    == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
-+			return ep;
-+	}
-+
-+	return NULL;
-+}
-+
-+/* Called with interrupts disabled and udc->lock held */
-+static inline void set_protocol_stall(struct usba_udc *udc,
-+				      struct usba_ep *ep)
-+{
-+	usba_ep_writel(ep, SET_STA, USBA_BIT(FORCE_STALL));
-+	ep->state = WAIT_FOR_SETUP;
-+}
-+
-+static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	if (usba_ep_readl(ep, STA) & USBA_BIT(FORCE_STALL))
-+		return 1;
-+	return 0;
-+}
-+
-+static inline void set_address(struct usba_udc *udc, unsigned int addr)
-+{
-+	u32 regval;
-+
-+	DBG(DBG_BUS, "setting address %u...\n", addr);
-+	regval = usba_readl(udc, CTRL);
-+	regval = USBA_BFINS(DEV_ADDR, addr, regval);
-+	usba_writel(udc, CTRL, regval);
-+}
-+
-+static int do_test_mode(struct usba_udc *udc)
-+{
-+	static const char test_packet_buffer[] = {
-+		/* JKJKJKJK * 9 */
-+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-+		/* JJKKJJKK * 8 */
-+		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
-+		/* JJKKJJKK * 8 */
-+		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
-+		/* JJJJJJJKKKKKKK * 8 */
-+		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+		/* JJJJJJJK * 8 */
-+		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
-+		/* {JKKKKKKK * 10}, JK */
-+		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
-+	};
-+	struct device *dev = &udc->pdev->dev;
-+	struct usba_ep *ep;
-+	int test_mode;
-+
-+	test_mode = udc->test_mode;
-+
-+	/* Start from a clean slate */
-+	reset_all_endpoints(udc);
-+
-+	switch (test_mode) {
-+	case 0x0100:
-+		/* Test_J */
-+		usba_writel(udc, TST, USBA_BIT(TST_J_MODE));
-+		dev_info(dev, "Entering Test_J mode...\n");
-+		break;
-+	case 0x0200:
-+		/* Test_K */
-+		usba_writel(udc, TST, USBA_BIT(TST_K_MODE));
-+		dev_info(dev, "Entering Test_K mode...\n");
-+		break;
-+	case 0x0300:
-+		/*
-+		 * Test_SE0_NAK: Force high-speed mode and set up ep0
-+		 * for Bulk IN transfers
-+		 */
-+		ep = &usba_ep[0];
-+		usba_writel(udc, TST,
-+			     USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
-+		usba_ep_writel(ep, CFG,
-+				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
-+				| USBA_BIT(EPT_DIR)
-+				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
-+				| USBA_BF(BK_NUMBER, 1));
-+		if (!(usba_ep_readl(ep, CFG) & USBA_BIT(EPT_MAPPED))) {
-+			set_protocol_stall(udc, ep);
-+			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
-+		} else {
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE));
-+			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
-+		}
-+		break;
-+	case 0x0400:
-+		/* Test_Packet */
-+		ep = &usba_ep[0];
-+		usba_ep_writel(ep, CFG,
-+				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
-+				| USBA_BIT(EPT_DIR)
-+				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
-+				| USBA_BF(BK_NUMBER, 1));
-+		if (!(usba_ep_readl(ep, CFG) & USBA_BIT(EPT_MAPPED))) {
-+			set_protocol_stall(udc, ep);
-+			dev_err(dev, "Test_Packet: ep0 not mapped\n");
-+		} else {
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE));
-+			usba_writel(udc, TST, USBA_BIT(TST_PKT_MODE));
-+			copy_to_fifo(ep->fifo, test_packet_buffer,
-+				     sizeof(test_packet_buffer));
-+			usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+			dev_info(dev, "Entering Test_Packet mode...\n");
-+		}
-+		break;
-+	default:
-+		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+/* Avoid overly long expressions */
-+static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
-+{
-+	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
-+		return true;
-+	return false;
-+}
-+
-+static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
-+{
-+	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
-+		return true;
-+	return false;
-+}
-+
-+static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
-+{
-+	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
-+		return true;
-+	return false;
-+}
-+
-+static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
-+			    struct usb_ctrlrequest *crq)
-+{
-+	switch (crq->bRequest) {
-+	case USB_REQ_GET_STATUS: {
-+		u16 status;
-+
-+		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
-+			/* Self-powered, no remote wakeup */
-+			status = __constant_cpu_to_le16(1 << 0);
-+		} else if (crq->bRequestType
-+			   == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
-+			status = __constant_cpu_to_le16(0);
-+		} else if (crq->bRequestType
-+			   == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
-+			struct usba_ep *target;
-+
-+			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
-+			if (!target)
-+				goto stall;
-+
-+			status = 0;
-+			if (is_stalled(udc, target))
-+				status |= __constant_cpu_to_le16(1);
-+		} else {
-+			goto delegate;
-+		}
-+
-+		/* Write directly to the FIFO. No queueing is done. */
-+		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
-+			goto stall;
-+		ep->state = DATA_STAGE_IN;
-+		__raw_writew(status, ep->fifo);
-+		usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+		break;
-+	}
-+
-+	case USB_REQ_CLEAR_FEATURE: {
-+		if (crq->bRequestType == USB_RECIP_DEVICE) {
-+			if (feature_is_dev_remote_wakeup(crq)) {
-+				/* TODO: Handle REMOTE_WAKEUP */
-+			} else {
-+				/* Can't CLEAR_FEATURE TEST_MODE */
-+				goto stall;
-+			}
-+		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
-+			struct usba_ep *target;
-+
-+			if (!feature_is_ep_halt(crq)
-+			    || crq->wLength != __constant_cpu_to_le16(0))
-+				goto stall;
-+			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
-+			if (!target)
-+				goto stall;
-+
-+			usba_ep_writel(target, CLR_STA,
-+				       (USBA_BIT(FORCE_STALL)
-+					| USBA_BIT(TOGGLE_SEQ)));
-+		} else {
-+			goto delegate;
-+		}
-+
-+		send_status(udc, ep);
-+		break;
-+	}
-+
-+	case USB_REQ_SET_FEATURE: {
-+		if (crq->bRequestType == USB_RECIP_DEVICE) {
-+			if (feature_is_dev_test_mode(crq)) {
-+				send_status(udc, ep);
-+				ep->state = STATUS_STAGE_TEST;
-+				udc->test_mode = le16_to_cpu(crq->wIndex);
-+				return 0;
-+			} else if (feature_is_dev_remote_wakeup(crq)) {
-+				/* TODO: Handle REMOTE_WAKEUP */
-+			} else {
-+				goto stall;
-+			}
-+		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
-+			struct usba_ep *target;
-+
-+			if (!feature_is_ep_halt(crq)
-+			    || crq->wLength != __constant_cpu_to_le16(0))
-+				goto stall;
-+
-+			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
-+			if (!target)
-+				goto stall;
-+
-+			usba_ep_writel(target, SET_STA, USBA_BIT(FORCE_STALL));
-+		} else
-+			goto delegate;
-+
-+		send_status(udc, ep);
-+		break;
-+	}
-+
-+	case USB_REQ_SET_ADDRESS:
-+		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
-+			goto delegate;
-+
-+		set_address(udc, le16_to_cpu(crq->wValue));
-+		send_status(udc, ep);
-+		ep->state = STATUS_STAGE_ADDR;
-+		break;
-+
-+	default:
-+delegate:
-+		return udc->driver->setup(&udc->gadget, crq);
-+	}
-+
-+	return 0;
-+
-+stall:
-+	printk(KERN_ERR
-+	       "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
-+	       "halting endpoint...\n",
-+	       ep_name(ep), crq->bRequestType, crq->bRequest,
-+	       le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
-+	       le16_to_cpu(crq->wLength));
-+	set_protocol_stall(udc, ep);
-+	return -1;
-+}
-+
-+static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	struct usba_request *req;
-+	u32 epstatus;
-+	u32 epctrl;
-+
-+restart:
-+	epstatus = usba_ep_readl(ep, STA);
-+	epctrl = usba_ep_readl(ep, CTL);
-+
-+	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
-+	    ep_name(ep), ep->state, epstatus, epctrl);
-+
-+	req = NULL;
-+	if (!list_empty(&ep->queue))
-+		req = list_entry(ep->queue.next,
-+				 struct usba_request, queue);
-+
-+	if ((epctrl & USBA_BIT(TX_PK_RDY))
-+	    && !(epstatus & USBA_BIT(TX_PK_RDY))) {
-+		if (req->submitted)
-+			next_fifo_transaction(ep, req);
-+		else
-+			submit_request(ep, req);
-+
-+		if (req->last_transaction) {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY));
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE));
-+		}
-+		goto restart;
-+	}
-+	if ((epstatus & epctrl) & USBA_BIT(TX_COMPLETE)) {
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(TX_COMPLETE));
-+
-+		switch (ep->state) {
-+		case DATA_STAGE_IN:
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(RX_BK_RDY));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = STATUS_STAGE_OUT;
-+			break;
-+		case STATUS_STAGE_ADDR:
-+			/* Activate our new address */
-+			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
-+						| USBA_BIT(FADDR_EN)));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = WAIT_FOR_SETUP;
-+			break;
-+		case STATUS_STAGE_IN:
-+			if (req) {
-+				list_del_init(&req->queue);
-+				request_complete(ep, req, 0);
-+				submit_next_request(ep);
-+			}
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = WAIT_FOR_SETUP;
-+			break;
-+		case STATUS_STAGE_TEST:
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = WAIT_FOR_SETUP;
-+			if (do_test_mode(udc))
-+				set_protocol_stall(udc, ep);
-+			break;
-+		default:
-+			printk(KERN_ERR
-+			       "udc: %s: TXCOMP: Invalid endpoint state %d, "
-+			       "halting endpoint...\n",
-+			       ep_name(ep), ep->state);
-+			set_protocol_stall(udc, ep);
-+			break;
-+		}
-+
-+		goto restart;
-+	}
-+	if ((epstatus & epctrl) & USBA_BIT(RX_BK_RDY)) {
-+		switch (ep->state) {
-+		case STATUS_STAGE_OUT:
-+			usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+
-+			if (req) {
-+				list_del_init(&req->queue);
-+				request_complete(ep, req, 0);
-+			}
-+			ep->state = WAIT_FOR_SETUP;
-+			break;
-+
-+		case DATA_STAGE_OUT:
-+			receive_data(ep);
-+			break;
-+
-+		default:
-+			usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+			printk(KERN_ERR
-+			       "udc: %s: RXRDY: Invalid endpoint state %d, "
-+			       "halting endpoint...\n",
-+			       ep_name(ep), ep->state);
-+			set_protocol_stall(udc, ep);
-+			break;
-+		}
-+
-+		goto restart;
-+	}
-+	if (epstatus & USBA_BIT(RX_SETUP)) {
-+		union {
-+			struct usb_ctrlrequest crq;
-+			unsigned long data[2];
-+		} crq;
-+		unsigned int pkt_len;
-+		int ret;
-+
-+		if (ep->state != WAIT_FOR_SETUP) {
-+			/*
-+			 * Didn't expect a SETUP packet at this
-+			 * point. Clean up any pending requests (which
-+			 * may be successful).
-+			 */
-+			int status = -EPROTO;
-+
-+			/*
-+			 * RXRDY and TXCOMP are dropped when SETUP
-+			 * packets arrive.  Just pretend we received
-+			 * the status packet.
-+			 */
-+			if (ep->state == STATUS_STAGE_OUT
-+			    || ep->state == STATUS_STAGE_IN) {
-+				usba_ep_writel(ep, CTL_DIS,
-+					       USBA_BIT(RX_BK_RDY));
-+				status = 0;
-+			}
-+
-+			if (req) {
-+				list_del_init(&req->queue);
-+				request_complete(ep, req, status);
-+			}
-+		}
-+
-+		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
-+		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
-+		if (pkt_len != sizeof(crq)) {
-+			printk(KERN_WARNING
-+			       "udc: Invalid packet length %u (expected %lu)\n",
-+			       pkt_len, sizeof(crq));
-+			set_protocol_stall(udc, ep);
-+			return;
-+		}
-+
-+		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
-+		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
-+
-+		/* Free up one bank in the FIFO so that we can
-+		 * generate or receive a reply right away. */
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_SETUP));
-+
-+		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
-+		       ep->state, crq.crq.bRequestType,
-+		       crq.crq.bRequest); */
-+
-+		if (crq.crq.bRequestType & USB_DIR_IN) {
-+			/*
-+			 * The USB 2.0 spec states that "if wLength is
-+			 * zero, there is no data transfer phase."
-+			 * However, testusb #14 seems to actually
-+			 * expect a data phase even if wLength = 0...
-+			 */
-+			ep->state = DATA_STAGE_IN;
-+		} else {
-+			if (crq.crq.wLength != __constant_cpu_to_le16(0))
-+				ep->state = DATA_STAGE_OUT;
-+			else
-+				ep->state = STATUS_STAGE_IN;
-+		}
-+
-+		ret = -1;
-+		if (ep->index == 0)
-+			ret = handle_ep0_setup(udc, ep, &crq.crq);
-+		else
-+			ret = udc->driver->setup(&udc->gadget, &crq.crq);
-+
-+		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
-+		    crq.crq.bRequestType, crq.crq.bRequest,
-+		    le16_to_cpu(crq.crq.wLength), ep->state, ret);
-+
-+		if (ret < 0) {
-+			/* Let the host know that we failed */
-+			set_protocol_stall(udc, ep);
-+		}
-+	}
-+}
-+
-+static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	struct usba_request *req;
-+	u32 epstatus;
-+	u32 epctrl;
-+
-+	epstatus = usba_ep_readl(ep, STA);
-+	epctrl = usba_ep_readl(ep, CTL);
-+
-+	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n",
-+	    ep_name(ep), epstatus);
-+
-+	while ((epctrl & USBA_BIT(TX_PK_RDY))
-+	       && !(epstatus & USBA_BIT(TX_PK_RDY))) {
-+		DBG(DBG_BUS, "%s: TX PK ready\n", ep_name(ep));
-+
-+		if (list_empty(&ep->queue)) {
-+			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY));
-+			return;
-+		}
-+
-+		req = list_entry(ep->queue.next, struct usba_request, queue);
-+
-+		if (req->using_dma) {
-+			/* Send a zero-length packet */
-+			usba_ep_writel(ep, SET_STA,
-+					USBA_BIT(TX_PK_RDY));
-+			usba_ep_writel(ep, CTL_DIS,
-+					USBA_BIT(TX_PK_RDY));
-+			list_del_init(&req->queue);
-+			submit_next_request(ep);
-+			request_complete(ep, req, 0);
-+		} else {
-+			if (req->submitted)
-+				next_fifo_transaction(ep, req);
-+			else
-+				submit_request(ep, req);
-+
-+			if (req->last_transaction) {
-+				list_del_init(&req->queue);
-+				submit_next_request(ep);
-+				request_complete(ep, req, 0);
-+			}
-+		}
-+
-+		epstatus = usba_ep_readl(ep, STA);
-+		epctrl = usba_ep_readl(ep, CTL);
-+	}
-+	if ((epstatus & epctrl) & USBA_BIT(RX_BK_RDY)) {
-+		DBG(DBG_BUS, "%s: RX data ready\n", ep_name(ep));
-+		receive_data(ep);
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+	}
-+}
-+
-+static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	struct usba_request *req;
-+	u32 status, control, pending;
-+
-+	status = usba_dma_readl(ep, STATUS);
-+	control = usba_dma_readl(ep, CONTROL);
-+#ifdef CONFIG_DEBUG_FS
-+	ep->last_dma_status = status;
-+#endif
-+	pending = status & control;
-+	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n",
-+	    status, control);
-+
-+	if (status & USBA_BIT(DMA_CH_EN)) {
-+		dev_err(&udc->pdev->dev,
-+			"DMA_CH_EN is set after transfer is finished!\n");
-+		dev_err(&udc->pdev->dev,
-+		       "status=%#08x, pending=%#08x, control=%#08x\n",
-+		       status, pending, control);
-+
-+		/*
-+		 * try to pretend nothing happened. We might have to
-+		 * do something here...
-+		 */
-+	}
-+
-+	if (list_empty(&ep->queue))
-+		/* Might happen if a reset comes along at the right moment */
-+		return;
-+
-+	if (pending & (USBA_BIT(DMA_END_TR_ST) | USBA_BIT(DMA_END_BUF_ST))) {
-+		req = list_entry(ep->queue.next, struct usba_request, queue);
-+		usba_update_req(ep, req, status);
-+
-+		list_del_init(&req->queue);
-+		submit_next_request(ep);
-+		request_complete(ep, req, 0);
-+	}
-+}
-+
-+static irqreturn_t usba_udc_irq(int irq, void *devid)
-+{
-+	struct usba_udc *udc = devid;
-+	u32 status;
-+	u32 dma_status;
-+	u32 ep_status;
-+
-+	spin_lock(&udc->lock);
-+
-+	status = usba_readl(udc, INT_STA);
-+	DBG(DBG_INT, "irq, status=%#08x\n", status);
-+
-+	if (status & USBA_BIT(DET_SUSPEND)) {
-+		usba_writel(udc, INT_CLR, USBA_BIT(DET_SUSPEND));
-+		DBG(DBG_BUS, "Suspend detected\n");
-+		if (udc->gadget.speed != USB_SPEED_UNKNOWN
-+		    && udc->driver && udc->driver->suspend)
-+			udc->driver->suspend(&udc->gadget);
-+	}
-+
-+	if (status & USBA_BIT(WAKE_UP)) {
-+		usba_writel(udc, INT_CLR, USBA_BIT(WAKE_UP));
-+		DBG(DBG_BUS, "Wake Up CPU detected\n");
-+	}
-+
-+	if (status & USBA_BIT(END_OF_RESUME)) {
-+		usba_writel(udc, INT_CLR, USBA_BIT(END_OF_RESUME));
-+		DBG(DBG_BUS, "Resume detected\n");
-+		if (udc->gadget.speed != USB_SPEED_UNKNOWN
-+		    && udc->driver && udc->driver->resume)
-+			udc->driver->resume(&udc->gadget);
-+	}
-+
-+	dma_status = USBA_BFEXT(DMA_INT, status);
-+	if (dma_status) {
-+		int i;
-+
-+		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
-+			if (dma_status & (1 << i))
-+				usba_dma_irq(udc, &usba_ep[i]);
-+	}
-+
-+	ep_status = USBA_BFEXT(EPT_INT, status);
-+	if (ep_status) {
-+		int i;
-+
-+		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
-+			if (ep_status & (1 << i)) {
-+				if (ep_is_control(&usba_ep[i]))
-+					usba_control_irq(udc, &usba_ep[i]);
-+				else
-+					usba_ep_irq(udc, &usba_ep[i]);
-+			}
-+	}
-+
-+	if (status & USBA_BIT(END_OF_RESET)) {
-+		struct usba_ep *ep0;
-+
-+		usba_writel(udc, INT_CLR, USBA_BIT(END_OF_RESET));
-+		reset_all_endpoints(udc);
-+
-+		if (status & USBA_BIT(HIGH_SPEED)) {
-+			DBG(DBG_BUS, "High-speed bus reset detected\n");
-+			udc->gadget.speed = USB_SPEED_HIGH;
-+		} else {
-+			DBG(DBG_BUS, "Full-speed bus reset detected\n");
-+			udc->gadget.speed = USB_SPEED_FULL;
-+		}
-+
-+		ep0 = &usba_ep[0];
-+		ep0->desc = &usba_ep0_desc;
-+		ep0->state = WAIT_FOR_SETUP;
-+		usba_ep_writel(ep0, CFG,
-+			       (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
-+				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
-+				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
-+		usba_ep_writel(ep0, CTL_ENB,
-+			       USBA_BIT(EPT_ENABLE) | USBA_BIT(RX_SETUP));
-+		usba_writel(udc, INT_ENB, (usba_readl(udc, INT_ENB)
-+					   | USBA_BF(EPT_INT, 1)
-+					   | USBA_BIT(DET_SUSPEND)
-+					   | USBA_BIT(END_OF_RESUME)));
-+
-+		if (!(usba_ep_readl(ep0, CFG) & USBA_BIT(EPT_MAPPED)))
-+			dev_warn(&udc->pdev->dev,
-+				 "WARNING: EP0 configuration is invalid!\n");
-+	}
-+
-+	spin_unlock(&udc->lock);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t usba_vbus_irq(int irq, void *devid)
-+{
-+	struct usba_udc *udc = devid;
-+	int vbus;
-+
-+	/* debounce */
-+	udelay(10);
-+
-+	spin_lock(&udc->lock);
-+	vbus = gpio_get_value(udc->vbus_pin);
-+	if (vbus != udc->vbus_prev) {
-+		if (vbus) {
-+			usba_writel(udc, CTRL, USBA_BIT(EN_USBA));
-+			usba_writel(udc, INT_ENB, USBA_BIT(END_OF_RESET));
-+		} else {
-+			udc->gadget.speed = USB_SPEED_UNKNOWN;
-+			reset_all_endpoints(udc);
-+			usba_writel(udc, CTRL, 0);
-+			if (udc->driver)
-+				udc->driver->disconnect(&udc->gadget);
-+		}
-+		udc->vbus_prev = vbus;
-+	}
-+	spin_unlock(&udc->lock);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+int usb_gadget_register_driver(struct usb_gadget_driver *driver)
-+{
-+	struct usba_udc *udc = &the_udc;
-+	unsigned long flags;
-+	int ret;
-+
-+	if (!udc->pdev)
-+		return -ENODEV;
-+
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (udc->driver) {
-+		spin_unlock_irqrestore(&udc->lock, flags);
-+		return -EBUSY;
-+	}
-+
-+	udc->driver = driver;
-+	udc->gadget.dev.driver = &driver->driver;
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	clk_enable(udc->pclk);
-+	clk_enable(udc->hclk);
-+
-+	ret = driver->bind(&udc->gadget);
-+	if (ret) {
-+		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
-+		    driver->driver.name, ret);
-+		goto err_driver_bind;
-+	}
-+
-+	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
-+
-+	udc->vbus_prev = 0;
-+	if (udc->vbus_pin != -1) {
-+		ret = request_irq(gpio_to_irq(udc->vbus_pin),
-+				  usba_vbus_irq, 0, "atmel_usba_udc", udc);
-+		if (ret) {
-+			gpio_free(udc->vbus_pin);
-+			udc->vbus_pin = -1;
-+			dev_warn(&udc->pdev->dev,
-+				 "failed to request vbus irq; "
-+				 "assuming always on\n");
-+		}
-+	}
-+
-+	/* If Vbus is present, enable the controller and wait for reset */
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
-+		usba_writel(udc, CTRL, USBA_BIT(EN_USBA));
-+		usba_writel(udc, INT_ENB, USBA_BIT(END_OF_RESET));
-+	}
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	return 0;
-+
-+err_driver_bind:
-+	udc->driver = NULL;
-+	udc->gadget.dev.driver = NULL;
-+	return ret;
-+}
-+EXPORT_SYMBOL(usb_gadget_register_driver);
-+
-+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
-+{
-+	struct usba_udc *udc = &the_udc;
-+	unsigned long flags;
-+
-+	if (!udc->pdev)
-+		return -ENODEV;
-+	if (driver != udc->driver)
-+		return -EINVAL;
-+
-+	if (udc->vbus_pin != -1)
-+		free_irq(gpio_to_irq(udc->vbus_pin), udc);
-+
-+	spin_lock_irqsave(&udc->lock, flags);
-+	udc->gadget.speed = USB_SPEED_UNKNOWN;
-+	reset_all_endpoints(udc);
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	/* This will also disable the DP pullup */
-+	usba_writel(udc, CTRL, 0);
-+
-+	driver->unbind(&udc->gadget);
-+	udc->gadget.dev.driver = NULL;
-+	udc->driver = NULL;
-+
-+	clk_disable(udc->hclk);
-+	clk_disable(udc->pclk);
-+
-+	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(usb_gadget_unregister_driver);
-+
-+static int __devinit usba_udc_probe(struct platform_device *pdev)
-+{
-+	struct usba_platform_data *pdata = pdev->dev.platform_data;
-+	struct resource *regs, *fifo;
-+	struct clk *pclk, *hclk;
-+	struct usba_udc *udc = &the_udc;
-+	int irq, ret, i;
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
-+	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
-+	if (!regs || !fifo)
-+		return -ENXIO;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0)
-+		return irq;
-+
-+	pclk = clk_get(&pdev->dev, "pclk");
-+	if (IS_ERR(pclk))
-+		return PTR_ERR(pclk);
-+	hclk = clk_get(&pdev->dev, "hclk");
-+	if (IS_ERR(hclk)) {
-+		ret = PTR_ERR(hclk);
-+		goto err_get_hclk;
-+	}
-+
-+	udc->pdev = pdev;
-+	udc->pclk = pclk;
-+	udc->hclk = hclk;
-+	udc->vbus_pin = -1;
-+
-+	ret = -ENOMEM;
-+	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!udc->regs) {
-+		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
-+		goto err_map_regs;
-+	}
-+	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
-+		 (unsigned long)regs->start, udc->regs);
-+	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
-+	if (!udc->fifo) {
-+		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
-+		goto err_map_fifo;
-+	}
-+	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
-+		 (unsigned long)fifo->start, udc->fifo);
-+
-+	device_initialize(&udc->gadget.dev);
-+	udc->gadget.dev.parent = &pdev->dev;
-+	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
-+
-+	platform_set_drvdata(pdev, udc);
-+
-+	/* Make sure we start from a clean slate */
-+	clk_enable(pclk);
-+	usba_writel(udc, CTRL, 0);
-+	clk_disable(pclk);
-+
-+	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
-+	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
-+	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
-+	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
-+	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
-+		struct usba_ep *ep = &usba_ep[i];
-+
-+		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
-+		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
-+		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
-+
-+		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
-+	}
-+
-+	ret = request_irq(irq, usba_udc_irq, IRQF_SAMPLE_RANDOM,
-+			  "atmel_usba_udc", udc);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
-+			irq, ret);
-+		goto err_request_irq;
-+	}
-+	udc->irq = irq;
-+
-+	ret = device_add(&udc->gadget.dev);
-+	if (ret) {
-+		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
-+		goto err_device_add;
-+	}
-+
-+	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE)
-+		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc"))
-+			udc->vbus_pin = pdata->vbus_pin;
-+
-+	usba_init_debugfs(udc);
-+	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
-+		usba_ep_init_debugfs(udc, &usba_ep[i]);
-+
-+	return 0;
-+
-+err_device_add:
-+	free_irq(irq, udc);
-+err_request_irq:
-+	iounmap(udc->fifo);
-+err_map_fifo:
-+	iounmap(udc->regs);
-+err_map_regs:
-+	clk_put(hclk);
-+err_get_hclk:
-+	clk_put(pclk);
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return ret;
-+}
-+
-+static int __devexit usba_udc_remove(struct platform_device *pdev)
-+{
-+	struct usba_udc *udc;
-+	int i;
-+
-+	udc = platform_get_drvdata(pdev);
-+
-+	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
-+		usba_ep_cleanup_debugfs(&usba_ep[i]);
-+	usba_cleanup_debugfs(udc);
-+
-+	if (udc->vbus_pin != -1)
-+		gpio_free(udc->vbus_pin);
-+
-+	free_irq(udc->irq, udc);
-+	iounmap(udc->fifo);
-+	iounmap(udc->regs);
-+	clk_put(udc->hclk);
-+	clk_put(udc->pclk);
-+
-+	device_unregister(&udc->gadget.dev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver udc_driver = {
-+	.probe		= usba_udc_probe,
-+	.remove		= __devexit_p(usba_udc_remove),
-+	.driver		= {
-+		.name		= "atmel_usba_udc",
-+	},
-+};
-+
-+static int __init udc_init(void)
-+{
-+	return platform_driver_register(&udc_driver);
-+}
-+module_init(udc_init);
-+
-+static void __exit udc_exit(void)
-+{
-+	platform_driver_unregister(&udc_driver);
-+}
-+module_exit(udc_exit);
-+
-+MODULE_DESCRIPTION("Atmel USBA UDC driver");
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/usb/gadget/ether.c
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/ether.c	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/gadget/ether.c	(arbetskopia)
-@@ -277,7 +277,7 @@
- #define DEV_CONFIG_CDC
- #endif
- 
--#ifdef CONFIG_USB_GADGET_HUSB2DEV
-+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
- #define DEV_CONFIG_CDC
- #endif
- 
-Index: linux-2.6.22.1/drivers/usb/gadget/at91_udc.c
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/at91_udc.c	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/gadget/at91_udc.c	(arbetskopia)
-@@ -1803,7 +1803,7 @@
- 	 */
- 	if ((!udc->suspended && udc->addr)
- 			|| !wake
--			|| at91_suspend_entering_slow_clock()) {
-+			|| clk_must_disable(udc->fclk)) {
- 		pullup(udc, 0);
- 		wake = 0;
- 	} else
-Index: linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.h
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.h	(revision 0)
-+++ linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.h	(revision 0)
-@@ -0,0 +1,402 @@
-+/*
-+ * Driver for the Atmel USBA high speed USB device controller
-+ *
-+ * Copyright (C) 2005-2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
-+#define __LINUX_USB_GADGET_USBA_UDC_H__
-+
-+/* USB register offsets */
-+#define USBA_CTRL				0x0000
-+#define USBA_FNUM				0x0004
-+#define USBA_INT_ENB				0x0010
-+#define USBA_INT_STA				0x0014
-+#define USBA_INT_CLR				0x0018
-+#define USBA_EPT_RST				0x001c
-+#define USBA_TST_SOF_CNT			0x00d0
-+#define USBA_TST_CNT_A				0x00d4
-+#define USBA_TST_CNT_B				0x00d8
-+#define USBA_TST_MODE_REG			0x00dc
-+#define USBA_TST				0x00e0
-+
-+/* USB endpoint register offsets */
-+#define USBA_EPT_CFG				0x0000
-+#define USBA_EPT_CTL_ENB			0x0004
-+#define USBA_EPT_CTL_DIS			0x0008
-+#define USBA_EPT_CTL				0x000c
-+#define USBA_EPT_SET_STA			0x0014
-+#define USBA_EPT_CLR_STA			0x0018
-+#define USBA_EPT_STA				0x001c
-+
-+/* USB DMA register offsets */
-+#define USBA_DMA_NXT_DSC			0x0000
-+#define USBA_DMA_ADDRESS			0x0004
-+#define USBA_DMA_CONTROL			0x0008
-+#define USBA_DMA_STATUS				0x000c
-+
-+/* Bitfields in CTRL */
-+#define USBA_DEV_ADDR_OFFSET			0
-+#define USBA_DEV_ADDR_SIZE			7
-+#define USBA_FADDR_EN_OFFSET			7
-+#define USBA_FADDR_EN_SIZE			1
-+#define USBA_EN_USBA_OFFSET			8
-+#define USBA_EN_USBA_SIZE			1
-+#define USBA_DETACH_OFFSET			9
-+#define USBA_DETACH_SIZE			1
-+#define USBA_REMOTE_WAKE_UP_OFFSET		10
-+#define USBA_REMOTE_WAKE_UP_SIZE		1
-+
-+/* Bitfields in FNUM */
-+#define USBA_MICRO_FRAME_NUM_OFFSET		0
-+#define USBA_MICRO_FRAME_NUM_SIZE		3
-+#define USBA_FRAME_NUMBER_OFFSET		3
-+#define USBA_FRAME_NUMBER_SIZE			11
-+#define USBA_FRAME_NUM_ERROR_OFFSET		31
-+#define USBA_FRAME_NUM_ERROR_SIZE		1
-+
-+/* Bitfields in INT_ENB/INT_STA/INT_CLR */
-+#define USBA_HIGH_SPEED_OFFSET			0
-+#define USBA_HIGH_SPEED_SIZE			1
-+#define USBA_DET_SUSPEND_OFFSET			1
-+#define USBA_DET_SUSPEND_SIZE			1
-+#define USBA_MICRO_SOF_OFFSET			2
-+#define USBA_MICRO_SOF_SIZE			1
-+#define USBA_SOF_OFFSET				3
-+#define USBA_SOF_SIZE				1
-+#define USBA_END_OF_RESET_OFFSET		4
-+#define USBA_END_OF_RESET_SIZE			1
-+#define USBA_WAKE_UP_OFFSET			5
-+#define USBA_WAKE_UP_SIZE			1
-+#define USBA_END_OF_RESUME_OFFSET		6
-+#define USBA_END_OF_RESUME_SIZE			1
-+#define USBA_UPSTREAM_RESUME_OFFSET		7
-+#define USBA_UPSTREAM_RESUME_SIZE		1
-+#define USBA_EPT_INT_OFFSET			8
-+#define USBA_EPT_INT_SIZE			16
-+#define USBA_DMA_INT_OFFSET			24
-+#define USBA_DMA_INT_SIZE			8
-+
-+/* Bitfields in EPT_RST */
-+#define USBA_RST_OFFSET				0
-+#define USBA_RST_SIZE				16
-+
-+/* Bitfields in TST_SOF_CNT */
-+#define USBA_SOF_CNT_MAX_OFFSET			0
-+#define USBA_SOF_CNT_MAX_SIZE			7
-+#define USBA_SOF_CNT_LOAD_OFFSET		7
-+#define USBA_SOF_CNT_LOAD_SIZE			1
-+
-+/* Bitfields in TST_CNT_A */
-+#define USBA_CNT_A_MAX_OFFSET			0
-+#define USBA_CNT_A_MAX_SIZE			7
-+#define USBA_CNT_A_LOAD_OFFSET			7
-+#define USBA_CNT_A_LOAD_SIZE			1
-+
-+/* Bitfields in TST_CNT_B */
-+#define USBA_CNT_B_MAX_OFFSET			0
-+#define USBA_CNT_B_MAX_SIZE			7
-+#define USBA_CNT_B_LOAD_OFFSET			7
-+#define USBA_CNT_B_LOAD_SIZE			1
-+
-+/* Bitfields in TST_MODE_REG */
-+#define USBA_TST_MODE_OFFSET			0
-+#define USBA_TST_MODE_SIZE			6
-+
-+/* Bitfields in USBA_TST */
-+#define USBA_SPEED_CFG_OFFSET			0
-+#define USBA_SPEED_CFG_SIZE			2
-+#define USBA_TST_J_MODE_OFFSET			2
-+#define USBA_TST_J_MODE_SIZE			1
-+#define USBA_TST_K_MODE_OFFSET			3
-+#define USBA_TST_K_MODE_SIZE			1
-+#define USBA_TST_PKT_MODE_OFFSET		4
-+#define USBA_TST_PKT_MODE_SIZE			1
-+#define USBA_OPMODE2_OFFSET			5
-+#define USBA_OPMODE2_SIZE			1
-+
-+/* Bitfields in EPT_CFG */
-+#define USBA_EPT_SIZE_OFFSET			0
-+#define USBA_EPT_SIZE_SIZE			3
-+#define USBA_EPT_DIR_OFFSET			3
-+#define USBA_EPT_DIR_SIZE			1
-+#define USBA_EPT_TYPE_OFFSET			4
-+#define USBA_EPT_TYPE_SIZE			2
-+#define USBA_BK_NUMBER_OFFSET			6
-+#define USBA_BK_NUMBER_SIZE			2
-+#define USBA_NB_TRANS_OFFSET			8
-+#define USBA_NB_TRANS_SIZE			2
-+#define USBA_EPT_MAPPED_OFFSET			31
-+#define USBA_EPT_MAPPED_SIZE			1
-+
-+/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
-+#define USBA_EPT_ENABLE_OFFSET			0
-+#define USBA_EPT_ENABLE_SIZE			1
-+#define USBA_AUTO_VALID_OFFSET			1
-+#define USBA_AUTO_VALID_SIZE			1
-+#define USBA_INTDIS_DMA_OFFSET			3
-+#define USBA_INTDIS_DMA_SIZE			1
-+#define USBA_NYET_DIS_OFFSET			4
-+#define USBA_NYET_DIS_SIZE			1
-+#define USBA_DATAX_RX_OFFSET			6
-+#define USBA_DATAX_RX_SIZE			1
-+#define USBA_MDATA_RX_OFFSET			7
-+#define USBA_MDATA_RX_SIZE			1
-+/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
-+#define USBA_BUSY_BANK_IE_OFFSET		18
-+#define USBA_BUSY_BANK_IE_SIZE			1
-+
-+/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
-+#define USBA_FORCE_STALL_OFFSET			5
-+#define USBA_FORCE_STALL_SIZE			1
-+#define USBA_TOGGLE_SEQ_OFFSET			6
-+#define USBA_TOGGLE_SEQ_SIZE			2
-+#define USBA_ERR_OVFLW_OFFSET			8
-+#define USBA_ERR_OVFLW_SIZE			1
-+#define USBA_RX_BK_RDY_OFFSET			9
-+#define USBA_RX_BK_RDY_SIZE			1
-+#define USBA_KILL_BANK_OFFSET			9
-+#define USBA_KILL_BANK_SIZE			1
-+#define USBA_TX_COMPLETE_OFFSET			10
-+#define USBA_TX_COMPLETE_SIZE			1
-+#define USBA_TX_PK_RDY_OFFSET			11
-+#define USBA_TX_PK_RDY_SIZE			1
-+#define USBA_ISO_ERR_TRANS_OFFSET		11
-+#define USBA_ISO_ERR_TRANS_SIZE			1
-+#define USBA_RX_SETUP_OFFSET			12
-+#define USBA_RX_SETUP_SIZE			1
-+#define USBA_ISO_ERR_FLOW_OFFSET		12
-+#define USBA_ISO_ERR_FLOW_SIZE			1
-+#define USBA_STALL_SENT_OFFSET			13
-+#define USBA_STALL_SENT_SIZE			1
-+#define USBA_ISO_ERR_CRC_OFFSET			13
-+#define USBA_ISO_ERR_CRC_SIZE			1
-+#define USBA_ISO_ERR_NBTRANS_OFFSET		13
-+#define USBA_ISO_ERR_NBTRANS_SIZE		1
-+#define USBA_NAK_IN_OFFSET			14
-+#define USBA_NAK_IN_SIZE			1
-+#define USBA_ISO_ERR_FLUSH_OFFSET		14
-+#define USBA_ISO_ERR_FLUSH_SIZE			1
-+#define USBA_NAK_OUT_OFFSET			15
-+#define USBA_NAK_OUT_SIZE			1
-+#define USBA_CURRENT_BANK_OFFSET		16
-+#define USBA_CURRENT_BANK_SIZE			2
-+#define USBA_BUSY_BANKS_OFFSET			18
-+#define USBA_BUSY_BANKS_SIZE			2
-+#define USBA_BYTE_COUNT_OFFSET			20
-+#define USBA_BYTE_COUNT_SIZE			11
-+#define USBA_SHORT_PACKET_OFFSET		31
-+#define USBA_SHORT_PACKET_SIZE			1
-+
-+/* Bitfields in DMA_CONTROL */
-+#define USBA_DMA_CH_EN_OFFSET			0
-+#define USBA_DMA_CH_EN_SIZE			1
-+#define USBA_DMA_LINK_OFFSET			1
-+#define USBA_DMA_LINK_SIZE			1
-+#define USBA_DMA_END_TR_EN_OFFSET		2
-+#define USBA_DMA_END_TR_EN_SIZE			1
-+#define USBA_DMA_END_BUF_EN_OFFSET		3
-+#define USBA_DMA_END_BUF_EN_SIZE		1
-+#define USBA_DMA_END_TR_IE_OFFSET		4
-+#define USBA_DMA_END_TR_IE_SIZE			1
-+#define USBA_DMA_END_BUF_IE_OFFSET		5
-+#define USBA_DMA_END_BUF_IE_SIZE		1
-+#define USBA_DMA_DESC_LOAD_IE_OFFSET		6
-+#define USBA_DMA_DESC_LOAD_IE_SIZE		1
-+#define USBA_DMA_BURST_LOCK_OFFSET		7
-+#define USBA_DMA_BURST_LOCK_SIZE		1
-+#define USBA_DMA_BUF_LEN_OFFSET			16
-+#define USBA_DMA_BUF_LEN_SIZE			16
-+
-+/* Bitfields in DMA_STATUS */
-+#define USBA_DMA_CH_ACTIVE_OFFSET		1
-+#define USBA_DMA_CH_ACTIVE_SIZE			1
-+#define USBA_DMA_END_TR_ST_OFFSET		4
-+#define USBA_DMA_END_TR_ST_SIZE			1
-+#define USBA_DMA_END_BUF_ST_OFFSET		5
-+#define USBA_DMA_END_BUF_ST_SIZE		1
-+#define USBA_DMA_DESC_LOAD_ST_OFFSET		6
-+#define USBA_DMA_DESC_LOAD_ST_SIZE		1
-+
-+/* Constants for SPEED_CFG */
-+#define USBA_SPEED_CFG_NORMAL			0
-+#define USBA_SPEED_CFG_FORCE_HIGH		2
-+#define USBA_SPEED_CFG_FORCE_FULL		3
-+
-+/* Constants for EPT_SIZE */
-+#define USBA_EPT_SIZE_8				0
-+#define USBA_EPT_SIZE_16			1
-+#define USBA_EPT_SIZE_32			2
-+#define USBA_EPT_SIZE_64			3
-+#define USBA_EPT_SIZE_128			4
-+#define USBA_EPT_SIZE_256			5
-+#define USBA_EPT_SIZE_512			6
-+#define USBA_EPT_SIZE_1024			7
-+
-+/* Constants for EPT_TYPE */
-+#define USBA_EPT_TYPE_CONTROL			0
-+#define USBA_EPT_TYPE_ISO			1
-+#define USBA_EPT_TYPE_BULK			2
-+#define USBA_EPT_TYPE_INT			3
-+
-+/* Constants for BK_NUMBER */
-+#define USBA_BK_NUMBER_ZERO			0
-+#define USBA_BK_NUMBER_ONE			1
-+#define USBA_BK_NUMBER_DOUBLE			2
-+#define USBA_BK_NUMBER_TRIPLE			3
-+
-+/* Bit manipulation macros */
-+#define USBA_BIT(name)						\
-+	(1 << USBA_##name##_OFFSET)
-+#define USBA_BF(name, value)					\
-+	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
-+	 << USBA_##name##_OFFSET)
-+#define USBA_BFEXT(name, value)					\
-+	(((value) >> USBA_##name##_OFFSET)			\
-+	 & ((1 << USBA_##name##_SIZE) - 1))
-+#define USBA_BFINS(name, value, old)				\
-+	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
-+		    << USBA_##name##_OFFSET))			\
-+	 | USBA_BF(name, value))
-+
-+/* Register access macros */
-+#define usba_readl(udc, reg)					\
-+	__raw_readl((udc)->regs + USBA_##reg)
-+#define usba_writel(udc, reg, value)				\
-+	__raw_writel((value), (udc)->regs + USBA_##reg)
-+#define usba_ep_readl(ep, reg)					\
-+	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
-+#define usba_ep_writel(ep, reg, value)				\
-+	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
-+#define usba_dma_readl(ep, reg)					\
-+	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
-+#define usba_dma_writel(ep, reg, value)				\
-+	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
-+
-+/* Calculate base address for a given endpoint or DMA controller */
-+#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
-+#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
-+#define USBA_FIFO_BASE(x)	((x) << 16)
-+
-+/* Synth parameters */
-+#define USBA_NR_ENDPOINTS	7
-+
-+#define EP0_FIFO_SIZE		64
-+#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
-+#define EP0_NR_BANKS		1
-+#define BULK_FIFO_SIZE		512
-+#define BULK_EPT_SIZE		USBA_EPT_SIZE_512
-+#define BULK_NR_BANKS		2
-+#define ISO_FIFO_SIZE		1024
-+#define ISO_EPT_SIZE		USBA_EPT_SIZE_1024
-+#define ISO_NR_BANKS		3
-+#define INT_FIFO_SIZE		64
-+#define INT_EPT_SIZE		USBA_EPT_SIZE_64
-+#define INT_NR_BANKS		3
-+
-+enum usba_ctrl_state {
-+	WAIT_FOR_SETUP,
-+	DATA_STAGE_IN,
-+	DATA_STAGE_OUT,
-+	STATUS_STAGE_IN,
-+	STATUS_STAGE_OUT,
-+	STATUS_STAGE_ADDR,
-+	STATUS_STAGE_TEST,
-+};
-+/*
-+  EP_STATE_IDLE,
-+  EP_STATE_SETUP,
-+  EP_STATE_IN_DATA,
-+  EP_STATE_OUT_DATA,
-+  EP_STATE_SET_ADDR_STATUS,
-+  EP_STATE_RX_STATUS,
-+  EP_STATE_TX_STATUS,
-+  EP_STATE_HALT,
-+*/
-+
-+struct usba_dma_desc {
-+	dma_addr_t next;
-+	dma_addr_t addr;
-+	u32 ctrl;
-+};
-+
-+struct usba_ep {
-+	int					state;
-+	void __iomem				*ep_regs;
-+	void __iomem				*dma_regs;
-+	void __iomem				*fifo;
-+	struct usb_ep				ep;
-+	struct usba_udc				*udc;
-+
-+	struct list_head			queue;
-+	const struct usb_endpoint_descriptor	*desc;
-+
-+	u16					fifo_size;
-+	u8					nr_banks;
-+	u8					index;
-+	unsigned int				can_dma:1;
-+	unsigned int				can_isoc:1;
-+	unsigned int				is_isoc:1;
-+	unsigned int				is_in:1;
-+
-+#ifdef CONFIG_DEBUG_FS
-+	u32					last_dma_status;
-+	struct dentry				*debugfs_dir;
-+	struct dentry				*debugfs_queue;
-+	struct dentry				*debugfs_dma_status;
-+	struct dentry				*debugfs_state;
-+#endif
-+};
-+
-+struct usba_request {
-+	struct usb_request			req;
-+	struct list_head			queue;
-+
-+	u32					ctrl;
-+
-+	unsigned int				submitted:1;
-+	unsigned int				last_transaction:1;
-+	unsigned int				using_dma:1;
-+	unsigned int				mapped:1;
-+};
-+
-+struct usba_udc {
-+	/* Protect hw registers from concurrent modifications */
-+	spinlock_t lock;
-+
-+	void __iomem *regs;
-+	void __iomem *fifo;
-+
-+	struct usb_gadget gadget;
-+	struct usb_gadget_driver *driver;
-+	struct platform_device *pdev;
-+	int irq;
-+	int vbus_pin;
-+	struct clk *pclk;
-+	struct clk *hclk;
-+
-+	int test_mode;
-+	int vbus_prev;
-+
-+#ifdef CONFIG_DEBUG_FS
-+	struct dentry *debugfs_root;
-+	struct dentry *debugfs_regs;
-+#endif
-+};
-+
-+#define to_usba_ep(x) container_of((x), struct usba_ep, ep)
-+#define to_usba_req(x) container_of((x), struct usba_request, req)
-+#define to_usba_udc(x) container_of((x), struct usba_udc, gadget)
-+
-+#define ep_index(ep)		((ep)->index)
-+#define ep_can_dma(ep)		((ep)->can_dma)
-+#define ep_is_in(ep)		((ep)->is_in)
-+#define ep_is_isochronous(ep)	((ep)->is_isoc)
-+#define ep_is_control(ep)	(ep_index(ep) == 0)
-+#define ep_name(ep)		((ep)->ep.name)
-+#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
-+
-+#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
-Index: linux-2.6.22.1/drivers/usb/gadget/gadget_chips.h
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/gadget_chips.h	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/gadget/gadget_chips.h	(arbetskopia)
-@@ -75,10 +75,10 @@
- #define	gadget_is_pxa27x(g)	0
- #endif
- 
--#ifdef CONFIG_USB_GADGET_HUSB2DEV
--#define gadget_is_husb2dev(g)	!strcmp("husb2_udc", (g)->name)
-+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
-+#define gadget_is_atmel_usba(g)	!strcmp("atmel_usba_udc", (g)->name)
- #else
--#define gadget_is_husb2dev(g)	0
-+#define gadget_is_atmel_usba(g)	0
- #endif
- 
- #ifdef CONFIG_USB_GADGET_S3C2410
-@@ -181,7 +181,7 @@
- 		return 0x16;
- 	else if (gadget_is_mpc8272(gadget))
- 		return 0x17;
--	else if (gadget_is_husb2dev(gadget))
-+	else if (gadget_is_atmel_usba(gadget))
- 		return 0x18;
- 	else if (gadget_is_fsl_usb2(gadget))
- 		return 0x19;
-Index: linux-2.6.22.1/drivers/usb/gadget/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/gadget/Makefile	(arbetskopia)
-@@ -8,6 +8,7 @@
- obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
- obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
- obj-$(CONFIG_USB_AT91)		+= at91_udc.o
-+obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
- obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
- 
- #
-Index: linux-2.6.22.1/drivers/usb/gadget/inode.c
-===================================================================
---- linux-2.6.22.1/drivers/usb/gadget/inode.c	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/gadget/inode.c	(arbetskopia)
-@@ -37,7 +37,7 @@
- #include <linux/device.h>
- #include <linux/moduleparam.h>
- 
--#include <linux/usb_gadgetfs.h>
-+#include <linux/usb/gadgetfs.h>
- #include <linux/usb_gadget.h>
- 
- 
-Index: linux-2.6.22.1/drivers/usb/host/ohci-at91.c
-===================================================================
---- linux-2.6.22.1/drivers/usb/host/ohci-at91.c	(revision 1)
-+++ linux-2.6.22.1/drivers/usb/host/ohci-at91.c	(arbetskopia)
-@@ -299,7 +299,7 @@
- 	 *
- 	 * REVISIT: some boards will be able to turn VBUS off...
- 	 */
--	if (at91_suspend_entering_slow_clock()) {
-+	if (clk_must_disable(fclk)) {
- 		ohci_usb_reset (ohci);
- 		at91_stop_clock();
- 	}
-Index: linux-2.6.22.1/drivers/i2c/busses/Kconfig
-===================================================================
---- linux-2.6.22.1/drivers/i2c/busses/Kconfig	(revision 1)
-+++ linux-2.6.22.1/drivers/i2c/busses/Kconfig	(arbetskopia)
-@@ -4,6 +4,26 @@
- 
- menu "I2C Hardware Bus support"
- 
-+config I2C_ATMELTWI
-+	tristate "Atmel TWI/I2C"
-+	depends on I2C
-+	help
-+	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
-+	  AT91-based device and want to use its built-in TWI
-+	  functionality. Atmel's TWI is compatible with Philips' I2C
-+	  protocol. If in doubt, say NO
-+
-+config I2C_ATMELTWI_BAUDRATE
-+	prompt "Atmel TWI baudrate"
-+	depends on I2C_ATMELTWI
-+	int
-+	default 100000
-+	help
-+	  Set the TWI/I2C baudrate. This will alter the default value. A
-+	  different baudrate can be set by using a module parameter as well. If
-+	  no parameter is provided when loading, this is the value that will be
-+	  used.
-+
- config I2C_ALI1535
- 	tristate "ALI 1535"
- 	depends on PCI
-@@ -80,6 +100,14 @@
- 	  This supports the use of the I2C interface on Atmel AT91
- 	  processors.
- 
-+config I2C_AT91_CLOCKRATE
-+	prompt "Atmel AT91 I2C/TWI clock-rate"
-+	depends on I2C_AT91
-+	int
-+	default 100000
-+	help
-+	  Set the AT91 I2C/TWI clock-rate.
-+
- config I2C_AU1550
- 	tristate "Au1550/Au1200 SMBus interface"
- 	depends on SOC_AU1550 || SOC_AU1200
-@@ -598,6 +626,14 @@
- 	  This driver can also be built as a module.  If so, the module
- 	  will be called i2c-voodoo3.
- 
-+config I2C_PCA
-+	tristate "PCA9564"
-+	depends on I2C
-+	select I2C_ALGOPCA
-+	help
-+	  This driver support the Philips PCA 9564 Parallel bus to I2C
-+	  bus controller.
-+
- config I2C_PCA_ISA
- 	tristate "PCA9564 on an ISA bus"
- 	depends on ISA
-Index: linux-2.6.22.1/drivers/i2c/busses/i2c-atmeltwi.c
-===================================================================
---- linux-2.6.22.1/drivers/i2c/busses/i2c-atmeltwi.c	(revision 0)
-+++ linux-2.6.22.1/drivers/i2c/busses/i2c-atmeltwi.c	(revision 0)
-@@ -0,0 +1,383 @@
-+/*
-+ * i2c Support for Atmel's Two-Wire Interface (TWI)
-+ *
-+ * Based on the work of Copyright (C) 2004 Rick Bronson
-+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
-+ * Ported to AVR32 and heavily modified by Espen Krangnes
-+ * <ekrangnes at atmel.com>
-+ *
-+ * Copyright (C) 2006 Atmel Corporation
-+ *
-+ * Borrowed heavily from the original work by:
-+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
-+ *
-+ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
-+ * bugs removed, interrupt routine markedly rewritten
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+
-+#include <linux/err.h>
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/i2c.h>
-+#include <linux/init.h>
-+#include <linux/clk.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
-+#include <linux/platform_device.h>
-+#include <linux/completion.h>
-+#include <asm/io.h>
-+#include <linux/time.h>
-+#include "atmeltwi.h"
-+
-+static unsigned int baudrate = CONFIG_I2C_ATMELTWI_BAUDRATE;
-+module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
-+MODULE_PARM_DESC(baudrate, "The TWI baudrate");
-+
-+
-+struct atmel_twi {
-+	void __iomem *regs;
-+	struct i2c_adapter adapter;
-+	struct clk *pclk;
-+	spinlock_t lock;
-+	struct completion comp;
-+	u32 intmask;
-+	u8 *buf;
-+	u8 len;
-+	u8 acks_left;
-+	u8 nack;
-+	unsigned int irq;
-+
-+};
-+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
-+
-+/*
-+ * Initialize the TWI hardware registers.
-+ */
-+static int __devinit twi_hwinit(struct atmel_twi *twi)
-+{
-+	unsigned long cdiv, ckdiv=0;
-+
-+	twi_writel(twi, IDR, ~0UL);
-+	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
-+	twi_readl(twi, SR);
-+
-+	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
-+
-+	while (cdiv > 255) {
-+		ckdiv++;
-+		cdiv = cdiv >> 1;
-+	}
-+
-+	if (ckdiv > 7)
-+		return -EINVAL;
-+	else
-+		twi_writel(twi, CWGR, (TWI_BF(CKDIV, ckdiv)
-+			       | TWI_BF(CHDIV, cdiv)
-+			       | TWI_BF(CLDIV, cdiv)));
-+	return 0;
-+}
-+
-+/*
-+ * Waits for the i2c status register to set the specified bitmask
-+ * Returns 0 if timed out (~100ms).
-+ */
-+static short twi_complete(struct atmel_twi *twi, u32 mask)
-+{
-+	int timeout = msecs_to_jiffies(100);
-+
-+	twi->intmask = mask;
-+	init_completion(&twi->comp);
-+
-+	twi_writel(twi, IER, mask);
-+
-+	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
-+		/* RESET TWI interface */
-+		twi_writel(twi, CR, TWI_BIT(SWRST));
-+
-+		/* Reinitialize TWI */
-+		twi_hwinit(twi);
-+
-+		return -ETIMEDOUT;
-+	}
-+	return 0;
-+}
-+
-+/*
-+ * Generic i2c master transfer entrypoint.
-+ */
-+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
-+{
-+	struct atmel_twi *twi = to_atmel_twi(adap);
-+	struct i2c_msg *pmsg;
-+	int i;
-+
-+	/* get first message */
-+	pmsg = msgs;
-+
-+	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
-+
-+	twi->nack = 0;
-+	for (i = 0; i < num; i++, pmsg++) {
-+		twi->len = pmsg->len;
-+		twi->buf = pmsg->buf;
-+		twi->acks_left = pmsg->len;
-+		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
-+			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
-+		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
-+
-+		dev_dbg(&adap->dev,"#%d: internal addr %d %s byte%s %s 0x%02x\n",
-+			i,pmsg->len, pmsg->flags & I2C_M_RD ? "reading" : "writing",
-+			pmsg->len > 1 ? "s" : "",
-+			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
-+
-+		/* enable */
-+		twi_writel(twi, CR, TWI_BIT(MSEN));
-+
-+		if (pmsg->flags & I2C_M_RD) {
-+			if (twi->len == 1)
-+				twi_writel(twi, CR,
-+					TWI_BIT(START) | TWI_BIT(STOP));
-+			else
-+				twi_writel(twi, CR, TWI_BIT(START));
-+
-+			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
-+				dev_dbg(&adap->dev, "RXRDY timeout. Stopped with %d bytes left\n",
-+					twi->acks_left);
-+				return -ETIMEDOUT;
-+			}
-+		} else {
-+			twi_writel(twi, THR, twi->buf[0]);
-+			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
-+				dev_dbg(&adap->dev, "TXRDY timeout. Stopped with %d bytes left\n",
-+				twi->acks_left);
-+				return -ETIMEDOUT;
-+			}
-+
-+			if (twi->nack)
-+			    return -ENODEV;
-+		}
-+
-+		/* Disable TWI interface */
-+		twi_writel(twi, CR, TWI_BIT(MSDIS));
-+
-+	} /* end cur msg */
-+
-+	return i;
-+}
-+
-+
-+static irqreturn_t twi_interrupt(int irq, void *dev_id)
-+{
-+	struct atmel_twi *twi = dev_id;
-+	int status = twi_readl(twi, SR);
-+
-+	/* Save state for later debug prints */
-+	int old_mask = twi->intmask;
-+	int old_status = status;
-+
-+	if (twi->intmask & status) {
-+		if (status & TWI_BIT(NACK))
-+			goto nack;
-+
-+		status &= twi->intmask;
-+
-+		if (status & TWI_BIT(TXCOMP))
-+		    goto complete;
-+
-+		else if (status & TWI_BIT(RXRDY)) {
-+			if ( twi->acks_left > 0 ) {
-+			    twi->buf[twi->len - twi->acks_left] =
-+				twi_readl(twi, RHR);
-+			    twi->acks_left--;
-+			}
-+			if ( twi->acks_left == 1 )
-+				twi_writel(twi, CR, TWI_BIT(STOP));
-+
-+			if (twi->acks_left == 0 ) {
-+				twi->intmask = TWI_BIT(TXCOMP);
-+				twi_writel(twi, IER, TWI_BIT(TXCOMP));
-+			}
-+		} else if (status & TWI_BIT(TXRDY)) {
-+			twi->acks_left--;
-+			if ( twi->acks_left == 0 ) {
-+				twi->intmask = TWI_BIT(TXCOMP);
-+				twi_writel(twi, IER, TWI_BIT(TXCOMP));
-+			} else if (twi->acks_left > 0)
-+				twi_writel(twi, THR, twi->buf[twi->len - twi->acks_left]);
-+		}
-+	}
-+
-+	dev_dbg(&twi->adapter.dev,
-+		"TWI ISR, SR 0x%08X, intmask 0x%08X, acks_left %i.\n",
-+		old_status, old_mask, twi->acks_left);
-+
-+	return IRQ_HANDLED;
-+
-+nack:
-+	dev_dbg(&twi->adapter.dev, "NACK received!\n");
-+	twi->nack = 1;
-+
-+complete:
-+	twi_writel(twi, IDR, ~0UL);
-+	complete(&twi->comp);
-+
-+	dev_dbg(&twi->adapter.dev,
-+		"TWI ISR, SR 0x%08X, intmask 0x%08X, \
-+		acks_left %i - completed.\n",
-+		old_status, old_mask, twi->acks_left);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+
-+/*
-+ * Return list of supported functionality.
-+ */
-+static u32 twi_func(struct i2c_adapter *adapter)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
-+}
-+
-+/* For now, we only handle combined mode (smbus) */
-+static struct i2c_algorithm twi_algorithm = {
-+	.master_xfer	= twi_xfer,
-+	.functionality	= twi_func,
-+};
-+
-+/*
-+ * Main initialization routine.
-+ */
-+static int __devinit twi_probe(struct platform_device *pdev)
-+{
-+	struct atmel_twi *twi;
-+	struct resource *regs;
-+	struct clk *pclk;
-+	struct i2c_adapter *adapter;
-+	int rc, irq;
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs)
-+		return -ENXIO;
-+
-+	pclk = clk_get(&pdev->dev, "pclk");
-+	if (IS_ERR(pclk))
-+		return PTR_ERR(pclk);
-+	clk_enable(pclk);
-+
-+	rc = -ENOMEM;
-+	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
-+	if (!twi) {
-+		dev_err(&pdev->dev, "can't allocate interface!\n");
-+		goto err_alloc_twi;
-+	}
-+
-+	twi->pclk = pclk;
-+	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!twi->regs)
-+		goto err_ioremap;
-+
-+	irq = platform_get_irq(pdev,0);
-+	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
-+	if (rc) {
-+		dev_err(&pdev->dev, "can't bind irq!\n");
-+		goto err_irq;
-+	}
-+	twi->irq = irq;
-+
-+	rc = twi_hwinit(twi);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Unable to set baudrate\n");
-+		goto err_hw_init;
-+	}
-+
-+	adapter = &twi->adapter;
-+	sprintf(adapter->name, "TWI");
-+	adapter->algo = &twi_algorithm;
-+	adapter->class = I2C_CLASS_HWMON;
-+	adapter->dev.parent = &pdev->dev;
-+
-+	platform_set_drvdata(pdev, twi);
-+
-+	rc = i2c_add_adapter(adapter);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Adapter %s registration failed\n",
-+			adapter->name);
-+		goto err_register;
-+	}
-+
-+	dev_info(&pdev->dev, "Atmel TWI i2c bus device (baudrate %dk) at 0x%08lx.\n",
-+		 baudrate/1000, (unsigned long)regs->start);
-+
-+	return 0;
-+
-+
-+err_register:
-+	platform_set_drvdata(pdev, NULL);
-+
-+err_hw_init:
-+	free_irq(irq, twi);
-+
-+err_irq:
-+	iounmap(twi->regs);
-+
-+err_ioremap:
-+	kfree(twi);
-+
-+err_alloc_twi:
-+	clk_disable(pclk);
-+	clk_put(pclk);
-+
-+	return rc;
-+}
-+
-+static int __devexit twi_remove(struct platform_device *pdev)
-+{
-+	struct atmel_twi *twi = platform_get_drvdata(pdev);
-+	int res;
-+
-+	platform_set_drvdata(pdev, NULL);
-+	res = i2c_del_adapter(&twi->adapter);
-+	twi_writel(twi, CR, TWI_BIT(MSDIS));
-+	iounmap(twi->regs);
-+	clk_disable(twi->pclk);
-+	clk_put(twi->pclk);
-+	free_irq(twi->irq, twi);
-+	kfree(twi);
-+
-+	return res;
-+}
-+
-+static struct platform_driver twi_driver = {
-+	.probe		= twi_probe,
-+	.remove		= __devexit_p(twi_remove),
-+	.driver		= {
-+		.name	= "atmel_twi",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init atmel_twi_init(void)
-+{
-+	return platform_driver_register(&twi_driver);
-+}
-+
-+static void __exit atmel_twi_exit(void)
-+{
-+	platform_driver_unregister(&twi_driver);
-+}
-+
-+module_init(atmel_twi_init);
-+module_exit(atmel_twi_exit);
-+
-+MODULE_AUTHOR("Espen Krangnes");
-+MODULE_DESCRIPTION("I2C driver for Atmel TWI");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/i2c/busses/atmeltwi.h
-===================================================================
---- linux-2.6.22.1/drivers/i2c/busses/atmeltwi.h	(revision 0)
-+++ linux-2.6.22.1/drivers/i2c/busses/atmeltwi.h	(revision 0)
-@@ -0,0 +1,117 @@
-+/*
-+ * Register definitions for the Atmel Two-Wire Interface
-+ */
-+
-+#ifndef __ASM_AVR32_TWI_H__
-+#define __ASM_AVR32_TWI_H__
-+
-+/* TWI register offsets */
-+#define TWI_CR					0x0000
-+#define TWI_MMR					0x0004
-+#define TWI_SMR					0x0008
-+#define TWI_IADR				0x000c
-+#define TWI_CWGR				0x0010
-+#define TWI_SR					0x0020
-+#define TWI_IER					0x0024
-+#define TWI_IDR					0x0028
-+#define TWI_IMR					0x002c
-+#define TWI_RHR					0x0030
-+#define TWI_THR					0x0034
-+
-+/* Bitfields in CR */
-+#define TWI_START_OFFSET			0
-+#define TWI_START_SIZE				1
-+#define TWI_STOP_OFFSET				1
-+#define TWI_STOP_SIZE				1
-+#define TWI_MSEN_OFFSET				2
-+#define TWI_MSEN_SIZE				1
-+#define TWI_MSDIS_OFFSET			3
-+#define TWI_MSDIS_SIZE				1
-+#define TWI_SVEN_OFFSET				4
-+#define TWI_SVEN_SIZE				1
-+#define TWI_SVDIS_OFFSET			5
-+#define TWI_SVDIS_SIZE				1
-+#define TWI_SWRST_OFFSET			7
-+#define TWI_SWRST_SIZE				1
-+
-+/* Bitfields in MMR */
-+#define TWI_IADRSZ_OFFSET			8
-+#define TWI_IADRSZ_SIZE				2
-+#define TWI_MREAD_OFFSET			12
-+#define TWI_MREAD_SIZE				1
-+#define TWI_DADR_OFFSET				16
-+#define TWI_DADR_SIZE				7
-+
-+/* Bitfields in SMR */
-+#define TWI_SADR_OFFSET				16
-+#define TWI_SADR_SIZE				7
-+
-+/* Bitfields in IADR */
-+#define TWI_IADR_OFFSET				0
-+#define TWI_IADR_SIZE				24
-+
-+/* Bitfields in CWGR */
-+#define TWI_CLDIV_OFFSET			0
-+#define TWI_CLDIV_SIZE				8
-+#define TWI_CHDIV_OFFSET			8
-+#define TWI_CHDIV_SIZE				8
-+#define TWI_CKDIV_OFFSET			16
-+#define TWI_CKDIV_SIZE				3
-+
-+/* Bitfields in SR */
-+#define TWI_TXCOMP_OFFSET			0
-+#define TWI_TXCOMP_SIZE				1
-+#define TWI_RXRDY_OFFSET			1
-+#define TWI_RXRDY_SIZE				1
-+#define TWI_TXRDY_OFFSET			2
-+#define TWI_TXRDY_SIZE				1
-+#define TWI_SVDIR_OFFSET			3
-+#define TWI_SVDIR_SIZE				1
-+#define TWI_SVACC_OFFSET			4
-+#define TWI_SVACC_SIZE				1
-+#define TWI_GCACC_OFFSET			5
-+#define TWI_GCACC_SIZE				1
-+#define TWI_OVRE_OFFSET				6
-+#define TWI_OVRE_SIZE				1
-+#define TWI_UNRE_OFFSET				7
-+#define TWI_UNRE_SIZE				1
-+#define TWI_NACK_OFFSET				8
-+#define TWI_NACK_SIZE				1
-+#define TWI_ARBLST_OFFSET			9
-+#define TWI_ARBLST_SIZE				1
-+
-+/* Bitfields in RHR */
-+#define TWI_RXDATA_OFFSET			0
-+#define TWI_RXDATA_SIZE				8
-+
-+/* Bitfields in THR */
-+#define TWI_TXDATA_OFFSET			0
-+#define TWI_TXDATA_SIZE				8
-+
-+/* Constants for IADRSZ */
-+#define TWI_IADRSZ_NO_ADDR			0
-+#define TWI_IADRSZ_ONE_BYTE			1
-+#define TWI_IADRSZ_TWO_BYTES			2
-+#define TWI_IADRSZ_THREE_BYTES			3
-+
-+/* Bit manipulation macros */
-+#define TWI_BIT(name)					\
-+	(1 << TWI_##name##_OFFSET)
-+#define TWI_BF(name,value)				\
-+	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
-+	 << TWI_##name##_OFFSET)
-+#define TWI_BFEXT(name,value)				\
-+	(((value) >> TWI_##name##_OFFSET)		\
-+	 & ((1 << TWI_##name##_SIZE) - 1))
-+#define TWI_BFINS(name,value,old)			\
-+	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
-+		    << TWI_##name##_OFFSET))		\
-+	 | TWI_BF(name,value))
-+
-+/* Register access macros */
-+#define twi_readl(port,reg)				\
-+	__raw_readl((port)->regs + TWI_##reg)
-+#define twi_writel(port,reg,value)			\
-+	__raw_writel((value), (port)->regs + TWI_##reg)
-+
-+#endif /* __ASM_AVR32_TWI_H__ */
-Index: linux-2.6.22.1/drivers/i2c/busses/Makefile
-===================================================================
---- linux-2.6.22.1/drivers/i2c/busses/Makefile	(revision 1)
-+++ linux-2.6.22.1/drivers/i2c/busses/Makefile	(arbetskopia)
-@@ -30,6 +30,7 @@
- obj-$(CONFIG_I2C_PARPORT)	+= i2c-parport.o
- obj-$(CONFIG_I2C_PARPORT_LIGHT)	+= i2c-parport-light.o
- obj-$(CONFIG_I2C_PASEMI)	+= i2c-pasemi.o
-+obj-$(CONFIG_I2C_PCA)		+= i2c-pca.o
- obj-$(CONFIG_I2C_PCA_ISA)	+= i2c-pca-isa.o
- obj-$(CONFIG_I2C_PIIX4)		+= i2c-piix4.o
- obj-$(CONFIG_I2C_PNX)		+= i2c-pnx.o
-@@ -52,6 +53,7 @@
- obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
- obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
- obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
-+obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
- 
- ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
- EXTRA_CFLAGS += -DDEBUG
-Index: linux-2.6.22.1/drivers/i2c/busses/i2c-pca.c
-===================================================================
---- linux-2.6.22.1/drivers/i2c/busses/i2c-pca.c	(revision 0)
-+++ linux-2.6.22.1/drivers/i2c/busses/i2c-pca.c	(revision 0)
-@@ -0,0 +1,213 @@
-+/*
-+ *  Platform driver for PCA9564 I2C bus controller.
-+ *
-+ *  (C) 2006 Andrew Victor
-+ *
-+ *  Based on i2c-pca-isa.c driver for PCA9564 on ISA boards
-+ *    Copyright (C) 2004 Arcom Control Systems
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License as published by
-+ *  the Free Software Foundation; either version 2 of the License, or
-+ *  (at your option) any later version.
-+ *
-+ *  This program is distributed in the hope that it will be useful,
-+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *  GNU General Public License for more details.
-+ *
-+ *  You should have received a copy of the GNU General Public License
-+ *  along with this program; if not, write to the Free Software
-+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/wait.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/i2c.h>
-+#include <linux/i2c-algo-pca.h>
-+
-+#include <asm/io.h>
-+
-+#include "../algos/i2c-algo-pca.h"
-+
-+#define PCA_OWN_ADDRESS		0x55	/* our address for slave mode */
-+#define PCA_CLOCK		I2C_PCA_CON_59kHz
-+
-+//#define REG_SHIFT		2
-+#define REG_SHIFT		0
-+
-+//#define DEBUG_IO
-+
-+#define PCA_IO_SIZE 4
-+
-+static void __iomem *base_addr;
-+static int irq;
-+static wait_queue_head_t pca_wait;
-+
-+static int pca_getown(struct i2c_algo_pca_data *adap)
-+{
-+	return PCA_OWN_ADDRESS;
-+}
-+
-+static int pca_getclock(struct i2c_algo_pca_data *adap)
-+{
-+	return PCA_CLOCK;
-+}
-+
-+static void pca_writebyte(struct i2c_algo_pca_data *adap, int reg, int val)
-+{
-+#ifdef DEBUG_IO
-+	static char *names[] = { "T/O", "DAT", "ADR", "CON" };
-+	printk("*** write %s at %#lx <= %#04x\n", names[reg], (unsigned long) base_addr+reg, val);
-+#endif
-+	udelay(1);
-+	outb(val, base_addr + (reg << REG_SHIFT));
-+}
-+
-+static int pca_readbyte(struct i2c_algo_pca_data *adap, int reg)
-+{
-+	int res;
-+
-+	udelay(1);
-+	res = inb(base_addr + (reg << REG_SHIFT));
-+#ifdef DEBUG_IO
-+	{
-+		static char *names[] = { "STA", "DAT", "ADR", "CON" };
-+		printk("*** read  %s => %#04x\n", names[reg], res);
-+	}
-+#endif
-+	return res;
-+}
-+
-+static int pca_waitforinterrupt(struct i2c_algo_pca_data *adap)
-+{
-+	int ret = 0;
-+
-+	if (irq > -1) {
-+		ret = wait_event_interruptible(pca_wait,
-+				pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI);
-+	} else {
-+		while ((pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
-+			udelay(100);
-+	}
-+	return ret;
-+}
-+
-+static irqreturn_t pca_handler(int this_irq, void *dev_id)
-+{
-+	wake_up_interruptible(&pca_wait);
-+	return IRQ_HANDLED;
-+}
-+
-+static struct i2c_algo_pca_data pca_i2c_data = {
-+	.get_own		= pca_getown,
-+	.get_clock		= pca_getclock,
-+	.write_byte		= pca_writebyte,
-+	.read_byte		= pca_readbyte,
-+	.wait_for_interrupt	= pca_waitforinterrupt,
-+};
-+
-+static struct i2c_adapter pca_i2c_ops = {
-+	.owner          = THIS_MODULE,
-+	.id		= I2C_HW_A_PLAT,
-+	.algo_data	= &pca_i2c_data,
-+	.name		= "PCA9564",
-+	.class		= I2C_CLASS_HWMON,
-+};
-+
-+static int __devinit pca_i2c_probe(struct platform_device *pdev)
-+{
-+	struct resource *res;
-+
-+	init_waitqueue_head(&pca_wait);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!res)
-+		return -ENODEV;
-+
-+	if (!request_mem_region(res->start, PCA_IO_SIZE, "PCA9564"))
-+		return -ENXIO;
-+
-+	base_addr = ioremap(res->start, PCA_IO_SIZE);
-+	if (base_addr == NULL)
-+		goto out_region;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq > -1) {
-+		if (request_irq(irq, pca_handler, 0, "pca9564", NULL) < 0) {
-+			printk(KERN_ERR "i2c-pca: Request irq%d failed\n", irq);
-+			goto out_remap;
-+		}
-+	}
-+
-+	/* set up the driverfs linkage to our parent device */
-+	pca_i2c_ops.dev.parent = &pdev->dev;
-+
-+	if (i2c_pca_add_bus(&pca_i2c_ops) < 0) {
-+		printk(KERN_ERR "i2c-pca: Failed to add i2c bus\n");
-+		goto out_irq;
-+	}
-+
-+	return 0;
-+
-+ out_irq:
-+	if (irq > -1)
-+		free_irq(irq, &pca_i2c_ops);
-+
-+ out_remap:
-+	iounmap(base_addr);
-+
-+ out_region:
-+	release_mem_region(res->start, PCA_IO_SIZE);
-+	return -ENODEV;
-+}
-+
-+static int __devexit pca_i2c_remove(struct platform_device *pdev)
-+{
-+	struct resource *res;
-+
-+	i2c_del_adapter(&pca_i2c_ops);
-+
-+	if (irq > 0)
-+		free_irq(irq, NULL);
-+
-+	iounmap(base_addr);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	release_mem_region(res->start, PCA_IO_SIZE);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver pca_i2c_driver = {
-+	.probe		= pca_i2c_probe,
-+	.remove		= __devexit_p(pca_i2c_remove),
-+	.driver		= {
-+		.name	= "pca9564",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init pca_i2c_init(void)
-+{
-+	return platform_driver_register(&pca_i2c_driver);
-+}
-+
-+static void __exit pca_i2c_exit(void)
-+{
-+	platform_driver_unregister(&pca_i2c_driver);
-+}
-+
-+module_init(pca_i2c_init);
-+module_exit(pca_i2c_exit);
-+
-+MODULE_AUTHOR("Andrew Victor");
-+MODULE_DESCRIPTION("PCA9564 platform driver");
-+MODULE_LICENSE("GPL");
-Index: linux-2.6.22.1/drivers/i2c/busses/i2c-at91.c
-===================================================================
---- linux-2.6.22.1/drivers/i2c/busses/i2c-at91.c	(revision 1)
-+++ linux-2.6.22.1/drivers/i2c/busses/i2c-at91.c	(arbetskopia)
-@@ -31,8 +31,11 @@
- #include <asm/arch/board.h>
- #include <asm/arch/cpu.h>
- 
--#define TWI_CLOCK		100000		/* Hz. max 400 Kbits/sec */
- 
-+/* Clockrate is configurable - max 400 Kbits/sec */
-+static unsigned int clockrate = CONFIG_I2C_AT91_CLOCKRATE;
-+module_param(clockrate, uint, 0);
-+MODULE_PARM_DESC(clockrate, "The TWI clockrate");
- 
- static struct clk *twi_clk;
- static void __iomem *twi_base;
-@@ -53,7 +56,7 @@
- 	at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);	/* Set Master mode */
- 
- 	/* Calcuate clock dividers */
--	cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
-+	cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3;
- 	cdiv = cdiv + 1;	/* round up */
- 	ckdiv = 0;
- 	while (cdiv > 255) {
-@@ -61,11 +64,12 @@
- 		cdiv = cdiv >> 1;
- 	}
- 
--	if (cpu_is_at91rm9200()) {			/* AT91RM9200 Errata #22 */
--		if (ckdiv > 5) {
--			printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
--			ckdiv = 5;
--		}
-+	if (cpu_is_at91rm9200() && (ckdiv > 5)) {	/* AT91RM9200 Errata #22 */
-+		printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
-+		ckdiv = 5;
-+	} else if (ckdiv > 7) {
-+		printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
-+		ckdiv = 7;
- 	}
- 
- 	at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
diff --git a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-005-atags-support.patch b/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-005-atags-support.patch
deleted file mode 100644
index 0068ef17c..000000000
--- a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-005-atags-support.patch
+++ /dev/null
@@ -1,122 +0,0 @@
---- linux-2.6.22/arch/arm/kernel/head-common.S	2007-05-16 10:13:04.000000000 -0500
-+++ linux-2.6.22-bgat/arch/arm/kernel/head-common.S	2007-05-30 21:54:45.000000000 -0500
-@@ -20,7 +20,8 @@
- 	.long	_end				@ r7
- 	.long	processor_id			@ r4
- 	.long	__machine_arch_type		@ r5
--	.long	cr_alignment			@ r6
-+	.long	__atags_pointer			@ r6
-+	.long	cr_alignment			@ r7
- 	.long	init_thread_union + THREAD_START_SP @ sp
- 
- /*
-@@ -29,6 +30,7 @@
-  *
-  *  r0  = cp#15 control register
-  *  r1  = machine ID
-+ *  r2  = atags pointer
-  *  r9  = processor ID
-  */
- 	.type	__mmap_switched, %function
-@@ -47,11 +49,12 @@
- 	strcc	fp, [r6],#4
- 	bcc	1b
- 
--	ldmia	r3, {r4, r5, r6, sp}
-+	ldmia	r3, {r4, r5, r6, r7, sp}
- 	str	r9, [r4]			@ Save processor ID
- 	str	r1, [r5]			@ Save machine type
-+	str	r2, [r6]			@ Save atags pointer
- 	bic	r4, r0, #CR_A			@ Clear 'A' bit
--	stmia	r6, {r0, r4}			@ Save control register values
-+	stmia	r7, {r0, r4}			@ Save control register values
- 	b	start_kernel
- 
- /*
-@@ -215,3 +218,34 @@
- 	bl	__lookup_machine_type
- 	mov	r0, r5
- 	ldmfd	sp!, {r4 - r6, pc}
-+
-+/* Determine validity of the r2 atags pointer.  The heuristic requires
-+ * that the pointer be aligned, in the first 16k of physical RAM and
-+ * that the ATAG_CORE marker is first and present.  Future revisions
-+ * of this function may be more lenient with the physical address and
-+ * may also be able to move the ATAGS block if necessary.
-+ *
-+ * r8  = machinfo
-+ *
-+ * Returns:
-+ *  r2 either valid atags pointer, or zero
-+ *  r5, r6 corrupted
-+ */
-+
-+	.type	__vet_atags, %function
-+__vet_atags:
-+	tst	r2, #0x3			@ aligned?
-+	bne	1f
-+
-+	ldr	r5, [r2, #0]			@ is first tag ATAG_CORE?
-+	subs	r5, r5, #ATAG_CORE_SIZE
-+	bne	1f
-+	ldr	r5, [r2, #4]
-+	ldr	r6, =ATAG_CORE
-+	cmp	r5, r6
-+	bne	1f
-+
-+	mov	pc, lr				@ atag pointer is ok
-+
-+1:	mov	r2, #0
-+	mov	pc, lr
---- linux-2.6.22/arch/arm/kernel/head.S	2007-05-30 08:29:34.000000000 -0500
-+++ linux-2.6.22-bgat/arch/arm/kernel/head.S	2007-05-30 22:05:53.000000000 -0500
-@@ -29,6 +29,10 @@
- #define KERNEL_RAM_VADDR	(PAGE_OFFSET + TEXT_OFFSET)
- #define KERNEL_RAM_PADDR	(PHYS_OFFSET + TEXT_OFFSET)
- 
-+#define ATAG_CORE 0x54410001
-+#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
-+
-+
- /*
-  * swapper_pg_dir is the virtual address of the initial page table.
-  * We place the page tables 16K below KERNEL_RAM_VADDR.  Therefore, we must
-@@ -61,7 +65,7 @@
-  *
-  * This is normally called from the decompressor code.  The requirements
-  * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
-- * r1 = machine nr.
-+ * r1 = machine nr, r2 = atags pointer.
-  *
-  * This code is mostly position independent, so if you link the kernel at
-  * 0xc0008000, you call this at __pa(0xc0008000).
-@@ -85,6 +89,7 @@
- 	bl	__lookup_machine_type		@ r5=machinfo
- 	movs	r8, r5				@ invalid machine (r5=0)?
- 	beq	__error_a			@ yes, error 'a'
-+	bl	__vet_atags
- 	bl	__create_page_tables
- 
- 	/*
---- linux-2.6.22/arch/arm/kernel/setup.c	2007-05-30 08:29:34.000000000 -0500
-+++ linux-2.6.22-bgat/arch/arm/kernel/setup.c	2007-05-30 22:07:08.000000000 -0500
-@@ -63,6 +63,8 @@
- unsigned int __machine_arch_type;
- EXPORT_SYMBOL(__machine_arch_type);
- 
-+unsigned int __atags_pointer __initdata;
-+
- unsigned int system_rev;
- EXPORT_SYMBOL(system_rev);
- 
-@@ -780,7 +782,9 @@
- 	if (mdesc->soft_reboot)
- 		reboot_setup("s");
- 
--	if (mdesc->boot_params)
-+	if (__atags_pointer)
-+		tags = phys_to_virt(__atags_pointer);
-+	else if (mdesc->boot_params)
- 		tags = phys_to_virt(mdesc->boot_params);
- 
- 	/*
diff --git a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-006-lcd.patch b/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-006-lcd.patch
deleted file mode 100644
index 7bf6372ef..000000000
--- a/target/device/Atmel/linux/kernel-patches-2.6.22.1/linux-2.6.22.1-006-lcd.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -urN linux-2.6.22.1-atmel-0rig/arch/arm/mach-at91/at91sam9261_devices.c linux-2.6.22.1-atmel/arch/arm/mach-at91/at91sam9261_devices.c
---- linux-2.6.22.1-atmel-0rig/arch/arm/mach-at91/at91sam9261_devices.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-2.6.22.1-atmel/arch/arm/mach-at91/at91sam9261_devices.c	2007-09-04 16:09:54.000000000 +0200
-@@ -20,7 +20,7 @@
- #include <asm/arch/at91sam9261.h>
- #include <asm/arch/at91sam9261_matrix.h>
- #include <asm/arch/at91sam926x_mc.h>
--
-+#include <video/atmel_lcdc.h>
- #include "generic.h"
- 
- 
diff --git a/target/device/Atmel/misc-patches/README b/target/device/Atmel/misc-patches/README
new file mode 100644
index 000000000..cf51054b0
--- /dev/null
+++ b/target/device/Atmel/misc-patches/README
@@ -0,0 +1,2 @@
+Copy these patches to kernel-patches, or u-boot for whatever board you are using them on.
+ 
diff --git a/target/device/Atmel/misc-patches/linux-2.6.24-500-v4l-avr32-isi.patch b/target/device/Atmel/misc-patches/linux-2.6.24-500-v4l-avr32-isi.patch
new file mode 100644
index 000000000..f79ab82a2
--- /dev/null
+++ b/target/device/Atmel/misc-patches/linux-2.6.24-500-v4l-avr32-isi.patch
@@ -0,0 +1,2954 @@
+diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
+index 441b877..3a85a5e 100644
+--- a/include/linux/videodev2.h
++++ b/include/linux/videodev2.h
+@@ -298,6 +298,9 @@ struct v4l2_pix_format
+ #define V4L2_PIX_FMT_PWC2     v4l2_fourcc('P','W','C','2') /* pwc newer webcam */
+ #define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E','6','2','5') /* ET61X251 compression */
+ 
++/* Byte-swapped YUYV */
++#define V4L2_PIX_FMT_VYUY     v4l2_fourcc('V','Y','U','Y') /* 16 YUV 4:2:2 */
++#define V4L2_PIX_FMT_YVYU     v4l2_fourcc('Y','V','Y','U') /* 16 YUV 4:2:2 */
+ /*
+  *	F O R M A T   E N U M E R A T I O N
+  */
+diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
+index 44ccaed..78e38d0 100644
+--- a/drivers/media/video/Makefile
++++ b/drivers/media/video/Makefile
+@@ -77,6 +77,7 @@ obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o
+ obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o
+ obj-$(CONFIG_VIDEO_DPC) += dpc7146.o
+ obj-$(CONFIG_TUNER_3036) += tuner-3036.o
++obj-$(CONFIG_VIDEO_AVR32_ISI) += atmel-isi.o
+ 
+ obj-$(CONFIG_VIDEO_TUNER) += tuner.o
+ obj-$(CONFIG_VIDEO_BUF)   += video-buf.o
+diff --git a/drivers/media/video/atmel-isi.c b/drivers/media/video/atmel-isi.c
+new file mode 100644
+index 0000000..a53a3c0
+--- /dev/null
++++ b/drivers/media/video/atmel-isi.c
+@@ -0,0 +1,1868 @@
++/*
++ * Copyright (c) 2007 Atmel Corporation
++ *
++ * Based on the bttv driver for Bt848 with respective copyright holders
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#define DEBUG
++#include <linux/clk.h>
++#include <linux/completion.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/ioctl.h>
++#include <linux/kernel.h>
++#include <linux/mm.h>
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/platform_device.h>
++#include <linux/slab.h>
++#include <linux/version.h>
++#include <linux/videodev2.h>
++#include <linux/wait.h>
++
++#include <linux/kfifo.h>
++
++#include <asm/io.h>
++
++#include <media/v4l2-common.h>
++
++#include "atmel-isi.h"
++
++#define ATMEL_ISI_VERSION	KERNEL_VERSION(0, 1, 0)
++#define ISI_CODEC 0
++
++/* Default ISI capture buffer size */
++#define ISI_CAPTURE_BUFFER_SIZE 800*600*2
++/* Default ISI video frame size */
++#define ISI_VIDEO_BUFFER_SIZE 320*240*2
++/* Default number of ISI video buffers */
++#define ISI_VIDEO_BUFFERS 4
++/* Maximum number of video buffers */
++#define ISI_VIDEO_BUFFERS_MAX 8
++
++/* Interrupt mask for a single capture */
++#define ISI_CAPTURE_MASK (ISI_BIT(SOF) | ISI_BIT(FO_C_EMP))
++
++/* ISI capture buffer size */
++static int capture_buffer_size = ISI_CAPTURE_BUFFER_SIZE;
++/* Number of buffers used for streaming video */
++static int video_buffers = 4;
++static int video_buffer_size = ISI_VIDEO_BUFFER_SIZE;
++
++/* Preview path horizontal size */
++static int prev_hsize = 320;
++/* Preview path vertical size */
++static int prev_vsize = 240;
++/* Scaling factor of the preview path */
++static int prev_decimation_factor = 1;
++
++/* Input image horizontal size */
++static int image_hsize = 320;
++
++/* Input image vertical size */
++static int image_vsize = 240;
++
++/* Frame rate scaler 
++ * 1 = capture every second frame
++ * 2 = capture every third frame
++ * ...
++ * */
++static int frame_rate_scaler = 2;
++
++/* Set this value if we want to pretend a specific V4L2 output format 
++ *  This format is for the capturing interface
++ */ 
++static int capture_v4l2_fmt = V4L2_PIX_FMT_YUYV;
++/* Set this value if we want to pretend a specific V4L2 output format 
++ *  This format is for the streaming interface
++ */
++static int streaming_v4l2_fmt = V4L2_PIX_FMT_YUYV;
++
++MODULE_PARM_DESC(video_buffers,"Number of frame buffers used for streaming");
++module_param(video_buffers, int, 0664);
++MODULE_PARM_DESC(capture_buffer_size,"Capture buffer size");
++module_param(capture_buffer_size, int, 0664);
++MODULE_PARM_DESC(image_hsize,"Horizontal size of input image");
++module_param(image_hsize, int, 0664);
++MODULE_PARM_DESC(image_vsize,"Vertical size of input image");
++module_param(image_vsize, int, 0664);
++MODULE_PARM_DESC(frame_rate_scaler, "Frame rate scaler");
++module_param(frame_rate_scaler, int, 0664);
++MODULE_PARM_DESC(prev_hsize, "Horizontal image size of preview path output");
++module_param(prev_hsize, int, 0664);
++MODULE_PARM_DESC(prev_vsize, "Vertical image size of preview path output");
++module_param(prev_vsize, int, 0664);
++MODULE_PARM_DESC(prev_decimation_factor, "Preview path decimaion factor");
++module_param(prev_decimation_factor, int, 0664);
++/* Single frame capturing states */
++enum {
++	STATE_IDLE = 0,
++	STATE_CAPTURE_READY,
++	STATE_CAPTURE_WAIT_SOF,
++	STATE_CAPTURE_IN_PROGRESS,
++	STATE_CAPTURE_DONE,
++	STATE_CAPTURE_ERROR,
++};
++
++/* Frame buffer states
++ *  FRAME_UNUSED Frame(buffer) is not used by the ISI module -> an application
++ *  can usually read out data in this state
++ *  FRAME_QUEUED An application has queued the buffer in the incoming queue 
++ *  FRAME_DONE The ISI module has filled the buffer with data and placed is on
++ *  the outgoing queue
++ *  FRAME_ERROR Not used at the moment
++ *  */
++enum frame_status {
++	FRAME_UNUSED,
++	FRAME_QUEUED,
++	FRAME_DONE,
++	FRAME_ERROR,
++};
++/* Frame buffer descriptor 
++ *  Used by the ISI module as a linked list for the DMA controller.
++ */
++struct fbd {
++	/* Physical address of the frame buffer */
++	dma_addr_t fb_address;
++	/* Physical address of the next fbd */
++	dma_addr_t next_fbd_address;
++};
++
++/* Frame buffer data
++ */
++struct frame_buffer {
++	/*  Frame buffer descriptor
++	 *  Used by the ISI DMA controller to provide linked list DMA operation
++	 */
++	struct fbd fb_desc;
++	/* Pointer to the start of the frame buffer */
++	void *frame_buffer;
++	/* Timestamp of the captured frame */
++	struct timeval timestamp;
++	/* Frame number of the frame  */
++	unsigned long sequence;
++	/* Buffer number*/
++	int index;
++	/* Bytes used in the buffer for data, needed as buffers are always
++	 *  aligned to pages and thus may be bigger than the amount of data*/
++	int bytes_used;
++	/* Mmap count
++	 *  Counter to measure how often this buffer is mmapped 
++	 */
++	int mmap_count;
++	/* Buffer status */
++	enum frame_status status;
++};
++
++struct atmel_isi {
++	/* ISI module spin lock. Protects against concurrent access of variables
++	 * that are shared with the ISR */
++	spinlock_t			lock;
++	void __iomem			*regs;
++	/* Pointer to the start of the fbd list */
++	dma_addr_t			fbd_list_start;
++	/* Frame buffers */
++	struct frame_buffer 		video_buffer[ISI_VIDEO_BUFFERS_MAX];
++	/* Frame buffer currently used by the ISI module */
++	struct frame_buffer		*current_buffer;
++	/* Size of a frame buffer */
++	size_t				capture_buffer_size;
++	/* Streaming status 
++	 *  If set ISI is in streaming mode */
++	int				streaming;
++	/* Queue for incoming buffers
++	 *  The buffer number (index) is stored in the fifo as reference 
++	 */
++	struct kfifo 			*grabq;
++	/* Spinlock for the incoming queue */
++	spinlock_t 			grabq_lock;
++	/* Queue for outgoing buffers
++	 *  Buffer number is stored in the fifo as reference
++	 */
++	struct kfifo			*doneq;
++	/* Spinlock for the incoming queue */
++	spinlock_t			doneq_lock;
++
++	/* State of the ISI module in capturing mode */
++	int				state;
++	/* Pointer to ISI buffer */
++	void				*capture_buf;
++	/* Physical address of the capture buffer */
++	dma_addr_t			capture_phys;
++	/* Size of the ISI buffer */
++	size_t				capture_buf_size;
++	/* Capture/streaming wait queue */
++	wait_queue_head_t		capture_wq;
++
++	struct atmel_isi_camera		*camera;
++	struct atmel_isi_format		format;
++	struct atmel_isi_format		streaming_format;
++
++	struct mutex			mutex;
++	/* User counter for the streaming interface */
++	int				stream_users;
++	/* User counter of the capture interface */
++	int				capture_users;
++	/* Video device for capturing (Codec path) */
++	struct video_device		cdev;
++	/* Video device for streaming (Preview path) */
++	struct video_device		vdev;
++	struct completion		reset_complete;
++	struct clk			*pclk;
++	struct clk			*hclk;
++	struct platform_device		*pdev;
++	unsigned int			irq;
++};
++
++#define to_atmel_isi(vdev) container_of(vdev, struct atmel_isi, vdev)
++
++struct atmel_isi_fh {
++	struct atmel_isi		*isi;
++	unsigned int			read_off;
++};
++
++/*-----------------------------------------------------------------------------
++ * Interface to the actual camera.
++ */
++static LIST_HEAD(camera_list);
++static DEFINE_MUTEX(camera_list_mutex);
++
++static void avr32_isi_release_camera(struct atmel_isi *isi,
++				     struct atmel_isi_camera *cam)
++{
++	mutex_lock(&camera_list_mutex);
++	cam->isi = NULL;
++	isi->camera = NULL;
++	module_put(cam->owner);
++	mutex_unlock(&camera_list_mutex);
++}
++
++int atmel_isi_register_camera(struct atmel_isi_camera *cam)
++{
++	pr_debug("atmel_isi: register camera %s\n", cam->name);
++
++	mutex_lock(&camera_list_mutex);
++	list_add_tail(&cam->list, &camera_list);
++	mutex_unlock(&camera_list_mutex);
++
++	return 0;
++}
++EXPORT_SYMBOL_GPL(atmel_isi_register_camera);
++
++void atmel_isi_unregister_camera(struct atmel_isi_camera *cam)
++{
++	pr_debug("atmel_isi: unregister camera %s\n", cam->name);
++
++	mutex_lock(&camera_list_mutex);
++	if (cam->isi)
++		cam->isi->camera = NULL;
++	list_del(&cam->list);
++	mutex_unlock(&camera_list_mutex);
++}
++EXPORT_SYMBOL_GPL(atmel_isi_unregister_camera);
++
++static struct atmel_isi_camera * avr32_isi_grab_camera(struct atmel_isi *isi)
++{
++	struct atmel_isi_camera *entry, *cam = NULL;
++
++	mutex_lock(&camera_list_mutex);
++	list_for_each_entry(entry, &camera_list, list) {
++		/* Just grab the first camera available */
++		if (!entry->isi) {
++			if (!try_module_get(entry->owner))
++				continue;
++
++			cam = entry;
++			cam->isi = isi;
++			pr_debug("%s: got camera: %s\n",
++				 isi->vdev.name, cam->name);
++			break;
++		}
++	}
++	mutex_unlock(&camera_list_mutex);
++
++	return cam;
++}
++
++static int avr32_isi_set_camera_input(struct atmel_isi *isi)
++{
++	struct atmel_isi_camera *cam = isi->camera;
++	int ret;
++	u32 cr1;
++	u32 cr2;
++
++	isi->format.pix.width = image_hsize;
++	isi->format.pix.height = image_vsize;
++	isi->format.pix.bytesperline = 0;
++
++	ret = cam->set_format(cam, &isi->format);
++	if (ret)
++		return ret;
++
++
++	switch (isi->format.input_format) {
++	case ATMEL_ISI_PIXFMT_GREY:
++		cr2 = ISI_BIT(GRAYSCALE);
++		break;
++	case ATMEL_ISI_PIXFMT_CbYCrY:
++		cr2 = ISI_BF(YCC_SWAP, 0);
++		break;
++	case ATMEL_ISI_PIXFMT_CrYCbY:
++		cr2 = ISI_BF(YCC_SWAP, 1);
++		break;
++	case ATMEL_ISI_PIXFMT_YCbYCr:
++		cr2 = ISI_BF(YCC_SWAP, 2);
++		break;
++	case ATMEL_ISI_PIXFMT_YCrYCb:
++		cr2 = ISI_BF(YCC_SWAP, 3);
++		break;
++	case ATMEL_ISI_PIXFMT_RGB24:
++		cr2 = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 0);
++		break;
++	case ATMEL_ISI_PIXFMT_BGR24:
++		cr2 = ISI_BIT(COL_SPACE) | ISI_BF(RGB_CFG, 1);
++		break;
++	case ATMEL_ISI_PIXFMT_RGB16:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
++		       | ISI_BF(RGB_CFG, 0));
++		break;
++	case ATMEL_ISI_PIXFMT_BGR16:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
++		       | ISI_BF(RGB_CFG, 1));
++		break;
++	case ATMEL_ISI_PIXFMT_GRB16:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
++		       | ISI_BF(RGB_CFG, 2));
++		break;
++	case ATMEL_ISI_PIXFMT_GBR16:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_MODE)
++		       | ISI_BF(RGB_CFG, 3));
++		break;
++	case ATMEL_ISI_PIXFMT_RGB24_REV:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
++		       | ISI_BF(RGB_CFG, 0));
++		break;
++	case ATMEL_ISI_PIXFMT_BGR24_REV:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
++		       | ISI_BF(RGB_CFG, 1));
++		break;
++	case ATMEL_ISI_PIXFMT_RGB16_REV:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
++		       | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 0));
++		break;
++	case ATMEL_ISI_PIXFMT_BGR16_REV:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
++		       | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 1));
++		break;
++	case ATMEL_ISI_PIXFMT_GRB16_REV:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
++		       | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 2));
++		break;
++	case ATMEL_ISI_PIXFMT_GBR16_REV:
++		cr2 = (ISI_BIT(COL_SPACE) | ISI_BIT(RGB_SWAP)
++		       | ISI_BIT(RGB_MODE) | ISI_BF(RGB_CFG, 3));
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	
++	cr1 = ISI_BF(EMB_SYNC, cam->has_emb_sync)
++		| ISI_BF(HSYNC_POL, cam->hsync_act_low)
++		| ISI_BF(VSYNC_POL, cam->vsync_act_low)
++		| ISI_BF(PIXCLK_POL, cam->pclk_act_falling)
++		| ISI_BIT(DIS);
++
++	isi_writel(isi, CR1, cr1);
++	isi_writel(isi, CR2, cr2);
++
++	return 0;
++}
++
++static int avr32_isi_capture_set_format(struct atmel_isi *isi,
++				struct atmel_isi_format *fmt)
++{
++	u32 cr2;
++
++	fmt->pix.width = min(2048U, fmt->pix.width);
++	fmt->pix.height = min(2048U, fmt->pix.height);
++	fmt->pix.bytesperline = 0;
++
++	/* Set format if we have specified one */
++	if(capture_v4l2_fmt){
++		fmt->pix.pixelformat = capture_v4l2_fmt;
++	}
++	else {
++		/* Codec path output format */
++		fmt->pix.pixelformat = V4L2_PIX_FMT_YVYU;
++	}
++
++	/* The ISI module outputs either YUV 4:2:2 (codec path)
++	 * or RGB 5:5:5 (preview path) (ISI grayscale mode is not supported 
++	 * by V4L2). Therefore two pixels will be in a 32bit word */
++	fmt->pix.bytesperline = ALIGN(fmt->pix.width * 2, 4);
++	fmt->pix.sizeimage = fmt->pix.bytesperline * fmt->pix.height;
++	
++	cr2 = isi_readl(isi, CR2);
++	cr2 = ISI_BFINS(IM_VSIZE, fmt->pix.height - 1, cr2);
++	cr2 = ISI_BFINS(IM_HSIZE, fmt->pix.width - 1, cr2);
++	isi_writel(isi, CR2, cr2);
++
++	pr_debug("set capture format: width=%d height=%d\n",
++		fmt->pix.width, fmt->pix.height);
++
++	return 0;
++}
++
++static int avr32_isi_streaming_set_format(struct atmel_isi *isi,
++				struct atmel_isi_format *fmt)
++{
++	memcpy(&isi->streaming_format, &isi->format, 
++		sizeof(struct atmel_isi_format)); 
++#ifndef ISI_CODEC
++	fmt->pix.width = min(640U, prev_hsize);
++	fmt->pix.height = min(480U, prev_vsize);
++	fmt->pix.bytesperline = 0;
++
++	/* Set format if we have specified one */
++	if(streaming_v4l2_fmt){
++		fmt->pix.pixelformat = streaming_v4l2_fmt;
++	}
++	else {
++		/* Preview path output format
++		 * Would be logically V4L2_PIX_FMT_BGR555X 
++		 * but this format does not exist in the specification
++		 * So for now we pretend V4L2_PIX_FMT_RGB555X 
++		 */
++		fmt->pix.pixelformat = V4L2_PIX_FMT_RGB555X;
++	}
++
++	/* The ISI module outputs either YUV 4:2:2 (codec path) 
++	 * or RGB 5:5:5 (preview path) (ISI grayscale mode is not 
++	 * supported yet. Therefore two pixels will be in a 32bit word 
++	 */
++	fmt->pix.bytesperline = ALIGN(fmt->pix.width * 2, 4);
++	fmt->pix.sizeimage = fmt->pix.bytesperline * fmt->pix.height;
++	
++	/* These values depend on the sensor output image size */
++	isi_writel(isi, PDECF, prev_decimation_factor);/* 1/16 * 16 = 1*/
++	isi_writel(isi,PSIZE , ISI_BF(PREV_HSIZE,prev_hsize - 1)
++		| ISI_BF(PREV_VSIZE, prev_vsize - 1));
++
++	pr_debug("set_format: cr1=0x%08x cr2=0x%08x\n",
++		 isi_readl(isi, CR1), isi_readl(isi, CR2));
++#else
++	avr32_isi_capture_set_format(isi, &isi->streaming_format);
++#endif
++	return 0;
++}
++
++static int avr32_isi_start_capture(struct atmel_isi *isi)
++{
++	u32 cr1;
++	int ret;
++
++	spin_lock_irq(&isi->lock);
++	isi->state = STATE_IDLE;
++	isi_readl(isi, SR); /* clear any pending SOF interrupt */
++	isi_writel(isi, IER, ISI_BIT(SOF));
++	isi_writel(isi, CR1, isi_readl(isi, CR1) & ~ISI_BIT(DIS));	
++	spin_unlock_irq(&isi->lock);
++
++	pr_debug("isi: waiting for SOF\n");
++	ret = wait_event_interruptible(isi->capture_wq,
++				       isi->state != STATE_IDLE);
++	if (ret)
++		return ret;
++	if (isi->state != STATE_CAPTURE_READY)
++		return -EIO;
++
++	/*
++	 * Do a codec request. Next SOF indicates start of capture,
++	 * the one after that indicates end of capture.
++	 */
++	pr_debug("isi: starting capture\n");
++	isi_writel(isi, CDBA, isi->capture_phys);
++
++	spin_lock_irq(&isi->lock);
++	isi->state = STATE_CAPTURE_WAIT_SOF;
++	cr1 = isi_readl(isi, CR1);
++	cr1 |= ISI_BIT(CODEC_ON);
++	isi_writel(isi, CR1, cr1);
++	isi_writel(isi, IER, ISI_CAPTURE_MASK);
++	spin_unlock_irq(&isi->lock);
++
++	return 0;
++}
++
++static void avr32_isi_capture_done(struct atmel_isi *isi,
++				   int state)
++{
++	u32 cr1;
++
++	cr1 = isi_readl(isi, CR1);
++	cr1 &= ~ISI_BIT(CODEC_ON);
++	isi_writel(isi, CR1, cr1);
++
++	isi->state = state;
++	wake_up_interruptible(&isi->capture_wq);
++	isi_writel(isi, IDR, ISI_CAPTURE_MASK);
++}
++
++static irqreturn_t avr32_isi_handle_streaming(struct atmel_isi *isi, 
++	int sequence){
++	
++	int reqnr;
++
++	if(kfifo_get(isi->grabq, (unsigned char *) &reqnr,
++			sizeof(int)) != sizeof(int)){
++			
++		/* as no new buffer is available we keep the
++		* current one
++		*/
++		pr_debug("isi: dropping frame\n");
++#ifdef ISI_CODEC
++		isi_writel(isi, CDBA, 
++			isi->current_buffer->fb_desc.fb_address);
++
++		isi_writel(isi, CR1, ISI_BIT(CODEC_ON) | 
++			isi_readl(isi, CR1));
++#else
++		/* TEST this has to be tested if it messes up the ISI
++		 * streaming process */
++		isi_writel(isi, PPFBD, (unsigned long) 
++			&isi->video_buffer[isi->current_buffer->index]);
++#endif
++	}
++	else{
++		isi->current_buffer->status = FRAME_DONE;
++		isi->current_buffer->sequence = sequence;
++			
++		do_gettimeofday(&isi->current_buffer->timestamp);
++			
++		/*isi->current_buffer->bytes_used = 
++			ISI_VIDEO_MAX_FRAME_SIZE; */
++			
++		kfifo_put(isi->doneq, (unsigned char *) 
++			&(isi->current_buffer->index), sizeof(int));
++			
++		isi->current_buffer = &(isi->video_buffer[reqnr]);
++#ifdef ISI_CODEC
++		isi_writel(isi, CDBA, 
++			isi->current_buffer->fb_desc.fb_address);
++		isi_writel(isi, CR1, ISI_BIT(CODEC_ON) | 
++			isi_readl(isi, CR1));
++#else
++		/*TODO check if fbd corresponds to frame buffer */
++#endif
++		wake_up_interruptible(&isi->capture_wq);
++	}
++	return IRQ_HANDLED;
++}
++
++/* FIXME move code from ISR here
++static irqreturn_t avr32_isi_handle_capturing(struct atmel_isi *isi){
++
++}*/
++/* isi interrupt service routine */
++static irqreturn_t isi_interrupt(int irq, void *dev_id)
++{
++	struct atmel_isi *isi = dev_id;
++	u32 status, mask, pending;
++	irqreturn_t ret = IRQ_NONE;
++	static int sequence = 0;
++
++	spin_lock(&isi->lock);
++
++	status = isi_readl(isi, SR);
++	mask = isi_readl(isi, IMR);
++	pending = status & mask;
++
++	pr_debug("isi: interrupt status %x pending %x\n",
++		 status, pending);
++	if(isi->streaming){
++		if(likely(pending & (ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP)))){
++		
++			sequence++;
++		 	ret = avr32_isi_handle_streaming(isi, sequence);
++		}
++	}
++	else{
++	while (pending) {
++		if (pending & (ISI_BIT(FO_C_OVF) | ISI_BIT(FR_OVR))) {
++			avr32_isi_capture_done(isi, STATE_CAPTURE_ERROR);
++			pr_debug("%s: FIFO overrun (status=0x%x)\n",
++				 isi->vdev.name, status);
++		} else if (pending & ISI_BIT(SOF)) {
++			switch (isi->state) {
++			case STATE_IDLE:
++				isi->state = STATE_CAPTURE_READY;
++				wake_up_interruptible(&isi->capture_wq);
++				break;
++			case STATE_CAPTURE_READY:
++				break;
++			case STATE_CAPTURE_WAIT_SOF:
++				isi->state = STATE_CAPTURE_IN_PROGRESS;
++				break;
++			/*
++			case STATE_CAPTURE_IN_PROGRESS:
++				avr32_isi_capture_done(isi, STATE_CAPTURE_DONE);
++				break;
++				*/
++			}
++		}
++		if (pending & ISI_BIT(FO_C_EMP)){
++			if( isi->state == STATE_CAPTURE_IN_PROGRESS)
++				avr32_isi_capture_done(isi, STATE_CAPTURE_DONE);
++		}
++
++		if (pending & ISI_BIT(SOFTRST)) {
++			complete(&isi->reset_complete);
++			isi_writel(isi, IDR, ISI_BIT(SOFTRST));
++		}
++
++		status = isi_readl(isi, SR);
++		mask = isi_readl(isi, IMR);
++		pending = status & mask;
++		ret = IRQ_HANDLED;
++	}
++	}
++	spin_unlock(&isi->lock);
++
++	return ret;
++}
++
++/* ------------------------------------------------------------------------
++ *  IOCTL videoc handling
++ *  ----------------------------------------------------------------------*/
++
++/* --------Capture ioctls ------------------------------------------------*/
++/* Device capabilities callback function.
++ */
++static int avr32_isi_capture_querycap(struct file *file, void *priv,
++			      struct v4l2_capability *cap)
++{
++	strcpy(cap->driver, "atmel-isi");
++	strcpy(cap->card, "Atmel Image Sensor Interface");
++	cap->version = ATMEL_ISI_VERSION;
++	/* V4L2_CAP_VIDEO_CAPTURE -> This is a capture device
++	 * V4L2_CAP_READWRITE -> read/write interface used
++	 */
++	cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE 
++			     | V4L2_CAP_READWRITE
++			     );
++	return 0;
++}
++
++/*  Input enumeration callback function. 
++ *  Enumerates available input devices.
++ *  This can be called many times from the V4L2-layer by 
++ *  incrementing the index to get all avaliable input devices.
++ */
++static int avr32_isi_capture_enum_input(struct file *file, void *priv,
++				struct v4l2_input *input)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	/* Just one input (ISI) is available */
++	if (input->index != 0)
++		return -EINVAL;
++
++	/* Set input name as camera name */
++	strlcpy(input->name, isi->camera->name, sizeof(input->name));
++	input->type = V4L2_INPUT_TYPE_CAMERA;
++	
++	/* Set to this value just because this should be set to a 
++	 * defined value
++	 */
++	input->std = V4L2_STD_PAL;
++
++	return 0;
++}
++/* Selects an input device.
++ *  One input device (ISI) currently supported.
++ */
++static int avr32_isi_capture_s_input(struct file *file, void *priv,
++			     unsigned int index)
++{
++	if (index != 0)
++		return -EINVAL;
++	return 0;
++}
++
++/* Gets current input device.
++ */
++static int avr32_isi_capture_g_input(struct file *file, void *priv,
++			     unsigned int *index)
++{
++	*index = 0;
++	return 0;
++}
++
++/* Format callback function 
++ * Returns a v4l2_fmtdesc structure with according values to a
++ * index.
++ * This function is called from user space until it returns 
++ * -EINVAL.
++ */
++static int avr32_isi_capture_enum_fmt_cap(struct file *file, void *priv,
++				  struct v4l2_fmtdesc *fmt)
++{
++	if (fmt->index != 0)
++		return -EINVAL;
++
++	/* if we want to pretend another ISI output 
++	 * this is usefull if we input an other input format from a camera
++	 * than specified in the ISI -> makes it possible to swap bytes 
++	 * in the ISI output format but messes up the preview path output
++	 */ 
++	if(capture_v4l2_fmt){
++		fmt->pixelformat = capture_v4l2_fmt;
++	}
++	else {
++		/* This is the format the ISI tries to output */
++		strcpy(fmt->description, "YCbYCr (YUYV) 4:2:2");
++		fmt->pixelformat = V4L2_PIX_FMT_YUYV;
++	}
++
++	return 0;
++}
++
++static int avr32_isi_capture_try_fmt_cap(struct file *file, void *priv,
++			struct v4l2_format *vfmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	/* Just return the current format for now */
++	memcpy(&vfmt->fmt.pix, &isi->format.pix,
++		sizeof(struct v4l2_pix_format));
++
++	return 0;
++}
++
++/* Gets current hardware configuration
++ *  For capture devices the pixel format settings are 
++ *  important.
++ */
++static int avr32_isi_capture_g_fmt_cap(struct file *file, void *priv,
++			       struct v4l2_format *vfmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	/* Return current pixel format */
++	memcpy(&vfmt->fmt.pix, &isi->format.pix,
++	       sizeof(struct v4l2_pix_format));
++
++	return 0;
++}
++
++static int avr32_isi_capture_s_fmt_cap(struct file *file, void *priv,
++			       struct v4l2_format *vfmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++	int ret = 0;
++	
++	/* We have a fixed format so just copy the current format 
++	 * back
++	 */
++	memcpy(&vfmt->fmt.pix, &isi->format.pix,
++		sizeof(struct v4l2_pix_format));
++
++	return ret;
++}
++
++/* ------------ Preview path ioctls ------------------------------*/
++/* Device capabilities callback function.
++ */
++static int avr32_isi_querycap(struct file *file, void *priv,
++			      struct v4l2_capability *cap)
++{
++	strcpy(cap->driver, "atmel-isi");
++	strcpy(cap->card, "Atmel Image Sensor Interface");
++	cap->version = ATMEL_ISI_VERSION;
++	/* V4L2_CAP_VIDEO_CAPTURE -> This is a capture device
++	 * V4L2_CAP_READWRITE -> read/write interface used
++	 * V4L2_CAP_STREAMING -> ioctl + mmap interface used
++	 */
++	cap->capabilities = (V4L2_CAP_VIDEO_CAPTURE 
++			     | V4L2_CAP_READWRITE
++			     | V4L2_CAP_STREAMING
++			     );
++	return 0;
++}
++
++/* Input enumeration callback function. 
++ *  Enumerates available input devices.
++ *  This can be called many times from the V4L2-layer by 
++ *  incrementing the index to get all avaliable input devices.
++ */
++static int avr32_isi_enum_input(struct file *file, void *priv,
++				struct v4l2_input *input)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	/* Just one input (ISI) is available */
++	if (input->index != 0)
++		return -EINVAL;
++
++	/* Set input name as camera name */
++	strlcpy(input->name, isi->camera->name, sizeof(input->name));
++	input->type = V4L2_INPUT_TYPE_CAMERA;
++	
++	/* Set to this value just because this should be set to a 
++	 * defined value
++	 */
++	input->std = V4L2_STD_PAL;
++
++	return 0;
++}
++
++/* Selects an input device.
++ *  One input device (ISI) currently supported.
++ */
++static int avr32_isi_s_input(struct file *file, void *priv,
++			     unsigned int index)
++{
++	if (index != 0)
++		return -EINVAL;
++
++	return 0;
++}
++
++/* Gets current input device.
++ */
++static int avr32_isi_g_input(struct file *file, void *priv,
++			     unsigned int *index)
++{
++	*index = 0;
++	return 0;
++}
++
++/* Format callback function 
++ * Returns a v4l2_fmtdesc structure with according values to a
++ * index.
++ * This function is called from user space until it returns 
++ * -EINVAL.
++ */
++static int avr32_isi_enum_fmt_cap(struct file *file, void *priv,
++				  struct v4l2_fmtdesc *fmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	if (fmt->index != 0)
++		return -EINVAL;
++
++	/* TODO: Return all possible formats 
++	* This depends on ISI and camera.
++	* A enum_fmt function or a data structure should be 
++	* added to the camera driver.
++	* For now just one format supported 
++	*/
++	if(streaming_v4l2_fmt){
++		strcpy(fmt->description, "Pretended format");
++	}
++	else{
++		strcpy(fmt->description, "Normal format");
++	}
++	fmt->pixelformat = isi->streaming_format.pix.pixelformat;//V4L2_PIX_FMT_UYVY;
++
++	return 0;
++}
++
++static int avr32_isi_try_fmt_cap(struct file *file, void *priv,
++			struct v4l2_format *vfmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	/* FIXME For now we just return the current format*/
++	memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix,
++		sizeof(struct v4l2_pix_format));
++	return 0;
++}
++
++/* Gets current hardware configuration
++ *  For capture devices the pixel format settings are 
++ *  important.
++ */
++static int avr32_isi_g_fmt_cap(struct file *file, void *priv,
++			       struct v4l2_format *vfmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++
++	/*Copy current pixel format structure to user space*/
++	memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix,
++	       sizeof(struct v4l2_pix_format));
++
++	return 0;
++}
++
++static int avr32_isi_s_fmt_cap(struct file *file, void *priv,
++			       struct v4l2_format *vfmt)
++{
++	struct atmel_isi_fh *fh = priv;
++	struct atmel_isi *isi = fh->isi;
++	int ret = 0;
++	
++	/* Just return the current format as we do not support
++	* format switching */
++	memcpy(&vfmt->fmt.pix, &isi->streaming_format.pix,
++		sizeof(struct v4l2_pix_format));
++
++	return ret;
++}
++
++/* Checks if control is supported in driver
++ * No controls currently supported yet
++ */
++static int avr32_isi_queryctrl(struct file *file, void *priv,
++			   struct v4l2_queryctrl *qc)
++{
++	switch(qc->id){
++	case V4L2_CID_BRIGHTNESS:
++		strcpy(qc->name, "Brightness");
++		qc->minimum = 0;
++		qc->maximum = 100;
++		qc->step = 1;
++		qc->default_value = 50;
++		qc->flags = 0;
++		break;
++	default:
++		return -EINVAL;
++	}
++	return 0;
++}
++
++static int avr32_isi_g_ctrl(struct file *file, void *priv,
++			struct v4l2_control *ctrl)
++{
++	switch(ctrl->id){
++	case V4L2_CID_BRIGHTNESS:
++		ctrl->value = 0;
++		break;
++	default:
++		return -EINVAL;
++	}
++	return 0;
++}
++
++static int avr32_isi_s_ctrl(struct file *file, void *priv,
++			struct v4l2_control *ctrl)
++{
++	switch(ctrl->id){
++	case V4L2_CID_BRIGHTNESS:
++		break;
++	default:
++		return -EINVAL;
++	}
++	return 0;
++}
++
++static int avr32_isi_reqbufs(struct file *file, void *private_data, 
++			struct v4l2_requestbuffers *req)
++{
++	/* Only memory mapped buffers supported*/
++	if(req->memory != V4L2_MEMORY_MMAP){
++		pr_debug("atmel_isi: buffer format not supported\n");
++		return -EINVAL;
++	}
++	pr_debug("atmel_isi: Requested %d buffers. Using %d buffers\n",
++		req->count, video_buffers);
++	/* buffer number is fixed for now as it is difficult to get 
++	 * that memory at runtime */	
++	req->count = video_buffers;
++	memset(&req->reserved, 0, sizeof(req->reserved));
++	return 0;
++}
++
++static int avr32_isi_querybuf(struct file *file, void *private_data, 
++			struct v4l2_buffer *buf)
++{
++	struct atmel_isi_fh *fh = private_data;
++	struct atmel_isi *isi = fh->isi;
++	struct frame_buffer *buffer; 
++
++	if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
++		return -EINVAL;
++	if(unlikely(buf->index >= video_buffers))
++		return -EINVAL;
++
++	buffer = &(isi->video_buffer[buf->index]);
++
++	buf->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
++	buf->length = video_buffer_size;
++	buf->memory = V4L2_MEMORY_MMAP;
++
++	/* set index as mmap reference to the buffer */
++	buf->m.offset = buf->index << PAGE_SHIFT;
++	
++	switch(buffer->status){
++	case FRAME_UNUSED:
++	case FRAME_ERROR:
++	case FRAME_QUEUED:
++		buf->flags |= V4L2_BUF_FLAG_QUEUED;
++		buf->bytesused = buffer->bytes_used;
++		break;
++	case FRAME_DONE:
++		buf->flags |= V4L2_BUF_FLAG_DONE;
++		buf->bytesused = buffer->bytes_used;
++		buf->sequence = buffer->sequence;
++		buf->timestamp = buffer->timestamp;
++		break;
++	}
++
++	buf->field = V4L2_FIELD_NONE; /* no interlacing stuff */
++
++	if(buffer->mmap_count)
++		buf->flags |= V4L2_BUF_FLAG_MAPPED;
++	else 
++		buf->flags &= ~V4L2_BUF_FLAG_MAPPED;
++
++	pr_debug("atmel_isi: querybuf index:%d offset:%d\n",
++		buf->index, buf->m.offset);
++
++	return 0;
++}
++
++static int avr32_isi_qbuf(struct file *file, void *private_data,
++			struct v4l2_buffer *buf)
++{
++	struct atmel_isi_fh *fh = private_data;
++	struct atmel_isi *isi = fh->isi;
++	struct frame_buffer *buffer;
++	
++	if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
++		return -EINVAL;
++	if(unlikely(buf->index >= video_buffers || buf->index < 0))
++		return -EINVAL;
++	if(unlikely(buf->memory != V4L2_MEMORY_MMAP))
++		return -EINVAL;
++
++	buffer = &(isi->video_buffer[buf->index]);
++	if(unlikely(buffer->status != FRAME_UNUSED))
++		return -EINVAL;
++
++	mutex_lock(&isi->mutex);
++	buf->flags |= V4L2_BUF_FLAG_QUEUED;
++	buf->flags &= ~V4L2_BUF_FLAG_DONE;
++	buffer->status = FRAME_QUEUED;
++	kfifo_put(isi->grabq, (unsigned char*) &buf->index, sizeof(int));
++	mutex_unlock(&isi->mutex);
++
++	return 0;
++}
++
++static int avr32_isi_dqbuf(struct file *file, void *private_data,
++			struct v4l2_buffer *buf)
++{
++	struct atmel_isi_fh *fh = private_data;
++	struct atmel_isi *isi = fh->isi;
++	struct frame_buffer *buffer;
++	int reqnr = 0;
++
++	if(unlikely(buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
++		return -EINVAL;
++	/* Mencoder does not set this flag
++	 *
++	if(unlikely(buf->memory != V4L2_MEMORY_MMAP)){
++		pr_debug("isi: dequeue failed buffer not of mmapped type\n");
++		return -EINVAL;
++	}*/
++	if((kfifo_len(isi->doneq) == 0) && (file->f_flags & O_NONBLOCK)){
++		pr_debug("Done-queue is empty\n");
++		return -EAGAIN;
++	}
++	/*
++	if(wait_event_interruptible(isi->capture_wq, 
++		kfifo_len(isi->doneq) != 0) < 0){
++		pr_debug("Done-queue interrupted\n");
++		return -EINTR;
++	}
++	*/
++	if(!kfifo_get(isi->doneq, (unsigned char*) &reqnr, sizeof(int))){
++		return -EBUSY;
++	}
++	buffer = &(isi->video_buffer[reqnr]);
++
++	if(unlikely(buffer->status != FRAME_DONE)){
++		pr_debug("isi: error, dequeued buffer not ready\n");
++		return -EINVAL;
++	}
++	buf->index = reqnr;
++	buf->bytesused = buffer->bytes_used;
++	buf->timestamp = buffer->timestamp;
++	buf->sequence = buffer->sequence;
++	buf->m.offset = reqnr << PAGE_SHIFT;
++	buffer->status = FRAME_UNUSED;
++	buf->flags = V4L2_BUF_FLAG_MAPPED | V4L2_BUF_FLAG_DONE;
++
++	buf->length = isi->capture_buffer_size;
++	buf->field = V4L2_FIELD_NONE;
++	buf->memory = V4L2_MEMORY_MMAP;
++	return 0;
++}
++
++static int avr32_isi_streamon(struct file *file, void *private_data,
++			enum v4l2_buf_type type)
++{
++	struct atmel_isi_fh *fh = private_data;
++	struct atmel_isi *isi = fh->isi;
++	int reqnr;
++	struct frame_buffer *buffer;
++	u32 cr1;
++
++	if(unlikely(type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
++		return -EINVAL;
++	
++	if(!kfifo_get(isi->grabq, (unsigned char*) &reqnr, sizeof(int))){
++		mutex_unlock(&isi->mutex);
++		pr_debug("atmel_isi: No buffer in IN-Queue, start of streaming\
++			aborted (one buffer is required in IN-Queue)\n"); 
++		return -EINVAL;
++	}
++	buffer = &(isi->video_buffer[reqnr]);
++	
++
++	spin_lock_irq(isi->lock);
++	isi->streaming = 1;
++	isi->current_buffer = buffer;
++	cr1 = isi_readl(isi, CR1);
++#ifdef ISI_CODEC
++	isi_writel(isi, CDBA, buffer->fb_desc.fb_address);
++	/* Enable codec path */
++	cr1 |= ISI_BIT(CODEC_ON) | ISI_BIT(DIS);
++#else
++	isi_writel(isi, PPFBD, isi->fbd_list_start);
++#endif
++	/* Enable interrupts */
++	isi_readl(isi, SR);
++	/* FIXME enable codec/preview path according to setup */
++	isi_writel(isi, IER, ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP));
++
++	cr1 |= ISI_BF(FRATE, frame_rate_scaler);
++
++	/* Enable ISI module*/
++	cr1 &= ~ISI_BIT(DIS);
++	isi_writel(isi, CR1, cr1);
++	spin_unlock_irq(isi->lock);
++
++	isi->camera->start_capture(isi->camera);
++
++	return 0;
++}
++
++static int avr32_isi_streamoff(struct file *file, void *private_data,
++			enum v4l2_buf_type type)
++{
++	struct atmel_isi_fh *fh = private_data;
++	struct atmel_isi *isi = fh->isi;
++
++	if(unlikely(type != V4L2_BUF_TYPE_VIDEO_CAPTURE))
++		return -EINVAL;
++
++	spin_lock_irq(isi->lock);
++	isi->streaming = 0;
++#ifdef ISI_CODEC
++	/* Disble codec path */
++	isi_writel(isi, CR1, isi_readl(isi, CR1) & (~ISI_BIT(CODEC_ON)));
++#endif
++	/* Disable interrupts */
++	isi_writel(isi, IDR, ISI_BIT(FO_C_EMP) | ISI_BIT(FO_P_EMP));
++	
++	/* Disable ISI module*/
++	isi_writel(isi, CR1, isi_readl(isi, CR1) | ISI_BIT(DIS));
++	spin_unlock_irq(isi->lock);
++
++	isi->camera->stop_capture(isi->camera);
++	pr_debug("atmel_isi: Stream off\n");
++
++	return 0;
++}
++
++/*----------------------------------------------------------------------------*/
++static int avr32_isi_capture_close (struct inode *inode, struct file *file)
++{
++	struct atmel_isi_fh *fh = file->private_data;
++	struct atmel_isi *isi = fh->isi;
++	u32 cr1;
++
++	mutex_lock(&isi->mutex);
++
++	isi->capture_users--;
++	kfree(fh);
++
++	/* Stop camera and ISI  if driver has no users */
++	if(!isi->stream_users) {
++		isi->camera->stop_capture(isi->camera);
++
++		spin_lock_irq(&isi->lock);
++		cr1 = isi_readl(isi, CR1);
++		cr1 |= ISI_BIT(DIS);
++		isi_writel(isi, CR1, cr1);
++		spin_unlock_irq(&isi->lock);
++	}
++	mutex_unlock(&isi->mutex);
++
++	return 0;
++}
++
++static int avr32_isi_capture_open (struct inode *inode, struct file *file)
++{
++	struct video_device *vdev = video_devdata(file);
++	struct atmel_isi *isi = to_atmel_isi(vdev);
++	struct atmel_isi_fh *fh;
++	int ret = -EBUSY;
++	unsigned long timeout;
++
++	mutex_lock(&isi->mutex);
++	
++
++	if (isi->capture_users) {
++		pr_debug("%s: open(): device busy\n", vdev->name);
++		goto out;
++	}
++
++	if (!isi->camera) {
++
++		ret = -ENODEV;
++		isi->camera = avr32_isi_grab_camera(isi);
++		if (!isi->camera)
++			goto out;
++
++		ret = avr32_isi_set_camera_input(isi);
++		if(ret)
++			goto out;
++	}
++
++	avr32_isi_capture_set_format(isi, &isi->format);
++
++	/*
++	 * Reset the controller and wait for completion. The
++	 * reset will only succeed if we have a pixel clock
++	 * from the camera.
++	 */
++	if(isi->stream_users == 0){
++		
++		init_completion(&isi->reset_complete);
++		isi_writel(isi, IER, ISI_BIT(SOFTRST));
++		isi_writel(isi, CR1, ISI_BIT(RST));
++
++		timeout = wait_for_completion_timeout(&isi->reset_complete,
++			msecs_to_jiffies(100));
++
++		isi_writel(isi, IDR, ~0UL);
++		if (timeout == 0) {
++			ret = -ETIMEDOUT;
++			goto out;
++		}
++	}
++	
++	ret = -ENOMEM;
++	fh = kzalloc(sizeof(struct atmel_isi_fh), GFP_KERNEL);
++	if (!fh) {
++		pr_debug("%s: open(): out of memory\n", vdev->name);
++		goto out;
++	}
++
++	fh->isi = isi;
++	file->private_data = fh;
++	isi->capture_users++;
++
++	ret = 0;
++
++out:
++	mutex_unlock(&isi->mutex);
++	return ret;
++}
++
++static ssize_t avr32_isi_capture_read(struct file *file, char __user *data,
++			      size_t count, loff_t *ppos)
++{
++	struct atmel_isi_fh *fh = file->private_data;
++	struct atmel_isi *isi = fh->isi;
++	int state;
++	int ret;
++
++	state = STATE_IDLE;
++
++	pr_debug("isi: read %zu bytes read_off=%u state=%u sizeimage=%u\n",
++		count, fh->read_off, state, isi->format.pix.sizeimage);
++	isi->camera->start_capture(isi->camera);
++	
++
++	avr32_isi_start_capture(isi);
++
++	ret = wait_event_interruptible( isi->capture_wq,
++			(isi->state == STATE_CAPTURE_DONE)
++			|| (isi->state == STATE_CAPTURE_ERROR));
++	if (ret)
++		return ret;
++	if (isi->state == STATE_CAPTURE_ERROR) {
++		isi->state = STATE_IDLE;
++		return -EIO;
++	}
++
++	fh->read_off = 0;
++
++	count = min(count, (size_t)isi->format.pix.sizeimage - fh->read_off);
++	ret = copy_to_user(data, isi->capture_buf + fh->read_off, count);
++	if (ret)
++		return -EFAULT;
++
++	fh->read_off += count;
++	if (fh->read_off >= isi->format.pix.sizeimage)
++		isi->state = STATE_IDLE;
++
++	return count;
++}
++
++static void avr32_isi_capture_release (struct video_device *vdev)
++{
++	pr_debug("%s: release\n", vdev->name);
++}
++
++/* ----------------- Streaming interface -------------------------------------*/
++static void avr32_isi_vm_open(struct vm_area_struct *vma){
++	struct frame_buffer *buffer = 
++		(struct frame_buffer *) vma->vm_private_data;
++	buffer->mmap_count++;
++	pr_debug("atmel_isi: vm_open count=%d\n",buffer->mmap_count);
++}
++
++static void avr32_isi_vm_close(struct vm_area_struct *vma){
++	struct frame_buffer *buffer = 
++		(struct frame_buffer *) vma->vm_private_data;
++	pr_debug("atmel_isi: vm_close count=%d\n",buffer->mmap_count);	
++	buffer->mmap_count--;
++	if(buffer->mmap_count < 0)
++		printk("atmel_isi: mmap_count went negative\n");
++}
++
++/* FIXME remove this function 
++struct page *avr32_isi_vm_nopage( struct vm_area_struct *vma, 
++	unsigned long address, int *type )
++{
++    return NOPAGE_SIGBUS;
++}
++*/
++
++static struct vm_operations_struct avr32_isi_vm_ops = {
++	.open = avr32_isi_vm_open,
++	.close = avr32_isi_vm_close,
++	//.nopage = avr32_isi_vm_nopage,
++};
++
++static int avr32_isi_mmap(struct file *file, struct vm_area_struct *vma)
++{
++	unsigned long pfn;
++	int ret;
++	struct atmel_isi_fh *fh = file->private_data;
++	struct atmel_isi * isi = fh->isi;
++	struct frame_buffer *buffer = &(isi->video_buffer[vma->vm_pgoff]);
++	unsigned long size = vma->vm_end - vma->vm_start;
++
++	pr_debug("atmel_isi: mmap called pgoff=%ld size=%ld \n", 
++		vma->vm_pgoff, size);
++
++	if(size > video_buffer_size){
++		pr_debug("atmel_isi: mmap requested buffer is to large\n");
++		return -EINVAL;
++	}
++	if(vma->vm_pgoff > video_buffers){
++		pr_debug("atmel_isi: invalid mmap page offset\n");
++		return -EINVAL;
++	}
++	pfn = isi->video_buffer[vma->vm_pgoff].fb_desc.fb_address >> PAGE_SHIFT;
++
++	ret = remap_pfn_range(vma, vma->vm_start, pfn,
++		vma->vm_end - vma->vm_start, vma->vm_page_prot);
++	if(ret){
++		return ret;
++	}
++	
++	vma->vm_ops = &avr32_isi_vm_ops;
++	vma->vm_flags = VM_DONTEXPAND; /* fixed size */
++	vma->vm_flags |= VM_RESERVED;/* do not swap out */
++	vma->vm_flags |= VM_DONTCOPY;
++	vma->vm_flags |= VM_SHARED;
++	vma->vm_private_data = (void *) buffer;
++	avr32_isi_vm_open(vma);
++
++	pr_debug("atmel_isi: vma start=0x%08lx, size=%ld phys=%ld \n",
++		(unsigned long) vma->vm_start,
++		(unsigned long) vma->vm_end - (unsigned long) vma->vm_start,
++		pfn << PAGE_SHIFT);
++	return 0;
++}
++
++static unsigned int avr32_isi_poll(struct file *file, poll_table *wait)
++{
++	struct atmel_isi_fh *fh = file->private_data;
++	struct atmel_isi *isi = fh->isi;
++	unsigned int ret = 0;
++
++	mutex_lock(&isi->mutex);
++	poll_wait(file, &isi->capture_wq, wait);
++	if(kfifo_len(isi->doneq))
++		ret = POLLIN | POLLRDNORM;
++	mutex_unlock(&isi->mutex);
++
++	return ret;
++}
++
++static int avr32_isi_stream_close (struct inode *inode, struct file *file)
++{
++	struct atmel_isi_fh *fh = file->private_data;
++	struct atmel_isi *isi = fh->isi;
++	u32 cr1;
++
++	mutex_lock(&isi->mutex);
++
++	isi->stream_users--;
++	kfree(fh);
++
++	/* Stop camera and ISI if driver has no users */
++	if(!isi->capture_users) {
++		isi->camera->stop_capture(isi->camera);
++
++		spin_lock_irq(&isi->lock);
++		cr1 = isi_readl(isi, CR1);
++		cr1 |= ISI_BIT(DIS);
++		isi_writel(isi, CR1, cr1);
++		spin_unlock_irq(&isi->lock);
++	}
++
++	mutex_unlock(&isi->mutex);
++
++	return 0;
++}
++
++static int avr32_isi_stream_open (struct inode *inode, struct file *file)
++{
++	struct video_device *vdev = video_devdata(file);
++	struct atmel_isi *isi = to_atmel_isi(vdev);
++	struct atmel_isi_fh *fh;
++	int ret = -EBUSY;
++	unsigned long timeout;
++
++	mutex_lock(&isi->mutex);
++	
++
++	if (isi->stream_users) {
++		pr_debug("%s: open(): device busy\n", vdev->name);
++		goto out;
++	}
++
++	if (!isi->camera) {
++		ret = -ENODEV;
++		isi->camera = avr32_isi_grab_camera(isi);
++		if (!isi->camera)
++			goto out;
++		ret = -EINVAL;
++		ret = avr32_isi_set_camera_input(isi);
++		if(ret)
++			goto out;
++	}
++	avr32_isi_streaming_set_format(isi, &isi->format);
++	kfifo_reset(isi->grabq);
++	kfifo_reset(isi->doneq);
++
++	/*
++	 * Reset the controller and wait for completion. The
++	 * reset will only succeed if we have a pixel clock
++	 * from the camera.
++	 */
++	if(isi->stream_users == 0){
++		
++		init_completion(&isi->reset_complete);
++		isi_writel(isi, IER, ISI_BIT(SOFTRST));
++		isi_writel(isi, CR1, ISI_BIT(RST));
++
++		timeout = wait_for_completion_timeout(&isi->reset_complete,
++			msecs_to_jiffies(100));
++
++		if (timeout == 0) {
++			ret = -ETIMEDOUT;
++			goto out;
++		}
++		isi_writel(isi, IDR, ~0UL);
++	}
++
++	ret = -ENOMEM;
++	fh = kzalloc(sizeof(struct atmel_isi_fh), GFP_KERNEL);
++	if (!fh) {
++		pr_debug("%s: open(): out of memory\n", vdev->name);
++		goto out;
++	}
++
++	fh->isi = isi;
++	file->private_data = fh;
++	isi->stream_users++;
++
++	ret = 0;
++
++out:
++	mutex_unlock(&isi->mutex);
++	return ret;
++}
++
++static void avr32_isi_stream_release (struct video_device *vdev)
++{
++	struct atmel_isi *isi = to_atmel_isi(vdev);
++	pr_debug("%s: release\n", vdev->name);
++	kfree(isi);
++}
++
++/* -----------------------------------------------------------------------*/
++
++/* Streaming v4l2 device file operations */
++static struct file_operations avr32_isi_streaming_fops = {
++	.owner		= THIS_MODULE,
++	.ioctl		= video_ioctl2,
++	.open		= avr32_isi_stream_open,
++	.release	= avr32_isi_stream_close,
++	.mmap		= avr32_isi_mmap,
++	.poll		= avr32_isi_poll,
++};
++
++/* Capture v4l2 device file operations */
++static struct file_operations avr32_isi_capture_fops = {
++	.owner		= THIS_MODULE,
++	.open		= avr32_isi_capture_open,
++	.release	= avr32_isi_capture_close,
++	.read		= avr32_isi_capture_read,
++	.ioctl		= video_ioctl2,
++};
++
++static int __exit avr32_isi_remove(struct platform_device *pdev)
++{
++	struct atmel_isi *isi = platform_get_drvdata(pdev);
++	int i;
++
++	if (isi->camera)
++		isi->camera->stop_capture(isi->camera);
++
++	if (isi->camera)
++		avr32_isi_release_camera(isi, isi->camera);
++	video_unregister_device(&isi->cdev);
++	video_unregister_device(&isi->vdev);
++
++	platform_set_drvdata(pdev, NULL);
++
++	/* release capture buffer */
++	dma_free_coherent(&pdev->dev, capture_buffer_size,
++			  isi->capture_buf, isi->capture_phys);
++
++	/* release frame buffers */
++	for(i = 0; i < video_buffers; i++){
++		dma_free_coherent(&pdev->dev, 
++			video_buffer_size,
++			isi->video_buffer[i].frame_buffer,
++			isi->video_buffer[i].fb_desc.fb_address);
++	}
++
++	kfifo_free(isi->doneq);
++	kfifo_free(isi->grabq);
++	
++	free_irq(isi->irq, isi);
++	iounmap(isi->regs);
++	clk_disable(isi->hclk);
++	clk_disable(isi->pclk);
++	clk_put(isi->hclk);
++	clk_put(isi->pclk);
++
++	/*
++	 * Don't free isi here -- it will be taken care of by the
++	 * release() callback.
++	 */
++
++	return 0;
++}
++
++
++static int __init avr32_isi_probe(struct platform_device *pdev)
++{
++	unsigned int irq;
++	struct atmel_isi *isi;
++	struct clk *pclk, *hclk;
++	struct resource *regs;
++	int ret;
++	int i;
++	int video_bytes_used = video_buffer_size;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if(!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto err_hclk;
++	}
++	clk_enable(pclk);
++	clk_enable(hclk);
++
++	isi = kzalloc(sizeof(struct atmel_isi), GFP_KERNEL);
++	if(!isi){
++		ret = -ENOMEM;
++		dev_err(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_isi;
++	}
++
++	isi->pclk = pclk;
++	isi->hclk = hclk;
++
++	/* Round up buffer sizes to the next page if needed */
++	video_buffer_size = PAGE_ALIGN(video_buffer_size);
++	capture_buffer_size = PAGE_ALIGN(capture_buffer_size);
++
++	spin_lock_init(&isi->lock);
++	mutex_init(&isi->mutex);
++	init_waitqueue_head(&isi->capture_wq);
++	
++	/* Initialize v4l2 capture device */
++	isi->cdev.fops = &avr32_isi_capture_fops;
++	strcpy(isi->cdev.name, "atmel_isi_capture");
++	isi->cdev.type = VFL_TYPE_GRABBER;
++	isi->cdev.type2 = VID_TYPE_CAPTURE;
++	isi->cdev.minor = -1;
++	isi->cdev.release =avr32_isi_capture_release;
++	isi->cdev.vidioc_querycap = avr32_isi_capture_querycap;
++	isi->cdev.vidioc_enum_fmt_cap = avr32_isi_capture_enum_fmt_cap;
++	isi->cdev.vidioc_try_fmt_cap = avr32_isi_capture_try_fmt_cap;
++	isi->cdev.vidioc_g_fmt_cap = avr32_isi_capture_g_fmt_cap;
++	isi->cdev.vidioc_s_fmt_cap = avr32_isi_capture_s_fmt_cap;
++	isi->cdev.vidioc_enum_input = avr32_isi_capture_enum_input;
++	isi->cdev.vidioc_g_input = avr32_isi_capture_g_input;
++	isi->cdev.vidioc_s_input = avr32_isi_capture_s_input;
++#ifdef DEBUG
++	isi->cdev.debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG;
++#endif
++
++	/* Initialize v4l2 streaming device */
++	isi->vdev.fops = &avr32_isi_streaming_fops;
++	strcpy(isi->vdev.name, "atmel-isi");
++	isi->vdev.type = VFL_TYPE_GRABBER;
++	isi->vdev.type2 = VID_TYPE_CAPTURE;
++	isi->vdev.minor = -1;
++	isi->vdev.release = avr32_isi_stream_release;
++#ifdef DEBUG
++	isi->vdev.debug = V4L2_DEBUG_IOCTL | V4L2_DEBUG_IOCTL_ARG;
++#endif
++
++	isi->vdev.vidioc_querycap = avr32_isi_querycap;
++	isi->vdev.vidioc_enum_fmt_cap = avr32_isi_enum_fmt_cap;
++	isi->vdev.vidioc_try_fmt_cap = avr32_isi_try_fmt_cap;
++	isi->vdev.vidioc_g_fmt_cap = avr32_isi_g_fmt_cap;
++	isi->vdev.vidioc_s_fmt_cap = avr32_isi_s_fmt_cap;
++	isi->vdev.vidioc_enum_input = avr32_isi_enum_input;
++	isi->vdev.vidioc_g_input = avr32_isi_g_input;
++	isi->vdev.vidioc_s_input = avr32_isi_s_input;
++	isi->vdev.vidioc_queryctrl = avr32_isi_queryctrl;
++	isi->vdev.vidioc_g_ctrl = avr32_isi_g_ctrl;
++	isi->vdev.vidioc_s_ctrl = avr32_isi_s_ctrl;
++	isi->vdev.vidioc_querybuf = avr32_isi_querybuf;
++	isi->vdev.vidioc_reqbufs = avr32_isi_reqbufs;
++	isi->vdev.vidioc_qbuf = avr32_isi_qbuf;
++	isi->vdev.vidioc_dqbuf = avr32_isi_dqbuf;
++	isi->vdev.vidioc_streamon = avr32_isi_streamon;
++	isi->vdev.vidioc_streamoff = avr32_isi_streamoff;
++
++	isi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++        if (!isi->regs) {
++		ret = -ENOMEM;
++		goto err_ioremap;
++	}
++
++	irq = platform_get_irq(pdev,0);
++	ret = request_irq(irq, isi_interrupt, 0, "isi", isi);
++	if (ret) {
++		dev_err(&pdev->dev, "unable to request irq %d\n", irq);
++		goto err_req_irq;
++	}
++	isi->irq = irq;
++
++	/* Allocate ISI capture buffer */
++	isi->capture_buf = dma_alloc_coherent(&pdev->dev,
++					      capture_buffer_size,
++					      &isi->capture_phys,
++					      GFP_KERNEL);
++	if (!isi->capture_buf) {
++		ret = -ENOMEM;
++		dev_err(&pdev->dev, "failed to allocate capture buffer\n");
++		goto err_alloc_cbuf;
++	}
++
++	/* Allocate and initialize video buffers */
++	for(i=0;i < video_buffers; i++){
++		memset(&isi->video_buffer[i], 0, sizeof(struct frame_buffer));
++		isi->video_buffer[i].frame_buffer = 
++			dma_alloc_coherent(&pdev->dev,
++				video_buffer_size,
++				(dma_addr_t *)
++				&(isi->video_buffer[i].fb_desc.fb_address),
++				GFP_KERNEL);
++		if(!isi->video_buffer[i].frame_buffer){
++			ret = -ENOMEM;
++			dev_err(&pdev->dev, 
++				"failed to allocate video buffer\n");
++			goto err_alloc_vbuf;
++		}
++		
++		isi->video_buffer[i].bytes_used = video_bytes_used;
++		isi->video_buffer[i].status = FRAME_UNUSED;
++		isi->video_buffer[i].index = i;
++
++#ifdef DEBUG
++	/* Put some color into the buffers */
++	/*
++		memset(isi->video_buffer[i].frame_buffer, (i*4)%0xFF, 
++			video_buffer_size); 
++			*/
++#endif
++	}
++	/* set up frame buffer descriptor list for ISI module*/
++	/* FIXME 
++	isi->fbd_list_start = dma_map_single(&pdev->dev,
++		&isi->video_buffer[0].fb_desc,
++		sizeof(struct fbd),
++		DMA_NONE);
++		*/
++	isi->fbd_list_start = __pa(&isi->video_buffer[0].fb_desc);
++	for(i=0; i < (video_buffers - 1); i++){
++		isi->video_buffer[i].fb_desc.next_fbd_address =
++		/*
++			dma_map_single(&pdev->dev, 
++				&isi->video_buffer[i+1].fb_desc,
++				sizeof(struct fbd),
++				DMA_NONE);*/
++			__pa(&isi->video_buffer[i+1]);
++	}
++	/* FIXME
++	 * isi->video_buffer[i].fb_desc.next_fbd_address =
++	 * 	isi->fbd_list_start;
++	 */
++	isi->video_buffer[i].fb_desc.next_fbd_address = 
++		__pa(&isi->video_buffer[0]);
++	
++#ifdef DEBUG
++	for(i=0;i < video_buffers; i++){
++		pr_debug("atmel_isi: fbd at %08lx video buffer at \
++phys addr %08lx \n", __pa(&isi->video_buffer[i]),
++		(unsigned long) isi->video_buffer[i].fb_desc.fb_address);
++	}
++#endif
++	dev_info(&pdev->dev,
++		 "capture buffer: %d bytes at %p (phys 0x%08x)\n",
++		 capture_buffer_size, isi->capture_buf,
++		 isi->capture_phys);
++	
++	spin_lock_init(&isi->grabq_lock);
++	isi->grabq = kfifo_alloc(sizeof(int) * video_buffers, GFP_KERNEL,
++		&isi->grabq_lock);
++	if(IS_ERR(isi->grabq)){
++		dev_err(&pdev->dev, "fifo allocation failed\n");
++		goto err_fifo_alloc1;
++	}
++	spin_lock_init(&isi->doneq_lock);
++	isi->doneq = kfifo_alloc(sizeof(int) * video_buffers, GFP_KERNEL,
++		&isi->doneq_lock);
++	if(IS_ERR(isi->doneq)){
++		dev_err(&pdev->dev, "fifo allocation failed\n");
++		goto err_fifo_alloc2;
++	}
++
++	isi_writel(isi, CR1, ISI_BIT(DIS));
++	
++	ret = video_register_device(&isi->cdev, VFL_TYPE_GRABBER, -1);
++	if(ret)
++		goto err_register1;
++
++	ret = video_register_device(&isi->vdev, VFL_TYPE_GRABBER, -1);
++	if (ret)
++		goto err_register2;
++
++	platform_set_drvdata(pdev, isi);
++
++	dev_info(&pdev->dev, "Atmel ISI V4L2 device at 0x%08lx\n",
++		 (unsigned long)regs->start);
++
++	return 0;
++
++err_register2:
++	video_unregister_device(&isi->cdev);
++err_register1:
++	kfifo_free(isi->doneq);
++err_fifo_alloc2:
++	kfifo_free(isi->grabq);
++err_fifo_alloc1:
++err_alloc_vbuf:
++	while(i--)
++		dma_free_coherent(&pdev->dev, video_buffer_size,
++				isi->video_buffer[i].frame_buffer,
++				isi->video_buffer[i].fb_desc.fb_address);
++	dma_free_coherent(&pdev->dev, capture_buffer_size,
++				isi->capture_buf,
++				isi->capture_phys);
++err_alloc_cbuf:
++        free_irq(isi->irq, isi);
++err_req_irq:
++	iounmap(isi->regs);
++err_ioremap:
++	kfree(isi);
++err_alloc_isi:
++	clk_disable(hclk);
++	clk_disable(pclk);
++	clk_put(hclk);
++err_hclk:
++	clk_put(pclk);
++
++	return ret;
++
++}
++
++static struct platform_driver avr32_isi_driver = {
++	.probe		= avr32_isi_probe,
++	.remove		= __exit_p(avr32_isi_remove),
++	.driver		= {
++		.name = "atmel_isi",
++		.owner = THIS_MODULE,
++	},
++};
++
++static int __init avr32_isi_init(void)
++{
++	return platform_driver_probe(&avr32_isi_driver, &avr32_isi_probe);
++
++/*FIXME	return  platform_driver_register(&avr32_isi_driver);*/
++}
++
++
++static void __exit avr32_isi_exit(void)
++{
++	platform_driver_unregister(&avr32_isi_driver);
++}
++
++
++module_init(avr32_isi_init);
++module_exit(avr32_isi_exit);
++
++MODULE_AUTHOR("Lars Häring <lharing@atmel.com>");
++MODULE_DESCRIPTION("The V4L2 driver for AVR32 Linux");
++MODULE_LICENSE("GPL");
++MODULE_SUPPORTED_DEVICE("video");
+diff --git a/drivers/media/video/atmel-isi.h b/drivers/media/video/atmel-isi.h
+new file mode 100644
+index 0000000..2aa3c14
+--- /dev/null
++++ b/drivers/media/video/atmel-isi.h
+@@ -0,0 +1,252 @@
++/*
++ * Register definitions for the Atmel Image Sensor Interface.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_ISI_H__
++#define __ASM_AVR32_ISI_H__
++
++#include <linux/videodev2.h>
++
++/* ISI register offsets */
++#define ISI_CR1					0x0000
++#define ISI_CR2					0x0004
++#define ISI_SR					0x0008
++#define ISI_IER					0x000c
++#define ISI_IDR					0x0010
++#define ISI_IMR					0x0014
++#define ISI_PSIZE				0x0020
++#define ISI_PDECF				0x0024
++#define ISI_PPFBD				0x0028
++#define ISI_CDBA				0x002c
++#define ISI_Y2R_SET0				0x0030
++#define ISI_Y2R_SET1				0x0034
++#define ISI_R2Y_SET0				0x0038
++#define ISI_R2Y_SET1				0x003c
++#define ISI_R2Y_SET2				0x0040
++
++/* Bitfields in CR1 */
++#define ISI_RST_OFFSET				0
++#define ISI_RST_SIZE				1
++#define ISI_DIS_OFFSET				1
++#define ISI_DIS_SIZE				1
++#define ISI_HSYNC_POL_OFFSET			2
++#define ISI_HSYNC_POL_SIZE			1
++#define ISI_VSYNC_POL_OFFSET			3
++#define ISI_VSYNC_POL_SIZE			1
++#define ISI_PIXCLK_POL_OFFSET			4
++#define ISI_PIXCLK_POL_SIZE			1
++#define ISI_EMB_SYNC_OFFSET			6
++#define ISI_EMB_SYNC_SIZE			1
++#define ISI_CRC_SYNC_OFFSET			7
++#define ISI_CRC_SYNC_SIZE			1
++#define ISI_FRATE_OFFSET			8
++#define ISI_FRATE_SIZE				3
++#define ISI_FULL_OFFSET				12
++#define ISI_FULL_SIZE				1
++#define ISI_THMASK_OFFSET			13
++#define ISI_THMASK_SIZE				2
++#define ISI_CODEC_ON_OFFSET			15
++#define ISI_CODEC_ON_SIZE			1
++#define ISI_SLD_OFFSET				16
++#define ISI_SLD_SIZE				8
++#define ISI_SFD_OFFSET				24
++#define ISI_SFD_SIZE				8
++
++/* Bitfields in CR2 */
++#define ISI_IM_VSIZE_OFFSET			0
++#define ISI_IM_VSIZE_SIZE			11
++#define ISI_GS_MODE_OFFSET			11
++#define ISI_GS_MODE_SIZE			1
++#define ISI_RGB_MODE_OFFSET			12
++#define ISI_RGB_MODE_SIZE			1
++#define ISI_GRAYSCALE_OFFSET			13
++#define ISI_GRAYSCALE_SIZE			1
++#define ISI_RGB_SWAP_OFFSET			14
++#define ISI_RGB_SWAP_SIZE			1
++#define ISI_COL_SPACE_OFFSET			15
++#define ISI_COL_SPACE_SIZE			1
++#define ISI_IM_HSIZE_OFFSET			16
++#define ISI_IM_HSIZE_SIZE			11
++#define ISI_YCC_SWAP_OFFSET			28
++#define ISI_YCC_SWAP_SIZE			2
++#define ISI_RGB_CFG_OFFSET			30
++#define ISI_RGB_CFG_SIZE			2
++
++/* Bitfields in SR */
++#define ISI_CDC_STATUS_OFFSET			3
++#define ISI_CDC_STATUS_SIZE			1
++
++/* Bitfields in SR/IER/IDR/IMR */
++#define ISI_SOF_OFFSET				0
++#define ISI_SOF_SIZE				1
++#define ISI_SOFTRST_OFFSET			2
++#define ISI_SOFTRST_SIZE			1
++#define ISI_CRC_ERR_OFFSET			4
++#define ISI_CRC_ERR_SIZE			1
++#define ISI_FO_C_OVF_OFFSET			5
++#define ISI_FO_C_OVF_SIZE			1
++#define ISI_FO_P_OVF_OFFSET			6
++#define ISI_FO_P_OVF_SIZE			1
++#define ISI_FO_P_EMP_OFFSET			7
++#define ISI_FO_P_EMP_SIZE			1
++#define ISI_FO_C_EMP_OFFSET			8
++#define ISI_FO_C_EMP_SIZE			1
++#define ISI_FR_OVR_OFFSET			9
++#define ISI_FR_OVR_SIZE				1
++
++/* Bitfields in PSIZE */
++#define ISI_PREV_VSIZE_OFFSET			0
++#define ISI_PREV_VSIZE_SIZE			10
++#define ISI_PREV_HSIZE_OFFSET			16
++#define ISI_PREV_HSIZE_SIZE			10
++
++/* Bitfields in PCDEF */
++#define ISI_DEC_FACTOR_OFFSET			0
++#define ISI_DEC_FACTOR_SIZE			8
++
++/* Bitfields in PPFBD */
++#define ISI_PREV_FBD_ADDR_OFFSET		0
++#define ISI_PREV_FBD_ADDR_SIZE			32
++
++/* Bitfields in CDBA */
++#define ISI_CODEC_DMA_ADDR_OFFSET		0
++#define ISI_CODEC_DMA_ADDR_SIZE			32
++
++/* Bitfields in Y2R_SET0 */
++#define ISI_Y2R_SET0_C3_OFFSET			24
++#define ISI_Y2R_SET0_C3_SIZE			8
++
++/* Bitfields in Y2R_SET1 */
++#define ISI_Y2R_SET1_C4_OFFSET			0
++#define ISI_Y2R_SET1_C4_SIZE			9
++#define ISI_YOFF_OFFSET				12
++#define ISI_YOFF_SIZE				1
++#define ISI_CROFF_OFFSET			13
++#define ISI_CROFF_SIZE				1
++#define ISI_CBOFF_OFFSET			14
++#define ISI_CBOFF_SIZE				1
++
++/* Bitfields in R2Y_SET0 */
++#define ISI_C0_OFFSET				0
++#define ISI_C0_SIZE				8
++#define ISI_C1_OFFSET				8
++#define ISI_C1_SIZE				8
++#define ISI_C2_OFFSET				16
++#define ISI_C2_SIZE				8
++#define ISI_ROFF_OFFSET				24
++#define ISI_ROFF_SIZE				1
++
++/* Bitfields in R2Y_SET1 */
++#define ISI_R2Y_SET1_C3_OFFSET			0
++#define ISI_R2Y_SET1_C3_SIZE			8
++#define ISI_R2Y_SET1_C4_OFFSET			8
++#define ISI_R2Y_SET1_C4_SIZE			8
++#define ISI_C5_OFFSET				16
++#define ISI_C5_SIZE				8
++#define ISI_GOFF_OFFSET				24
++#define ISI_GOFF_SIZE				1
++
++/* Bitfields in R2Y_SET2 */
++#define ISI_C6_OFFSET				0
++#define ISI_C6_SIZE				8
++#define ISI_C7_OFFSET				8
++#define ISI_C7_SIZE				8
++#define ISI_C8_OFFSET				16
++#define ISI_C8_SIZE				8
++#define ISI_BOFF_OFFSET				24
++#define ISI_BOFF_SIZE				1
++
++/* Constants for FRATE */
++#define ISI_FRATE_CAPTURE_ALL			0
++
++/* Constants for YCC_SWAP */
++#define ISI_YCC_SWAP_DEFAULT			0
++#define ISI_YCC_SWAP_MODE_1			1
++#define ISI_YCC_SWAP_MODE_2			2
++#define ISI_YCC_SWAP_MODE_3			3
++
++/* Constants for RGB_CFG */
++#define ISI_RGB_CFG_DEFAULT			0
++#define ISI_RGB_CFG_MODE_1			1
++#define ISI_RGB_CFG_MODE_2			2
++#define ISI_RGB_CFG_MODE_3			3
++
++/* Bit manipulation macros */
++#define ISI_BIT(name)					\
++	(1 << ISI_##name##_OFFSET)
++#define ISI_BF(name,value)				\
++	(((value) & ((1 << ISI_##name##_SIZE) - 1))	\
++	 << ISI_##name##_OFFSET)
++#define ISI_BFEXT(name,value)				\
++	(((value) >> ISI_##name##_OFFSET)		\
++	 & ((1 << ISI_##name##_SIZE) - 1))
++#define ISI_BFINS(name,value,old)			\
++	(((old) & ~(((1 << ISI_##name##_SIZE) - 1)	\
++		    << ISI_##name##_OFFSET))\
++	 | ISI_BF(name,value))
++
++/* Register access macros */
++#define isi_readl(port,reg)				\
++	__raw_readl((port)->regs + ISI_##reg)
++#define isi_writel(port,reg,value)			\
++	__raw_writel((value), (port)->regs + ISI_##reg)
++
++#define ATMEL_V4L2_VID_FLAGS ( V4L2_CAP_VIDEO_OUTPUT )
++
++struct atmel_isi;
++
++enum atmel_isi_pixfmt {
++	ATMEL_ISI_PIXFMT_GREY,		/* Greyscale */
++	ATMEL_ISI_PIXFMT_CbYCrY,
++	ATMEL_ISI_PIXFMT_CrYCbY,
++	ATMEL_ISI_PIXFMT_YCbYCr,
++	ATMEL_ISI_PIXFMT_YCrYCb,
++	ATMEL_ISI_PIXFMT_RGB24,
++	ATMEL_ISI_PIXFMT_BGR24,
++	ATMEL_ISI_PIXFMT_RGB16,
++	ATMEL_ISI_PIXFMT_BGR16,
++	ATMEL_ISI_PIXFMT_GRB16,		/* G[2:0] R[4:0]/B[4:0] G[5:3] */
++	ATMEL_ISI_PIXFMT_GBR16,		/* G[2:0] B[4:0]/R[4:0] G[5:3] */
++	ATMEL_ISI_PIXFMT_RGB24_REV,
++	ATMEL_ISI_PIXFMT_BGR24_REV,
++	ATMEL_ISI_PIXFMT_RGB16_REV,
++	ATMEL_ISI_PIXFMT_BGR16_REV,
++	ATMEL_ISI_PIXFMT_GRB16_REV,	/* G[2:0] R[4:0]/B[4:0] G[5:3] */
++	ATMEL_ISI_PIXFMT_GBR16_REV,	/* G[2:0] B[4:0]/R[4:0] G[5:3] */
++};
++
++struct atmel_isi_format {
++	struct v4l2_pix_format pix;
++	enum atmel_isi_pixfmt input_format;
++};
++
++struct atmel_isi_camera {
++	const char		*name;
++	struct module		*owner;
++	struct list_head	list;
++	unsigned int		hsync_act_low:1;
++	unsigned int		vsync_act_low:1;
++	unsigned int		pclk_act_falling:1;
++	unsigned int		has_emb_sync:1;
++	/* ISI supports up to 17 formats */
++	unsigned int		pixelformats[17];
++	int (*get_format)(struct atmel_isi_camera *cam,
++			  struct atmel_isi_format *fmt);
++	int (*set_format)(struct atmel_isi_camera *cam,
++			  struct atmel_isi_format *fmt);
++	int (*start_capture)(struct atmel_isi_camera *cam);
++	int (*stop_capture)(struct atmel_isi_camera *cam);
++	struct atmel_isi	*isi;
++};
++
++extern int atmel_isi_register_camera(struct atmel_isi_camera *cam);
++extern void atmel_isi_unregister_camera(struct atmel_isi_camera *cam);
++
++
++#endif /* __ASM_AVR32_ISI_H__ */
++
+diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
+index 7558484..a8cdf42 100644
+--- a/drivers/media/video/Kconfig
++++ b/drivers/media/video/Kconfig
+@@ -13,6 +13,20 @@ menuconfig VIDEO_CAPTURE_DRIVERS
+ 
+ if VIDEO_CAPTURE_DRIVERS && VIDEO_DEV
+ 
++config VIDEO_AVR32_ISI
++	tristate "AVR32 video support"
++	depends on VIDEO_DEV
++	---help---
++	  This module makes the AVR32 Image Sensor Interface available 
++
++config VIDEO_MT9M112
++	tristate "Micron MT9M112 camera"
++	default n
++	depends on VIDEO_AVR32_ISI && I2C
++	---help---
++	 This will add support for the Micron MT9M112 camera.
++	  as a v4l2 device.
++
+ config VIDEO_ADV_DEBUG
+ 	bool "Enable advanced debug functionality"
+ 	default n
+diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
+index 78e38d0..3156969 100644
+--- a/drivers/media/video/Makefile
++++ b/drivers/media/video/Makefile
+@@ -77,7 +77,8 @@ obj-$(CONFIG_VIDEO_HEXIUM_ORION) += hexium_orion.o
+ obj-$(CONFIG_VIDEO_HEXIUM_GEMINI) += hexium_gemini.o
+ obj-$(CONFIG_VIDEO_DPC) += dpc7146.o
+ obj-$(CONFIG_TUNER_3036) += tuner-3036.o
+ obj-$(CONFIG_VIDEO_AVR32_ISI) += atmel-isi.o
++obj-$(CONFIG_VIDEO_MT9M112) += tm13m3.o
+ 
+ obj-$(CONFIG_VIDEO_TUNER) += tuner.o
+ obj-$(CONFIG_VIDEO_BUF)   += video-buf.o
+diff --git a/drivers/media/video/tm13m3.c b/drivers/media/video/tm13m3.c
+new file mode 100644
+index 0000000..42f0fd3
+--- /dev/null
++++ b/drivers/media/video/tm13m3.c
+@@ -0,0 +1,631 @@
++/*
++ * Micron Mt9M112 camera driver.
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++//#define DEBUG
++
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/device.h>
++#include <linux/list.h>
++#include <linux/delay.h>
++#include <linux/i2c.h>
++
++#include <linux/err.h>
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
++#include <asm/arch/at32ap700x.h>
++
++#include "atmel-isi.h"
++
++/* camera standby pin */
++#define CAM_STANDBY GPIO_PIN_PA(9) 
++/* camera reset pin */
++#define CAM_RESET GPIO_PIN_PA(8)
++
++/*! Maximum number of pixels in a row */
++#define TM13M3_MAX_WIDTH	1280
++/*! Maximum number of rows */
++#define TM13M3_MAX_HEIGHT	1024
++
++/*! Clock for image sensor CLKIN signal */
++static char mclk_name[32] = "gclk0";
++/*! Parent clock of gclk0 
++ *  Either osc0 or pll0
++ *  We use osc0 with 20MHz quarz.
++ */
++static char mclk_parent_name[32] = "osc0";
++
++static struct clk *mclk;
++static struct clk *mclk_parent;
++module_param_string(mclk, mclk_name, sizeof(mclk_name), 0644);
++MODULE_PARM_DESC(mclk, "Name of the clock used as camera clock input");
++
++module_param_string(mclk_parent, mclk_parent_name,
++		    sizeof(mclk_parent_name), 0644);
++MODULE_PARM_DESC(mclk, "Name of mclk parent clock");
++
++
++/* Register adresses */
++#define CHIP_VERSION		0x0
++#define PROGRAM_CONTROL		0x2CC
++#define READ_MODE_CONTEXT_B	0x20
++#define CONTEXT_CONTROL		0xC8
++#define COLUMN_WIDTH		0x4
++#define HORIZONTAL_OUTPUT_SIZE_B	0x1A1
++#define VERTICAL_OUTPUT_SIZE_B	0x1A4
++#define ROW_WIDTH		0x3
++#define PAGE_MAP		0xF0
++#define OUTPUT_FORMAT_CONTROL_A	0x13A
++#define HORIZONTAL_ZOOM	0x1A6
++#define VERTICAL_ZOOM	0x1A9
++#define PLL_CONTROL_1	0x66
++#define PLL_CONTROL_2	0x67
++#define CLOCK_CONTROL	0x65
++
++/* Chip ID stored in CHIP_VERSION register */
++#define MT9M112_CHIP_ID 0x148C
++/* I2C address of camera module */
++#define I2C_TM13M3	0x5D
++
++static unsigned short normal_i2c[] = {
++	I2C_TM13M3,
++	I2C_CLIENT_END
++};
++I2C_CLIENT_INSMOD;
++
++#ifdef CONFIG_DEBUG_FS
++struct reg_dbg {
++	struct tm13m3 *is;
++	struct dentry *dentry;
++	unsigned int offset;
++};
++#endif
++
++struct tm13m3 {
++	struct mutex		mutex;
++	u16			current_page;
++	u32			current_format;
++	u16			pll_avr_ctrl;
++	struct clk		*mclk;
++	struct i2c_client	client;
++	struct atmel_isi_camera	cam;
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct reg_dbg		debugfs_reg[37];
++#endif
++};
++
++
++#define to_tm13m3(cam) container_of(cam, struct tm13m3, cam)
++
++static struct i2c_driver tm13m3_driver;
++
++static int tm13m3_write_16(struct tm13m3 *is, u16 reg, u16 value)
++{
++	int ret = 0;
++	u16 register_page = 0;
++
++	register_page = reg >> 8;
++
++	if ((register_page  !=  is->current_page)
++		&& (reg != PAGE_MAP)){
++
++		if( 0 <= (ret = i2c_smbus_write_word_data(&is->client, PAGE_MAP, cpu_to_le16(register_page))))
++			is->current_page = register_page;
++	} 
++
++	if(ret >= 0){
++		ret = i2c_smbus_write_word_data(&is->client, (u8) reg, cpu_to_le16(value));
++	}
++	return ret;
++}
++
++static int tm13m3_read_16(struct tm13m3 *is, u16 reg)
++{
++	int ret = 0;
++	u16 register_page = 0;
++
++	register_page = reg >> 8;
++
++	if ((register_page  !=  is->current_page)
++		&& (reg != PAGE_MAP)){
++
++		if( 0 <= (ret = i2c_smbus_write_word_data(&is->client, PAGE_MAP, cpu_to_le16(register_page))))
++			is->current_page = register_page;
++	} 
++
++if(ret >=  0){
++		ret = i2c_smbus_read_word_data(&is->client, (u8) reg);
++	}
++
++	if (ret < 0)
++		return -EIO;
++
++	return le16_to_cpu(ret);
++}
++
++#ifdef CONFIG_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/uaccess.h>
++
++struct tm13m3_reg {
++	u16 address;
++	const char *name;
++};
++
++static struct tm13m3_reg tm13m3_registers[38] = {
++	{ .address = CHIP_VERSION, .name = "chip_version"},
++	{ .address = 0x1, .name = "row_start"},
++	{ .address = 0x2, .name = "column_start"},
++	{ .address = 0x3, .name = "row_width"},
++	{ .address = 0x4, .name = "column_width"},
++	{ .address = 0x5, .name = "horizontal_blanking_b"},
++	{ .address = 0x6, .name = "vertical_blanking_b"},
++	{ .address = 0x7, .name = "horizontal_blanking_a"},
++	{ .address = 0x8, .name = "vertical_blanking_a"},
++	{ .address = 0x0D, .name = "reset"},
++	{ .address = 0x20, .name = "read_mode_context_b"},
++	{ .address = 0x21, .name = "read_mode_context_a"},
++	{ .address = 0x22, .name = "dark_col_row"},
++	{ .address = 0x65, .name = "clock_control"},
++	{ .address = 0x66, .name = "pll_control_1"},
++	{ .address = 0x67, .name = "pll_control_2"},
++	{ .address = 0xC8, .name = "context_control"},
++	{ .address = 0x106, .name = "mode_control"},
++	{ .address = 0x108, .name = "format_control"},
++	{ .address = 0x13A, .name = "output_format_control_a"},
++	{ .address = 0x148, .name = "test_pattern_generator"},
++	{ .address = 0x19B, .name = "output_format_control_b"},
++	{ .address = 0x1A1, .name = "horizontal_output_size_b"},
++	{ .address = 0x1A4, .name = "vertical_output_size_b"},
++	{ .address = 0x1A5, .name = "horizontal_pan"},
++	{ .address = 0x1A6, .name = "horizontal_zoom"},
++	{ .address = 0x1A7, .name = "horizontal_output_size_a"},
++	{ .address = 0x1A8, .name = "vertical_pan"},
++	{ .address = 0x1A9, .name = "vertical_zoom"},
++	{ .address = 0x1AA, .name = "vertical_output_size_a"},
++	{ .address = 240,  .name = "page_map"},
++	{ .address = 0x2C8, .name = "global_context_control"},
++	{ .address = 0x2CB, .name = "program_advance"},
++	{ .address = 0x2CC, .name = "program_control"},
++	{ .address = 0x2D2, .name = "default_program_conf"},
++	{ .address = 0x2D3, .name = "user_global_context_control"},
++	{ .address = (0x100 | 0), .name = "module_id"},
++	{ .address = (0x200 | 2), .name = "mode_control"},
++};
++
++static u64 reg_dbg_get(void *data)
++{
++	struct reg_dbg *reg = data;
++	int ret = 0;
++
++	mutex_lock(&reg->is->mutex);	
++	ret = tm13m3_read_16(reg->is, tm13m3_registers[reg->offset].address);
++	mutex_unlock(&reg->is->mutex);
++
++	if (ret < 0) {
++		printk("%s: failed to read reg 0x%02x: %d\n",
++		       reg->is->cam.name, 
++		       tm13m3_registers[reg->offset].address, ret);
++		return ~0ULL;
++	}
++	return ret;
++}
++
++static void reg_dbg_set(void *data, u64 val)
++{
++	struct reg_dbg *reg = data;
++	int ret = 0;
++	
++	mutex_lock(&reg->is->mutex);
++	ret = tm13m3_write_16(reg->is, tm13m3_registers[reg->offset].address, (u16) val);
++	mutex_unlock(&reg->is->mutex);
++
++	if (ret < 0){
++		printk("%s: failed to write reg 0x%02x: %d\n",
++			reg->is->cam.name,
++			tm13m3_registers[reg->offset].address, ret);
++	}
++}
++DEFINE_SIMPLE_ATTRIBUTE(reg_dbg_fops, reg_dbg_get, reg_dbg_set, "%04llx\n");
++
++static void tm13m3_init_debugfs(struct tm13m3 *is)
++{
++	struct dentry *root, *reg;
++	unsigned int i;
++
++	root = debugfs_create_dir(is->cam.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	is->debugfs_root = root;
++
++	for (i = 0; i < ARRAY_SIZE(is->debugfs_reg); i++) {
++		if (!tm13m3_registers[i].name)
++			continue;
++
++		is->debugfs_reg[i].is = is;
++		is->debugfs_reg[i].offset = i;
++
++		reg = debugfs_create_file(tm13m3_registers[i].name, S_IRUGO | S_IWUSR,
++					  root, &is->debugfs_reg[i],
++					  &reg_dbg_fops);
++		if (!reg)
++			goto err_reg;
++		is->debugfs_reg[i].dentry = reg;
++	}
++
++	return;
++
++err_reg:
++	while (i--)
++		debugfs_remove(is->debugfs_reg[i].dentry);
++	debugfs_remove(root);
++err_root:
++	is->debugfs_root = NULL;
++	printk(KERN_ERR "%s: failed to initialize debugfs\n",
++	       is->cam.name);
++}
++
++static void tm13m3_cleanup_debugfs(struct tm13m3 *is)
++{
++	unsigned int i;
++
++	if (is->debugfs_root) {
++		for (i = 0; i < ARRAY_SIZE(is->debugfs_reg); i++)
++			debugfs_remove(is->debugfs_reg[i].dentry);
++		debugfs_remove(is->debugfs_root);
++	}
++}
++#else
++static inline void tm13m3_init_debugfs(struct tm13m3 *is)
++{
++
++}
++
++static inline void tm13m3_cleanup_debugfs(struct tm13m3 *is)
++{
++
++}
++#endif /* CONFIG_DEBUG_FS */
++
++static int tm13m3_get_format(struct atmel_isi_camera *cam,
++			   struct atmel_isi_format *fmt)
++{
++	struct tm13m3 *is = to_tm13m3(cam);
++	int ret = 0;
++
++	fmt->pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
++	fmt->input_format = ATMEL_ISI_PIXFMT_CbYCrY;
++	fmt->input_format = is->current_format;
++
++	fmt->pix.width = 320;
++	fmt->pix.height = 240;
++
++	return ret;
++}
++
++static int tm13m3_set_format(struct atmel_isi_camera *cam,
++			   struct atmel_isi_format *fmt)
++{
++	struct tm13m3 *is = to_tm13m3(cam);
++	int ret = 0;
++
++	fmt->pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
++/*
++	switch(fmt->input_format){
++	case ATMEL_ISI_PIXFMT_CbYCrY:
++		is->current_format = ATMEL_ISI_PIXFMT_CbYCrY;
++		break;	
++	case ATMEL_ISI_PIXFMT_YCbYCr:
++		is->current_format = ATMEL_ISI_PIXFMT_YCbYCr;
++		break;
++	case ATMEL_ISI_PIXFMT_CrYCbY:
++		is->current_format = ATMEL_ISI_PIXFMT_CrYCbY;
++		break;
++	case ATMEL_ISI_PIXFMT_YCrYCb:
++		is->current_format = ATMEL_ISI_PIXFMT_YCrYCb;
++		break;
++	default:
++		// force a valid format
++		fmt->input_format = ATMEL_ISI_PIXFMT_CbYCrY;
++		is->current_format = ATMEL_ISI_PIXFMT_CbYCrY;
++		pr_debug("%s: Not supported format, forcing default format\n",
++			cam->name);
++		break;
++	}
++*/
++	fmt->input_format = ATMEL_ISI_PIXFMT_CrYCbY;
++	is->current_format = ATMEL_ISI_PIXFMT_CrYCbY;
++
++	/* adjust picture width and height */
++	if (fmt->pix.width > TM13M3_MAX_WIDTH)
++		fmt->pix.width = TM13M3_MAX_WIDTH;
++	if (fmt->pix.height > TM13M3_MAX_HEIGHT)
++		fmt->pix.height = TM13M3_MAX_HEIGHT;
++
++	//tm13m3_write_16(is, COLUMN_WIDTH, fmt->pix.width);
++	//tm13m3_write_16(is, ROW_WIDTH, fmt->pix.height);
++	//tm13m3_write_16(is, HORIZONTAL_ZOOM, fmt->pix.width);
++	//tm13m3_write_16(is, VERTICAL_ZOOM, fmt->pix.height);
++
++	//tm13m3_write_16(is, HORIZONTAL_OUTPUT_SIZE_B, fmt->pix.width);
++	//tm13m3_write_16(is, VERTICAL_OUTPUT_SIZE_B, fmt->pix.height);
++
++	/* FIXME Set context output width needed ??*/
++
++	pr_debug("%s: set_format %ux%u\n", cam->name,
++		 fmt->pix.width, fmt->pix.height);
++	return ret;
++}
++
++static void tm13m3_reset_soft(struct tm13m3 *is)
++{
++	tm13m3_write_16(is, 0x0D, 0x0001);
++	/*FIXME test if toggling is really needed */
++	tm13m3_write_16(is, 0x0D, 0x0000);
++}
++
++static void tm13m3_reset_hardware(struct tm13m3 *is)
++{
++	gpio_set_value(CAM_RESET, 0);
++	//FIXME : set correct reset interval usleep();
++	gpio_set_value(CAM_RESET, 1);
++}
++
++static int tm13m3_start_capture(struct atmel_isi_camera *cam)
++{
++	struct tm13m3 *is = to_tm13m3(cam);
++	int ret = 0;
++
++	return ret;
++}
++
++static int tm13m3_stop_capture(struct atmel_isi_camera *cam)
++{
++	struct tm13m3 *is = to_tm13m3(cam);
++	int ret = 0;
++
++
++	return ret;
++}
++
++static int tm13m3_init_hardware(struct tm13m3 *is)
++{
++	int chip_id;
++
++	tm13m3_reset_hardware(is);
++	/* set register page to reset value*/
++	is->current_page = 0;
++	is->current_format = ATMEL_ISI_PIXFMT_CbYCrY;
++
++	pr_debug("tm13m3: Init sensor\n");
++	/* Try to identify the camera */
++	chip_id = tm13m3_read_16(is, CHIP_VERSION);
++	if (chip_id < 0)
++		return -EIO;
++
++	if (chip_id != MT9M112_CHIP_ID) {
++		printk(KERN_ERR "%s: Unknown chip ID 0x%04x\n",
++		       is->cam.name, chip_id);
++		return -ENODEV;
++	}
++#if 0
++	/* Configure pll for 36,8 MHz with CLKIN = 20MHz
++	 * fout = fclkin * M * 1 /( 2* (N+1) * (P+1))
++	 */
++	/* Set P = 2  */
++	tm13m3_write_16(is, PLL_CONTROL_2, 0x0502);
++	/* M = 22, N = 1*/
++	tm13m3_write_16(is, PLL_CONTROL_1, 0x1601);
++	/* wake up pll*/
++	tm13m3_write_16(is, CLOCK_CONTROL, 0x8000);
++	/* wait until pll has stabilized */
++	mdelay(1);
++	/* set pll as master clock*/
++	tm13m3_write_16(is, CLOCK_CONTROL, 0x0000);
++
++#endif
++	/* Set semi-auto mode program mode*/
++	tm13m3_write_16(is, PROGRAM_CONTROL, 0x0010);
++	/* set context B read mode */
++	tm13m3_write_16(is, READ_MODE_CONTEXT_B, 0x0100);
++	/* switch to read+resize context B */
++	tm13m3_write_16(is, CONTEXT_CONTROL, 0x0408);
++	/* set ITU-R BT.656 codes */
++	tm13m3_write_16(is, OUTPUT_FORMAT_CONTROL_A, 0x0A00);
++	/* set sensor image size */ 
++	tm13m3_write_16(is, HORIZONTAL_ZOOM, 320);
++	tm13m3_write_16(is, VERTICAL_ZOOM, 240);
++	tm13m3_write_16(is, HORIZONTAL_OUTPUT_SIZE_B, 320);
++	tm13m3_write_16(is, VERTICAL_OUTPUT_SIZE_B, 240);
++	tm13m3_write_16(is, COLUMN_WIDTH, 320);
++	tm13m3_write_16(is, ROW_WIDTH, 240);
++	return 0;
++}
++static int tm13m3_detect_client(struct i2c_adapter *adapter,
++			      int address, int kind)
++{
++	struct i2c_client *client;
++	struct tm13m3 *is;
++	int ret;
++
++	pr_debug("tm13m3: detecting client on address 0x%x\n", address);
++
++	/* Check if the adapter supports the needed features */
++	if (!i2c_check_functionality(adapter,
++				     (I2C_FUNC_SMBUS_READ_BYTE_DATA
++				      | I2C_FUNC_SMBUS_WRITE_BYTE_DATA
++				      | I2C_FUNC_SMBUS_READ_WORD_DATA
++				      | I2C_FUNC_SMBUS_WRITE_WORD_DATA)))
++		return 0;
++
++	is = kzalloc(sizeof(struct tm13m3), GFP_KERNEL);
++	if (!is)
++		return -ENOMEM;
++
++	client = &is->client;
++	client->addr = address;
++	client->adapter = adapter;
++	client->driver = &tm13m3_driver;
++	strcpy(client->name, "tm13m3");
++
++	is->cam.name = client->name;
++	is->cam.hsync_act_low = 0;
++	is->cam.vsync_act_low = 0;
++	is->cam.pclk_act_falling = 0;
++	/* no SAV/EAV sync -> HSYNC and VSYNC used */
++	/*is->cam.has_emb_sync = 0;*/
++	is->cam.has_emb_sync = 1;
++
++	is->cam.get_format = tm13m3_get_format;
++	is->cam.set_format = tm13m3_set_format;
++	is->cam.start_capture = tm13m3_start_capture;
++	is->cam.stop_capture = tm13m3_stop_capture;
++
++	mutex_init(&is->mutex);
++
++	is->mclk = clk_get(NULL, mclk_name);
++	if (IS_ERR(is->mclk)) {
++		ret = PTR_ERR(is->mclk);
++		goto err_clk;
++	}
++	clk_enable(is->mclk);
++
++	ret = i2c_attach_client(client);
++	if (ret)
++		goto err_attach;
++
++	i2c_set_clientdata(client, is);
++
++	ret = tm13m3_init_hardware(is);
++	if (ret)
++		goto err_init_hw;
++
++	/* We're up and running. Notify the ISI driver */
++	ret = atmel_isi_register_camera(&is->cam);
++	if (ret)
++		goto err_register;
++
++	printk(KERN_INFO "TM13M3 Image Sensor at %s:0x%02x\n",
++	       adapter->name, address);
++
++	tm13m3_init_debugfs(is);
++
++	return 0;
++
++err_register:
++err_init_hw:
++//	at76_reset_hardware(is);
++	i2c_detach_client(client);
++err_attach:
++	clk_disable(is->mclk);
++	clk_put(is->mclk);
++err_clk:
++	kfree(is);
++	return ret;
++}
++
++static int tm13m3_attach_adapter(struct i2c_adapter *adapter)
++{
++	pr_debug("tm13m3: starting probe for adapter %s (%u)\n",
++		 adapter->name, adapter->id);
++	return i2c_probe(adapter, &addr_data, &tm13m3_detect_client);
++}
++
++static int tm13m3_detach_client(struct i2c_client *client)
++{
++	struct tm13m3 *is = i2c_get_clientdata(client);
++	int ret;
++
++	tm13m3_cleanup_debugfs(is);
++	atmel_isi_unregister_camera(&is->cam);
++
++	tm13m3_reset_hardware(is);
++
++	ret = i2c_detach_client(client);
++	if (ret)
++		return ret;
++
++	clk_disable(is->mclk);
++	clk_put(is->mclk);
++	kfree(is);
++
++	return 0;
++}
++
++static struct i2c_driver tm13m3_driver = {
++	.driver = {
++		.name	= "tm13m3",
++	},
++	.id		= I2C_DRIVERID_TM13M3,
++	.attach_adapter	= &tm13m3_attach_adapter,
++	.detach_client	= &tm13m3_detach_client,
++};
++
++static int __init tm13m3_init(void)
++{
++	        /*
++         * Set up the master clock, if available. If clk_get() fails,
++         * this hopefully means that the board generates a suitable
++         * master clock some other way, which is fine by us.
++         *
++         * We need to do this before probing the i2c bus, as the
++         * camera won't ack any messages when it doesn't have a clock.
++         */
++        mclk_parent = clk_get(NULL, mclk_parent_name);
++        if (!IS_ERR(mclk_parent))
++                clk_enable(mclk_parent);
++        else {
++                mclk_parent = NULL;
++		pr_debug("tm13m3: No parent clock available\n");
++	}
++
++        mclk = clk_get(NULL, mclk_name);
++        if (!IS_ERR(mclk)) {
++                if (mclk_parent)
++                        clk_set_parent(mclk, mclk_parent);
++
++                clk_set_rate(mclk, 27000000);
++                clk_enable(mclk);
++        } else {
++                mclk = NULL;
++		pr_debug("tm13m3: No clock set\n");
++        }
++
++	gpio_direction_output(CAM_STANDBY, 0);
++	/* Reset sequence */
++	gpio_direction_output(CAM_RESET, 0);
++	udelay(4);
++	gpio_set_value(CAM_RESET, 1);
++
++	return i2c_add_driver(&tm13m3_driver);
++
++}
++module_init(tm13m3_init);
++
++static void __exit tm13m3_exit(void)
++{
++	if (mclk) {
++		clk_disable(mclk);
++		clk_put(mclk);
++	}
++	if (mclk_parent) {
++		clk_disable(mclk_parent);
++		clk_put(mclk_parent);
++	}
++	i2c_del_driver(&tm13m3_driver);
++}
++module_exit(tm13m3_exit);
++
++MODULE_DESCRIPTION("Atmel Image Sensor Interface Driver");
++MODULE_AUTHOR("Lars Häring <lharing@atmel.com>");
++MODULE_LICENSE("GPL");
+>From dc4286f6020df0bf791228cdfe7d4ea58e2f46ef Mon Sep 17 00:00:00 2001
+From: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed, 17 Jan 2007 13:47:40 +0100
+Subject: [PATCH] AP7000: Add platform_device for ISI
+
+Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+---
+ arch/avr32/mach-at32ap/at32ap700x.c   |   47 +++++++++++++++++++++++++++++++++
+ include/asm-avr32/arch-at32ap/board.h |    1 +
+ 2 files changed, 48 insertions(+), 0 deletions(-)
+
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+index 1130c8a..4184296 100644
+--- a/arch/avr32/mach-at32ap/at32ap700x.c
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -1396,6 +1396,51 @@ at32_add_device_abdac(unsigned int id)
+ }
+ 
+ /* --------------------------------------------------------------------
++ *  ISI
++ * -------------------------------------------------------------------- */
++static struct resource atmel_isi0_resource[] = {
++	PBMEM(0xfff02c00),
++	IRQ(30),
++};
++DEFINE_DEV(atmel_isi, 0);
++DEV_CLK(hclk, atmel_isi0, hsb, 5);
++DEV_CLK(pclk, atmel_isi0, pbb, 11);
++
++struct platform_device *__init
++at32_add_device_isi(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	switch (id) {
++	case 0:
++		pdev = &atmel_isi0_device;
++		select_peripheral(PB(0),  PERIPH_A, 0);	/* DATA0  */
++		select_peripheral(PB(1),  PERIPH_A, 0);	/* DATA1  */
++		select_peripheral(PB(2),  PERIPH_A, 0);	/* DATA2  */
++		select_peripheral(PB(3),  PERIPH_A, 0);	/* DATA3  */
++		select_peripheral(PB(4),  PERIPH_A, 0);	/* DATA4  */
++		select_peripheral(PB(5),  PERIPH_A, 0);	/* DATA5  */
++		select_peripheral(PB(6),  PERIPH_A, 0);	/* DATA6  */
++		select_peripheral(PB(7),  PERIPH_A, 0);	/* DATA7  */
++		select_peripheral(PB(11), PERIPH_B, 0);	/* DATA8  */
++		select_peripheral(PB(12), PERIPH_B, 0);	/* DATA9  */
++		select_peripheral(PB(13), PERIPH_B, 0);	/* DATA10 */
++		select_peripheral(PB(14), PERIPH_B, 0);	/* DATA11 */
++		select_peripheral(PB(8),  PERIPH_A, 0);	/* HSYNC  */
++		select_peripheral(PB(9),  PERIPH_A, 0);	/* VSYNC  */
++		select_peripheral(PB(10), PERIPH_A, 0);	/* PCLK	  */
++		break;
++
++	default:
++		return NULL;
++	}
++
++	platform_device_register(pdev);
++
++	return pdev;
++}
++
++/* --------------------------------------------------------------------
+  *  GCLK
+  * -------------------------------------------------------------------- */
+ static struct clk gclk0 = {
+@@ -1493,6 +1538,8 @@ struct clk *at32_clock_list[] = {
+ 	&gclk2,
+ 	&gclk3,
+ 	&gclk4,
++	&atmel_isi0_hclk,
++	&atmel_isi0_pclk,
+ };
+ unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
+ 
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 9b36eb8..931f5af 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -55,6 +55,7 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ 
+ struct platform_device *at32_add_device_ac97c(unsigned int id);
+ struct platform_device *at32_add_device_abdac(unsigned int id);
++struct platform_device *at32_add_device_isi(unsigned int id);
+ 
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+-- 
+1.5.2.3
+
+>From 6bac229e6999ce8e761baf97975fc5db774721fa Mon Sep 17 00:00:00 2001
+From: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed, 21 Feb 2007 15:35:44 +0100
+Subject: [PATCH] NGW100: Wire up the ISI
+
+Since the NGW100 doesn't actually have a camera on board, this patch
+merely serves as an example on how you might wire up the ISI on a
+board that does have a camera.
+---
+ arch/avr32/boards/atngw100/setup.c |    5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+index d649974..6ca98bb 100644
+--- a/arch/avr32/boards/atngw100/setup.c
++++ b/arch/avr32/boards/atngw100/setup.c
+@@ -178,6 +178,11 @@ static int __init atngw100_init(void)
+ 	at32_add_device_twi(0);
+ #endif
+ 
++	at32_add_device_isi(0);
++
++	/* Master clock for the camera (GCLK0) */
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++
+ 	return 0;
+ }
+ postcore_initcall(atngw100_init);
+-- 
+1.5.2.3
diff --git a/target/device/Atmel/misc-patches/linux-2.6.24-avr32-ac97-reset.patch b/target/device/Atmel/misc-patches/linux-2.6.24-avr32-ac97-reset.patch
new file mode 100644
index 000000000..eed5f2814
--- /dev/null
+++ b/target/device/Atmel/misc-patches/linux-2.6.24-avr32-ac97-reset.patch
@@ -0,0 +1,289 @@
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+index 0ec0b1c..3a58375 100644
+--- a/sound/avr32/ac97c.c
++++ b/sound/avr32/ac97c.c
+@@ -25,6 +25,8 @@
+ #include <sound/ac97_codec.h>
+ #include <sound/memalloc.h>
+ 
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
+ #include <asm/dma-controller.h>
+ 
+ #include "ac97c.h"
+@@ -37,6 +39,7 @@ struct atmel_ac97_dma_info {
+ 	struct dma_request_cyclic req_rx;
+ 	unsigned short rx_periph_id;
+ 	unsigned short tx_periph_id;
++	unsigned short controller;
+ };
+ 
+ struct atmel_ac97 {
+@@ -51,6 +54,7 @@ struct atmel_ac97 {
+ 	struct snd_ac97_bus *ac97_bus;
+ 	int opened;
+ 	int period;
++	int reset_pin;
+ 	u64 cur_format;
+ 	unsigned int cur_rate;
+ 	struct clk *mck;
+@@ -692,6 +696,12 @@ timed_out:
+ 
+ static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
+ {
++	if (chip->reset_pin >= 0) {
++		gpio_set_value(chip->reset_pin, 0);
++		udelay(5);
++		gpio_set_value(chip->reset_pin, 1);
++	}
++
+ 	ac97c_writel(chip, MR, AC97C_MR_WRST);
+ 	mdelay(1);
+ 	ac97c_writel(chip, MR, AC97C_MR_ENA);
+@@ -727,6 +737,7 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card,
+ 		.read	= snd_atmel_ac97_read,
+ 	};
+ 	struct atmel_ac97 *chip = get_chip(card);
++	struct ac97c_platform_data *pdata;
+ 	struct resource *regs;
+ 	struct clk *mck;
+ 	int err;
+@@ -735,6 +746,29 @@ static int __devinit snd_atmel_ac97_create(struct snd_card *card,
+ 	if (!regs)
+ 		return -ENXIO;
+ 
++	pdata = pdev->dev.platform_data;
++	if (pdata) {
++		chip->reset_pin = pdata->reset_pin;
++
++		if (chip->reset_pin >= 0) {
++			if (gpio_request(chip->reset_pin,
++						chip->card->shortname)) {
++				dev_dbg(&pdev->dev,
++						"ac97: reset pin "
++						"not available\n");
++				chip->reset_pin = -1;
++			} else {
++				gpio_direction_output(chip->reset_pin, 1);
++			}
++		}
++
++		chip->dma.rx_periph_id = pdata->dma_rx_periph_id;
++		chip->dma.tx_periph_id = pdata->dma_tx_periph_id;
++		chip->dma.controller = pdata->dma_controller_id;
++	} else {
++		return -ENXIO;
++	}
++
+ 	mck = clk_get(&pdev->dev, "pclk");
+ 	if (IS_ERR(mck))
+ 		return PTR_ERR(mck);
+@@ -789,23 +823,19 @@ static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
+ 	if (err)
+ 		goto out_free_card;
+ 
+-	/* TODO: Get this information from the platform device */
+-	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	chip->dma.req_tx.req.dmac = find_dma_controller(chip->dma.controller);
+ 	if (!chip->dma.req_tx.req.dmac) {
+ 		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
+ 		err = -ENODEV;
+ 		goto out_free_card;
+ 	}
+-	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	chip->dma.req_rx.req.dmac = find_dma_controller(chip->dma.controller);
+ 	if (!chip->dma.req_rx.req.dmac) {
+ 		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
+ 		err = -ENODEV;
+ 		goto out_free_card;
+ 	}
+ 
+-	chip->dma.rx_periph_id = 3;
+-	chip->dma.tx_periph_id = 4;
+-
+ 	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
+ 	if (ch < 0) {
+ 		dev_dbg(&chip->pdev->dev,
+-- 
+1.5.2.5
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+index 06795d0..58f3841 100644
+--- a/arch/avr32/mach-at32ap/at32ap700x.c
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -1552,12 +1552,15 @@ static struct clk atmel_ac97c0_pclk = {
+ 	.index		= 10,
+ };
+ 
+-struct platform_device *__init at32_add_device_ac97c(unsigned int id)
++struct platform_device *__init
++at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data)
+ {
+ 	struct platform_device *pdev;
+ 
+ 	if (id != 0)
+ 		return NULL;
++	if (!data)
++		return NULL;
+ 
+ 	pdev = platform_device_alloc("atmel_ac97c", id);
+ 	if (!pdev)
+@@ -1567,10 +1570,17 @@ struct platform_device *__init at32_add_device_ac97c(unsigned int id)
+ 				ARRAY_SIZE(atmel_ac97c0_resource)))
+ 		goto err_add_resources;
+ 
+-	select_peripheral(PB(20), PERIPH_B, 0);	/* SYNC	*/
+-	select_peripheral(PB(21), PERIPH_B, 0);	/* SDO	*/
+-	select_peripheral(PB(22), PERIPH_B, 0);	/* SDI	*/
+-	select_peripheral(PB(23), PERIPH_B, 0);	/* SCLK	*/
++	if (platform_device_add_data(pdev, data,
++				sizeof(struct ac97c_platform_data)))
++		goto err_add_resources;
++
++	select_peripheral(PB(20), PERIPH_B, 0);	/* SDO	*/
++	select_peripheral(PB(21), PERIPH_B, 0);	/* SYNC	*/
++	select_peripheral(PB(22), PERIPH_B, 0);	/* SCLK	*/
++	select_peripheral(PB(23), PERIPH_B, 0);	/* SDI	*/
++
++	if (data->reset_pin != GPIO_PIN_NONE)
++		at32_select_gpio(data->reset_pin, 0);
+ 
+ 	atmel_ac97c0_pclk.dev = &pdev->dev;
+ 
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 8816b66..0386a0e 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -76,7 +76,16 @@ struct mci_platform_data {
+ };
+ struct platform_device *
+ at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
+-struct platform_device *at32_add_device_ac97c(unsigned int id);
++
++struct ac97c_platform_data {
++	unsigned short dma_rx_periph_id;
++	unsigned short dma_tx_periph_id;
++	unsigned short dma_controller_id;
++	int reset_pin;
++};
++struct platform_device *
++at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data);
++
+ struct platform_device *at32_add_device_abdac(unsigned int id);
+ 
+ struct cf_platform_data {
+-- 
+1.5.2.5
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index 90436fa..eba6f89 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -151,6 +151,15 @@ static void __init set_hw_addr(struct platform_device *pdev)
+ 	clk_put(pclk);
+ }
+ 
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE,
++};
++#endif
++
+ #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static void __init atstk1002_setup_extdac(void)
+ {
+@@ -253,7 +262,7 @@ static int __init atstk1002_init(void)
+ #endif
+ 	at32_add_device_usba(0, NULL);
+ #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ #else
+ 	at32_add_device_abdac(0);
+ #endif
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+index 768d204..2564e3c 100644
+--- a/arch/avr32/boards/atstk1000/atstk1003.c
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -72,6 +72,15 @@ static struct cf_platform_data __initdata cf0_data = {
+ 	.cs		= 4,
+ };
+ 
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE,
++};
++#endif
++
+ #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static void __init atstk1003_setup_extdac(void)
+ {
+@@ -164,7 +173,7 @@ static int __init atstk1003_init(void)
+ #endif
+ 	at32_add_device_usba(0, NULL);
+ #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ #else
+ 	at32_add_device_abdac(0);
+ #endif
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+index 96015dd..3c25a6f 100644
+--- a/arch/avr32/boards/atstk1000/atstk1004.c
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -64,6 +64,15 @@ static struct spi_board_info spi1_board_info[] __initdata = { {
+ } };
+ #endif
+ 
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE,
++};
++#endif
++
+ #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
+ static void __init atstk1004_setup_extdac(void)
+ {
+@@ -136,7 +145,7 @@ static int __init atstk1004_init(void)
+ 			     fbmem_start, fbmem_size);
+ 	at32_add_device_usba(0, NULL);
+ #ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ #else
+ 	at32_add_device_abdac(0);
+ #endif
+-- 
+1.5.2.5
+--- a/arch/avr32/boards/atngw100/setup.c	2008-02-26 12:27:37.000000000 -0500
++++ b/arch/avr32/boards/atngw100/setup.c	2008-02-26 12:26:08.000000000 -0500
+@@ -201,6 +201,13 @@ static struct platform_device i2c_gpio_d
+ };
+ #endif
+ 
++static struct ac97c_platform_data __initdata ac97c0_data = {
++	.dma_rx_periph_id	= 3,
++	.dma_tx_periph_id	= 4,
++	.dma_controller_id	= 0,
++	.reset_pin		= GPIO_PIN_NONE, // change to whatever pin you want, i.e. GPIO_PIN_PB(18)
++};
++
+ static int __init atngw100_init(void)
+ {
+ 	unsigned	i;
+@@ -222,7 +229,7 @@ static int __init atngw100_init(void)
+ 	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
+ 	at32_add_device_mci(0, &mci0_data);
+ 	at32_add_device_usba(0, NULL);
+-	at32_add_device_ac97c(0);
++	at32_add_device_ac97c(0, &ac97c0_data);
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
diff --git a/target/device/Atmel/misc-patches/linux-2.6.24-avr32-psif-2.patch b/target/device/Atmel/misc-patches/linux-2.6.24-avr32-psif-2.patch
new file mode 100644
index 000000000..4f9d652a5
--- /dev/null
+++ b/target/device/Atmel/misc-patches/linux-2.6.24-avr32-psif-2.patch
@@ -0,0 +1,671 @@
+diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
+index b88569e..2df47ed 100644
+--- a/drivers/input/serio/Kconfig
++++ b/drivers/input/serio/Kconfig
+@@ -88,6 +88,17 @@ config SERIO_RPCKBD
+ 	  To compile this driver as a module, choose M here: the
+ 	  module will be called rpckbd.
+ 
++config SERIO_AT32PSIF
++	tristate "AVR32 PSIF PS/2 keyboard and mouse controller"
++	depends on AVR32
++	default n
++	help
++	  Say Y here if you want to use the PSIF peripheral on AVR32 devices
++	  and connect a PS/2 keyboard and/or mouse to it.
++
++	  To compile this driver as a module, choose M here: the module will
++	  be called at32psif.
++
+ config SERIO_AMBAKMI
+ 	tristate "AMBA KMI keyboard controller"
+ 	depends on ARM_AMBA
+diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
+index 4155197..38b8868 100644
+--- a/drivers/input/serio/Makefile
++++ b/drivers/input/serio/Makefile
+@@ -12,6 +12,7 @@ obj-$(CONFIG_SERIO_CT82C710)	+= ct82c710.o
+ obj-$(CONFIG_SERIO_RPCKBD)	+= rpckbd.o
+ obj-$(CONFIG_SERIO_SA1111)	+= sa1111ps2.o
+ obj-$(CONFIG_SERIO_AMBAKMI)	+= ambakmi.o
++obj-$(CONFIG_SERIO_AT32PSIF)	+= at32psif.o
+ obj-$(CONFIG_SERIO_Q40KBD)	+= q40kbd.o
+ obj-$(CONFIG_SERIO_GSCPS2)	+= gscps2.o
+ obj-$(CONFIG_HP_SDC)		+= hp_sdc.o
+diff --git a/drivers/input/serio/at32psif.c b/drivers/input/serio/at32psif.c
+new file mode 100644
+index 0000000..228ab15
+--- /dev/null
++++ b/drivers/input/serio/at32psif.c
+@@ -0,0 +1,342 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * Driver for the AT32AP700X PS/2 controller (PSIF).
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/device.h>
++#include <linux/init.h>
++#include <linux/serio.h>
++#include <linux/interrupt.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/delay.h>
++
++#include "at32psif.h"
++
++#define PSIF_BUF_SIZE		16
++
++#define ring_is_empty(_psif)	(_psif->head == _psif->tail)
++#define ring_next_head(_psif)	((_psif->head + 1) & (PSIF_BUF_SIZE - 1))
++#define ring_next_tail(_psif)	((_psif->tail + 1) & (PSIF_BUF_SIZE - 1))
++
++struct psif {
++	struct platform_device	*pdev;
++	struct clk		*pclk;
++	struct serio		*io;
++	void __iomem		*regs;
++	unsigned int		irq;
++	unsigned int		open;
++	/* Prevent concurrent writes to circular buffer. */
++	spinlock_t		lock;
++	unsigned int		head;
++	unsigned int		tail;
++	unsigned char		buffer[PSIF_BUF_SIZE];
++};
++
++static irqreturn_t psif_interrupt(int irq, void *_ptr)
++{
++	struct psif *psif = _ptr;
++	int retval = IRQ_NONE;
++	unsigned int io_flags = 0;
++	unsigned long lock_flags;
++	unsigned long status;
++
++	status = psif_readl(psif, SR);
++
++	if (status & PSIF_BIT(RXRDY)) {
++		unsigned char val = (unsigned char) psif_readl(psif, RHR);
++
++		if (status & PSIF_BIT(PARITY))
++			io_flags |= SERIO_PARITY;
++		if (status & PSIF_BIT(OVRUN))
++			dev_err(&psif->pdev->dev, "overrun read error\n");
++
++		/* TODO: why do we have to wait? Are we too fast for serio? */
++		udelay(100);
++
++		serio_interrupt(psif->io, val, io_flags);
++
++		retval = IRQ_HANDLED;
++	}
++
++	spin_lock_irqsave(&psif->lock, lock_flags);
++
++	if (status & PSIF_BIT(TXEMPTY)) {
++		if (status & PSIF_BIT(NACK))
++			dev_err(&psif->pdev->dev, "NACK error\n");
++		if (ring_is_empty(psif)) {
++			psif_writel(psif, IDR, PSIF_BIT(TXEMPTY));
++		} else {
++			psif_writel(psif, THR, psif->buffer[psif->tail]);
++			psif->tail = ring_next_tail(psif);
++		}
++
++		retval = IRQ_HANDLED;
++	}
++
++	spin_unlock_irqrestore(&psif->lock, lock_flags);
++
++	return retval;
++}
++
++static int psif_write(struct serio *io, unsigned char val)
++{
++	struct psif *psif = io->port_data;
++	unsigned long flags;
++	unsigned int head;
++
++	spin_lock_irqsave(&psif->lock, flags);
++
++	/* Write directly if TX is ready. */
++	if (psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) {
++		psif_writel(psif, THR, val);
++	} else {
++		head = ring_next_head(psif);
++
++		if (head != psif->tail) {
++			psif->buffer[psif->head] = val;
++			psif->head = head;
++		} else {
++			dev_err(&psif->pdev->dev, "underrun write error\n");
++		}
++
++		/* Make sure TXEMPTY interrupt is enabled. */
++		psif_writel(psif, IER, PSIF_BIT(TXEMPTY));
++	}
++
++	spin_unlock_irqrestore(&psif->lock, flags);
++
++	return 0;
++}
++
++static int psif_open(struct serio *io)
++{
++	struct psif *psif = io->port_data;
++	int retval;
++
++	retval = clk_enable(psif->pclk);
++	if (retval)
++		goto out;
++
++	psif_writel(psif, CR, PSIF_BIT(CR_TXEN) | PSIF_BIT(CR_RXEN));
++	psif_writel(psif, IER, PSIF_BIT(RXRDY));
++
++	psif->open = 1;
++out:
++	return retval;
++}
++
++static void psif_close(struct serio *io)
++{
++	struct psif *psif = io->port_data;
++
++	psif->open = 0;
++
++	psif_writel(psif, IDR, ~0UL);
++	psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
++
++	clk_disable(psif->pclk);
++}
++
++static void psif_set_prescaler(struct psif *psif)
++{
++	unsigned long prscv;
++	unsigned long rate = clk_get_rate(psif->pclk);
++
++	/* PRSCV = Pulse length (100 uS) * PSIF module frequency. */
++	prscv = 100 * (rate / 1000000);
++
++	if (prscv > ((1<<PSIF_PSR_PRSCV_SIZE) - 1)) {
++		prscv = (1<<PSIF_PSR_PRSCV_SIZE) - 1;
++		dev_dbg(&psif->pdev->dev, "pclk too fast, "
++				"prescaler set to max\n");
++	}
++
++	clk_enable(psif->pclk);
++	psif_writel(psif, PSR, prscv);
++	clk_disable(psif->pclk);
++}
++
++static int __init psif_probe(struct platform_device *pdev)
++{
++	struct resource *regs;
++	struct psif *psif;
++	struct serio *io;
++	struct clk *pclk;
++	int irq;
++	int ret;
++
++	psif = kzalloc(sizeof(struct psif), GFP_KERNEL);
++	if (!psif) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		ret = -ENOMEM;
++		goto out;
++	}
++	psif->pdev = pdev;
++
++	io = kzalloc(sizeof(struct serio), GFP_KERNEL);
++	if (!io) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		ret = -ENOMEM;
++		goto out_free_psif;
++	}
++	psif->io = io;
++
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resources defined\n");
++		ret = -ENOMEM;
++		goto out_free_io;
++	}
++
++	psif->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!psif->regs) {
++		ret = -ENOMEM;
++		dev_dbg(&pdev->dev, "could not map I/O memory\n");
++		goto out_free_io;
++	}
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk)) {
++		dev_dbg(&pdev->dev, "could not get peripheral clock\n");
++		ret = PTR_ERR(pclk);
++		goto out_iounmap;
++	}
++	psif->pclk = pclk;
++
++	/* Reset the PSIF to enter at a known state. */
++	ret = clk_enable(pclk);
++	if (ret) {
++		dev_dbg(&pdev->dev, "could not enable pclk\n");
++		goto out_put_clk;
++	}
++	psif_writel(psif, CR, PSIF_BIT(CR_SWRST));
++	clk_disable(pclk);
++
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		ret = -ENXIO;
++		goto out_put_clk;
++	}
++	ret = request_irq(irq, psif_interrupt, IRQF_SHARED, "at32psif", psif);
++	if (ret) {
++		dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
++		goto out_put_clk;
++	}
++	psif->irq = irq;
++
++	io->id.type	= SERIO_8042;
++	io->write	= psif_write;
++	io->open	= psif_open;
++	io->close	= psif_close;
++	strlcpy(io->name, pdev->dev.bus_id, sizeof(io->name));
++	strlcpy(io->phys, pdev->dev.bus_id, sizeof(io->phys));
++	io->port_data	= psif;
++	io->dev.parent	= &pdev->dev;
++
++	psif_set_prescaler(psif);
++
++	spin_lock_init(&psif->lock);
++	serio_register_port(psif->io);
++	platform_set_drvdata(pdev, psif);
++
++	dev_info(&pdev->dev, "Atmel AVR32 PSIF PS/2 driver on 0x%08x irq %d\n",
++			(int)psif->regs, psif->irq);
++
++	return 0;
++
++out_put_clk:
++	clk_put(psif->pclk);
++out_iounmap:
++	iounmap(psif->regs);
++out_free_io:
++	kfree(io);
++out_free_psif:
++	kfree(psif);
++out:
++	return ret;
++}
++
++static int __exit psif_remove(struct platform_device *pdev)
++{
++	struct psif *psif = platform_get_drvdata(pdev);
++
++	psif_writel(psif, IDR, ~0UL);
++	psif_writel(psif, CR, PSIF_BIT(CR_TXDIS) | PSIF_BIT(CR_RXDIS));
++
++	serio_unregister_port(psif->io);
++	iounmap(psif->regs);
++	free_irq(psif->irq, psif);
++	clk_put(psif->pclk);
++	kfree(psif);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int psif_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	struct psif *psif = platform_get_drvdata(pdev);
++
++	if (psif->open) {
++		psif_writel(psif, CR, PSIF_BIT(CR_RXDIS) | PSIF_BIT(CR_TXDIS));
++		clk_disable(psif->pclk);
++	}
++
++	return 0;
++}
++
++static int psif_resume(struct platform_device *pdev)
++{
++	struct psif *psif = platform_get_drvdata(pdev);
++
++	if (psif->open) {
++		clk_enable(psif->pclk);
++		psif_set_prescaler(psif);
++		psif_writel(psif, CR, PSIF_BIT(CR_RXEN) | PSIF_BIT(CR_TXEN));
++	}
++
++	return 0;
++}
++#else
++#define psif_suspend	NULL
++#define psif_resume	NULL
++#endif
++
++static struct platform_driver psif_driver = {
++	.remove		= __exit_p(psif_remove),
++	.driver		= {
++		.name	= "atmel_psif",
++	},
++	.suspend	= psif_suspend,
++	.resume		= psif_resume,
++};
++
++static int __init psif_init(void)
++{
++	return platform_driver_probe(&psif_driver, psif_probe);
++}
++
++static void __exit psif_exit(void)
++{
++	platform_driver_unregister(&psif_driver);
++}
++
++module_init(psif_init);
++module_exit(psif_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Atmel AVR32 PSIF PS/2 driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/input/serio/at32psif.h b/drivers/input/serio/at32psif.h
+new file mode 100644
+index 0000000..b0cc5e4
+--- /dev/null
++++ b/drivers/input/serio/at32psif.h
+@@ -0,0 +1,82 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * Driver for the AT32AP700X PS/2 controller (PSIF).
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#ifndef _AT32PSIF_H
++#define _AT32PSIF_H
++
++/* PSIF register offsets */
++#define PSIF_CR				0x00
++#define PSIF_RHR			0x04
++#define PSIF_THR			0x08
++#define PSIF_SR				0x10
++#define PSIF_IER			0x14
++#define PSIF_IDR			0x18
++#define PSIF_IMR			0x1c
++#define PSIF_PSR			0x20
++
++/* Bitfields in control register. */
++#define PSIF_CR_RXDIS_OFFSET		1
++#define PSIF_CR_RXDIS_SIZE		1
++#define PSIF_CR_RXEN_OFFSET		0
++#define PSIF_CR_RXEN_SIZE		1
++#define PSIF_CR_SWRST_OFFSET		15
++#define PSIF_CR_SWRST_SIZE		1
++#define PSIF_CR_TXDIS_OFFSET		9
++#define PSIF_CR_TXDIS_SIZE		1
++#define PSIF_CR_TXEN_OFFSET		8
++#define PSIF_CR_TXEN_SIZE		1
++
++/* Bitfields in interrupt disable, enable, mask and status register. */
++#define PSIF_NACK_OFFSET		8
++#define PSIF_NACK_SIZE			1
++#define PSIF_OVRUN_OFFSET		5
++#define PSIF_OVRUN_SIZE			1
++#define PSIF_PARITY_OFFSET		9
++#define PSIF_PARITY_SIZE		1
++#define PSIF_RXRDY_OFFSET		4
++#define PSIF_RXRDY_SIZE			1
++#define PSIF_TXEMPTY_OFFSET		1
++#define PSIF_TXEMPTY_SIZE		1
++#define PSIF_TXRDY_OFFSET		0
++#define PSIF_TXRDY_SIZE			1
++
++/* Bitfields in prescale register. */
++#define PSIF_PSR_PRSCV_OFFSET		0
++#define PSIF_PSR_PRSCV_SIZE		13
++
++/* Bitfields in receive hold register. */
++#define PSIF_RHR_RXDATA_OFFSET		0
++#define PSIF_RHR_RXDATA_SIZE		8
++
++/* Bitfields in transmit hold register. */
++#define PSIF_THR_TXDATA_OFFSET		0
++#define PSIF_THR_TXDATA_SIZE		8
++
++/* Bit manipulation macros */
++#define PSIF_BIT(name)					\
++	(1 << PSIF_##name##_OFFSET)
++#define PSIF_BF(name, value)				\
++	(((value) & ((1 << PSIF_##name##_SIZE) - 1))	\
++	 << PSIF_##name##_OFFSET)
++#define PSIF_BFEXT(name, value)\
++	(((value) >> PSIF_##name##_OFFSET)		\
++	 & ((1 << PSIF_##name##_SIZE) - 1))
++#define PSIF_BFINS(name, value, old)			\
++	(((old) & ~(((1 << PSIF_##name##_SIZE) - 1)	\
++		    << PSIF_##name##_OFFSET))		\
++	 | PSIF_BF(name, value))
++
++/* Register access macros */
++#define psif_readl(port, reg)				\
++	__raw_readl((port)->regs + PSIF_##reg)
++#define psif_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + PSIF_##reg)
++
++#endif /* _AT32PSIF_H */
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 56a8d8e..e125205 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -145,4 +145,17 @@ config BOARD_ATSTK1000_CF_DETECT_PIN
+ 
+ 	  The default is 0x3e, which is pin 30 on PIOB, aka GPIO15.
+ 
++config BOARD_ATSTK100X_ENABLE_PSIF
++	bool "Enable PSIF peripheral (PS/2 support)"
++	default n
++	help
++	  Select this if you want to use the PSIF peripheral to hook up PS/2
++	  devices to your STK1000. This will require a hardware modification to
++	  work correctly, since PS/2 devices require 5 volt power and signals,
++	  while the STK1000 only provides 3.3 volt.
++
++	  Say N if you have not modified the hardware to boost the voltage, say
++	  Y if you have level convertion hardware or a PS/2 device capable of
++	  operating on 3.3 volt.
++
+ endif	# stk 1000
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index f19f54d..2ba37d5 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -261,6 +261,10 @@ static int __init atstk1002_init(void)
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 	at32_add_device_cf(0, 2, &cf0_data);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++#endif
+ 
+ 	atstk1000_setup_j2_leds();
+ 	atstk1002_setup_extdac();
+diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
+index 768d204..2cc0bbc 100644
+--- a/arch/avr32/boards/atstk1000/atstk1003.c
++++ b/arch/avr32/boards/atstk1000/atstk1003.c
+@@ -172,6 +172,10 @@ static int __init atstk1003_init(void)
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 	at32_add_device_cf(0, 2, &cf0_data);
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++#endif
+ 
+ 	atstk1000_setup_j2_leds();
+ 	atstk1003_setup_extdac();
+diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c
+index 96015dd..9e8c293 100644
+--- a/arch/avr32/boards/atstk1000/atstk1004.c
++++ b/arch/avr32/boards/atstk1000/atstk1004.c
+@@ -143,6 +143,10 @@ static int __init atstk1004_init(void)
+ #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_PSIF
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++#endif
+ 
+ 	atstk1000_setup_j2_leds();
+ 	atstk1004_setup_extdac();
+diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
+index 3300944..cfec920 100644
+--- a/arch/avr32/mach-at32ap/at32ap700x.c
++++ b/arch/avr32/mach-at32ap/at32ap700x.c
+@@ -679,6 +679,81 @@ void __init at32_add_system_devices(void)
+ }
+ 
+ /* --------------------------------------------------------------------
++ *  PSIF
++ * -------------------------------------------------------------------- */
++static struct resource atmel_psif0_resource[] __initdata = {
++	{
++		.start	= 0xffe03c00,
++		.end	= 0xffe03cff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(18),
++};
++static struct clk atmel_psif0_pclk = {
++	.name		= "pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 15,
++};
++
++static struct resource atmel_psif1_resource[] __initdata = {
++	{
++		.start	= 0xffe03d00,
++		.end	= 0xffe03dff,
++		.flags	= IORESOURCE_MEM,
++	},
++	IRQ(18),
++};
++static struct clk atmel_psif1_pclk = {
++	.name		= "pclk",
++	.parent		= &pba_clk,
++	.mode		= pba_clk_mode,
++	.get_rate	= pba_clk_get_rate,
++	.index		= 15,
++};
++
++struct platform_device *__init at32_add_device_psif(unsigned int id)
++{
++	struct platform_device *pdev;
++
++	if (!(id == 0 || id == 1))
++		return NULL;
++
++	pdev = platform_device_alloc("atmel_psif", id);
++	if (!pdev)
++		return NULL;
++
++	switch (id) {
++	case 0:
++		if (platform_device_add_resources(pdev, atmel_psif0_resource,
++					ARRAY_SIZE(atmel_psif0_resource)))
++			goto err_add_resources;
++		atmel_psif0_pclk.dev = &pdev->dev;
++		select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */
++		select_peripheral(PA(9), PERIPH_A, 0); /* DATA  */
++		break;
++	case 1:
++		if (platform_device_add_resources(pdev, atmel_psif1_resource,
++					ARRAY_SIZE(atmel_psif1_resource)))
++			goto err_add_resources;
++		atmel_psif1_pclk.dev = &pdev->dev;
++		select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */
++		select_peripheral(PB(12), PERIPH_A, 0); /* DATA  */
++		break;
++	default:
++		return NULL;
++	}
++
++	platform_device_add(pdev);
++	return pdev;
++
++err_add_resources:
++	platform_device_put(pdev);
++	return NULL;
++}
++
++/* --------------------------------------------------------------------
+  *  USART
+  * -------------------------------------------------------------------- */
+ 
+@@ -1712,6 +1787,8 @@ struct clk *at32_clock_list[] = {
+ 	&pio3_mck,
+ 	&pio4_mck,
+ 	&at32_systc0_pclk,
++	&atmel_psif0_pclk,
++	&atmel_psif1_pclk,
+ 	&atmel_usart0_usart,
+ 	&atmel_usart1_usart,
+ 	&atmel_usart2_usart,
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 1a6e02c..19cfec7 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -93,4 +93,7 @@ struct platform_device *
+ at32_add_device_cf(unsigned int id, unsigned int extint,
+ 		struct cf_platform_data *data);
+ 
++struct platform_device *
++at32_add_device_psif(unsigned int id);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c
+index d95f316..20a7193 100644
+--- a/drivers/char/keyboard.c
++++ b/drivers/char/keyboard.c
+@@ -1000,7 +1000,8 @@ DECLARE_TASKLET_DISABLED(keyboard_tasklet, kbd_bh, 0);
+ #if defined(CONFIG_X86) || defined(CONFIG_IA64) || defined(CONFIG_ALPHA) ||\
+     defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_SPARC) ||\
+     defined(CONFIG_PARISC) || defined(CONFIG_SUPERH) ||\
+-    (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC))
++    (defined(CONFIG_ARM) && defined(CONFIG_KEYBOARD_ATKBD) && !defined(CONFIG_ARCH_RPC)) ||\
++    defined(CONFIG_AVR32)
+ 
+ #define HW_RAW(dev) (test_bit(EV_MSC, dev->evbit) && test_bit(MSC_RAW, dev->mscbit) &&\
+ 			((dev)->id.bustype == BUS_I8042) && ((dev)->id.vendor == 0x0001) && ((dev)->id.product == 0x0001))
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+--- a/arch/avr32/boards/atngw100/setup.c	2008-01-31 13:38:32.000000000 -0500
++++ b/arch/avr32/boards/atngw100/setup.c	2008-01-31 13:44:09.000000000 -0500
+@@ -224,6 +224,9 @@ static int __init atngw100_init(void)
+ 	at32_add_device_usba(0, NULL);
+ 	at32_add_device_ac97c(0);
+ 
++	at32_add_device_psif(0);
++	at32_add_device_psif(1);
++
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+ 				AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
diff --git a/target/device/Atmel/misc-patches/u-boot-1.3.0-200MHz-ngw100.patch b/target/device/Atmel/misc-patches/u-boot-1.3.0-200MHz-ngw100.patch
new file mode 100644
index 000000000..9749041aa
--- /dev/null
+++ b/target/device/Atmel/misc-patches/u-boot-1.3.0-200MHz-ngw100.patch
@@ -0,0 +1,20 @@
+--- a/include/configs/atngw100.h	2008-03-02 10:17:04.000000000 -0500
++++ b/include/configs/atngw100.h	2008-03-02 10:22:46.000000000 -0500
+@@ -42,7 +42,7 @@
+ #define CFG_POWER_MANAGER		1
+ #define CFG_OSC0_HZ			20000000
+ #define CFG_PLL0_DIV			1
+-#define CFG_PLL0_MUL			7
++#define CFG_PLL0_MUL			10
+ #define CFG_PLL0_SUPPRESS_CYCLES	16
+ #define CFG_CLKDIV_CPU			0
+ #define CFG_CLKDIV_HSB			1
+@@ -56,7 +56,7 @@
+  *
+  * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
+  */
+-#define CFG_PLL0_OPT			0x04
++#define CFG_PLL0_OPT			0x06
+ 
+ #define CONFIG_USART1			1
+ 
diff --git a/target/device/Atmel/misc-patches/u-boot-1.3.0-64MB-sdram-ngw100.patch b/target/device/Atmel/misc-patches/u-boot-1.3.0-64MB-sdram-ngw100.patch
new file mode 100644
index 000000000..b04bbf968
--- /dev/null
+++ b/target/device/Atmel/misc-patches/u-boot-1.3.0-64MB-sdram-ngw100.patch
@@ -0,0 +1,11 @@
+--- a/board/atmel/atngw100/atngw100.c	2008-03-02 10:17:04.000000000 -0500
++++ b/board/atmel/atngw100/atngw100.c	2008-03-02 10:21:23.000000000 -0500
+@@ -31,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
+ static const struct sdram_info sdram = {
+ 	.phys_addr	= CFG_SDRAM_BASE,
+ 	.row_bits	= 13,
+-	.col_bits	= 9,
++	.col_bits	= 10,
+ 	.bank_bits	= 2,
+ 	.cas		= 3,
+ 	.twr		= 2,
diff --git a/target/device/Atmel/u-boot/Config.in b/target/device/Atmel/u-boot/Config.in
index 62988ebe4..edefb52bb 100644
--- a/target/device/Atmel/u-boot/Config.in
+++ b/target/device/Atmel/u-boot/Config.in
@@ -1,44 +1,103 @@
-config BR2_TARGET_UBOOT
-	bool "Das U-Boot Boot Monitor"
-	depends on BR2_TARGET_AT91
-	depends on !BR2_TARGET_AT91SAM9260PF
+config BR2_TARGET_U_BOOT
+	bool "u-boot"
 	default n
+	depends on BR2_avr32 || BR2_arm || BR2_armeb || BR2_i386 || BR2_powerpc || BR2_m68k || BR2_mips || BR2_nios2
 	help
-	  Build "Das U-Boot" Boot Monitor
+	  U-Boot, the universal boot loader for multiple platforms and target
+	  boards.
 
-config BR2_TARGET_UBOOT_SERVERIP
-	string "server ip"
-	depends on BR2_TARGET_UBOOT
-	default "10.175.196.221"
+	  http://www.denx.de/wiki/UBoot/
+
+config BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE
+	string "U-Boot config header file"
+	depends on BR2_TARGET_U_BOOT
+	help
+	  Set this variable to a file containing a U-Boot configuration for the
+	  target board. This file will be copied into the U-Boot directory
+	  include/configs.
+
+config BR2_TARGET_U_BOOT_CONFIG_BOARD
+	string "U-Boot target board configuration"
+	depends on BR2_TARGET_U_BOOT
 	help
-	  TFTP server ip address
+	  Set this variable to the target board you want to configure U-Boot
+	  for. This will use the default options for this board in U-Boot and
+	  build accordingly.
+
+	  For example "atstk1002_config" for ATSTK1000 with ATSTK1002 top
+	  module for the AVR32 starter kit.
 
-config BR2_TARGET_UBOOT_IPADDR
-	string "ip address"
-	depends on BR2_TARGET_UBOOT
-	default "10.175.196.18"
+config BR2_TARGET_U_BOOT_SERVERIP
+	string "Server IP"
+	depends on BR2_TARGET_U_BOOT
+	default "192.168.0.1"
 	help
-	  TFTP server ip address
+	  The IP address for the remote server providing TFTP services.
 
-config BR2_TARGET_UBOOT_GATEWAY
-	string "gateway ip"
-	depends on BR2_TARGET_UBOOT
-	default "10.175.196.1"
+config BR2_TARGET_U_BOOT_IPADDR
+	string "Target IP address"
+	depends on BR2_TARGET_U_BOOT
+	default "192.168.0.42"
 	help
-	  Gateway ip address
+	  Target board IP address, only set this if you intend to use a fixed
+	  address (i.e. no DHCP). A blanc target IP address will allow the
+	  board to use DHCP.
 
-config BR2_TARGET_UBOOT_NETMASK
+config BR2_TARGET_U_BOOT_GATEWAY
+	string "Gateway IP"
+	depends on BR2_TARGET_U_BOOT && BR2_TARGET_U_BOOT_IPADDR != ""
+	default "192.168.0.1"
+	help
+	  Set the gateway IP address if you need to connect to a machine
+	  outside the netmask for the network.
+
+config BR2_TARGET_U_BOOT_NETMASK
 	string "netmask"
-	depends on BR2_TARGET_UBOOT
+	depends on BR2_TARGET_U_BOOT && BR2_TARGET_U_BOOT_IPADDR != ""
 	default "255.255.255.0"
 	help
-	  Network Mask
+	  Network mask for the target board network.
+
+config BR2_TARGET_U_BOOT_ETH0ADDR
+	string "Ethernet 0 address"
+	depends on BR2_TARGET_U_BOOT
+	help
+	  Target board MAC address for interface 0. You should have a MAC
+	  address range provided by the company who made you MAC hardware.
+
+config BR2_TARGET_U_BOOT_ETH1ADDR
+	string "Ethernet 1 address"
+	depends on BR2_TARGET_U_BOOT
+	help
+	  Target board MAC address for interface 1. You should have a MAC
+	  address range provided by the company who made you MAC hardware.
+
+config BR2_TARGET_U_BOOT_BOOTARGS
+	string "Boot arguments"
+	depends on BR2_TARGET_U_BOOT
+	default "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
+	help
+	  Set the boot arguments in U-Boot to let it boot the way you prefer by
+	  default. Typoes here will result in a non-booting target board.
+
+	  Example booting from MMC/SD-card:
+	    console=ttyS0 root=/dev/mmcblk0p1
+
+	  Example booting from flash devices (NOR, NAND, DataFlash, etc):
+	    console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2
 
-config BR2_TARGET_UBOOT_ETHADDR
-	string "Ethernet address"
-	depends on BR2_TARGET_UBOOT
-	default "04:25:fe:ed:00:18"
+config BR2_TARGET_U_BOOT_BOOTCMD
+	string "Boot command"
+	depends on BR2_TARGET_U_BOOT
+	default "fsload /boot/$(LINUX26_FORMAT); bootm"
 	help
-	  Target ip address, this should be changed for production units
+	  Set the boot command in U-Boot which specifies how U-Boot should load
+	  your kernel image, or if you want to do other commands automatically
+	  when U-Boot starts.
 
+	  Loading a kernel from MMC/SD-card:
+	    mmcinit; ext2load mmc 0:1 <RAM address>
+	    /boot/$(BR2_PACKAGE_LINUX_FORMAT); bootm
 
+	  Loading a kernel from flash devices (NOR, NAND, DataFlash, etc):
+	    fsload <RAM address> /boot/$(BR2_PACKAGE_LINUX_FORMAT); bootm
diff --git a/target/device/Atmel/u-boot/u-boot-1.3.0-100-atmel.2.patch b/target/device/Atmel/u-boot/u-boot-1.3.0-100-atmel.2.patch
new file mode 100644
index 000000000..a6d484b2d
--- /dev/null
+++ b/target/device/Atmel/u-boot/u-boot-1.3.0-100-atmel.2.patch
@@ -0,0 +1,3177 @@
+ MAINTAINERS                                       |    6 +-
+ MAKEALL                                           |    3 +
+ Makefile                                          |   13 +-
+ README                                            |    4 +-
+ board/atmel/atngw100/Makefile                     |   40 ++++
+ board/atmel/atngw100/atngw100.c                   |   73 +++++++
+ board/atmel/atngw100/config.mk                    |    3 +
+ board/atmel/atngw100/eth.c                        |   36 ++++
+ board/atmel/atngw100/flash.c                      |  232 +++++++++++++++++++++
+ board/atmel/atngw100/u-boot.lds                   |   80 +++++++
+ cpu/at32ap/at32ap7000/Makefile                    |   43 ----
+ cpu/at32ap/at32ap7000/gpio.c                      |  137 ------------
+ cpu/at32ap/at32ap700x/Makefile                    |   43 ++++
+ cpu/at32ap/at32ap700x/gpio.c                      |  144 +++++++++++++
+ cpu/at32ap/atmel_mci.c                            |   13 +-
+ include/asm-avr32/arch-at32ap7000/clk.h           |   70 ------
+ include/asm-avr32/arch-at32ap7000/gpio.h          |  212 -------------------
+ include/asm-avr32/arch-at32ap7000/hmatrix2.h      |  232 ---------------------
+ include/asm-avr32/arch-at32ap7000/memory-map.h    |   66 ------
+ include/asm-avr32/arch-at32ap7000/mmc.h           |   96 ---------
+ include/asm-avr32/arch-at32ap700x/chip-features.h |   34 +++
+ include/asm-avr32/arch-at32ap700x/clk.h           |   78 +++++++
+ include/asm-avr32/arch-at32ap700x/gpio.h          |  220 +++++++++++++++++++
+ include/asm-avr32/arch-at32ap700x/hmatrix2.h      |  232 +++++++++++++++++++++
+ include/asm-avr32/arch-at32ap700x/memory-map.h    |   66 ++++++
+ include/asm-avr32/arch-at32ap700x/mmc.h           |   96 +++++++++
+ include/configs/atngw100.h                        |  177 ++++++++++++++++
+ include/configs/atstk1002.h                       |    4 +-
+ include/configs/atstk1003.h                       |  184 ++++++++++++++++
+ include/configs/atstk1004.h                       |  185 ++++++++++++++++
+ lib_avr32/board.c                                 |   10 +
+ net/eth.c                                         |    4 +
+ 32 files changed, 1966 insertions(+), 870 deletions(-)
+ create mode 100644 board/atmel/atngw100/Makefile
+ create mode 100644 board/atmel/atngw100/atngw100.c
+ create mode 100644 board/atmel/atngw100/config.mk
+ create mode 100644 board/atmel/atngw100/eth.c
+ create mode 100644 board/atmel/atngw100/flash.c
+ create mode 100644 board/atmel/atngw100/u-boot.lds
+ delete mode 100644 cpu/at32ap/at32ap7000/Makefile
+ delete mode 100644 cpu/at32ap/at32ap7000/gpio.c
+ create mode 100644 cpu/at32ap/at32ap700x/Makefile
+ create mode 100644 cpu/at32ap/at32ap700x/gpio.c
+ delete mode 100644 include/asm-avr32/arch-at32ap7000/clk.h
+ delete mode 100644 include/asm-avr32/arch-at32ap7000/gpio.h
+ delete mode 100644 include/asm-avr32/arch-at32ap7000/hmatrix2.h
+ delete mode 100644 include/asm-avr32/arch-at32ap7000/memory-map.h
+ delete mode 100644 include/asm-avr32/arch-at32ap7000/mmc.h
+ create mode 100644 include/asm-avr32/arch-at32ap700x/chip-features.h
+ create mode 100644 include/asm-avr32/arch-at32ap700x/clk.h
+ create mode 100644 include/asm-avr32/arch-at32ap700x/gpio.h
+ create mode 100644 include/asm-avr32/arch-at32ap700x/hmatrix2.h
+ create mode 100644 include/asm-avr32/arch-at32ap700x/memory-map.h
+ create mode 100644 include/asm-avr32/arch-at32ap700x/mmc.h
+ create mode 100644 include/configs/atngw100.h
+ create mode 100644 include/configs/atstk1003.h
+ create mode 100644 include/configs/atstk1004.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index b8c1fdc..457dce3 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -630,7 +630,11 @@ Hayden Fraser <Hayden.Fraser@freescale.com>
+ 
+ Haavard Skinnemoen <hskinnemoen@atmel.com>
+ 
+-	ATSTK1000		AT32AP7000
++	ATSTK1000		AT32AP7xxx
++	ATSTK1002		AT32AP7000
++	ATSTK1003		AT32AP7001
++	ATSTK1004		AT32AP7002
++	ATNGW100		AT32AP7000
+ 
+ #########################################################################
+ # End of MAINTAINERS list						#
+diff --git a/MAKEALL b/MAKEALL
+index 20ef4e1..1538478 100755
+--- a/MAKEALL
++++ b/MAKEALL
+@@ -641,6 +641,9 @@ LIST_coldfire="			\
+ 
+ LIST_avr32="		\
+ 	atstk1002	\
++	atstk1003	\
++	atstk1004	\
++	atngw100	\
+ "
+ 
+ #########################################################################
+diff --git a/Makefile b/Makefile
+index ac4b430..2db97fd 100644
+--- a/Makefile
++++ b/Makefile
+@@ -24,7 +24,7 @@
+ VERSION = 1
+ PATCHLEVEL = 3
+ SUBLEVEL = 0
+-EXTRAVERSION =
++EXTRAVERSION = .atmel.2
+ U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
+ VERSION_FILE = $(obj)include/version_autogenerated.h
+ 
+@@ -2607,7 +2607,16 @@ bf561-ezkit_config:	unconfig
+ #########################################################################
+ 
+ atstk1002_config	:	unconfig
+-	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap7000
++	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++atstk1003_config	:	unconfig
++	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++atstk1004_config	:	unconfig
++	@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
++
++atngw100_config	:	unconfig
++	@$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
+ 
+ #########################################################################
+ #########################################################################
+diff --git a/README b/README
+index 3dad5fc..26f93c2 100644
+--- a/README
++++ b/README
+@@ -235,9 +235,7 @@ The following options need to be configured:
+ - Board Type:	Define exactly one, e.g. CONFIG_MPC8540ADS.
+ 
+ - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
+-		Define exactly one of
+-		CONFIG_ATSTK1002
+-
++		Define exactly one, e.g. CONFIG_ATSTK1002
+ 
+ - CPU Module Type: (if CONFIG_COGENT is defined)
+ 		Define exactly one of
+diff --git a/board/atmel/atngw100/Makefile b/board/atmel/atngw100/Makefile
+new file mode 100644
+index 0000000..f1ea6e6
+--- /dev/null
++++ b/board/atmel/atngw100/Makefile
+@@ -0,0 +1,40 @@
++#
++# Copyright (C) 2005-2006 Atmel Corporation
++#
++# See file CREDITS for list of people who contributed to this project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++
++include $(TOPDIR)/config.mk
++
++LIB	:= $(obj)lib$(BOARD).a
++
++COBJS	:= $(BOARD).o flash.o eth.o
++
++SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
++OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
++
++$(LIB): $(obj).depend $(OBJS)
++	$(AR) $(ARFLAGS) $@ $(OBJS)
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c
+new file mode 100644
+index 0000000..bd4b6b4
+--- /dev/null
++++ b/board/atmel/atngw100/atngw100.c
+@@ -0,0 +1,73 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#include <asm/io.h>
++#include <asm/sdram.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/hmatrix2.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++static const struct sdram_info sdram = {
++	.phys_addr	= CFG_SDRAM_BASE,
++	.row_bits	= 13,
++	.col_bits	= 9,
++	.bank_bits	= 2,
++	.cas		= 3,
++	.twr		= 2,
++	.trc		= 7,
++	.trp		= 2,
++	.trcd		= 2,
++	.tras		= 5,
++	.txsr		= 5,
++};
++
++int board_early_init_f(void)
++{
++	/* Set the SDRAM_ENABLE bit in the HEBI SFR */
++	hmatrix2_writel(SFR4, 1 << 1);
++
++	gpio_enable_ebi();
++	gpio_enable_usart1();
++
++#if defined(CONFIG_MACB)
++	gpio_enable_macb0();
++	gpio_enable_macb1();
++#endif
++#if defined(CONFIG_MMC)
++	gpio_enable_mmci();
++#endif
++
++	return 0;
++}
++
++long int initdram(int board_type)
++{
++	return sdram_init(&sdram);
++}
++
++void board_init_info(void)
++{
++	gd->bd->bi_phy_id[0] = 0x01;
++	gd->bd->bi_phy_id[1] = 0x03;
++}
+diff --git a/board/atmel/atngw100/config.mk b/board/atmel/atngw100/config.mk
+new file mode 100644
+index 0000000..9a794e5
+--- /dev/null
++++ b/board/atmel/atngw100/config.mk
+@@ -0,0 +1,3 @@
++TEXT_BASE		= 0x00000000
++PLATFORM_RELFLAGS	+= -ffunction-sections -fdata-sections
++PLATFORM_LDFLAGS	+= --gc-sections
+diff --git a/board/atmel/atngw100/eth.c b/board/atmel/atngw100/eth.c
+new file mode 100644
+index 0000000..d1d57bb
+--- /dev/null
++++ b/board/atmel/atngw100/eth.c
+@@ -0,0 +1,36 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Ethernet initialization for the AVR32 Network Gateway
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#include <asm/arch/memory-map.h>
++
++extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
++
++#ifdef CONFIG_CMD_NET
++void atngw100_eth_initialize(bd_t *bi)
++{
++	macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
++	macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
++}
++#endif
+diff --git a/board/atmel/atngw100/flash.c b/board/atmel/atngw100/flash.c
+new file mode 100644
+index 0000000..2d9423f
+--- /dev/null
++++ b/board/atmel/atngw100/flash.c
+@@ -0,0 +1,232 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#ifdef CONFIG_ATNGW100_EXT_FLASH
++#include <asm/cacheflush.h>
++#include <asm/io.h>
++#include <asm/sections.h>
++
++DECLARE_GLOBAL_DATA_PTR;
++
++flash_info_t flash_info[1];
++
++static void __flashprog flash_identify(uint16_t *flash, flash_info_t *info)
++{
++	unsigned long flags;
++
++	flags = disable_interrupts();
++
++	dcache_flush_unlocked();
++
++	writew(0xaa, flash + 0x555);
++	writew(0x55, flash + 0xaaa);
++	writew(0x90, flash + 0x555);
++	info->flash_id = readl(flash);
++	writew(0xff, flash);
++
++	readw(flash);
++
++	if (flags)
++		enable_interrupts();
++}
++
++unsigned long flash_init(void)
++{
++	unsigned long addr;
++	unsigned int i;
++
++	flash_info[0].size = CFG_FLASH_SIZE;
++	flash_info[0].sector_count = 135;
++
++	flash_identify(uncached((void *)CFG_FLASH_BASE), &flash_info[0]);
++
++	for (i = 0, addr = 0; i < 8; i++, addr += 0x2000)
++		flash_info[0].start[i] = addr;
++	for (; i < flash_info[0].sector_count; i++, addr += 0x10000)
++		flash_info[0].start[i] = addr;
++
++	return CFG_FLASH_SIZE;
++}
++
++void flash_print_info(flash_info_t *info)
++{
++	printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n",
++	       info->flash_id >> 16, info->flash_id & 0xffff);
++	printf("Size: %ld MB in %d sectors\n",
++	       info->size >> 10, info->sector_count);
++}
++
++int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last)
++{
++	unsigned long flags;
++	unsigned long start_time;
++	uint16_t *fb, *sb;
++	unsigned int i;
++	int ret;
++	uint16_t status;
++
++	if ((s_first < 0) || (s_first > s_last)
++	    || (s_last >= info->sector_count)) {
++		puts("Error: first and/or last sector out of range\n");
++		return ERR_INVAL;
++	}
++
++	for (i = s_first; i < s_last; i++)
++		if (info->protect[i]) {
++			printf("Error: sector %d is protected\n", i);
++			return ERR_PROTECTED;
++		}
++
++	fb = (uint16_t *)uncached(info->start[0]);
++
++	dcache_flush_unlocked();
++
++	for (i = s_first; (i <= s_last) && !ctrlc(); i++) {
++		printf("Erasing sector %3d...", i);
++
++		sb = (uint16_t *)uncached(info->start[i]);
++
++		flags = disable_interrupts();
++
++		start_time = get_timer(0);
++
++		/* Unlock sector */
++		writew(0xaa, fb + 0x555);
++		writew(0x70, sb);
++
++		/* Erase sector */
++		writew(0xaa, fb + 0x555);
++		writew(0x55, fb + 0xaaa);
++		writew(0x80, fb + 0x555);
++		writew(0xaa, fb + 0x555);
++		writew(0x55, fb + 0xaaa);
++		writew(0x30, sb);
++
++		/* Wait for completion */
++		ret = ERR_OK;
++		do {
++			/* TODO: Timeout */
++			status = readw(sb);
++		} while ((status != 0xffff) && !(status & 0x28));
++
++		writew(0xf0, fb);
++
++		/*
++		 * Make sure the command actually makes it to the bus
++		 * before we re-enable interrupts.
++		 */
++		readw(fb);
++
++		if (flags)
++			enable_interrupts();
++
++		if (status != 0xffff) {
++			printf("Flash erase error at address 0x%p: 0x%02x\n",
++			       sb, status);
++			ret = ERR_PROG_ERROR;
++			break;
++		}
++	}
++
++	if (ctrlc())
++		printf("User interrupt!\n");
++
++	return ERR_OK;
++}
++
++int __flashprog write_buff(flash_info_t *info, uchar *src,
++			   ulong addr, ulong count)
++{
++	unsigned long flags;
++	uint16_t *base, *p, *s, *end;
++	uint16_t word, status, status1;
++	int ret = ERR_OK;
++
++	if (addr < info->start[0]
++	    || (addr + count) > (info->start[0] + info->size)
++	    || (addr + count) < addr) {
++		puts("Error: invalid address range\n");
++		return ERR_INVAL;
++	}
++
++	if (addr & 1 || count & 1 || (unsigned int)src & 1) {
++		puts("Error: misaligned source, destination or count\n");
++		return ERR_ALIGN;
++	}
++
++	base = (uint16_t *)uncached(info->start[0]);
++	end = (uint16_t *)uncached(addr + count);
++
++	flags = disable_interrupts();
++
++	dcache_flush_unlocked();
++	sync_write_buffer();
++
++	for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src;
++	     p < end && !ctrlc(); p++, s++) {
++		word = *s;
++
++		writew(0xaa, base + 0x555);
++		writew(0x55, base + 0xaaa);
++		writew(0xa0, base + 0x555);
++		writew(word, p);
++
++		sync_write_buffer();
++
++		/* Wait for completion */
++		status1 = readw(p);
++		do {
++			/* TODO: Timeout */
++			status = status1;
++			status1 = readw(p);
++		} while (((status ^ status1) & 0x40)	/* toggled */
++			 && !(status1 & 0x28));		/* error bits */
++
++		/*
++		 * We'll need to check once again for toggle bit
++		 * because the toggle bit may stop toggling as I/O5
++		 * changes to "1" (ref at49bv642.pdf p9)
++		 */
++		status1 = readw(p);
++		status = readw(p);
++		if ((status ^ status1) & 0x40) {
++			printf("Flash write error at address 0x%p: "
++			       "0x%02x != 0x%02x\n",
++			       p, status,word);
++			ret = ERR_PROG_ERROR;
++			writew(0xf0, base);
++			readw(base);
++			break;
++		}
++
++		writew(0xf0, base);
++		readw(base);
++	}
++
++	if (flags)
++		enable_interrupts();
++
++	return ret;
++}
++
++#endif /* CONFIG_ATSTK1000_EXT_FLASH */
+diff --git a/board/atmel/atngw100/u-boot.lds b/board/atmel/atngw100/u-boot.lds
+new file mode 100644
+index 0000000..34e347a
+--- /dev/null
++++ b/board/atmel/atngw100/u-boot.lds
+@@ -0,0 +1,80 @@
++/* -*- Fundamental -*-
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++SECTIONS
++{
++	. = 0;
++	_text = .;
++	.text : {
++		*(.text)
++		*(.text.*)
++	}
++
++	. = ALIGN(32);
++	__flashprog_start = .;
++	.flashprog : {
++		*(.flashprog)
++	}
++	. = ALIGN(32);
++	__flashprog_end = .;
++	_etext = .;
++
++	.rodata : {
++		*(.rodata)
++		*(.rodata.*)
++	}
++
++	. = ALIGN(8);
++	_data = .;
++	.data : {
++		*(.data)
++		*(.data.*)
++	}
++
++	. = ALIGN(4);
++	__u_boot_cmd_start = .;
++	.u_boot_cmd : {
++		KEEP(*(.u_boot_cmd))
++	}
++	__u_boot_cmd_end = .;
++
++	. = ALIGN(4);
++	_got = .;
++	.got : {
++		*(.got)
++	}
++	_egot = .;
++
++	. = ALIGN(8);
++	_edata = .;
++
++	.bss : {
++		*(.bss)
++		*(.bss.*)
++	}
++	. = ALIGN(8);
++	_end = .;
++}
+diff --git a/cpu/at32ap/at32ap7000/Makefile b/cpu/at32ap/at32ap7000/Makefile
+deleted file mode 100644
+index d276712..0000000
+--- a/cpu/at32ap/at32ap7000/Makefile
++++ /dev/null
+@@ -1,43 +0,0 @@
+-#
+-# Copyright (C) 2005-2006 Atmel Corporation
+-#
+-# See file CREDITS for list of people who contributed to this
+-# project.
+-#
+-# This program is free software; you can redistribute it and/or
+-# modify it under the terms of the GNU General Public License as
+-# published by the Free Software Foundation; either version 2 of
+-# the License, or (at your option) any later version.
+-#
+-# This program is distributed in the hope that it will be useful,
+-# but WITHOUT ANY WARRANTY; without even the implied warranty of
+-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-# GNU General Public License for more details.
+-#
+-# You should have received a copy of the GNU General Public License
+-# along with this program; if not, write to the Free Software
+-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+-# MA 02111-1307 USA
+-#
+-
+-include $(TOPDIR)/config.mk
+-
+-LIB	:= $(obj)lib$(SOC).a
+-
+-COBJS	:= gpio.o
+-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
+-
+-all: $(obj).depend $(LIB)
+-
+-$(LIB): $(OBJS)
+-	$(AR) $(ARFLAGS) $@ $^
+-
+-#########################################################################
+-
+-# defines $(obj).depend target
+-include $(SRCTREE)/rules.mk
+-
+-sinclude $(obj).depend
+-
+-#########################################################################
+diff --git a/cpu/at32ap/at32ap7000/gpio.c b/cpu/at32ap/at32ap7000/gpio.c
+deleted file mode 100644
+index 52f5372..0000000
+--- a/cpu/at32ap/at32ap7000/gpio.c
++++ /dev/null
+@@ -1,137 +0,0 @@
+-/*
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * See file CREDITS for list of people who contributed to this
+- * project.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License as
+- * published by the Free Software Foundation; either version 2 of
+- * the License, or (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+- * MA 02111-1307 USA
+- */
+-#include <common.h>
+-
+-#include <asm/arch/gpio.h>
+-
+-/*
+- * Lots of small functions here. We depend on --gc-sections getting
+- * rid of the ones we don't need.
+- */
+-void gpio_enable_ebi(void)
+-{
+-#ifdef CFG_HSDRAMC
+-#ifndef CFG_SDRAM_16BIT
+-	gpio_select_periph_A(GPIO_PIN_PE0, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE1, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE2, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE3, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE4, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE5, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE6, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE7, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE8, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE9, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE10, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE11, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE12, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE13, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE14, 0);
+-	gpio_select_periph_A(GPIO_PIN_PE15, 0);
+-#endif
+-	gpio_select_periph_A(GPIO_PIN_PE26, 0);
+-#endif
+-}
+-
+-void gpio_enable_usart0(void)
+-{
+-	gpio_select_periph_B(GPIO_PIN_PA8, 0);
+-	gpio_select_periph_B(GPIO_PIN_PA9, 0);
+-}
+-
+-void gpio_enable_usart1(void)
+-{
+-	gpio_select_periph_A(GPIO_PIN_PA17, 0);
+-	gpio_select_periph_A(GPIO_PIN_PA18, 0);
+-}
+-
+-void gpio_enable_usart2(void)
+-{
+-	gpio_select_periph_B(GPIO_PIN_PB26, 0);
+-	gpio_select_periph_B(GPIO_PIN_PB27, 0);
+-}
+-
+-void gpio_enable_usart3(void)
+-{
+-	gpio_select_periph_B(GPIO_PIN_PB18, 0);
+-	gpio_select_periph_B(GPIO_PIN_PB19, 0);
+-}
+-
+-void gpio_enable_macb0(void)
+-{
+-	gpio_select_periph_A(GPIO_PIN_PC3,  0);	/* TXD0	*/
+-	gpio_select_periph_A(GPIO_PIN_PC4,  0);	/* TXD1	*/
+-	gpio_select_periph_A(GPIO_PIN_PC7,  0);	/* TXEN	*/
+-	gpio_select_periph_A(GPIO_PIN_PC8,  0);	/* TXCK */
+-	gpio_select_periph_A(GPIO_PIN_PC9,  0);	/* RXD0	*/
+-	gpio_select_periph_A(GPIO_PIN_PC10, 0);	/* RXD1	*/
+-	gpio_select_periph_A(GPIO_PIN_PC13, 0);	/* RXER	*/
+-	gpio_select_periph_A(GPIO_PIN_PC15, 0);	/* RXDV	*/
+-	gpio_select_periph_A(GPIO_PIN_PC16, 0);	/* MDC	*/
+-	gpio_select_periph_A(GPIO_PIN_PC17, 0);	/* MDIO	*/
+-#if !defined(CONFIG_RMII)
+-	gpio_select_periph_A(GPIO_PIN_PC0,  0);	/* COL	*/
+-	gpio_select_periph_A(GPIO_PIN_PC1,  0);	/* CRS	*/
+-	gpio_select_periph_A(GPIO_PIN_PC2,  0);	/* TXER	*/
+-	gpio_select_periph_A(GPIO_PIN_PC5,  0);	/* TXD2	*/
+-	gpio_select_periph_A(GPIO_PIN_PC6,  0);	/* TXD3 */
+-	gpio_select_periph_A(GPIO_PIN_PC11, 0);	/* RXD2	*/
+-	gpio_select_periph_A(GPIO_PIN_PC12, 0);	/* RXD3	*/
+-	gpio_select_periph_A(GPIO_PIN_PC14, 0);	/* RXCK	*/
+-	gpio_select_periph_A(GPIO_PIN_PC18, 0);	/* SPD	*/
+-#endif
+-}
+-
+-void gpio_enable_macb1(void)
+-{
+-	gpio_select_periph_B(GPIO_PIN_PD13, 0);	/* TXD0	*/
+-	gpio_select_periph_B(GPIO_PIN_PD14, 0);	/* TXD1	*/
+-	gpio_select_periph_B(GPIO_PIN_PD11, 0);	/* TXEN	*/
+-	gpio_select_periph_B(GPIO_PIN_PD12, 0);	/* TXCK */
+-	gpio_select_periph_B(GPIO_PIN_PD10, 0);	/* RXD0	*/
+-	gpio_select_periph_B(GPIO_PIN_PD6,  0);	/* RXD1	*/
+-	gpio_select_periph_B(GPIO_PIN_PD5,  0);	/* RXER	*/
+-	gpio_select_periph_B(GPIO_PIN_PD4,  0);	/* RXDV	*/
+-	gpio_select_periph_B(GPIO_PIN_PD3,  0);	/* MDC	*/
+-	gpio_select_periph_B(GPIO_PIN_PD2,  0);	/* MDIO	*/
+-#if !defined(CONFIG_RMII)
+-	gpio_select_periph_B(GPIO_PIN_PC19, 0);	/* COL	*/
+-	gpio_select_periph_B(GPIO_PIN_PC23, 0);	/* CRS	*/
+-	gpio_select_periph_B(GPIO_PIN_PC26, 0);	/* TXER	*/
+-	gpio_select_periph_B(GPIO_PIN_PC27, 0);	/* TXD2	*/
+-	gpio_select_periph_B(GPIO_PIN_PC28, 0);	/* TXD3 */
+-	gpio_select_periph_B(GPIO_PIN_PC29, 0);	/* RXD2	*/
+-	gpio_select_periph_B(GPIO_PIN_PC30, 0);	/* RXD3	*/
+-	gpio_select_periph_B(GPIO_PIN_PC24, 0);	/* RXCK	*/
+-	gpio_select_periph_B(GPIO_PIN_PD15, 0);	/* SPD	*/
+-#endif
+-}
+-
+-void gpio_enable_mmci(void)
+-{
+-	gpio_select_periph_A(GPIO_PIN_PA10, 0);	/* CLK	 */
+-	gpio_select_periph_A(GPIO_PIN_PA11, 0);	/* CMD	 */
+-	gpio_select_periph_A(GPIO_PIN_PA12, 0);	/* DATA0 */
+-	gpio_select_periph_A(GPIO_PIN_PA13, 0);	/* DATA1 */
+-	gpio_select_periph_A(GPIO_PIN_PA14, 0);	/* DATA2 */
+-	gpio_select_periph_A(GPIO_PIN_PA15, 0);	/* DATA3 */
+-}
+diff --git a/cpu/at32ap/at32ap700x/Makefile b/cpu/at32ap/at32ap700x/Makefile
+new file mode 100644
+index 0000000..d276712
+--- /dev/null
++++ b/cpu/at32ap/at32ap700x/Makefile
+@@ -0,0 +1,43 @@
++#
++# Copyright (C) 2005-2006 Atmel Corporation
++#
++# See file CREDITS for list of people who contributed to this
++# project.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB	:= $(obj)lib$(SOC).a
++
++COBJS	:= gpio.o
++SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
++OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
++
++all: $(obj).depend $(LIB)
++
++$(LIB): $(OBJS)
++	$(AR) $(ARFLAGS) $@ $^
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c
+new file mode 100644
+index 0000000..859124a
+--- /dev/null
++++ b/cpu/at32ap/at32ap700x/gpio.c
+@@ -0,0 +1,144 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#include <asm/arch/chip-features.h>
++#include <asm/arch/gpio.h>
++
++/*
++ * Lots of small functions here. We depend on --gc-sections getting
++ * rid of the ones we don't need.
++ */
++void gpio_enable_ebi(void)
++{
++#ifdef CFG_HSDRAMC
++#ifndef CFG_SDRAM_16BIT
++	gpio_select_periph_A(GPIO_PIN_PE0, 0);
++	gpio_select_periph_A(GPIO_PIN_PE1, 0);
++	gpio_select_periph_A(GPIO_PIN_PE2, 0);
++	gpio_select_periph_A(GPIO_PIN_PE3, 0);
++	gpio_select_periph_A(GPIO_PIN_PE4, 0);
++	gpio_select_periph_A(GPIO_PIN_PE5, 0);
++	gpio_select_periph_A(GPIO_PIN_PE6, 0);
++	gpio_select_periph_A(GPIO_PIN_PE7, 0);
++	gpio_select_periph_A(GPIO_PIN_PE8, 0);
++	gpio_select_periph_A(GPIO_PIN_PE9, 0);
++	gpio_select_periph_A(GPIO_PIN_PE10, 0);
++	gpio_select_periph_A(GPIO_PIN_PE11, 0);
++	gpio_select_periph_A(GPIO_PIN_PE12, 0);
++	gpio_select_periph_A(GPIO_PIN_PE13, 0);
++	gpio_select_periph_A(GPIO_PIN_PE14, 0);
++	gpio_select_periph_A(GPIO_PIN_PE15, 0);
++#endif
++	gpio_select_periph_A(GPIO_PIN_PE26, 0);
++#endif
++}
++
++#ifdef AT32AP700x_CHIP_HAS_USART
++void gpio_enable_usart0(void)
++{
++	gpio_select_periph_B(GPIO_PIN_PA8, 0);
++	gpio_select_periph_B(GPIO_PIN_PA9, 0);
++}
++
++void gpio_enable_usart1(void)
++{
++	gpio_select_periph_A(GPIO_PIN_PA17, 0);
++	gpio_select_periph_A(GPIO_PIN_PA18, 0);
++}
++
++void gpio_enable_usart2(void)
++{
++	gpio_select_periph_B(GPIO_PIN_PB26, 0);
++	gpio_select_periph_B(GPIO_PIN_PB27, 0);
++}
++
++void gpio_enable_usart3(void)
++{
++	gpio_select_periph_B(GPIO_PIN_PB17, 0);
++	gpio_select_periph_B(GPIO_PIN_PB18, 0);
++}
++#endif
++
++#ifdef AT32AP700x_CHIP_HAS_MACB
++void gpio_enable_macb0(void)
++{
++	gpio_select_periph_A(GPIO_PIN_PC3,  0);	/* TXD0	*/
++	gpio_select_periph_A(GPIO_PIN_PC4,  0);	/* TXD1	*/
++	gpio_select_periph_A(GPIO_PIN_PC7,  0);	/* TXEN	*/
++	gpio_select_periph_A(GPIO_PIN_PC8,  0);	/* TXCK */
++	gpio_select_periph_A(GPIO_PIN_PC9,  0);	/* RXD0	*/
++	gpio_select_periph_A(GPIO_PIN_PC10, 0);	/* RXD1	*/
++	gpio_select_periph_A(GPIO_PIN_PC13, 0);	/* RXER	*/
++	gpio_select_periph_A(GPIO_PIN_PC15, 0);	/* RXDV	*/
++	gpio_select_periph_A(GPIO_PIN_PC16, 0);	/* MDC	*/
++	gpio_select_periph_A(GPIO_PIN_PC17, 0);	/* MDIO	*/
++#if !defined(CONFIG_RMII)
++	gpio_select_periph_A(GPIO_PIN_PC0,  0);	/* COL	*/
++	gpio_select_periph_A(GPIO_PIN_PC1,  0);	/* CRS	*/
++	gpio_select_periph_A(GPIO_PIN_PC2,  0);	/* TXER	*/
++	gpio_select_periph_A(GPIO_PIN_PC5,  0);	/* TXD2	*/
++	gpio_select_periph_A(GPIO_PIN_PC6,  0);	/* TXD3 */
++	gpio_select_periph_A(GPIO_PIN_PC11, 0);	/* RXD2	*/
++	gpio_select_periph_A(GPIO_PIN_PC12, 0);	/* RXD3	*/
++	gpio_select_periph_A(GPIO_PIN_PC14, 0);	/* RXCK	*/
++	gpio_select_periph_A(GPIO_PIN_PC18, 0);	/* SPD	*/
++#endif
++}
++
++void gpio_enable_macb1(void)
++{
++	gpio_select_periph_B(GPIO_PIN_PD13, 0);	/* TXD0	*/
++	gpio_select_periph_B(GPIO_PIN_PD14, 0);	/* TXD1	*/
++	gpio_select_periph_B(GPIO_PIN_PD11, 0);	/* TXEN	*/
++	gpio_select_periph_B(GPIO_PIN_PD12, 0);	/* TXCK */
++	gpio_select_periph_B(GPIO_PIN_PD10, 0);	/* RXD0	*/
++	gpio_select_periph_B(GPIO_PIN_PD6,  0);	/* RXD1	*/
++	gpio_select_periph_B(GPIO_PIN_PD5,  0);	/* RXER	*/
++	gpio_select_periph_B(GPIO_PIN_PD4,  0);	/* RXDV	*/
++	gpio_select_periph_B(GPIO_PIN_PD3,  0);	/* MDC	*/
++	gpio_select_periph_B(GPIO_PIN_PD2,  0);	/* MDIO	*/
++#if !defined(CONFIG_RMII)
++	gpio_select_periph_B(GPIO_PIN_PC19, 0);	/* COL	*/
++	gpio_select_periph_B(GPIO_PIN_PC23, 0);	/* CRS	*/
++	gpio_select_periph_B(GPIO_PIN_PC26, 0);	/* TXER	*/
++	gpio_select_periph_B(GPIO_PIN_PC27, 0);	/* TXD2	*/
++	gpio_select_periph_B(GPIO_PIN_PC28, 0);	/* TXD3 */
++	gpio_select_periph_B(GPIO_PIN_PC29, 0);	/* RXD2	*/
++	gpio_select_periph_B(GPIO_PIN_PC30, 0);	/* RXD3	*/
++	gpio_select_periph_B(GPIO_PIN_PC24, 0);	/* RXCK	*/
++	gpio_select_periph_B(GPIO_PIN_PD15, 0);	/* SPD	*/
++#endif
++}
++#endif
++
++#ifdef AT32AP700x_CHIP_HAS_MMCI
++void gpio_enable_mmci(void)
++{
++	gpio_select_periph_A(GPIO_PIN_PA10, 0);	/* CLK	 */
++	gpio_select_periph_A(GPIO_PIN_PA11, 0);	/* CMD	 */
++	gpio_select_periph_A(GPIO_PIN_PA12, 0);	/* DATA0 */
++	gpio_select_periph_A(GPIO_PIN_PA13, 0);	/* DATA1 */
++	gpio_select_periph_A(GPIO_PIN_PA14, 0);	/* DATA2 */
++	gpio_select_periph_A(GPIO_PIN_PA15, 0);	/* DATA3 */
++}
++#endif
+diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c
+index cf48be1..f59dfb5 100644
+--- a/cpu/at32ap/atmel_mci.c
++++ b/cpu/at32ap/atmel_mci.c
+@@ -198,11 +198,11 @@ mmc_bread(int dev, unsigned long start, lbaint_t blkcnt,
+ 
+ 	/* Put the device into Transfer state */
+ 	ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, R1 | NCR);
+-	if (ret) goto fail;
++	if (ret) goto out;
+ 
+ 	/* Set block length */
+ 	ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, R1 | NCR);
+-	if (ret) goto fail;
++	if (ret) goto out;
+ 
+ 	pr_debug("MCI_DTOR = %08lx\n", mmci_readl(DTOR));
+ 
+@@ -211,7 +211,7 @@ mmc_bread(int dev, unsigned long start, lbaint_t blkcnt,
+ 			      start * mmc_blkdev.blksz, resp,
+ 			      (R1 | NCR | TRCMD_START | TRDIR_READ
+ 			       | TRTYP_BLOCK));
+-		if (ret) goto fail;
++		if (ret) goto out;
+ 
+ 		ret = -EIO;
+ 		wordcount = 0;
+@@ -219,7 +219,7 @@ mmc_bread(int dev, unsigned long start, lbaint_t blkcnt,
+ 			do {
+ 				status = mmci_readl(SR);
+ 				if (status & (ERROR_FLAGS | MMCI_BIT(OVRE)))
+-					goto fail;
++					goto read_error;
+ 			} while (!(status & MMCI_BIT(RXRDY)));
+ 
+ 			if (status & MMCI_BIT(RXRDY)) {
+@@ -244,9 +244,10 @@ out:
+ 	mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, NCR);
+ 	return i;
+ 
+-fail:
++read_error:
+ 	mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, R1 | NCR);
+-	printf("mmc: bread failed, card status = %08x\n", card_status);
++	printf("mmc: bread failed, status = %08x, card status = %08x\n",
++	       status, card_status);
+ 	goto out;
+ }
+ 
+diff --git a/include/asm-avr32/arch-at32ap7000/clk.h b/include/asm-avr32/arch-at32ap7000/clk.h
+deleted file mode 100644
+index 7e20d97..0000000
+--- a/include/asm-avr32/arch-at32ap7000/clk.h
++++ /dev/null
+@@ -1,70 +0,0 @@
+-/*
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * See file CREDITS for list of people who contributed to this
+- * project.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License as
+- * published by the Free Software Foundation; either version 2 of
+- * the License, or (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+- * MA 02111-1307 USA
+- */
+-#ifndef __ASM_AVR32_ARCH_CLK_H__
+-#define __ASM_AVR32_ARCH_CLK_H__
+-
+-#ifdef CONFIG_PLL
+-#define MAIN_CLK_RATE ((CFG_OSC0_HZ / CFG_PLL0_DIV) * CFG_PLL0_MUL)
+-#else
+-#define MAIN_CLK_RATE (CFG_OSC0_HZ)
+-#endif
+-
+-static inline unsigned long get_cpu_clk_rate(void)
+-{
+-	return MAIN_CLK_RATE >> CFG_CLKDIV_CPU;
+-}
+-static inline unsigned long get_hsb_clk_rate(void)
+-{
+-	return MAIN_CLK_RATE >> CFG_CLKDIV_HSB;
+-}
+-static inline unsigned long get_pba_clk_rate(void)
+-{
+-	return MAIN_CLK_RATE >> CFG_CLKDIV_PBA;
+-}
+-static inline unsigned long get_pbb_clk_rate(void)
+-{
+-	return MAIN_CLK_RATE >> CFG_CLKDIV_PBB;
+-}
+-
+-/* Accessors for specific devices. More will be added as needed. */
+-static inline unsigned long get_sdram_clk_rate(void)
+-{
+-	return get_hsb_clk_rate();
+-}
+-static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
+-{
+-	return get_pba_clk_rate();
+-}
+-static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
+-{
+-	return get_pbb_clk_rate();
+-}
+-static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)
+-{
+-	return get_hsb_clk_rate();
+-}
+-static inline unsigned long get_mci_clk_rate(void)
+-{
+-	return get_pbb_clk_rate();
+-}
+-
+-#endif /* __ASM_AVR32_ARCH_CLK_H__ */
+diff --git a/include/asm-avr32/arch-at32ap7000/gpio.h b/include/asm-avr32/arch-at32ap7000/gpio.h
+deleted file mode 100644
+index e4812d4..0000000
+--- a/include/asm-avr32/arch-at32ap7000/gpio.h
++++ /dev/null
+@@ -1,212 +0,0 @@
+-/*
+- * Copyright (C) 2006 Atmel Corporation
+- *
+- * See file CREDITS for list of people who contributed to this
+- * project.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License as
+- * published by the Free Software Foundation; either version 2 of
+- * the License, or (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+- * MA 02111-1307 USA
+- */
+-#ifndef __ASM_AVR32_ARCH_GPIO_H__
+-#define __ASM_AVR32_ARCH_GPIO_H__
+-
+-#include <asm/arch/memory-map.h>
+-
+-#define NR_GPIO_CONTROLLERS	5
+-
+-/*
+- * Pin numbers identifying specific GPIO pins on the chip.
+- */
+-#define GPIO_PIOA_BASE	(0)
+-#define GPIO_PIN_PA0	(GPIO_PIOA_BASE +  0)
+-#define GPIO_PIN_PA1	(GPIO_PIOA_BASE +  1)
+-#define GPIO_PIN_PA2	(GPIO_PIOA_BASE +  2)
+-#define GPIO_PIN_PA3	(GPIO_PIOA_BASE +  3)
+-#define GPIO_PIN_PA4	(GPIO_PIOA_BASE +  4)
+-#define GPIO_PIN_PA5	(GPIO_PIOA_BASE +  5)
+-#define GPIO_PIN_PA6	(GPIO_PIOA_BASE +  6)
+-#define GPIO_PIN_PA7	(GPIO_PIOA_BASE +  7)
+-#define GPIO_PIN_PA8	(GPIO_PIOA_BASE +  8)
+-#define GPIO_PIN_PA9	(GPIO_PIOA_BASE +  9)
+-#define GPIO_PIN_PA10	(GPIO_PIOA_BASE + 10)
+-#define GPIO_PIN_PA11	(GPIO_PIOA_BASE + 11)
+-#define GPIO_PIN_PA12	(GPIO_PIOA_BASE + 12)
+-#define GPIO_PIN_PA13	(GPIO_PIOA_BASE + 13)
+-#define GPIO_PIN_PA14	(GPIO_PIOA_BASE + 14)
+-#define GPIO_PIN_PA15	(GPIO_PIOA_BASE + 15)
+-#define GPIO_PIN_PA16	(GPIO_PIOA_BASE + 16)
+-#define GPIO_PIN_PA17	(GPIO_PIOA_BASE + 17)
+-#define GPIO_PIN_PA18	(GPIO_PIOA_BASE + 18)
+-#define GPIO_PIN_PA19	(GPIO_PIOA_BASE + 19)
+-#define GPIO_PIN_PA20	(GPIO_PIOA_BASE + 20)
+-#define GPIO_PIN_PA21	(GPIO_PIOA_BASE + 21)
+-#define GPIO_PIN_PA22	(GPIO_PIOA_BASE + 22)
+-#define GPIO_PIN_PA23	(GPIO_PIOA_BASE + 23)
+-#define GPIO_PIN_PA24	(GPIO_PIOA_BASE + 24)
+-#define GPIO_PIN_PA25	(GPIO_PIOA_BASE + 25)
+-#define GPIO_PIN_PA26	(GPIO_PIOA_BASE + 26)
+-#define GPIO_PIN_PA27	(GPIO_PIOA_BASE + 27)
+-#define GPIO_PIN_PA28	(GPIO_PIOA_BASE + 28)
+-#define GPIO_PIN_PA29	(GPIO_PIOA_BASE + 29)
+-#define GPIO_PIN_PA30	(GPIO_PIOA_BASE + 30)
+-#define GPIO_PIN_PA31	(GPIO_PIOA_BASE + 31)
+-
+-#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
+-#define GPIO_PIN_PB0	(GPIO_PIOB_BASE +  0)
+-#define GPIO_PIN_PB1	(GPIO_PIOB_BASE +  1)
+-#define GPIO_PIN_PB2	(GPIO_PIOB_BASE +  2)
+-#define GPIO_PIN_PB3	(GPIO_PIOB_BASE +  3)
+-#define GPIO_PIN_PB4	(GPIO_PIOB_BASE +  4)
+-#define GPIO_PIN_PB5	(GPIO_PIOB_BASE +  5)
+-#define GPIO_PIN_PB6	(GPIO_PIOB_BASE +  6)
+-#define GPIO_PIN_PB7	(GPIO_PIOB_BASE +  7)
+-#define GPIO_PIN_PB8	(GPIO_PIOB_BASE +  8)
+-#define GPIO_PIN_PB9	(GPIO_PIOB_BASE +  9)
+-#define GPIO_PIN_PB10	(GPIO_PIOB_BASE + 10)
+-#define GPIO_PIN_PB11	(GPIO_PIOB_BASE + 11)
+-#define GPIO_PIN_PB12	(GPIO_PIOB_BASE + 12)
+-#define GPIO_PIN_PB13	(GPIO_PIOB_BASE + 13)
+-#define GPIO_PIN_PB14	(GPIO_PIOB_BASE + 14)
+-#define GPIO_PIN_PB15	(GPIO_PIOB_BASE + 15)
+-#define GPIO_PIN_PB16	(GPIO_PIOB_BASE + 16)
+-#define GPIO_PIN_PB17	(GPIO_PIOB_BASE + 17)
+-#define GPIO_PIN_PB18	(GPIO_PIOB_BASE + 18)
+-#define GPIO_PIN_PB19	(GPIO_PIOB_BASE + 19)
+-#define GPIO_PIN_PB20	(GPIO_PIOB_BASE + 20)
+-#define GPIO_PIN_PB21	(GPIO_PIOB_BASE + 21)
+-#define GPIO_PIN_PB22	(GPIO_PIOB_BASE + 22)
+-#define GPIO_PIN_PB23	(GPIO_PIOB_BASE + 23)
+-#define GPIO_PIN_PB24	(GPIO_PIOB_BASE + 24)
+-#define GPIO_PIN_PB25	(GPIO_PIOB_BASE + 25)
+-#define GPIO_PIN_PB26	(GPIO_PIOB_BASE + 26)
+-#define GPIO_PIN_PB27	(GPIO_PIOB_BASE + 27)
+-#define GPIO_PIN_PB28	(GPIO_PIOB_BASE + 28)
+-#define GPIO_PIN_PB29	(GPIO_PIOB_BASE + 29)
+-#define GPIO_PIN_PB30	(GPIO_PIOB_BASE + 30)
+-
+-#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
+-#define GPIO_PIN_PC0	(GPIO_PIOC_BASE +  0)
+-#define GPIO_PIN_PC1	(GPIO_PIOC_BASE +  1)
+-#define GPIO_PIN_PC2	(GPIO_PIOC_BASE +  2)
+-#define GPIO_PIN_PC3	(GPIO_PIOC_BASE +  3)
+-#define GPIO_PIN_PC4	(GPIO_PIOC_BASE +  4)
+-#define GPIO_PIN_PC5	(GPIO_PIOC_BASE +  5)
+-#define GPIO_PIN_PC6	(GPIO_PIOC_BASE +  6)
+-#define GPIO_PIN_PC7	(GPIO_PIOC_BASE +  7)
+-#define GPIO_PIN_PC8	(GPIO_PIOC_BASE +  8)
+-#define GPIO_PIN_PC9	(GPIO_PIOC_BASE +  9)
+-#define GPIO_PIN_PC10	(GPIO_PIOC_BASE + 10)
+-#define GPIO_PIN_PC11	(GPIO_PIOC_BASE + 11)
+-#define GPIO_PIN_PC12	(GPIO_PIOC_BASE + 12)
+-#define GPIO_PIN_PC13	(GPIO_PIOC_BASE + 13)
+-#define GPIO_PIN_PC14	(GPIO_PIOC_BASE + 14)
+-#define GPIO_PIN_PC15	(GPIO_PIOC_BASE + 15)
+-#define GPIO_PIN_PC16	(GPIO_PIOC_BASE + 16)
+-#define GPIO_PIN_PC17	(GPIO_PIOC_BASE + 17)
+-#define GPIO_PIN_PC18	(GPIO_PIOC_BASE + 18)
+-#define GPIO_PIN_PC19	(GPIO_PIOC_BASE + 19)
+-#define GPIO_PIN_PC20	(GPIO_PIOC_BASE + 20)
+-#define GPIO_PIN_PC21	(GPIO_PIOC_BASE + 21)
+-#define GPIO_PIN_PC22	(GPIO_PIOC_BASE + 22)
+-#define GPIO_PIN_PC23	(GPIO_PIOC_BASE + 23)
+-#define GPIO_PIN_PC24	(GPIO_PIOC_BASE + 24)
+-#define GPIO_PIN_PC25	(GPIO_PIOC_BASE + 25)
+-#define GPIO_PIN_PC26	(GPIO_PIOC_BASE + 26)
+-#define GPIO_PIN_PC27	(GPIO_PIOC_BASE + 27)
+-#define GPIO_PIN_PC28	(GPIO_PIOC_BASE + 28)
+-#define GPIO_PIN_PC29	(GPIO_PIOC_BASE + 29)
+-#define GPIO_PIN_PC30	(GPIO_PIOC_BASE + 30)
+-#define GPIO_PIN_PC31	(GPIO_PIOC_BASE + 31)
+-
+-#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
+-#define GPIO_PIN_PD0	(GPIO_PIOD_BASE +  0)
+-#define GPIO_PIN_PD1	(GPIO_PIOD_BASE +  1)
+-#define GPIO_PIN_PD2	(GPIO_PIOD_BASE +  2)
+-#define GPIO_PIN_PD3	(GPIO_PIOD_BASE +  3)
+-#define GPIO_PIN_PD4	(GPIO_PIOD_BASE +  4)
+-#define GPIO_PIN_PD5	(GPIO_PIOD_BASE +  5)
+-#define GPIO_PIN_PD6	(GPIO_PIOD_BASE +  6)
+-#define GPIO_PIN_PD7	(GPIO_PIOD_BASE +  7)
+-#define GPIO_PIN_PD8	(GPIO_PIOD_BASE +  8)
+-#define GPIO_PIN_PD9	(GPIO_PIOD_BASE +  9)
+-#define GPIO_PIN_PD10	(GPIO_PIOD_BASE + 10)
+-#define GPIO_PIN_PD11	(GPIO_PIOD_BASE + 11)
+-#define GPIO_PIN_PD12	(GPIO_PIOD_BASE + 12)
+-#define GPIO_PIN_PD13	(GPIO_PIOD_BASE + 13)
+-#define GPIO_PIN_PD14	(GPIO_PIOD_BASE + 14)
+-#define GPIO_PIN_PD15	(GPIO_PIOD_BASE + 15)
+-#define GPIO_PIN_PD16	(GPIO_PIOD_BASE + 16)
+-#define GPIO_PIN_PD17	(GPIO_PIOD_BASE + 17)
+-
+-#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
+-#define GPIO_PIN_PE0	(GPIO_PIOE_BASE +  0)
+-#define GPIO_PIN_PE1	(GPIO_PIOE_BASE +  1)
+-#define GPIO_PIN_PE2	(GPIO_PIOE_BASE +  2)
+-#define GPIO_PIN_PE3	(GPIO_PIOE_BASE +  3)
+-#define GPIO_PIN_PE4	(GPIO_PIOE_BASE +  4)
+-#define GPIO_PIN_PE5	(GPIO_PIOE_BASE +  5)
+-#define GPIO_PIN_PE6	(GPIO_PIOE_BASE +  6)
+-#define GPIO_PIN_PE7	(GPIO_PIOE_BASE +  7)
+-#define GPIO_PIN_PE8	(GPIO_PIOE_BASE +  8)
+-#define GPIO_PIN_PE9	(GPIO_PIOE_BASE +  9)
+-#define GPIO_PIN_PE10	(GPIO_PIOE_BASE + 10)
+-#define GPIO_PIN_PE11	(GPIO_PIOE_BASE + 11)
+-#define GPIO_PIN_PE12	(GPIO_PIOE_BASE + 12)
+-#define GPIO_PIN_PE13	(GPIO_PIOE_BASE + 13)
+-#define GPIO_PIN_PE14	(GPIO_PIOE_BASE + 14)
+-#define GPIO_PIN_PE15	(GPIO_PIOE_BASE + 15)
+-#define GPIO_PIN_PE16	(GPIO_PIOE_BASE + 16)
+-#define GPIO_PIN_PE17	(GPIO_PIOE_BASE + 17)
+-#define GPIO_PIN_PE18	(GPIO_PIOE_BASE + 18)
+-#define GPIO_PIN_PE19	(GPIO_PIOE_BASE + 19)
+-#define GPIO_PIN_PE20	(GPIO_PIOE_BASE + 20)
+-#define GPIO_PIN_PE21	(GPIO_PIOE_BASE + 21)
+-#define GPIO_PIN_PE22	(GPIO_PIOE_BASE + 22)
+-#define GPIO_PIN_PE23	(GPIO_PIOE_BASE + 23)
+-#define GPIO_PIN_PE24	(GPIO_PIOE_BASE + 24)
+-#define GPIO_PIN_PE25	(GPIO_PIOE_BASE + 25)
+-#define GPIO_PIN_PE26	(GPIO_PIOE_BASE + 26)
+-
+-static inline void *gpio_pin_to_addr(unsigned int pin)
+-{
+-	switch (pin >> 5) {
+-	case 0:
+-		return (void *)PIOA_BASE;
+-	case 1:
+-		return (void *)PIOB_BASE;
+-	case 2:
+-		return (void *)PIOC_BASE;
+-	case 3:
+-		return (void *)PIOD_BASE;
+-	case 4:
+-		return (void *)PIOE_BASE;
+-	default:
+-		return NULL;
+-	}
+-}
+-
+-void gpio_select_periph_A(unsigned int pin, int use_pullup);
+-void gpio_select_periph_B(unsigned int pin, int use_pullup);
+-
+-void gpio_enable_ebi(void);
+-void gpio_enable_usart0(void);
+-void gpio_enable_usart1(void);
+-void gpio_enable_usart2(void);
+-void gpio_enable_usart3(void);
+-void gpio_enable_macb0(void);
+-void gpio_enable_macb1(void);
+-void gpio_enable_mmci(void);
+-
+-#endif /* __ASM_AVR32_ARCH_GPIO_H__ */
+diff --git a/include/asm-avr32/arch-at32ap7000/hmatrix2.h b/include/asm-avr32/arch-at32ap7000/hmatrix2.h
+deleted file mode 100644
+index b0e787a..0000000
+--- a/include/asm-avr32/arch-at32ap7000/hmatrix2.h
++++ /dev/null
+@@ -1,232 +0,0 @@
+-/*
+- * Register definition for the High-speed Bus Matrix
+- */
+-#ifndef __ASM_AVR32_HMATRIX2_H__
+-#define __ASM_AVR32_HMATRIX2_H__
+-
+-/* HMATRIX2 register offsets */
+-#define HMATRIX2_MCFG0				0x0000
+-#define HMATRIX2_MCFG1				0x0004
+-#define HMATRIX2_MCFG2				0x0008
+-#define HMATRIX2_MCFG3				0x000c
+-#define HMATRIX2_MCFG4				0x0010
+-#define HMATRIX2_MCFG5				0x0014
+-#define HMATRIX2_MCFG6				0x0018
+-#define HMATRIX2_MCFG7				0x001c
+-#define HMATRIX2_MCFG8				0x0020
+-#define HMATRIX2_MCFG9				0x0024
+-#define HMATRIX2_MCFG10				0x0028
+-#define HMATRIX2_MCFG11				0x002c
+-#define HMATRIX2_MCFG12				0x0030
+-#define HMATRIX2_MCFG13				0x0034
+-#define HMATRIX2_MCFG14				0x0038
+-#define HMATRIX2_MCFG15				0x003c
+-#define HMATRIX2_SCFG0				0x0040
+-#define HMATRIX2_SCFG1				0x0044
+-#define HMATRIX2_SCFG2				0x0048
+-#define HMATRIX2_SCFG3				0x004c
+-#define HMATRIX2_SCFG4				0x0050
+-#define HMATRIX2_SCFG5				0x0054
+-#define HMATRIX2_SCFG6				0x0058
+-#define HMATRIX2_SCFG7				0x005c
+-#define HMATRIX2_SCFG8				0x0060
+-#define HMATRIX2_SCFG9				0x0064
+-#define HMATRIX2_SCFG10				0x0068
+-#define HMATRIX2_SCFG11				0x006c
+-#define HMATRIX2_SCFG12				0x0070
+-#define HMATRIX2_SCFG13				0x0074
+-#define HMATRIX2_SCFG14				0x0078
+-#define HMATRIX2_SCFG15				0x007c
+-#define HMATRIX2_PRAS0				0x0080
+-#define HMATRIX2_PRBS0				0x0084
+-#define HMATRIX2_PRAS1				0x0088
+-#define HMATRIX2_PRBS1				0x008c
+-#define HMATRIX2_PRAS2				0x0090
+-#define HMATRIX2_PRBS2				0x0094
+-#define HMATRIX2_PRAS3				0x0098
+-#define HMATRIX2_PRBS3				0x009c
+-#define HMATRIX2_PRAS4				0x00a0
+-#define HMATRIX2_PRBS4				0x00a4
+-#define HMATRIX2_PRAS5				0x00a8
+-#define HMATRIX2_PRBS5				0x00ac
+-#define HMATRIX2_PRAS6				0x00b0
+-#define HMATRIX2_PRBS6				0x00b4
+-#define HMATRIX2_PRAS7				0x00b8
+-#define HMATRIX2_PRBS7				0x00bc
+-#define HMATRIX2_PRAS8				0x00c0
+-#define HMATRIX2_PRBS8				0x00c4
+-#define HMATRIX2_PRAS9				0x00c8
+-#define HMATRIX2_PRBS9				0x00cc
+-#define HMATRIX2_PRAS10				0x00d0
+-#define HMATRIX2_PRBS10				0x00d4
+-#define HMATRIX2_PRAS11				0x00d8
+-#define HMATRIX2_PRBS11				0x00dc
+-#define HMATRIX2_PRAS12				0x00e0
+-#define HMATRIX2_PRBS12				0x00e4
+-#define HMATRIX2_PRAS13				0x00e8
+-#define HMATRIX2_PRBS13				0x00ec
+-#define HMATRIX2_PRAS14				0x00f0
+-#define HMATRIX2_PRBS14				0x00f4
+-#define HMATRIX2_PRAS15				0x00f8
+-#define HMATRIX2_PRBS15				0x00fc
+-#define HMATRIX2_MRCR				0x0100
+-#define HMATRIX2_SFR0				0x0110
+-#define HMATRIX2_SFR1				0x0114
+-#define HMATRIX2_SFR2				0x0118
+-#define HMATRIX2_SFR3				0x011c
+-#define HMATRIX2_SFR4				0x0120
+-#define HMATRIX2_SFR5				0x0124
+-#define HMATRIX2_SFR6				0x0128
+-#define HMATRIX2_SFR7				0x012c
+-#define HMATRIX2_SFR8				0x0130
+-#define HMATRIX2_SFR9				0x0134
+-#define HMATRIX2_SFR10				0x0138
+-#define HMATRIX2_SFR11				0x013c
+-#define HMATRIX2_SFR12				0x0140
+-#define HMATRIX2_SFR13				0x0144
+-#define HMATRIX2_SFR14				0x0148
+-#define HMATRIX2_SFR15				0x014c
+-#define HMATRIX2_VERSION			0x01fc
+-
+-/* Bitfields in MCFG0 */
+-#define HMATRIX2_ULBT_OFFSET			0
+-#define HMATRIX2_ULBT_SIZE			3
+-
+-/* Bitfields in SCFG0 */
+-#define HMATRIX2_SLOT_CYCLE_OFFSET		0
+-#define HMATRIX2_SLOT_CYCLE_SIZE		8
+-#define HMATRIX2_DEFMSTR_TYPE_OFFSET		16
+-#define HMATRIX2_DEFMSTR_TYPE_SIZE		2
+-#define HMATRIX2_FIXED_DEFMSTR_OFFSET		18
+-#define HMATRIX2_FIXED_DEFMSTR_SIZE		4
+-#define HMATRIX2_ARBT_OFFSET			24
+-#define HMATRIX2_ARBT_SIZE			2
+-
+-/* Bitfields in PRAS0 */
+-#define HMATRIX2_M0PR_OFFSET			0
+-#define HMATRIX2_M0PR_SIZE			4
+-#define HMATRIX2_M1PR_OFFSET			4
+-#define HMATRIX2_M1PR_SIZE			4
+-#define HMATRIX2_M2PR_OFFSET			8
+-#define HMATRIX2_M2PR_SIZE			4
+-#define HMATRIX2_M3PR_OFFSET			12
+-#define HMATRIX2_M3PR_SIZE			4
+-#define HMATRIX2_M4PR_OFFSET			16
+-#define HMATRIX2_M4PR_SIZE			4
+-#define HMATRIX2_M5PR_OFFSET			20
+-#define HMATRIX2_M5PR_SIZE			4
+-#define HMATRIX2_M6PR_OFFSET			24
+-#define HMATRIX2_M6PR_SIZE			4
+-#define HMATRIX2_M7PR_OFFSET			28
+-#define HMATRIX2_M7PR_SIZE			4
+-
+-/* Bitfields in PRBS0 */
+-#define HMATRIX2_M8PR_OFFSET			0
+-#define HMATRIX2_M8PR_SIZE			4
+-#define HMATRIX2_M9PR_OFFSET			4
+-#define HMATRIX2_M9PR_SIZE			4
+-#define HMATRIX2_M10PR_OFFSET			8
+-#define HMATRIX2_M10PR_SIZE			4
+-#define HMATRIX2_M11PR_OFFSET			12
+-#define HMATRIX2_M11PR_SIZE			4
+-#define HMATRIX2_M12PR_OFFSET			16
+-#define HMATRIX2_M12PR_SIZE			4
+-#define HMATRIX2_M13PR_OFFSET			20
+-#define HMATRIX2_M13PR_SIZE			4
+-#define HMATRIX2_M14PR_OFFSET			24
+-#define HMATRIX2_M14PR_SIZE			4
+-#define HMATRIX2_M15PR_OFFSET			28
+-#define HMATRIX2_M15PR_SIZE			4
+-
+-/* Bitfields in MRCR */
+-#define HMATRIX2_RBC0_OFFSET			0
+-#define HMATRIX2_RBC0_SIZE			1
+-#define HMATRIX2_RBC1_OFFSET			1
+-#define HMATRIX2_RBC1_SIZE			1
+-#define HMATRIX2_RBC2_OFFSET			2
+-#define HMATRIX2_RBC2_SIZE			1
+-#define HMATRIX2_RBC3_OFFSET			3
+-#define HMATRIX2_RBC3_SIZE			1
+-#define HMATRIX2_RBC4_OFFSET			4
+-#define HMATRIX2_RBC4_SIZE			1
+-#define HMATRIX2_RBC5_OFFSET			5
+-#define HMATRIX2_RBC5_SIZE			1
+-#define HMATRIX2_RBC6_OFFSET			6
+-#define HMATRIX2_RBC6_SIZE			1
+-#define HMATRIX2_RBC7_OFFSET			7
+-#define HMATRIX2_RBC7_SIZE			1
+-#define HMATRIX2_RBC8_OFFSET			8
+-#define HMATRIX2_RBC8_SIZE			1
+-#define HMATRIX2_RBC9_OFFSET			9
+-#define HMATRIX2_RBC9_SIZE			1
+-#define HMATRIX2_RBC10_OFFSET			10
+-#define HMATRIX2_RBC10_SIZE			1
+-#define HMATRIX2_RBC11_OFFSET			11
+-#define HMATRIX2_RBC11_SIZE			1
+-#define HMATRIX2_RBC12_OFFSET			12
+-#define HMATRIX2_RBC12_SIZE			1
+-#define HMATRIX2_RBC13_OFFSET			13
+-#define HMATRIX2_RBC13_SIZE			1
+-#define HMATRIX2_RBC14_OFFSET			14
+-#define HMATRIX2_RBC14_SIZE			1
+-#define HMATRIX2_RBC15_OFFSET			15
+-#define HMATRIX2_RBC15_SIZE			1
+-
+-/* Bitfields in SFR0 */
+-#define HMATRIX2_SFR_OFFSET			0
+-#define HMATRIX2_SFR_SIZE			32
+-
+-/* Bitfields in SFR4 */
+-#define HMATRIX2_CS1A_OFFSET			1
+-#define HMATRIX2_CS1A_SIZE			1
+-#define HMATRIX2_CS3A_OFFSET			3
+-#define HMATRIX2_CS3A_SIZE			1
+-#define HMATRIX2_CS4A_OFFSET			4
+-#define HMATRIX2_CS4A_SIZE			1
+-#define HMATRIX2_CS5A_OFFSET			5
+-#define HMATRIX2_CS5A_SIZE			1
+-#define HMATRIX2_DBPUC_OFFSET			8
+-#define HMATRIX2_DBPUC_SIZE			1
+-
+-/* Bitfields in VERSION */
+-#define HMATRIX2_VERSION_OFFSET			0
+-#define HMATRIX2_VERSION_SIZE			12
+-#define HMATRIX2_MFN_OFFSET			16
+-#define HMATRIX2_MFN_SIZE			3
+-
+-/* Constants for ULBT */
+-#define HMATRIX2_ULBT_INFINITE			0
+-#define HMATRIX2_ULBT_SINGLE			1
+-#define HMATRIX2_ULBT_FOUR_BEAT			2
+-#define HMATRIX2_ULBT_SIXTEEN_BEAT		4
+-
+-/* Constants for DEFMSTR_TYPE */
+-#define HMATRIX2_DEFMSTR_TYPE_NO_DEFAULT	0
+-#define HMATRIX2_DEFMSTR_TYPE_LAST_DEFAULT	1
+-#define HMATRIX2_DEFMSTR_TYPE_FIXED_DEFAULT	2
+-
+-/* Constants for ARBT */
+-#define HMATRIX2_ARBT_ROUND_ROBIN		0
+-#define HMATRIX2_ARBT_FIXED_PRIORITY		1
+-
+-/* Bit manipulation macros */
+-#define HMATRIX2_BIT(name)					\
+-	(1 << HMATRIX2_##name##_OFFSET)
+-#define HMATRIX2_BF(name,value)					\
+-	(((value) & ((1 << HMATRIX2_##name##_SIZE) - 1))	\
+-	 << HMATRIX2_##name##_OFFSET)
+-#define HMATRIX2_BFEXT(name,value)				\
+-	(((value) >> HMATRIX2_##name##_OFFSET)			\
+-	 & ((1 << HMATRIX2_##name##_SIZE) - 1))
+-#define HMATRIX2_BFINS(name,value,old)				\
+-	(((old) & ~(((1 << HMATRIX2_##name##_SIZE) - 1)		\
+-		    << HMATRIX2_##name##_OFFSET))		\
+-	 | HMATRIX2_BF(name,value))
+-
+-/* Register access macros */
+-#define hmatrix2_readl(reg)					\
+-	readl((void *)HMATRIX_BASE + HMATRIX2_##reg)
+-#define hmatrix2_writel(reg,value)				\
+-	writel((value), (void *)HMATRIX_BASE + HMATRIX2_##reg)
+-
+-#endif /* __ASM_AVR32_HMATRIX2_H__ */
+diff --git a/include/asm-avr32/arch-at32ap7000/memory-map.h b/include/asm-avr32/arch-at32ap7000/memory-map.h
+deleted file mode 100644
+index 5513e88..0000000
+--- a/include/asm-avr32/arch-at32ap7000/memory-map.h
++++ /dev/null
+@@ -1,66 +0,0 @@
+-/*
+- * Copyright (C) 2005-2006 Atmel Corporation
+- *
+- * See file CREDITS for list of people who contributed to this
+- * project.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License as
+- * published by the Free Software Foundation; either version 2 of
+- * the License, or (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+- * MA 02111-1307 USA
+- */
+-#ifndef __AT32AP7000_MEMORY_MAP_H__
+-#define __AT32AP7000_MEMORY_MAP_H__
+-
+-/* Devices on the High Speed Bus (HSB) */
+-#define LCDC_BASE				0xFF000000
+-#define DMAC_BASE				0xFF200000
+-#define USB_FIFO				0xFF300000
+-
+-/* Devices on Peripheral Bus A (PBA) */
+-#define SPI0_BASE				0xFFE00000
+-#define SPI1_BASE				0xFFE00400
+-#define TWI_BASE				0xFFE00800
+-#define USART0_BASE				0xFFE00C00
+-#define USART1_BASE				0xFFE01000
+-#define USART2_BASE				0xFFE01400
+-#define USART3_BASE				0xFFE01800
+-#define SSC0_BASE				0xFFE01C00
+-#define SSC1_BASE				0xFFE02000
+-#define SSC2_BASE				0xFFE02400
+-#define PIOA_BASE				0xFFE02800
+-#define PIOB_BASE				0xFFE02C00
+-#define PIOC_BASE				0xFFE03000
+-#define PIOD_BASE				0xFFE03400
+-#define PIOE_BASE				0xFFE03800
+-#define PSIF_BASE				0xFFE03C00
+-
+-/* Devices on Peripheral Bus B (PBB) */
+-#define SM_BASE					0xFFF00000
+-#define INTC_BASE				0xFFF00400
+-#define HMATRIX_BASE				0xFFF00800
+-#define TIMER0_BASE				0xFFF00C00
+-#define TIMER1_BASE				0xFFF01000
+-#define PWM_BASE				0xFFF01400
+-#define MACB0_BASE				0xFFF01800
+-#define MACB1_BASE				0xFFF01C00
+-#define DAC_BASE				0xFFF02000
+-#define MMCI_BASE				0xFFF02400
+-#define AUDIOC_BASE				0xFFF02800
+-#define HISI_BASE				0xFFF02C00
+-#define USB_BASE				0xFFF03000
+-#define HSMC_BASE				0xFFF03400
+-#define HSDRAMC_BASE				0xFFF03800
+-#define ECC_BASE				0xFFF03C00
+-
+-#endif /* __AT32AP7000_MEMORY_MAP_H__ */
+diff --git a/include/asm-avr32/arch-at32ap7000/mmc.h b/include/asm-avr32/arch-at32ap7000/mmc.h
+deleted file mode 100644
+index fcfbbb3..0000000
+--- a/include/asm-avr32/arch-at32ap7000/mmc.h
++++ /dev/null
+@@ -1,96 +0,0 @@
+-/*
+- * Copyright (C) 2004-2006 Atmel Corporation
+- *
+- * See file CREDITS for list of people who contributed to this
+- * project.
+- *
+- * This program is free software; you can redistribute it and/or
+- * modify it under the terms of the GNU General Public License as
+- * published by the Free Software Foundation; either version 2 of
+- * the License, or (at your option) any later version.
+- *
+- * This program is distributed in the hope that it will be useful,
+- * but WITHOUT ANY WARRANTY; without even the implied warranty of
+- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+- * GNU General Public License for more details.
+- *
+- * You should have received a copy of the GNU General Public License
+- * along with this program; if not, write to the Free Software
+- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+- * MA 02111-1307 USA
+- */
+-#ifndef __ASM_AVR32_MMC_H
+-#define __ASM_AVR32_MMC_H
+-
+-struct mmc_cid {
+-	unsigned long psn;
+-	unsigned short oid;
+-	unsigned char mid;
+-	unsigned char prv;
+-	unsigned char mdt;
+-	char pnm[7];
+-};
+-
+-struct mmc_csd
+-{
+-	u8	csd_structure:2,
+-		spec_vers:4,
+-		rsvd1:2;
+-	u8	taac;
+-	u8	nsac;
+-	u8	tran_speed;
+-	u16	ccc:12,
+-		read_bl_len:4;
+-	u64	read_bl_partial:1,
+-		write_blk_misalign:1,
+-		read_blk_misalign:1,
+-		dsr_imp:1,
+-		rsvd2:2,
+-		c_size:12,
+-		vdd_r_curr_min:3,
+-		vdd_r_curr_max:3,
+-		vdd_w_curr_min:3,
+-		vdd_w_curr_max:3,
+-		c_size_mult:3,
+-		sector_size:5,
+-		erase_grp_size:5,
+-		wp_grp_size:5,
+-		wp_grp_enable:1,
+-		default_ecc:2,
+-		r2w_factor:3,
+-		write_bl_len:4,
+-		write_bl_partial:1,
+-		rsvd3:5;
+-	u8	file_format_grp:1,
+-		copy:1,
+-		perm_write_protect:1,
+-		tmp_write_protect:1,
+-		file_format:2,
+-		ecc:2;
+-	u8	crc:7;
+-	u8	one:1;
+-};
+-
+-/* MMC Command numbers */
+-#define MMC_CMD_GO_IDLE_STATE		0
+-#define MMC_CMD_SEND_OP_COND		1
+-#define MMC_CMD_ALL_SEND_CID 		2
+-#define MMC_CMD_SET_RELATIVE_ADDR	3
+-#define MMC_CMD_SD_SEND_RELATIVE_ADDR	3
+-#define MMC_CMD_SET_DSR			4
+-#define MMC_CMD_SELECT_CARD		7
+-#define MMC_CMD_SEND_CSD 		9
+-#define MMC_CMD_SEND_CID 		10
+-#define MMC_CMD_SEND_STATUS		13
+-#define MMC_CMD_SET_BLOCKLEN		16
+-#define MMC_CMD_READ_SINGLE_BLOCK	17
+-#define MMC_CMD_READ_MULTIPLE_BLOCK	18
+-#define MMC_CMD_WRITE_BLOCK		24
+-#define MMC_CMD_APP_CMD			55
+-
+-#define MMC_ACMD_SD_SEND_OP_COND	41
+-
+-#define R1_ILLEGAL_COMMAND		(1 << 22)
+-#define R1_APP_CMD			(1 << 5)
+-
+-#endif /* __ASM_AVR32_MMC_H */
+diff --git a/include/asm-avr32/arch-at32ap700x/chip-features.h b/include/asm-avr32/arch-at32ap700x/chip-features.h
+new file mode 100644
+index 0000000..29b1fd6
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap700x/chip-features.h
+@@ -0,0 +1,34 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __ASM_AVR32_ARCH_CHIP_FEATURES_H__
++#define __ASM_AVR32_ARCH_CHIP_FEATURES_H__
++
++/* Currently, all the AP700x chips have these */
++#define AT32AP700x_CHIP_HAS_USART
++#define AT32AP700x_CHIP_HAS_MMCI
++
++/* Only AP7000 has ethernet interface */
++#ifdef CONFIG_AT32AP7000
++#define AT32AP700x_CHIP_HAS_MACB
++#endif
++
++#endif /* __ASM_AVR32_ARCH_CHIP_FEATURES_H__ */
+diff --git a/include/asm-avr32/arch-at32ap700x/clk.h b/include/asm-avr32/arch-at32ap700x/clk.h
+new file mode 100644
+index 0000000..ea84c08
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap700x/clk.h
+@@ -0,0 +1,78 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __ASM_AVR32_ARCH_CLK_H__
++#define __ASM_AVR32_ARCH_CLK_H__
++
++#include <asm/arch/chip-features.h>
++
++#ifdef CONFIG_PLL
++#define MAIN_CLK_RATE ((CFG_OSC0_HZ / CFG_PLL0_DIV) * CFG_PLL0_MUL)
++#else
++#define MAIN_CLK_RATE (CFG_OSC0_HZ)
++#endif
++
++static inline unsigned long get_cpu_clk_rate(void)
++{
++	return MAIN_CLK_RATE >> CFG_CLKDIV_CPU;
++}
++static inline unsigned long get_hsb_clk_rate(void)
++{
++	return MAIN_CLK_RATE >> CFG_CLKDIV_HSB;
++}
++static inline unsigned long get_pba_clk_rate(void)
++{
++	return MAIN_CLK_RATE >> CFG_CLKDIV_PBA;
++}
++static inline unsigned long get_pbb_clk_rate(void)
++{
++	return MAIN_CLK_RATE >> CFG_CLKDIV_PBB;
++}
++
++/* Accessors for specific devices. More will be added as needed. */
++static inline unsigned long get_sdram_clk_rate(void)
++{
++	return get_hsb_clk_rate();
++}
++#ifdef AT32AP700x_CHIP_HAS_USART
++static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
++{
++	return get_pba_clk_rate();
++}
++#endif
++#ifdef AT32AP700x_CHIP_HAS_USART
++static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
++{
++	return get_pbb_clk_rate();
++}
++static inline unsigned long get_macb_hclk_rate(unsigned int dev_id)
++{
++	return get_hsb_clk_rate();
++}
++#endif
++#ifdef AT32AP700x_CHIP_HAS_MMCI
++static inline unsigned long get_mci_clk_rate(void)
++{
++	return get_pbb_clk_rate();
++}
++#endif
++
++#endif /* __ASM_AVR32_ARCH_CLK_H__ */
+diff --git a/include/asm-avr32/arch-at32ap700x/gpio.h b/include/asm-avr32/arch-at32ap700x/gpio.h
+new file mode 100644
+index 0000000..b10a3e4
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap700x/gpio.h
+@@ -0,0 +1,220 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __ASM_AVR32_ARCH_GPIO_H__
++#define __ASM_AVR32_ARCH_GPIO_H__
++
++#include <asm/arch/chip-features.h>
++#include <asm/arch/memory-map.h>
++
++#define NR_GPIO_CONTROLLERS	5
++
++/*
++ * Pin numbers identifying specific GPIO pins on the chip.
++ */
++#define GPIO_PIOA_BASE	(0)
++#define GPIO_PIN_PA0	(GPIO_PIOA_BASE +  0)
++#define GPIO_PIN_PA1	(GPIO_PIOA_BASE +  1)
++#define GPIO_PIN_PA2	(GPIO_PIOA_BASE +  2)
++#define GPIO_PIN_PA3	(GPIO_PIOA_BASE +  3)
++#define GPIO_PIN_PA4	(GPIO_PIOA_BASE +  4)
++#define GPIO_PIN_PA5	(GPIO_PIOA_BASE +  5)
++#define GPIO_PIN_PA6	(GPIO_PIOA_BASE +  6)
++#define GPIO_PIN_PA7	(GPIO_PIOA_BASE +  7)
++#define GPIO_PIN_PA8	(GPIO_PIOA_BASE +  8)
++#define GPIO_PIN_PA9	(GPIO_PIOA_BASE +  9)
++#define GPIO_PIN_PA10	(GPIO_PIOA_BASE + 10)
++#define GPIO_PIN_PA11	(GPIO_PIOA_BASE + 11)
++#define GPIO_PIN_PA12	(GPIO_PIOA_BASE + 12)
++#define GPIO_PIN_PA13	(GPIO_PIOA_BASE + 13)
++#define GPIO_PIN_PA14	(GPIO_PIOA_BASE + 14)
++#define GPIO_PIN_PA15	(GPIO_PIOA_BASE + 15)
++#define GPIO_PIN_PA16	(GPIO_PIOA_BASE + 16)
++#define GPIO_PIN_PA17	(GPIO_PIOA_BASE + 17)
++#define GPIO_PIN_PA18	(GPIO_PIOA_BASE + 18)
++#define GPIO_PIN_PA19	(GPIO_PIOA_BASE + 19)
++#define GPIO_PIN_PA20	(GPIO_PIOA_BASE + 20)
++#define GPIO_PIN_PA21	(GPIO_PIOA_BASE + 21)
++#define GPIO_PIN_PA22	(GPIO_PIOA_BASE + 22)
++#define GPIO_PIN_PA23	(GPIO_PIOA_BASE + 23)
++#define GPIO_PIN_PA24	(GPIO_PIOA_BASE + 24)
++#define GPIO_PIN_PA25	(GPIO_PIOA_BASE + 25)
++#define GPIO_PIN_PA26	(GPIO_PIOA_BASE + 26)
++#define GPIO_PIN_PA27	(GPIO_PIOA_BASE + 27)
++#define GPIO_PIN_PA28	(GPIO_PIOA_BASE + 28)
++#define GPIO_PIN_PA29	(GPIO_PIOA_BASE + 29)
++#define GPIO_PIN_PA30	(GPIO_PIOA_BASE + 30)
++#define GPIO_PIN_PA31	(GPIO_PIOA_BASE + 31)
++
++#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
++#define GPIO_PIN_PB0	(GPIO_PIOB_BASE +  0)
++#define GPIO_PIN_PB1	(GPIO_PIOB_BASE +  1)
++#define GPIO_PIN_PB2	(GPIO_PIOB_BASE +  2)
++#define GPIO_PIN_PB3	(GPIO_PIOB_BASE +  3)
++#define GPIO_PIN_PB4	(GPIO_PIOB_BASE +  4)
++#define GPIO_PIN_PB5	(GPIO_PIOB_BASE +  5)
++#define GPIO_PIN_PB6	(GPIO_PIOB_BASE +  6)
++#define GPIO_PIN_PB7	(GPIO_PIOB_BASE +  7)
++#define GPIO_PIN_PB8	(GPIO_PIOB_BASE +  8)
++#define GPIO_PIN_PB9	(GPIO_PIOB_BASE +  9)
++#define GPIO_PIN_PB10	(GPIO_PIOB_BASE + 10)
++#define GPIO_PIN_PB11	(GPIO_PIOB_BASE + 11)
++#define GPIO_PIN_PB12	(GPIO_PIOB_BASE + 12)
++#define GPIO_PIN_PB13	(GPIO_PIOB_BASE + 13)
++#define GPIO_PIN_PB14	(GPIO_PIOB_BASE + 14)
++#define GPIO_PIN_PB15	(GPIO_PIOB_BASE + 15)
++#define GPIO_PIN_PB16	(GPIO_PIOB_BASE + 16)
++#define GPIO_PIN_PB17	(GPIO_PIOB_BASE + 17)
++#define GPIO_PIN_PB18	(GPIO_PIOB_BASE + 18)
++#define GPIO_PIN_PB19	(GPIO_PIOB_BASE + 19)
++#define GPIO_PIN_PB20	(GPIO_PIOB_BASE + 20)
++#define GPIO_PIN_PB21	(GPIO_PIOB_BASE + 21)
++#define GPIO_PIN_PB22	(GPIO_PIOB_BASE + 22)
++#define GPIO_PIN_PB23	(GPIO_PIOB_BASE + 23)
++#define GPIO_PIN_PB24	(GPIO_PIOB_BASE + 24)
++#define GPIO_PIN_PB25	(GPIO_PIOB_BASE + 25)
++#define GPIO_PIN_PB26	(GPIO_PIOB_BASE + 26)
++#define GPIO_PIN_PB27	(GPIO_PIOB_BASE + 27)
++#define GPIO_PIN_PB28	(GPIO_PIOB_BASE + 28)
++#define GPIO_PIN_PB29	(GPIO_PIOB_BASE + 29)
++#define GPIO_PIN_PB30	(GPIO_PIOB_BASE + 30)
++
++#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
++#define GPIO_PIN_PC0	(GPIO_PIOC_BASE +  0)
++#define GPIO_PIN_PC1	(GPIO_PIOC_BASE +  1)
++#define GPIO_PIN_PC2	(GPIO_PIOC_BASE +  2)
++#define GPIO_PIN_PC3	(GPIO_PIOC_BASE +  3)
++#define GPIO_PIN_PC4	(GPIO_PIOC_BASE +  4)
++#define GPIO_PIN_PC5	(GPIO_PIOC_BASE +  5)
++#define GPIO_PIN_PC6	(GPIO_PIOC_BASE +  6)
++#define GPIO_PIN_PC7	(GPIO_PIOC_BASE +  7)
++#define GPIO_PIN_PC8	(GPIO_PIOC_BASE +  8)
++#define GPIO_PIN_PC9	(GPIO_PIOC_BASE +  9)
++#define GPIO_PIN_PC10	(GPIO_PIOC_BASE + 10)
++#define GPIO_PIN_PC11	(GPIO_PIOC_BASE + 11)
++#define GPIO_PIN_PC12	(GPIO_PIOC_BASE + 12)
++#define GPIO_PIN_PC13	(GPIO_PIOC_BASE + 13)
++#define GPIO_PIN_PC14	(GPIO_PIOC_BASE + 14)
++#define GPIO_PIN_PC15	(GPIO_PIOC_BASE + 15)
++#define GPIO_PIN_PC16	(GPIO_PIOC_BASE + 16)
++#define GPIO_PIN_PC17	(GPIO_PIOC_BASE + 17)
++#define GPIO_PIN_PC18	(GPIO_PIOC_BASE + 18)
++#define GPIO_PIN_PC19	(GPIO_PIOC_BASE + 19)
++#define GPIO_PIN_PC20	(GPIO_PIOC_BASE + 20)
++#define GPIO_PIN_PC21	(GPIO_PIOC_BASE + 21)
++#define GPIO_PIN_PC22	(GPIO_PIOC_BASE + 22)
++#define GPIO_PIN_PC23	(GPIO_PIOC_BASE + 23)
++#define GPIO_PIN_PC24	(GPIO_PIOC_BASE + 24)
++#define GPIO_PIN_PC25	(GPIO_PIOC_BASE + 25)
++#define GPIO_PIN_PC26	(GPIO_PIOC_BASE + 26)
++#define GPIO_PIN_PC27	(GPIO_PIOC_BASE + 27)
++#define GPIO_PIN_PC28	(GPIO_PIOC_BASE + 28)
++#define GPIO_PIN_PC29	(GPIO_PIOC_BASE + 29)
++#define GPIO_PIN_PC30	(GPIO_PIOC_BASE + 30)
++#define GPIO_PIN_PC31	(GPIO_PIOC_BASE + 31)
++
++#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
++#define GPIO_PIN_PD0	(GPIO_PIOD_BASE +  0)
++#define GPIO_PIN_PD1	(GPIO_PIOD_BASE +  1)
++#define GPIO_PIN_PD2	(GPIO_PIOD_BASE +  2)
++#define GPIO_PIN_PD3	(GPIO_PIOD_BASE +  3)
++#define GPIO_PIN_PD4	(GPIO_PIOD_BASE +  4)
++#define GPIO_PIN_PD5	(GPIO_PIOD_BASE +  5)
++#define GPIO_PIN_PD6	(GPIO_PIOD_BASE +  6)
++#define GPIO_PIN_PD7	(GPIO_PIOD_BASE +  7)
++#define GPIO_PIN_PD8	(GPIO_PIOD_BASE +  8)
++#define GPIO_PIN_PD9	(GPIO_PIOD_BASE +  9)
++#define GPIO_PIN_PD10	(GPIO_PIOD_BASE + 10)
++#define GPIO_PIN_PD11	(GPIO_PIOD_BASE + 11)
++#define GPIO_PIN_PD12	(GPIO_PIOD_BASE + 12)
++#define GPIO_PIN_PD13	(GPIO_PIOD_BASE + 13)
++#define GPIO_PIN_PD14	(GPIO_PIOD_BASE + 14)
++#define GPIO_PIN_PD15	(GPIO_PIOD_BASE + 15)
++#define GPIO_PIN_PD16	(GPIO_PIOD_BASE + 16)
++#define GPIO_PIN_PD17	(GPIO_PIOD_BASE + 17)
++
++#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)
++#define GPIO_PIN_PE0	(GPIO_PIOE_BASE +  0)
++#define GPIO_PIN_PE1	(GPIO_PIOE_BASE +  1)
++#define GPIO_PIN_PE2	(GPIO_PIOE_BASE +  2)
++#define GPIO_PIN_PE3	(GPIO_PIOE_BASE +  3)
++#define GPIO_PIN_PE4	(GPIO_PIOE_BASE +  4)
++#define GPIO_PIN_PE5	(GPIO_PIOE_BASE +  5)
++#define GPIO_PIN_PE6	(GPIO_PIOE_BASE +  6)
++#define GPIO_PIN_PE7	(GPIO_PIOE_BASE +  7)
++#define GPIO_PIN_PE8	(GPIO_PIOE_BASE +  8)
++#define GPIO_PIN_PE9	(GPIO_PIOE_BASE +  9)
++#define GPIO_PIN_PE10	(GPIO_PIOE_BASE + 10)
++#define GPIO_PIN_PE11	(GPIO_PIOE_BASE + 11)
++#define GPIO_PIN_PE12	(GPIO_PIOE_BASE + 12)
++#define GPIO_PIN_PE13	(GPIO_PIOE_BASE + 13)
++#define GPIO_PIN_PE14	(GPIO_PIOE_BASE + 14)
++#define GPIO_PIN_PE15	(GPIO_PIOE_BASE + 15)
++#define GPIO_PIN_PE16	(GPIO_PIOE_BASE + 16)
++#define GPIO_PIN_PE17	(GPIO_PIOE_BASE + 17)
++#define GPIO_PIN_PE18	(GPIO_PIOE_BASE + 18)
++#define GPIO_PIN_PE19	(GPIO_PIOE_BASE + 19)
++#define GPIO_PIN_PE20	(GPIO_PIOE_BASE + 20)
++#define GPIO_PIN_PE21	(GPIO_PIOE_BASE + 21)
++#define GPIO_PIN_PE22	(GPIO_PIOE_BASE + 22)
++#define GPIO_PIN_PE23	(GPIO_PIOE_BASE + 23)
++#define GPIO_PIN_PE24	(GPIO_PIOE_BASE + 24)
++#define GPIO_PIN_PE25	(GPIO_PIOE_BASE + 25)
++#define GPIO_PIN_PE26	(GPIO_PIOE_BASE + 26)
++
++static inline void *gpio_pin_to_addr(unsigned int pin)
++{
++	switch (pin >> 5) {
++	case 0:
++		return (void *)PIOA_BASE;
++	case 1:
++		return (void *)PIOB_BASE;
++	case 2:
++		return (void *)PIOC_BASE;
++	case 3:
++		return (void *)PIOD_BASE;
++	case 4:
++		return (void *)PIOE_BASE;
++	default:
++		return NULL;
++	}
++}
++
++void gpio_select_periph_A(unsigned int pin, int use_pullup);
++void gpio_select_periph_B(unsigned int pin, int use_pullup);
++
++void gpio_enable_ebi(void);
++
++#ifdef AT32AP700x_CHIP_HAS_USART
++void gpio_enable_usart0(void);
++void gpio_enable_usart1(void);
++void gpio_enable_usart2(void);
++void gpio_enable_usart3(void);
++#endif
++#ifdef AT32AP700x_CHIP_HAS_MACB
++void gpio_enable_macb0(void);
++void gpio_enable_macb1(void);
++#endif
++#ifdef AT32AP700x_CHIP_HAS_MMCI
++void gpio_enable_mmci(void);
++#endif
++
++#endif /* __ASM_AVR32_ARCH_GPIO_H__ */
+diff --git a/include/asm-avr32/arch-at32ap700x/hmatrix2.h b/include/asm-avr32/arch-at32ap700x/hmatrix2.h
+new file mode 100644
+index 0000000..b0e787a
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap700x/hmatrix2.h
+@@ -0,0 +1,232 @@
++/*
++ * Register definition for the High-speed Bus Matrix
++ */
++#ifndef __ASM_AVR32_HMATRIX2_H__
++#define __ASM_AVR32_HMATRIX2_H__
++
++/* HMATRIX2 register offsets */
++#define HMATRIX2_MCFG0				0x0000
++#define HMATRIX2_MCFG1				0x0004
++#define HMATRIX2_MCFG2				0x0008
++#define HMATRIX2_MCFG3				0x000c
++#define HMATRIX2_MCFG4				0x0010
++#define HMATRIX2_MCFG5				0x0014
++#define HMATRIX2_MCFG6				0x0018
++#define HMATRIX2_MCFG7				0x001c
++#define HMATRIX2_MCFG8				0x0020
++#define HMATRIX2_MCFG9				0x0024
++#define HMATRIX2_MCFG10				0x0028
++#define HMATRIX2_MCFG11				0x002c
++#define HMATRIX2_MCFG12				0x0030
++#define HMATRIX2_MCFG13				0x0034
++#define HMATRIX2_MCFG14				0x0038
++#define HMATRIX2_MCFG15				0x003c
++#define HMATRIX2_SCFG0				0x0040
++#define HMATRIX2_SCFG1				0x0044
++#define HMATRIX2_SCFG2				0x0048
++#define HMATRIX2_SCFG3				0x004c
++#define HMATRIX2_SCFG4				0x0050
++#define HMATRIX2_SCFG5				0x0054
++#define HMATRIX2_SCFG6				0x0058
++#define HMATRIX2_SCFG7				0x005c
++#define HMATRIX2_SCFG8				0x0060
++#define HMATRIX2_SCFG9				0x0064
++#define HMATRIX2_SCFG10				0x0068
++#define HMATRIX2_SCFG11				0x006c
++#define HMATRIX2_SCFG12				0x0070
++#define HMATRIX2_SCFG13				0x0074
++#define HMATRIX2_SCFG14				0x0078
++#define HMATRIX2_SCFG15				0x007c
++#define HMATRIX2_PRAS0				0x0080
++#define HMATRIX2_PRBS0				0x0084
++#define HMATRIX2_PRAS1				0x0088
++#define HMATRIX2_PRBS1				0x008c
++#define HMATRIX2_PRAS2				0x0090
++#define HMATRIX2_PRBS2				0x0094
++#define HMATRIX2_PRAS3				0x0098
++#define HMATRIX2_PRBS3				0x009c
++#define HMATRIX2_PRAS4				0x00a0
++#define HMATRIX2_PRBS4				0x00a4
++#define HMATRIX2_PRAS5				0x00a8
++#define HMATRIX2_PRBS5				0x00ac
++#define HMATRIX2_PRAS6				0x00b0
++#define HMATRIX2_PRBS6				0x00b4
++#define HMATRIX2_PRAS7				0x00b8
++#define HMATRIX2_PRBS7				0x00bc
++#define HMATRIX2_PRAS8				0x00c0
++#define HMATRIX2_PRBS8				0x00c4
++#define HMATRIX2_PRAS9				0x00c8
++#define HMATRIX2_PRBS9				0x00cc
++#define HMATRIX2_PRAS10				0x00d0
++#define HMATRIX2_PRBS10				0x00d4
++#define HMATRIX2_PRAS11				0x00d8
++#define HMATRIX2_PRBS11				0x00dc
++#define HMATRIX2_PRAS12				0x00e0
++#define HMATRIX2_PRBS12				0x00e4
++#define HMATRIX2_PRAS13				0x00e8
++#define HMATRIX2_PRBS13				0x00ec
++#define HMATRIX2_PRAS14				0x00f0
++#define HMATRIX2_PRBS14				0x00f4
++#define HMATRIX2_PRAS15				0x00f8
++#define HMATRIX2_PRBS15				0x00fc
++#define HMATRIX2_MRCR				0x0100
++#define HMATRIX2_SFR0				0x0110
++#define HMATRIX2_SFR1				0x0114
++#define HMATRIX2_SFR2				0x0118
++#define HMATRIX2_SFR3				0x011c
++#define HMATRIX2_SFR4				0x0120
++#define HMATRIX2_SFR5				0x0124
++#define HMATRIX2_SFR6				0x0128
++#define HMATRIX2_SFR7				0x012c
++#define HMATRIX2_SFR8				0x0130
++#define HMATRIX2_SFR9				0x0134
++#define HMATRIX2_SFR10				0x0138
++#define HMATRIX2_SFR11				0x013c
++#define HMATRIX2_SFR12				0x0140
++#define HMATRIX2_SFR13				0x0144
++#define HMATRIX2_SFR14				0x0148
++#define HMATRIX2_SFR15				0x014c
++#define HMATRIX2_VERSION			0x01fc
++
++/* Bitfields in MCFG0 */
++#define HMATRIX2_ULBT_OFFSET			0
++#define HMATRIX2_ULBT_SIZE			3
++
++/* Bitfields in SCFG0 */
++#define HMATRIX2_SLOT_CYCLE_OFFSET		0
++#define HMATRIX2_SLOT_CYCLE_SIZE		8
++#define HMATRIX2_DEFMSTR_TYPE_OFFSET		16
++#define HMATRIX2_DEFMSTR_TYPE_SIZE		2
++#define HMATRIX2_FIXED_DEFMSTR_OFFSET		18
++#define HMATRIX2_FIXED_DEFMSTR_SIZE		4
++#define HMATRIX2_ARBT_OFFSET			24
++#define HMATRIX2_ARBT_SIZE			2
++
++/* Bitfields in PRAS0 */
++#define HMATRIX2_M0PR_OFFSET			0
++#define HMATRIX2_M0PR_SIZE			4
++#define HMATRIX2_M1PR_OFFSET			4
++#define HMATRIX2_M1PR_SIZE			4
++#define HMATRIX2_M2PR_OFFSET			8
++#define HMATRIX2_M2PR_SIZE			4
++#define HMATRIX2_M3PR_OFFSET			12
++#define HMATRIX2_M3PR_SIZE			4
++#define HMATRIX2_M4PR_OFFSET			16
++#define HMATRIX2_M4PR_SIZE			4
++#define HMATRIX2_M5PR_OFFSET			20
++#define HMATRIX2_M5PR_SIZE			4
++#define HMATRIX2_M6PR_OFFSET			24
++#define HMATRIX2_M6PR_SIZE			4
++#define HMATRIX2_M7PR_OFFSET			28
++#define HMATRIX2_M7PR_SIZE			4
++
++/* Bitfields in PRBS0 */
++#define HMATRIX2_M8PR_OFFSET			0
++#define HMATRIX2_M8PR_SIZE			4
++#define HMATRIX2_M9PR_OFFSET			4
++#define HMATRIX2_M9PR_SIZE			4
++#define HMATRIX2_M10PR_OFFSET			8
++#define HMATRIX2_M10PR_SIZE			4
++#define HMATRIX2_M11PR_OFFSET			12
++#define HMATRIX2_M11PR_SIZE			4
++#define HMATRIX2_M12PR_OFFSET			16
++#define HMATRIX2_M12PR_SIZE			4
++#define HMATRIX2_M13PR_OFFSET			20
++#define HMATRIX2_M13PR_SIZE			4
++#define HMATRIX2_M14PR_OFFSET			24
++#define HMATRIX2_M14PR_SIZE			4
++#define HMATRIX2_M15PR_OFFSET			28
++#define HMATRIX2_M15PR_SIZE			4
++
++/* Bitfields in MRCR */
++#define HMATRIX2_RBC0_OFFSET			0
++#define HMATRIX2_RBC0_SIZE			1
++#define HMATRIX2_RBC1_OFFSET			1
++#define HMATRIX2_RBC1_SIZE			1
++#define HMATRIX2_RBC2_OFFSET			2
++#define HMATRIX2_RBC2_SIZE			1
++#define HMATRIX2_RBC3_OFFSET			3
++#define HMATRIX2_RBC3_SIZE			1
++#define HMATRIX2_RBC4_OFFSET			4
++#define HMATRIX2_RBC4_SIZE			1
++#define HMATRIX2_RBC5_OFFSET			5
++#define HMATRIX2_RBC5_SIZE			1
++#define HMATRIX2_RBC6_OFFSET			6
++#define HMATRIX2_RBC6_SIZE			1
++#define HMATRIX2_RBC7_OFFSET			7
++#define HMATRIX2_RBC7_SIZE			1
++#define HMATRIX2_RBC8_OFFSET			8
++#define HMATRIX2_RBC8_SIZE			1
++#define HMATRIX2_RBC9_OFFSET			9
++#define HMATRIX2_RBC9_SIZE			1
++#define HMATRIX2_RBC10_OFFSET			10
++#define HMATRIX2_RBC10_SIZE			1
++#define HMATRIX2_RBC11_OFFSET			11
++#define HMATRIX2_RBC11_SIZE			1
++#define HMATRIX2_RBC12_OFFSET			12
++#define HMATRIX2_RBC12_SIZE			1
++#define HMATRIX2_RBC13_OFFSET			13
++#define HMATRIX2_RBC13_SIZE			1
++#define HMATRIX2_RBC14_OFFSET			14
++#define HMATRIX2_RBC14_SIZE			1
++#define HMATRIX2_RBC15_OFFSET			15
++#define HMATRIX2_RBC15_SIZE			1
++
++/* Bitfields in SFR0 */
++#define HMATRIX2_SFR_OFFSET			0
++#define HMATRIX2_SFR_SIZE			32
++
++/* Bitfields in SFR4 */
++#define HMATRIX2_CS1A_OFFSET			1
++#define HMATRIX2_CS1A_SIZE			1
++#define HMATRIX2_CS3A_OFFSET			3
++#define HMATRIX2_CS3A_SIZE			1
++#define HMATRIX2_CS4A_OFFSET			4
++#define HMATRIX2_CS4A_SIZE			1
++#define HMATRIX2_CS5A_OFFSET			5
++#define HMATRIX2_CS5A_SIZE			1
++#define HMATRIX2_DBPUC_OFFSET			8
++#define HMATRIX2_DBPUC_SIZE			1
++
++/* Bitfields in VERSION */
++#define HMATRIX2_VERSION_OFFSET			0
++#define HMATRIX2_VERSION_SIZE			12
++#define HMATRIX2_MFN_OFFSET			16
++#define HMATRIX2_MFN_SIZE			3
++
++/* Constants for ULBT */
++#define HMATRIX2_ULBT_INFINITE			0
++#define HMATRIX2_ULBT_SINGLE			1
++#define HMATRIX2_ULBT_FOUR_BEAT			2
++#define HMATRIX2_ULBT_SIXTEEN_BEAT		4
++
++/* Constants for DEFMSTR_TYPE */
++#define HMATRIX2_DEFMSTR_TYPE_NO_DEFAULT	0
++#define HMATRIX2_DEFMSTR_TYPE_LAST_DEFAULT	1
++#define HMATRIX2_DEFMSTR_TYPE_FIXED_DEFAULT	2
++
++/* Constants for ARBT */
++#define HMATRIX2_ARBT_ROUND_ROBIN		0
++#define HMATRIX2_ARBT_FIXED_PRIORITY		1
++
++/* Bit manipulation macros */
++#define HMATRIX2_BIT(name)					\
++	(1 << HMATRIX2_##name##_OFFSET)
++#define HMATRIX2_BF(name,value)					\
++	(((value) & ((1 << HMATRIX2_##name##_SIZE) - 1))	\
++	 << HMATRIX2_##name##_OFFSET)
++#define HMATRIX2_BFEXT(name,value)				\
++	(((value) >> HMATRIX2_##name##_OFFSET)			\
++	 & ((1 << HMATRIX2_##name##_SIZE) - 1))
++#define HMATRIX2_BFINS(name,value,old)				\
++	(((old) & ~(((1 << HMATRIX2_##name##_SIZE) - 1)		\
++		    << HMATRIX2_##name##_OFFSET))		\
++	 | HMATRIX2_BF(name,value))
++
++/* Register access macros */
++#define hmatrix2_readl(reg)					\
++	readl((void *)HMATRIX_BASE + HMATRIX2_##reg)
++#define hmatrix2_writel(reg,value)				\
++	writel((value), (void *)HMATRIX_BASE + HMATRIX2_##reg)
++
++#endif /* __ASM_AVR32_HMATRIX2_H__ */
+diff --git a/include/asm-avr32/arch-at32ap700x/memory-map.h b/include/asm-avr32/arch-at32ap700x/memory-map.h
+new file mode 100644
+index 0000000..5513e88
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap700x/memory-map.h
+@@ -0,0 +1,66 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __AT32AP7000_MEMORY_MAP_H__
++#define __AT32AP7000_MEMORY_MAP_H__
++
++/* Devices on the High Speed Bus (HSB) */
++#define LCDC_BASE				0xFF000000
++#define DMAC_BASE				0xFF200000
++#define USB_FIFO				0xFF300000
++
++/* Devices on Peripheral Bus A (PBA) */
++#define SPI0_BASE				0xFFE00000
++#define SPI1_BASE				0xFFE00400
++#define TWI_BASE				0xFFE00800
++#define USART0_BASE				0xFFE00C00
++#define USART1_BASE				0xFFE01000
++#define USART2_BASE				0xFFE01400
++#define USART3_BASE				0xFFE01800
++#define SSC0_BASE				0xFFE01C00
++#define SSC1_BASE				0xFFE02000
++#define SSC2_BASE				0xFFE02400
++#define PIOA_BASE				0xFFE02800
++#define PIOB_BASE				0xFFE02C00
++#define PIOC_BASE				0xFFE03000
++#define PIOD_BASE				0xFFE03400
++#define PIOE_BASE				0xFFE03800
++#define PSIF_BASE				0xFFE03C00
++
++/* Devices on Peripheral Bus B (PBB) */
++#define SM_BASE					0xFFF00000
++#define INTC_BASE				0xFFF00400
++#define HMATRIX_BASE				0xFFF00800
++#define TIMER0_BASE				0xFFF00C00
++#define TIMER1_BASE				0xFFF01000
++#define PWM_BASE				0xFFF01400
++#define MACB0_BASE				0xFFF01800
++#define MACB1_BASE				0xFFF01C00
++#define DAC_BASE				0xFFF02000
++#define MMCI_BASE				0xFFF02400
++#define AUDIOC_BASE				0xFFF02800
++#define HISI_BASE				0xFFF02C00
++#define USB_BASE				0xFFF03000
++#define HSMC_BASE				0xFFF03400
++#define HSDRAMC_BASE				0xFFF03800
++#define ECC_BASE				0xFFF03C00
++
++#endif /* __AT32AP7000_MEMORY_MAP_H__ */
+diff --git a/include/asm-avr32/arch-at32ap700x/mmc.h b/include/asm-avr32/arch-at32ap700x/mmc.h
+new file mode 100644
+index 0000000..fcfbbb3
+--- /dev/null
++++ b/include/asm-avr32/arch-at32ap700x/mmc.h
+@@ -0,0 +1,96 @@
++/*
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __ASM_AVR32_MMC_H
++#define __ASM_AVR32_MMC_H
++
++struct mmc_cid {
++	unsigned long psn;
++	unsigned short oid;
++	unsigned char mid;
++	unsigned char prv;
++	unsigned char mdt;
++	char pnm[7];
++};
++
++struct mmc_csd
++{
++	u8	csd_structure:2,
++		spec_vers:4,
++		rsvd1:2;
++	u8	taac;
++	u8	nsac;
++	u8	tran_speed;
++	u16	ccc:12,
++		read_bl_len:4;
++	u64	read_bl_partial:1,
++		write_blk_misalign:1,
++		read_blk_misalign:1,
++		dsr_imp:1,
++		rsvd2:2,
++		c_size:12,
++		vdd_r_curr_min:3,
++		vdd_r_curr_max:3,
++		vdd_w_curr_min:3,
++		vdd_w_curr_max:3,
++		c_size_mult:3,
++		sector_size:5,
++		erase_grp_size:5,
++		wp_grp_size:5,
++		wp_grp_enable:1,
++		default_ecc:2,
++		r2w_factor:3,
++		write_bl_len:4,
++		write_bl_partial:1,
++		rsvd3:5;
++	u8	file_format_grp:1,
++		copy:1,
++		perm_write_protect:1,
++		tmp_write_protect:1,
++		file_format:2,
++		ecc:2;
++	u8	crc:7;
++	u8	one:1;
++};
++
++/* MMC Command numbers */
++#define MMC_CMD_GO_IDLE_STATE		0
++#define MMC_CMD_SEND_OP_COND		1
++#define MMC_CMD_ALL_SEND_CID 		2
++#define MMC_CMD_SET_RELATIVE_ADDR	3
++#define MMC_CMD_SD_SEND_RELATIVE_ADDR	3
++#define MMC_CMD_SET_DSR			4
++#define MMC_CMD_SELECT_CARD		7
++#define MMC_CMD_SEND_CSD 		9
++#define MMC_CMD_SEND_CID 		10
++#define MMC_CMD_SEND_STATUS		13
++#define MMC_CMD_SET_BLOCKLEN		16
++#define MMC_CMD_READ_SINGLE_BLOCK	17
++#define MMC_CMD_READ_MULTIPLE_BLOCK	18
++#define MMC_CMD_WRITE_BLOCK		24
++#define MMC_CMD_APP_CMD			55
++
++#define MMC_ACMD_SD_SEND_OP_COND	41
++
++#define R1_ILLEGAL_COMMAND		(1 << 22)
++#define R1_APP_CMD			(1 << 5)
++
++#endif /* __ASM_AVR32_MMC_H */
+diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
+new file mode 100644
+index 0000000..0be5fcb
+--- /dev/null
++++ b/include/configs/atngw100.h
+@@ -0,0 +1,177 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Configuration settings for the AVR32 Network Gateway
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_AVR32			1
++#define CONFIG_AT32AP			1
++#define CONFIG_AT32AP7000		1
++#define CONFIG_ATNGW100			1
++
++#define CONFIG_ATNGW100_EXT_FLASH	1
++
++#define CFG_HZ				1000
++
++/*
++ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
++ * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
++ * and the PBA bus to run at 1/4 the PLL frequency.
++ */
++#define CONFIG_PLL			1
++#define CFG_POWER_MANAGER		1
++#define CFG_OSC0_HZ			20000000
++#define CFG_PLL0_DIV			1
++#define CFG_PLL0_MUL			7
++#define CFG_PLL0_SUPPRESS_CYCLES	16
++#define CFG_CLKDIV_CPU			0
++#define CFG_CLKDIV_HSB			1
++#define CFG_CLKDIV_PBA			2
++#define CFG_CLKDIV_PBB			1
++
++/*
++ * The PLLOPT register controls the PLL like this:
++ *   icp = PLLOPT<2>
++ *   ivco = PLLOPT<1:0>
++ *
++ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
++ */
++#define CFG_PLL0_OPT			0x04
++
++#define CONFIG_USART1			1
++
++/* User serviceable stuff */
++#define CONFIG_DOS_PARTITION		1
++
++#define CONFIG_CMDLINE_TAG		1
++#define CONFIG_SETUP_MEMORY_TAGS	1
++#define CONFIG_INITRD_TAG		1
++
++#define CONFIG_STACKSIZE		(2048)
++
++#define CONFIG_BAUDRATE			115200
++#define CONFIG_BOOTARGS							\
++	"console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
++#define CONFIG_BOOTCOMMAND						\
++	"fsload; bootm"
++
++/*
++ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
++ * data on the serial line may interrupt the boot sequence.
++ */
++#define CONFIG_BOOTDELAY		1
++#define CONFIG_AUTOBOOT			1
++#define CONFIG_AUTOBOOT_KEYED		1
++#define CONFIG_AUTOBOOT_PROMPT				\
++        "Press SPACE to abort autoboot in %d seconds\n"
++#define CONFIG_AUTOBOOT_DELAY_STR	"d"
++#define CONFIG_AUTOBOOT_STOP_STR	" "
++
++/*
++ * After booting the board for the first time, new ethernet addresses
++ * should be generated and assigned to the environment variables
++ * "ethaddr" and "eth1addr". This is normally done during production.
++ */
++#define CONFIG_OVERWRITE_ETHADDR_ONCE	1
++#define CONFIG_NET_MULTI		1
++
++/*
++ * BOOTP/DHCP options
++ */
++#define CONFIG_BOOTP_SUBNETMASK
++#define CONFIG_BOOTP_GATEWAY
++
++#define CONFIG_DOS_PARTITION		1
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_ASKENV
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_EXT2
++#define CONFIG_CMD_FAT
++#define CONFIG_CMD_JFFS2
++#define CONFIG_CMD_MMC
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_SETGETDCR
++
++#define CONFIG_ATMEL_USART		1
++#define CONFIG_MACB			1
++#define CONFIG_PIO2			1
++#define CFG_NR_PIOS			5
++#define CFG_HSDRAMC			1
++#define CONFIG_MMC			1
++
++#define CFG_DCACHE_LINESZ		32
++#define CFG_ICACHE_LINESZ		32
++
++#define CONFIG_NR_DRAM_BANKS		1
++
++#define CFG_FLASH_BASE			0x00000000
++#define CFG_FLASH_SIZE			0x800000
++#define CFG_MAX_FLASH_BANKS		1
++#define CFG_MAX_FLASH_SECT		135
++
++#define CFG_MONITOR_BASE		CFG_FLASH_BASE
++
++#define CFG_INTRAM_BASE			0x24000000
++#define CFG_INTRAM_SIZE			0x8000
++
++#define CFG_SDRAM_BASE			0x10000000
++#define CFG_SDRAM_16BIT			1
++
++#define CFG_ENV_IS_IN_FLASH		1
++#define CFG_ENV_SIZE			65536
++#define CFG_ENV_ADDR			(CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
++
++#define CFG_INIT_SP_ADDR		(CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
++
++#define CFG_MALLOC_LEN			(256*1024)
++#define CFG_MALLOC_END							\
++	({								\
++		DECLARE_GLOBAL_DATA_PTR;				\
++		CFG_SDRAM_BASE + gd->sdram_size;			\
++	})
++#define CFG_MALLOC_START		(CFG_MALLOC_END - CFG_MALLOC_LEN)
++
++#define CFG_DMA_ALLOC_LEN		(16384)
++
++/* Allow 4MB for the kernel run-time image */
++#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
++#define CFG_BOOTPARAMS_LEN		(16 * 1024)
++
++/* Other configuration settings that shouldn't have to change all that often */
++#define CFG_PROMPT			"Uboot> "
++#define CFG_CBSIZE			256
++#define CFG_MAXARGS			16
++#define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
++#define CFG_LONGHELP			1
++
++#define CFG_MEMTEST_START		CFG_SDRAM_BASE
++#define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x1f00000)
++
++#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#endif /* __CONFIG_H */
+diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
+index b33e26f..95aeab6 100644
+--- a/include/configs/atstk1002.h
++++ b/include/configs/atstk1002.h
+@@ -184,8 +184,8 @@
+ #define CFG_MALLOC_LEN			(256*1024)
+ #define CFG_DMA_ALLOC_LEN		(16384)
+ 
+-/* Allow 2MB for the kernel run-time image */
+-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
++/* Allow 4MB for the kernel run-time image */
++#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
+ #define CFG_BOOTPARAMS_LEN		(16 * 1024)
+ 
+ /* Other configuration settings that shouldn't have to change all that often */
+diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
+new file mode 100644
+index 0000000..194788b
+--- /dev/null
++++ b/include/configs/atstk1003.h
+@@ -0,0 +1,184 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * Configuration settings for the ATSTK1003 CPU daughterboard
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_AVR32			1
++#define CONFIG_AT32AP			1
++#define CONFIG_AT32AP7001		1
++#define CONFIG_ATSTK1003		1
++#define CONFIG_ATSTK1000		1
++
++#define CONFIG_ATSTK1000_EXT_FLASH	1
++
++/*
++ * Timer clock frequency. We're using the CPU-internal COUNT register
++ * for this, so this is equivalent to the CPU core clock frequency
++ */
++#define CFG_HZ				1000
++
++/*
++ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
++ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
++ * PLL frequency.
++ * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
++ */
++#define CONFIG_PLL			1
++#define CFG_POWER_MANAGER		1
++#define CFG_OSC0_HZ			20000000
++#define CFG_PLL0_DIV			1
++#define CFG_PLL0_MUL			7
++#define CFG_PLL0_SUPPRESS_CYCLES	16
++/*
++ * Set the CPU running at:
++ * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
++ */
++#define CFG_CLKDIV_CPU			0
++/*
++ * Set the HSB running at:
++ * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
++ */
++#define CFG_CLKDIV_HSB			1
++/*
++ * Set the PBA running at:
++ * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
++ */
++#define CFG_CLKDIV_PBA			2
++/*
++ * Set the PBB running at:
++ * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
++ */
++#define CFG_CLKDIV_PBB			1
++
++/*
++ * The PLLOPT register controls the PLL like this:
++ *   icp = PLLOPT<2>
++ *   ivco = PLLOPT<1:0>
++ *
++ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
++ */
++#define CFG_PLL0_OPT			0x04
++
++#undef CONFIG_USART0
++#define CONFIG_USART1			1
++#undef CONFIG_USART2
++#undef CONFIG_USART3
++
++/* User serviceable stuff */
++#define CONFIG_DOS_PARTITION		1
++
++#define CONFIG_CMDLINE_TAG		1
++#define CONFIG_SETUP_MEMORY_TAGS	1
++#define CONFIG_INITRD_TAG		1
++
++#define CONFIG_STACKSIZE		(2048)
++
++#define CONFIG_BAUDRATE			115200
++#define CONFIG_BOOTARGS							\
++	"console=ttyS0 root=/dev/mmcblk0p1 rootwait"
++
++#define CONFIG_BOOTCOMMAND						\
++	"mmcinit; ext2load mmc 0:1 0x10400000 /boot/uImage; bootm"
++
++/*
++ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
++ * data on the serial line may interrupt the boot sequence.
++ */
++#define CONFIG_BOOTDELAY		1
++#define CONFIG_AUTOBOOT			1
++#define CONFIG_AUTOBOOT_KEYED		1
++#define CONFIG_AUTOBOOT_PROMPT				\
++	"Press SPACE to abort autoboot in %d seconds\n"
++#define CONFIG_AUTOBOOT_DELAY_STR	"d"
++#define CONFIG_AUTOBOOT_STOP_STR	" "
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_ASKENV
++#define CONFIG_CMD_EXT2
++#define CONFIG_CMD_FAT
++#define CONFIG_CMD_JFFS2
++#define CONFIG_CMD_MMC
++
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_NET
++#undef CONFIG_CMD_NFS
++#undef CONFIG_CMD_SETGETDCR
++#undef CONFIG_CMD_XIMG
++
++#define CONFIG_ATMEL_USART		1
++#define CONFIG_PIO2			1
++#define CFG_HSDRAMC			1
++#define CONFIG_MMC			1
++
++#define CFG_DCACHE_LINESZ		32
++#define CFG_ICACHE_LINESZ		32
++
++#define CONFIG_NR_DRAM_BANKS		1
++
++/* External flash on STK1000 */
++#if 0
++#define CFG_FLASH_CFI			1
++#define CFG_FLASH_CFI_DRIVER		1
++#endif
++
++#define CFG_FLASH_BASE			0x00000000
++#define CFG_FLASH_SIZE			0x800000
++#define CFG_MAX_FLASH_BANKS		1
++#define CFG_MAX_FLASH_SECT		135
++
++#define CFG_MONITOR_BASE		CFG_FLASH_BASE
++
++#define CFG_INTRAM_BASE			0x24000000
++#define CFG_INTRAM_SIZE			0x8000
++
++#define CFG_SDRAM_BASE			0x10000000
++
++#define CFG_ENV_IS_IN_FLASH		1
++#define CFG_ENV_SIZE			65536
++#define CFG_ENV_ADDR			(CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
++
++#define CFG_INIT_SP_ADDR		(CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
++
++#define CFG_MALLOC_LEN			(256*1024)
++
++/* Allow 4MB for the kernel run-time image */
++#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00400000)
++#define CFG_BOOTPARAMS_LEN		(16 * 1024)
++
++/* Other configuration settings that shouldn't have to change all that often */
++#define CFG_PROMPT			"Uboot> "
++#define CFG_CBSIZE			256
++#define CFG_MAXARGS			16
++#define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
++#define CFG_LONGHELP			1
++
++#define CFG_MEMTEST_START		CFG_SDRAM_BASE
++#define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x700000)
++#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#endif /* __CONFIG_H */
+diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
+new file mode 100644
+index 0000000..b81fc21
+--- /dev/null
++++ b/include/configs/atstk1004.h
+@@ -0,0 +1,185 @@
++/*
++ * Copyright (C) 2007 Atmel Corporation
++ *
++ * Configuration settings for the ATSTK1003 CPU daughterboard
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#define CONFIG_AVR32			1
++#define CONFIG_AT32AP			1
++#define CONFIG_AT32AP7002		1
++#define CONFIG_ATSTK1004		1
++#define CONFIG_ATSTK1000		1
++
++#define CONFIG_ATSTK1000_EXT_FLASH	1
++
++/*
++ * Timer clock frequency. We're using the CPU-internal COUNT register
++ * for this, so this is equivalent to the CPU core clock frequency
++ */
++#define CFG_HZ				1000
++
++/*
++ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
++ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
++ * PLL frequency.
++ * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
++ */
++#define CONFIG_PLL			1
++#define CFG_POWER_MANAGER		1
++#define CFG_OSC0_HZ			20000000
++#define CFG_PLL0_DIV			1
++#define CFG_PLL0_MUL			7
++#define CFG_PLL0_SUPPRESS_CYCLES	16
++/*
++ * Set the CPU running at:
++ * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
++ */
++#define CFG_CLKDIV_CPU			0
++/*
++ * Set the HSB running at:
++ * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
++ */
++#define CFG_CLKDIV_HSB			1
++/*
++ * Set the PBA running at:
++ * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
++ */
++#define CFG_CLKDIV_PBA			2
++/*
++ * Set the PBB running at:
++ * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
++ */
++#define CFG_CLKDIV_PBB			1
++
++/*
++ * The PLLOPT register controls the PLL like this:
++ *   icp = PLLOPT<2>
++ *   ivco = PLLOPT<1:0>
++ *
++ * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
++ */
++#define CFG_PLL0_OPT			0x04
++
++#undef CONFIG_USART0
++#define CONFIG_USART1			1
++#undef CONFIG_USART2
++#undef CONFIG_USART3
++
++/* User serviceable stuff */
++#define CONFIG_DOS_PARTITION		1
++
++#define CONFIG_CMDLINE_TAG		1
++#define CONFIG_SETUP_MEMORY_TAGS	1
++#define CONFIG_INITRD_TAG		1
++
++#define CONFIG_STACKSIZE		(2048)
++
++#define CONFIG_BAUDRATE			115200
++#define CONFIG_BOOTARGS							\
++	"console=ttyS0 root=/dev/mmcblk0p1 rootwait"
++
++#define CONFIG_BOOTCOMMAND						\
++	"mmcinit; ext2load mmc 0:1 0x10200000 /boot/uImage; bootm"
++
++/*
++ * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
++ * data on the serial line may interrupt the boot sequence.
++ */
++#define CONFIG_BOOTDELAY		1
++#define CONFIG_AUTOBOOT			1
++#define CONFIG_AUTOBOOT_KEYED		1
++#define CONFIG_AUTOBOOT_PROMPT				\
++	"Press SPACE to abort autoboot in %d seconds\n"
++#define CONFIG_AUTOBOOT_DELAY_STR	"d"
++#define CONFIG_AUTOBOOT_STOP_STR	" "
++
++/*
++ * Command line configuration.
++ */
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_ASKENV
++#define CONFIG_CMD_EXT2
++#define CONFIG_CMD_FAT
++#define CONFIG_CMD_JFFS2
++#define CONFIG_CMD_MMC
++
++#undef CONFIG_CMD_FPGA
++#undef CONFIG_CMD_NET
++#undef CONFIG_CMD_NFS
++#undef CONFIG_CMD_SETGETDCR
++#undef CONFIG_CMD_XIMG
++
++#define CONFIG_ATMEL_USART		1
++#define CONFIG_PIO2			1
++#define CFG_HSDRAMC			1
++#define CONFIG_MMC			1
++
++#define CFG_DCACHE_LINESZ		32
++#define CFG_ICACHE_LINESZ		32
++
++#define CONFIG_NR_DRAM_BANKS		1
++
++/* External flash on STK1000 */
++#if 0
++#define CFG_FLASH_CFI			1
++#define CFG_FLASH_CFI_DRIVER		1
++#endif
++
++#define CFG_FLASH_BASE			0x00000000
++#define CFG_FLASH_SIZE			0x800000
++#define CFG_MAX_FLASH_BANKS		1
++#define CFG_MAX_FLASH_SECT		135
++
++#define CFG_MONITOR_BASE		CFG_FLASH_BASE
++
++#define CFG_INTRAM_BASE			0x24000000
++#define CFG_INTRAM_SIZE			0x8000
++
++#define CFG_SDRAM_BASE			0x10000000
++#define CFG_SDRAM_16BIT			1
++
++#define CFG_ENV_IS_IN_FLASH		1
++#define CFG_ENV_SIZE			65536
++#define CFG_ENV_ADDR			(CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
++
++#define CFG_INIT_SP_ADDR		(CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
++
++#define CFG_MALLOC_LEN			(256*1024)
++
++/* Allow 2MB for the kernel run-time image */
++#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
++#define CFG_BOOTPARAMS_LEN		(16 * 1024)
++
++/* Other configuration settings that shouldn't have to change all that often */
++#define CFG_PROMPT			"Uboot> "
++#define CFG_CBSIZE			256
++#define CFG_MAXARGS			16
++#define CFG_PBSIZE			(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
++#define CFG_LONGHELP			1
++
++#define CFG_MEMTEST_START		CFG_SDRAM_BASE
++#define CFG_MEMTEST_END			(CFG_MEMTEST_START + 0x700000)
++#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
++
++#endif /* __CONFIG_H */
+diff --git a/lib_avr32/board.c b/lib_avr32/board.c
+index 11d864f..4729e58 100644
+--- a/lib_avr32/board.c
++++ b/lib_avr32/board.c
+@@ -264,6 +264,7 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
+ #ifndef CFG_ENV_IS_NOWHERE
+ 	extern char * env_name_spec;
+ #endif
++	char *s;
+ 	cmd_tbl_t *cmdtp;
+ 	bd_t *bd;
+ 
+@@ -334,11 +335,20 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
+ 	/* initialize environment */
+ 	env_relocate();
+ 
++	bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
++
+ 	devices_init();
+ 	jumptable_init();
+ 	console_init_r();
+ 
++	s = getenv("loadaddr");
++	if (s)
++		load_addr = simple_strtoul(s, NULL, 16);
++
+ #if defined(CONFIG_CMD_NET)
++	s = getenv("bootfile");
++	if (s)
++		copy_filename(BootFile, s, sizeof(BootFile));
+ #if defined(CONFIG_NET_MULTI)
+ 	puts("Net:   ");
+ #endif
+diff --git a/net/eth.c b/net/eth.c
+index 1b56a35..3e24a4c 100644
+--- a/net/eth.c
++++ b/net/eth.c
+@@ -60,6 +60,7 @@ extern int npe_initialize(bd_t *);
+ extern int uec_initialize(int);
+ extern int bfin_EMAC_initialize(bd_t *);
+ extern int atstk1000_eth_initialize(bd_t *);
++extern int atngw100_eth_initialize(bd_t *);
+ extern int mcffec_initialize(bd_t*);
+ 
+ static struct eth_device *eth_devices, *eth_current;
+@@ -254,6 +255,9 @@ int eth_initialize(bd_t *bis)
+ #if defined(CONFIG_ATSTK1000)
+ 	atstk1000_eth_initialize(bis);
+ #endif
++#if defined(CONFIG_ATNGW100)
++	atngw100_eth_initialize(bis);
++#endif
+ #if defined(CONFIG_MCFFEC)
+ 	mcffec_initialize(bis);
+ #endif
diff --git a/target/device/Atmel/u-boot/u-boot.mk b/target/device/Atmel/u-boot/u-boot.mk
index 474359e19..59ba37cd9 100644
--- a/target/device/Atmel/u-boot/u-boot.mk
+++ b/target/device/Atmel/u-boot/u-boot.mk
@@ -1,282 +1,149 @@
 #############################################################
 #
-# u-boot mkimage to build to target u-boot filesystems and
-#
-# u-boot.bin - the boot loader for the target - which needs soft float, so
-# we won't make it.
-#
+# U-Boot
 #
 #############################################################
-UBOOT_VERSION:=1.2.0-atmel
-ATMEL_MIRROR:=$(strip $(subst ",, $(BR2_ATMEL_MIRROR)))
-#"))
-UBOOT_DIR:=$(BUILD_DIR)/u-boot-$(UBOOT_VERSION)
-UBOOT_BUILD_DIR:=$(PROJECT_BUILD_DIR)/u-boot-$(UBOOT_VERSION)
-UBOOT_SOURCE:=u-boot-$(UBOOT_VERSION).tar.bz2
-#UBOOT_SOURCE:=u-boot-1.1.5-atmel.tar.bz2
-#UBOOT_SITE:=http://$(BR2_SOURCEFORGE_MIRROR).dl.sourceforge.net/sourceforge/u-boot
-UBOOT_SITE:=$(ATMEL_MIRROR)
-UBOOT_PATCH_SITE:=$(ATMEL_MIRROR)
-UBOOT_CAT:=$(BZCAT)
-UBOOT_PATCH_SOURCE:=u-boot-1.2.0-atmel-patch.tar.bz2
-
-MKIMAGE_BINLOC:=$(UBOOT_BUILD_DIR)/tools/mkimage
-MKIMAGE:=$(KERNEL_CROSS)mkimage
-
-UBOOT_BIN:=$(BOARD_NAME)-u-boot-$(UBOOT_VERSION)-$(DATE).bin
-
-UBOOT_PATCHES:=$(PROJECT_BUILD_DIR)/u-boot-patches
-
-UBOOT_ATMEL_BMP:=$(UBOOT_PATCHES)/atmel.bmp
-
-UBOOT_SCR=$(BINARIES_DIR)/autoscript
-TARGET_UBOOT_IPADDR:=$(strip $(subst ",, $(BR2_TARGET_UBOOT_IPADDR)))
-#"))
-TARGET_UBOOT_SERVERIP:=$(strip $(subst ",, $(BR2_TARGET_UBOOT_SERVERIP)))
-#"))
-TARGET_UBOOT_GATEWAY:=$(strip $(subst ",, $(BR2_TARGET_UBOOT_GATEWAY)))
-#"))
-TARGET_UBOOT_NETMASK:=$(strip $(subst ",, $(BR2_TARGET_UBOOT_NETMASK)))
-#"))
-TARGET_UBOOT_ETHADDR:=$(strip $(subst ",, $(BR2_TARGET_UBOOT_ETHADDR)))
-#"))
-UBOOT_CUSTOM:=$(UBOOT_DIR)/include/custom.h
-
-$(DL_DIR)/$(UBOOT_SOURCE):
-	$(WGET) -P $(DL_DIR) $(UBOOT_SITE)/$(UBOOT_SOURCE)
-
-$(DL_DIR)/$(UBOOT_PATCH_SOURCE):
-	$(WGET) -P $(DL_DIR) $(UBOOT_PATCH_SITE)/$(UBOOT_PATCH_SOURCE)
-
-$(UBOOT_DIR)/.unpacked: $(DL_DIR)/$(UBOOT_SOURCE)
-	mkdir -p $(BUILD_DIR)
-	$(UBOOT_CAT) $(DL_DIR)/$(UBOOT_SOURCE) | tar -C $(BUILD_DIR) -xvf -
+U_BOOT_VERSION:=1.3.0
+U_BOOT_SOURCE:=u-boot-$(U_BOOT_VERSION).tar.bz2
+U_BOOT_SITE:=ftp://ftp.denx.de/pub/u-boot
+U_BOOT_DIR:=$(PROJECT_BUILD_DIR)/u-boot-$(U_BOOT_VERSION)
+U_BOOT_CAT:=$(BZCAT)
+U_BOOT_BIN:=u-boot.bin
+U_BOOT_TOOLS_BIN:=mkimage
+
+U_BOOT_INC_CONF_FILE:=$(U_BOOT_DIR)/include/configs/$(subst _config,,$(BR2_TARGET_U_BOOT_CONFIG_BOARD)).h
+
+$(DL_DIR)/$(U_BOOT_SOURCE):
+	 $(WGET) -P $(DL_DIR) $(U_BOOT_SITE)/$(U_BOOT_SOURCE)
+
+$(U_BOOT_DIR)/.unpacked: $(DL_DIR)/$(U_BOOT_SOURCE)
+	$(U_BOOT_CAT) $(DL_DIR)/$(U_BOOT_SOURCE) \
+		| tar -C $(PROJECT_BUILD_DIR) $(TAR_OPTIONS) -
+	toolchain/patch-kernel.sh $(U_BOOT_DIR) target/device/Atmel/u-boot/ \
+		u-boot-$(U_BOOT_VERSION)-\*.patch\*
 	touch $@
 
-$(UBOOT_PATCHES)/.unpacked: $(DL_DIR)/$(UBOOT_PATCH_SOURCE)
-	mkdir -p $(UBOOT_PATCHES)
-	bzcat $(DL_DIR)/$(UBOOT_PATCH_SOURCE) | tar -C $(UBOOT_PATCHES) -xvf -
+$(U_BOOT_DIR)/.header_copied: $(U_BOOT_DIR)/.unpacked
+ifneq ($(BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE),"")
+	@if [ ! -f "$(BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE)" ]; then	\
+		echo "	You specified BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE,"; \
+		echo "	but the file at:";				\
+		echo "	'$(BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE)'";	\
+		echo "	does not exist.";				\
+		echo;							\
+		echo "	Configure the BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE variable."; \
+		echo;							\
+		exit 1;							\
+	fi
+	cp -dpf $(BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE) $(U_BOOT_INC_CONF_FILE)
+endif
 	touch $@
 
-$(UBOOT_DIR)/.patched.$(UBOOT_PATCH_SOURCE): $(UBOOT_DIR)/.unpacked $(UBOOT_PATCHES)/.unpacked
-	toolchain/patch-kernel.sh $(UBOOT_DIR) $(UBOOT_PATCHES) \*.patch
-	touch $(UBOOT_DIR)/.patched.$(UBOOT_PATCH_SOURCE)
-# cp $(UBOOT_CONFIG_FILE) $(UBOOT_DIR)/include/configs/.
-# cp $(UBOOT_PATCHES)/cmd_defenv.c $(UBOOT_DIR)/common/.
-# cp $(UBOOT_ATMEL_BMP) $(UBOOT_DIR)/tools/logos/.
-
-$(UBOOT_BUILD_DIR)/.configured: $(UBOOT_DIR)/.patched.$(UBOOT_PATCH_SOURCE)
-ifneq ($(strip $(UBOOT_CONFIG_FILE)),)
-	cp $(UBOOT_CONFIG_FILE) $(UBOOT_DIR)/include/configs/.
+$(U_BOOT_DIR)/.configured: $(U_BOOT_DIR)/.header_copied
+ifeq ($(strip $(BR2_TARGET_U_BOOT_CONFIG_BOARD)),"")
+	@echo
+	@echo "	You did not specify a target u-boot config board, so u-boot"
+	@echo "	has no way of knowing which board you want to build your"
+	@echo "	bootloader for."
+	@echo
+	@echo "	Configure the BR2_TARGET_U_BOOT_CONFIG_BOARD variable."
+	@echo
+	@exit 1
 endif
-	$(MAKE) \
-		O=$(UBOOT_BUILD_DIR) \
-		CONFIG_NOSOFTFLOAT=1 \
-		-C $(UBOOT_DIR) \
-		$(UBOOT_CONFIG)
-	$(SED) 's/ $$(SREC) $$(BIN)//' $(UBOOT_DIR)/examples/Makefile
-	touch $(UBOOT_BUILD_DIR)/.configured
-# $(MAKE) O=$(UBOOT_BUILD_DIR) -C $(UBOOT_DIR)
-
-$(MKIMAGE_BINLOC): $(UBOOT_BUILD_DIR)/.configured
-	$(MAKE) \
-		O=$(UBOOT_BUILD_DIR) \
-		CROSS_COMPILE= \
-		CONFIG_NOSOFTFLOAT=1 \
-		TOPDIR=$(UBOOT_DIR) \
-		SRCTREE=$(UBOOT_DIR) \
-		-C $(UBOOT_DIR) tools
-	touch $(MKIMAGE_BINLOC)
-
-$(UBOOT_BUILD_DIR)/u-boot.bin: $(UBOOT_BUILD_DIR)/.configured $(UBOOT_CUSTOM)
-	echo TARGET_CROSS=$(TARGET_CROSS)
-	$(MAKE) O=$(UBOOT_BUILD_DIR) \
-		CROSS_COMPILE=$(TARGET_CROSS) \
-		CONFIG_NOSOFTFLOAT=1 \
-		TOPDIR=$(UBOOT_DIR) \
-		SRCTREE=$(UBOOT_DIR) \
-		TFTPBOOT=/tftpboot \
-		-C $(UBOOT_DIR)
-
-$(BINARIES_DIR)/$(UBOOT_BIN): $(UBOOT_BUILD_DIR)/u-boot.bin
-	mkdir -p $(BINARIES_DIR)
-	cp $(UBOOT_BUILD_DIR)/u-boot.bin $(BINARIES_DIR)/$(UBOOT_BIN)
-
-/tftpboot/$(UBOOT_BIN): $(UBOOT_BUILD_DIR)/u-boot.bin
-	mkdir -p /tftpboot
-	cp $(UBOOT_BUILD_DIR)/u-boot.bin /tftpboot/$(UBOOT_BIN)
-
-uboot-bin: $(BINARIES_DIR)/$(UBOOT_BIN) /tftpboot/$(UBOOT_BIN)
+	$(TARGET_CONFIGURE_OPTS)		\
+		CFLAGS="$(TARGET_CFLAGS)"	\
+		LDFLAGS="$(TARGET_LDFLAGS)"	\
+		$(MAKE) -C $(U_BOOT_DIR)	\
+		$(BR2_TARGET_U_BOOT_CONFIG_BOARD)
+	touch $@
 
-$(UBOOT_CUSTOM).test: .config $(UBOOT_BUILD_DIR)/.configured
-	echo "/* Automatically generated file, do not edit */" \
-	> $(UBOOT_CUSTOM).test
-ifneq ($(TARGET_HOSTNAME),)
-	echo "#if defined(CONFIG_HOSTNAME)" >> $(UBOOT_CUSTOM).test
-	echo "#undef CONFIG_HOSTNAME" >> $(UBOOT_CUSTOM).test
-	echo "#define CONFIG_HOSTNAME $(TARGET_HOSTNAME)">> $(UBOOT_CUSTOM).test
-	echo "#endif" >> $(UBOOT_CUSTOM).test
-endif
-ifneq ($(TARGET_UBOOT_IPADDR),)
-	echo "#define CONFIG_IPADDR $(TARGET_UBOOT_IPADDR)">> $(UBOOT_CUSTOM).test
-endif
-ifneq ($(TARGET_UBOOT_SERVERIP),)
-	echo "#define CONFIG_SERVERIP $(TARGET_UBOOT_SERVERIP)">> $(UBOOT_CUSTOM).test
+$(U_BOOT_DIR)/.header_modified: $(U_BOOT_DIR)/.configured
+	# Modify configuration header in $(U_BOOT_INC_CONF_FILE)
+	@echo >> $(U_BOOT_INC_CONF_FILE)
+	@echo "/* Add a wrapper around the values Buildroot sets. */" >> $(U_BOOT_INC_CONF_FILE)
+	@echo "#ifndef __BR2_ADDED_CONFIG_H" >> $(U_BOOT_INC_CONF_FILE)
+	@echo "#define __BR2_ADDED_CONFIG_H" >> $(U_BOOT_INC_CONF_FILE)
+ifneq ($(strip $(BR2_PROJECT)),"")
+	@echo "#define CONFIG_HOSTNAME" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_HOSTNAME.*,#define CONFIG_HOSTNAME	$(subst ",,$(BR2_PROJECT)),' $(U_BOOT_INC_CONF_FILE)
 endif
-ifneq ($(TARGET_UBOOT_GATEWAY),)
-	echo "#define CONFIG_GATEWAYIP $(TARGET_UBOOT_GATEWAY)">> $(UBOOT_CUSTOM).test
+ifneq ($(strip $(BR2_TARGET_U_BOOT_SERVERIP)),"")
+	@echo "#define CONFIG_SERVERIP" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_SERVERIP.*,#define CONFIG_SERVERIP	$(subst ",,$(BR2_TARGET_U_BOOT_SERVERIP)),' $(U_BOOT_INC_CONF_FILE)
 endif
-ifneq ($(TARGET_UBOOT_NETMASK),)
-	echo "#define CONFIG_NETMASK $(TARGET_UBOOT_NETMASK)">> $(UBOOT_CUSTOM).test
+ifneq ($(strip $(BR2_TARGET_U_BOOT_IPADDR)),"")
+	@echo "#define CONFIG_IPADDR" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_IPADDR.*,#define CONFIG_IPADDR	$(subst ",,$(BR2_TARGET_U_BOOT_IPADDR)),' $(U_BOOT_INC_CONF_FILE)
+ifneq ($(strip $(BR2_TARGET_U_BOOT_GATEWAY)),"")
+	@echo "#define CONFIG_GATEWAYIP" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_GATEWAYIP.*,#define CONFIG_GATEWAYIP	$(subst ",,$(BR2_TARGET_U_BOOT_GATEWAY)),' $(U_BOOT_INC_CONF_FILE)
 endif
-ifneq ($(TARGET_UBOOT_ETHADDR),)
-	echo "#define CONFIG_ETHADDR $(TARGET_UBOOT_ETHADDR)">> $(UBOOT_CUSTOM).test
-endif
-	diff -q $(UBOOT_CUSTOM).test $(UBOOT_CUSTOM) || cp -af $(UBOOT_CUSTOM).test $(UBOOT_CUSTOM)
-
-$(UBOOT_SCR): .config
-ifneq ($(TARGET_UBOOT_IPADDR),)
-	echo setenv ipaddr $(TARGET_UBOOT_IPADDR) > $(UBOOT_SCR)
+ifneq ($(strip $(BR2_TARGET_U_BOOT_NETMASK)),"")
+	@echo "#define CONFIG_NETMASK" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_NETMASK.*,#define CONFIG_NETMASK	$(subst ",,$(BR2_TARGET_U_BOOT_NETMASK)),' $(U_BOOT_INC_CONF_FILE)
 endif
-ifneq ($(TARGET_UBOOT_SERVERIP),)
-	echo setenv serverip $(TARGET_UBOOT_SERVERIP) >> $(UBOOT_SCR)
+endif # end BR2_TARGET_U_BOOT_IPADDR
+ifneq ($(strip $(BR2_TARGET_U_BOOT_ETH0ADDR)),"")
+	@echo "#define CONFIG_ETHADDR" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_ETHADDR.*,#define CONFIG_ETHADDR	$(subst ",,$(BR2_TARGET_U_BOOT_ETH0ADDR)),' $(U_BOOT_INC_CONF_FILE)
 endif
-ifneq ($(TARGET_UBOOT_GATEWAY),)
-	echo setenv gatewayip $(TARGET_UBOOT_GATEWAY) >> $(UBOOT_SCR)
+ifneq ($(strip $(BR2_TARGET_U_BOOT_ETH1ADDR)),"")
+	@echo "#define CONFIG_ETH1ADDR" >> $(U_BOOT_INC_CONF_FILE)
+	$(SED) 's,^#define.*CONFIG_ETH1ADDR.*,#define CONFIG_ETH1ADDR	$(subst ",,$(BR2_TARGET_U_BOOT_ETH1ADDR)),' $(U_BOOT_INC_CONF_FILE)
 endif
-ifneq ($(TARGET_UBOOT_NETMASK),)
-	echo setenv netmask $(TARGET_UBOOT_NETMASK) >> $(UBOOT_SCR)
+ifneq ($(strip $(BR2_TARGET_U_BOOT_BOOTARGS)),"")
+	@echo "#undef CONFIG_BOOTARGS" >> $(U_BOOT_INC_CONF_FILE)
+	@echo '#define CONFIG_BOOTARGS $(BR2_TARGET_U_BOOT_BOOTARGS)' >> $(U_BOOT_INC_CONF_FILE)
 endif
-	echo setenv linux $(BOARD_NAME)-linux-$(LINUX26_VERSION)-$(DATE).gz >> $(UBOOT_SCR)
-	echo setenv kernel-version $(LINUX26_VERSION) >> $(UBOOT_SCR)
-	echo setenv kernel-date $(DATE) >> $(UBOOT_SCR)
-	echo setenv hostname $(TARGET_HOSTNAME) >> $(UBOOT_SCR)
-	echo setenv fs-date $(DATE) >> $(UBOOT_SCR)
-	echo setenv rd-1 rootfs.$(BR2_ARCH)-$(DATE).ext2 >> $(UBOOT_SCR)
-	echo setenv rd-2 rootfs.$(BR2_ARCH)-$(DATE).jffs2 >> $(UBOOT_SCR)
-	echo setenv rd rootfs.$(BR2_ARCH)-$(DATE).ext2 >> $(UBOOT_SCR)
-	echo setenv ver 1 >> $(UBOOT_SCR)
-ifneq ($(TARGET_UBOOT_ETHADDR),)
-	echo setenv ethaddr $(TARGET_UBOOT_ETHADDR) >> $(UBOOT_SCR)
+ifneq ($(strip $(BR2_TARGET_U_BOOT_BOOTCMD)),"")
+	@echo "#undef CONFIG_BOOTCOMMAND" >> $(U_BOOT_INC_CONF_FILE)
+	@echo '#define CONFIG_BOOTCOMMAND $(BR2_TARGET_U_BOOT_BOOTCMD)' >> $(U_BOOT_INC_CONF_FILE)
 endif
-	echo setenv fstype ram >> $(UBOOT_SCR)
-	echo fs >> $(UBOOT_SCR)
-	echo os >> $(UBOOT_SCR)
-	echo setargs >> $(UBOOT_SCR)
-	echo saveenv >> $(UBOOT_SCR)
-
-$(UBOOT_SCR).$(PROJECT): $(UBOOT_SCR) $(MKIMAGE)
-	$(MKIMAGE) -A arm \
-				-O linux \
-				-T script \
-				-C none \
-				-a 0 \
-				-e 0 \
-				-n "autoscr config" \
-				-d $(UBOOT_SCR) \
-				$(UBOOT_SCR).$(PROJECT)
-	cp $(UBOOT_SCR).$(PROJECT) /tftpboot
-
-$(MKIMAGE): $(MKIMAGE_BINLOC)
-	cp -f $(MKIMAGE_BINLOC) $(MKIMAGE)
-
-uboot: $(MKIMAGE) uboot-bin $(UBOOT_SCR).$(PROJECT)
-
-uboot-source: $(DL_DIR)/$(UBOOT_SOURCE)
-
-uboot-clean:
-	rm -fr $(UBOOT_BUILD_DIR)
-	rm -fr $(UBOOT_PATCHES)
-	rm -f $(BINARIES_DIR)/$(UBOOT_BIN)
-	rm -fr $(UBOOT_DIR)
-	rm -f $(UBOOT_SCR)
-	rm -f $(UBOOT_SCR).$(PROJECT)
-# -$(MAKE) -C $(UBOOT_DIR)/uboot-tools clean
-
-uboot-dirclean: uboot-clean
-	rm -rf $(UBOOT_DIR)
-
-uboot-new:
-	rm -fr $(UBOOT_BUILD_DIR)/u-boot
-	rm -fr $(UBOOT_BUILD_DIR)/u-boot.gz
-	rm -fr $(UBOOT_BUILD_DIR)/u-boot.bin
-	rm -fr /tftpboot/$(UBOOT_BIN)
-	rm -fr $(BINARIES_DIR)/$(UBOOT_BIN)
+	@echo "#endif /* __BR2_ADDED_CONFIG_H */" >> $(U_BOOT_INC_CONF_FILE)
+	touch $@
 
-.PHONY: uboot-bin
-#############################################################
-#
-# Build the uboot root filesystem image
-#
-#############################################################
+$(U_BOOT_DIR)/$(U_BOOT_BIN): $(U_BOOT_DIR)/.header_modified
+	$(TARGET_CONFIGURE_OPTS) \
+		CFLAGS="$(TARGET_CFLAGS)" \
+		LDFLAGS="$(TARGET_LDFLAGS)" \
+		$(MAKE) -C $(U_BOOT_DIR)
 
-UBOOT_TARGET:=$(IMAGE).uboot
+$(BINARIES_DIR)/$(U_BOOT_BIN): $(U_BOOT_DIR)/$(U_BOOT_BIN)
+	cp -dpf $(U_BOOT_DIR)/$(U_BOOT_BIN) $(BINARIES_DIR)
+	cp -dpf $(U_BOOT_DIR)/tools/$(U_BOOT_TOOLS_BIN) $(STAGING_DIR)/usr/bin/
 
-ubootroot: host-fakeroot makedevs uboot
-	-@find $(TARGET_DIR) -type f -perm +111 | xargs $(STRIPCMD) 2>/dev/null || true
-	@rm -rf $(TARGET_DIR)/usr/man
-	@rm -rf $(TARGET_DIR)/usr/info
-	-/sbin/ldconfig -r $(TARGET_DIR) 2>/dev/null
-	# Use fakeroot to pretend all target binaries are owned by root
-	rm -f $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	touch $(STAGING_DIR)/.fakeroot.00000
-	cat $(STAGING_DIR)/.fakeroot* > $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	echo "chown -R root:root $(TARGET_DIR)" >> $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	# Use fakeroot to pretend to create all needed device nodes
-	echo "$(STAGING_DIR)/bin/makedevs -d $(TARGET_DEVICE_TABLE) $(TARGET_DIR)" \
-		>> $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	# Use fakeroot so mkuboot believes the previous fakery
-	echo "$(UBOOT_DIR)/uboot-tools/mkuboot " \
-		    "$(TARGET_DIR) $(UBOOT_TARGET) " \
-		    "-noappend $(UBOOT_ENDIANNESS)" \
-		>> $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	chmod a+x $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	$(STAGING_DIR)/usr/bin/fakeroot -- $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
-	-@rm -f $(STAGING_DIR)/_fakeroot.$(notdir $(UBOOT_TARGET))
+u-boot: gcc $(BINARIES_DIR)/$(U_BOOT_BIN)
 
-ubootroot-source: uboot-source
+u-boot-clean:
+	$(MAKE) -C $(U_BOOT_DIR) clean
 
-ubootroot-clean:
-	-$(MAKE) -C $(UBOOT_DIR) clean
+u-boot-dirclean:
+	rm -rf $(U_BOOT_DIR)
 
-ubootroot-dirclean:
-	rm -rf $(UBOOT_DIR)
+u-boot-source: $(DL_DIR)/$(U_BOOT_SOURCE)
 
 #############################################################
 #
 # Toplevel Makefile options
 #
 #############################################################
-ifeq ($(strip $(BR2_TARGET_UBOOT)),y)
-TARGETS+=uboot
+ifeq ($(strip $(BR2_TARGET_U_BOOT)),y)
+TARGETS+=u-boot
 endif
 
-uboot-test:
-	-@echo source=$(DL_DIR)/$(UBOOT_SOURCE)
-	-@ls $(DL_DIR)/$(UBOOT_SOURCE)
-	-@echo patch=$(DL_DIR)/$(UBOOT_PATCH_SOURCE)
-	-@ls $(DL_DIR)/$(UBOOT_PATCH_SOURCE)
-	-@echo unpacked=$(UBOOT_PATCHES)/.unpacked
-	-@ls $(UBOOT_PATCHES)/.unpacked
-	-@echo patch-unpacked=$(UBOOT_PATCHES)/.unpacked
-	-@ls $(UBOOT_PATCHES)/.unpacked
-	-@echo patched-source=$(UBOOT_DIR)/.patched.$(UBOOT_PATCH_SOURCE)
-	-@ls $(UBOOT_DIR)/.patched.$(UBOOT_PATCH_SOURCE)
-	-@echo configured=$(UBOOT_BUILD_DIR)/.configured
-	-@ls $(UBOOT_BUILD_DIR)/.configured
-	-@echo mkimage=$(MKIMAGE_BINLOC)
-	-@ls $(MKIMAGE_BINLOC)
-	-@echo u-boot.bin=$(UBOOT_BUILD_DIR)/u-boot.bin
-	-@ls $(UBOOT_BUILD_DIR)/u-boot.bin
-	-@echo binaries-u-boot.bin=$(BINARIES_DIR)/$(UBOOT_BIN)
-	-@ls $(BINARIES_DIR)/$(UBOOT_BIN)
-	-@echo tftpboot=/tftpboot/$(UBOOT_BIN)
-	-@ls /tftpboot/$(UBOOT_BIN)
-	-@echo "mkimage = $(MKIMAGE)"
-	-@ls $(MKIMAGE)
-	-@echo "u-boot script=$(UBOOT_SCR).$(PROJECT)"
-	-@ls $(UBOOT_SCR).$(PROJECT)
-	-@echo "u-boot script (ASCII)=$(UBOOT_SCR)"
-	-@ls $(UBOOT_SCR)
-	-@echo "mkimage binary=$(MKIMAGE_BINLOC)"
-	-@ls $(MKIMAGE_BINLOC)
+u-boot-status:
+	@echo
+	@echo U_BOOT_INC_CONF_FILE = $(U_BOOT_INC_CONF_FILE)
+	@echo
+	@echo BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE = $(BR2_TARGET_U_BOOT_CONFIG_HEADER_FILE)
+	@echo BR2_TARGET_U_BOOT_CONFIG_BOARD = $(BR2_TARGET_U_BOOT_CONFIG_BOARD)
+	@echo BR2_TARGET_U_BOOT_SERVERIP = $(BR2_TARGET_U_BOOT_SERVERIP)
+	@echo BR2_TARGET_U_BOOT_IPADDR = $(BR2_TARGET_U_BOOT_IPADDR)
+	@echo BR2_TARGET_U_BOOT_GATEWAY = $(BR2_TARGET_U_BOOT_GATEWAY)
+	@echo BR2_TARGET_U_BOOT_NETMASK = $(BR2_TARGET_U_BOOT_NETMASK)
+	@echo BR2_TARGET_U_BOOT_ETH0ADDR = $(BR2_TARGET_U_BOOT_ETH0ADDR)
+	@echo BR2_TARGET_U_BOOT_ETH1ADDR = $(BR2_TARGET_U_BOOT_ETH1ADDR)
+	@echo BR2_TARGET_U_BOOT_BOOTARGS = $(BR2_TARGET_U_BOOT_BOOTARGS)
+	@echo BR2_TARGET_U_BOOT_BOOTCMD = $(BR2_TARGET_U_BOOT_BOOTCMD)
+	@echo
+	@exit 0
diff --git a/target/device/Atmel/uClibc.config.avr32 b/target/device/Atmel/uClibc.config.avr32
index ba8c289af..a133de62c 100644
--- a/target/device/Atmel/uClibc.config.avr32
+++ b/target/device/Atmel/uClibc.config.avr32
@@ -1,6 +1,6 @@
 #
 # Automatically generated make config: don't edit
-# Sat Oct 13 09:10:03 2007
+# Thu Jan 31 14:27:19 2008
 #
 # TARGET_alpha is not set
 # TARGET_arm is not set
@@ -50,7 +50,7 @@ UCLIBC_HAS_FLOATS=y
 # UCLIBC_HAS_FPU is not set
 UCLIBC_HAS_SOFT_FLOAT=y
 DO_C99_MATH=y
-KERNEL_HEADERS="/usr/include"
+KERNEL_HEADERS="/home/john.voltz/avr32/BSP2/software/buildroot/buildroot-avr32-v2.1.0/toolchain_build_avr32_nofpu/linux/include"
 HAVE_DOT_CONFIG=y
 
 #
@@ -71,7 +71,7 @@ LDSO_BASE_FILENAME="ld.so"
 UCLIBC_CTOR_DTOR=y
 # HAS_NO_THREADS is not set
 UCLIBC_HAS_THREADS=y
-PTHREADS_DEBUG_SUPPORT=y
+# PTHREADS_DEBUG_SUPPORT is not set
 LINUXTHREADS_OLD=y
 UCLIBC_HAS_LFS=y
 # MALLOC is not set
@@ -80,8 +80,8 @@ MALLOC_STANDARD=y
 MALLOC_GLIBC_COMPAT=y
 UCLIBC_DYNAMIC_ATEXIT=y
 # COMPAT_ATEXIT is not set
-# UCLIBC_SUSV3_LEGACY is not set
-# UCLIBC_SUSV3_LEGACY_MACROS is not set
+UCLIBC_SUSV3_LEGACY=y
+UCLIBC_SUSV3_LEGACY_MACROS=y
 UCLIBC_HAS_SHADOW=y
 # UCLIBC_HAS_PROGRAM_INVOCATION_NAME is not set
 UCLIBC_HAS___PROGNAME=y
@@ -105,7 +105,7 @@ UCLIBC_GRP_BUFFER_SIZE=256
 UCLIBC_HAS_IPV6=y
 UCLIBC_HAS_RPC=y
 UCLIBC_HAS_FULL_RPC=y
-# UCLIBC_HAS_REENTRANT_RPC is not set
+UCLIBC_HAS_REENTRANT_RPC=y
 # UCLIBC_USE_NETLINK is not set
 # UCLIBC_HAS_BSD_RES_CLOSE is not set
 
@@ -120,8 +120,11 @@ UCLIBC_HAS_CTYPE_SIGNED=y
 UCLIBC_HAS_CTYPE_CHECKED=y
 # UCLIBC_HAS_CTYPE_ENFORCED is not set
 UCLIBC_HAS_WCHAR=y
-# UCLIBC_HAS_LOCALE is not set
+UCLIBC_HAS_LOCALE=y
+# UCLIBC_PREGENERATED_LOCALE_DATA is not set
+# UCLIBC_HAS_XLOCALE is not set
 UCLIBC_HAS_HEXADECIMAL_FLOATS=y
+# UCLIBC_HAS_GLIBC_DIGIT_GROUPING is not set
 UCLIBC_HAS_GLIBC_CUSTOM_PRINTF=y
 UCLIBC_PRINTF_SCANF_POSITIONAL_ARGS=9
 UCLIBC_HAS_SCANF_GLIBC_A_FLAG=y
@@ -157,7 +160,7 @@ UCLIBC_HAS_REGEX=y
 UCLIBC_HAS_REGEX_OLD=y
 UCLIBC_HAS_FNMATCH=y
 UCLIBC_HAS_FNMATCH_OLD=y
-# UCLIBC_HAS_WORDEXP is not set
+UCLIBC_HAS_WORDEXP=y
 UCLIBC_HAS_FTW=y
 UCLIBC_HAS_GLOB=y
 # UCLIBC_HAS_GNU_GLOB is not set
@@ -182,7 +185,7 @@ UCLIBC_BUILD_NOEXECSTACK=y
 #
 # uClibc development/debugging options
 #
-CROSS_COMPILER_PREFIX="/home/ulf/projects/Buildroot/20071013/buildroot/build_avr32/staging_dir/usr/bin/avr32-linux-uclibc-"
+CROSS_COMPILER_PREFIX="/home/john.voltz/avr32/BSP2/software/buildroot/buildroot-avr32-v2.1.0/build_avr32_nofpu/staging_dir/usr/bin/avr32-linux-uclibc-"
 UCLIBC_EXTRA_CFLAGS=""
 # DODEBUG is not set
 # DODEBUG_PT is not set