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| author | Eric Andersen <andersen@codepoet.org> | 2005-03-02 11:15:05 +0000 |
|---|---|---|
| committer | Eric Andersen <andersen@codepoet.org> | 2005-03-02 11:15:05 +0000 |
| commit | df31643d0dbe5a55b638ba6bfe11e860137846ce (patch) | |
| tree | 74adfa15f59aebbdd79f3055c5fc1b6874911727 /toolchain/binutils/2.15.94.0.2.2/450-mips-restore-embedded-pic.patch | |
| parent | 1bd837469125fef335e893952529f7988273f6ae (diff) | |
| download | buildroot-novena-df31643d0dbe5a55b638ba6bfe11e860137846ce.tar.gz buildroot-novena-df31643d0dbe5a55b638ba6bfe11e860137846ce.zip | |
450-mips-restore-embedded-pic is I believe the minimum necessary to get gcc
3.3.x to compile again on mips. As was, compiling gcc 3.3.x for mips would
cause gcc to blow up whining about combining symbols from different segments,
since stock binutils no longer supports the PC relative expressions emitted by
gcc 3.3.x for mips when generating embedded PIC code.
Diffstat (limited to 'toolchain/binutils/2.15.94.0.2.2/450-mips-restore-embedded-pic.patch')
| -rw-r--r-- | toolchain/binutils/2.15.94.0.2.2/450-mips-restore-embedded-pic.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/toolchain/binutils/2.15.94.0.2.2/450-mips-restore-embedded-pic.patch b/toolchain/binutils/2.15.94.0.2.2/450-mips-restore-embedded-pic.patch new file mode 100644 index 000000000..93c1c5950 --- /dev/null +++ b/toolchain/binutils/2.15.94.0.2.2/450-mips-restore-embedded-pic.patch @@ -0,0 +1,75 @@ +--- binutils/gas/config/tc-mips.c.orig 2004-12-20 12:16:50.000000000 -0700 ++++ binutils/gas/config/tc-mips.c 2005-03-02 03:42:08.000000000 -0700 +@@ -10955,8 +10955,6 @@ + + buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where); + +- assert (! fixP->fx_pcrel); +- + /* Don't treat parts of a composite relocation as done. There are two + reasons for this: + +@@ -11000,7 +10998,6 @@ + case BFD_RELOC_MIPS_CALL_HI16: + case BFD_RELOC_MIPS_CALL_LO16: + case BFD_RELOC_MIPS16_GPREL: +- assert (! fixP->fx_pcrel); + /* Nothing needed to do. The value comes from the reloc entry */ + break; + +@@ -12867,8 +12864,23 @@ + *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); + reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; + +- assert (! fixp->fx_pcrel); +- reloc->addend = fixp->fx_addnumber; ++ if (fixp->fx_pcrel) ++ { ++ if (OUTPUT_FLAVOR == bfd_target_elf_flavour) ++ { ++ /* At this point, fx_addnumber is "symbol offset - reloc->address". ++ Relocations want only the symbol offset. */ ++ reloc->addend = fixp->fx_addnumber + reloc->address; ++ } ++ else ++ { ++ /* A gruesome hack which is a result of the gruesome gas reloc ++ handling. */ ++ reloc->addend = reloc->address; ++ } ++ } ++ else ++ reloc->addend = fixp->fx_addnumber; + + /* Since the old MIPS ELF ABI uses Rel instead of Rela, encode the vtable + entry to be used in the relocation's section offset. */ +@@ -12879,6 +12891,16 @@ + } + + code = fixp->fx_r_type; ++ if (fixp->fx_pcrel) ++ { ++ if (code == BFD_RELOC_32) ++ code = BFD_RELOC_32_PCREL; ++ else ++ as_bad_where (fixp->fx_file, fixp->fx_line, ++ _("Cannot make %s relocation PC relative"), ++ bfd_get_reloc_code_name (code)); ++ } ++ + + /* To support a PC relative reloc, we used a Cygnus extension. + We check for that here to make sure that we don't let such a +--- binutils/gas/config/tc-mips.h 29 Apr 2004 05:14:22 -0000 1.35 ++++ binutils/gas/config/tc-mips.h 5 May 2004 17:38:51 -0000 +@@ -58,6 +58,10 @@ + + #define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2) + ++/* We permit PC relative difference expressions when generating ++ embedded PIC code. */ ++#define DIFF_EXPR_OK ++ + /* Tell assembler that we have an itbl_mips.h header file to include. */ + #define HAVE_ITBL_CPU + |