diff options
| author | Ulf Samuelsson <ulf.samuelsson@atmel.com> | 2008-03-29 23:09:46 +0000 |
|---|---|---|
| committer | Ulf Samuelsson <ulf.samuelsson@atmel.com> | 2008-03-29 23:09:46 +0000 |
| commit | c659b13a2fc07188f716327364f6080e9486f3de (patch) | |
| tree | 27e7d039a80625c01afa917d831057b2d684a69d /target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch | |
| parent | 230723920abcc27128ba271d0b20428e81fc9515 (diff) | |
| download | buildroot-novena-c659b13a2fc07188f716327364f6080e9486f3de.tar.gz buildroot-novena-c659b13a2fc07188f716327364f6080e9486f3de.zip | |
Remove duplicate AVR32 patches, and add support for ARCH and conditional AVR32 patches
Diffstat (limited to 'target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch')
| -rw-r--r-- | target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch | 19857 |
1 files changed, 0 insertions, 19857 deletions
diff --git a/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch b/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch deleted file mode 100644 index 1f0a5f542..000000000 --- a/target/device/Atmel/atstk1002/kernel-patches/linux-2.6.23-100-avr32-atmel.2.patch +++ /dev/null @@ -1,19857 +0,0 @@ - MAINTAINERS | 7 + - Makefile | 2 +- - arch/avr32/Kconfig | 34 +- - arch/avr32/Makefile | 3 +- - arch/avr32/boards/atngw100/Kconfig | 12 + - arch/avr32/boards/atngw100/flash.c | 5 +- - arch/avr32/boards/atngw100/setup.c | 26 +- - arch/avr32/boards/atstk1000/Kconfig | 82 +- - arch/avr32/boards/atstk1000/Makefile | 2 + - arch/avr32/boards/atstk1000/atstk1000.h | 2 + - arch/avr32/boards/atstk1000/atstk1002.c | 148 ++- - arch/avr32/boards/atstk1000/atstk1003.c | 181 +++ - arch/avr32/boards/atstk1000/atstk1004.c | 152 +++ - arch/avr32/boards/atstk1000/flash.c | 5 +- - arch/avr32/boards/atstk1000/setup.c | 64 + - arch/avr32/configs/atngw100_defconfig | 210 +++- - arch/avr32/configs/atstk1002_defconfig | 482 +++++-- - arch/avr32/configs/atstk1003_defconfig | 1045 ++++++++++++++ - arch/avr32/configs/atstk1004_defconfig | 722 ++++++++++ - arch/avr32/drivers/Makefile | 1 + - arch/avr32/drivers/dw-dmac.c | 761 +++++++++++ - arch/avr32/drivers/dw-dmac.h | 42 + - arch/avr32/kernel/Makefile | 6 +- - arch/avr32/kernel/dma-controller.c | 34 + - arch/avr32/kernel/entry-avr32b.S | 26 +- - arch/avr32/kernel/setup.c | 2 +- - arch/avr32/kernel/vmlinux.lds.S | 143 ++ - arch/avr32/kernel/vmlinux.lds.c | 142 -- - arch/avr32/mach-at32ap/Kconfig | 19 +- - arch/avr32/mach-at32ap/Makefile | 5 +- - arch/avr32/mach-at32ap/at32ap7000.c | 1324 ------------------ - arch/avr32/mach-at32ap/at32ap700x.c | 1754 ++++++++++++++++++++++++ - arch/avr32/mach-at32ap/clock.c | 116 ++ - arch/avr32/mach-at32ap/gpio-dev.c | 573 ++++++++ - arch/avr32/mach-at32ap/hsmc.c | 129 ++- - arch/avr32/mach-at32ap/pio.c | 80 ++ - arch/avr32/mach-at32ap/pm.h | 8 + - arch/avr32/mm/dma-coherent.c | 7 + - arch/avr32/mm/init.c | 12 +- - drivers/char/watchdog/Kconfig | 2 +- - drivers/char/watchdog/at32ap700x_wdt.c | 69 +- - drivers/i2c/busses/Kconfig | 8 + - drivers/i2c/busses/Makefile | 1 + - drivers/i2c/busses/i2c-atmeltwi.c | 436 ++++++ - drivers/i2c/busses/i2c-atmeltwi.h | 117 ++ - drivers/misc/Kconfig | 9 + - drivers/misc/Makefile | 1 + - drivers/misc/atmel-ssc.c | 174 +++ - drivers/mmc/host/Kconfig | 10 + - drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/atmel-mci.c | 1176 ++++++++++++++++ - drivers/mmc/host/atmel-mci.h | 192 +++ - drivers/mtd/chips/cfi_cmdset_0001.c | 43 + - drivers/mtd/chips/cfi_cmdset_0002.c | 6 +- - drivers/pcmcia/Kconfig | 7 + - drivers/pcmcia/Makefile | 1 + - drivers/pcmcia/at32_cf.c | 531 ++++++++ - drivers/pcmcia/cistpl.c | 48 +- - drivers/spi/atmel_spi.c | 4 +- - drivers/usb/gadget/Kconfig | 26 +- - drivers/usb/gadget/Makefile | 1 + - drivers/usb/gadget/atmel_usba_udc.c | 2038 ++++++++++++++++++++++++++++ - drivers/usb/gadget/atmel_usba_udc.h | 350 +++++ - drivers/video/atmel_lcdfb.c | 6 +- - drivers/video/backlight/Kconfig | 12 + - drivers/video/backlight/Makefile | 2 + - drivers/video/backlight/ltv350qv.c | 339 +++++ - drivers/video/backlight/ltv350qv.h | 95 ++ - include/asm-avr32/arch-at32ap/at32ap7000.h | 35 - - include/asm-avr32/arch-at32ap/at32ap700x.h | 35 + - include/asm-avr32/arch-at32ap/board.h | 39 + - include/asm-avr32/arch-at32ap/cpu.h | 2 +- - include/asm-avr32/arch-at32ap/io.h | 4 +- - include/asm-avr32/arch-at32ap/portmux.h | 13 + - include/asm-avr32/arch-at32ap/smc.h | 51 +- - include/asm-avr32/dma-controller.h | 166 +++ - include/asm-avr32/dma-mapping.h | 17 +- - include/asm-avr32/system.h | 13 +- - include/asm-avr32/unistd.h | 13 + - include/linux/atmel-ssc.h | 312 +++++ - include/linux/spi/at73c213.h | 25 + - include/pcmcia/cs_types.h | 2 +- - init/do_mounts.c | 8 +- - scripts/checkstack.pl | 5 + - sound/Kconfig | 6 + - sound/Makefile | 3 +- - sound/avr32/Kconfig | 11 + - sound/avr32/Makefile | 3 + - sound/avr32/ac97c.c | 914 +++++++++++++ - sound/avr32/ac97c.h | 71 + - sound/oss/Kconfig | 4 + - sound/oss/Makefile | 1 + - sound/oss/at32_abdac.c | 722 ++++++++++ - sound/oss/at32_abdac.h | 59 + - sound/spi/Kconfig | 31 + - sound/spi/Makefile | 5 + - sound/spi/at73c213.c | 1121 +++++++++++++++ - sound/spi/at73c213.h | 119 ++ - 98 files changed, 16057 insertions(+), 1826 deletions(-) - create mode 100644 arch/avr32/boards/atngw100/Kconfig - create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c - create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c - create mode 100644 arch/avr32/configs/atstk1003_defconfig - create mode 100644 arch/avr32/configs/atstk1004_defconfig - create mode 100644 arch/avr32/drivers/Makefile - create mode 100644 arch/avr32/drivers/dw-dmac.c - create mode 100644 arch/avr32/drivers/dw-dmac.h - create mode 100644 arch/avr32/kernel/dma-controller.c - create mode 100644 arch/avr32/kernel/vmlinux.lds.S - delete mode 100644 arch/avr32/kernel/vmlinux.lds.c - delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c - create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c - create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c - create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c - create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h - create mode 100644 drivers/misc/atmel-ssc.c - create mode 100644 drivers/mmc/host/atmel-mci.c - create mode 100644 drivers/mmc/host/atmel-mci.h - create mode 100644 drivers/pcmcia/at32_cf.c - create mode 100644 drivers/usb/gadget/atmel_usba_udc.c - create mode 100644 drivers/usb/gadget/atmel_usba_udc.h - create mode 100644 drivers/video/backlight/ltv350qv.c - create mode 100644 drivers/video/backlight/ltv350qv.h - delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h - create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h - create mode 100644 include/asm-avr32/dma-controller.h - create mode 100644 include/linux/atmel-ssc.h - create mode 100644 include/linux/spi/at73c213.h - create mode 100644 sound/avr32/Kconfig - create mode 100644 sound/avr32/Makefile - create mode 100644 sound/avr32/ac97c.c - create mode 100644 sound/avr32/ac97c.h - create mode 100644 sound/oss/at32_abdac.c - create mode 100644 sound/oss/at32_abdac.h - create mode 100644 sound/spi/Kconfig - create mode 100644 sound/spi/Makefile - create mode 100644 sound/spi/at73c213.c - create mode 100644 sound/spi/at73c213.h - -diff --git a/MAINTAINERS b/MAINTAINERS -index 9a91d9e..587afe3 100644 ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -669,6 +669,13 @@ P: Haavard Skinnemoen - M: hskinnemoen@atmel.com - S: Supported - -+ATMEL USBA UDC DRIVER -+P: Haavard Skinnemoen -+M: hskinnemoen@atmel.com -+L: kernel@avr32linux.org -+W: http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver -+S: Supported -+ - ATMEL WIRELESS DRIVER - P: Simon Kelley - M: simon@thekelleys.org.uk -diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig -index d12346a..62913a4 100644 ---- a/arch/avr32/Kconfig -+++ b/arch/avr32/Kconfig -@@ -87,19 +87,36 @@ config PLATFORM_AT32AP - select MMU - select PERFORMANCE_COUNTERS - -+config CPU_AT32AP700X -+ bool -+ select PLATFORM_AT32AP -+ - choice - prompt "AVR32 CPU type" - default CPU_AT32AP7000 - - config CPU_AT32AP7000 - bool "AT32AP7000" -- select PLATFORM_AT32AP -+ select CPU_AT32AP700X -+ -+config CPU_AT32AP7001 -+ bool "AT32AP7001" -+ select CPU_AT32AP700X -+ -+config CPU_AT32AP7002 -+ bool "AT32AP7002" -+ select CPU_AT32AP700X -+ - endchoice - - # - # CPU Daughterboards for ATSTK1000 - config BOARD_ATSTK1002 - bool -+config BOARD_ATSTK1003 -+ bool -+config BOARD_ATSTK1004 -+ bool - - choice - prompt "AVR32 board type" -@@ -108,6 +125,8 @@ choice - config BOARD_ATSTK1000 - bool "ATSTK1000 evaluation board" - select BOARD_ATSTK1002 if CPU_AT32AP7000 -+ select BOARD_ATSTK1003 if CPU_AT32AP7001 -+ select BOARD_ATSTK1004 if CPU_AT32AP7002 - - config BOARD_ATNGW100 - bool "ATNGW100 Network Gateway" -@@ -116,6 +135,9 @@ endchoice - if BOARD_ATSTK1000 - source "arch/avr32/boards/atstk1000/Kconfig" - endif -+if BOARD_ATNGW100 -+source "arch/avr32/boards/atngw100/Kconfig" -+endif - - choice - prompt "Boot loader type" -@@ -129,15 +151,15 @@ source "arch/avr32/mach-at32ap/Kconfig" - - config LOAD_ADDRESS - hex -- default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y -+ default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y - - config ENTRY_ADDRESS - hex -- default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y -+ default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y - - config PHYS_OFFSET - hex -- default 0x10000000 if CPU_AT32AP7000=y -+ default 0x10000000 if CPU_AT32AP700X=y - - source "kernel/Kconfig.preempt" - -@@ -175,6 +197,10 @@ config OWNERSHIP_TRACE - enabling Nexus-compliant debuggers to keep track of the PID of the - currently executing task. - -+config DW_DMAC -+ tristate "Synopsys DesignWare DMA Controller support" -+ default y if CPU_AT32AP7000 -+ - # FPU emulation goes here - - source "kernel/Kconfig.hz" -diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile -index dc6bc01..96f0030 100644 ---- a/arch/avr32/Makefile -+++ b/arch/avr32/Makefile -@@ -16,7 +16,7 @@ AFLAGS += -mrelax -mno-pic - CFLAGS_MODULE += -mno-relax - LDFLAGS_vmlinux += --relax - --cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000 -+cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap - - CFLAGS += $(cpuflags-y) - AFLAGS += $(cpuflags-y) -@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/ - core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ - core-y += arch/avr32/kernel/ - core-y += arch/avr32/mm/ -+drivers-y += arch/avr32/drivers/ - libs-y += arch/avr32/lib/ - - archincdir-$(CONFIG_PLATFORM_AT32AP) := arch-at32ap -diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig -new file mode 100644 -index 0000000..5d922df ---- /dev/null -+++ b/arch/avr32/boards/atngw100/Kconfig -@@ -0,0 +1,12 @@ -+# NGW100 customization -+ -+config BOARD_ATNGW100_I2C_GPIO -+ bool "Use GPIO for i2c instead of built-in TWI module" -+ help -+ The driver for the built-in TWI module has been plagued by -+ various problems, while the i2c-gpio driver is based on the -+ trusty old i2c-algo-bit bitbanging engine, making it work -+ on pretty much any setup. -+ -+ Choose 'Y' here if you're having i2c-related problems and -+ want to rule out the i2c bus driver. -diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c -index f9b32a8..b07ae63 100644 ---- a/arch/avr32/boards/atngw100/flash.c -+++ b/arch/avr32/boards/atngw100/flash.c -@@ -15,7 +15,7 @@ - - #include <asm/arch/smc.h> - --static struct smc_config flash_config __initdata = { -+static struct smc_timing flash_timing __initdata = { - .ncs_read_setup = 0, - .nrd_setup = 40, - .ncs_write_setup = 0, -@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = { - - .read_cycle = 120, - .write_cycle = 120, -+}; - -+static struct smc_config flash_config __initdata = { - .bus_width = 2, - .nrd_controlled = 1, - .nwe_controlled = 1, -@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void) - { - int ret; - -+ smc_set_timing(&flash_config, &flash_timing); - ret = smc_set_configuration(0, &flash_config); - if (ret < 0) { - printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); -diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c -index ef80156..2a5f587 100644 ---- a/arch/avr32/boards/atngw100/setup.c -+++ b/arch/avr32/boards/atngw100/setup.c -@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = { - }, - }; - -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_PC(25), -+ .wp_pin = GPIO_PIN_PE(0), -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = { - } - }; - -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO - static struct i2c_gpio_platform_data i2c_gpio_data = { -- .sda_pin = GPIO_PIN_PA(6), -- .scl_pin = GPIO_PIN_PA(7), -+ .sda_pin = GPIO_PIN_PA(6), -+ .scl_pin = GPIO_PIN_PA(7), -+ .sda_is_open_drain = 1, -+ .scl_is_open_drain = 1, -+ .udelay = 2, /* close to 100 kHz */ - }; - - static struct platform_device i2c_gpio_device = { -@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = { - .platform_data = &i2c_gpio_data, - }, - }; -+#endif - - static int __init atngw100_init(void) - { -@@ -154,6 +164,8 @@ static int __init atngw100_init(void) - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+ at32_add_device_mci(0, &mci0_data); -+ at32_add_device_usba(0, NULL); - - for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { - at32_select_gpio(ngw_leds[i].gpio, -@@ -161,9 +173,15 @@ static int __init atngw100_init(void) - } - platform_device_register(&ngw_gpio_leds); - -- at32_select_gpio(i2c_gpio_data.sda_pin, 0); -- at32_select_gpio(i2c_gpio_data.scl_pin, 0); -+#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO -+ at32_select_gpio(i2c_gpio_data.sda_pin, -+ AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); -+ at32_select_gpio(i2c_gpio_data.scl_pin, -+ AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); - platform_device_register(&i2c_gpio_device); -+#else -+ at32_add_device_twi(0); -+#endif - - return 0; - } -diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig -index 718578f..aac73a6 100644 ---- a/arch/avr32/boards/atstk1000/Kconfig -+++ b/arch/avr32/boards/atstk1000/Kconfig -@@ -1,34 +1,34 @@ - # STK1000 customization - --if BOARD_ATSTK1002 -+if BOARD_ATSTK1000 - --config BOARD_ATSTK1002_CUSTOM -- bool "Non-default STK-1002 jumper settings" -+config BOARD_ATSTK100X_CUSTOM -+ bool "Non-default STK1002/STK1003/STK1004 jumper settings" - help - You will normally leave the jumpers on the CPU card at their - default settings. If you need to use certain peripherals, - you will need to change some of those jumpers. - --if BOARD_ATSTK1002_CUSTOM -+if BOARD_ATSTK100X_CUSTOM - --config BOARD_ATSTK1002_SW1_CUSTOM -+config BOARD_ATSTK100X_SW1_CUSTOM - bool "SW1: use SSC1 (not SPI0)" - help - This also prevents using the external DAC as an audio interface, - and means you can't initialize the on-board QVGA display. - --config BOARD_ATSTK1002_SW2_CUSTOM -+config BOARD_ATSTK100X_SW2_CUSTOM - bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" - help - If you change this you'll want an updated boot loader putting - the console on UART-C not UART-A. - --config BOARD_ATSTK1002_SW3_CUSTOM -+config BOARD_ATSTK100X_SW3_CUSTOM - bool "SW3: use TIMER1 (not SSC0 and GCLK)" - help - This also prevents using the external DAC as an audio interface. - --config BOARD_ATSTK1002_SW4_CUSTOM -+config BOARD_ATSTK100X_SW4_CUSTOM - bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" - help - To use the camera interface you'll need a custom card (on the -@@ -36,27 +36,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM - - config BOARD_ATSTK1002_SW5_CUSTOM - bool "SW5: use MACB1 (not LCDC)" -+ depends on BOARD_ATSTK1002 - - config BOARD_ATSTK1002_SW6_CUSTOM - bool "SW6: more GPIOs (not MACB0)" -+ depends on BOARD_ATSTK1002 - - endif # custom - --config BOARD_ATSTK1002_SPI1 -+config BOARD_ATSTK100X_SPI1 - bool "Configure SPI1 controller" -- depends on !BOARD_ATSTK1002_SW4_CUSTOM -+ depends on !BOARD_ATSTK100X_SW4_CUSTOM - help - All the signals for the second SPI controller are available on - GPIO lines and accessed through the J1 jumper block. Say "y" - here to configure that SPI controller. - --config BOARD_ATSTK1002_J2_LED -+config BOARD_ATSTK1000_J2_LED - bool -- default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB -+ default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB - - choice - prompt "LEDs connected to J2:" -- depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM -+ depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM - optional - help - Select this if you have jumpered the J2 jumper block to the -@@ -64,16 +66,64 @@ choice - IDC cable. A default "heartbeat" trigger is provided, but - you can of course override this. - --config BOARD_ATSTK1002_J2_LED8 -+config BOARD_ATSTK1000_J2_LED8 - bool "LED0..LED7" - help - Select this if J2 is jumpered to LED0..LED7 amber leds. - --config BOARD_ATSTK1002_J2_RGB -+config BOARD_ATSTK1000_J2_RGB - bool "RGB leds" - help - Select this if J2 is jumpered to the RGB leds. - - endchoice - --endif # stk 1002 -+config BOARD_ATSTK1000_EXTDAC -+ bool -+ depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM -+ default y -+ -+config BOARD_ATSTK100X_ENABLE_AC97 -+ bool "Use AC97C instead of ABDAC" -+ help -+ Select this if you want to use the built-in AC97 controller -+ instead of the built-in Audio Bitstream DAC. These share -+ the same I/O pins on the AP7000, so both can't be enabled -+ at the same time. -+ -+ Note that the STK1000 kit doesn't ship with an AC97 codec on -+ board, so say N unless you've got an expansion board with an -+ AC97 codec on it that you want to use. -+ -+config BOARD_ATSTK1000_CF_HACKS -+ bool "ATSTK1000 CompactFlash hacks" -+ depends on !BOARD_ATSTK100X_SW4_CUSTOM -+ help -+ Select this if you have re-routed the CompactFlash RESET and -+ CD signals to GPIOs on your STK1000. This is necessary for -+ reset and card detection to work properly, although some CF -+ cards may be able to cope without reset. -+ -+config BOARD_ATSTK1000_CF_RESET_PIN -+ hex "CompactFlash RESET pin" -+ default 0x30 -+ depends on BOARD_ATSTK1000_CF_HACKS -+ help -+ Select which GPIO pin to use for the CompactFlash RESET -+ signal. This is specified as a hexadecimal number and should -+ be defined as 0x20 * gpio_port + pin. -+ -+ The default is 0x30, which is pin 16 on PIOB, aka GPIO14. -+ -+config BOARD_ATSTK1000_CF_DETECT_PIN -+ hex "CompactFlash DETECT pin" -+ default 0x3e -+ depends on BOARD_ATSTK1000_CF_HACKS -+ help -+ Select which GPIO pin to use for the CompactFlash CD -+ signal. This is specified as a hexadecimal number and should -+ be defined as 0x20 * gpio_port + pin. -+ -+ The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. -+ -+endif # stk 1000 -diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile -index 8e09922..beead86 100644 ---- a/arch/avr32/boards/atstk1000/Makefile -+++ b/arch/avr32/boards/atstk1000/Makefile -@@ -1,2 +1,4 @@ - obj-y += setup.o flash.o - obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o -+obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o -+obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o -diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h -index 9a49ed0..9392d32 100644 ---- a/arch/avr32/boards/atstk1000/atstk1000.h -+++ b/arch/avr32/boards/atstk1000/atstk1000.h -@@ -12,4 +12,6 @@ - - extern struct atmel_lcdfb_info atstk1000_lcdc_data; - -+void atstk1000_setup_j2_leds(void); -+ - #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ -diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index c9981b7..d30de89 100644 ---- a/arch/avr32/boards/atstk1000/atstk1002.c -+++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -11,17 +11,17 @@ - #include <linux/etherdevice.h> - #include <linux/init.h> - #include <linux/kernel.h> --#include <linux/leds.h> - #include <linux/platform_device.h> - #include <linux/string.h> - #include <linux/types.h> - #include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> - - #include <video/atmel_lcdc.h> - - #include <asm/io.h> - #include <asm/setup.h> --#include <asm/arch/at32ap7000.h> -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> - #include <asm/arch/init.h> - #include <asm/arch/portmux.h> -@@ -48,8 +48,24 @@ static struct eth_platform_data __initdata eth_data[2] = { - }, - }; - --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM - static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif - { - /* QVGA display */ - .modalias = "ltv350qv", -@@ -60,12 +76,30 @@ static struct spi_board_info spi0_board_info[] __initdata = { - }; - #endif - --#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 - static struct spi_board_info spi1_board_info[] __initdata = { { - /* patch in custom entries here */ - } }; - #endif - -+static struct mci_platform_data __initdata mci0_data = { -+ .detect_pin = GPIO_PIN_NONE, -+ .wp_pin = GPIO_PIN_NONE, -+}; -+ -+static struct cf_platform_data __initdata cf0_data = { -+#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS -+ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, -+ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, -+#else -+ .detect_pin = GPIO_PIN_NONE, -+ .reset_pin = GPIO_PIN_NONE, -+#endif -+ .vcc_pin = GPIO_PIN_NONE, -+ .ready_pin = GPIO_PIN_PB(27), -+ .cs = 4, -+}; -+ - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -121,68 +155,44 @@ static void __init set_hw_addr(struct platform_device *pdev) - clk_put(pclk); - } - --#ifdef CONFIG_BOARD_ATSTK1002_J2_LED -- --static struct gpio_led stk_j2_led[] = { --#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8 --#define LEDSTRING "J2 jumpered to LED8" -- { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -- { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -- { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -- { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -- { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -- { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -- { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -- { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -- .default_trigger = "heartbeat", }, --#else /* RGB */ --#define LEDSTRING "J2 jumpered to RGB LEDs" -- { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -- { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -- { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -- -- { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -- .default_trigger = "heartbeat", }, -- { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -- { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -- .default_trigger = "heartbeat", }, -- /* PB16, PB30 unused */ --#endif --}; -- --static struct gpio_led_platform_data stk_j2_led_data = { -- .num_leds = ARRAY_SIZE(stk_j2_led), -- .leds = stk_j2_led, --}; -- --static struct platform_device stk_j2_led_dev = { -- .name = "leds-gpio", -- .id = 2, /* gpio block J2 */ -- .dev = { -- .platform_data = &stk_j2_led_data, -- }, --}; -- --static void setup_j2_leds(void) -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1002_setup_extdac(void) - { -- unsigned i; -- -- for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++) -- at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -- -- printk("STK1002: " LEDSTRING "\n"); -- platform_device_register(&stk_j2_led_dev); -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; - } -- - #else --static void setup_j2_leds(void) -+static void __init atstk1002_setup_extdac(void) - { -+ - } --#endif -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ - - void __init setup_board(void) - { --#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM - at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ - #else - at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -@@ -219,7 +229,7 @@ static int __init atstk1002_init(void) - - at32_add_system_devices(); - --#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM - at32_add_device_usart(1); - #else - at32_add_device_usart(0); -@@ -229,23 +239,35 @@ static int __init atstk1002_init(void) - #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM - set_hw_addr(at32_add_device_eth(0, ð_data[0])); - #endif --#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM - at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); - #endif --#ifdef CONFIG_BOARD_ATSTK1002_SPI1 -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 - at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); - #endif -+ at32_add_device_twi(0); -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, &mci0_data); -+#endif - #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - #else - at32_add_device_lcdc(0, &atstk1000_lcdc_data, - fbmem_start, fbmem_size); - #endif --#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+ at32_add_device_cf(0, 2, &cf0_data); -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif - -- setup_j2_leds(); -+ atstk1000_setup_j2_leds(); -+ atstk1002_setup_extdac(); - - return 0; - } -diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c -new file mode 100644 -index 0000000..1842b7c ---- /dev/null -+++ b/arch/avr32/boards/atstk1000/atstk1003.c -@@ -0,0 +1,181 @@ -+/* -+ * ATSTK1003 daughterboard-specific init code -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/string.h> -+#include <linux/types.h> -+ -+#include <linux/spi/at73c213.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/init.h> -+#include <asm/arch/portmux.h> -+ -+#include "atstk1000.h" -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif -+ /* -+ * We can control the LTV350QV LCD panel, but it isn't much -+ * point since we don't have an LCD controller... -+ */ -+}; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+static struct cf_platform_data __initdata cf0_data = { -+#ifdef CONFIG_BOARD_ATSTK1002_CF_HACKS -+ .detect_pin = CONFIG_BOARD_ATSTK1002_CF_DETECT_PIN, -+ .reset_pin = CONFIG_BOARD_ATSTK1002_CF_RESET_PIN, -+#else -+ .detect_pin = GPIO_PIN_NONE, -+ .reset_pin = GPIO_PIN_NONE, -+#endif -+ .vcc_pin = GPIO_PIN_NONE, -+ .ready_pin = GPIO_PIN_PB(27), -+ .cs = 4, -+}; -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1003_setup_extdac(void) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#else -+static void __init atstk1003_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+#endif -+ /* USART 2/unused: expansion connector */ -+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -+ -+ at32_setup_serial_console(0); -+} -+ -+static int __init atstk1003_init(void) -+{ -+ /* -+ * ATSTK1000 uses 32-bit SDRAM interface. Reserve the -+ * SDRAM-specific pins so that nobody messes with them. -+ */ -+ at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ -+ at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ -+ at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ -+ at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ -+ at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ -+ at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ -+ at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ -+ at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ -+ at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ -+ at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ -+ at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ -+ at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ -+ at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ -+ at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ -+ at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ -+ at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ -+ at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ -+ -+ at32_add_system_devices(); -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); -+#endif -+ at32_add_device_usart(2); -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ at32_add_device_cf(0, 2, &cf0_data); -+ -+ atstk1000_setup_j2_leds(); -+ atstk1003_setup_extdac(); -+ -+ return 0; -+} -+postcore_initcall(atstk1003_init); -diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c -new file mode 100644 -index 0000000..96015dd ---- /dev/null -+++ b/arch/avr32/boards/atstk1000/atstk1004.c -@@ -0,0 +1,152 @@ -+/* -+ * ATSTK1003 daughterboard-specific init code -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/init.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/string.h> -+#include <linux/types.h> -+ -+#include <linux/spi/at73c213.h> -+#include <linux/spi/spi.h> -+ -+#include <video/atmel_lcdc.h> -+ -+#include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/init.h> -+#include <asm/arch/portmux.h> -+ -+#include "atstk1000.h" -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static struct at73c213_board_info at73c213_data = { -+ .ssc_id = 0, -+ .shortname = "AVR32 STK1000 external DAC", -+}; -+#endif -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+static struct spi_board_info spi0_board_info[] __initdata = { -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+ { -+ /* AT73C213 */ -+ .modalias = "at73c213", -+ .max_speed_hz = 200000, -+ .chip_select = 0, -+ .mode = SPI_MODE_1, -+ .platform_data = &at73c213_data, -+ }, -+#endif -+ { -+ /* QVGA display */ -+ .modalias = "ltv350qv", -+ .max_speed_hz = 16000000, -+ .chip_select = 1, -+ .mode = SPI_MODE_3, -+ }, -+}; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+static struct spi_board_info spi1_board_info[] __initdata = { { -+ /* patch in custom entries here */ -+} }; -+#endif -+ -+#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC -+static void __init atstk1004_setup_extdac(void) -+{ -+ struct clk *gclk; -+ struct clk *pll; -+ -+ gclk = clk_get(NULL, "gclk0"); -+ if (IS_ERR(gclk)) -+ goto err_gclk; -+ pll = clk_get(NULL, "pll0"); -+ if (IS_ERR(pll)) -+ goto err_pll; -+ -+ if (clk_set_parent(gclk, pll)) { -+ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); -+ goto err_set_clk; -+ } -+ -+ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ at73c213_data.dac_clk = gclk; -+ -+err_set_clk: -+ clk_put(pll); -+err_pll: -+ clk_put(gclk); -+err_gclk: -+ return; -+} -+#else -+static void __init atstk1004_setup_extdac(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ -+ -+void __init setup_board(void) -+{ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ -+#else -+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ -+#endif -+ /* USART 2/unused: expansion connector */ -+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ -+ -+ at32_setup_serial_console(0); -+} -+ -+static int __init atstk1004_init(void) -+{ -+ at32_add_system_devices(); -+ -+#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_usart(1); -+#else -+ at32_add_device_usart(0); -+#endif -+ at32_add_device_usart(2); -+ -+#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM -+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); -+#endif -+#ifdef CONFIG_BOARD_ATSTK100X_SPI1 -+ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM -+ at32_add_device_mci(0, NULL); -+#endif -+ at32_add_device_lcdc(0, &atstk1000_lcdc_data, -+ fbmem_start, fbmem_size); -+ at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 -+ at32_add_device_ac97c(0); -+#else -+ at32_add_device_abdac(0); -+#endif -+#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM -+ at32_add_device_ssc(0, ATMEL_SSC_TX); -+#endif -+ -+ atstk1000_setup_j2_leds(); -+ atstk1004_setup_extdac(); -+ -+ return 0; -+} -+postcore_initcall(atstk1004_init); -diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c -index aac4300..3d0a102 100644 ---- a/arch/avr32/boards/atstk1000/flash.c -+++ b/arch/avr32/boards/atstk1000/flash.c -@@ -15,7 +15,7 @@ - - #include <asm/arch/smc.h> - --static struct smc_config flash_config __initdata = { -+static struct smc_timing flash_timing __initdata = { - .ncs_read_setup = 0, - .nrd_setup = 40, - .ncs_write_setup = 0, -@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = { - - .read_cycle = 120, - .write_cycle = 120, -+}; - -+static struct smc_config flash_config __initdata = { - .bus_width = 2, - .nrd_controlled = 1, - .nwe_controlled = 1, -@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void) - { - int ret; - -+ smc_set_timing(&flash_config, &flash_timing); - ret = smc_set_configuration(0, &flash_config); - if (ret < 0) { - printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n"); -diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c -index c9af409..8bedf93 100644 ---- a/arch/avr32/boards/atstk1000/setup.c -+++ b/arch/avr32/boards/atstk1000/setup.c -@@ -10,13 +10,17 @@ - #include <linux/bootmem.h> - #include <linux/fb.h> - #include <linux/init.h> -+#include <linux/platform_device.h> - #include <linux/types.h> - #include <linux/linkage.h> - - #include <video/atmel_lcdc.h> - - #include <asm/setup.h> -+ -+#include <asm/arch/at32ap700x.h> - #include <asm/arch/board.h> -+#include <asm/arch/portmux.h> - - #include "atstk1000.h" - -@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = { - .default_monspecs = &atstk1000_default_monspecs, - .guard_time = 2, - }; -+ -+#ifdef CONFIG_BOARD_ATSTK1000_J2_LED -+#include <linux/leds.h> -+ -+static struct gpio_led stk1000_j2_led[] = { -+#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8 -+#define LEDSTRING "J2 jumpered to LED8" -+ { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, -+ { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, -+ { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, -+ { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, -+ { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), -+ .default_trigger = "heartbeat", }, -+#else /* RGB */ -+#define LEDSTRING "J2 jumpered to RGB LEDs" -+ { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, -+ { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, -+ { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, -+ -+ { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), -+ .default_trigger = "heartbeat", }, -+ { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, -+ { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), -+ .default_trigger = "heartbeat", }, -+ /* PB16, PB30 unused */ -+#endif -+}; -+ -+static struct gpio_led_platform_data stk1000_j2_led_data = { -+ .num_leds = ARRAY_SIZE(stk1000_j2_led), -+ .leds = stk1000_j2_led, -+}; -+ -+static struct platform_device stk1000_j2_led_dev = { -+ .name = "leds-gpio", -+ .id = 2, /* gpio block J2 */ -+ .dev = { -+ .platform_data = &stk1000_j2_led_data, -+ }, -+}; -+ -+void __init atstk1000_setup_j2_leds(void) -+{ -+ unsigned i; -+ -+ for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++) -+ at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT); -+ -+ printk("STK1000: " LEDSTRING "\n"); -+ platform_device_register(&stk1000_j2_led_dev); -+} -+#else /* CONFIG_BOARD_ATSTK1000_J2_LED */ -+void __init atstk1000_setup_j2_leds(void) -+{ -+ -+} -+#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */ -diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig -index b799a68..ca4538b 100644 ---- a/arch/avr32/configs/atngw100_defconfig -+++ b/arch/avr32/configs/atngw100_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:40:05 2007 -+# Linux kernel version: 2.6.22.atmel.1 -+# Thu Jul 12 17:49:20 2007 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y -@@ -111,17 +111,22 @@ CONFIG_SUBARCH_AVR32B=y - CONFIG_MMU=y - CONFIG_PERFORMANCE_COUNTERS=y - CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y - CONFIG_CPU_AT32AP7000=y -+# CONFIG_CPU_AT32AP7001 is not set -+# CONFIG_CPU_AT32AP7002 is not set - # CONFIG_BOARD_ATSTK1000 is not set - CONFIG_BOARD_ATNGW100=y -+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set - CONFIG_LOADER_U_BOOT=y - - # - # Atmel AVR32 AP options - # --# CONFIG_AP7000_32_BIT_SMC is not set --CONFIG_AP7000_16_BIT_SMC=y --# CONFIG_AP7000_8_BIT_SMC is not set -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+CONFIG_GPIO_DEV=y - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -145,6 +150,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 - # CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y - # CONFIG_HZ_300 is not set -@@ -153,6 +159,27 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # -+# Power managment options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# - # Bus options - # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -187,13 +214,8 @@ CONFIG_NET_KEY=y - # CONFIG_NET_KEY_MIGRATE is not set - CONFIG_INET=y - CONFIG_IP_MULTICAST=y --CONFIG_IP_ADVANCED_ROUTER=y --CONFIG_ASK_IP_FIB_HASH=y --# CONFIG_IP_FIB_TRIE is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set - CONFIG_IP_FIB_HASH=y --# CONFIG_IP_MULTIPLE_TABLES is not set --# CONFIG_IP_ROUTE_MULTIPATH is not set --# CONFIG_IP_ROUTE_VERBOSE is not set - CONFIG_IP_PNP=y - CONFIG_IP_PNP_DHCP=y - # CONFIG_IP_PNP_BOOTP is not set -@@ -240,6 +262,7 @@ CONFIG_IPV6_SIT=y - # CONFIG_NETWORK_SECMARK is not set - CONFIG_NETFILTER=y - # CONFIG_NETFILTER_DEBUG is not set -+CONFIG_BRIDGE_NETFILTER=y - - # - # Core Netfilter Configuration -@@ -284,6 +307,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m - CONFIG_NETFILTER_XT_MATCH_MARK=m - CONFIG_NETFILTER_XT_MATCH_POLICY=m - CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set - CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m - CONFIG_NETFILTER_XT_MATCH_QUOTA=m - CONFIG_NETFILTER_XT_MATCH_REALM=m -@@ -359,13 +383,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m - CONFIG_IP6_NF_MANGLE=m - CONFIG_IP6_NF_TARGET_HL=m - CONFIG_IP6_NF_RAW=m -+ -+# -+# Bridge: Netfilter Configuration -+# -+# CONFIG_BRIDGE_NF_EBTABLES is not set - # CONFIG_IP_DCCP is not set - # CONFIG_IP_SCTP is not set - # CONFIG_TIPC is not set - # CONFIG_ATM is not set --# CONFIG_BRIDGE is not set -+CONFIG_BRIDGE=m - CONFIG_VLAN_8021Q=m - # CONFIG_DECNET is not set -+CONFIG_LLC=m - # CONFIG_LLC2 is not set - # CONFIG_IPX is not set - # CONFIG_ATALK is not set -@@ -521,7 +551,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # Misc devices - # --# CONFIG_BLINK is not set - # CONFIG_IDE is not set - - # -@@ -545,13 +574,26 @@ CONFIG_NETDEVICES=y - # CONFIG_BONDING is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+CONFIG_PHYLIB=y -+ -+# -+# MII PHY device drivers -+# -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+# CONFIG_LXT_PHY is not set -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_FIXED_PHY is not set - - # - # Ethernet (10 or 100Mbit) - # - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -@@ -625,7 +667,15 @@ CONFIG_UNIX98_PTYS=y - # IPMI - # - # CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+CONFIG_AT32AP700X_WDT_TIMEOUT=2 - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set -@@ -636,7 +686,42 @@ CONFIG_UNIX98_PTYS=y - # TPM devices - # - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_ATMELTWI_BAUDRATE=100000 -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support -@@ -655,7 +740,7 @@ CONFIG_SPI_ATMEL=y - # SPI Protocol Masters - # - # CONFIG_SPI_AT25 is not set --# CONFIG_SPI_SPIDEV is not set -+CONFIG_SPI_SPIDEV=m - - # - # Dallas's 1-wire bus -@@ -706,8 +791,41 @@ CONFIG_SPI_ATMEL=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y - - # - # LED devices -@@ -727,27 +845,62 @@ CONFIG_LEDS_TRIGGERS=y - CONFIG_LEDS_TRIGGER_TIMER=y - CONFIG_LEDS_TRIGGER_HEARTBEAT=y - -+# -+# InfiniBand support -+# - - # --# LED drivers -+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) - # - - # --# LED Triggers -+# Real Time Clock - # -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set - - # --# InfiniBand support -+# RTC interfaces - # -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set - - # --# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -+# I2C RTC drivers - # -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set - - # --# Real Time Clock -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers - # --# CONFIG_RTC_CLASS is not set -+CONFIG_RTC_DRV_AT32AP700X=y - - # - # DMA Engine support -@@ -781,7 +934,8 @@ CONFIG_JBD=y - # CONFIG_OCFS2_FS is not set - # CONFIG_MINIX_FS is not set - # CONFIG_ROMFS_FS is not set --# CONFIG_INOTIFY is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y - # CONFIG_QUOTA is not set - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set -@@ -936,7 +1090,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y - CONFIG_ENABLE_MUST_CHECK=y - CONFIG_MAGIC_SYSRQ=y - # CONFIG_UNUSED_SYMBOLS is not set --# CONFIG_DEBUG_FS is not set -+CONFIG_DEBUG_FS=y - # CONFIG_HEADERS_CHECK is not set - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set -diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig -index 3b977fd..c3d4c33 100644 ---- a/arch/avr32/configs/atstk1002_defconfig -+++ b/arch/avr32/configs/atstk1002_defconfig -@@ -1,7 +1,7 @@ - # - # Automatically generated make config: don't edit --# Linux kernel version: 2.6.22-rc5 --# Sat Jun 23 15:32:08 2007 -+# Linux kernel version: 2.6.23.atmel.1 -+# Tue Oct 16 12:57:22 2007 - # - CONFIG_AVR32=y - CONFIG_GENERIC_GPIO=y -@@ -18,20 +18,15 @@ CONFIG_GENERIC_BUG=y - CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - - # --# Code maturity level options -+# General setup - # - CONFIG_EXPERIMENTAL=y - CONFIG_BROKEN_ON_SMP=y - CONFIG_INIT_ENV_ARG_LIMIT=32 -- --# --# General setup --# - CONFIG_LOCALVERSION="" - # CONFIG_LOCALVERSION_AUTO is not set - CONFIG_SWAP=y - CONFIG_SYSVIPC=y --# CONFIG_IPC_NS is not set - CONFIG_SYSVIPC_SYSCTL=y - CONFIG_POSIX_MQUEUE=y - CONFIG_BSD_PROCESS_ACCT=y -@@ -39,7 +34,7 @@ CONFIG_BSD_PROCESS_ACCT_V3=y - CONFIG_TASKSTATS=y - CONFIG_TASK_DELAY_ACCT=y - # CONFIG_TASK_XACCT is not set --# CONFIG_UTS_NS is not set -+# CONFIG_USER_NS is not set - CONFIG_AUDIT=y - # CONFIG_IKCONFIG is not set - CONFIG_LOG_BUF_SHIFT=14 -@@ -63,7 +58,6 @@ CONFIG_FUTEX=y - CONFIG_ANON_INODES=y - CONFIG_EPOLL=y - CONFIG_SIGNALFD=y --CONFIG_TIMERFD=y - CONFIG_EVENTFD=y - CONFIG_SHMEM=y - CONFIG_VM_EVENT_COUNTERS=y -@@ -74,24 +68,17 @@ CONFIG_SLUB=y - CONFIG_RT_MUTEXES=y - # CONFIG_TINY_SHMEM is not set - CONFIG_BASE_SMALL=1 -- --# --# Loadable module support --# - CONFIG_MODULES=y - CONFIG_MODULE_UNLOAD=y --# CONFIG_MODULE_FORCE_UNLOAD is not set -+CONFIG_MODULE_FORCE_UNLOAD=y - # CONFIG_MODVERSIONS is not set - # CONFIG_MODULE_SRCVERSION_ALL is not set --# CONFIG_KMOD is not set -- --# --# Block layer --# -+CONFIG_KMOD=y - CONFIG_BLOCK=y - # CONFIG_LBD is not set - # CONFIG_BLK_DEV_IO_TRACE is not set - # CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set - - # - # IO Schedulers -@@ -99,12 +86,12 @@ CONFIG_BLOCK=y - CONFIG_IOSCHED_NOOP=y - # CONFIG_IOSCHED_AS is not set - # CONFIG_IOSCHED_DEADLINE is not set --# CONFIG_IOSCHED_CFQ is not set -+CONFIG_IOSCHED_CFQ=y - # CONFIG_DEFAULT_AS is not set - # CONFIG_DEFAULT_DEADLINE is not set --# CONFIG_DEFAULT_CFQ is not set --CONFIG_DEFAULT_NOOP=y --CONFIG_DEFAULT_IOSCHED="noop" -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" - - # - # System Type and features -@@ -114,17 +101,27 @@ CONFIG_MMU=y - CONFIG_PERFORMANCE_COUNTERS=y - CONFIG_PLATFORM_AT32AP=y - CONFIG_CPU_AT32AP7000=y -+# CONFIG_CPU_AT32AP7001 is not set -+# CONFIG_CPU_AT32AP7002 is not set - CONFIG_BOARD_ATSTK1002=y - CONFIG_BOARD_ATSTK1000=y - # CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK1002_CUSTOM is not set -+# CONFIG_BOARD_ATSTK1002_SPI1 is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1002_J2_RGB is not set -+# CONFIG_BOARD_ATSTK1002_ENABLE_AC97 is not set -+# CONFIG_BOARD_ATSTK1002_CF_HACKS is not set - CONFIG_LOADER_U_BOOT=y - - # - # Atmel AVR32 AP options - # --# CONFIG_AP7000_32_BIT_SMC is not set --CONFIG_AP7000_16_BIT_SMC=y --# CONFIG_AP7000_8_BIT_SMC is not set -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+CONFIG_GPIO_DEV=y - CONFIG_LOAD_ADDRESS=0x10000000 - CONFIG_ENTRY_ADDRESS=0x90000000 - CONFIG_PHYS_OFFSET=0x10000000 -@@ -147,7 +144,9 @@ CONFIG_FLAT_NODE_MEM_MAP=y - CONFIG_SPLIT_PTLOCK_CPUS=4 - # CONFIG_RESOURCES_64BIT is not set - CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y - # CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y - # CONFIG_HZ_100 is not set - CONFIG_HZ_250=y - # CONFIG_HZ_300 is not set -@@ -156,6 +155,27 @@ CONFIG_HZ=250 - CONFIG_CMDLINE="" - - # -+# Power managment options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# - # Bus options - # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -163,7 +183,16 @@ CONFIG_CMDLINE="" - # - # PCCARD (PCMCIA/CardBus) support - # --# CONFIG_PCCARD is not set -+CONFIG_PCCARD=m -+# CONFIG_PCMCIA_DEBUG is not set -+CONFIG_PCMCIA=m -+# CONFIG_PCMCIA_LOAD_CIS is not set -+# CONFIG_PCMCIA_IOCTL is not set -+ -+# -+# PC-card bridges -+# -+CONFIG_AT32_CF=m - - # - # Executable file formats -@@ -251,6 +280,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" - # CONFIG_MAC80211 is not set - # CONFIG_IEEE80211 is not set - # CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set - - # - # Device Drivers -@@ -265,10 +295,6 @@ CONFIG_STANDALONE=y - # CONFIG_DEBUG_DRIVER is not set - # CONFIG_DEBUG_DEVRES is not set - # CONFIG_SYS_HYPERVISOR is not set -- --# --# Connector - unified userspace <-> kernelspace linker --# - # CONFIG_CONNECTOR is not set - CONFIG_MTD=y - # CONFIG_MTD_DEBUG is not set -@@ -327,6 +353,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # - # Self-contained MTD device drivers - # -+CONFIG_MTD_DATAFLASH=m -+# CONFIG_MTD_M25P80 is not set - # CONFIG_MTD_SLRAM is not set - # CONFIG_MTD_PHRAM is not set - # CONFIG_MTD_MTDRAM is not set -@@ -345,20 +373,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 - # UBI - Unsorted block images - # - # CONFIG_MTD_UBI is not set -- --# --# Parallel port support --# - # CONFIG_PARPORT is not set -- --# --# Plug and Play support --# --# CONFIG_PNPACPI is not set -- --# --# Block devices --# -+CONFIG_BLK_DEV=y - # CONFIG_BLK_DEV_COW_COMMON is not set - CONFIG_BLK_DEV_LOOP=m - # CONFIG_BLK_DEV_CRYPTOLOOP is not set -@@ -369,11 +385,9 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 - CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # CONFIG_CDROM_PKTCDVD is not set - # CONFIG_ATA_OVER_ETH is not set -- --# --# Misc devices --# --# CONFIG_BLINK is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+CONFIG_ATMEL_SSC=m - # CONFIG_IDE is not set - - # -@@ -381,29 +395,34 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # CONFIG_RAID_ATTRS is not set - # CONFIG_SCSI is not set -+# CONFIG_SCSI_DMA is not set - # CONFIG_SCSI_NETLINK is not set - # CONFIG_ATA is not set -- --# --# Multi-device support (RAID and LVM) --# - # CONFIG_MD is not set -- --# --# Network device support --# - CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set - CONFIG_DUMMY=y - # CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set - # CONFIG_EQUALIZER is not set - CONFIG_TUN=m --# CONFIG_PHYLIB is not set -+CONFIG_PHYLIB=y - - # --# Ethernet (10 or 100Mbit) -+# MII PHY device drivers - # -+# CONFIG_MARVELL_PHY is not set -+# CONFIG_DAVICOM_PHY is not set -+# CONFIG_QSEMI_PHY is not set -+CONFIG_LXT_PHY=y -+# CONFIG_CICADA_PHY is not set -+# CONFIG_VITESSE_PHY is not set -+# CONFIG_SMSC_PHY is not set -+# CONFIG_BROADCOM_PHY is not set -+# CONFIG_ICPLUS_PHY is not set -+# CONFIG_FIXED_PHY is not set - CONFIG_NET_ETHERNET=y --CONFIG_MII=y -+# CONFIG_MII is not set - CONFIG_MACB=y - # CONFIG_NETDEV_1000 is not set - # CONFIG_NETDEV_10000 is not set -@@ -413,6 +432,7 @@ CONFIG_MACB=y - # - # CONFIG_WLAN_PRE80211 is not set - # CONFIG_WLAN_80211 is not set -+# CONFIG_NET_PCMCIA is not set - # CONFIG_WAN is not set - CONFIG_PPP=m - # CONFIG_PPP_MULTILINK is not set -@@ -423,27 +443,56 @@ CONFIG_PPP_DEFLATE=m - CONFIG_PPP_BSDCOMP=m - # CONFIG_PPP_MPPE is not set - # CONFIG_PPPOE is not set -+# CONFIG_PPPOL2TP is not set - # CONFIG_SLIP is not set - CONFIG_SLHC=m - # CONFIG_SHAPER is not set - # CONFIG_NETCONSOLE is not set - # CONFIG_NETPOLL is not set - # CONFIG_NET_POLL_CONTROLLER is not set -- --# --# ISDN subsystem --# - # CONFIG_ISDN is not set -- --# --# Telephony Support --# - # CONFIG_PHONE is not set - - # - # Input device support - # --# CONFIG_INPUT is not set -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_APPLETOUCH is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set - - # - # Hardware I/O ports -@@ -472,34 +521,88 @@ CONFIG_SERIAL_CORE=y - CONFIG_SERIAL_CORE_CONSOLE=y - CONFIG_UNIX98_PTYS=y - # CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set - - # --# IPMI -+# Watchdog Device Drivers - # --# CONFIG_IPMI_HANDLER is not set --# CONFIG_WATCHDOG is not set -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y - # CONFIG_HW_RANDOM is not set - # CONFIG_RTC is not set - # CONFIG_GEN_RTC is not set - # CONFIG_R3964 is not set --# CONFIG_RAW_DRIVER is not set - - # --# TPM devices -+# PCMCIA character devices - # -+# CONFIG_SYNCLINK_CS is not set -+# CONFIG_CARDMAN_4000 is not set -+# CONFIG_CARDMAN_4040 is not set -+# CONFIG_RAW_DRIVER is not set - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set - - # - # SPI support - # --# CONFIG_SPI is not set --# CONFIG_SPI_MASTER is not set -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set - - # --# Dallas's 1-wire bus -+# SPI Protocol Masters - # -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set - # CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set - # CONFIG_HWMON is not set - - # -@@ -517,26 +620,110 @@ CONFIG_UNIX98_PTYS=y - # - # Graphics support - # --# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set - - # - # Display device support - # - # CONFIG_DISPLAY_SUPPORT is not set - # CONFIG_VGASTATE is not set --# CONFIG_FB is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+# CONFIG_LOGO is not set - - # - # Sound - # --# CONFIG_SOUND is not set -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+CONFIG_SND_AC97_CODEC=m -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# AVR32 devices -+# -+CONFIG_SND_ATMEL_AC97=m -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# PCMCIA devices -+# -+# CONFIG_SND_VXPOCKET is not set -+# CONFIG_SND_PDAUDIOCF is not set -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# SoC Audio support for SuperH -+# - - # --# USB support -+# Open Sound System - # --# CONFIG_USB_ARCH_HAS_HCD is not set -+# CONFIG_SOUND_PRIME is not set -+CONFIG_AC97_BUS=m -+# CONFIG_HID_SUPPORT is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y - # CONFIG_USB_ARCH_HAS_OHCI is not set - # CONFIG_USB_ARCH_HAS_EHCI is not set -+# CONFIG_USB is not set - - # - # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -@@ -545,34 +732,108 @@ CONFIG_UNIX98_PTYS=y - # - # USB Gadget Support - # --# CONFIG_USB_GADGET is not set --# CONFIG_MMC is not set -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+# CONFIG_USB_GADGET_DEBUG_FS is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+CONFIG_MMC_BLOCK_BOUNCE=y -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=m -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=m - - # --# LED devices -+# LED Triggers - # --# CONFIG_NEW_LEDS is not set -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=m -+CONFIG_LEDS_TRIGGER_HEARTBEAT=m -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+# CONFIG_RTC_HCTOSYS is not set -+# CONFIG_RTC_DEBUG is not set - - # --# LED drivers -+# RTC interfaces - # -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set - - # --# LED Triggers -+# I2C RTC drivers - # -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set - - # --# InfiniBand support -+# SPI RTC drivers - # -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set - - # --# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -+# Platform RTC drivers - # -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set - - # --# Real Time Clock -+# on-CPU RTC drivers - # --# CONFIG_RTC_CLASS is not set -+CONFIG_RTC_DRV_AT32AP700X=y - - # - # DMA Engine support -@@ -588,13 +849,21 @@ CONFIG_UNIX98_PTYS=y - # - - # -+# Userspace I/O -+# -+# CONFIG_UIO is not set -+ -+# - # File systems - # --CONFIG_EXT2_FS=m -+CONFIG_EXT2_FS=y - # CONFIG_EXT2_FS_XATTR is not set - # CONFIG_EXT2_FS_XIP is not set --# CONFIG_EXT3_FS is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_FS_XATTR is not set - # CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set - # CONFIG_REISERFS_FS is not set - # CONFIG_JFS_FS is not set - # CONFIG_FS_POSIX_ACL is not set -@@ -609,7 +878,7 @@ CONFIG_INOTIFY_USER=y - # CONFIG_DNOTIFY is not set - # CONFIG_AUTOFS_FS is not set - # CONFIG_AUTOFS4_FS is not set --# CONFIG_FUSE_FS is not set -+CONFIG_FUSE_FS=m - - # - # CD-ROM/DVD Filesystems -@@ -638,7 +907,7 @@ CONFIG_TMPFS=y - # CONFIG_TMPFS_POSIX_ACL is not set - # CONFIG_HUGETLB_PAGE is not set - CONFIG_RAMFS=y --CONFIG_CONFIGFS_FS=m -+CONFIG_CONFIGFS_FS=y - - # - # Miscellaneous filesystems -@@ -683,12 +952,17 @@ CONFIG_SUNRPC=y - # CONFIG_SUNRPC_BIND34 is not set - # CONFIG_RPCSEC_GSS_KRB5 is not set - # CONFIG_RPCSEC_GSS_SPKM3 is not set --# CONFIG_SMB_FS is not set --# CONFIG_CIFS is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+CONFIG_CIFS=m -+# CONFIG_CIFS_STATS is not set -+# CONFIG_CIFS_WEAK_PW_HASH is not set -+# CONFIG_CIFS_XATTR is not set -+# CONFIG_CIFS_DEBUG2 is not set -+# CONFIG_CIFS_EXPERIMENTAL is not set - # CONFIG_NCP_FS is not set - # CONFIG_CODA_FS is not set - # CONFIG_AFS_FS is not set --# CONFIG_9P_FS is not set - - # - # Partition Types -@@ -758,6 +1032,7 @@ CONFIG_DEBUG_FS=y - CONFIG_DEBUG_KERNEL=y - # CONFIG_DEBUG_SHIRQ is not set - CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y - # CONFIG_SCHEDSTATS is not set - # CONFIG_TIMER_STATS is not set - # CONFIG_DEBUG_RT_MUTEXES is not set -@@ -782,10 +1057,6 @@ CONFIG_FORCED_INLINING=y - # - # CONFIG_KEYS is not set - # CONFIG_SECURITY is not set -- --# --# Cryptographic options --# - # CONFIG_CRYPTO is not set - - # -@@ -796,6 +1067,7 @@ CONFIG_CRC_CCITT=m - # CONFIG_CRC16 is not set - # CONFIG_CRC_ITU_T is not set - CONFIG_CRC32=y -+# CONFIG_CRC7 is not set - # CONFIG_LIBCRC32C is not set - CONFIG_AUDIT_GENERIC=y - CONFIG_ZLIB_INFLATE=y -diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig -new file mode 100644 -index 0000000..0dc834f ---- /dev/null -+++ b/arch/avr32/configs/atstk1003_defconfig -@@ -0,0 +1,1045 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24-rc1 -+# Thu Nov 1 10:58:37 2007 -+# -+CONFIG_AVR32=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_TIME=y -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_BUG=y -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+CONFIG_SYSVIPC=y -+CONFIG_SYSVIPC_SYSCTL=y -+CONFIG_POSIX_MQUEUE=y -+CONFIG_BSD_PROCESS_ACCT=y -+CONFIG_BSD_PROCESS_ACCT_V3=y -+CONFIG_TASKSTATS=y -+CONFIG_TASK_DELAY_ACCT=y -+# CONFIG_TASK_XACCT is not set -+# CONFIG_USER_NS is not set -+CONFIG_AUDIT=y -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+CONFIG_FAIR_GROUP_SCHED=y -+CONFIG_FAIR_USER_SCHED=y -+# CONFIG_FAIR_CGROUP_SCHED is not set -+CONFIG_SYSFS_DEPRECATED=y -+CONFIG_RELAY=y -+CONFIG_BLK_DEV_INITRD=y -+CONFIG_INITRAMFS_SOURCE="" -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_ALL is not set -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+# CONFIG_BASE_FULL is not set -+CONFIG_FUTEX=y -+CONFIG_ANON_INODES=y -+CONFIG_EPOLL=y -+CONFIG_SIGNALFD=y -+CONFIG_EVENTFD=y -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_SLUB_DEBUG is not set -+# CONFIG_SLAB is not set -+CONFIG_SLUB=y -+# CONFIG_SLOB is not set -+CONFIG_RT_MUTEXES=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=1 -+CONFIG_MODULES=y -+CONFIG_MODULE_UNLOAD=y -+# CONFIG_MODULE_FORCE_UNLOAD is not set -+# CONFIG_MODVERSIONS is not set -+# CONFIG_MODULE_SRCVERSION_ALL is not set -+# CONFIG_KMOD is not set -+CONFIG_BLOCK=y -+# CONFIG_LBD is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_AS is not set -+# CONFIG_IOSCHED_DEADLINE is not set -+# CONFIG_IOSCHED_CFQ is not set -+# CONFIG_DEFAULT_AS is not set -+# CONFIG_DEFAULT_DEADLINE is not set -+# CONFIG_DEFAULT_CFQ is not set -+CONFIG_DEFAULT_NOOP=y -+CONFIG_DEFAULT_IOSCHED="noop" -+ -+# -+# System Type and features -+# -+CONFIG_SUBARCH_AVR32B=y -+CONFIG_MMU=y -+CONFIG_PERFORMANCE_COUNTERS=y -+CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y -+# CONFIG_CPU_AT32AP7000 is not set -+CONFIG_CPU_AT32AP7001=y -+# CONFIG_CPU_AT32AP7002 is not set -+CONFIG_BOARD_ATSTK1003=y -+CONFIG_BOARD_ATSTK1000=y -+# CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y -+# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set -+# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set -+CONFIG_LOADER_U_BOOT=y -+ -+# -+# Atmel AVR32 AP options -+# -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+# CONFIG_GPIO_DEV is not set -+CONFIG_LOAD_ADDRESS=0x10000000 -+CONFIG_ENTRY_ADDRESS=0x90000000 -+CONFIG_PHYS_OFFSET=0x10000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set -+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set -+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set -+CONFIG_ARCH_FLATMEM_ENABLE=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y -+# CONFIG_HZ_100 is not set -+CONFIG_HZ_250=y -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=250 -+CONFIG_CMDLINE="" -+ -+# -+# Power management options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options -+# -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+CONFIG_PCCARD=m -+# CONFIG_PCMCIA_DEBUG is not set -+CONFIG_PCMCIA=m -+CONFIG_PCMCIA_LOAD_CIS=y -+# CONFIG_PCMCIA_IOCTL is not set -+ -+# -+# PC-card bridges -+# -+CONFIG_AT32_CF=m -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+# CONFIG_IP_PNP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+# CONFIG_INET_DIAG is not set -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+CONFIG_FW_LOADER=m -+# CONFIG_DEBUG_DRIVER is not set -+# CONFIG_DEBUG_DEVRES is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+# CONFIG_MTD_CFI_ADV_OPTIONS is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_CFI_INTELEXT is not set -+CONFIG_MTD_CFI_AMDSTD=y -+# CONFIG_MTD_CFI_STAA is not set -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x8000000 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+CONFIG_MTD_DATAFLASH=m -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+CONFIG_BLK_DEV=y -+# CONFIG_BLK_DEV_COW_COMMON is not set -+CONFIG_BLK_DEV_LOOP=m -+# CONFIG_BLK_DEV_CRYPTOLOOP is not set -+CONFIG_BLK_DEV_NBD=m -+CONFIG_BLK_DEV_RAM=m -+CONFIG_BLK_DEV_RAM_COUNT=16 -+CONFIG_BLK_DEV_RAM_SIZE=4096 -+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -+# CONFIG_CDROM_PKTCDVD is not set -+# CONFIG_ATA_OVER_ETH is not set -+CONFIG_MISC_DEVICES=y -+# CONFIG_EEPROM_93CX6 is not set -+CONFIG_ATMEL_SSC=m -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+CONFIG_SCSI=m -+CONFIG_SCSI_DMA=y -+# CONFIG_SCSI_TGT is not set -+# CONFIG_SCSI_NETLINK is not set -+CONFIG_SCSI_PROC_FS=y -+ -+# -+# SCSI support type (disk, tape, CD-ROM) -+# -+# CONFIG_BLK_DEV_SD is not set -+# CONFIG_CHR_DEV_ST is not set -+# CONFIG_CHR_DEV_OSST is not set -+# CONFIG_BLK_DEV_SR is not set -+# CONFIG_CHR_DEV_SG is not set -+# CONFIG_CHR_DEV_SCH is not set -+ -+# -+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -+# -+# CONFIG_SCSI_MULTI_LUN is not set -+# CONFIG_SCSI_CONSTANTS is not set -+# CONFIG_SCSI_LOGGING is not set -+# CONFIG_SCSI_SCAN_ASYNC is not set -+CONFIG_SCSI_WAIT_SCAN=m -+ -+# -+# SCSI Transports -+# -+# CONFIG_SCSI_SPI_ATTRS is not set -+# CONFIG_SCSI_FC_ATTRS is not set -+# CONFIG_SCSI_ISCSI_ATTRS is not set -+# CONFIG_SCSI_SAS_LIBSAS is not set -+# CONFIG_SCSI_SRP_ATTRS is not set -+CONFIG_SCSI_LOWLEVEL=y -+# CONFIG_ISCSI_TCP is not set -+# CONFIG_SCSI_DEBUG is not set -+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+CONFIG_NETDEVICES=y -+# CONFIG_NETDEVICES_MULTIQUEUE is not set -+# CONFIG_DUMMY is not set -+# CONFIG_BONDING is not set -+# CONFIG_MACVLAN is not set -+# CONFIG_EQUALIZER is not set -+CONFIG_TUN=m -+# CONFIG_VETH is not set -+# CONFIG_NET_ETHERNET is not set -+# CONFIG_NETDEV_1000 is not set -+# CONFIG_NETDEV_10000 is not set -+ -+# -+# Wireless LAN -+# -+# CONFIG_WLAN_PRE80211 is not set -+# CONFIG_WLAN_80211 is not set -+# CONFIG_NET_PCMCIA is not set -+# CONFIG_WAN is not set -+CONFIG_PPP=m -+# CONFIG_PPP_MULTILINK is not set -+# CONFIG_PPP_FILTER is not set -+CONFIG_PPP_ASYNC=m -+# CONFIG_PPP_SYNC_TTY is not set -+CONFIG_PPP_DEFLATE=m -+CONFIG_PPP_BSDCOMP=m -+# CONFIG_PPP_MPPE is not set -+# CONFIG_PPPOE is not set -+# CONFIG_PPPOL2TP is not set -+# CONFIG_SLIP is not set -+CONFIG_SLHC=m -+# CONFIG_SHAPER is not set -+# CONFIG_NETCONSOLE is not set -+# CONFIG_NETPOLL is not set -+# CONFIG_NET_POLL_CONTROLLER is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+CONFIG_INPUT=m -+# CONFIG_INPUT_FF_MEMLESS is not set -+CONFIG_INPUT_POLLDEV=m -+ -+# -+# Userland interfaces -+# -+CONFIG_INPUT_MOUSEDEV=m -+CONFIG_INPUT_MOUSEDEV_PSAUX=y -+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -+# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_EVDEV is not set -+# CONFIG_INPUT_EVBUG is not set -+ -+# -+# Input Device Drivers -+# -+CONFIG_INPUT_KEYBOARD=y -+# CONFIG_KEYBOARD_ATKBD is not set -+# CONFIG_KEYBOARD_SUNKBD is not set -+# CONFIG_KEYBOARD_LKKBD is not set -+# CONFIG_KEYBOARD_XTKBD is not set -+# CONFIG_KEYBOARD_NEWTON is not set -+# CONFIG_KEYBOARD_STOWAWAY is not set -+CONFIG_KEYBOARD_GPIO=m -+CONFIG_INPUT_MOUSE=y -+# CONFIG_MOUSE_PS2 is not set -+# CONFIG_MOUSE_SERIAL is not set -+# CONFIG_MOUSE_APPLETOUCH is not set -+# CONFIG_MOUSE_VSXXXAA is not set -+CONFIG_MOUSE_GPIO=m -+# CONFIG_INPUT_JOYSTICK is not set -+# CONFIG_INPUT_TABLET is not set -+# CONFIG_INPUT_TOUCHSCREEN is not set -+# CONFIG_INPUT_MISC is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_RTC is not set -+# CONFIG_GEN_RTC is not set -+# CONFIG_R3964 is not set -+ -+# -+# PCMCIA character devices -+# -+# CONFIG_SYNCLINK_CS is not set -+# CONFIG_CARDMAN_4000 is not set -+# CONFIG_CARDMAN_4040 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+CONFIG_I2C=m -+CONFIG_I2C_BOARDINFO=y -+CONFIG_I2C_CHARDEV=m -+ -+# -+# I2C Algorithms -+# -+CONFIG_I2C_ALGOBIT=m -+# CONFIG_I2C_ALGOPCF is not set -+# CONFIG_I2C_ALGOPCA is not set -+ -+# -+# I2C Hardware Bus support -+# -+CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_GPIO=m -+# CONFIG_I2C_OCORES is not set -+# CONFIG_I2C_PARPORT_LIGHT is not set -+# CONFIG_I2C_SIMTEC is not set -+# CONFIG_I2C_TAOS_EVM is not set -+# CONFIG_I2C_STUB is not set -+ -+# -+# Miscellaneous I2C Chip support -+# -+# CONFIG_SENSORS_DS1337 is not set -+# CONFIG_SENSORS_DS1374 is not set -+# CONFIG_DS1682 is not set -+# CONFIG_SENSORS_EEPROM is not set -+# CONFIG_SENSORS_PCF8574 is not set -+# CONFIG_SENSORS_PCA9539 is not set -+# CONFIG_SENSORS_PCF8591 is not set -+# CONFIG_SENSORS_MAX6875 is not set -+# CONFIG_SENSORS_TSL2550 is not set -+# CONFIG_I2C_DEBUG_CORE is not set -+# CONFIG_I2C_DEBUG_ALGO is not set -+# CONFIG_I2C_DEBUG_BUS is not set -+# CONFIG_I2C_DEBUG_CHIP is not set -+ -+# -+# SPI support -+# -+CONFIG_SPI=y -+# CONFIG_SPI_DEBUG is not set -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+CONFIG_SPI_SPIDEV=m -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+# CONFIG_FB is not set -+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+ -+# -+# Sound -+# -+CONFIG_SOUND=m -+ -+# -+# Advanced Linux Sound Architecture -+# -+CONFIG_SND=m -+CONFIG_SND_TIMER=m -+CONFIG_SND_PCM=m -+# CONFIG_SND_SEQUENCER is not set -+CONFIG_SND_OSSEMUL=y -+CONFIG_SND_MIXER_OSS=m -+CONFIG_SND_PCM_OSS=m -+CONFIG_SND_PCM_OSS_PLUGINS=y -+# CONFIG_SND_DYNAMIC_MINORS is not set -+CONFIG_SND_SUPPORT_OLD_API=y -+CONFIG_SND_VERBOSE_PROCFS=y -+# CONFIG_SND_VERBOSE_PRINTK is not set -+# CONFIG_SND_DEBUG is not set -+ -+# -+# Generic devices -+# -+CONFIG_SND_AC97_CODEC=m -+# CONFIG_SND_DUMMY is not set -+# CONFIG_SND_MTPAV is not set -+# CONFIG_SND_SERIAL_U16550 is not set -+# CONFIG_SND_MPU401 is not set -+ -+# -+# AVR32 devices -+# -+CONFIG_SND_ATMEL_AC97=m -+ -+# -+# SPI devices -+# -+CONFIG_SND_AT73C213=m -+CONFIG_SND_AT73C213_TARGET_BITRATE=48000 -+ -+# -+# PCMCIA devices -+# -+# CONFIG_SND_VXPOCKET is not set -+# CONFIG_SND_PDAUDIOCF is not set -+ -+# -+# System on Chip audio support -+# -+# CONFIG_SND_SOC is not set -+ -+# -+# SoC Audio support for SuperH -+# -+ -+# -+# Open Sound System -+# -+CONFIG_SOUND_PRIME=m -+# CONFIG_SOUND_MSNDCLAS is not set -+# CONFIG_SOUND_MSNDPIN is not set -+CONFIG_SOUND_AT32_ABDAC=m -+CONFIG_AC97_BUS=m -+# CONFIG_HID_SUPPORT is not set -+CONFIG_USB_SUPPORT=y -+CONFIG_USB_ARCH_HAS_HCD=y -+# CONFIG_USB_ARCH_HAS_OHCI is not set -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+# CONFIG_USB is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG is not set -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_DEBUG_FS=y -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+CONFIG_USB_ZERO=m -+CONFIG_USB_ETH=m -+CONFIG_USB_ETH_RNDIS=y -+CONFIG_USB_GADGETFS=m -+CONFIG_USB_FILE_STORAGE=m -+# CONFIG_USB_FILE_STORAGE_TEST is not set -+CONFIG_USB_G_SERIAL=m -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+# CONFIG_MMC_BLOCK_BOUNCE is not set -+# CONFIG_SDIO_UART is not set -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y -+# CONFIG_MMC_SPI is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=y -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+CONFIG_RTC_INTF_PROC=y -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# I2C RTC drivers -+# -+# CONFIG_RTC_DRV_DS1307 is not set -+# CONFIG_RTC_DRV_DS1374 is not set -+# CONFIG_RTC_DRV_DS1672 is not set -+# CONFIG_RTC_DRV_MAX6900 is not set -+# CONFIG_RTC_DRV_RS5C372 is not set -+# CONFIG_RTC_DRV_ISL1208 is not set -+# CONFIG_RTC_DRV_X1205 is not set -+# CONFIG_RTC_DRV_PCF8563 is not set -+# CONFIG_RTC_DRV_PCF8583 is not set -+# CONFIG_RTC_DRV_M41T80 is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y -+ -+# -+# Userspace I/O -+# -+CONFIG_UIO=m -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+CONFIG_EXT3_FS=y -+# CONFIG_EXT3_FS_XATTR is not set -+# CONFIG_EXT4DEV_FS is not set -+CONFIG_JBD=y -+# CONFIG_JBD_DEBUG is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+CONFIG_INOTIFY=y -+CONFIG_INOTIFY_USER=y -+# CONFIG_QUOTA is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+CONFIG_FUSE_FS=m -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+CONFIG_FAT_FS=m -+CONFIG_MSDOS_FS=m -+CONFIG_VFAT_FS=m -+CONFIG_FAT_DEFAULT_CODEPAGE=437 -+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_KCORE=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+CONFIG_CONFIGFS_FS=y -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+CONFIG_JFFS2_FS_WRITEBUFFER=y -+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+CONFIG_NETWORK_FILESYSTEMS=y -+# CONFIG_NFS_FS is not set -+# CONFIG_NFSD is not set -+# CONFIG_SMB_FS is not set -+# CONFIG_CIFS is not set -+# CONFIG_NCP_FS is not set -+# CONFIG_CODA_FS is not set -+# CONFIG_AFS_FS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+CONFIG_NLS=m -+CONFIG_NLS_DEFAULT="iso8859-1" -+CONFIG_NLS_CODEPAGE_437=m -+# CONFIG_NLS_CODEPAGE_737 is not set -+# CONFIG_NLS_CODEPAGE_775 is not set -+# CONFIG_NLS_CODEPAGE_850 is not set -+# CONFIG_NLS_CODEPAGE_852 is not set -+# CONFIG_NLS_CODEPAGE_855 is not set -+# CONFIG_NLS_CODEPAGE_857 is not set -+# CONFIG_NLS_CODEPAGE_860 is not set -+# CONFIG_NLS_CODEPAGE_861 is not set -+# CONFIG_NLS_CODEPAGE_862 is not set -+# CONFIG_NLS_CODEPAGE_863 is not set -+# CONFIG_NLS_CODEPAGE_864 is not set -+# CONFIG_NLS_CODEPAGE_865 is not set -+# CONFIG_NLS_CODEPAGE_866 is not set -+# CONFIG_NLS_CODEPAGE_869 is not set -+# CONFIG_NLS_CODEPAGE_936 is not set -+# CONFIG_NLS_CODEPAGE_950 is not set -+# CONFIG_NLS_CODEPAGE_932 is not set -+# CONFIG_NLS_CODEPAGE_949 is not set -+# CONFIG_NLS_CODEPAGE_874 is not set -+# CONFIG_NLS_ISO8859_8 is not set -+# CONFIG_NLS_CODEPAGE_1250 is not set -+# CONFIG_NLS_CODEPAGE_1251 is not set -+# CONFIG_NLS_ASCII is not set -+CONFIG_NLS_ISO8859_1=m -+# CONFIG_NLS_ISO8859_2 is not set -+# CONFIG_NLS_ISO8859_3 is not set -+# CONFIG_NLS_ISO8859_4 is not set -+# CONFIG_NLS_ISO8859_5 is not set -+# CONFIG_NLS_ISO8859_6 is not set -+# CONFIG_NLS_ISO8859_7 is not set -+# CONFIG_NLS_ISO8859_9 is not set -+# CONFIG_NLS_ISO8859_13 is not set -+# CONFIG_NLS_ISO8859_14 is not set -+# CONFIG_NLS_ISO8859_15 is not set -+# CONFIG_NLS_KOI8_R is not set -+# CONFIG_NLS_KOI8_U is not set -+CONFIG_NLS_UTF8=m -+# CONFIG_DLM is not set -+ -+# -+# Kernel hacking -+# -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+CONFIG_DEBUG_FS=y -+# CONFIG_HEADERS_CHECK is not set -+CONFIG_DEBUG_KERNEL=y -+# CONFIG_DEBUG_SHIRQ is not set -+CONFIG_DETECT_SOFTLOCKUP=y -+CONFIG_SCHED_DEBUG=y -+# CONFIG_SCHEDSTATS is not set -+# CONFIG_TIMER_STATS is not set -+# CONFIG_DEBUG_RT_MUTEXES is not set -+# CONFIG_RT_MUTEX_TESTER is not set -+# CONFIG_DEBUG_SPINLOCK is not set -+# CONFIG_DEBUG_MUTEXES is not set -+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -+# CONFIG_DEBUG_KOBJECT is not set -+CONFIG_DEBUG_BUGVERBOSE=y -+# CONFIG_DEBUG_INFO is not set -+# CONFIG_DEBUG_VM is not set -+# CONFIG_DEBUG_LIST is not set -+# CONFIG_DEBUG_SG is not set -+CONFIG_FRAME_POINTER=y -+CONFIG_FORCED_INLINING=y -+# CONFIG_BOOT_PRINTK_DELAY is not set -+# CONFIG_RCU_TORTURE_TEST is not set -+# CONFIG_FAULT_INJECTION is not set -+# CONFIG_SAMPLES is not set -+# CONFIG_KPROBES is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+CONFIG_CRC_CCITT=m -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+CONFIG_AUDIT_GENERIC=y -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_PLIST=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig -new file mode 100644 -index 0000000..b002a46 ---- /dev/null -+++ b/arch/avr32/configs/atstk1004_defconfig -@@ -0,0 +1,722 @@ -+# -+# Automatically generated make config: don't edit -+# Linux kernel version: 2.6.24-rc1 -+# Thu Nov 1 11:07:19 2007 -+# -+CONFIG_AVR32=y -+CONFIG_GENERIC_GPIO=y -+CONFIG_GENERIC_HARDIRQS=y -+CONFIG_HARDIRQS_SW_RESEND=y -+CONFIG_GENERIC_IRQ_PROBE=y -+CONFIG_RWSEM_GENERIC_SPINLOCK=y -+CONFIG_GENERIC_TIME=y -+# CONFIG_ARCH_HAS_ILOG2_U32 is not set -+# CONFIG_ARCH_HAS_ILOG2_U64 is not set -+CONFIG_GENERIC_HWEIGHT=y -+CONFIG_GENERIC_CALIBRATE_DELAY=y -+CONFIG_GENERIC_BUG=y -+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -+ -+# -+# General setup -+# -+CONFIG_EXPERIMENTAL=y -+CONFIG_BROKEN_ON_SMP=y -+CONFIG_INIT_ENV_ARG_LIMIT=32 -+CONFIG_LOCALVERSION="" -+# CONFIG_LOCALVERSION_AUTO is not set -+CONFIG_SWAP=y -+# CONFIG_SYSVIPC is not set -+# CONFIG_POSIX_MQUEUE is not set -+# CONFIG_BSD_PROCESS_ACCT is not set -+# CONFIG_TASKSTATS is not set -+# CONFIG_USER_NS is not set -+# CONFIG_AUDIT is not set -+# CONFIG_IKCONFIG is not set -+CONFIG_LOG_BUF_SHIFT=14 -+# CONFIG_CGROUPS is not set -+CONFIG_FAIR_GROUP_SCHED=y -+CONFIG_FAIR_USER_SCHED=y -+# CONFIG_FAIR_CGROUP_SCHED is not set -+CONFIG_SYSFS_DEPRECATED=y -+# CONFIG_RELAY is not set -+# CONFIG_BLK_DEV_INITRD is not set -+CONFIG_CC_OPTIMIZE_FOR_SIZE=y -+CONFIG_SYSCTL=y -+CONFIG_EMBEDDED=y -+# CONFIG_SYSCTL_SYSCALL is not set -+CONFIG_KALLSYMS=y -+# CONFIG_KALLSYMS_EXTRA_PASS is not set -+CONFIG_HOTPLUG=y -+CONFIG_PRINTK=y -+CONFIG_BUG=y -+CONFIG_ELF_CORE=y -+# CONFIG_BASE_FULL is not set -+# CONFIG_FUTEX is not set -+# CONFIG_EPOLL is not set -+# CONFIG_SIGNALFD is not set -+# CONFIG_EVENTFD is not set -+CONFIG_SHMEM=y -+CONFIG_VM_EVENT_COUNTERS=y -+# CONFIG_SLAB is not set -+# CONFIG_SLUB is not set -+CONFIG_SLOB=y -+# CONFIG_TINY_SHMEM is not set -+CONFIG_BASE_SMALL=1 -+# CONFIG_MODULES is not set -+CONFIG_BLOCK=y -+# CONFIG_LBD is not set -+# CONFIG_BLK_DEV_IO_TRACE is not set -+# CONFIG_LSF is not set -+# CONFIG_BLK_DEV_BSG is not set -+ -+# -+# IO Schedulers -+# -+CONFIG_IOSCHED_NOOP=y -+# CONFIG_IOSCHED_AS is not set -+# CONFIG_IOSCHED_DEADLINE is not set -+CONFIG_IOSCHED_CFQ=y -+# CONFIG_DEFAULT_AS is not set -+# CONFIG_DEFAULT_DEADLINE is not set -+CONFIG_DEFAULT_CFQ=y -+# CONFIG_DEFAULT_NOOP is not set -+CONFIG_DEFAULT_IOSCHED="cfq" -+ -+# -+# System Type and features -+# -+CONFIG_SUBARCH_AVR32B=y -+CONFIG_MMU=y -+CONFIG_PERFORMANCE_COUNTERS=y -+CONFIG_PLATFORM_AT32AP=y -+CONFIG_CPU_AT32AP700X=y -+# CONFIG_CPU_AT32AP7000 is not set -+# CONFIG_CPU_AT32AP7001 is not set -+CONFIG_CPU_AT32AP7002=y -+CONFIG_BOARD_ATSTK1004=y -+CONFIG_BOARD_ATSTK1000=y -+# CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK100X_CUSTOM is not set -+# CONFIG_BOARD_ATSTK100X_SPI1 is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED is not set -+# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1000_J2_RGB is not set -+CONFIG_BOARD_ATSTK1000_EXTDAC=y -+# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set -+# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set -+CONFIG_LOADER_U_BOOT=y -+ -+# -+# Atmel AVR32 AP options -+# -+# CONFIG_AP700X_32_BIT_SMC is not set -+CONFIG_AP700X_16_BIT_SMC=y -+# CONFIG_AP700X_8_BIT_SMC is not set -+# CONFIG_GPIO_DEV is not set -+CONFIG_LOAD_ADDRESS=0x10000000 -+CONFIG_ENTRY_ADDRESS=0x90000000 -+CONFIG_PHYS_OFFSET=0x10000000 -+CONFIG_PREEMPT_NONE=y -+# CONFIG_PREEMPT_VOLUNTARY is not set -+# CONFIG_PREEMPT is not set -+# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set -+# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set -+# CONFIG_NEED_NODE_MEMMAP_SIZE is not set -+CONFIG_ARCH_FLATMEM_ENABLE=y -+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -+# CONFIG_ARCH_SPARSEMEM_ENABLE is not set -+CONFIG_SELECT_MEMORY_MODEL=y -+CONFIG_FLATMEM_MANUAL=y -+# CONFIG_DISCONTIGMEM_MANUAL is not set -+# CONFIG_SPARSEMEM_MANUAL is not set -+CONFIG_FLATMEM=y -+CONFIG_FLAT_NODE_MEM_MAP=y -+# CONFIG_SPARSEMEM_STATIC is not set -+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -+CONFIG_SPLIT_PTLOCK_CPUS=4 -+# CONFIG_RESOURCES_64BIT is not set -+CONFIG_ZONE_DMA_FLAG=0 -+CONFIG_VIRT_TO_BUS=y -+# CONFIG_OWNERSHIP_TRACE is not set -+CONFIG_DW_DMAC=y -+# CONFIG_HZ_100 is not set -+CONFIG_HZ_250=y -+# CONFIG_HZ_300 is not set -+# CONFIG_HZ_1000 is not set -+CONFIG_HZ=250 -+CONFIG_CMDLINE="" -+ -+# -+# Power management options -+# -+ -+# -+# CPU Frequency scaling -+# -+CONFIG_CPU_FREQ=y -+CONFIG_CPU_FREQ_TABLE=y -+# CONFIG_CPU_FREQ_DEBUG is not set -+# CONFIG_CPU_FREQ_STAT is not set -+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -+CONFIG_CPU_FREQ_GOV_USERSPACE=y -+CONFIG_CPU_FREQ_GOV_ONDEMAND=y -+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -+CONFIG_CPU_FREQ_AT32AP=y -+ -+# -+# Bus options -+# -+# CONFIG_ARCH_SUPPORTS_MSI is not set -+# CONFIG_PCCARD is not set -+ -+# -+# Executable file formats -+# -+CONFIG_BINFMT_ELF=y -+# CONFIG_BINFMT_MISC is not set -+ -+# -+# Networking -+# -+CONFIG_NET=y -+ -+# -+# Networking options -+# -+CONFIG_PACKET=y -+CONFIG_PACKET_MMAP=y -+CONFIG_UNIX=y -+# CONFIG_NET_KEY is not set -+CONFIG_INET=y -+# CONFIG_IP_MULTICAST is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set -+CONFIG_IP_FIB_HASH=y -+# CONFIG_IP_PNP is not set -+# CONFIG_NET_IPIP is not set -+# CONFIG_NET_IPGRE is not set -+# CONFIG_ARPD is not set -+# CONFIG_SYN_COOKIES is not set -+# CONFIG_INET_AH is not set -+# CONFIG_INET_ESP is not set -+# CONFIG_INET_IPCOMP is not set -+# CONFIG_INET_XFRM_TUNNEL is not set -+# CONFIG_INET_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -+# CONFIG_INET_XFRM_MODE_TUNNEL is not set -+# CONFIG_INET_XFRM_MODE_BEET is not set -+# CONFIG_INET_LRO is not set -+# CONFIG_INET_DIAG is not set -+# CONFIG_TCP_CONG_ADVANCED is not set -+CONFIG_TCP_CONG_CUBIC=y -+CONFIG_DEFAULT_TCP_CONG="cubic" -+# CONFIG_TCP_MD5SIG is not set -+# CONFIG_IPV6 is not set -+# CONFIG_INET6_XFRM_TUNNEL is not set -+# CONFIG_INET6_TUNNEL is not set -+# CONFIG_NETWORK_SECMARK is not set -+# CONFIG_NETFILTER is not set -+# CONFIG_IP_DCCP is not set -+# CONFIG_IP_SCTP is not set -+# CONFIG_TIPC is not set -+# CONFIG_ATM is not set -+# CONFIG_BRIDGE is not set -+# CONFIG_VLAN_8021Q is not set -+# CONFIG_DECNET is not set -+# CONFIG_LLC2 is not set -+# CONFIG_IPX is not set -+# CONFIG_ATALK is not set -+# CONFIG_X25 is not set -+# CONFIG_LAPB is not set -+# CONFIG_ECONET is not set -+# CONFIG_WAN_ROUTER is not set -+# CONFIG_NET_SCHED is not set -+ -+# -+# Network testing -+# -+# CONFIG_NET_PKTGEN is not set -+# CONFIG_HAMRADIO is not set -+# CONFIG_IRDA is not set -+# CONFIG_BT is not set -+# CONFIG_AF_RXRPC is not set -+ -+# -+# Wireless -+# -+# CONFIG_CFG80211 is not set -+# CONFIG_WIRELESS_EXT is not set -+# CONFIG_MAC80211 is not set -+# CONFIG_IEEE80211 is not set -+# CONFIG_RFKILL is not set -+# CONFIG_NET_9P is not set -+ -+# -+# Device Drivers -+# -+ -+# -+# Generic Driver Options -+# -+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -+CONFIG_STANDALONE=y -+# CONFIG_PREVENT_FIRMWARE_BUILD is not set -+# CONFIG_FW_LOADER is not set -+# CONFIG_SYS_HYPERVISOR is not set -+# CONFIG_CONNECTOR is not set -+CONFIG_MTD=y -+# CONFIG_MTD_DEBUG is not set -+# CONFIG_MTD_CONCAT is not set -+CONFIG_MTD_PARTITIONS=y -+# CONFIG_MTD_REDBOOT_PARTS is not set -+CONFIG_MTD_CMDLINE_PARTS=y -+ -+# -+# User Modules And Translation Layers -+# -+CONFIG_MTD_CHAR=y -+CONFIG_MTD_BLKDEVS=y -+CONFIG_MTD_BLOCK=y -+# CONFIG_FTL is not set -+# CONFIG_NFTL is not set -+# CONFIG_INFTL is not set -+# CONFIG_RFD_FTL is not set -+# CONFIG_SSFDC is not set -+# CONFIG_MTD_OOPS is not set -+ -+# -+# RAM/ROM/Flash chip drivers -+# -+CONFIG_MTD_CFI=y -+# CONFIG_MTD_JEDECPROBE is not set -+CONFIG_MTD_GEN_PROBE=y -+# CONFIG_MTD_CFI_ADV_OPTIONS is not set -+CONFIG_MTD_MAP_BANK_WIDTH_1=y -+CONFIG_MTD_MAP_BANK_WIDTH_2=y -+CONFIG_MTD_MAP_BANK_WIDTH_4=y -+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -+CONFIG_MTD_CFI_I1=y -+CONFIG_MTD_CFI_I2=y -+# CONFIG_MTD_CFI_I4 is not set -+# CONFIG_MTD_CFI_I8 is not set -+# CONFIG_MTD_CFI_INTELEXT is not set -+CONFIG_MTD_CFI_AMDSTD=y -+# CONFIG_MTD_CFI_STAA is not set -+CONFIG_MTD_CFI_UTIL=y -+# CONFIG_MTD_RAM is not set -+# CONFIG_MTD_ROM is not set -+# CONFIG_MTD_ABSENT is not set -+ -+# -+# Mapping drivers for chip access -+# -+# CONFIG_MTD_COMPLEX_MAPPINGS is not set -+CONFIG_MTD_PHYSMAP=y -+CONFIG_MTD_PHYSMAP_START=0x8000000 -+CONFIG_MTD_PHYSMAP_LEN=0x0 -+CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -+# CONFIG_MTD_PLATRAM is not set -+ -+# -+# Self-contained MTD device drivers -+# -+# CONFIG_MTD_DATAFLASH is not set -+# CONFIG_MTD_M25P80 is not set -+# CONFIG_MTD_SLRAM is not set -+# CONFIG_MTD_PHRAM is not set -+# CONFIG_MTD_MTDRAM is not set -+# CONFIG_MTD_BLOCK2MTD is not set -+ -+# -+# Disk-On-Chip Device Drivers -+# -+# CONFIG_MTD_DOC2000 is not set -+# CONFIG_MTD_DOC2001 is not set -+# CONFIG_MTD_DOC2001PLUS is not set -+# CONFIG_MTD_NAND is not set -+# CONFIG_MTD_ONENAND is not set -+ -+# -+# UBI - Unsorted block images -+# -+# CONFIG_MTD_UBI is not set -+# CONFIG_PARPORT is not set -+# CONFIG_BLK_DEV is not set -+# CONFIG_MISC_DEVICES is not set -+# CONFIG_IDE is not set -+ -+# -+# SCSI device support -+# -+# CONFIG_RAID_ATTRS is not set -+# CONFIG_SCSI is not set -+# CONFIG_SCSI_DMA is not set -+# CONFIG_SCSI_NETLINK is not set -+# CONFIG_ATA is not set -+# CONFIG_MD is not set -+# CONFIG_NETDEVICES is not set -+# CONFIG_ISDN is not set -+# CONFIG_PHONE is not set -+ -+# -+# Input device support -+# -+# CONFIG_INPUT is not set -+ -+# -+# Hardware I/O ports -+# -+# CONFIG_SERIO is not set -+# CONFIG_GAMEPORT is not set -+ -+# -+# Character devices -+# -+# CONFIG_VT is not set -+# CONFIG_SERIAL_NONSTANDARD is not set -+ -+# -+# Serial drivers -+# -+# CONFIG_SERIAL_8250 is not set -+ -+# -+# Non-8250 serial port support -+# -+CONFIG_SERIAL_ATMEL=y -+CONFIG_SERIAL_ATMEL_CONSOLE=y -+# CONFIG_SERIAL_ATMEL_TTYAT is not set -+CONFIG_SERIAL_CORE=y -+CONFIG_SERIAL_CORE_CONSOLE=y -+CONFIG_UNIX98_PTYS=y -+# CONFIG_LEGACY_PTYS is not set -+# CONFIG_IPMI_HANDLER is not set -+# CONFIG_HW_RANDOM is not set -+# CONFIG_RTC is not set -+# CONFIG_GEN_RTC is not set -+# CONFIG_R3964 is not set -+# CONFIG_RAW_DRIVER is not set -+# CONFIG_TCG_TPM is not set -+# CONFIG_I2C is not set -+ -+# -+# SPI support -+# -+CONFIG_SPI=y -+CONFIG_SPI_MASTER=y -+ -+# -+# SPI Master Controller Drivers -+# -+CONFIG_SPI_ATMEL=y -+# CONFIG_SPI_BITBANG is not set -+ -+# -+# SPI Protocol Masters -+# -+# CONFIG_SPI_AT25 is not set -+# CONFIG_SPI_SPIDEV is not set -+# CONFIG_SPI_TLE62X0 is not set -+# CONFIG_W1 is not set -+# CONFIG_POWER_SUPPLY is not set -+# CONFIG_HWMON is not set -+# CONFIG_WATCHDOG is not set -+ -+# -+# Sonics Silicon Backplane -+# -+CONFIG_SSB_POSSIBLE=y -+# CONFIG_SSB is not set -+ -+# -+# Multifunction device drivers -+# -+# CONFIG_MFD_SM501 is not set -+ -+# -+# Multimedia devices -+# -+# CONFIG_VIDEO_DEV is not set -+# CONFIG_DVB_CORE is not set -+# CONFIG_DAB is not set -+ -+# -+# Graphics support -+# -+# CONFIG_VGASTATE is not set -+# CONFIG_VIDEO_OUTPUT_CONTROL is not set -+CONFIG_FB=y -+# CONFIG_FIRMWARE_EDID is not set -+# CONFIG_FB_DDC is not set -+CONFIG_FB_CFB_FILLRECT=y -+CONFIG_FB_CFB_COPYAREA=y -+CONFIG_FB_CFB_IMAGEBLIT=y -+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -+# CONFIG_FB_SYS_FILLRECT is not set -+# CONFIG_FB_SYS_COPYAREA is not set -+# CONFIG_FB_SYS_IMAGEBLIT is not set -+# CONFIG_FB_SYS_FOPS is not set -+CONFIG_FB_DEFERRED_IO=y -+# CONFIG_FB_SVGALIB is not set -+# CONFIG_FB_MACMODES is not set -+# CONFIG_FB_BACKLIGHT is not set -+# CONFIG_FB_MODE_HELPERS is not set -+# CONFIG_FB_TILEBLITTING is not set -+ -+# -+# Frame buffer hardware drivers -+# -+# CONFIG_FB_S1D13XXX is not set -+CONFIG_FB_ATMEL=y -+# CONFIG_FB_VIRTUAL is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set -+ -+# -+# Display device support -+# -+# CONFIG_DISPLAY_SUPPORT is not set -+# CONFIG_LOGO is not set -+ -+# -+# Sound -+# -+# CONFIG_SOUND is not set -+CONFIG_USB_SUPPORT=y -+# CONFIG_USB_ARCH_HAS_HCD is not set -+# CONFIG_USB_ARCH_HAS_OHCI is not set -+# CONFIG_USB_ARCH_HAS_EHCI is not set -+ -+# -+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -+# -+ -+# -+# USB Gadget Support -+# -+CONFIG_USB_GADGET=y -+# CONFIG_USB_GADGET_DEBUG_FILES is not set -+CONFIG_USB_GADGET_SELECTED=y -+# CONFIG_USB_GADGET_AMD5536UDC is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y -+# CONFIG_USB_GADGET_FSL_USB2 is not set -+# CONFIG_USB_GADGET_NET2280 is not set -+# CONFIG_USB_GADGET_PXA2XX is not set -+# CONFIG_USB_GADGET_M66592 is not set -+# CONFIG_USB_GADGET_GOKU is not set -+# CONFIG_USB_GADGET_LH7A40X is not set -+# CONFIG_USB_GADGET_OMAP is not set -+# CONFIG_USB_GADGET_S3C2410 is not set -+# CONFIG_USB_GADGET_AT91 is not set -+# CONFIG_USB_GADGET_DUMMY_HCD is not set -+CONFIG_USB_GADGET_DUALSPEED=y -+# CONFIG_USB_ZERO is not set -+CONFIG_USB_ETH=y -+# CONFIG_USB_ETH_RNDIS is not set -+# CONFIG_USB_GADGETFS is not set -+# CONFIG_USB_FILE_STORAGE is not set -+# CONFIG_USB_G_SERIAL is not set -+# CONFIG_USB_MIDI_GADGET is not set -+CONFIG_MMC=y -+# CONFIG_MMC_DEBUG is not set -+# CONFIG_MMC_UNSAFE_RESUME is not set -+ -+# -+# MMC/SD Card Drivers -+# -+CONFIG_MMC_BLOCK=y -+# CONFIG_MMC_BLOCK_BOUNCE is not set -+# CONFIG_SDIO_UART is not set -+ -+# -+# MMC/SD Host Controller Drivers -+# -+CONFIG_MMC_ATMELMCI=y -+# CONFIG_MMC_SPI is not set -+CONFIG_NEW_LEDS=y -+CONFIG_LEDS_CLASS=y -+ -+# -+# LED drivers -+# -+CONFIG_LEDS_GPIO=y -+ -+# -+# LED Triggers -+# -+CONFIG_LEDS_TRIGGERS=y -+CONFIG_LEDS_TRIGGER_TIMER=y -+CONFIG_LEDS_TRIGGER_HEARTBEAT=y -+CONFIG_RTC_LIB=y -+CONFIG_RTC_CLASS=y -+CONFIG_RTC_HCTOSYS=y -+CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -+# CONFIG_RTC_DEBUG is not set -+ -+# -+# RTC interfaces -+# -+CONFIG_RTC_INTF_SYSFS=y -+# CONFIG_RTC_INTF_PROC is not set -+CONFIG_RTC_INTF_DEV=y -+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -+# CONFIG_RTC_DRV_TEST is not set -+ -+# -+# SPI RTC drivers -+# -+# CONFIG_RTC_DRV_RS5C348 is not set -+# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# -+# Platform RTC drivers -+# -+# CONFIG_RTC_DRV_DS1553 is not set -+# CONFIG_RTC_DRV_STK17TA8 is not set -+# CONFIG_RTC_DRV_DS1742 is not set -+# CONFIG_RTC_DRV_M48T86 is not set -+# CONFIG_RTC_DRV_M48T59 is not set -+# CONFIG_RTC_DRV_V3020 is not set -+ -+# -+# on-CPU RTC drivers -+# -+CONFIG_RTC_DRV_AT32AP700X=y -+ -+# -+# Userspace I/O -+# -+# CONFIG_UIO is not set -+ -+# -+# File systems -+# -+CONFIG_EXT2_FS=y -+# CONFIG_EXT2_FS_XATTR is not set -+# CONFIG_EXT2_FS_XIP is not set -+# CONFIG_EXT3_FS is not set -+# CONFIG_EXT4DEV_FS is not set -+# CONFIG_REISERFS_FS is not set -+# CONFIG_JFS_FS is not set -+# CONFIG_FS_POSIX_ACL is not set -+# CONFIG_XFS_FS is not set -+# CONFIG_GFS2_FS is not set -+# CONFIG_OCFS2_FS is not set -+# CONFIG_MINIX_FS is not set -+# CONFIG_ROMFS_FS is not set -+# CONFIG_INOTIFY is not set -+# CONFIG_QUOTA is not set -+# CONFIG_DNOTIFY is not set -+# CONFIG_AUTOFS_FS is not set -+# CONFIG_AUTOFS4_FS is not set -+# CONFIG_FUSE_FS is not set -+ -+# -+# CD-ROM/DVD Filesystems -+# -+# CONFIG_ISO9660_FS is not set -+# CONFIG_UDF_FS is not set -+ -+# -+# DOS/FAT/NT Filesystems -+# -+# CONFIG_MSDOS_FS is not set -+# CONFIG_VFAT_FS is not set -+# CONFIG_NTFS_FS is not set -+ -+# -+# Pseudo filesystems -+# -+CONFIG_PROC_FS=y -+CONFIG_PROC_KCORE=y -+CONFIG_PROC_SYSCTL=y -+CONFIG_SYSFS=y -+CONFIG_TMPFS=y -+# CONFIG_TMPFS_POSIX_ACL is not set -+# CONFIG_HUGETLB_PAGE is not set -+# CONFIG_CONFIGFS_FS is not set -+ -+# -+# Miscellaneous filesystems -+# -+# CONFIG_ADFS_FS is not set -+# CONFIG_AFFS_FS is not set -+# CONFIG_HFS_FS is not set -+# CONFIG_HFSPLUS_FS is not set -+# CONFIG_BEFS_FS is not set -+# CONFIG_BFS_FS is not set -+# CONFIG_EFS_FS is not set -+CONFIG_JFFS2_FS=y -+CONFIG_JFFS2_FS_DEBUG=0 -+# CONFIG_JFFS2_FS_WRITEBUFFER is not set -+# CONFIG_JFFS2_SUMMARY is not set -+# CONFIG_JFFS2_FS_XATTR is not set -+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -+CONFIG_JFFS2_ZLIB=y -+# CONFIG_JFFS2_LZO is not set -+CONFIG_JFFS2_RTIME=y -+# CONFIG_JFFS2_RUBIN is not set -+# CONFIG_CRAMFS is not set -+# CONFIG_VXFS_FS is not set -+# CONFIG_HPFS_FS is not set -+# CONFIG_QNX4FS_FS is not set -+# CONFIG_SYSV_FS is not set -+# CONFIG_UFS_FS is not set -+# CONFIG_NETWORK_FILESYSTEMS is not set -+ -+# -+# Partition Types -+# -+# CONFIG_PARTITION_ADVANCED is not set -+CONFIG_MSDOS_PARTITION=y -+# CONFIG_NLS is not set -+# CONFIG_DLM is not set -+ -+# -+# Kernel hacking -+# -+CONFIG_TRACE_IRQFLAGS_SUPPORT=y -+# CONFIG_PRINTK_TIME is not set -+CONFIG_ENABLE_WARN_DEPRECATED=y -+CONFIG_ENABLE_MUST_CHECK=y -+CONFIG_MAGIC_SYSRQ=y -+# CONFIG_UNUSED_SYMBOLS is not set -+# CONFIG_DEBUG_FS is not set -+# CONFIG_HEADERS_CHECK is not set -+# CONFIG_DEBUG_KERNEL is not set -+# CONFIG_DEBUG_BUGVERBOSE is not set -+# CONFIG_SAMPLES is not set -+ -+# -+# Security options -+# -+# CONFIG_KEYS is not set -+# CONFIG_SECURITY is not set -+# CONFIG_SECURITY_FILE_CAPABILITIES is not set -+# CONFIG_CRYPTO is not set -+ -+# -+# Library routines -+# -+CONFIG_BITREVERSE=y -+# CONFIG_CRC_CCITT is not set -+# CONFIG_CRC16 is not set -+# CONFIG_CRC_ITU_T is not set -+CONFIG_CRC32=y -+# CONFIG_CRC7 is not set -+# CONFIG_LIBCRC32C is not set -+CONFIG_ZLIB_INFLATE=y -+CONFIG_ZLIB_DEFLATE=y -+CONFIG_HAS_IOMEM=y -+CONFIG_HAS_IOPORT=y -+CONFIG_HAS_DMA=y -diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile -new file mode 100644 -index 0000000..b429b75 ---- /dev/null -+++ b/arch/avr32/drivers/Makefile -@@ -0,0 +1 @@ -+obj-$(CONFIG_DW_DMAC) += dw-dmac.o -diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c -new file mode 100644 -index 0000000..224eb30 ---- /dev/null -+++ b/arch/avr32/drivers/dw-dmac.c -@@ -0,0 +1,761 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/dmapool.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+ -+#include "dw-dmac.h" -+ -+#define DMAC_NR_CHANNELS 3 -+#define DMAC_MAX_BLOCKSIZE 4095 -+ -+enum { -+ CH_STATE_FREE = 0, -+ CH_STATE_ALLOCATED, -+ CH_STATE_BUSY, -+}; -+ -+struct dw_dma_lli { -+ dma_addr_t sar; -+ dma_addr_t dar; -+ dma_addr_t llp; -+ u32 ctllo; -+ u32 ctlhi; -+ u32 sstat; -+ u32 dstat; -+}; -+ -+struct dw_dma_block { -+ struct dw_dma_lli *lli_vaddr; -+ dma_addr_t lli_dma_addr; -+}; -+ -+struct dw_dma_channel { -+ unsigned int state; -+ int is_cyclic; -+ struct dma_request_sg *req_sg; -+ struct dma_request_cyclic *req_cyclic; -+ unsigned int nr_blocks; -+ int direction; -+ struct dw_dma_block *block; -+}; -+ -+struct dw_dma_controller { -+ spinlock_t lock; -+ void * __iomem regs; -+ struct dma_pool *lli_pool; -+ struct clk *hclk; -+ struct dma_controller dma; -+ struct dw_dma_channel channel[DMAC_NR_CHANNELS]; -+}; -+#define to_dw_dmac(dmac) container_of(dmac, struct dw_dma_controller, dma) -+ -+#define dmac_writel_hi(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_readl_hi(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg + 4) -+#define dmac_writel_lo(dmac, reg, value) \ -+ __raw_writel((value), (dmac)->regs + DW_DMAC_##reg) -+#define dmac_readl_lo(dmac, reg) \ -+ __raw_readl((dmac)->regs + DW_DMAC_##reg) -+#define dmac_chan_writel_hi(dmac, chan, reg, value) \ -+ __raw_writel((value), ((dmac)->regs + 0x58 * (chan) \ -+ + DW_DMAC_CHAN_##reg + 4)) -+#define dmac_chan_readl_hi(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg + 4) -+#define dmac_chan_writel_lo(dmac, chan, reg, value) \ -+ __raw_writel((value), (dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define dmac_chan_readl_lo(dmac, chan, reg) \ -+ __raw_readl((dmac)->regs + 0x58 * (chan) + DW_DMAC_CHAN_##reg) -+#define set_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (1 << (chan)) | (1 << ((chan) + 8))) -+#define clear_channel_bit(dmac, reg, chan) \ -+ dmac_writel_lo(dmac, reg, (0 << (chan)) | (1 << ((chan) + 8))) -+ -+static int dmac_alloc_channel(struct dma_controller *_dmac) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long flags; -+ int i; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ for (i = 0; i < DMAC_NR_CHANNELS; i++) -+ if (dmac->channel[i].state == CH_STATE_FREE) -+ break; -+ -+ if (i < DMAC_NR_CHANNELS) { -+ chan = &dmac->channel[i]; -+ chan->state = CH_STATE_ALLOCATED; -+ } else { -+ i = -EBUSY; -+ } -+ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ return i; -+} -+ -+static void dmac_release_channel(struct dma_controller *_dmac, int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS -+ || dmac->channel[channel].state != CH_STATE_ALLOCATED); -+ -+ dmac->channel[channel].state = CH_STATE_FREE; -+} -+ -+static struct dw_dma_block *allocate_blocks(struct dw_dma_controller *dmac, -+ unsigned int nr_blocks) -+{ -+ struct dw_dma_block *block; -+ void *p; -+ unsigned int i; -+ -+ block = kmalloc(nr_blocks * sizeof(*block), -+ GFP_KERNEL); -+ if (unlikely(!block)) -+ return NULL; -+ -+ for (i = 0; i < nr_blocks; i++) { -+ p = dma_pool_alloc(dmac->lli_pool, GFP_KERNEL, -+ &block[i].lli_dma_addr); -+ block[i].lli_vaddr = p; -+ if (unlikely(!p)) -+ goto fail; -+ } -+ -+ return block; -+ -+fail: -+ for (i = 0; i < nr_blocks; i++) { -+ if (!block[i].lli_vaddr) -+ break; -+ dma_pool_free(dmac->lli_pool, block[i].lli_vaddr, -+ block[i].lli_dma_addr); -+ } -+ kfree(block); -+ return NULL; -+} -+ -+static void cleanup_channel(struct dw_dma_controller *dmac, -+ struct dw_dma_channel *chan) -+{ -+ unsigned int i; -+ -+ if (chan->nr_blocks > 1) { -+ for (i = 0; i < chan->nr_blocks; i++) -+ dma_pool_free(dmac->lli_pool, chan->block[i].lli_vaddr, -+ chan->block[i].lli_dma_addr); -+ kfree(chan->block); -+ } -+ -+ chan->state = CH_STATE_ALLOCATED; -+} -+ -+static int dmac_prepare_request_sg(struct dma_controller *_dmac, -+ struct dma_request_sg *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || req->block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->req_sg = req; -+ chan->is_cyclic = 0; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ * There may be limitations in the driver and/or the DMA -+ * controller that prevents us from sending a whole -+ * scatterlist item in one go. Taking this into account, -+ * calculate the number of block transfers we need to set up. -+ * -+ * FIXME: Let the peripheral driver know about the maximum -+ * block size we support. We really don't want to use a -+ * different block size than what was suggested by the -+ * peripheral. -+ * -+ * Each block will get its own Linked List Item (LLI) below. -+ */ -+ block_size = req->block_size; -+ nr_blocks = req->nr_blocks; -+ pr_debug("block_size %lu, nr_blocks %u nr_sg = %u\n", -+ block_size, nr_blocks, req->nr_sg); -+ -+ BUG_ON(nr_blocks == 0); -+ chan->nr_blocks = nr_blocks; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size >> req->width; -+ ctllo = ((req->direction << 20) -+ // | (1 << 14) | (1 << 11) // source/dest burst trans len -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ if (nr_blocks == 1) { -+ /* Only one block: No need to use block chaining */ -+ if (direction == DMA_TO_DEVICE) { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->sg->dma_address); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->data_reg); -+ ctllo |= 2 << 7; // no dst increment -+ } else { -+ dmac_chan_writel_lo(dmac, req->req.channel, SAR, -+ req->data_reg); -+ dmac_chan_writel_lo(dmac, req->req.channel, DAR, -+ req->sg->dma_address); -+ ctllo |= 2 << 9; // no src increment -+ } -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, ctllo); -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, ctlhi); -+ pr_debug("ctl hi:lo 0x%lx:%lx\n", ctlhi, ctllo); -+ } else { -+ struct dw_dma_lli *lli, *lli_prev = NULL; -+ int j = 0, offset = 0; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, nr_blocks); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Map scatterlist items to blocks. One scatterlist -+ * item may need more than one block for the reasons -+ * mentioned above. -+ */ -+ for (i = 0; i < nr_blocks; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->sg[j].dma_address + offset; -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->sg[j].dma_address + offset; -+ } -+ lli_prev = lli; -+ -+ offset += block_size; -+ if (offset > req->sg[j].length) { -+ j++; -+ offset = 0; -+ } -+ } -+ -+ pr_debug("lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_hi(dmac, req->req.channel, CTL, 0); -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ set_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_prepare_request_cyclic(struct dma_controller *_dmac, -+ struct dma_request_cyclic *req) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ unsigned long ctlhi, ctllo, cfghi, cfglo; -+ unsigned long block_size; -+ int ret, i, direction; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dmac->lock, flags); -+ -+ block_size = (req->buffer_size/req->periods) >> req->width; -+ -+ ret = -EINVAL; -+ if (req->req.channel >= DMAC_NR_CHANNELS -+ || dmac->channel[req->req.channel].state != CH_STATE_ALLOCATED -+ || (req->periods == 0) -+ || block_size > DMAC_MAX_BLOCKSIZE) { -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ return -EINVAL; -+ } -+ -+ chan = &dmac->channel[req->req.channel]; -+ chan->state = CH_STATE_BUSY; -+ chan->is_cyclic = 1; -+ chan->req_cyclic = req; -+ -+ /* -+ * We have marked the channel as busy, so no need to keep the -+ * lock as long as we only touch the channel-specific -+ * registers -+ */ -+ spin_unlock_irqrestore(&dmac->lock, flags); -+ -+ /* -+ Setup -+ */ -+ BUG_ON(req->buffer_size % req->periods); -+ /* printk(KERN_INFO "block_size = %lu, periods = %u\n", block_size, req->periods); */ -+ -+ chan->nr_blocks = req->periods; -+ -+ ret = -EINVAL; -+ cfglo = cfghi = 0; -+ switch (req->direction) { -+ case DMA_DIR_MEM_TO_PERIPH: -+ direction = DMA_TO_DEVICE; -+ cfghi = req->periph_id << (43 - 32); -+ break; -+ -+ case DMA_DIR_PERIPH_TO_MEM: -+ direction = DMA_FROM_DEVICE; -+ cfghi = req->periph_id << (39 - 32); -+ break; -+ default: -+ goto out_unclaim_channel; -+ } -+ -+ chan->direction = direction; -+ -+ dmac_chan_writel_hi(dmac, req->req.channel, CFG, cfghi); -+ dmac_chan_writel_lo(dmac, req->req.channel, CFG, cfglo); -+ -+ ctlhi = block_size; -+ ctllo = ((req->direction << 20) -+ | (req->width << 4) | (req->width << 1) -+ | (1 << 0)); // interrupt enable -+ -+ { -+ struct dw_dma_lli *lli = NULL, *lli_prev = NULL; -+ -+ ret = -ENOMEM; -+ chan->block = allocate_blocks(dmac, req->periods); -+ if (!chan->block) -+ goto out_unclaim_channel; -+ -+ if (direction == DMA_TO_DEVICE) -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 7; -+ else -+ ctllo |= 1 << 28 | 1 << 27 | 2 << 9; -+ -+ /* -+ * Set up a linked list items where each period gets -+ * an item. The linked list item for the last period -+ * points back to the star of the buffer making a -+ * cyclic buffer. -+ */ -+ for (i = 0; i < req->periods; i++) { -+ lli = chan->block[i].lli_vaddr; -+ if (lli_prev) { -+ lli_prev->llp = chan->block[i].lli_dma_addr; -+ /* printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, -+ lli_prev->sar, lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi);*/ -+ } -+ lli->llp = 0; -+ lli->ctllo = ctllo; -+ lli->ctlhi = ctlhi; -+ if (direction == DMA_TO_DEVICE) { -+ lli->sar = req->buffer_start + i*(block_size << req->width); -+ lli->dar = req->data_reg; -+ } else { -+ lli->sar = req->data_reg; -+ lli->dar = req->buffer_start + i*(block_size << req->width); -+ } -+ lli_prev = lli; -+ } -+ lli->llp = chan->block[0].lli_dma_addr; -+ -+ /*printk(KERN_INFO "lli[%d] (0x%p/0x%x): 0x%x 0x%x 0x%x 0x%x 0x%x\n", -+ i - 1, chan->block[i - 1].lli_vaddr, -+ chan->block[i - 1].lli_dma_addr, lli_prev->sar, -+ lli_prev->dar, lli_prev->llp, -+ lli_prev->ctllo, lli_prev->ctlhi); */ -+ -+ /* -+ * SAR, DAR and CTL are initialized from the LLI. We -+ * only have to enable the LLI bits in CTL. -+ */ -+ dmac_chan_writel_lo(dmac, req->req.channel, LLP, -+ chan->block[0].lli_dma_addr); -+ dmac_chan_writel_lo(dmac, req->req.channel, CTL, 1 << 28 | 1 << 27); -+ } -+ -+ clear_channel_bit(dmac, MASK_XFER, req->req.channel); -+ set_channel_bit(dmac, MASK_ERROR, req->req.channel); -+ if (req->req.block_complete) -+ set_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ else -+ clear_channel_bit(dmac, MASK_BLOCK, req->req.channel); -+ -+ return 0; -+ -+out_unclaim_channel: -+ chan->state = CH_STATE_ALLOCATED; -+ return ret; -+} -+ -+static int dmac_start_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ set_channel_bit(dmac, CH_EN, channel); -+ -+ return 0; -+} -+ -+static dma_addr_t dmac_get_current_pos(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ dma_addr_t current_pos; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ -+ switch (chan->direction) { -+ case DMA_TO_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, SAR); -+ break; -+ case DMA_FROM_DEVICE: -+ current_pos = dmac_chan_readl_lo(dmac, channel, DAR); -+ break; -+ default: -+ return 0; -+ } -+ -+ -+ if (!current_pos) { -+ if (chan->is_cyclic) { -+ current_pos = chan->req_cyclic->buffer_start; -+ } else { -+ current_pos = chan->req_sg->sg->dma_address; -+ } -+ } -+ -+ return current_pos; -+} -+ -+ -+static int dmac_stop_request(struct dma_controller *_dmac, -+ unsigned int channel) -+{ -+ struct dw_dma_controller *dmac = to_dw_dmac(_dmac); -+ struct dw_dma_channel *chan; -+ -+ BUG_ON(channel >= DMAC_NR_CHANNELS); -+ -+ chan = &dmac->channel[channel]; -+ pr_debug("stop: st%u s%08x d%08x l%08x ctl0x%08x:0x%08x\n", -+ chan->state, dmac_chan_readl_lo(dmac, channel, SAR), -+ dmac_chan_readl_lo(dmac, channel, DAR), -+ dmac_chan_readl_lo(dmac, channel, LLP), -+ dmac_chan_readl_hi(dmac, channel, CTL), -+ dmac_chan_readl_lo(dmac, channel, CTL)); -+ -+ if (chan->state == CH_STATE_BUSY) { -+ clear_channel_bit(dmac, CH_EN, channel); -+ cleanup_channel(dmac, &dmac->channel[channel]); -+ } -+ -+ return 0; -+} -+ -+ -+static void dmac_block_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ -+ while (status) { -+ struct dma_request *req; -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic -+ || !chan->req_cyclic->req.block_complete); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg || !chan->req_sg->req.block_complete); -+ req = &chan->req_sg->req; -+ } -+ dmac_writel_lo(dmac, CLEAR_BLOCK, 1 << chanid); -+ req->block_complete(req); -+ status = dmac_readl_lo(dmac, STATUS_BLOCK); -+ } -+} -+ -+static void dmac_xfer_complete(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ struct dma_request *req; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ -+ while (status) { -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_XFER, 1 << chanid); -+ -+ req = &chan->req_sg->req; -+ BUG_ON(!req); -+ cleanup_channel(dmac, chan); -+ if (req->xfer_complete) -+ req->xfer_complete(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static void dmac_error(struct dw_dma_controller *dmac) -+{ -+ struct dw_dma_channel *chan; -+ unsigned long status, chanid; -+ -+ status = dmac_readl_lo(dmac, STATUS_ERROR); -+ -+ while (status) { -+ struct dma_request *req; -+ -+ chanid = __ffs(status); -+ chan = &dmac->channel[chanid]; -+ -+ dmac_writel_lo(dmac, CLEAR_ERROR, 1 << chanid); -+ clear_channel_bit(dmac, CH_EN, chanid); -+ -+ if (chan->is_cyclic) { -+ BUG_ON(!chan->req_cyclic); -+ req = &chan->req_cyclic->req; -+ } else { -+ BUG_ON(!chan->req_sg); -+ req = &chan->req_sg->req; -+ } -+ -+ cleanup_channel(dmac, chan); -+ if (req->error) -+ req->error(req); -+ -+ status = dmac_readl_lo(dmac, STATUS_XFER); -+ } -+} -+ -+static irqreturn_t dmac_interrupt(int irq, void *dev_id) -+{ -+ struct dw_dma_controller *dmac = dev_id; -+ unsigned long status; -+ int ret = IRQ_NONE; -+ -+ spin_lock(&dmac->lock); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ -+ while (status) { -+ ret = IRQ_HANDLED; -+ if (status & 0x10) -+ dmac_error(dmac); -+ if (status & 0x02) -+ dmac_block_complete(dmac); -+ if (status & 0x01) -+ dmac_xfer_complete(dmac); -+ -+ status = dmac_readl_lo(dmac, STATUS_INT); -+ } -+ -+ spin_unlock(&dmac->lock); -+ return ret; -+} -+ -+static int __devinit dmac_probe(struct platform_device *pdev) -+{ -+ struct dw_dma_controller *dmac; -+ struct resource *regs; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ dmac = kmalloc(sizeof(*dmac), GFP_KERNEL); -+ if (!dmac) -+ return -ENOMEM; -+ memset(dmac, 0, sizeof(*dmac)); -+ -+ dmac->hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(dmac->hclk)) { -+ ret = PTR_ERR(dmac->hclk); -+ goto out_free_dmac; -+ } -+ clk_enable(dmac->hclk); -+ -+ ret = -ENOMEM; -+ dmac->lli_pool = dma_pool_create("dmac", &pdev->dev, -+ sizeof(struct dw_dma_lli), 4, 0); -+ if (!dmac->lli_pool) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dmac->lock); -+ dmac->dma.dev = &pdev->dev; -+ dmac->dma.alloc_channel = dmac_alloc_channel; -+ dmac->dma.release_channel = dmac_release_channel; -+ dmac->dma.prepare_request_sg = dmac_prepare_request_sg; -+ dmac->dma.prepare_request_cyclic = dmac_prepare_request_cyclic; -+ dmac->dma.start_request = dmac_start_request; -+ dmac->dma.stop_request = dmac_stop_request; -+ dmac->dma.get_current_pos = dmac_get_current_pos; -+ -+ dmac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dmac->regs) -+ goto out_free_pool; -+ -+ ret = request_irq(platform_get_irq(pdev, 0), dmac_interrupt, -+ IRQF_SAMPLE_RANDOM, pdev->name, dmac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* Enable the DMA controller */ -+ dmac_writel_lo(dmac, CFG, 1); -+ -+ register_dma_controller(&dmac->dma); -+ -+ printk(KERN_INFO -+ "dmac%d: DesignWare DMA controller at 0x%p irq %d\n", -+ dmac->dma.id, dmac->regs, platform_get_irq(pdev, 0)); -+ -+ return 0; -+ -+out_unmap_regs: -+ iounmap(dmac->regs); -+out_free_pool: -+ dma_pool_destroy(dmac->lli_pool); -+out_disable_clk: -+ clk_disable(dmac->hclk); -+ clk_put(dmac->hclk); -+out_free_dmac: -+ kfree(dmac); -+ return ret; -+} -+ -+static struct platform_driver dmac_driver = { -+ .probe = dmac_probe, -+ .driver = { -+ .name = "dmaca", -+ }, -+}; -+ -+static int __init dmac_init(void) -+{ -+ return platform_driver_register(&dmac_driver); -+} -+subsys_initcall(dmac_init); -+ -+static void __exit dmac_exit(void) -+{ -+ platform_driver_unregister(&dmac_driver); -+} -+module_exit(dmac_exit); -+ -+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h -new file mode 100644 -index 0000000..1f67921 ---- /dev/null -+++ b/arch/avr32/drivers/dw-dmac.h -@@ -0,0 +1,42 @@ -+/* -+ * Driver for the Synopsys DesignWare DMA Controller -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __AVR32_DW_DMAC_H__ -+#define __AVR32_DW_DMAC_H__ -+ -+#define DW_DMAC_CFG 0x398 -+#define DW_DMAC_CH_EN 0x3a0 -+ -+#define DW_DMAC_STATUS_XFER 0x2e8 -+#define DW_DMAC_STATUS_BLOCK 0x2f0 -+#define DW_DMAC_STATUS_ERROR 0x308 -+ -+#define DW_DMAC_MASK_XFER 0x310 -+#define DW_DMAC_MASK_BLOCK 0x318 -+#define DW_DMAC_MASK_ERROR 0x330 -+ -+#define DW_DMAC_CLEAR_XFER 0x338 -+#define DW_DMAC_CLEAR_BLOCK 0x340 -+#define DW_DMAC_CLEAR_ERROR 0x358 -+ -+#define DW_DMAC_STATUS_INT 0x360 -+ -+#define DW_DMAC_CHAN_SAR 0x000 -+#define DW_DMAC_CHAN_DAR 0x008 -+#define DW_DMAC_CHAN_LLP 0x010 -+#define DW_DMAC_CHAN_CTL 0x018 -+#define DW_DMAC_CHAN_SSTAT 0x020 -+#define DW_DMAC_CHAN_DSTAT 0x028 -+#define DW_DMAC_CHAN_SSTATAR 0x030 -+#define DW_DMAC_CHAN_DSTATAR 0x038 -+#define DW_DMAC_CHAN_CFG 0x040 -+#define DW_DMAC_CHAN_SGR 0x048 -+#define DW_DMAC_CHAN_DSR 0x050 -+ -+#endif /* __AVR32_DW_DMAC_H__ */ -diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile -index 90e5aff..1aedaeb 100644 ---- a/arch/avr32/kernel/Makefile -+++ b/arch/avr32/kernel/Makefile -@@ -9,10 +9,6 @@ obj-y += syscall_table.o syscall-stubs.o irq.o - obj-y += setup.o traps.o semaphore.o ptrace.o - obj-y += signal.o sys_avr32.o process.o time.o - obj-y += init_task.o switch_to.o cpu.o -+obj-y += dma-controller.o - obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o - obj-$(CONFIG_KPROBES) += kprobes.o -- --USE_STANDARD_AS_RULE := true -- --%.lds: %.lds.c FORCE -- $(call if_changed_dep,cpp_lds_S) -diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c -new file mode 100644 -index 0000000..fb654b3 ---- /dev/null -+++ b/arch/avr32/kernel/dma-controller.c -@@ -0,0 +1,34 @@ -+/* -+ * Preliminary DMA controller framework for AVR32 -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <asm/dma-controller.h> -+ -+static LIST_HEAD(controllers); -+ -+int register_dma_controller(struct dma_controller *dmac) -+{ -+ static int next_id; -+ -+ dmac->id = next_id++; -+ list_add_tail(&dmac->list, &controllers); -+ -+ return 0; -+} -+EXPORT_SYMBOL(register_dma_controller); -+ -+struct dma_controller *find_dma_controller(int id) -+{ -+ struct dma_controller *dmac; -+ -+ list_for_each_entry(dmac, &controllers, list) -+ if (dmac->id == id) -+ return dmac; -+ return NULL; -+} -+EXPORT_SYMBOL(find_dma_controller); -diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S -index 42657f1..ccadfd9 100644 ---- a/arch/avr32/kernel/entry-avr32b.S -+++ b/arch/avr32/kernel/entry-avr32b.S -@@ -159,11 +159,18 @@ handle_vmalloc_miss: - - .section .scall.text,"ax",@progbits - system_call: -+#ifdef CONFIG_PREEMPT -+ mask_interrupts -+#endif - pushm r12 /* r12_orig */ - stmts --sp, r0-lr -- zero_fp -+ - mfsr r0, SYSREG_RAR_SUP - mfsr r1, SYSREG_RSR_SUP -+#ifdef CONFIG_PREEMPT -+ unmask_interrupts -+#endif -+ zero_fp - stm --sp, r0-r1 - - /* check for syscall tracing */ -@@ -638,6 +645,13 @@ irq_level\level: - stmts --sp,r0-lr - mfsr r8, rar_int\level - mfsr r9, rsr_int\level -+ -+#ifdef CONFIG_PREEMPT -+ sub r11, pc, (. - system_call) -+ cp.w r11, r8 -+ breq 4f -+#endif -+ - pushm r8-r9 - - mov r11, sp -@@ -668,6 +682,16 @@ irq_level\level: - sub sp, -4 /* ignore r12_orig */ - rete - -+#ifdef CONFIG_PREEMPT -+4: mask_interrupts -+ mfsr r8, rsr_int\level -+ sbr r8, 16 -+ mtsr rsr_int\level, r8 -+ ldmts sp++, r0-lr -+ sub sp, -4 /* ignore r12_orig */ -+ rete -+#endif -+ - 2: get_thread_info r0 - ld.w r1, r0[TI_flags] - bld r1, TIF_CPU_GOING_TO_SLEEP -diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c -index d08b0bc..4b4c188 100644 ---- a/arch/avr32/kernel/setup.c -+++ b/arch/avr32/kernel/setup.c -@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p) - - fbmem_size = memparse(p, &p); - if (*p == '@') { -- fbmem_start = memparse(p, &p); -+ fbmem_start = memparse(p + 1, &p); - ret = add_reserved_region(fbmem_start, - fbmem_start + fbmem_size - 1, - "Framebuffer"); -diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S -new file mode 100644 -index 0000000..ce9ac96 ---- /dev/null -+++ b/arch/avr32/kernel/vmlinux.lds.S -@@ -0,0 +1,143 @@ -+/* -+ * AVR32 linker script for the Linux kernel -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#define LOAD_OFFSET 0x00000000 -+#include <asm-generic/vmlinux.lds.h> -+#include <asm/cache.h> -+#include <asm/thread_info.h> -+ -+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -+OUTPUT_ARCH(avr32) -+ENTRY(_start) -+ -+/* Big endian */ -+jiffies = jiffies_64 + 4; -+ -+SECTIONS -+{ -+ . = CONFIG_ENTRY_ADDRESS; -+ .init : AT(ADDR(.init) - LOAD_OFFSET) { -+ _stext = .; -+ __init_begin = .; -+ _sinittext = .; -+ *(.text.reset) -+ *(.init.text) -+ /* -+ * .exit.text is discarded at runtime, not -+ * link time, to deal with references from -+ * __bug_table -+ */ -+ *(.exit.text) -+ _einittext = .; -+ . = ALIGN(4); -+ __tagtable_begin = .; -+ *(.taglist.init) -+ __tagtable_end = .; -+ *(.init.data) -+ . = ALIGN(16); -+ __setup_start = .; -+ *(.init.setup) -+ __setup_end = .; -+ . = ALIGN(4); -+ __initcall_start = .; -+ INITCALLS -+ __initcall_end = .; -+ __con_initcall_start = .; -+ *(.con_initcall.init) -+ __con_initcall_end = .; -+ __security_initcall_start = .; -+ *(.security_initcall.init) -+ __security_initcall_end = .; -+#ifdef CONFIG_BLK_DEV_INITRD -+ . = ALIGN(32); -+ __initramfs_start = .; -+ *(.init.ramfs) -+ __initramfs_end = .; -+#endif -+ . = ALIGN(PAGE_SIZE); -+ __init_end = .; -+ } -+ -+ .text : AT(ADDR(.text) - LOAD_OFFSET) { -+ _evba = .; -+ _text = .; -+ *(.ex.text) -+ . = 0x50; -+ *(.tlbx.ex.text) -+ . = 0x60; -+ *(.tlbr.ex.text) -+ . = 0x70; -+ *(.tlbw.ex.text) -+ . = 0x100; -+ *(.scall.text) -+ *(.irq.text) -+ TEXT_TEXT -+ SCHED_TEXT -+ LOCK_TEXT -+ KPROBES_TEXT -+ *(.fixup) -+ *(.gnu.warning) -+ _etext = .; -+ } = 0xd703d703 -+ -+ . = ALIGN(4); -+ __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { -+ __start___ex_table = .; -+ *(__ex_table) -+ __stop___ex_table = .; -+ } -+ -+ BUG_TABLE -+ -+ RODATA -+ -+ . = ALIGN(THREAD_SIZE); -+ -+ .data : AT(ADDR(.data) - LOAD_OFFSET) { -+ _data = .; -+ _sdata = .; -+ /* -+ * First, the init task union, aligned to an 8K boundary. -+ */ -+ *(.data.init_task) -+ -+ /* Then, the cacheline aligned data */ -+ . = ALIGN(L1_CACHE_BYTES); -+ *(.data.cacheline_aligned) -+ -+ /* And the rest... */ -+ *(.data.rel*) -+ DATA_DATA -+ CONSTRUCTORS -+ -+ _edata = .; -+ } -+ -+ -+ . = ALIGN(8); -+ .bss : AT(ADDR(.bss) - LOAD_OFFSET) { -+ __bss_start = .; -+ *(.bss) -+ *(COMMON) -+ . = ALIGN(8); -+ __bss_stop = .; -+ _end = .; -+ } -+ -+ /* When something in the kernel is NOT compiled as a module, the module -+ * cleanup code and data are put into these segments. Both can then be -+ * thrown away, as cleanup code is never called unless it's a module. -+ */ -+ /DISCARD/ : { -+ *(.exit.data) -+ *(.exitcall.exit) -+ } -+ -+ DWARF_DEBUG -+} -diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c -deleted file mode 100644 -index db0438f..0000000 ---- a/arch/avr32/kernel/vmlinux.lds.c -+++ /dev/null -@@ -1,142 +0,0 @@ --/* -- * AVR32 linker script for the Linux kernel -- * -- * Copyright (C) 2004-2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#define LOAD_OFFSET 0x00000000 --#include <asm-generic/vmlinux.lds.h> -- --OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") --OUTPUT_ARCH(avr32) --ENTRY(_start) -- --/* Big endian */ --jiffies = jiffies_64 + 4; -- --SECTIONS --{ -- . = CONFIG_ENTRY_ADDRESS; -- .init : AT(ADDR(.init) - LOAD_OFFSET) { -- _stext = .; -- __init_begin = .; -- _sinittext = .; -- *(.text.reset) -- *(.init.text) -- /* -- * .exit.text is discarded at runtime, not -- * link time, to deal with references from -- * __bug_table -- */ -- *(.exit.text) -- _einittext = .; -- . = ALIGN(4); -- __tagtable_begin = .; -- *(.taglist.init) -- __tagtable_end = .; -- *(.init.data) -- . = ALIGN(16); -- __setup_start = .; -- *(.init.setup) -- __setup_end = .; -- . = ALIGN(4); -- __initcall_start = .; -- INITCALLS -- __initcall_end = .; -- __con_initcall_start = .; -- *(.con_initcall.init) -- __con_initcall_end = .; -- __security_initcall_start = .; -- *(.security_initcall.init) -- __security_initcall_end = .; --#ifdef CONFIG_BLK_DEV_INITRD -- . = ALIGN(32); -- __initramfs_start = .; -- *(.init.ramfs) -- __initramfs_end = .; --#endif -- . = ALIGN(4096); -- __init_end = .; -- } -- -- . = ALIGN(8192); -- .text : AT(ADDR(.text) - LOAD_OFFSET) { -- _evba = .; -- _text = .; -- *(.ex.text) -- . = 0x50; -- *(.tlbx.ex.text) -- . = 0x60; -- *(.tlbr.ex.text) -- . = 0x70; -- *(.tlbw.ex.text) -- . = 0x100; -- *(.scall.text) -- *(.irq.text) -- TEXT_TEXT -- SCHED_TEXT -- LOCK_TEXT -- KPROBES_TEXT -- *(.fixup) -- *(.gnu.warning) -- _etext = .; -- } = 0xd703d703 -- -- . = ALIGN(4); -- __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { -- __start___ex_table = .; -- *(__ex_table) -- __stop___ex_table = .; -- } -- -- BUG_TABLE -- -- RODATA -- -- . = ALIGN(8192); -- -- .data : AT(ADDR(.data) - LOAD_OFFSET) { -- _data = .; -- _sdata = .; -- /* -- * First, the init task union, aligned to an 8K boundary. -- */ -- *(.data.init_task) -- -- /* Then, the cacheline aligned data */ -- . = ALIGN(32); -- *(.data.cacheline_aligned) -- -- /* And the rest... */ -- *(.data.rel*) -- DATA_DATA -- CONSTRUCTORS -- -- _edata = .; -- } -- -- -- . = ALIGN(8); -- .bss : AT(ADDR(.bss) - LOAD_OFFSET) { -- __bss_start = .; -- *(.bss) -- *(COMMON) -- . = ALIGN(8); -- __bss_stop = .; -- _end = .; -- } -- -- /* When something in the kernel is NOT compiled as a module, the module -- * cleanup code and data are put into these segments. Both can then be -- * thrown away, as cleanup code is never called unless it's a module. -- */ -- /DISCARD/ : { -- *(.exit.data) -- *(.exitcall.exit) -- } -- -- DWARF_DEBUG --} -diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig -index eb30783..0eb590a 100644 ---- a/arch/avr32/mach-at32ap/Kconfig -+++ b/arch/avr32/mach-at32ap/Kconfig -@@ -3,9 +3,9 @@ if PLATFORM_AT32AP - menu "Atmel AVR32 AP options" - - choice -- prompt "AT32AP7000 static memory bus width" -- depends on CPU_AT32AP7000 -- default AP7000_16_BIT_SMC -+ prompt "AT32AP700x static memory bus width" -+ depends on CPU_AT32AP700X -+ default AP700X_16_BIT_SMC - help - Define the width of the AP7000 external static memory interface. - This is used to determine how to mangle the address and/or data -@@ -15,17 +15,24 @@ choice - width for all chip selects, excluding the flash (which is using - raw access and is thus not affected by any of this.) - --config AP7000_32_BIT_SMC -+config AP700X_32_BIT_SMC - bool "32 bit" - --config AP7000_16_BIT_SMC -+config AP700X_16_BIT_SMC - bool "16 bit" - --config AP7000_8_BIT_SMC -+config AP700X_8_BIT_SMC - bool "8 bit" - - endchoice - -+config GPIO_DEV -+ bool "GPIO /dev interface" -+ select CONFIGFS_FS -+ default n -+ help -+ Say `Y' to enable a /dev interface to the GPIO pins. -+ - endmenu - - endif # PLATFORM_AT32AP -diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile -index a8b4450..0f6162e 100644 ---- a/arch/avr32/mach-at32ap/Makefile -+++ b/arch/avr32/mach-at32ap/Makefile -@@ -1,4 +1,5 @@ - obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o --obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o --obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o -+obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o -+obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o - obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o -+obj-$(CONFIG_GPIO_DEV) += gpio-dev.o -diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c -deleted file mode 100644 -index 64cc558..0000000 ---- a/arch/avr32/mach-at32ap/at32ap7000.c -+++ /dev/null -@@ -1,1324 +0,0 @@ --/* -- * Copyright (C) 2005-2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#include <linux/clk.h> --#include <linux/fb.h> --#include <linux/init.h> --#include <linux/platform_device.h> --#include <linux/dma-mapping.h> --#include <linux/spi/spi.h> -- --#include <asm/io.h> -- --#include <asm/arch/at32ap7000.h> --#include <asm/arch/board.h> --#include <asm/arch/portmux.h> -- --#include <video/atmel_lcdc.h> -- --#include "clock.h" --#include "hmatrix.h" --#include "pio.h" --#include "pm.h" -- --/* -- * We can reduce the code size a bit by using a constant here. Since -- * this file is completely chip-specific, it's safe to not use -- * ioremap. Generic drivers should of course never do this. -- */ --#define AT32_PM_BASE 0xfff00000 -- --#define PBMEM(base) \ -- { \ -- .start = base, \ -- .end = base + 0x3ff, \ -- .flags = IORESOURCE_MEM, \ -- } --#define IRQ(num) \ -- { \ -- .start = num, \ -- .end = num, \ -- .flags = IORESOURCE_IRQ, \ -- } --#define NAMED_IRQ(num, _name) \ -- { \ -- .start = num, \ -- .end = num, \ -- .name = _name, \ -- .flags = IORESOURCE_IRQ, \ -- } -- --/* REVISIT these assume *every* device supports DMA, but several -- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. -- */ --#define DEFINE_DEV(_name, _id) \ --static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ --static struct platform_device _name##_id##_device = { \ -- .name = #_name, \ -- .id = _id, \ -- .dev = { \ -- .dma_mask = &_name##_id##_dma_mask, \ -- .coherent_dma_mask = DMA_32BIT_MASK, \ -- }, \ -- .resource = _name##_id##_resource, \ -- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ --} --#define DEFINE_DEV_DATA(_name, _id) \ --static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ --static struct platform_device _name##_id##_device = { \ -- .name = #_name, \ -- .id = _id, \ -- .dev = { \ -- .dma_mask = &_name##_id##_dma_mask, \ -- .platform_data = &_name##_id##_data, \ -- .coherent_dma_mask = DMA_32BIT_MASK, \ -- }, \ -- .resource = _name##_id##_resource, \ -- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ --} -- --#define select_peripheral(pin, periph, flags) \ -- at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) -- --#define DEV_CLK(_name, devname, bus, _index) \ --static struct clk devname##_##_name = { \ -- .name = #_name, \ -- .dev = &devname##_device.dev, \ -- .parent = &bus##_clk, \ -- .mode = bus##_clk_mode, \ -- .get_rate = bus##_clk_get_rate, \ -- .index = _index, \ --} -- --static DEFINE_SPINLOCK(pm_lock); -- --unsigned long at32ap7000_osc_rates[3] = { -- [0] = 32768, -- /* FIXME: these are ATSTK1002-specific */ -- [1] = 20000000, -- [2] = 12000000, --}; -- --static unsigned long osc_get_rate(struct clk *clk) --{ -- return at32ap7000_osc_rates[clk->index]; --} -- --static unsigned long pll_get_rate(struct clk *clk, unsigned long control) --{ -- unsigned long div, mul, rate; -- -- if (!(control & PM_BIT(PLLEN))) -- return 0; -- -- div = PM_BFEXT(PLLDIV, control) + 1; -- mul = PM_BFEXT(PLLMUL, control) + 1; -- -- rate = clk->parent->get_rate(clk->parent); -- rate = (rate + div / 2) / div; -- rate *= mul; -- -- return rate; --} -- --static unsigned long pll0_get_rate(struct clk *clk) --{ -- u32 control; -- -- control = pm_readl(PLL0); -- -- return pll_get_rate(clk, control); --} -- --static unsigned long pll1_get_rate(struct clk *clk) --{ -- u32 control; -- -- control = pm_readl(PLL1); -- -- return pll_get_rate(clk, control); --} -- --/* -- * The AT32AP7000 has five primary clock sources: One 32kHz -- * oscillator, two crystal oscillators and two PLLs. -- */ --static struct clk osc32k = { -- .name = "osc32k", -- .get_rate = osc_get_rate, -- .users = 1, -- .index = 0, --}; --static struct clk osc0 = { -- .name = "osc0", -- .get_rate = osc_get_rate, -- .users = 1, -- .index = 1, --}; --static struct clk osc1 = { -- .name = "osc1", -- .get_rate = osc_get_rate, -- .index = 2, --}; --static struct clk pll0 = { -- .name = "pll0", -- .get_rate = pll0_get_rate, -- .parent = &osc0, --}; --static struct clk pll1 = { -- .name = "pll1", -- .get_rate = pll1_get_rate, -- .parent = &osc0, --}; -- --/* -- * The main clock can be either osc0 or pll0. The boot loader may -- * have chosen one for us, so we don't really know which one until we -- * have a look at the SM. -- */ --static struct clk *main_clock; -- --/* -- * Synchronous clocks are generated from the main clock. The clocks -- * must satisfy the constraint -- * fCPU >= fHSB >= fPB -- * i.e. each clock must not be faster than its parent. -- */ --static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) --{ -- return main_clock->get_rate(main_clock) >> shift; --}; -- --static void cpu_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(CPU_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(CPU_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long cpu_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(CPUDIV)) -- shift = PM_BFEXT(CPUSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) --{ -- u32 control; -- unsigned long parent_rate, child_div, actual_rate, div; -- -- parent_rate = clk->parent->get_rate(clk->parent); -- control = pm_readl(CKSEL); -- -- if (control & PM_BIT(HSBDIV)) -- child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -- else -- child_div = 1; -- -- if (rate > 3 * (parent_rate / 4) || child_div == 1) { -- actual_rate = parent_rate; -- control &= ~PM_BIT(CPUDIV); -- } else { -- unsigned int cpusel; -- div = (parent_rate + rate / 2) / rate; -- if (div > child_div) -- div = child_div; -- cpusel = (div > 1) ? (fls(div) - 2) : 0; -- control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -- actual_rate = parent_rate / (1 << (cpusel + 1)); -- } -- -- pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -- -- if (apply) -- pm_writel(CKSEL, control); -- -- return actual_rate; --} -- --static void hsb_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(HSB_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(HSB_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long hsb_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(HSBDIV)) -- shift = PM_BFEXT(HSBSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static void pba_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(PBA_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(PBA_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long pba_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(PBADIV)) -- shift = PM_BFEXT(PBASEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static void pbb_clk_mode(struct clk *clk, int enabled) --{ -- unsigned long flags; -- u32 mask; -- -- spin_lock_irqsave(&pm_lock, flags); -- mask = pm_readl(PBB_MASK); -- if (enabled) -- mask |= 1 << clk->index; -- else -- mask &= ~(1 << clk->index); -- pm_writel(PBB_MASK, mask); -- spin_unlock_irqrestore(&pm_lock, flags); --} -- --static unsigned long pbb_clk_get_rate(struct clk *clk) --{ -- unsigned long cksel, shift = 0; -- -- cksel = pm_readl(CKSEL); -- if (cksel & PM_BIT(PBBDIV)) -- shift = PM_BFEXT(PBBSEL, cksel) + 1; -- -- return bus_clk_get_rate(clk, shift); --} -- --static struct clk cpu_clk = { -- .name = "cpu", -- .get_rate = cpu_clk_get_rate, -- .set_rate = cpu_clk_set_rate, -- .users = 1, --}; --static struct clk hsb_clk = { -- .name = "hsb", -- .parent = &cpu_clk, -- .get_rate = hsb_clk_get_rate, --}; --static struct clk pba_clk = { -- .name = "pba", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = pba_clk_get_rate, -- .index = 1, --}; --static struct clk pbb_clk = { -- .name = "pbb", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .users = 1, -- .index = 2, --}; -- --/* -------------------------------------------------------------------- -- * Generic Clock operations -- * -------------------------------------------------------------------- */ -- --static void genclk_mode(struct clk *clk, int enabled) --{ -- u32 control; -- -- control = pm_readl(GCCTRL(clk->index)); -- if (enabled) -- control |= PM_BIT(CEN); -- else -- control &= ~PM_BIT(CEN); -- pm_writel(GCCTRL(clk->index), control); --} -- --static unsigned long genclk_get_rate(struct clk *clk) --{ -- u32 control; -- unsigned long div = 1; -- -- control = pm_readl(GCCTRL(clk->index)); -- if (control & PM_BIT(DIVEN)) -- div = 2 * (PM_BFEXT(DIV, control) + 1); -- -- return clk->parent->get_rate(clk->parent) / div; --} -- --static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) --{ -- u32 control; -- unsigned long parent_rate, actual_rate, div; -- -- parent_rate = clk->parent->get_rate(clk->parent); -- control = pm_readl(GCCTRL(clk->index)); -- -- if (rate > 3 * parent_rate / 4) { -- actual_rate = parent_rate; -- control &= ~PM_BIT(DIVEN); -- } else { -- div = (parent_rate + rate) / (2 * rate) - 1; -- control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); -- actual_rate = parent_rate / (2 * (div + 1)); -- } -- -- dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -- clk->name, rate, actual_rate); -- -- if (apply) -- pm_writel(GCCTRL(clk->index), control); -- -- return actual_rate; --} -- --int genclk_set_parent(struct clk *clk, struct clk *parent) --{ -- u32 control; -- -- dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -- clk->name, parent->name, clk->parent->name); -- -- control = pm_readl(GCCTRL(clk->index)); -- -- if (parent == &osc1 || parent == &pll1) -- control |= PM_BIT(OSCSEL); -- else if (parent == &osc0 || parent == &pll0) -- control &= ~PM_BIT(OSCSEL); -- else -- return -EINVAL; -- -- if (parent == &pll0 || parent == &pll1) -- control |= PM_BIT(PLLSEL); -- else -- control &= ~PM_BIT(PLLSEL); -- -- pm_writel(GCCTRL(clk->index), control); -- clk->parent = parent; -- -- return 0; --} -- --static void __init genclk_init_parent(struct clk *clk) --{ -- u32 control; -- struct clk *parent; -- -- BUG_ON(clk->index > 7); -- -- control = pm_readl(GCCTRL(clk->index)); -- if (control & PM_BIT(OSCSEL)) -- parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; -- else -- parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; -- -- clk->parent = parent; --} -- --/* -------------------------------------------------------------------- -- * System peripherals -- * -------------------------------------------------------------------- */ --static struct resource at32_pm0_resource[] = { -- { -- .start = 0xfff00000, -- .end = 0xfff0007f, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(20), --}; -- --static struct resource at32ap700x_rtc0_resource[] = { -- { -- .start = 0xfff00080, -- .end = 0xfff000af, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(21), --}; -- --static struct resource at32_wdt0_resource[] = { -- { -- .start = 0xfff000b0, -- .end = 0xfff000bf, -- .flags = IORESOURCE_MEM, -- }, --}; -- --static struct resource at32_eic0_resource[] = { -- { -- .start = 0xfff00100, -- .end = 0xfff0013f, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(19), --}; -- --DEFINE_DEV(at32_pm, 0); --DEFINE_DEV(at32ap700x_rtc, 0); --DEFINE_DEV(at32_wdt, 0); --DEFINE_DEV(at32_eic, 0); -- --/* -- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -- * is always running. -- */ --static struct clk at32_pm_pclk = { -- .name = "pclk", -- .dev = &at32_pm0_device.dev, -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .users = 1, -- .index = 0, --}; -- --static struct resource intc0_resource[] = { -- PBMEM(0xfff00400), --}; --struct platform_device at32_intc0_device = { -- .name = "intc", -- .id = 0, -- .resource = intc0_resource, -- .num_resources = ARRAY_SIZE(intc0_resource), --}; --DEV_CLK(pclk, at32_intc0, pbb, 1); -- --static struct clk ebi_clk = { -- .name = "ebi", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .users = 1, --}; --static struct clk hramc_clk = { -- .name = "hramc", -- .parent = &hsb_clk, -- .mode = hsb_clk_mode, -- .get_rate = hsb_clk_get_rate, -- .users = 1, -- .index = 3, --}; -- --static struct resource smc0_resource[] = { -- PBMEM(0xfff03400), --}; --DEFINE_DEV(smc, 0); --DEV_CLK(pclk, smc0, pbb, 13); --DEV_CLK(mck, smc0, hsb, 0); -- --static struct platform_device pdc_device = { -- .name = "pdc", -- .id = 0, --}; --DEV_CLK(hclk, pdc, hsb, 4); --DEV_CLK(pclk, pdc, pba, 16); -- --static struct clk pico_clk = { -- .name = "pico", -- .parent = &cpu_clk, -- .mode = cpu_clk_mode, -- .get_rate = cpu_clk_get_rate, -- .users = 1, --}; -- --/* -------------------------------------------------------------------- -- * HMATRIX -- * -------------------------------------------------------------------- */ -- --static struct clk hmatrix_clk = { -- .name = "hmatrix_clk", -- .parent = &pbb_clk, -- .mode = pbb_clk_mode, -- .get_rate = pbb_clk_get_rate, -- .index = 2, -- .users = 1, --}; --#define HMATRIX_BASE ((void __iomem *)0xfff00800) -- --#define hmatrix_readl(reg) \ -- __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) --#define hmatrix_writel(reg,value) \ -- __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) -- --/* -- * Set bits in the HMATRIX Special Function Register (SFR) used by the -- * External Bus Interface (EBI). This can be used to enable special -- * features like CompactFlash support, NAND Flash support, etc. on -- * certain chipselects. -- */ --static inline void set_ebi_sfr_bits(u32 mask) --{ -- u32 sfr; -- -- clk_enable(&hmatrix_clk); -- sfr = hmatrix_readl(SFR4); -- sfr |= mask; -- hmatrix_writel(SFR4, sfr); -- clk_disable(&hmatrix_clk); --} -- --/* -------------------------------------------------------------------- -- * System Timer/Counter (TC) -- * -------------------------------------------------------------------- */ --static struct resource at32_systc0_resource[] = { -- PBMEM(0xfff00c00), -- IRQ(22), --}; --struct platform_device at32_systc0_device = { -- .name = "systc", -- .id = 0, -- .resource = at32_systc0_resource, -- .num_resources = ARRAY_SIZE(at32_systc0_resource), --}; --DEV_CLK(pclk, at32_systc0, pbb, 3); -- --/* -------------------------------------------------------------------- -- * PIO -- * -------------------------------------------------------------------- */ -- --static struct resource pio0_resource[] = { -- PBMEM(0xffe02800), -- IRQ(13), --}; --DEFINE_DEV(pio, 0); --DEV_CLK(mck, pio0, pba, 10); -- --static struct resource pio1_resource[] = { -- PBMEM(0xffe02c00), -- IRQ(14), --}; --DEFINE_DEV(pio, 1); --DEV_CLK(mck, pio1, pba, 11); -- --static struct resource pio2_resource[] = { -- PBMEM(0xffe03000), -- IRQ(15), --}; --DEFINE_DEV(pio, 2); --DEV_CLK(mck, pio2, pba, 12); -- --static struct resource pio3_resource[] = { -- PBMEM(0xffe03400), -- IRQ(16), --}; --DEFINE_DEV(pio, 3); --DEV_CLK(mck, pio3, pba, 13); -- --static struct resource pio4_resource[] = { -- PBMEM(0xffe03800), -- IRQ(17), --}; --DEFINE_DEV(pio, 4); --DEV_CLK(mck, pio4, pba, 14); -- --void __init at32_add_system_devices(void) --{ -- platform_device_register(&at32_pm0_device); -- platform_device_register(&at32_intc0_device); -- platform_device_register(&at32ap700x_rtc0_device); -- platform_device_register(&at32_wdt0_device); -- platform_device_register(&at32_eic0_device); -- platform_device_register(&smc0_device); -- platform_device_register(&pdc_device); -- -- platform_device_register(&at32_systc0_device); -- -- platform_device_register(&pio0_device); -- platform_device_register(&pio1_device); -- platform_device_register(&pio2_device); -- platform_device_register(&pio3_device); -- platform_device_register(&pio4_device); --} -- --/* -------------------------------------------------------------------- -- * USART -- * -------------------------------------------------------------------- */ -- --static struct atmel_uart_data atmel_usart0_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart0_resource[] = { -- PBMEM(0xffe00c00), -- IRQ(6), --}; --DEFINE_DEV_DATA(atmel_usart, 0); --DEV_CLK(usart, atmel_usart0, pba, 4); -- --static struct atmel_uart_data atmel_usart1_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart1_resource[] = { -- PBMEM(0xffe01000), -- IRQ(7), --}; --DEFINE_DEV_DATA(atmel_usart, 1); --DEV_CLK(usart, atmel_usart1, pba, 4); -- --static struct atmel_uart_data atmel_usart2_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart2_resource[] = { -- PBMEM(0xffe01400), -- IRQ(8), --}; --DEFINE_DEV_DATA(atmel_usart, 2); --DEV_CLK(usart, atmel_usart2, pba, 5); -- --static struct atmel_uart_data atmel_usart3_data = { -- .use_dma_tx = 1, -- .use_dma_rx = 1, --}; --static struct resource atmel_usart3_resource[] = { -- PBMEM(0xffe01800), -- IRQ(9), --}; --DEFINE_DEV_DATA(atmel_usart, 3); --DEV_CLK(usart, atmel_usart3, pba, 6); -- --static inline void configure_usart0_pins(void) --{ -- select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ -- select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ --} -- --static inline void configure_usart1_pins(void) --{ -- select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ -- select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ --} -- --static inline void configure_usart2_pins(void) --{ -- select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ -- select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ --} -- --static inline void configure_usart3_pins(void) --{ -- select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ -- select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ --} -- --static struct platform_device *__initdata at32_usarts[4]; -- --void __init at32_map_usart(unsigned int hw_id, unsigned int line) --{ -- struct platform_device *pdev; -- -- switch (hw_id) { -- case 0: -- pdev = &atmel_usart0_device; -- configure_usart0_pins(); -- break; -- case 1: -- pdev = &atmel_usart1_device; -- configure_usart1_pins(); -- break; -- case 2: -- pdev = &atmel_usart2_device; -- configure_usart2_pins(); -- break; -- case 3: -- pdev = &atmel_usart3_device; -- configure_usart3_pins(); -- break; -- default: -- return; -- } -- -- if (PXSEG(pdev->resource[0].start) == P4SEG) { -- /* Addresses in the P4 segment are permanently mapped 1:1 */ -- struct atmel_uart_data *data = pdev->dev.platform_data; -- data->regs = (void __iomem *)pdev->resource[0].start; -- } -- -- pdev->id = line; -- at32_usarts[line] = pdev; --} -- --struct platform_device *__init at32_add_device_usart(unsigned int id) --{ -- platform_device_register(at32_usarts[id]); -- return at32_usarts[id]; --} -- --struct platform_device *atmel_default_console_device; -- --void __init at32_setup_serial_console(unsigned int usart_id) --{ -- atmel_default_console_device = at32_usarts[usart_id]; --} -- --/* -------------------------------------------------------------------- -- * Ethernet -- * -------------------------------------------------------------------- */ -- --static struct eth_platform_data macb0_data; --static struct resource macb0_resource[] = { -- PBMEM(0xfff01800), -- IRQ(25), --}; --DEFINE_DEV_DATA(macb, 0); --DEV_CLK(hclk, macb0, hsb, 8); --DEV_CLK(pclk, macb0, pbb, 6); -- --static struct eth_platform_data macb1_data; --static struct resource macb1_resource[] = { -- PBMEM(0xfff01c00), -- IRQ(26), --}; --DEFINE_DEV_DATA(macb, 1); --DEV_CLK(hclk, macb1, hsb, 9); --DEV_CLK(pclk, macb1, pbb, 7); -- --struct platform_device *__init --at32_add_device_eth(unsigned int id, struct eth_platform_data *data) --{ -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &macb0_device; -- -- select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ -- select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ -- select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ -- select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ -- select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ -- select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ -- select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ -- select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ -- select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ -- select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ -- -- if (!data->is_rmii) { -- select_peripheral(PC(0), PERIPH_A, 0); /* COL */ -- select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ -- select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ -- select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ -- select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ -- select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ -- select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ -- select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ -- select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ -- } -- break; -- -- case 1: -- pdev = &macb1_device; -- -- select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ -- select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ -- select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ -- select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ -- select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ -- select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ -- select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ -- select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ -- select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ -- select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ -- -- if (!data->is_rmii) { -- select_peripheral(PC(19), PERIPH_B, 0); /* COL */ -- select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ -- select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ -- select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ -- select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ -- select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ -- select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ -- select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ -- select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ -- } -- break; -- -- default: -- return NULL; -- } -- -- memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); -- platform_device_register(pdev); -- -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * SPI -- * -------------------------------------------------------------------- */ --static struct resource atmel_spi0_resource[] = { -- PBMEM(0xffe00000), -- IRQ(3), --}; --DEFINE_DEV(atmel_spi, 0); --DEV_CLK(spi_clk, atmel_spi0, pba, 0); -- --static struct resource atmel_spi1_resource[] = { -- PBMEM(0xffe00400), -- IRQ(4), --}; --DEFINE_DEV(atmel_spi, 1); --DEV_CLK(spi_clk, atmel_spi1, pba, 1); -- --static void __init --at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, -- unsigned int n, const u8 *pins) --{ -- unsigned int pin, mode; -- -- for (; n; n--, b++) { -- b->bus_num = bus_num; -- if (b->chip_select >= 4) -- continue; -- pin = (unsigned)b->controller_data; -- if (!pin) { -- pin = pins[b->chip_select]; -- b->controller_data = (void *)pin; -- } -- mode = AT32_GPIOF_OUTPUT; -- if (!(b->mode & SPI_CS_HIGH)) -- mode |= AT32_GPIOF_HIGH; -- at32_select_gpio(pin, mode); -- } --} -- --struct platform_device *__init --at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) --{ -- /* -- * Manage the chipselects as GPIOs, normally using the same pins -- * the SPI controller expects; but boards can use other pins. -- */ -- static u8 __initdata spi0_pins[] = -- { GPIO_PIN_PA(3), GPIO_PIN_PA(4), -- GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; -- static u8 __initdata spi1_pins[] = -- { GPIO_PIN_PB(2), GPIO_PIN_PB(3), -- GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &atmel_spi0_device; -- select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ -- select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ -- select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ -- at32_spi_setup_slaves(0, b, n, spi0_pins); -- break; -- -- case 1: -- pdev = &atmel_spi1_device; -- select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ -- select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ -- select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ -- at32_spi_setup_slaves(1, b, n, spi1_pins); -- break; -- -- default: -- return NULL; -- } -- -- spi_register_board_info(b, n); -- platform_device_register(pdev); -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * LCDC -- * -------------------------------------------------------------------- */ --static struct atmel_lcdfb_info atmel_lcdfb0_data; --static struct resource atmel_lcdfb0_resource[] = { -- { -- .start = 0xff000000, -- .end = 0xff000fff, -- .flags = IORESOURCE_MEM, -- }, -- IRQ(1), -- { -- /* Placeholder for pre-allocated fb memory */ -- .start = 0x00000000, -- .end = 0x00000000, -- .flags = 0, -- }, --}; --DEFINE_DEV_DATA(atmel_lcdfb, 0); --DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); --static struct clk atmel_lcdfb0_pixclk = { -- .name = "lcdc_clk", -- .dev = &atmel_lcdfb0_device.dev, -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 7, --}; -- --struct platform_device *__init --at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, -- unsigned long fbmem_start, unsigned long fbmem_len) --{ -- struct platform_device *pdev; -- struct atmel_lcdfb_info *info; -- struct fb_monspecs *monspecs; -- struct fb_videomode *modedb; -- unsigned int modedb_size; -- -- /* -- * Do a deep copy of the fb data, monspecs and modedb. Make -- * sure all allocations are done before setting up the -- * portmux. -- */ -- monspecs = kmemdup(data->default_monspecs, -- sizeof(struct fb_monspecs), GFP_KERNEL); -- if (!monspecs) -- return NULL; -- -- modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; -- modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); -- if (!modedb) -- goto err_dup_modedb; -- monspecs->modedb = modedb; -- -- switch (id) { -- case 0: -- pdev = &atmel_lcdfb0_device; -- select_peripheral(PC(19), PERIPH_A, 0); /* CC */ -- select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ -- select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ -- select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ -- select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ -- select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ -- select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ -- select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ -- select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ -- select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ -- select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ -- select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ -- select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ -- select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ -- select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ -- select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ -- select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ -- select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ -- select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ -- select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ -- select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ -- select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ -- select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ -- select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ -- select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ -- select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ -- select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ -- select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ -- select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ -- select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ -- select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ -- -- clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); -- clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); -- break; -- -- default: -- goto err_invalid_id; -- } -- -- if (fbmem_len) { -- pdev->resource[2].start = fbmem_start; -- pdev->resource[2].end = fbmem_start + fbmem_len - 1; -- pdev->resource[2].flags = IORESOURCE_MEM; -- } -- -- info = pdev->dev.platform_data; -- memcpy(info, data, sizeof(struct atmel_lcdfb_info)); -- info->default_monspecs = monspecs; -- -- platform_device_register(pdev); -- return pdev; -- --err_invalid_id: -- kfree(modedb); --err_dup_modedb: -- kfree(monspecs); -- return NULL; --} -- --/* -------------------------------------------------------------------- -- * SSC -- * -------------------------------------------------------------------- */ --static struct resource ssc0_resource[] = { -- PBMEM(0xffe01c00), -- IRQ(10), --}; --DEFINE_DEV(ssc, 0); --DEV_CLK(pclk, ssc0, pba, 7); -- --static struct resource ssc1_resource[] = { -- PBMEM(0xffe02000), -- IRQ(11), --}; --DEFINE_DEV(ssc, 1); --DEV_CLK(pclk, ssc1, pba, 8); -- --static struct resource ssc2_resource[] = { -- PBMEM(0xffe02400), -- IRQ(12), --}; --DEFINE_DEV(ssc, 2); --DEV_CLK(pclk, ssc2, pba, 9); -- --struct platform_device *__init --at32_add_device_ssc(unsigned int id, unsigned int flags) --{ -- struct platform_device *pdev; -- -- switch (id) { -- case 0: -- pdev = &ssc0_device; -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -- break; -- case 1: -- pdev = &ssc1_device; -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -- break; -- case 2: -- pdev = &ssc2_device; -- if (flags & ATMEL_SSC_TD) -- select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -- if (flags & ATMEL_SSC_RD) -- select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -- if (flags & ATMEL_SSC_TK) -- select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -- if (flags & ATMEL_SSC_TF) -- select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -- if (flags & ATMEL_SSC_RF) -- select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -- if (flags & ATMEL_SSC_RK) -- select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -- break; -- default: -- return NULL; -- } -- -- platform_device_register(pdev); -- return pdev; --} -- --/* -------------------------------------------------------------------- -- * GCLK -- * -------------------------------------------------------------------- */ --static struct clk gclk0 = { -- .name = "gclk0", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 0, --}; --static struct clk gclk1 = { -- .name = "gclk1", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 1, --}; --static struct clk gclk2 = { -- .name = "gclk2", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 2, --}; --static struct clk gclk3 = { -- .name = "gclk3", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 3, --}; --static struct clk gclk4 = { -- .name = "gclk4", -- .mode = genclk_mode, -- .get_rate = genclk_get_rate, -- .set_rate = genclk_set_rate, -- .set_parent = genclk_set_parent, -- .index = 4, --}; -- --struct clk *at32_clock_list[] = { -- &osc32k, -- &osc0, -- &osc1, -- &pll0, -- &pll1, -- &cpu_clk, -- &hsb_clk, -- &pba_clk, -- &pbb_clk, -- &at32_pm_pclk, -- &at32_intc0_pclk, -- &hmatrix_clk, -- &ebi_clk, -- &hramc_clk, -- &smc0_pclk, -- &smc0_mck, -- &pdc_hclk, -- &pdc_pclk, -- &pico_clk, -- &pio0_mck, -- &pio1_mck, -- &pio2_mck, -- &pio3_mck, -- &pio4_mck, -- &at32_systc0_pclk, -- &atmel_usart0_usart, -- &atmel_usart1_usart, -- &atmel_usart2_usart, -- &atmel_usart3_usart, -- &macb0_hclk, -- &macb0_pclk, -- &macb1_hclk, -- &macb1_pclk, -- &atmel_spi0_spi_clk, -- &atmel_spi1_spi_clk, -- &atmel_lcdfb0_hck1, -- &atmel_lcdfb0_pixclk, -- &ssc0_pclk, -- &ssc1_pclk, -- &ssc2_pclk, -- &gclk0, -- &gclk1, -- &gclk2, -- &gclk3, -- &gclk4, --}; --unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); -- --void __init at32_portmux_init(void) --{ -- at32_init_pio(&pio0_device); -- at32_init_pio(&pio1_device); -- at32_init_pio(&pio2_device); -- at32_init_pio(&pio3_device); -- at32_init_pio(&pio4_device); --} -- --void __init at32_clock_init(void) --{ -- u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; -- int i; -- -- if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { -- main_clock = &pll0; -- cpu_clk.parent = &pll0; -- } else { -- main_clock = &osc0; -- cpu_clk.parent = &osc0; -- } -- -- if (pm_readl(PLL0) & PM_BIT(PLLOSC)) -- pll0.parent = &osc1; -- if (pm_readl(PLL1) & PM_BIT(PLLOSC)) -- pll1.parent = &osc1; -- -- genclk_init_parent(&gclk0); -- genclk_init_parent(&gclk1); -- genclk_init_parent(&gclk2); -- genclk_init_parent(&gclk3); -- genclk_init_parent(&gclk4); -- genclk_init_parent(&atmel_lcdfb0_pixclk); -- -- /* -- * Turn on all clocks that have at least one user already, and -- * turn off everything else. We only do this for module -- * clocks, and even though it isn't particularly pretty to -- * check the address of the mode function, it should do the -- * trick... -- */ -- for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { -- struct clk *clk = at32_clock_list[i]; -- -- if (clk->users == 0) -- continue; -- -- if (clk->mode == &cpu_clk_mode) -- cpu_mask |= 1 << clk->index; -- else if (clk->mode == &hsb_clk_mode) -- hsb_mask |= 1 << clk->index; -- else if (clk->mode == &pba_clk_mode) -- pba_mask |= 1 << clk->index; -- else if (clk->mode == &pbb_clk_mode) -- pbb_mask |= 1 << clk->index; -- } -- -- pm_writel(CPU_MASK, cpu_mask); -- pm_writel(HSB_MASK, hsb_mask); -- pm_writel(PBA_MASK, pba_mask); -- pm_writel(PBB_MASK, pbb_mask); --} -diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c -new file mode 100644 -index 0000000..7fd93a5 ---- /dev/null -+++ b/arch/avr32/mach-at32ap/at32ap700x.c -@@ -0,0 +1,1754 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/platform_device.h> -+#include <linux/dma-mapping.h> -+#include <linux/spi/spi.h> -+ -+#include <asm/io.h> -+ -+#include <asm/arch/at32ap700x.h> -+#include <asm/arch/board.h> -+#include <asm/arch/portmux.h> -+ -+#include <video/atmel_lcdc.h> -+ -+#include "clock.h" -+#include "hmatrix.h" -+#include "pio.h" -+#include "pm.h" -+ -+ -+#define PBMEM(base) \ -+ { \ -+ .start = base, \ -+ .end = base + 0x3ff, \ -+ .flags = IORESOURCE_MEM, \ -+ } -+#define IRQ(num) \ -+ { \ -+ .start = num, \ -+ .end = num, \ -+ .flags = IORESOURCE_IRQ, \ -+ } -+#define NAMED_IRQ(num, _name) \ -+ { \ -+ .start = num, \ -+ .end = num, \ -+ .name = _name, \ -+ .flags = IORESOURCE_IRQ, \ -+ } -+ -+/* REVISIT these assume *every* device supports DMA, but several -+ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. -+ */ -+#define DEFINE_DEV(_name, _id) \ -+static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ -+static struct platform_device _name##_id##_device = { \ -+ .name = #_name, \ -+ .id = _id, \ -+ .dev = { \ -+ .dma_mask = &_name##_id##_dma_mask, \ -+ .coherent_dma_mask = DMA_32BIT_MASK, \ -+ }, \ -+ .resource = _name##_id##_resource, \ -+ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ -+} -+#define DEFINE_DEV_DATA(_name, _id) \ -+static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ -+static struct platform_device _name##_id##_device = { \ -+ .name = #_name, \ -+ .id = _id, \ -+ .dev = { \ -+ .dma_mask = &_name##_id##_dma_mask, \ -+ .platform_data = &_name##_id##_data, \ -+ .coherent_dma_mask = DMA_32BIT_MASK, \ -+ }, \ -+ .resource = _name##_id##_resource, \ -+ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ -+} -+ -+#define select_peripheral(pin, periph, flags) \ -+ at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) -+ -+#define DEV_CLK(_name, devname, bus, _index) \ -+static struct clk devname##_##_name = { \ -+ .name = #_name, \ -+ .dev = &devname##_device.dev, \ -+ .parent = &bus##_clk, \ -+ .mode = bus##_clk_mode, \ -+ .get_rate = bus##_clk_get_rate, \ -+ .index = _index, \ -+} -+ -+static DEFINE_SPINLOCK(pm_lock); -+ -+unsigned long at32ap7000_osc_rates[3] = { -+ [0] = 32768, -+ /* FIXME: these are ATSTK1002-specific */ -+ [1] = 20000000, -+ [2] = 12000000, -+}; -+ -+static unsigned long osc_get_rate(struct clk *clk) -+{ -+ return at32ap7000_osc_rates[clk->index]; -+} -+ -+static unsigned long pll_get_rate(struct clk *clk, unsigned long control) -+{ -+ unsigned long div, mul, rate; -+ -+ if (!(control & PM_BIT(PLLEN))) -+ return 0; -+ -+ div = PM_BFEXT(PLLDIV, control) + 1; -+ mul = PM_BFEXT(PLLMUL, control) + 1; -+ -+ rate = clk->parent->get_rate(clk->parent); -+ rate = (rate + div / 2) / div; -+ rate *= mul; -+ -+ return rate; -+} -+ -+static unsigned long pll0_get_rate(struct clk *clk) -+{ -+ u32 control; -+ -+ control = pm_readl(PLL0); -+ -+ return pll_get_rate(clk, control); -+} -+ -+static unsigned long pll1_get_rate(struct clk *clk) -+{ -+ u32 control; -+ -+ control = pm_readl(PLL1); -+ -+ return pll_get_rate(clk, control); -+} -+ -+/* -+ * The AT32AP7000 has five primary clock sources: One 32kHz -+ * oscillator, two crystal oscillators and two PLLs. -+ */ -+static struct clk osc32k = { -+ .name = "osc32k", -+ .get_rate = osc_get_rate, -+ .users = 1, -+ .index = 0, -+}; -+static struct clk osc0 = { -+ .name = "osc0", -+ .get_rate = osc_get_rate, -+ .users = 1, -+ .index = 1, -+}; -+static struct clk osc1 = { -+ .name = "osc1", -+ .get_rate = osc_get_rate, -+ .index = 2, -+}; -+static struct clk pll0 = { -+ .name = "pll0", -+ .get_rate = pll0_get_rate, -+ .parent = &osc0, -+}; -+static struct clk pll1 = { -+ .name = "pll1", -+ .get_rate = pll1_get_rate, -+ .parent = &osc0, -+}; -+ -+/* -+ * The main clock can be either osc0 or pll0. The boot loader may -+ * have chosen one for us, so we don't really know which one until we -+ * have a look at the SM. -+ */ -+static struct clk *main_clock; -+ -+/* -+ * Synchronous clocks are generated from the main clock. The clocks -+ * must satisfy the constraint -+ * fCPU >= fHSB >= fPB -+ * i.e. each clock must not be faster than its parent. -+ */ -+static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) -+{ -+ return main_clock->get_rate(main_clock) >> shift; -+}; -+ -+static void cpu_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(CPU_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(CPU_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long cpu_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(CPUDIV)) -+ shift = PM_BFEXT(CPUSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, child_div, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(CKSEL); -+ -+ if (control & PM_BIT(HSBDIV)) -+ child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); -+ else -+ child_div = 1; -+ -+ if (rate > 3 * (parent_rate / 4) || child_div == 1) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(CPUDIV); -+ } else { -+ unsigned int cpusel; -+ div = (parent_rate + rate / 2) / rate; -+ if (div > child_div) -+ div = child_div; -+ cpusel = (div > 1) ? (fls(div) - 2) : 0; -+ control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); -+ actual_rate = parent_rate / (1 << (cpusel + 1)); -+ } -+ -+ pr_debug("clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(CKSEL, control); -+ -+ return actual_rate; -+} -+ -+static void hsb_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(HSB_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(HSB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long hsb_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(HSBDIV)) -+ shift = PM_BFEXT(HSBSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static void pba_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBA_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(PBA_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long pba_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBADIV)) -+ shift = PM_BFEXT(PBASEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static void pbb_clk_mode(struct clk *clk, int enabled) -+{ -+ unsigned long flags; -+ u32 mask; -+ -+ spin_lock_irqsave(&pm_lock, flags); -+ mask = pm_readl(PBB_MASK); -+ if (enabled) -+ mask |= 1 << clk->index; -+ else -+ mask &= ~(1 << clk->index); -+ pm_writel(PBB_MASK, mask); -+ spin_unlock_irqrestore(&pm_lock, flags); -+} -+ -+static unsigned long pbb_clk_get_rate(struct clk *clk) -+{ -+ unsigned long cksel, shift = 0; -+ -+ cksel = pm_readl(CKSEL); -+ if (cksel & PM_BIT(PBBDIV)) -+ shift = PM_BFEXT(PBBSEL, cksel) + 1; -+ -+ return bus_clk_get_rate(clk, shift); -+} -+ -+static struct clk cpu_clk = { -+ .name = "cpu", -+ .get_rate = cpu_clk_get_rate, -+ .set_rate = cpu_clk_set_rate, -+ .users = 1, -+}; -+static struct clk hsb_clk = { -+ .name = "hsb", -+ .parent = &cpu_clk, -+ .get_rate = hsb_clk_get_rate, -+}; -+static struct clk pba_clk = { -+ .name = "pba", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 1, -+}; -+static struct clk pbb_clk = { -+ .name = "pbb", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .users = 1, -+ .index = 2, -+}; -+ -+/* -------------------------------------------------------------------- -+ * Generic Clock operations -+ * -------------------------------------------------------------------- */ -+ -+static void genclk_mode(struct clk *clk, int enabled) -+{ -+ u32 control; -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (enabled) -+ control |= PM_BIT(CEN); -+ else -+ control &= ~PM_BIT(CEN); -+ pm_writel(GCCTRL(clk->index), control); -+} -+ -+static unsigned long genclk_get_rate(struct clk *clk) -+{ -+ u32 control; -+ unsigned long div = 1; -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(DIVEN)) -+ div = 2 * (PM_BFEXT(DIV, control) + 1); -+ -+ return clk->parent->get_rate(clk->parent) / div; -+} -+ -+static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) -+{ -+ u32 control; -+ unsigned long parent_rate, actual_rate, div; -+ -+ parent_rate = clk->parent->get_rate(clk->parent); -+ control = pm_readl(GCCTRL(clk->index)); -+ -+ if (rate > 3 * parent_rate / 4) { -+ actual_rate = parent_rate; -+ control &= ~PM_BIT(DIVEN); -+ } else { -+ div = (parent_rate + rate) / (2 * rate) - 1; -+ control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); -+ actual_rate = parent_rate / (2 * (div + 1)); -+ } -+ -+ dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", -+ clk->name, rate, actual_rate); -+ -+ if (apply) -+ pm_writel(GCCTRL(clk->index), control); -+ -+ return actual_rate; -+} -+ -+int genclk_set_parent(struct clk *clk, struct clk *parent) -+{ -+ u32 control; -+ -+ dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", -+ clk->name, parent->name, clk->parent->name); -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ -+ if (parent == &osc1 || parent == &pll1) -+ control |= PM_BIT(OSCSEL); -+ else if (parent == &osc0 || parent == &pll0) -+ control &= ~PM_BIT(OSCSEL); -+ else -+ return -EINVAL; -+ -+ if (parent == &pll0 || parent == &pll1) -+ control |= PM_BIT(PLLSEL); -+ else -+ control &= ~PM_BIT(PLLSEL); -+ -+ pm_writel(GCCTRL(clk->index), control); -+ clk->parent = parent; -+ -+ return 0; -+} -+ -+static void __init genclk_init_parent(struct clk *clk) -+{ -+ u32 control; -+ struct clk *parent; -+ -+ BUG_ON(clk->index > 7); -+ -+ control = pm_readl(GCCTRL(clk->index)); -+ if (control & PM_BIT(OSCSEL)) -+ parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; -+ else -+ parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; -+ -+ clk->parent = parent; -+} -+ -+/* -------------------------------------------------------------------- -+ * System peripherals -+ * -------------------------------------------------------------------- */ -+static struct resource at32_pm0_resource[] = { -+ { -+ .start = 0xfff00000, -+ .end = 0xfff0007f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(20), -+}; -+ -+static struct resource at32ap700x_rtc0_resource[] = { -+ { -+ .start = 0xfff00080, -+ .end = 0xfff000af, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(21), -+}; -+ -+static struct resource at32_wdt0_resource[] = { -+ { -+ .start = 0xfff000b0, -+ .end = 0xfff000cf, -+ .flags = IORESOURCE_MEM, -+ }, -+}; -+ -+static struct resource at32_eic0_resource[] = { -+ { -+ .start = 0xfff00100, -+ .end = 0xfff0013f, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(19), -+}; -+ -+DEFINE_DEV(at32_pm, 0); -+DEFINE_DEV(at32ap700x_rtc, 0); -+DEFINE_DEV(at32_wdt, 0); -+DEFINE_DEV(at32_eic, 0); -+ -+/* -+ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this -+ * is always running. -+ */ -+static struct clk at32_pm_pclk = { -+ .name = "pclk", -+ .dev = &at32_pm0_device.dev, -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .users = 1, -+ .index = 0, -+}; -+ -+static struct resource intc0_resource[] = { -+ PBMEM(0xfff00400), -+}; -+struct platform_device at32_intc0_device = { -+ .name = "intc", -+ .id = 0, -+ .resource = intc0_resource, -+ .num_resources = ARRAY_SIZE(intc0_resource), -+}; -+DEV_CLK(pclk, at32_intc0, pbb, 1); -+ -+static struct clk ebi_clk = { -+ .name = "ebi", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .users = 1, -+}; -+static struct clk hramc_clk = { -+ .name = "hramc", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .users = 1, -+ .index = 3, -+}; -+ -+static struct resource smc0_resource[] = { -+ PBMEM(0xfff03400), -+}; -+DEFINE_DEV(smc, 0); -+DEV_CLK(pclk, smc0, pbb, 13); -+DEV_CLK(mck, smc0, hsb, 0); -+ -+static struct platform_device pdc_device = { -+ .name = "pdc", -+ .id = 0, -+}; -+DEV_CLK(hclk, pdc, hsb, 4); -+DEV_CLK(pclk, pdc, pba, 16); -+ -+static struct clk pico_clk = { -+ .name = "pico", -+ .parent = &cpu_clk, -+ .mode = cpu_clk_mode, -+ .get_rate = cpu_clk_get_rate, -+ .users = 1, -+}; -+ -+static struct resource dmaca0_resource[] = { -+ { -+ .start = 0xff200000, -+ .end = 0xff20ffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(2), -+}; -+DEFINE_DEV(dmaca, 0); -+DEV_CLK(hclk, dmaca0, hsb, 10); -+ -+/* -------------------------------------------------------------------- -+ * HMATRIX -+ * -------------------------------------------------------------------- */ -+ -+static struct clk hmatrix_clk = { -+ .name = "hmatrix_clk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 2, -+ .users = 1, -+}; -+#define HMATRIX_BASE ((void __iomem *)0xfff00800) -+ -+#define hmatrix_readl(reg) \ -+ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) -+#define hmatrix_writel(reg,value) \ -+ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) -+ -+/* -+ * Set bits in the HMATRIX Special Function Register (SFR) used by the -+ * External Bus Interface (EBI). This can be used to enable special -+ * features like CompactFlash support, NAND Flash support, etc. on -+ * certain chipselects. -+ */ -+static inline void set_ebi_sfr_bits(u32 mask) -+{ -+ u32 sfr; -+ -+ clk_enable(&hmatrix_clk); -+ sfr = hmatrix_readl(SFR4); -+ sfr |= mask; -+ hmatrix_writel(SFR4, sfr); -+ clk_disable(&hmatrix_clk); -+} -+ -+/* -------------------------------------------------------------------- -+ * System Timer/Counter (TC) -+ * -------------------------------------------------------------------- */ -+static struct resource at32_systc0_resource[] = { -+ PBMEM(0xfff00c00), -+ IRQ(22), -+}; -+struct platform_device at32_systc0_device = { -+ .name = "systc", -+ .id = 0, -+ .resource = at32_systc0_resource, -+ .num_resources = ARRAY_SIZE(at32_systc0_resource), -+}; -+DEV_CLK(pclk, at32_systc0, pbb, 3); -+ -+/* -------------------------------------------------------------------- -+ * PIO -+ * -------------------------------------------------------------------- */ -+ -+static struct resource pio0_resource[] = { -+ PBMEM(0xffe02800), -+ IRQ(13), -+}; -+DEFINE_DEV(pio, 0); -+DEV_CLK(mck, pio0, pba, 10); -+ -+static struct resource pio1_resource[] = { -+ PBMEM(0xffe02c00), -+ IRQ(14), -+}; -+DEFINE_DEV(pio, 1); -+DEV_CLK(mck, pio1, pba, 11); -+ -+static struct resource pio2_resource[] = { -+ PBMEM(0xffe03000), -+ IRQ(15), -+}; -+DEFINE_DEV(pio, 2); -+DEV_CLK(mck, pio2, pba, 12); -+ -+static struct resource pio3_resource[] = { -+ PBMEM(0xffe03400), -+ IRQ(16), -+}; -+DEFINE_DEV(pio, 3); -+DEV_CLK(mck, pio3, pba, 13); -+ -+static struct resource pio4_resource[] = { -+ PBMEM(0xffe03800), -+ IRQ(17), -+}; -+DEFINE_DEV(pio, 4); -+DEV_CLK(mck, pio4, pba, 14); -+ -+void __init at32_add_system_devices(void) -+{ -+ platform_device_register(&at32_pm0_device); -+ platform_device_register(&at32_intc0_device); -+ platform_device_register(&at32ap700x_rtc0_device); -+ platform_device_register(&at32_wdt0_device); -+ platform_device_register(&at32_eic0_device); -+ platform_device_register(&smc0_device); -+ platform_device_register(&pdc_device); -+ platform_device_register(&dmaca0_device); -+ -+ platform_device_register(&at32_systc0_device); -+ -+ platform_device_register(&pio0_device); -+ platform_device_register(&pio1_device); -+ platform_device_register(&pio2_device); -+ platform_device_register(&pio3_device); -+ platform_device_register(&pio4_device); -+} -+ -+/* -------------------------------------------------------------------- -+ * USART -+ * -------------------------------------------------------------------- */ -+ -+static struct atmel_uart_data atmel_usart0_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart0_resource[] = { -+ PBMEM(0xffe00c00), -+ IRQ(6), -+}; -+DEFINE_DEV_DATA(atmel_usart, 0); -+DEV_CLK(usart, atmel_usart0, pba, 4); -+ -+static struct atmel_uart_data atmel_usart1_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart1_resource[] = { -+ PBMEM(0xffe01000), -+ IRQ(7), -+}; -+DEFINE_DEV_DATA(atmel_usart, 1); -+DEV_CLK(usart, atmel_usart1, pba, 4); -+ -+static struct atmel_uart_data atmel_usart2_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart2_resource[] = { -+ PBMEM(0xffe01400), -+ IRQ(8), -+}; -+DEFINE_DEV_DATA(atmel_usart, 2); -+DEV_CLK(usart, atmel_usart2, pba, 5); -+ -+static struct atmel_uart_data atmel_usart3_data = { -+ .use_dma_tx = 1, -+ .use_dma_rx = 1, -+}; -+static struct resource atmel_usart3_resource[] = { -+ PBMEM(0xffe01800), -+ IRQ(9), -+}; -+DEFINE_DEV_DATA(atmel_usart, 3); -+DEV_CLK(usart, atmel_usart3, pba, 6); -+ -+static inline void configure_usart0_pins(void) -+{ -+ select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ -+} -+ -+static inline void configure_usart1_pins(void) -+{ -+ select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ -+ select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ -+} -+ -+static inline void configure_usart2_pins(void) -+{ -+ select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ -+} -+ -+static inline void configure_usart3_pins(void) -+{ -+ select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ -+ select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ -+} -+ -+static struct platform_device *__initdata at32_usarts[4]; -+ -+void __init at32_map_usart(unsigned int hw_id, unsigned int line) -+{ -+ struct platform_device *pdev; -+ -+ switch (hw_id) { -+ case 0: -+ pdev = &atmel_usart0_device; -+ configure_usart0_pins(); -+ break; -+ case 1: -+ pdev = &atmel_usart1_device; -+ configure_usart1_pins(); -+ break; -+ case 2: -+ pdev = &atmel_usart2_device; -+ configure_usart2_pins(); -+ break; -+ case 3: -+ pdev = &atmel_usart3_device; -+ configure_usart3_pins(); -+ break; -+ default: -+ return; -+ } -+ -+ if (PXSEG(pdev->resource[0].start) == P4SEG) { -+ /* Addresses in the P4 segment are permanently mapped 1:1 */ -+ struct atmel_uart_data *data = pdev->dev.platform_data; -+ data->regs = (void __iomem *)pdev->resource[0].start; -+ } -+ -+ pdev->id = line; -+ at32_usarts[line] = pdev; -+} -+ -+struct platform_device *__init at32_add_device_usart(unsigned int id) -+{ -+ platform_device_register(at32_usarts[id]); -+ return at32_usarts[id]; -+} -+ -+struct platform_device *atmel_default_console_device; -+ -+void __init at32_setup_serial_console(unsigned int usart_id) -+{ -+ atmel_default_console_device = at32_usarts[usart_id]; -+} -+ -+/* -------------------------------------------------------------------- -+ * Ethernet -+ * -------------------------------------------------------------------- */ -+ -+#ifdef CONFIG_CPU_AT32AP7000 -+static struct eth_platform_data macb0_data; -+static struct resource macb0_resource[] = { -+ PBMEM(0xfff01800), -+ IRQ(25), -+}; -+DEFINE_DEV_DATA(macb, 0); -+DEV_CLK(hclk, macb0, hsb, 8); -+DEV_CLK(pclk, macb0, pbb, 6); -+ -+static struct eth_platform_data macb1_data; -+static struct resource macb1_resource[] = { -+ PBMEM(0xfff01c00), -+ IRQ(26), -+}; -+DEFINE_DEV_DATA(macb, 1); -+DEV_CLK(hclk, macb1, hsb, 9); -+DEV_CLK(pclk, macb1, pbb, 7); -+ -+struct platform_device *__init -+at32_add_device_eth(unsigned int id, struct eth_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &macb0_device; -+ -+ select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ -+ select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ -+ select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ -+ select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ -+ select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ -+ select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ -+ select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ -+ select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ -+ select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ -+ select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ -+ -+ if (!data->is_rmii) { -+ select_peripheral(PC(0), PERIPH_A, 0); /* COL */ -+ select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ -+ select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ -+ select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ -+ select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ -+ select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ -+ select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ -+ select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ -+ select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ -+ } -+ break; -+ -+ case 1: -+ pdev = &macb1_device; -+ -+ select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ -+ select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ -+ select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ -+ select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ -+ select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ -+ select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ -+ select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ -+ select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ -+ select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ -+ select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ -+ -+ if (!data->is_rmii) { -+ select_peripheral(PC(19), PERIPH_B, 0); /* COL */ -+ select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ -+ select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ -+ select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ -+ select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ -+ select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ -+ select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ -+ select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ -+ select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ -+ } -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); -+ platform_device_register(pdev); -+ -+ return pdev; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * SPI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_spi0_resource[] = { -+ PBMEM(0xffe00000), -+ IRQ(3), -+}; -+DEFINE_DEV(atmel_spi, 0); -+DEV_CLK(spi_clk, atmel_spi0, pba, 0); -+ -+static struct resource atmel_spi1_resource[] = { -+ PBMEM(0xffe00400), -+ IRQ(4), -+}; -+DEFINE_DEV(atmel_spi, 1); -+DEV_CLK(spi_clk, atmel_spi1, pba, 1); -+ -+static void __init -+at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, -+ unsigned int n, const u8 *pins) -+{ -+ unsigned int pin, mode; -+ -+ for (; n; n--, b++) { -+ b->bus_num = bus_num; -+ if (b->chip_select >= 4) -+ continue; -+ pin = (unsigned)b->controller_data; -+ if (!pin) { -+ pin = pins[b->chip_select]; -+ b->controller_data = (void *)pin; -+ } -+ mode = AT32_GPIOF_OUTPUT; -+ if (!(b->mode & SPI_CS_HIGH)) -+ mode |= AT32_GPIOF_HIGH; -+ at32_select_gpio(pin, mode); -+ } -+} -+ -+struct platform_device *__init -+at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) -+{ -+ /* -+ * Manage the chipselects as GPIOs, normally using the same pins -+ * the SPI controller expects; but boards can use other pins. -+ */ -+ static u8 __initdata spi0_pins[] = -+ { GPIO_PIN_PA(3), GPIO_PIN_PA(4), -+ GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; -+ static u8 __initdata spi1_pins[] = -+ { GPIO_PIN_PB(2), GPIO_PIN_PB(3), -+ GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_spi0_device; -+ select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ -+ select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ -+ select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ -+ at32_spi_setup_slaves(0, b, n, spi0_pins); -+ break; -+ -+ case 1: -+ pdev = &atmel_spi1_device; -+ select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ -+ select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ -+ select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ -+ at32_spi_setup_slaves(1, b, n, spi1_pins); -+ break; -+ -+ default: -+ return NULL; -+ } -+ -+ spi_register_board_info(b, n); -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * TWI -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_twi0_resource[] __initdata = { -+ PBMEM(0xffe00800), -+ IRQ(5), -+}; -+static struct clk atmel_twi0_pclk = { -+ .name = "twi_pclk", -+ .parent = &pba_clk, -+ .mode = pba_clk_mode, -+ .get_rate = pba_clk_get_rate, -+ .index = 2, -+}; -+ -+struct platform_device *__init at32_add_device_twi(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_twi", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_twi0_resource, -+ ARRAY_SIZE(atmel_twi0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ -+ select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ -+ -+ atmel_twi0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * MMC -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_mci0_resource[] __initdata = { -+ PBMEM(0xfff02400), -+ IRQ(28), -+}; -+static struct clk atmel_mci0_pclk = { -+ .name = "mci_clk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 9, -+}; -+ -+struct platform_device *__init -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_mci", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_resources(pdev, atmel_mci0_resource, -+ ARRAY_SIZE(atmel_mci0_resource))) -+ goto fail; -+ -+ if (data && platform_device_add_data(pdev, data, -+ sizeof(struct mci_platform_data))) -+ goto fail; -+ -+ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ -+ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ -+ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ -+ -+ if (data) { -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, 0); -+ if (data->wp_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->wp_pin, 0); -+ } -+ -+ atmel_mci0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * LCDC -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+static struct atmel_lcdfb_info atmel_lcdfb0_data; -+static struct resource atmel_lcdfb0_resource[] = { -+ { -+ .start = 0xff000000, -+ .end = 0xff000fff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(1), -+ { -+ /* Placeholder for pre-allocated fb memory */ -+ .start = 0x00000000, -+ .end = 0x00000000, -+ .flags = 0, -+ }, -+}; -+DEFINE_DEV_DATA(atmel_lcdfb, 0); -+DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); -+static struct clk atmel_lcdfb0_pixclk = { -+ .name = "lcdc_clk", -+ .dev = &atmel_lcdfb0_device.dev, -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 7, -+}; -+ -+struct platform_device *__init -+at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, -+ unsigned long fbmem_start, unsigned long fbmem_len) -+{ -+ struct platform_device *pdev; -+ struct atmel_lcdfb_info *info; -+ struct fb_monspecs *monspecs; -+ struct fb_videomode *modedb; -+ unsigned int modedb_size; -+ -+ /* -+ * Do a deep copy of the fb data, monspecs and modedb. Make -+ * sure all allocations are done before setting up the -+ * portmux. -+ */ -+ monspecs = kmemdup(data->default_monspecs, -+ sizeof(struct fb_monspecs), GFP_KERNEL); -+ if (!monspecs) -+ return NULL; -+ -+ modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; -+ modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); -+ if (!modedb) -+ goto err_dup_modedb; -+ monspecs->modedb = modedb; -+ -+ switch (id) { -+ case 0: -+ pdev = &atmel_lcdfb0_device; -+ select_peripheral(PC(19), PERIPH_A, 0); /* CC */ -+ select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ -+ select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ -+ select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ -+ select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ -+ select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ -+ select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ -+ select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ -+ select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ -+ select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ -+ select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ -+ select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ -+ select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ -+ select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ -+ select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ -+ select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ -+ select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ -+ select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ -+ select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ -+ select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ -+ select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ -+ select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ -+ select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ -+ select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ -+ select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ -+ select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ -+ select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ -+ select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ -+ -+ clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); -+ clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); -+ break; -+ -+ default: -+ goto err_invalid_id; -+ } -+ -+ if (fbmem_len) { -+ pdev->resource[2].start = fbmem_start; -+ pdev->resource[2].end = fbmem_start + fbmem_len - 1; -+ pdev->resource[2].flags = IORESOURCE_MEM; -+ } -+ -+ info = pdev->dev.platform_data; -+ memcpy(info, data, sizeof(struct atmel_lcdfb_info)); -+ info->default_monspecs = monspecs; -+ -+ platform_device_register(pdev); -+ return pdev; -+ -+err_invalid_id: -+ kfree(modedb); -+err_dup_modedb: -+ kfree(monspecs); -+ return NULL; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * SSC -+ * -------------------------------------------------------------------- */ -+static struct resource ssc0_resource[] = { -+ PBMEM(0xffe01c00), -+ IRQ(10), -+}; -+DEFINE_DEV(ssc, 0); -+DEV_CLK(pclk, ssc0, pba, 7); -+ -+static struct resource ssc1_resource[] = { -+ PBMEM(0xffe02000), -+ IRQ(11), -+}; -+DEFINE_DEV(ssc, 1); -+DEV_CLK(pclk, ssc1, pba, 8); -+ -+static struct resource ssc2_resource[] = { -+ PBMEM(0xffe02400), -+ IRQ(12), -+}; -+DEFINE_DEV(ssc, 2); -+DEV_CLK(pclk, ssc2, pba, 9); -+ -+struct platform_device *__init -+at32_add_device_ssc(unsigned int id, unsigned int flags) -+{ -+ struct platform_device *pdev; -+ -+ switch (id) { -+ case 0: -+ pdev = &ssc0_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(21), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(22), PERIPH_A, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(23), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(24), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(25), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(26), PERIPH_A, 0); /* RD */ -+ break; -+ case 1: -+ pdev = &ssc1_device; -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PA(0), PERIPH_B, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PA(1), PERIPH_B, 0); /* RK */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PA(2), PERIPH_B, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PA(3), PERIPH_B, 0); /* TF */ -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PA(4), PERIPH_B, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PA(5), PERIPH_B, 0); /* RD */ -+ break; -+ case 2: -+ pdev = &ssc2_device; -+ if (flags & ATMEL_SSC_TD) -+ select_peripheral(PB(13), PERIPH_A, 0); /* TD */ -+ if (flags & ATMEL_SSC_RD) -+ select_peripheral(PB(14), PERIPH_A, 0); /* RD */ -+ if (flags & ATMEL_SSC_TK) -+ select_peripheral(PB(15), PERIPH_A, 0); /* TK */ -+ if (flags & ATMEL_SSC_TF) -+ select_peripheral(PB(16), PERIPH_A, 0); /* TF */ -+ if (flags & ATMEL_SSC_RF) -+ select_peripheral(PB(17), PERIPH_A, 0); /* RF */ -+ if (flags & ATMEL_SSC_RK) -+ select_peripheral(PB(18), PERIPH_A, 0); /* RK */ -+ break; -+ default: -+ return NULL; -+ } -+ -+ platform_device_register(pdev); -+ return pdev; -+} -+ -+/* -------------------------------------------------------------------- -+ * USB Device Controller -+ * -------------------------------------------------------------------- */ -+static struct resource usba0_resource[] __initdata = { -+ { -+ .start = 0xff300000, -+ .end = 0xff3fffff, -+ .flags = IORESOURCE_MEM, -+ }, { -+ .start = 0xfff03000, -+ .end = 0xfff033ff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(31), -+}; -+static struct clk usba0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 12, -+}; -+static struct clk usba0_hclk = { -+ .name = "hclk", -+ .parent = &hsb_clk, -+ .mode = hsb_clk_mode, -+ .get_rate = hsb_clk_get_rate, -+ .index = 6, -+}; -+ -+struct platform_device *__init -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_usba_udc", 0); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, usba0_resource, -+ ARRAY_SIZE(usba0_resource))) -+ goto out_free_pdev; -+ -+ if (data) { -+ if (platform_device_add_data(pdev, data, sizeof(*data))) -+ goto out_free_pdev; -+ -+ if (data->vbus_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vbus_pin, 0); -+ } -+ -+ usba0_pclk.dev = &pdev->dev; -+ usba0_hclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ -+ return pdev; -+ -+out_free_pdev: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * IDE / CompactFlash -+ * -------------------------------------------------------------------- */ -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001) -+static struct resource at32_smc_cs4_resource[] __initdata = { -+ { -+ .start = 0x04000000, -+ .end = 0x07ffffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(~0UL), /* Magic IRQ will be overridden */ -+}; -+static struct resource at32_smc_cs5_resource[] __initdata = { -+ { -+ .start = 0x20000000, -+ .end = 0x23ffffff, -+ .flags = IORESOURCE_MEM, -+ }, -+ IRQ(~0UL), /* Magic IRQ will be overridden */ -+}; -+ -+static int __init at32_init_ide_or_cf(struct platform_device *pdev, -+ unsigned int cs, unsigned int extint) -+{ -+ static unsigned int extint_pin_map[4] __initdata = { -+ GPIO_PIN_PB(25), -+ GPIO_PIN_PB(26), -+ GPIO_PIN_PB(27), -+ GPIO_PIN_PB(28), -+ }; -+ static bool common_pins_initialized __initdata = false; -+ unsigned int extint_pin; -+ int ret; -+ -+ if (extint >= ARRAY_SIZE(extint_pin_map)) -+ return -EINVAL; -+ extint_pin = extint_pin_map[extint]; -+ -+ switch (cs) { -+ case 4: -+ ret = platform_device_add_resources(pdev, -+ at32_smc_cs4_resource, -+ ARRAY_SIZE(at32_smc_cs4_resource)); -+ if (ret) -+ return ret; -+ -+ select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ -+ set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); -+ break; -+ case 5: -+ ret = platform_device_add_resources(pdev, -+ at32_smc_cs5_resource, -+ ARRAY_SIZE(at32_smc_cs5_resource)); -+ if (ret) -+ return ret; -+ -+ select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ -+ set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (!common_pins_initialized) { -+ select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ -+ select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ -+ select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ -+ select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ -+ common_pins_initialized = true; -+ } -+ -+ at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); -+ -+ pdev->resource[1].start = EIM_IRQ_BASE + extint; -+ pdev->resource[1].end = pdev->resource[1].start; -+ -+ return 0; -+} -+ -+struct platform_device *__init -+at32_add_device_ide(unsigned int id, unsigned int extint, -+ struct ide_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ pdev = platform_device_alloc("at32_ide", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct ide_platform_data))) -+ goto fail; -+ -+ if (at32_init_ide_or_cf(pdev, data->cs, extint)) -+ goto fail; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+struct platform_device *__init -+at32_add_device_cf(unsigned int id, unsigned int extint, -+ struct cf_platform_data *data) -+{ -+ struct platform_device *pdev; -+ -+ pdev = platform_device_alloc("at32_cf", id); -+ if (!pdev) -+ goto fail; -+ -+ if (platform_device_add_data(pdev, data, -+ sizeof(struct cf_platform_data))) -+ goto fail; -+ -+ if (at32_init_ide_or_cf(pdev, data->cs, extint)) -+ goto fail; -+ -+ if (data->detect_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); -+ if (data->reset_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->reset_pin, 0); -+ if (data->vcc_pin != GPIO_PIN_NONE) -+ at32_select_gpio(data->vcc_pin, 0); -+ /* READY is used as extint, so we can't select it as gpio */ -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+fail: -+ platform_device_put(pdev); -+ return NULL; -+} -+#endif -+ -+/* -------------------------------------------------------------------- -+ * AC97C -+ * -------------------------------------------------------------------- */ -+static struct resource atmel_ac97c0_resource[] __initdata = { -+ PBMEM(0xfff02800), -+ IRQ(29), -+}; -+static struct clk atmel_ac97c0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 10, -+}; -+ -+struct platform_device *__init at32_add_device_ac97c(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("atmel_ac97c", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, atmel_ac97c0_resource, -+ ARRAY_SIZE(atmel_ac97c0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -+ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -+ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -+ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -+ -+ atmel_ac97c0_pclk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * ABDAC -+ * -------------------------------------------------------------------- */ -+static struct resource abdac0_resource[] __initdata = { -+ PBMEM(0xfff02000), -+ IRQ(27), -+}; -+static struct clk abdac0_pclk = { -+ .name = "pclk", -+ .parent = &pbb_clk, -+ .mode = pbb_clk_mode, -+ .get_rate = pbb_clk_get_rate, -+ .index = 8, -+}; -+static struct clk abdac0_sample_clk = { -+ .name = "sample_clk", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 6, -+}; -+ -+struct platform_device *__init at32_add_device_abdac(unsigned int id) -+{ -+ struct platform_device *pdev; -+ -+ if (id != 0) -+ return NULL; -+ -+ pdev = platform_device_alloc("abdac", id); -+ if (!pdev) -+ return NULL; -+ -+ if (platform_device_add_resources(pdev, abdac0_resource, -+ ARRAY_SIZE(abdac0_resource))) -+ goto err_add_resources; -+ -+ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ -+ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ -+ -+ abdac0_pclk.dev = &pdev->dev; -+ abdac0_sample_clk.dev = &pdev->dev; -+ -+ platform_device_add(pdev); -+ return pdev; -+ -+err_add_resources: -+ platform_device_put(pdev); -+ return NULL; -+} -+ -+/* -------------------------------------------------------------------- -+ * GCLK -+ * -------------------------------------------------------------------- */ -+static struct clk gclk0 = { -+ .name = "gclk0", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 0, -+}; -+static struct clk gclk1 = { -+ .name = "gclk1", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 1, -+}; -+static struct clk gclk2 = { -+ .name = "gclk2", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 2, -+}; -+static struct clk gclk3 = { -+ .name = "gclk3", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 3, -+}; -+static struct clk gclk4 = { -+ .name = "gclk4", -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 4, -+}; -+ -+struct clk *at32_clock_list[] = { -+ &osc32k, -+ &osc0, -+ &osc1, -+ &pll0, -+ &pll1, -+ &cpu_clk, -+ &hsb_clk, -+ &pba_clk, -+ &pbb_clk, -+ &at32_pm_pclk, -+ &at32_intc0_pclk, -+ &hmatrix_clk, -+ &ebi_clk, -+ &hramc_clk, -+ &smc0_pclk, -+ &smc0_mck, -+ &pdc_hclk, -+ &pdc_pclk, -+ &dmaca0_hclk, -+ &pico_clk, -+ &pio0_mck, -+ &pio1_mck, -+ &pio2_mck, -+ &pio3_mck, -+ &pio4_mck, -+ &at32_systc0_pclk, -+ &atmel_usart0_usart, -+ &atmel_usart1_usart, -+ &atmel_usart2_usart, -+ &atmel_usart3_usart, -+#if defined(CONFIG_CPU_AT32AP7000) -+ &macb0_hclk, -+ &macb0_pclk, -+ &macb1_hclk, -+ &macb1_pclk, -+#endif -+ &atmel_spi0_spi_clk, -+ &atmel_spi1_spi_clk, -+ &atmel_twi0_pclk, -+ &atmel_mci0_pclk, -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+ &atmel_lcdfb0_hck1, -+ &atmel_lcdfb0_pixclk, -+#endif -+ &ssc0_pclk, -+ &ssc1_pclk, -+ &ssc2_pclk, -+ &usba0_hclk, -+ &usba0_pclk, -+ &atmel_ac97c0_pclk, -+ &abdac0_pclk, -+ &abdac0_sample_clk, -+ &gclk0, -+ &gclk1, -+ &gclk2, -+ &gclk3, -+ &gclk4, -+}; -+unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); -+ -+void __init at32_portmux_init(void) -+{ -+ at32_init_pio(&pio0_device); -+ at32_init_pio(&pio1_device); -+ at32_init_pio(&pio2_device); -+ at32_init_pio(&pio3_device); -+ at32_init_pio(&pio4_device); -+} -+ -+void __init at32_clock_init(void) -+{ -+ u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; -+ int i; -+ -+ if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { -+ main_clock = &pll0; -+ cpu_clk.parent = &pll0; -+ } else { -+ main_clock = &osc0; -+ cpu_clk.parent = &osc0; -+ } -+ -+ if (pm_readl(PLL0) & PM_BIT(PLLOSC)) -+ pll0.parent = &osc1; -+ if (pm_readl(PLL1) & PM_BIT(PLLOSC)) -+ pll1.parent = &osc1; -+ -+ genclk_init_parent(&gclk0); -+ genclk_init_parent(&gclk1); -+ genclk_init_parent(&gclk2); -+ genclk_init_parent(&gclk3); -+ genclk_init_parent(&gclk4); -+#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) -+ genclk_init_parent(&atmel_lcdfb0_pixclk); -+#endif -+ genclk_init_parent(&abdac0_sample_clk); -+ -+ /* -+ * Turn on all clocks that have at least one user already, and -+ * turn off everything else. We only do this for module -+ * clocks, and even though it isn't particularly pretty to -+ * check the address of the mode function, it should do the -+ * trick... -+ */ -+ for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { -+ struct clk *clk = at32_clock_list[i]; -+ -+ if (clk->users == 0) -+ continue; -+ -+ if (clk->mode == &cpu_clk_mode) -+ cpu_mask |= 1 << clk->index; -+ else if (clk->mode == &hsb_clk_mode) -+ hsb_mask |= 1 << clk->index; -+ else if (clk->mode == &pba_clk_mode) -+ pba_mask |= 1 << clk->index; -+ else if (clk->mode == &pbb_clk_mode) -+ pbb_mask |= 1 << clk->index; -+ } -+ -+ pm_writel(CPU_MASK, cpu_mask); -+ pm_writel(HSB_MASK, hsb_mask); -+ pm_writel(PBA_MASK, pba_mask); -+ pm_writel(PBB_MASK, pbb_mask); -+} -diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c -index 0f8c89c..4642117 100644 ---- a/arch/avr32/mach-at32ap/clock.c -+++ b/arch/avr32/mach-at32ap/clock.c -@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk) - return clk->parent; - } - EXPORT_SYMBOL(clk_get_parent); -+ -+ -+ -+#ifdef CONFIG_DEBUG_FS -+ -+/* /sys/kernel/debug/at32ap_clk */ -+ -+#include <linux/io.h> -+#include <linux/debugfs.h> -+#include <linux/seq_file.h> -+#include "pm.h" -+ -+ -+#define NEST_DELTA 2 -+#define NEST_MAX 6 -+ -+struct clkinf { -+ struct seq_file *s; -+ unsigned nest; -+}; -+ -+static void -+dump_clock(struct clk *parent, struct clkinf *r) -+{ -+ unsigned nest = r->nest; -+ char buf[16 + NEST_MAX]; -+ struct clk *clk; -+ unsigned i; -+ -+ /* skip clocks coupled to devices that aren't registered */ -+ if (parent->dev && !parent->dev->bus_id[0] && !parent->users) -+ return; -+ -+ /* <nest spaces> name <pad to end> */ -+ memset(buf, ' ', sizeof(buf) - 1); -+ buf[sizeof(buf) - 1] = 0; -+ i = strlen(parent->name); -+ memcpy(buf + nest, parent->name, -+ min(i, (unsigned)(sizeof(buf) - 1 - nest))); -+ -+ seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz", -+ buf, parent->set_parent ? '*' : ' ', -+ parent->users, -+ parent->users ? "on" : "off", /* NOTE: not-paranoid!! */ -+ clk_get_rate(parent)); -+ if (parent->dev) -+ seq_printf(r->s, ", for %s", parent->dev->bus_id); -+ seq_printf(r->s, "\n"); -+ -+ /* cost of this scan is small, but not linear... */ -+ r->nest = nest + NEST_DELTA; -+ for (i = 3; i < at32_nr_clocks; i++) { -+ clk = at32_clock_list[i]; -+ if (clk->parent == parent) -+ dump_clock(clk, r); -+ } -+ r->nest = nest; -+} -+ -+static int clk_show(struct seq_file *s, void *unused) -+{ -+ struct clkinf r; -+ int i; -+ -+ /* show all the power manager registers */ -+ seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL)); -+ seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL)); -+ seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK)); -+ seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK)); -+ seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK)); -+ seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK)); -+ seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0)); -+ seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1)); -+ seq_printf(s, "IMR = %8x\n", pm_readl(IMR)); -+ for (i = 0; i < 8; i++) { -+ if (i == 5) -+ continue; -+ seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i))); -+ } -+ -+ seq_printf(s, "\n"); -+ -+ /* show clock tree as derived from the three oscillators -+ * we "know" are at the head of the list -+ */ -+ r.s = s; -+ r.nest = 0; -+ dump_clock(at32_clock_list[0], &r); -+ dump_clock(at32_clock_list[1], &r); -+ dump_clock(at32_clock_list[2], &r); -+ -+ return 0; -+} -+ -+static int clk_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, clk_show, NULL); -+} -+ -+static const struct file_operations clk_operations = { -+ .open = clk_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+static int __init clk_debugfs_init(void) -+{ -+ (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO, -+ NULL, NULL, &clk_operations); -+ -+ return 0; -+} -+postcore_initcall(clk_debugfs_init); -+ -+#endif -diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c -new file mode 100644 -index 0000000..8cf6d11 ---- /dev/null -+++ b/arch/avr32/mach-at32ap/gpio-dev.c -@@ -0,0 +1,573 @@ -+/* -+ * GPIO /dev and configfs interface -+ * -+ * Copyright (C) 2006-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/kernel.h> -+#include <linux/configfs.h> -+#include <linux/cdev.h> -+#include <linux/device.h> -+#include <linux/fs.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/poll.h> -+#include <linux/uaccess.h> -+#include <linux/wait.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/portmux.h> -+ -+#define GPIO_DEV_MAX 8 -+ -+static struct class *gpio_dev_class; -+static dev_t gpio_devt; -+ -+struct gpio_item { -+ spinlock_t lock; -+ -+ int enabled; -+ int initialized; -+ int port; -+ u32 pin_mask; -+ u32 oe_mask; -+ -+ /* Pin state last time we read it (for blocking reads) */ -+ u32 pin_state; -+ int changed; -+ -+ wait_queue_head_t change_wq; -+ struct fasync_struct *async_queue; -+ -+ int id; -+ struct class_device *gpio_dev; -+ struct cdev char_dev; -+ struct config_item item; -+}; -+ -+struct gpio_attribute { -+ struct configfs_attribute attr; -+ ssize_t (*show)(struct gpio_item *, char *); -+ ssize_t (*store)(struct gpio_item *, const char *, size_t); -+}; -+ -+static irqreturn_t gpio_dev_interrupt(int irq, void *dev_id) -+{ -+ struct gpio_item *gpio = dev_id; -+ u32 old_state, new_state; -+ -+ old_state = gpio->pin_state; -+ new_state = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ gpio->pin_state = new_state; -+ -+ if (new_state != old_state) { -+ gpio->changed = 1; -+ wake_up_interruptible(&gpio->change_wq); -+ -+ if (gpio->async_queue) -+ kill_fasync(&gpio->async_queue, SIGIO, POLL_IN); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int gpio_dev_open(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = container_of(inode->i_cdev, -+ struct gpio_item, -+ char_dev); -+ unsigned int irq; -+ unsigned int i; -+ int ret; -+ -+ nonseekable_open(inode, file); -+ config_item_get(&gpio->item); -+ file->private_data = gpio; -+ -+ gpio->pin_state = at32_gpio_get_value_multiple(gpio->port, -+ gpio->pin_mask); -+ gpio->changed = 1; -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ ret = request_irq(irq, gpio_dev_interrupt, 0, -+ "gpio-dev", gpio); -+ if (ret) -+ goto err_irq; -+ } -+ } -+ -+ return 0; -+ -+err_irq: -+ while (i--) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return ret; -+} -+ -+static int gpio_dev_fasync(int fd, struct file *file, int mode) -+{ -+ struct gpio_item *gpio = file->private_data; -+ -+ return fasync_helper(fd, file, mode, &gpio->async_queue); -+} -+ -+static int gpio_dev_release(struct inode *inode, struct file *file) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int irq; -+ unsigned int i; -+ -+ gpio_dev_fasync(-1, file, 0); -+ -+ for (i = 0; i < 32; i++) { -+ if (gpio->pin_mask & (1 << i)) { -+ irq = gpio_to_irq(32 * gpio->port + i); -+ free_irq(irq, gpio); -+ } -+ } -+ -+ config_item_put(&gpio->item); -+ -+ return 0; -+} -+ -+static unsigned int gpio_dev_poll(struct file *file, poll_table *wait) -+{ -+ struct gpio_item *gpio = file->private_data; -+ unsigned int mask = 0; -+ -+ poll_wait(file, &gpio->change_wq, wait); -+ if (gpio->changed) -+ mask |= POLLIN | POLLRDNORM; -+ -+ return mask; -+} -+ -+static ssize_t gpio_dev_read(struct file *file, char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value; -+ -+ spin_lock_irq(&gpio->lock); -+ while (!gpio->changed) { -+ spin_unlock_irq(&gpio->lock); -+ -+ if (file->f_flags & O_NONBLOCK) -+ return -EAGAIN; -+ -+ if (wait_event_interruptible(gpio->change_wq, gpio->changed)) -+ return -ERESTARTSYS; -+ -+ spin_lock_irq(&gpio->lock); -+ } -+ -+ gpio->changed = 0; -+ value = at32_gpio_get_value_multiple(gpio->port, gpio->pin_mask); -+ -+ spin_unlock_irq(&gpio->lock); -+ -+ count = min(count, (size_t)4); -+ if (copy_to_user(buf, &value, count)) -+ return -EFAULT; -+ -+ return count; -+} -+ -+static ssize_t gpio_dev_write(struct file *file, const char __user *buf, -+ size_t count, loff_t *offset) -+{ -+ struct gpio_item *gpio = file->private_data; -+ u32 value = 0; -+ u32 mask = ~0UL; -+ -+ count = min(count, (size_t)4); -+ if (copy_from_user(&value, buf, count)) -+ return -EFAULT; -+ -+ /* Assuming big endian */ -+ mask <<= (4 - count) * 8; -+ mask &= gpio->pin_mask; -+ -+ at32_gpio_set_value_multiple(gpio->port, value, mask); -+ -+ return count; -+} -+ -+static struct file_operations gpio_dev_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .open = gpio_dev_open, -+ .release = gpio_dev_release, -+ .fasync = gpio_dev_fasync, -+ .poll = gpio_dev_poll, -+ .read = gpio_dev_read, -+ .write = gpio_dev_write, -+}; -+ -+static struct gpio_item *to_gpio_item(struct config_item *item) -+{ -+ return item ? container_of(item, struct gpio_item, item) : NULL; -+} -+ -+static ssize_t gpio_show_gpio_id(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->port); -+} -+ -+static ssize_t gpio_store_gpio_id(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ unsigned long id; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ id = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Switching PIO is not allowed when live... */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ ret = -ENXIO; -+ if (at32_gpio_port_is_valid(id)) { -+ gpio->port = id; -+ ret = count; -+ } -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_pin_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->pin_mask); -+} -+ -+static ssize_t gpio_store_pin_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 new_mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ new_mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* Can't update the pin mask while live. */ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask &= new_mask; -+ gpio->pin_mask = new_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_oe_mask(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "0x%08x\n", gpio->oe_mask); -+} -+ -+static ssize_t gpio_store_oe_mask(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ u32 mask; -+ char *p = (char *)page; -+ ssize_t ret = -EINVAL; -+ -+ mask = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ spin_lock(&gpio->lock); -+ if (!gpio->enabled) { -+ gpio->oe_mask = mask & gpio->pin_mask; -+ ret = count; -+ } -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static ssize_t gpio_show_enabled(struct gpio_item *gpio, char *page) -+{ -+ return sprintf(page, "%d\n", gpio->enabled); -+} -+ -+static ssize_t gpio_store_enabled(struct gpio_item *gpio, -+ const char *page, size_t count) -+{ -+ char *p = (char *)page; -+ int enabled; -+ int ret; -+ -+ enabled = simple_strtoul(p, &p, 0); -+ if (!p || (*p && (*p != '\n'))) -+ return -EINVAL; -+ -+ /* make it a boolean value */ -+ enabled = !!enabled; -+ -+ if (gpio->enabled == enabled) -+ /* No change; do nothing. */ -+ return count; -+ -+ BUG_ON(gpio->id >= GPIO_DEV_MAX); -+ -+ if (!enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ } else { -+ if (gpio->port < 0 || !gpio->pin_mask) -+ return -ENODEV; -+ } -+ -+ /* Disallow any updates to gpio_id or pin_mask */ -+ spin_lock(&gpio->lock); -+ gpio->enabled = enabled; -+ spin_unlock(&gpio->lock); -+ -+ if (!enabled) -+ return count; -+ -+ /* Now, try to allocate the pins */ -+ ret = at32_select_gpio_pins(gpio->port, gpio->pin_mask, gpio->oe_mask); -+ if (ret) -+ goto err_alloc_pins; -+ -+ gpio->initialized = 1; -+ -+ cdev_init(&gpio->char_dev, &gpio_dev_fops); -+ gpio->char_dev.owner = THIS_MODULE; -+ ret = cdev_add(&gpio->char_dev, MKDEV(MAJOR(gpio_devt), gpio->id), 1); -+ if (ret < 0) -+ goto err_cdev_add; -+ gpio->gpio_dev = class_device_create(gpio_dev_class, NULL, -+ MKDEV(MAJOR(gpio_devt), gpio->id), -+ NULL, -+ "gpio%d", gpio->id); -+ if (IS_ERR(gpio->gpio_dev)) { -+ printk(KERN_ERR "failed to create gpio%d\n", gpio->id); -+ ret = PTR_ERR(gpio->gpio_dev); -+ goto err_class_dev; -+ } -+ -+ printk(KERN_INFO "created gpio%d (port%d/0x%08x) as (%d:%d)\n", -+ gpio->id, gpio->port, gpio->pin_mask, -+ MAJOR(gpio->gpio_dev->devt), MINOR(gpio->gpio_dev->devt)); -+ -+ return 0; -+ -+err_class_dev: -+ cdev_del(&gpio->char_dev); -+err_cdev_add: -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+err_alloc_pins: -+ spin_lock(&gpio->lock); -+ gpio->enabled = 0; -+ spin_unlock(&gpio->lock); -+ -+ return ret; -+} -+ -+static struct gpio_attribute gpio_item_attr_gpio_id = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "gpio_id", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_gpio_id, -+ .store = gpio_store_gpio_id, -+}; -+static struct gpio_attribute gpio_item_attr_pin_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "pin_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_pin_mask, -+ .store = gpio_store_pin_mask, -+}; -+static struct gpio_attribute gpio_item_attr_oe_mask = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "oe_mask", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_oe_mask, -+ .store = gpio_store_oe_mask, -+}; -+static struct gpio_attribute gpio_item_attr_enabled = { -+ .attr = { -+ .ca_owner = THIS_MODULE, -+ .ca_name = "enabled", -+ .ca_mode = S_IRUGO | S_IWUSR, -+ }, -+ .show = gpio_show_enabled, -+ .store = gpio_store_enabled, -+}; -+ -+static struct configfs_attribute *gpio_item_attrs[] = { -+ &gpio_item_attr_gpio_id.attr, -+ &gpio_item_attr_pin_mask.attr, -+ &gpio_item_attr_oe_mask.attr, -+ &gpio_item_attr_enabled.attr, -+ NULL, -+}; -+ -+static ssize_t gpio_show_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ char *page) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = 0; -+ -+ if (gpio_attr->show) -+ ret = gpio_attr->show(gpio_item, page); -+ return ret; -+} -+ -+static ssize_t gpio_store_attr(struct config_item *item, -+ struct configfs_attribute *attr, -+ const char *page, size_t count) -+{ -+ struct gpio_item *gpio_item = to_gpio_item(item); -+ struct gpio_attribute *gpio_attr -+ = container_of(attr, struct gpio_attribute, attr); -+ ssize_t ret = -EINVAL; -+ -+ if (gpio_attr->store) -+ ret = gpio_attr->store(gpio_item, page, count); -+ return ret; -+} -+ -+static void gpio_release(struct config_item *item) -+{ -+ kfree(to_gpio_item(item)); -+} -+ -+static struct configfs_item_operations gpio_item_ops = { -+ .release = gpio_release, -+ .show_attribute = gpio_show_attr, -+ .store_attribute = gpio_store_attr, -+}; -+ -+static struct config_item_type gpio_item_type = { -+ .ct_item_ops = &gpio_item_ops, -+ .ct_attrs = gpio_item_attrs, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct config_item *gpio_make_item(struct config_group *group, -+ const char *name) -+{ -+ static int next_id; -+ struct gpio_item *gpio; -+ -+ if (next_id >= GPIO_DEV_MAX) -+ return NULL; -+ -+ gpio = kzalloc(sizeof(struct gpio_item), GFP_KERNEL); -+ if (!gpio) -+ return NULL; -+ -+ gpio->id = next_id++; -+ config_item_init_type_name(&gpio->item, name, &gpio_item_type); -+ spin_lock_init(&gpio->lock); -+ init_waitqueue_head(&gpio->change_wq); -+ -+ return &gpio->item; -+} -+ -+static void gpio_drop_item(struct config_group *group, -+ struct config_item *item) -+{ -+ struct gpio_item *gpio = to_gpio_item(item); -+ -+ spin_lock(&gpio->lock); -+ if (gpio->enabled) { -+ class_device_unregister(gpio->gpio_dev); -+ cdev_del(&gpio->char_dev); -+ } -+ -+ if (gpio->initialized) { -+ at32_deselect_pins(gpio->port, gpio->pin_mask); -+ gpio->initialized = 0; -+ gpio->enabled = 0; -+ } -+ spin_unlock(&gpio->lock); -+} -+ -+static struct configfs_group_operations gpio_group_ops = { -+ .make_item = gpio_make_item, -+ .drop_item = gpio_drop_item, -+}; -+ -+static struct config_item_type gpio_group_type = { -+ .ct_group_ops = &gpio_group_ops, -+ .ct_owner = THIS_MODULE, -+}; -+ -+static struct configfs_subsystem gpio_subsys = { -+ .su_group = { -+ .cg_item = { -+ .ci_namebuf = "gpio", -+ .ci_type = &gpio_group_type, -+ }, -+ }, -+}; -+ -+static int __init gpio_dev_init(void) -+{ -+ int err; -+ -+ gpio_dev_class = class_create(THIS_MODULE, "gpio-dev"); -+ if (IS_ERR(gpio_dev_class)) { -+ err = PTR_ERR(gpio_dev_class); -+ goto err_class_create; -+ } -+ -+ err = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpio"); -+ if (err < 0) -+ goto err_alloc_chrdev; -+ -+ /* Configfs initialization */ -+ config_group_init(&gpio_subsys.su_group); -+ mutex_init(&gpio_subsys.su_mutex); -+ err = configfs_register_subsystem(&gpio_subsys); -+ if (err) -+ goto err_register_subsys; -+ -+ return 0; -+ -+err_register_subsys: -+ unregister_chrdev_region(gpio_devt, GPIO_DEV_MAX); -+err_alloc_chrdev: -+ class_destroy(gpio_dev_class); -+err_class_create: -+ printk(KERN_WARNING "Failed to initialize gpio /dev interface\n"); -+ return err; -+} -+late_initcall(gpio_dev_init); -diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c -index 5e22a75..704607f 100644 ---- a/arch/avr32/mach-at32ap/hsmc.c -+++ b/arch/avr32/mach-at32ap/hsmc.c -@@ -29,16 +29,25 @@ struct hsmc { - - static struct hsmc *hsmc; - --int smc_set_configuration(int cs, const struct smc_config *config) -+void smc_set_timing(struct smc_config *config, -+ const struct smc_timing *timing) - { -+ int recover; -+ int cycle; -+ - unsigned long mul; -- unsigned long offset; -- u32 setup, pulse, cycle, mode; - -- if (!hsmc) -- return -ENODEV; -- if (cs >= NR_CHIP_SELECTS) -- return -EINVAL; -+ /* Reset all SMC timings */ -+ config->ncs_read_setup = 0; -+ config->nrd_setup = 0; -+ config->ncs_write_setup = 0; -+ config->nwe_setup = 0; -+ config->ncs_read_pulse = 0; -+ config->nrd_pulse = 0; -+ config->ncs_write_pulse = 0; -+ config->nwe_pulse = 0; -+ config->read_cycle = 0; -+ config->write_cycle = 0; - - /* - * cycles = x / T = x * f -@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config) - - #define ns2cyc(x) ((((x) * mul) + 65535) >> 16) - -- setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup)) -- | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup)) -- | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup)) -- | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup))); -- pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse)) -- | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse)) -- | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse)) -- | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse))); -- cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle)) -- | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle))); -+ if (timing->ncs_read_setup > 0) -+ config->ncs_read_setup = ns2cyc(timing->ncs_read_setup); -+ -+ if (timing->nrd_setup > 0) -+ config->nrd_setup = ns2cyc(timing->nrd_setup); -+ -+ if (timing->ncs_write_setup > 0) -+ config->ncs_write_setup = ns2cyc(timing->ncs_write_setup); -+ -+ if (timing->nwe_setup > 0) -+ config->nwe_setup = ns2cyc(timing->nwe_setup); -+ -+ if (timing->ncs_read_pulse > 0) -+ config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse); -+ -+ if (timing->nrd_pulse > 0) -+ config->nrd_pulse = ns2cyc(timing->nrd_pulse); -+ -+ if (timing->ncs_write_pulse > 0) -+ config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse); -+ -+ if (timing->nwe_pulse > 0) -+ config->nwe_pulse = ns2cyc(timing->nwe_pulse); -+ -+ if (timing->read_cycle > 0) -+ config->read_cycle = ns2cyc(timing->read_cycle); -+ -+ if (timing->write_cycle > 0) -+ config->write_cycle = ns2cyc(timing->write_cycle); -+ -+ /* Extend read cycle in needed */ -+ if (timing->ncs_read_recover > 0) -+ recover = ns2cyc(timing->ncs_read_recover); -+ else -+ recover = 1; -+ -+ cycle = config->ncs_read_setup + config->ncs_read_pulse + recover; -+ -+ if (config->read_cycle < cycle) -+ config->read_cycle = cycle; -+ -+ /* Extend read cycle in needed */ -+ if (timing->nrd_recover > 0) -+ recover = ns2cyc(timing->nrd_recover); -+ else -+ recover = 1; -+ -+ cycle = config->nrd_setup + config->nrd_pulse + recover; -+ -+ if (config->read_cycle < cycle) -+ config->read_cycle = cycle; -+ -+ /* Extend write cycle in needed */ -+ if (timing->ncs_write_recover > 0) -+ recover = ns2cyc(timing->ncs_write_recover); -+ else -+ recover = 1; -+ -+ cycle = config->ncs_write_setup + config->ncs_write_pulse + recover; -+ -+ if (config->write_cycle < cycle) -+ config->write_cycle = cycle; -+ -+ /* Extend write cycle in needed */ -+ if (timing->nwe_recover > 0) -+ recover = ns2cyc(timing->nwe_recover); -+ else -+ recover = 1; -+ -+ cycle = config->nwe_setup + config->nwe_pulse + recover; -+ -+ if (config->write_cycle < cycle) -+ config->write_cycle = cycle; -+} -+EXPORT_SYMBOL(smc_set_timing); -+ -+int smc_set_configuration(int cs, const struct smc_config *config) -+{ -+ unsigned long offset; -+ u32 setup, pulse, cycle, mode; -+ -+ if (!hsmc) -+ return -ENODEV; -+ if (cs >= NR_CHIP_SELECTS) -+ return -EINVAL; -+ -+ setup = (HSMC_BF(NWE_SETUP, config->nwe_setup) -+ | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup) -+ | HSMC_BF(NRD_SETUP, config->nrd_setup) -+ | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup)); -+ pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse) -+ | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse) -+ | HSMC_BF(NRD_PULSE, config->nrd_pulse) -+ | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse)); -+ cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle) -+ | HSMC_BF(NRD_CYCLE, config->read_cycle)); - - switch (config->bus_width) { - case 1: -diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c -index 1eb99b8..c978c36 100644 ---- a/arch/avr32/mach-at32ap/pio.c -+++ b/arch/avr32/mach-at32ap/pio.c -@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags) - pio_writel(pio, SODR, mask); - else - pio_writel(pio, CODR, mask); -+ if (flags & AT32_GPIOF_MULTIDRV) -+ pio_writel(pio, MDER, mask); -+ else -+ pio_writel(pio, MDDR, mask); - pio_writel(pio, PUDR, mask); - pio_writel(pio, OER, mask); - } else { -@@ -158,6 +162,82 @@ fail: - dump_stack(); - } - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port) -+{ -+ return port < MAX_NR_PIO_DEVICES && pio_dev[port].regs != NULL; -+} -+ -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs || (oe_mask & ~pins)); -+ -+ /* Try to allocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ if (old & pins) -+ return -EBUSY; -+ -+ new = old | pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+ -+ /* That went well, now configure the port */ -+ pio_writel(pio, OER, oe_mask); -+ pio_writel(pio, PER, pins); -+ -+ return 0; -+} -+ -+void at32_deselect_pins(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ u32 old, new; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* Return to a "safe" mux configuration */ -+ pio_writel(pio, PUER, pins); -+ pio_writel(pio, ODR, pins); -+ -+ /* Deallocate the pins */ -+ do { -+ old = pio->pinmux_mask; -+ new = old & ~pins; -+ } while (cmpxchg(&pio->pinmux_mask, old, new) != old); -+} -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ return pio_readl(pio, PDSR) & pins; -+} -+ -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask) -+{ -+ struct pio_device *pio; -+ -+ pio = &pio_dev[port]; -+ BUG_ON(port > ARRAY_SIZE(pio_dev) || !pio->regs); -+ -+ /* No atomic updates for now... */ -+ pio_writel(pio, CODR, ~value & mask); -+ pio_writel(pio, SODR, value & mask); -+} -+ -+#endif /* CONFIG_GPIO_DEV */ -+ -+ - /*--------------------------------------------------------------------------*/ - - /* GPIO API */ -diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h -index a1f8ace..47efd0d 100644 ---- a/arch/avr32/mach-at32ap/pm.h -+++ b/arch/avr32/mach-at32ap/pm.h -@@ -4,6 +4,14 @@ - #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ - #define __ARCH_AVR32_MACH_AT32AP_PM_H__ - -+/* -+ * We can reduce the code size a bit by using a constant here. Since -+ * this file is only used on AVR32 AP CPUs with segmentation enabled, -+ * it's safe to not use ioremap. Generic drivers should of course -+ * never do this. -+ */ -+#define AT32_PM_BASE 0xfff00000 -+ - /* PM register offsets */ - #define PM_MCCTRL 0x0000 - #define PM_CKSEL 0x0004 -diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c -index 099212d..26f29c6 100644 ---- a/arch/avr32/mm/dma-coherent.c -+++ b/arch/avr32/mm/dma-coherent.c -@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size, - struct page *page, *free, *end; - int order; - -+ /* Following is a work-around (a.k.a. hack) to prevent pages -+ * with __GFP_COMP being passed to split_page() which cannot -+ * handle them. The real problem is that this flag probably -+ * should be 0 on AVR32 as it is not supported on this -+ * platform--see CONFIG_HUGETLB_PAGE. */ -+ gfp &= ~(__GFP_COMP); -+ - size = PAGE_ALIGN(size); - order = get_order(size); - -diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c -index 82cf708..480760b 100644 ---- a/arch/avr32/mm/init.c -+++ b/arch/avr32/mm/init.c -@@ -224,19 +224,9 @@ void free_initmem(void) - - #ifdef CONFIG_BLK_DEV_INITRD - --static int keep_initrd; -- - void free_initrd_mem(unsigned long start, unsigned long end) - { -- if (!keep_initrd) -- free_area(start, end, "initrd"); --} -- --static int __init keepinitrd_setup(char *__unused) --{ -- keep_initrd = 1; -- return 1; -+ free_area(start, end, "initrd"); - } - --__setup("keepinitrd", keepinitrd_setup); - #endif -diff --git a/drivers/char/watchdog/Kconfig b/drivers/char/watchdog/Kconfig -index 37bddc1..8c30dec 100644 ---- a/drivers/char/watchdog/Kconfig -+++ b/drivers/char/watchdog/Kconfig -@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG - - config AT32AP700X_WDT - tristate "AT32AP700x watchdog" -- depends on CPU_AT32AP7000 -+ depends on CPU_AT32AP700X - help - Watchdog timer embedded into AT32AP700x devices. This will reboot - your system when the timeout is reached. -diff --git a/drivers/char/watchdog/at32ap700x_wdt.c b/drivers/char/watchdog/at32ap700x_wdt.c -index 54a5161..fb5ed64 100644 ---- a/drivers/char/watchdog/at32ap700x_wdt.c -+++ b/drivers/char/watchdog/at32ap700x_wdt.c -@@ -6,6 +6,19 @@ - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -+ * -+ * -+ * Errata: WDT Clear is blocked after WDT Reset -+ * -+ * A watchdog timer event will, after reset, block writes to the WDT_CLEAR -+ * register, preventing the program to clear the next Watchdog Timer Reset. -+ * -+ * If you still want to use the WDT after a WDT reset a small code can be -+ * insterted at the startup checking the AVR32_PM.rcause register for WDT reset -+ * and use a GPIO pin to reset the system. This method requires that one of the -+ * GPIO pins are available and connected externally to the RESET_N pin. After -+ * the GPIO pin has pulled down the reset line the GPIO will be reset and leave -+ * the pin tristated with pullup. - */ - - #include <linux/init.h> -@@ -44,6 +57,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" - - #define WDT_CLR 0x04 - -+#define WDT_RCAUSE 0x10 -+#define WDT_RCAUSE_POR 0 -+#define WDT_RCAUSE_EXT 2 -+#define WDT_RCAUSE_WDT 3 -+#define WDT_RCAUSE_JTAG 4 -+#define WDT_RCAUSE_SERP 5 -+ - #define WDT_BIT(name) (1 << WDT_##name) - #define WDT_BF(name, value) ((value) << WDT_##name) - -@@ -56,6 +76,7 @@ struct wdt_at32ap700x { - void __iomem *regs; - spinlock_t io_lock; - int timeout; -+ int boot_status; - unsigned long users; - struct miscdevice miscdev; - }; -@@ -126,7 +147,7 @@ static int at32_wdt_close(struct inode *inode, struct file *file) - at32_wdt_stop(); - } else { - dev_dbg(wdt->miscdev.parent, -- "Unexpected close, not stopping watchdog!\n"); -+ "unexpected close, not stopping watchdog!\n"); - at32_wdt_pat(); - } - clear_bit(1, &wdt->users); -@@ -154,6 +175,33 @@ static int at32_wdt_settimeout(int time) - return 0; - } - -+/* -+ * Get the watchdog status. -+ */ -+static int at32_wdt_get_status(void) -+{ -+ int rcause; -+ int status = 0; -+ -+ rcause = wdt_readl(wdt, RCAUSE); -+ -+ switch (rcause) { -+ case WDT_BIT(RCAUSE_EXT): -+ status = WDIOF_EXTERN1; -+ break; -+ case WDT_BIT(RCAUSE_WDT): -+ status = WDIOF_CARDRESET; -+ break; -+ case WDT_BIT(RCAUSE_POR): /* fall through */ -+ case WDT_BIT(RCAUSE_JTAG): /* fall through */ -+ case WDT_BIT(RCAUSE_SERP): /* fall through */ -+ default: -+ break; -+ } -+ -+ return status; -+} -+ - static struct watchdog_info at32_wdt_info = { - .identity = "at32ap700x watchdog", - .options = WDIOF_SETTIMEOUT | -@@ -194,10 +242,12 @@ static int at32_wdt_ioctl(struct inode *inode, struct file *file, - case WDIOC_GETTIMEOUT: - ret = put_user(wdt->timeout, p); - break; -- case WDIOC_GETSTATUS: /* fall through */ -- case WDIOC_GETBOOTSTATUS: -+ case WDIOC_GETSTATUS: - ret = put_user(0, p); - break; -+ case WDIOC_GETBOOTSTATUS: -+ ret = put_user(wdt->boot_status, p); -+ break; - case WDIOC_SETOPTIONS: - ret = get_user(time, p); - if (ret) -@@ -282,8 +332,19 @@ static int __init at32_wdt_probe(struct platform_device *pdev) - dev_dbg(&pdev->dev, "could not map I/O memory\n"); - goto err_free; - } -+ - spin_lock_init(&wdt->io_lock); -- wdt->users = 0; -+ wdt->boot_status = at32_wdt_get_status(); -+ -+ /* Work-around for watchdog silicon errata. */ -+ if (wdt->boot_status & WDIOF_CARDRESET) { -+ dev_info(&pdev->dev, "CPU must be reset with external " -+ "reset or POR due to silicon errata.\n"); -+ ret = -EIO; -+ goto err_iounmap; -+ } else { -+ wdt->users = 0; -+ } - wdt->miscdev.minor = WATCHDOG_MINOR; - wdt->miscdev.name = "watchdog"; - wdt->miscdev.fops = &at32_wdt_fops; -diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index 9f3a4cd..6f5bcd6 100644 ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -80,6 +80,14 @@ config I2C_AT91 - This supports the use of the I2C interface on Atmel AT91 - processors. - -+config I2C_ATMELTWI -+ tristate "Atmel Two-Wire Interface (TWI)" -+ depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP) -+ help -+ Atmel on-chip TWI controller. Say Y if you have an AT32 or -+ AT91-based device and want to use its built-in TWI -+ functionality. -+ - config I2C_AU1550 - tristate "Au1550/Au1200 SMBus interface" - depends on SOC_AU1550 || SOC_AU1200 -diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile -index 5b752e4..e4644a8 100644 ---- a/drivers/i2c/busses/Makefile -+++ b/drivers/i2c/busses/Makefile -@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o - obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o - obj-$(CONFIG_SCx200_ACB) += scx200_acb.o - obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o -+obj-$(CONFIG_I2C_ATMELTWI) += i2c-atmeltwi.o - - ifeq ($(CONFIG_I2C_DEBUG_BUS),y) - EXTRA_CFLAGS += -DDEBUG -diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c -new file mode 100644 -index 0000000..3f78b31 ---- /dev/null -+++ b/drivers/i2c/busses/i2c-atmeltwi.c -@@ -0,0 +1,436 @@ -+/* -+ * i2c Support for Atmel's Two-Wire Interface (TWI) -+ * -+ * Based on the work of Copyright (C) 2004 Rick Bronson -+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com> -+ * Ported to AVR32 and heavily modified by Espen Krangnes -+ * <ekrangnes at atmel.com> -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * Borrowed heavily from the original work by: -+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com> -+ * -+ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz> -+ * bugs removed, interrupt routine markedly rewritten -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+#undef VERBOSE_DEBUG -+ -+#include <linux/module.h> -+#include <linux/slab.h> -+#include <linux/i2c.h> -+#include <linux/init.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/interrupt.h> -+#include <linux/platform_device.h> -+#include <linux/completion.h> -+#include <linux/io.h> -+ -+#include "i2c-atmeltwi.h" -+ -+static unsigned int baudrate = 100 * 1000; -+module_param(baudrate, uint, S_IRUGO); -+MODULE_PARM_DESC(baudrate, "The TWI baudrate"); -+ -+ -+struct atmel_twi { -+ void __iomem *regs; -+ struct i2c_adapter adapter; -+ struct clk *pclk; -+ struct completion comp; -+ u32 mask; -+ u8 *buf; -+ u16 len; -+ u16 acks_left; -+ int status; -+ unsigned int irq; -+ -+}; -+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter) -+ -+/* -+ * (Re)Initialize the TWI hardware registers. -+ */ -+static int twi_hwinit(struct atmel_twi *twi) -+{ -+ unsigned long cdiv, ckdiv = 0; -+ -+ /* REVISIT: wait till SCL is high before resetting; otherwise, -+ * some versions will wedge forever. -+ */ -+ -+ twi_writel(twi, IDR, ~0UL); -+ twi_writel(twi, CR, TWI_BIT(SWRST)); /*Reset peripheral*/ -+ twi_readl(twi, SR); -+ -+ cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4; -+ -+ while (cdiv > 255) { -+ ckdiv++; -+ cdiv = cdiv >> 1; -+ } -+ -+ /* REVISIT: there are various errata to consider re CDIV and CHDIV -+ * here, at least on at91 parts. -+ */ -+ -+ if (ckdiv > 7) -+ return -EINVAL; -+ else -+ twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv) -+ | TWI_BF(CHDIV, cdiv) -+ | TWI_BF(CLDIV, cdiv)); -+ return 0; -+} -+ -+/* -+ * Waits for the i2c status register to set the specified bitmask -+ * Returns 0 if timed out ... ~100ms is much longer than the SMBus -+ * limit, but I2C has no limit at all. -+ */ -+static int twi_complete(struct atmel_twi *twi, u32 mask) -+{ -+ int timeout = msecs_to_jiffies(100); -+ -+ mask |= TWI_BIT(TXCOMP); -+ twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE); -+ init_completion(&twi->comp); -+ -+ twi_writel(twi, IER, mask); -+ -+ if (!wait_for_completion_timeout(&twi->comp, timeout)) { -+ /* RESET TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(SWRST)); -+ -+ /* Reinitialize TWI */ -+ twi_hwinit(twi); -+ -+ return -ETIMEDOUT; -+ } -+ return 0; -+} -+ -+/* -+ * Generic i2c master transfer entrypoint. -+ */ -+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num) -+{ -+ struct atmel_twi *twi = to_atmel_twi(adap); -+ int i; -+ -+ dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num); -+ -+ twi->status = 0; -+ for (i = 0; i < num; i++, pmsg++) { -+ twi->len = pmsg->len; -+ twi->buf = pmsg->buf; -+ twi->acks_left = pmsg->len; -+ twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) | -+ (pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0)); -+ twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr)); -+ -+ dev_dbg(&adap->dev, -+ "#%d: %s %d byte%s %s dev 0x%02x\n", -+ i, -+ pmsg->flags & I2C_M_RD ? "reading" : "writing", -+ pmsg->len, -+ pmsg->len > 1 ? "s" : "", -+ pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr); -+ -+ /* enable */ -+ twi_writel(twi, CR, TWI_BIT(MSEN)); -+ -+ if (pmsg->flags & I2C_M_RD) { -+ /* cleanup after previous RX overruns */ -+ while (twi_readl(twi, SR) & TWI_BIT(RXRDY)) -+ twi_readl(twi, RHR); -+ -+ if (twi->len == 1) -+ twi_writel(twi, CR, -+ TWI_BIT(START) | TWI_BIT(STOP)); -+ else -+ twi_writel(twi, CR, TWI_BIT(START)); -+ -+ if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "RX[%d] timeout. " -+ "Stopped with %d bytes left\n", -+ i, twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ } else { -+ twi_writel(twi, THR, twi->buf[0]); -+ twi->acks_left--; -+ /* REVISIT: some chips don't start automagically: -+ * twi_writel(twi, CR, TWI_BIT(START)); -+ */ -+ if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) { -+ dev_dbg(&adap->dev, "TX[%d] timeout. " -+ "Stopped with %d bytes left\n", -+ i, twi->acks_left); -+ return -ETIMEDOUT; -+ } -+ /* REVISIT: an erratum workaround may be needed here; -+ * see sam9261 "STOP not generated" (START either). -+ */ -+ } -+ -+ /* Disable TWI interface */ -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ -+ if (twi->status) -+ return twi->status; -+ -+ /* WARNING: This driver lies about properly supporting -+ * repeated start, or it would *ALWAYS* return here. It -+ * has issued a STOP. Continuing is a false claim -- that -+ * a second (or third, etc.) message is part of the same -+ * "combined" (no STOPs between parts) message. -+ */ -+ -+ } /* end cur msg */ -+ -+ return i; -+} -+ -+ -+static irqreturn_t twi_interrupt(int irq, void *dev_id) -+{ -+ struct atmel_twi *twi = dev_id; -+ int status = twi_readl(twi, SR); -+ -+ /* Save state for later debug prints */ -+ int old_status = status; -+ -+ if (twi->mask & status) { -+ -+ status &= twi->mask; -+ -+ if (status & TWI_BIT(RXRDY)) { -+ if ((status & TWI_BIT(OVRE)) && twi->acks_left) { -+ /* Note weakness in fault reporting model: -+ * we can't say "the first N of these data -+ * bytes are valid". -+ */ -+ dev_err(&twi->adapter.dev, -+ "OVERRUN RX! %04x, lost %d\n", -+ old_status, twi->acks_left); -+ twi->acks_left = 0; -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ twi->status = -EOVERFLOW; -+ } else if (twi->acks_left > 0) { -+ twi->buf[twi->len - twi->acks_left] = -+ twi_readl(twi, RHR); -+ twi->acks_left--; -+ } -+ if (status & TWI_BIT(TXCOMP)) -+ goto done; -+ if (twi->acks_left == 1) -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ -+ } else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) { -+ goto done; -+ -+ } else if (status & TWI_BIT(TXRDY)) { -+ if (twi->acks_left > 0) { -+ twi->acks_left--; -+ twi_writel(twi, THR, -+ twi->buf[twi->len - twi->acks_left]); -+ } else -+ twi_writel(twi, CR, TWI_BIT(STOP)); -+ } -+ -+ if (twi->acks_left == 0) -+ twi_writel(twi, IDR, ~TWI_BIT(TXCOMP)); -+ } -+ -+ /* enabling this message helps trigger overruns/underruns ... */ -+ dev_vdbg(&twi->adapter.dev, -+ "ISR: SR 0x%04X, mask 0x%04X, acks %i\n", -+ old_status, -+ twi->acks_left ? twi->mask : TWI_BIT(TXCOMP), -+ twi->acks_left); -+ -+ return IRQ_HANDLED; -+ -+done: -+ /* Note weak fault reporting model: we can't report how many -+ * bytes we sent before the NAK, or let upper layers choose -+ * whether to continue. The I2C stack doesn't allow that... -+ */ -+ if (status & TWI_BIT(NACK)) { -+ dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n", -+ twi->acks_left); -+ twi->status = -EPIPE; -+ -+ /* TX underrun morphs automagically into a premature STOP; -+ * we'll probably observe UVRE even when it's not documented. -+ */ -+ } else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) { -+ dev_err(&twi->adapter.dev, "UNDERRUN TX! %04x, %d to go\n", -+ old_status, twi->acks_left); -+ twi->status = -ENOSR; -+ } -+ -+ twi_writel(twi, IDR, ~0UL); -+ complete(&twi->comp); -+ -+ dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n", -+ old_status, twi->acks_left, twi->status); -+ -+ return IRQ_HANDLED; -+} -+ -+ -+/* -+ * Return list of supported functionality. -+ * -+ * NOTE: see warning above about repeated starts; this driver is falsely -+ * claiming to support "combined" transfers. The mid-message STOPs mean -+ * some slaves will never work with this driver. (Use i2c-gpio...) -+ */ -+static u32 twi_func(struct i2c_adapter *adapter) -+{ -+ return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) -+ & ~I2C_FUNC_SMBUS_QUICK; -+} -+ -+static struct i2c_algorithm twi_algorithm = { -+ .master_xfer = twi_xfer, -+ .functionality = twi_func, -+}; -+ -+/* -+ * Main initialization routine. -+ */ -+static int __init twi_probe(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi; -+ struct resource *regs; -+ struct clk *pclk; -+ struct i2c_adapter *adapter; -+ int rc, irq; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ clk_enable(pclk); -+ -+ rc = -ENOMEM; -+ twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL); -+ if (!twi) { -+ dev_dbg(&pdev->dev, "can't allocate interface!\n"); -+ goto err_alloc_twi; -+ } -+ -+ twi->pclk = pclk; -+ twi->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!twi->regs) -+ goto err_ioremap; -+ -+ irq = platform_get_irq(pdev, 0); -+ rc = request_irq(irq, twi_interrupt, 0, "twi", twi); -+ if (rc) { -+ dev_dbg(&pdev->dev, "can't bind irq!\n"); -+ goto err_irq; -+ } -+ twi->irq = irq; -+ -+ rc = twi_hwinit(twi); -+ if (rc) { -+ dev_err(&pdev->dev, "Unable to set baudrate\n"); -+ goto err_hw_init; -+ } -+ -+ adapter = &twi->adapter; -+ sprintf(adapter->name, "TWI"); -+ adapter->algo = &twi_algorithm; -+ adapter->class = I2C_CLASS_ALL; -+ adapter->nr = pdev->id; -+ adapter->dev.parent = &pdev->dev; -+ -+ platform_set_drvdata(pdev, twi); -+ -+ rc = i2c_add_numbered_adapter(adapter); -+ if (rc) { -+ dev_dbg(&pdev->dev, "Adapter %s registration failed\n", -+ adapter->name); -+ goto err_register; -+ } -+ -+ dev_info(&pdev->dev, -+ "Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n", -+ baudrate/1000, (unsigned long)regs->start); -+ -+ return 0; -+ -+ -+err_register: -+ platform_set_drvdata(pdev, NULL); -+ -+err_hw_init: -+ free_irq(irq, twi); -+ -+err_irq: -+ iounmap(twi->regs); -+ -+err_ioremap: -+ kfree(twi); -+ -+err_alloc_twi: -+ clk_disable(pclk); -+ clk_put(pclk); -+ -+ return rc; -+} -+ -+static int __exit twi_remove(struct platform_device *pdev) -+{ -+ struct atmel_twi *twi = platform_get_drvdata(pdev); -+ int res; -+ -+ platform_set_drvdata(pdev, NULL); -+ res = i2c_del_adapter(&twi->adapter); -+ twi_writel(twi, CR, TWI_BIT(MSDIS)); -+ iounmap(twi->regs); -+ clk_disable(twi->pclk); -+ clk_put(twi->pclk); -+ free_irq(twi->irq, twi); -+ kfree(twi); -+ -+ return res; -+} -+ -+static struct platform_driver twi_driver = { -+ .remove = __exit_p(twi_remove), -+ .driver = { -+ .name = "atmel_twi", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init atmel_twi_init(void) -+{ -+ return platform_driver_probe(&twi_driver, twi_probe); -+} -+ -+static void __exit atmel_twi_exit(void) -+{ -+ platform_driver_unregister(&twi_driver); -+} -+ -+module_init(atmel_twi_init); -+module_exit(atmel_twi_exit); -+ -+MODULE_AUTHOR("Espen Krangnes"); -+MODULE_DESCRIPTION("I2C driver for Atmel TWI"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h -new file mode 100644 -index 0000000..1aca065 ---- /dev/null -+++ b/drivers/i2c/busses/i2c-atmeltwi.h -@@ -0,0 +1,117 @@ -+/* -+ * Register definitions for the Atmel Two-Wire Interface -+ */ -+ -+#ifndef __ATMELTWI_H__ -+#define __ATMELTWI_H__ -+ -+/* TWI register offsets */ -+#define TWI_CR 0x0000 -+#define TWI_MMR 0x0004 -+#define TWI_SMR 0x0008 -+#define TWI_IADR 0x000c -+#define TWI_CWGR 0x0010 -+#define TWI_SR 0x0020 -+#define TWI_IER 0x0024 -+#define TWI_IDR 0x0028 -+#define TWI_IMR 0x002c -+#define TWI_RHR 0x0030 -+#define TWI_THR 0x0034 -+ -+/* Bitfields in CR */ -+#define TWI_START_OFFSET 0 -+#define TWI_START_SIZE 1 -+#define TWI_STOP_OFFSET 1 -+#define TWI_STOP_SIZE 1 -+#define TWI_MSEN_OFFSET 2 -+#define TWI_MSEN_SIZE 1 -+#define TWI_MSDIS_OFFSET 3 -+#define TWI_MSDIS_SIZE 1 -+#define TWI_SVEN_OFFSET 4 -+#define TWI_SVEN_SIZE 1 -+#define TWI_SVDIS_OFFSET 5 -+#define TWI_SVDIS_SIZE 1 -+#define TWI_SWRST_OFFSET 7 -+#define TWI_SWRST_SIZE 1 -+ -+/* Bitfields in MMR */ -+#define TWI_IADRSZ_OFFSET 8 -+#define TWI_IADRSZ_SIZE 2 -+#define TWI_MREAD_OFFSET 12 -+#define TWI_MREAD_SIZE 1 -+#define TWI_DADR_OFFSET 16 -+#define TWI_DADR_SIZE 7 -+ -+/* Bitfields in SMR */ -+#define TWI_SADR_OFFSET 16 -+#define TWI_SADR_SIZE 7 -+ -+/* Bitfields in IADR */ -+#define TWI_IADR_OFFSET 0 -+#define TWI_IADR_SIZE 24 -+ -+/* Bitfields in CWGR */ -+#define TWI_CLDIV_OFFSET 0 -+#define TWI_CLDIV_SIZE 8 -+#define TWI_CHDIV_OFFSET 8 -+#define TWI_CHDIV_SIZE 8 -+#define TWI_CKDIV_OFFSET 16 -+#define TWI_CKDIV_SIZE 3 -+ -+/* Bitfields in SR */ -+#define TWI_TXCOMP_OFFSET 0 -+#define TWI_TXCOMP_SIZE 1 -+#define TWI_RXRDY_OFFSET 1 -+#define TWI_RXRDY_SIZE 1 -+#define TWI_TXRDY_OFFSET 2 -+#define TWI_TXRDY_SIZE 1 -+#define TWI_SVDIR_OFFSET 3 -+#define TWI_SVDIR_SIZE 1 -+#define TWI_SVACC_OFFSET 4 -+#define TWI_SVACC_SIZE 1 -+#define TWI_GCACC_OFFSET 5 -+#define TWI_GCACC_SIZE 1 -+#define TWI_OVRE_OFFSET 6 -+#define TWI_OVRE_SIZE 1 -+#define TWI_UNRE_OFFSET 7 -+#define TWI_UNRE_SIZE 1 -+#define TWI_NACK_OFFSET 8 -+#define TWI_NACK_SIZE 1 -+#define TWI_ARBLST_OFFSET 9 -+#define TWI_ARBLST_SIZE 1 -+ -+/* Bitfields in RHR */ -+#define TWI_RXDATA_OFFSET 0 -+#define TWI_RXDATA_SIZE 8 -+ -+/* Bitfields in THR */ -+#define TWI_TXDATA_OFFSET 0 -+#define TWI_TXDATA_SIZE 8 -+ -+/* Constants for IADRSZ */ -+#define TWI_IADRSZ_NO_ADDR 0 -+#define TWI_IADRSZ_ONE_BYTE 1 -+#define TWI_IADRSZ_TWO_BYTES 2 -+#define TWI_IADRSZ_THREE_BYTES 3 -+ -+/* Bit manipulation macros */ -+#define TWI_BIT(name) \ -+ (1 << TWI_##name##_OFFSET) -+#define TWI_BF(name, value) \ -+ (((value) & ((1 << TWI_##name##_SIZE) - 1)) \ -+ << TWI_##name##_OFFSET) -+#define TWI_BFEXT(name, value) \ -+ (((value) >> TWI_##name##_OFFSET) \ -+ & ((1 << TWI_##name##_SIZE) - 1)) -+#define TWI_BFINS(name, value, old) \ -+ (((old) & ~(((1 << TWI_##name##_SIZE) - 1) \ -+ << TWI_##name##_OFFSET)) \ -+ | TWI_BF(name, (value))) -+ -+/* Register access macros */ -+#define twi_readl(port, reg) \ -+ __raw_readl((port)->regs + TWI_##reg) -+#define twi_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + TWI_##reg) -+ -+#endif /* __ATMELTWI_H__ */ -diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index 73e248f..9e848cc 100644 ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY - - If you are not sure, say Y here. - -+config ATMEL_SSC -+ tristate "Device driver for Atmel SSC peripheral" -+ depends on AVR32 || ARCH_AT91 -+ ---help--- -+ This option enables device driver support for Atmel Syncronized -+ Serial Communication peripheral (SSC). -+ -+ The SSC peripheral supports a wide variety of serial frame based -+ communications, i.e. I2S, SPI, etc. - - endif # MISC_DEVICES -diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile -index b5ce0e3..40d8ed1 100644 ---- a/drivers/misc/Makefile -+++ b/drivers/misc/Makefile -@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4) += ioc4.o - obj-$(CONFIG_SONY_LAPTOP) += sony-laptop.o - obj-$(CONFIG_THINKPAD_ACPI) += thinkpad_acpi.o - obj-$(CONFIG_EEPROM_93CX6) += eeprom_93cx6.o -+obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o -diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c -new file mode 100644 -index 0000000..058ccac ---- /dev/null -+++ b/drivers/misc/atmel-ssc.c -@@ -0,0 +1,174 @@ -+/* -+ * Atmel SSC driver -+ * -+ * Copyright (C) 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/atmel-ssc.h> -+ -+/* Serialize access to ssc_list and user count */ -+static DEFINE_SPINLOCK(user_lock); -+static LIST_HEAD(ssc_list); -+ -+struct ssc_device *ssc_request(unsigned int ssc_num) -+{ -+ int ssc_valid = 0; -+ struct ssc_device *ssc; -+ -+ spin_lock(&user_lock); -+ list_for_each_entry(ssc, &ssc_list, list) { -+ if (ssc->pdev->id == ssc_num) { -+ ssc_valid = 1; -+ break; -+ } -+ } -+ -+ if (!ssc_valid) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "could not find requested device\n"); -+ return ERR_PTR(-ENODEV); -+ } -+ -+ if (ssc->user) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "module busy\n"); -+ return ERR_PTR(-EBUSY); -+ } -+ ssc->user++; -+ spin_unlock(&user_lock); -+ -+ clk_enable(ssc->clk); -+ -+ return ssc; -+} -+EXPORT_SYMBOL(ssc_request); -+ -+void ssc_free(struct ssc_device *ssc) -+{ -+ spin_lock(&user_lock); -+ if (ssc->user) { -+ ssc->user--; -+ clk_disable(ssc->clk); -+ } else { -+ dev_dbg(&ssc->pdev->dev, "device already free\n"); -+ } -+ spin_unlock(&user_lock); -+} -+EXPORT_SYMBOL(ssc_free); -+ -+static int __init ssc_probe(struct platform_device *pdev) -+{ -+ int retval = 0; -+ struct resource *regs; -+ struct ssc_device *ssc; -+ -+ ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL); -+ if (!ssc) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ retval = -ENOMEM; -+ goto out; -+ } -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "no mmio resource defined\n"); -+ retval = -ENXIO; -+ goto out_free; -+ } -+ -+ ssc->clk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(ssc->clk)) { -+ dev_dbg(&pdev->dev, "no pclk clock defined\n"); -+ retval = -ENXIO; -+ goto out_free; -+ } -+ -+ ssc->pdev = pdev; -+ ssc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!ssc->regs) { -+ dev_dbg(&pdev->dev, "ioremap failed\n"); -+ retval = -EINVAL; -+ goto out_clk; -+ } -+ -+ /* disable all interrupts */ -+ clk_enable(ssc->clk); -+ ssc_writel(ssc->regs, IDR, ~0UL); -+ ssc_readl(ssc->regs, SR); -+ clk_disable(ssc->clk); -+ -+ ssc->irq = platform_get_irq(pdev, 0); -+ if (!ssc->irq) { -+ dev_dbg(&pdev->dev, "could not get irq\n"); -+ retval = -ENXIO; -+ goto out_unmap; -+ } -+ -+ spin_lock(&user_lock); -+ list_add_tail(&ssc->list, &ssc_list); -+ spin_unlock(&user_lock); -+ -+ platform_set_drvdata(pdev, ssc); -+ -+ dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n", -+ ssc->regs, ssc->irq); -+ -+ goto out; -+ -+out_unmap: -+ iounmap(ssc->regs); -+out_clk: -+ clk_put(ssc->clk); -+out_free: -+ kfree(ssc); -+out: -+ return retval; -+} -+ -+static int __devexit ssc_remove(struct platform_device *pdev) -+{ -+ struct ssc_device *ssc = platform_get_drvdata(pdev); -+ -+ spin_lock(&user_lock); -+ iounmap(ssc->regs); -+ clk_put(ssc->clk); -+ list_del(&ssc->list); -+ kfree(ssc); -+ spin_unlock(&user_lock); -+ -+ return 0; -+} -+ -+static struct platform_driver ssc_driver = { -+ .remove = __devexit_p(ssc_remove), -+ .driver = { -+ .name = "ssc", -+ }, -+}; -+ -+static int __init ssc_init(void) -+{ -+ return platform_driver_probe(&ssc_driver, ssc_probe); -+} -+module_init(ssc_init); -+ -+static void __exit ssc_exit(void) -+{ -+ platform_driver_unregister(&ssc_driver); -+} -+module_exit(ssc_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index e23082f..1de1716 100644 ---- a/drivers/mmc/host/Kconfig -+++ b/drivers/mmc/host/Kconfig -@@ -74,6 +74,16 @@ config MMC_AT91 - - If unsure, say N. - -+config MMC_ATMELMCI -+ tristate "Atmel Multimedia Card Interface support" -+ depends on AVR32 && MMC -+ help -+ This selects the Atmel Multimedia Card Interface. If you have -+ a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card -+ slot, say Y or M here. -+ -+ If unsure, say N. -+ - config MMC_IMX - tristate "Motorola i.MX Multimedia Card Interface support" - depends on ARCH_IMX -diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6685f64..4b8e6e2 100644 ---- a/drivers/mmc/host/Makefile -+++ b/drivers/mmc/host/Makefile -@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o - obj-$(CONFIG_MMC_AU1X) += au1xmmc.o - obj-$(CONFIG_MMC_OMAP) += omap.o - obj-$(CONFIG_MMC_AT91) += at91_mci.o -+obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o - obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o - -diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c -new file mode 100644 -index 0000000..6792ad9 ---- /dev/null -+++ b/drivers/mmc/host/atmel-mci.c -@@ -0,0 +1,1176 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/blkdev.h> -+#include <linux/clk.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/ioport.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+ -+#include <linux/mmc/host.h> -+ -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+#include <asm/arch/gpio.h> -+ -+#include "atmel-mci.h" -+ -+#define DRIVER_NAME "atmel_mci" -+ -+#define MCI_DATA_ERROR_FLAGS (MCI_BIT(DCRCE) | MCI_BIT(DTOE) | \ -+ MCI_BIT(OVRE) | MCI_BIT(UNRE)) -+ -+enum { -+ EVENT_CMD_COMPLETE = 0, -+ EVENT_DATA_COMPLETE, -+ EVENT_DATA_ERROR, -+ EVENT_STOP_SENT, -+ EVENT_STOP_COMPLETE, -+ EVENT_DMA_COMPLETE, -+ EVENT_DMA_ERROR, -+ EVENT_CARD_DETECT, -+}; -+ -+struct atmel_mci_dma { -+ struct dma_request_sg req; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_mci { -+ struct mmc_host *mmc; -+ void __iomem *regs; -+ struct atmel_mci_dma dma; -+ -+ struct mmc_request *mrq; -+ struct mmc_command *cmd; -+ struct mmc_data *data; -+ -+ u32 cmd_status; -+ u32 data_status; -+ u32 stop_status; -+ u32 stop_cmdr; -+ -+ struct tasklet_struct tasklet; -+ unsigned long pending_events; -+ unsigned long completed_events; -+ -+ int present; -+ int detect_pin; -+ int wp_pin; -+ -+ unsigned long bus_hz; -+ unsigned long mapbase; -+ struct clk *mck; -+ struct platform_device *pdev; -+ -+#ifdef CONFIG_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+ struct dentry *debugfs_req; -+ struct dentry *debugfs_pending_events; -+ struct dentry *debugfs_completed_events; -+#endif -+}; -+ -+/* Those printks take an awful lot of time... */ -+#ifndef DEBUG -+static unsigned int fmax = 15000000U; -+#else -+static unsigned int fmax = 1000000U; -+#endif -+module_param(fmax, uint, 0444); -+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock"); -+ -+/* Test bit macros for completed events */ -+#define mci_cmd_is_complete(host) \ -+ test_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_data_is_complete(host) \ -+ test_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_data_error_is_complete(host) \ -+ test_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_stop_sent_is_complete(host) \ -+ test_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_stop_is_complete(host) \ -+ test_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_dma_is_complete(host) \ -+ test_bit(EVENT_DMA_COMPLETE, &host->completed_events) -+#define mci_dma_error_is_complete(host) \ -+ test_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_card_detect_is_complete(host) \ -+ test_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Test and clear bit macros for pending events */ -+#define mci_clear_cmd_is_pending(host) \ -+ test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_data_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_is_pending(host) \ -+ test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_dma_error_is_pending(host) \ -+ test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_is_pending(host) \ -+ test_and_clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Test and set bit macros for completed events */ -+#define mci_set_cmd_is_completed(host) \ -+ test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_data_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_is_completed(host) \ -+ test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_dma_error_is_completed(host) \ -+ test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_is_completed(host) \ -+ test_and_set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for completed events */ -+#define mci_set_cmd_complete(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->completed_events) -+#define mci_set_data_complete(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->completed_events) -+#define mci_set_data_error_complete(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->completed_events) -+#define mci_set_stop_sent_complete(host) \ -+ set_bit(EVENT_STOP_SENT, &host->completed_events) -+#define mci_set_stop_complete(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->completed_events) -+#define mci_set_dma_complete(host) \ -+ set_bit(EVENT_DMA_COMPLETE, &host->completed_events) -+#define mci_set_dma_error_complete(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->completed_events) -+#define mci_set_card_detect_complete(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->completed_events) -+ -+/* Set bit macros for pending events */ -+#define mci_set_cmd_pending(host) \ -+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_set_data_pending(host) \ -+ set_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_set_data_error_pending(host) \ -+ set_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_set_stop_sent_pending(host) \ -+ set_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_set_stop_pending(host) \ -+ set_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_set_dma_error_pending(host) \ -+ set_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_set_card_detect_pending(host) \ -+ set_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+/* Clear bit macros for pending events */ -+#define mci_clear_cmd_pending(host) \ -+ clear_bit(EVENT_CMD_COMPLETE, &host->pending_events) -+#define mci_clear_data_pending(host) \ -+ clear_bit(EVENT_DATA_COMPLETE, &host->pending_events) -+#define mci_clear_data_error_pending(host) \ -+ clear_bit(EVENT_DATA_ERROR, &host->pending_events) -+#define mci_clear_stop_sent_pending(host) \ -+ clear_bit(EVENT_STOP_SENT, &host->pending_events) -+#define mci_clear_stop_pending(host) \ -+ clear_bit(EVENT_STOP_COMPLETE, &host->pending_events) -+#define mci_clear_dma_error_pending(host) \ -+ clear_bit(EVENT_DMA_ERROR, &host->pending_events) -+#define mci_clear_card_detect_pending(host) \ -+ clear_bit(EVENT_CARD_DETECT, &host->pending_events) -+ -+ -+#ifdef CONFIG_DEBUG_FS -+#include <linux/debugfs.h> -+ -+#define DBG_REQ_BUF_SIZE (4096 - sizeof(unsigned int)) -+ -+struct req_dbg_data { -+ unsigned int nbytes; -+ char str[DBG_REQ_BUF_SIZE]; -+}; -+ -+static int req_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ struct mmc_request *mrq; -+ struct mmc_command *cmd, *stop; -+ struct mmc_data *data; -+ struct req_dbg_data *priv; -+ char *str; -+ unsigned long n = 0; -+ -+ priv = kzalloc(DBG_REQ_BUF_SIZE, GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ str = priv->str; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ -+ spin_lock_irq(&host->mmc->lock); -+ mrq = host->mrq; -+ if (mrq) { -+ cmd = mrq->cmd; -+ data = mrq->data; -+ stop = mrq->stop; -+ n = snprintf(str, DBG_REQ_BUF_SIZE, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ cmd->opcode, cmd->arg, cmd->flags, -+ cmd->resp[0], cmd->resp[1], cmd->resp[2], -+ cmd->resp[3], cmd->error); -+ if (n < DBG_REQ_BUF_SIZE && data) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "DATA %u * %u (%u) %x (err %u)\n", -+ data->blocks, data->blksz, -+ data->bytes_xfered, data->flags, -+ data->error); -+ if (n < DBG_REQ_BUF_SIZE && stop) -+ n += snprintf(str + n, DBG_REQ_BUF_SIZE - n, -+ "CMD%u(0x%x) %x %x %x %x %x (err %u)\n", -+ stop->opcode, stop->arg, stop->flags, -+ stop->resp[0], stop->resp[1], -+ stop->resp[2], stop->resp[3], -+ stop->error); -+ } -+ spin_unlock_irq(&host->mmc->lock); -+ mutex_unlock(&inode->i_mutex); -+ -+ priv->nbytes = min(n, DBG_REQ_BUF_SIZE); -+ file->private_data = priv; -+ -+ return 0; -+} -+ -+static ssize_t req_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct req_dbg_data *priv = file->private_data; -+ -+ return simple_read_from_buffer(buf, nbytes, ppos, -+ priv->str, priv->nbytes); -+} -+ -+static int req_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations req_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = req_dbg_open, -+ .llseek = no_llseek, -+ .read = req_dbg_read, -+ .release = req_dbg_release, -+}; -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct atmel_mci *host; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ host = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&host->mmc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(host->regs + i * 4); -+ spin_unlock_irq(&host->mmc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+static const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ struct mmc_host *mmc; -+ struct dentry *root, *regs; -+ struct resource *res; -+ -+ mmc = host->mmc; -+ root = debugfs_create_dir(mmc_hostname(mmc), NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ host->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, host, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); -+ regs->d_inode->i_size = res->end - res->start + 1; -+ host->debugfs_regs = regs; -+ -+ host->debugfs_req = debugfs_create_file("req", 0400, root, -+ host, &req_dbg_fops); -+ if (!host->debugfs_req) -+ goto err_req; -+ -+ host->debugfs_pending_events -+ = debugfs_create_u32("pending_events", 0400, root, -+ (u32 *)&host->pending_events); -+ if (!host->debugfs_pending_events) -+ goto err_pending_events; -+ -+ host->debugfs_completed_events -+ = debugfs_create_u32("completed_events", 0400, root, -+ (u32 *)&host->completed_events); -+ if (!host->debugfs_completed_events) -+ goto err_completed_events; -+ -+ return; -+ -+err_completed_events: -+ debugfs_remove(host->debugfs_pending_events); -+err_pending_events: -+ debugfs_remove(host->debugfs_req); -+err_req: -+ debugfs_remove(host->debugfs_regs); -+err_regs: -+ debugfs_remove(host->debugfs_root); -+err_root: -+ host->debugfs_root = NULL; -+ dev_err(&host->pdev->dev, -+ "failed to initialize debugfs for %s\n", -+ mmc_hostname(mmc)); -+} -+ -+static void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ if (host->debugfs_root) { -+ debugfs_remove(host->debugfs_completed_events); -+ debugfs_remove(host->debugfs_pending_events); -+ debugfs_remove(host->debugfs_req); -+ debugfs_remove(host->debugfs_regs); -+ debugfs_remove(host->debugfs_root); -+ host->debugfs_root = NULL; -+ } -+} -+#else -+static inline void atmci_init_debugfs(struct atmel_mci *host) -+{ -+ -+} -+ -+static inline void atmci_cleanup_debugfs(struct atmel_mci *host) -+{ -+ -+} -+#endif /* CONFIG_DEBUG_FS */ -+ -+static inline unsigned int ns_to_clocks(struct atmel_mci *host, -+ unsigned int ns) -+{ -+ return (ns * (host->bus_hz / 1000000) + 999) / 1000; -+} -+ -+static void atmci_set_timeout(struct atmel_mci *host, -+ struct mmc_data *data) -+{ -+ static unsigned dtomul_to_shift[] = { -+ 0, 4, 7, 8, 10, 12, 16, 20 -+ }; -+ unsigned timeout; -+ unsigned dtocyc, dtomul; -+ -+ timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks; -+ -+ for (dtomul = 0; dtomul < 8; dtomul++) { -+ unsigned shift = dtomul_to_shift[dtomul]; -+ dtocyc = (timeout + (1 << shift) - 1) >> shift; -+ if (dtocyc < 15) -+ break; -+ } -+ -+ if (dtomul >= 8) { -+ dtomul = 7; -+ dtocyc = 15; -+ } -+ -+ dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n", -+ dtocyc << dtomul_to_shift[dtomul]); -+ mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul) -+ | MCI_BF(DTOCYC, dtocyc))); -+} -+ -+/* -+ * Return mask with command flags to be enabled for this command. -+ */ -+static u32 atmci_prepare_command(struct mmc_host *mmc, -+ struct mmc_command *cmd) -+{ -+ u32 cmdr; -+ -+ cmd->error = MMC_ERR_NONE; -+ -+ cmdr = MCI_BF(CMDNB, cmd->opcode); -+ -+ if (cmd->flags & MMC_RSP_PRESENT) { -+ if (cmd->flags & MMC_RSP_136) -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_136_BIT); -+ else -+ cmdr |= MCI_BF(RSPTYP, MCI_RSPTYP_48_BIT); -+ } -+ -+ /* -+ * This should really be MAXLAT_5 for CMD2 and ACMD41, but -+ * it's too difficult to determine whether this is an ACMD or -+ * not. Better make it 64. -+ */ -+ cmdr |= MCI_BIT(MAXLAT); -+ -+ if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) -+ cmdr |= MCI_BIT(OPDCMD); -+ -+ dev_dbg(&mmc->class_dev, -+ "cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n", -+ cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr); -+ -+ return cmdr; -+} -+ -+static void atmci_start_command(struct atmel_mci *host, -+ struct mmc_command *cmd, -+ u32 cmd_flags) -+{ -+ WARN_ON(host->cmd); -+ host->cmd = cmd; -+ -+ mci_writel(host, ARGR, cmd->arg); -+ mci_writel(host, CMDR, cmd_flags); -+ -+ if (cmd->data) -+ dma_start_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+} -+ -+/* -+ * Returns a mask of flags to be set in the command register when the -+ * command to start the transfer is to be sent. -+ */ -+static u32 atmci_prepare_data(struct mmc_host *mmc, struct mmc_data *data) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 cmd_flags; -+ -+ WARN_ON(host->data); -+ host->data = data; -+ -+ atmci_set_timeout(host, data); -+ mci_writel(host, BLKR, (MCI_BF(BCNT, data->blocks) -+ | MCI_BF(BLKLEN, data->blksz))); -+ host->dma.req.block_size = data->blksz; -+ host->dma.req.nr_blocks = data->blocks; -+ -+ cmd_flags = MCI_BF(TRCMD, MCI_TRCMD_START_TRANS); -+ if (data->flags & MMC_DATA_STREAM) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else if (data->blocks > 1) -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ else -+ cmd_flags |= MCI_BF(TRTYP, MCI_TRTYP_BLOCK); -+ -+ if (data->flags & MMC_DATA_READ) { -+ cmd_flags |= MCI_BIT(TRDIR); -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_FROM_DEVICE); -+ host->dma.req.periph_id = host->dma.rx_periph_id; -+ host->dma.req.direction = DMA_DIR_PERIPH_TO_MEM; -+ host->dma.req.data_reg = host->mapbase + MCI_RDR; -+ } else { -+ host->dma.req.nr_sg -+ = dma_map_sg(&host->pdev->dev, data->sg, -+ data->sg_len, DMA_TO_DEVICE); -+ host->dma.req.periph_id = host->dma.tx_periph_id; -+ host->dma.req.direction = DMA_DIR_MEM_TO_PERIPH; -+ host->dma.req.data_reg = host->mapbase + MCI_TDR; -+ } -+ host->dma.req.sg = data->sg; -+ -+ dma_prepare_request_sg(host->dma.req.req.dmac, &host->dma.req); -+ -+ return cmd_flags; -+} -+ -+static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_data *data = mrq->data; -+ u32 iflags; -+ u32 cmdflags = 0; -+ -+ iflags = mci_readl(host, IMR); -+ if (iflags) -+ dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n", -+ mci_readl(host, IMR)); -+ -+ WARN_ON(host->mrq != NULL); -+ host->mrq = mrq; -+ host->pending_events = 0; -+ host->completed_events = 0; -+ -+ iflags = MCI_BIT(CMDRDY); -+ cmdflags = atmci_prepare_command(mmc, mrq->cmd); -+ -+ if (mrq->stop) { -+ WARN_ON(!data); -+ -+ host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop); -+ host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS); -+ if (!(data->flags & MMC_DATA_WRITE)) -+ host->stop_cmdr |= MCI_BIT(TRDIR); -+ if (data->flags & MMC_DATA_STREAM) -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_STREAM); -+ else -+ host->stop_cmdr |= MCI_BF(TRTYP, MCI_TRTYP_MULTI_BLOCK); -+ } -+ if (data) { -+ cmdflags |= atmci_prepare_data(mmc, data); -+ iflags |= MCI_DATA_ERROR_FLAGS; -+ } -+ -+ atmci_start_command(host, mrq->cmd, cmdflags); -+ mci_writel(host, IER, iflags); -+} -+ -+static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 mr; -+ -+ if (ios->clock) { -+ u32 clkdiv; -+ -+ /* Set clock rate */ -+ clkdiv = host->bus_hz / (2 * ios->clock) - 1; -+ if (clkdiv > 255) { -+ dev_warn(&mmc->class_dev, -+ "clock %u too slow; using %lu\n", -+ ios->clock, host->bus_hz / (2 * 256)); -+ clkdiv = 255; -+ } -+ -+ mr = mci_readl(host, MR); -+ mr = MCI_BFINS(CLKDIV, clkdiv, mr) -+ | MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF); -+ mci_writel(host, MR, mr); -+ -+ /* Enable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } else { -+ /* Disable the MCI controller */ -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ } -+ -+ switch (ios->bus_width) { -+ case MMC_BUS_WIDTH_1: -+ mci_writel(host, SDCR, 0); -+ break; -+ case MMC_BUS_WIDTH_4: -+ mci_writel(host, SDCR, MCI_BIT(SDCBUS)); -+ break; -+ } -+ -+ switch (ios->power_mode) { -+ case MMC_POWER_ON: -+ /* Send init sequence (74 clock cycles) */ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD)); -+ while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY))) -+ cpu_relax(); -+ break; -+ default: -+ /* -+ * TODO: None of the currently available AVR32-based -+ * boards allow MMC power to be turned off. Implement -+ * power control when this can be tested properly. -+ */ -+ break; -+ } -+} -+ -+static int atmci_get_ro(struct mmc_host *mmc) -+{ -+ int read_only = 0; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ if (host->wp_pin >= 0) { -+ read_only = gpio_get_value(host->wp_pin); -+ dev_dbg(&mmc->class_dev, "card is %s\n", -+ read_only ? "read-only" : "read-write"); -+ } else { -+ dev_dbg(&mmc->class_dev, -+ "no pin for checking read-only switch." -+ " Assuming write-enable.\n"); -+ } -+ -+ return read_only; -+} -+ -+static struct mmc_host_ops atmci_ops = { -+ .request = atmci_request, -+ .set_ios = atmci_set_ios, -+ .get_ro = atmci_get_ro, -+}; -+ -+static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ WARN_ON(host->cmd || host->data); -+ host->mrq = NULL; -+ -+ mmc_request_done(mmc, mrq); -+} -+ -+static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data, -+ u32 flags) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ atmci_start_command(host, data->stop, host->stop_cmdr | flags); -+ mci_writel(host, IER, MCI_BIT(CMDRDY)); -+} -+ -+static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data) -+{ -+ host->data = NULL; -+ dma_unmap_sg(&host->pdev->dev, data->sg, host->dma.req.nr_sg, -+ ((data->flags & MMC_DATA_WRITE) -+ ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); -+ -+ /* -+ * Data might complete before command for very short transfers -+ * (like READ_SCR) -+ */ -+ if (mci_cmd_is_complete(host) -+ && (!data->stop || mci_stop_is_complete(host))) -+ atmci_request_end(host->mmc, data->mrq); -+} -+ -+static void atmci_command_complete(struct atmel_mci *host, -+ struct mmc_command *cmd, u32 status) -+{ -+ if (status & MCI_BIT(RTOE)) -+ cmd->error = MMC_ERR_TIMEOUT; -+ else if ((cmd->flags & MMC_RSP_CRC) -+ && (status & MCI_BIT(RCRCE))) -+ cmd->error = MMC_ERR_BADCRC; -+ else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE))) -+ cmd->error = MMC_ERR_FAILED; -+ -+ if (cmd->error != MMC_ERR_NONE) { -+ dev_dbg(&host->mmc->class_dev, -+ "command error: op=0x%x status=0x%08x\n", -+ cmd->opcode, status); -+ -+ if (cmd->data) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ mci_writel(host, IDR, MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS); -+ host->data = NULL; -+ } -+ } -+} -+ -+static void atmci_tasklet_func(unsigned long priv) -+{ -+ struct mmc_host *mmc = (struct mmc_host *)priv; -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_request *mrq = host->mrq; -+ struct mmc_data *data = host->data; -+ -+ dev_vdbg(&mmc->class_dev, -+ "tasklet: pending/completed/mask %lx/%lx/%x\n", -+ host->pending_events, host->completed_events, -+ mci_readl(host, IMR)); -+ -+ if (mci_clear_cmd_is_pending(host)) { -+ mci_set_cmd_complete(host); -+ atmci_command_complete(host, mrq->cmd, host->cmd_status); -+ if (!host->data || mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_stop_is_pending(host)) { -+ mci_set_stop_complete(host); -+ atmci_command_complete(host, mrq->stop, host->stop_status); -+ if (mci_data_is_complete(host) -+ || mci_data_error_is_complete(host)) -+ atmci_request_end(mmc, mrq); -+ } -+ if (mci_clear_dma_error_is_pending(host)) { -+ mci_set_dma_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ /* DMA controller got bus error => invalid address */ -+ data->error = MMC_ERR_INVALID; -+ -+ dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n", -+ host->data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_error_is_pending(host)) { -+ u32 status = host->data_status; -+ -+ mci_set_data_error_complete(host); -+ mci_clear_data_pending(host); -+ -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (status & MCI_BIT(DCRCE)) { -+ dev_dbg(&mmc->class_dev, "data CRC error\n"); -+ data->error = MMC_ERR_BADCRC; -+ } else if (status & MCI_BIT(DTOE)) { -+ dev_dbg(&mmc->class_dev, "data timeout error\n"); -+ data->error = MMC_ERR_TIMEOUT; -+ } else { -+ dev_dbg(&mmc->class_dev, "data FIFO error\n"); -+ data->error = MMC_ERR_FIFO; -+ } -+ dev_dbg(&mmc->class_dev, "bytes xfered: %u\n", -+ data->bytes_xfered); -+ -+ if (data->stop -+ && !mci_set_stop_sent_is_completed(host)) -+ /* TODO: Check if card is still present */ -+ send_stop_cmd(host->mmc, data, 0); -+ -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_data_is_pending(host)) { -+ mci_set_data_complete(host); -+ data->bytes_xfered = data->blocks * data->blksz; -+ atmci_data_complete(host, data); -+ } -+ if (mci_clear_card_detect_is_pending(host)) { -+ /* Reset controller if card is gone */ -+ if (!host->present) { -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIEN)); -+ } -+ -+ /* Clean up queue if present */ -+ if (mrq) { -+ if (!mci_cmd_is_complete(host)) -+ mrq->cmd->error = MMC_ERR_TIMEOUT; -+ if (mrq->data && !mci_data_is_complete(host) -+ && !mci_data_error_is_complete(host)) { -+ dma_stop_request(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ host->data->error = MMC_ERR_TIMEOUT; -+ atmci_data_complete(host, data); -+ } -+ if (mrq->stop && !mci_stop_is_complete(host)) -+ mrq->stop->error = MMC_ERR_TIMEOUT; -+ -+ host->cmd = NULL; -+ atmci_request_end(mmc, mrq); -+ } -+ mmc_detect_change(host->mmc, msecs_to_jiffies(100)); -+ } -+} -+ -+static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status) -+{ -+ struct atmel_mci *host = mmc_priv(mmc); -+ struct mmc_command *cmd = host->cmd; -+ -+ /* -+ * Read the response now so that we're free to send a new -+ * command immediately. -+ */ -+ cmd->resp[0] = mci_readl(host, RSPR); -+ cmd->resp[1] = mci_readl(host, RSPR); -+ cmd->resp[2] = mci_readl(host, RSPR); -+ cmd->resp[3] = mci_readl(host, RSPR); -+ -+ mci_writel(host, IDR, MCI_BIT(CMDRDY)); -+ host->cmd = NULL; -+ -+ if (mci_stop_sent_is_complete(host)) { -+ host->stop_status = status; -+ mci_set_stop_pending(host); -+ } else { -+ if (host->mrq->stop && mci_dma_is_complete(host) -+ && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, host->data, 0); -+ host->cmd_status = status; -+ mci_set_cmd_pending(host); -+ } -+ -+ tasklet_schedule(&host->tasklet); -+} -+ -+static void atmci_xfer_complete(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ struct mmc_data *data; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ data = host->data; -+ -+ /* -+ * This callback may be called before we see the CMDRDY -+ * interrupt under heavy irq load (possibly caused by other -+ * drivers) or when interrupts are disabled for a long time. -+ */ -+ mci_set_dma_complete(host); -+ if (data->stop && mci_cmd_is_complete(host) -+ && !mci_set_stop_sent_is_completed(host)) -+ send_stop_cmd(host->mmc, data, 0); -+ -+ /* -+ * Regardless of what the documentation says, we have to wait -+ * for NOTBUSY even after block read operations. -+ * -+ * When the DMA transfer is complete, the controller may still -+ * be reading the CRC from the card, i.e. the data transfer is -+ * still in progress and we haven't seen all the potential -+ * error bits yet. -+ */ -+ mci_writel(host, IER, MCI_BIT(NOTBUSY)); -+} -+ -+static void atmci_dma_error(struct dma_request *_req) -+{ -+ struct dma_request_sg *req = to_dma_request_sg(_req); -+ struct atmel_mci_dma *dma; -+ struct atmel_mci *host; -+ -+ dma = container_of(req, struct atmel_mci_dma, req); -+ host = container_of(dma, struct atmel_mci, dma); -+ -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ -+ mci_set_dma_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+} -+ -+static irqreturn_t atmci_interrupt(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ u32 status, mask, pending; -+ -+ spin_lock(&mmc->lock); -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ -+ do { -+ if (pending & MCI_DATA_ERROR_FLAGS) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ host->data_status = status; -+ mci_set_data_error_pending(host); -+ tasklet_schedule(&host->tasklet); -+ break; -+ } -+ if (pending & MCI_BIT(CMDRDY)) -+ atmci_cmd_interrupt(mmc, status); -+ if (pending & MCI_BIT(NOTBUSY)) { -+ mci_writel(host, IDR, (MCI_BIT(NOTBUSY) -+ | MCI_DATA_ERROR_FLAGS)); -+ mci_set_data_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ -+ status = mci_readl(host, SR); -+ mask = mci_readl(host, IMR); -+ pending = status & mask; -+ } while (pending); -+ -+ spin_unlock(&mmc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t atmci_detect_change(int irq, void *dev_id) -+{ -+ struct mmc_host *mmc = dev_id; -+ struct atmel_mci *host = mmc_priv(mmc); -+ -+ int present = !gpio_get_value(irq_to_gpio(irq)); -+ -+ if (present != host->present) { -+ dev_dbg(&mmc->class_dev, "card %s\n", -+ present ? "inserted" : "removed"); -+ host->present = present; -+ mci_set_card_detect_pending(host); -+ tasklet_schedule(&host->tasklet); -+ } -+ return IRQ_HANDLED; -+} -+ -+static int __devinit atmci_probe(struct platform_device *pdev) -+{ -+ struct mci_platform_data *board; -+ struct atmel_mci *host; -+ struct mmc_host *mmc; -+ struct resource *regs; -+ int irq; -+ int ret; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ board = pdev->dev.platform_data; -+ -+ mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev); -+ if (!mmc) -+ return -ENOMEM; -+ -+ host = mmc_priv(mmc); -+ host->pdev = pdev; -+ host->mmc = mmc; -+ if (board) { -+ host->detect_pin = board->detect_pin; -+ host->wp_pin = board->wp_pin; -+ } else { -+ host->detect_pin = -1; -+ host->detect_pin = -1; -+ } -+ -+ host->mck = clk_get(&pdev->dev, "mci_clk"); -+ if (IS_ERR(host->mck)) { -+ ret = PTR_ERR(host->mck); -+ goto out_free_host; -+ } -+ clk_enable(host->mck); -+ -+ ret = -ENOMEM; -+ host->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!host->regs) -+ goto out_disable_clk; -+ -+ host->bus_hz = clk_get_rate(host->mck); -+ host->mapbase = regs->start; -+ -+ mmc->ops = &atmci_ops; -+ mmc->f_min = (host->bus_hz + 511) / 512; -+ mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax); -+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; -+ mmc->caps |= MMC_CAP_4_BIT_DATA; -+ -+ tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc); -+ -+ ret = request_irq(irq, atmci_interrupt, 0, "mmci", mmc); -+ if (ret) -+ goto out_unmap; -+ -+ /* Assume card is present if we don't have a detect pin */ -+ host->present = 1; -+ if (host->detect_pin >= 0) { -+ if (gpio_request(host->detect_pin, "mmc_detect")) { -+ dev_dbg(&mmc->class_dev, "no detect pin available\n"); -+ host->detect_pin = -1; -+ } else { -+ host->present = !gpio_get_value(host->detect_pin); -+ } -+ } -+ if (host->wp_pin >= 0) { -+ if (gpio_request(host->wp_pin, "mmc_wp")) { -+ dev_dbg(&mmc->class_dev, "no WP pin available\n"); -+ host->wp_pin = -1; -+ } -+ } -+ -+ /* TODO: Get this information from platform data */ -+ ret = -ENOMEM; -+ host->dma.req.req.dmac = find_dma_controller(0); -+ if (!host->dma.req.req.dmac) { -+ dev_dbg(&mmc->class_dev, "no DMA controller available\n"); -+ goto out_free_irq; -+ } -+ ret = dma_alloc_channel(host->dma.req.req.dmac); -+ if (ret < 0) { -+ dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n"); -+ goto out_free_irq; -+ } -+ host->dma.req.req.channel = ret; -+ host->dma.req.width = DMA_WIDTH_32BIT; -+ host->dma.req.req.xfer_complete = atmci_xfer_complete; -+ host->dma.req.req.block_complete = NULL; // atmci_block_complete; -+ host->dma.req.req.error = atmci_dma_error; -+ host->dma.rx_periph_id = 0; -+ host->dma.tx_periph_id = 1; -+ -+ mci_writel(host, CR, MCI_BIT(SWRST)); -+ mci_writel(host, IDR, ~0UL); -+ -+ platform_set_drvdata(pdev, host); -+ -+ mmc_add_host(mmc); -+ -+ if (host->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(host->detect_pin), -+ atmci_detect_change, -+ IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, -+ DRIVER_NAME, mmc); -+ if (ret) { -+ dev_dbg(&mmc->class_dev, -+ "could not request IRQ %d for detect pin\n", -+ gpio_to_irq(host->detect_pin)); -+ gpio_free(host->detect_pin); -+ host->detect_pin = -1; -+ } -+ } -+ -+ dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n", -+ host->mapbase, irq); -+ -+ atmci_init_debugfs(host); -+ -+ return 0; -+ -+out_free_irq: -+ if (host->detect_pin >= 0) -+ gpio_free(host->detect_pin); -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ free_irq(irq, mmc); -+out_unmap: -+ iounmap(host->regs); -+out_disable_clk: -+ clk_disable(host->mck); -+ clk_put(host->mck); -+out_free_host: -+ mmc_free_host(mmc); -+ return ret; -+} -+ -+static int __devexit atmci_remove(struct platform_device *pdev) -+{ -+ struct atmel_mci *host = platform_get_drvdata(pdev); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ if (host) { -+ atmci_cleanup_debugfs(host); -+ -+ if (host->detect_pin >= 0) { -+ free_irq(gpio_to_irq(host->detect_pin), host->mmc); -+ cancel_delayed_work(&host->mmc->detect); -+ gpio_free(host->detect_pin); -+ } -+ -+ mmc_remove_host(host->mmc); -+ -+ mci_writel(host, IDR, ~0UL); -+ mci_writel(host, CR, MCI_BIT(MCIDIS)); -+ mci_readl(host, SR); -+ -+ dma_release_channel(host->dma.req.req.dmac, -+ host->dma.req.req.channel); -+ -+ if (host->wp_pin >= 0) -+ gpio_free(host->wp_pin); -+ -+ free_irq(platform_get_irq(pdev, 0), host->mmc); -+ iounmap(host->regs); -+ -+ clk_disable(host->mck); -+ clk_put(host->mck); -+ -+ mmc_free_host(host->mmc); -+ } -+ return 0; -+} -+ -+static struct platform_driver atmci_driver = { -+ .probe = atmci_probe, -+ .remove = __devexit_p(atmci_remove), -+ .driver = { -+ .name = DRIVER_NAME, -+ }, -+}; -+ -+static int __init atmci_init(void) -+{ -+ return platform_driver_register(&atmci_driver); -+} -+ -+static void __exit atmci_exit(void) -+{ -+ platform_driver_unregister(&atmci_driver); -+} -+ -+module_init(atmci_init); -+module_exit(atmci_exit); -+ -+MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h -new file mode 100644 -index 0000000..60d15c4 ---- /dev/null -+++ b/drivers/mmc/host/atmel-mci.h -@@ -0,0 +1,192 @@ -+/* -+ * Atmel MultiMedia Card Interface driver -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __DRIVERS_MMC_ATMEL_MCI_H__ -+#define __DRIVERS_MMC_ATMEL_MCI_H__ -+ -+/* MCI register offsets */ -+#define MCI_CR 0x0000 -+#define MCI_MR 0x0004 -+#define MCI_DTOR 0x0008 -+#define MCI_SDCR 0x000c -+#define MCI_ARGR 0x0010 -+#define MCI_CMDR 0x0014 -+#define MCI_BLKR 0x0018 -+#define MCI_RSPR 0x0020 -+#define MCI_RSPR1 0x0024 -+#define MCI_RSPR2 0x0028 -+#define MCI_RSPR3 0x002c -+#define MCI_RDR 0x0030 -+#define MCI_TDR 0x0034 -+#define MCI_SR 0x0040 -+#define MCI_IER 0x0044 -+#define MCI_IDR 0x0048 -+#define MCI_IMR 0x004c -+ -+/* Bitfields in CR */ -+#define MCI_MCIEN_OFFSET 0 -+#define MCI_MCIEN_SIZE 1 -+#define MCI_MCIDIS_OFFSET 1 -+#define MCI_MCIDIS_SIZE 1 -+#define MCI_PWSEN_OFFSET 2 -+#define MCI_PWSEN_SIZE 1 -+#define MCI_PWSDIS_OFFSET 3 -+#define MCI_PWSDIS_SIZE 1 -+#define MCI_SWRST_OFFSET 7 -+#define MCI_SWRST_SIZE 1 -+ -+/* Bitfields in MR */ -+#define MCI_CLKDIV_OFFSET 0 -+#define MCI_CLKDIV_SIZE 8 -+#define MCI_PWSDIV_OFFSET 8 -+#define MCI_PWSDIV_SIZE 3 -+#define MCI_RDPROOF_OFFSET 11 -+#define MCI_RDPROOF_SIZE 1 -+#define MCI_WRPROOF_OFFSET 12 -+#define MCI_WRPROOF_SIZE 1 -+#define MCI_DMAPADV_OFFSET 14 -+#define MCI_DMAPADV_SIZE 1 -+#define MCI_BLKLEN_OFFSET 16 -+#define MCI_BLKLEN_SIZE 16 -+ -+/* Bitfields in DTOR */ -+#define MCI_DTOCYC_OFFSET 0 -+#define MCI_DTOCYC_SIZE 4 -+#define MCI_DTOMUL_OFFSET 4 -+#define MCI_DTOMUL_SIZE 3 -+ -+/* Bitfields in SDCR */ -+#define MCI_SDCSEL_OFFSET 0 -+#define MCI_SDCSEL_SIZE 4 -+#define MCI_SDCBUS_OFFSET 7 -+#define MCI_SDCBUS_SIZE 1 -+ -+/* Bitfields in ARGR */ -+#define MCI_ARG_OFFSET 0 -+#define MCI_ARG_SIZE 32 -+ -+/* Bitfields in CMDR */ -+#define MCI_CMDNB_OFFSET 0 -+#define MCI_CMDNB_SIZE 6 -+#define MCI_RSPTYP_OFFSET 6 -+#define MCI_RSPTYP_SIZE 2 -+#define MCI_SPCMD_OFFSET 8 -+#define MCI_SPCMD_SIZE 3 -+#define MCI_OPDCMD_OFFSET 11 -+#define MCI_OPDCMD_SIZE 1 -+#define MCI_MAXLAT_OFFSET 12 -+#define MCI_MAXLAT_SIZE 1 -+#define MCI_TRCMD_OFFSET 16 -+#define MCI_TRCMD_SIZE 2 -+#define MCI_TRDIR_OFFSET 18 -+#define MCI_TRDIR_SIZE 1 -+#define MCI_TRTYP_OFFSET 19 -+#define MCI_TRTYP_SIZE 2 -+ -+/* Bitfields in BLKR */ -+#define MCI_BCNT_OFFSET 0 -+#define MCI_BCNT_SIZE 16 -+ -+/* Bitfields in RSPRn */ -+#define MCI_RSP_OFFSET 0 -+#define MCI_RSP_SIZE 32 -+ -+/* Bitfields in SR/IER/IDR/IMR */ -+#define MCI_CMDRDY_OFFSET 0 -+#define MCI_CMDRDY_SIZE 1 -+#define MCI_RXRDY_OFFSET 1 -+#define MCI_RXRDY_SIZE 1 -+#define MCI_TXRDY_OFFSET 2 -+#define MCI_TXRDY_SIZE 1 -+#define MCI_BLKE_OFFSET 3 -+#define MCI_BLKE_SIZE 1 -+#define MCI_DTIP_OFFSET 4 -+#define MCI_DTIP_SIZE 1 -+#define MCI_NOTBUSY_OFFSET 5 -+#define MCI_NOTBUSY_SIZE 1 -+#define MCI_ENDRX_OFFSET 6 -+#define MCI_ENDRX_SIZE 1 -+#define MCI_ENDTX_OFFSET 7 -+#define MCI_ENDTX_SIZE 1 -+#define MCI_RXBUFF_OFFSET 14 -+#define MCI_RXBUFF_SIZE 1 -+#define MCI_TXBUFE_OFFSET 15 -+#define MCI_TXBUFE_SIZE 1 -+#define MCI_RINDE_OFFSET 16 -+#define MCI_RINDE_SIZE 1 -+#define MCI_RDIRE_OFFSET 17 -+#define MCI_RDIRE_SIZE 1 -+#define MCI_RCRCE_OFFSET 18 -+#define MCI_RCRCE_SIZE 1 -+#define MCI_RENDE_OFFSET 19 -+#define MCI_RENDE_SIZE 1 -+#define MCI_RTOE_OFFSET 20 -+#define MCI_RTOE_SIZE 1 -+#define MCI_DCRCE_OFFSET 21 -+#define MCI_DCRCE_SIZE 1 -+#define MCI_DTOE_OFFSET 22 -+#define MCI_DTOE_SIZE 1 -+#define MCI_OVRE_OFFSET 30 -+#define MCI_OVRE_SIZE 1 -+#define MCI_UNRE_OFFSET 31 -+#define MCI_UNRE_SIZE 1 -+ -+/* Constants for DTOMUL */ -+#define MCI_DTOMUL_1_CYCLE 0 -+#define MCI_DTOMUL_16_CYCLES 1 -+#define MCI_DTOMUL_128_CYCLES 2 -+#define MCI_DTOMUL_256_CYCLES 3 -+#define MCI_DTOMUL_1024_CYCLES 4 -+#define MCI_DTOMUL_4096_CYCLES 5 -+#define MCI_DTOMUL_65536_CYCLES 6 -+#define MCI_DTOMUL_1048576_CYCLES 7 -+ -+/* Constants for RSPTYP */ -+#define MCI_RSPTYP_NO_RESP 0 -+#define MCI_RSPTYP_48_BIT 1 -+#define MCI_RSPTYP_136_BIT 2 -+ -+/* Constants for SPCMD */ -+#define MCI_SPCMD_NO_SPEC_CMD 0 -+#define MCI_SPCMD_INIT_CMD 1 -+#define MCI_SPCMD_SYNC_CMD 2 -+#define MCI_SPCMD_INT_CMD 4 -+#define MCI_SPCMD_INT_RESP 5 -+ -+/* Constants for TRCMD */ -+#define MCI_TRCMD_NO_TRANS 0 -+#define MCI_TRCMD_START_TRANS 1 -+#define MCI_TRCMD_STOP_TRANS 2 -+ -+/* Constants for TRTYP */ -+#define MCI_TRTYP_BLOCK 0 -+#define MCI_TRTYP_MULTI_BLOCK 1 -+#define MCI_TRTYP_STREAM 2 -+ -+/* Bit manipulation macros */ -+#define MCI_BIT(name) \ -+ (1 << MCI_##name##_OFFSET) -+#define MCI_BF(name,value) \ -+ (((value) & ((1 << MCI_##name##_SIZE) - 1)) \ -+ << MCI_##name##_OFFSET) -+#define MCI_BFEXT(name,value) \ -+ (((value) >> MCI_##name##_OFFSET) \ -+ & ((1 << MCI_##name##_SIZE) - 1)) -+#define MCI_BFINS(name,value,old) \ -+ (((old) & ~(((1 << MCI_##name##_SIZE) - 1) \ -+ << MCI_##name##_OFFSET)) \ -+ | MCI_BF(name,value)) -+ -+/* Register access macros */ -+#define mci_readl(port,reg) \ -+ __raw_readl((port)->regs + MCI_##reg) -+#define mci_writel(port,reg,value) \ -+ __raw_writel((value), (port)->regs + MCI_##reg) -+ -+#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ -diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c -index 2f19fa7..94304ca 100644 ---- a/drivers/mtd/chips/cfi_cmdset_0001.c -+++ b/drivers/mtd/chips/cfi_cmdset_0001.c -@@ -50,6 +50,7 @@ - #define I82802AC 0x00ac - #define MANUFACTURER_ST 0x0020 - #define M50LPW080 0x002F -+#define AT49BV640D 0x02de - - static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp) - } - #endif - -+/* Atmel chips don't use the same PRI format as Intel chips */ -+static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) -+{ -+ struct map_info *map = mtd->priv; -+ struct cfi_private *cfi = map->fldrv_priv; -+ struct cfi_pri_intelext *extp = cfi->cmdset_priv; -+ struct cfi_pri_atmel atmel_pri; -+ uint32_t features = 0; -+ -+ /* Reverse byteswapping */ -+ extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport); -+ extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask); -+ extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr); -+ -+ memcpy(&atmel_pri, extp, sizeof(atmel_pri)); -+ memset((char *)extp + 5, 0, sizeof(*extp) - 5); -+ -+ printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features); -+ -+ if (atmel_pri.Features & 0x01) /* chip erase supported */ -+ features |= (1<<0); -+ if (atmel_pri.Features & 0x02) /* erase suspend supported */ -+ features |= (1<<1); -+ if (atmel_pri.Features & 0x04) /* program suspend supported */ -+ features |= (1<<2); -+ if (atmel_pri.Features & 0x08) /* simultaneous operations supported */ -+ features |= (1<<9); -+ if (atmel_pri.Features & 0x20) /* page mode read supported */ -+ features |= (1<<7); -+ if (atmel_pri.Features & 0x40) /* queued erase supported */ -+ features |= (1<<4); -+ if (atmel_pri.Features & 0x80) /* Protection bits supported */ -+ features |= (1<<6); -+ -+ extp->FeatureSupport = features; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; -+} -+ - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ - static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) -@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param) - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, - #endif -diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c -index 1f64458..205977b 100644 ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) - extp->TopBottom = 2; - else - extp->TopBottom = 3; -+ -+ /* burst write mode not supported */ -+ cfi->cfiq->BufWriteTimeoutTyp = 0; -+ cfi->cfiq->BufWriteTimeoutMax = 0; - } - - static void fixup_use_secsi(struct mtd_info *mtd, void *param) -@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param) - } - - static struct cfi_fixup cfi_fixup_table[] = { -+ { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef AMD_BOOTLOC_BUG - { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, - #endif -@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = { - #if !FORCE_WORD_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, - #endif -- { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - { 0, 0, NULL, NULL } - }; - static struct cfi_fixup jedec_fixup_table[] = { -diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig -index c0c77f8..7623315 100644 ---- a/drivers/pcmcia/Kconfig -+++ b/drivers/pcmcia/Kconfig -@@ -271,6 +271,13 @@ config AT91_CF - Say Y here to support the CompactFlash controller on AT91 chips. - Or choose M to compile the driver as a module named "at91_cf". - -+config AT32_CF -+ tristate "AT32AP CompactFlash Controller" -+ depends on PCMCIA && AVR32 && PLATFORM_AT32AP -+ help -+ Say Y here to support the CompactFlash controller on AT32 chips. -+ Or choose M to compile the driver as a module named "at32_cf". -+ - config PCCARD_NONSTATIC - tristate - -diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile -index 4276965..08d7ffa 100644 ---- a/drivers/pcmcia/Makefile -+++ b/drivers/pcmcia/Makefile -@@ -37,6 +37,7 @@ obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o - obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o - obj-$(CONFIG_OMAP_CF) += omap_cf.o - obj-$(CONFIG_AT91_CF) += at91_cf.o -+obj-$(CONFIG_AT32_CF) += at32_cf.o - - sa11xx_core-y += soc_common.o sa11xx_base.o - pxa2xx_core-y += soc_common.o pxa2xx_base.o -diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c -new file mode 100644 -index 0000000..ebe1495 ---- /dev/null -+++ b/drivers/pcmcia/at32_cf.c -@@ -0,0 +1,531 @@ -+/* -+ * Driver for AVR32 Static Memory Controller: CompactFlash support -+ * -+ * Copyright (C) 2006 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+#include <linux/module.h> -+#include <linux/kernel.h> -+#include <linux/platform_device.h> -+#include <linux/init.h> -+#include <linux/device.h> -+#include <linux/delay.h> -+#include <linux/interrupt.h> -+#include <linux/err.h> -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+ -+#include <pcmcia/ss.h> -+ -+#include <asm/gpio.h> -+#include <asm/io.h> -+#include <asm/arch/board.h> -+ -+#include <asm/arch/smc.h> -+ -+struct at32_cf_socket { -+ struct pcmcia_socket socket; -+ int detect_pin; -+ int reset_pin; -+ int vcc_pin; -+ int ready_pin; -+ struct resource res_attr; -+ struct resource res_mem; -+ struct resource res_io; -+ struct smc_config smc; -+ unsigned int irq; -+ unsigned int cf_cs; -+ socket_state_t state; -+ unsigned present:1; -+}; -+#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket) -+ -+/* -+ * We have the following memory layout relative to the base address: -+ * -+ * Alt IDE Mode: 00e0 0000 -> 00ff ffff -+ * True IDE Mode: 00c0 0000 -> 00df ffff -+ * I/O memory: 0080 0000 -> 00bf ffff -+ * Common memory: 0040 0000 -> 007f ffff -+ * Attribute memory: 0000 0000 -> 003f ffff -+ */ -+#define CF_ATTR_OFFSET 0x00000000 -+#define CF_MEM_OFFSET 0x00400000 -+#define CF_IO_OFFSET 0x00800000 -+#define CF_RES_SIZE 4096 -+ -+#ifdef DEBUG -+ -+static int pc_debug; -+module_param(pc_debug, int, 0644); -+ -+static void at32_cf_debug(struct at32_cf_socket *cf, const char *func, -+ int level, const char *fmt, ...) -+{ -+ va_list args; -+ -+ if (pc_debug > level) { -+ printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func); -+ va_start(args, fmt); -+ vprintk(fmt, args); -+ va_end(args); -+ } -+} -+ -+#define debug(cf, lvl, fmt, arg...) \ -+ at32_cf_debug(cf, __func__, lvl, fmt, ##arg) -+ -+#else -+#define debug(cf, lvl, fmt, arg...) do { } while (0) -+#endif -+ -+static inline int at32_cf_present(struct at32_cf_socket *cf) -+{ -+ int present = 1; -+ -+ /* If we don't have a detect pin, assume the card is present */ -+ if (cf->detect_pin >= 0) -+ present = !gpio_get_value(cf->detect_pin); -+ -+ return present; -+} -+ -+static irqreturn_t at32_cf_irq(int irq, void *dev_id) -+{ -+ struct at32_cf_socket *cf = dev_id; -+ unsigned int present; -+ -+ present = at32_cf_present(cf); -+ if (present != cf->present) { -+ cf->present = present; -+ debug(cf, 3, "card %s\n", present ? "present" : "gone"); -+ pcmcia_parse_events(&cf->socket, SS_DETECT); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value) -+{ -+ struct at32_cf_socket *cf; -+ u_int status = 0; -+ -+ cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ if (at32_cf_present(cf)) { -+ /* NOTE: gpio on AP7xxx is 3.3V */ -+ status = SS_DETECT | SS_3VCARD; -+ if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin)) -+ status |= SS_READY; -+ if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin)) -+ status |= SS_POWERON; -+ } -+ -+ *value = status; -+ return 0; -+} -+ -+static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state) -+{ -+ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", -+ (state->csc_mask==0)?"<NONE> ":"", -+ (state->csc_mask&SS_DETECT)?"DETECT ":"", -+ (state->csc_mask&SS_READY)?"READY ":"", -+ (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"", -+ (state->csc_mask&SS_BATWARN)?"BATWARN ":"", -+ (state->csc_mask&SS_STSCHG)?"STSCHG ":"", -+ (state->flags==0)?"<NONE> ":"", -+ (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"", -+ (state->flags&SS_IOCARD)?"IOCARD ":"", -+ (state->flags&SS_RESET)?"RESET ":"", -+ (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"", -+ (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"", -+ state->Vcc, state->Vpp, state->io_irq); -+ -+ /* -+ * TODO: Allow boards to override this in case they have level -+ * converters. -+ */ -+ switch (state->Vcc) { -+ case 0: -+ if (cf->vcc_pin >= 0) -+ gpio_set_value(cf->vcc_pin, 0); -+ break; -+ case 33: -+ if (cf->vcc_pin >= 0) -+ gpio_set_value(cf->vcc_pin, 1); -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (cf->reset_pin >= 0) -+ gpio_set_value(cf->reset_pin, state->flags & SS_RESET); -+ -+ cf->state = *state; -+ -+ return 0; -+} -+ -+static int at32_cf_socket_init(struct pcmcia_socket *sock) -+{ -+ debug(to_at32_cf(sock), 2, "called\n"); -+ -+ return 0; -+} -+ -+static int at32_cf_suspend(struct pcmcia_socket *sock) -+{ -+ debug(to_at32_cf(sock), 2, "called\n"); -+ -+ at32_cf_set_socket(sock, &dead_socket); -+ -+ return 0; -+} -+ -+static int at32_cf_set_io_map(struct pcmcia_socket *sock, -+ struct pccard_io_map *map) -+{ -+ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); -+ int retval; -+ -+ debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", -+ map->map, map->speed, map->start, map->stop); -+ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", -+ (map->flags == 0) ? "<NONE>":"", -+ (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", -+ (map->flags & MAP_16BIT) ? "16BIT " : "", -+ (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", -+ (map->flags & MAP_0WS) ? "0WS " : "", -+ (map->flags & MAP_WRPROT) ? "WRPROT " : "", -+ (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", -+ (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); -+ -+ map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT; -+ -+ if (map->flags & MAP_16BIT) -+ cf->smc.bus_width = 2; -+ else -+ cf->smc.bus_width = 1; -+ -+ if (map->flags & MAP_USE_WAIT) -+ cf->smc.nwait_mode = 3; -+ else -+ cf->smc.nwait_mode = 0; -+ -+ retval = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (retval) { -+ printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n"); -+ return retval; -+ } -+ -+ map->start = cf->socket.io_offset; -+ map->stop = map->start + CF_RES_SIZE - 1; -+ -+ return 0; -+} -+ -+static int -+at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map) -+{ -+ struct at32_cf_socket *cf; -+ struct resource *res; -+ int retval; -+ -+ cf = container_of(sock, struct at32_cf_socket, socket); -+ -+ debug(cf, 2, "map %u speed %u card_start %08x\n", -+ map->map, map->speed, map->card_start); -+ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", -+ (map->flags==0)?"<NONE>":"", -+ (map->flags&MAP_ACTIVE)?"ACTIVE ":"", -+ (map->flags&MAP_16BIT)?"16BIT ":"", -+ (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", -+ (map->flags&MAP_0WS)?"0WS ":"", -+ (map->flags&MAP_WRPROT)?"WRPROT ":"", -+ (map->flags&MAP_ATTRIB)?"ATTRIB ":"", -+ (map->flags&MAP_USE_WAIT)?"USE_WAIT ":""); -+ -+ if (map->card_start) -+ return -EINVAL; -+ -+ map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT; -+ -+ if (map->flags & MAP_ATTRIB) { -+ res = &cf->res_attr; -+ -+ /* Linksys WCF12 seems to use WAIT when reading CIS */ -+ map->flags |= MAP_USE_WAIT; -+ } else { -+ res = &cf->res_mem; -+ } -+ -+ if (map->flags & MAP_USE_WAIT) -+ cf->smc.nwait_mode = 3; -+ else -+ cf->smc.nwait_mode = 0; -+ -+ retval = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (retval) { -+ printk(KERN_ERR "at32_cf: could not set up SMC for mem\n"); -+ return retval; -+ } -+ -+ map->static_start = res->start; -+ -+ return 0; -+} -+ -+static struct pccard_operations at32_cf_ops = { -+ .init = at32_cf_socket_init, -+ .suspend = at32_cf_suspend, -+ .get_status = at32_cf_get_status, -+ .set_socket = at32_cf_set_socket, -+ .set_io_map = at32_cf_set_io_map, -+ .set_mem_map = at32_cf_set_mem_map, -+}; -+ -+static int __init request_pin(struct platform_device *pdev, -+ unsigned int pin, const char *name) -+{ -+ if (gpio_request(pin, name)) { -+ dev_warn(&pdev->dev, "failed to request %s pin\n", name); -+ return -1; -+ } -+ -+ return pin; -+} -+ -+static struct smc_timing at32_cf_timing __initdata = { -+ .ncs_read_setup = 30, -+ .nrd_setup = 100, -+ .ncs_write_setup = 30, -+ .nwe_setup = 100, -+ -+ .ncs_read_pulse = 360, -+ .nrd_pulse = 290, -+ .ncs_write_pulse = 360, -+ .nwe_pulse = 290, -+ -+ .read_cycle = 420, -+ .write_cycle = 420, -+}; -+ -+static int __init at32_cf_probe(struct platform_device *pdev) -+{ -+ struct at32_cf_socket *cf; -+ struct cf_platform_data *board = pdev->dev.platform_data; -+ struct resource *res_skt; -+ int irq; -+ int ret; -+ -+ dev_dbg(&pdev->dev, "probe"); -+ -+ if (!board) -+ return -ENXIO; -+ -+ res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res_skt) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL); -+ if (!cf) -+ return -ENOMEM; -+ -+ cf->detect_pin = -1; -+ cf->reset_pin = -1; -+ cf->vcc_pin = -1; -+ cf->ready_pin = -1; -+ cf->cf_cs = board->cs; -+ -+ if (board->detect_pin) -+ cf->detect_pin = request_pin(pdev, board->detect_pin, -+ "cf_detect"); -+ if (board->reset_pin) -+ cf->reset_pin = request_pin(pdev, board->reset_pin, -+ "cf_reset"); -+ if (board->vcc_pin) -+ cf->vcc_pin = request_pin(pdev, board->reset_pin, -+ "cf_vcc"); -+ if (board->ready_pin) -+ /* READY is also used for irq through EIM */ -+ cf->ready_pin = board->ready_pin; -+ -+ debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n", -+ cf->detect_pin, cf->reset_pin, cf->vcc_pin); -+ -+ cf->socket.pci_irq = irq; -+ cf->socket.ops = &at32_cf_ops; -+ cf->socket.resource_ops = &pccard_static_ops; -+ cf->socket.dev.parent = &pdev->dev; -+ cf->socket.owner = THIS_MODULE; -+ cf->socket.features = -+ SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD; -+ cf->socket.map_size = CF_RES_SIZE; -+ -+ cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET; -+ cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1; -+ cf->res_attr.name = "attribute"; -+ cf->res_attr.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_attr); -+ if (ret) -+ goto err_request_res_attr; -+ -+ cf->res_mem.start = res_skt->start + CF_MEM_OFFSET; -+ cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1; -+ cf->res_mem.name = "memory"; -+ cf->res_mem.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_mem); -+ if (ret) -+ goto err_request_res_mem; -+ -+ cf->res_io.start = res_skt->start + CF_IO_OFFSET; -+ cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1; -+ cf->res_io.name = "io"; -+ cf->res_io.flags = IORESOURCE_MEM; -+ ret = request_resource(res_skt, &cf->res_io); -+ if (ret) -+ goto err_request_res_io; -+ -+ cf->socket.io_offset = cf->res_io.start; -+ -+ if (cf->detect_pin >= 0) { -+ ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq, -+ IRQF_SHARED, "cf_detect", cf); -+ if (ret) { -+ debug(cf, 1, -+ "failed to request cf_detect interrupt\n"); -+ goto err_detect_irq; -+ } -+ } -+ -+ /* Setup SMC timings */ -+ smc_set_timing(&cf->smc, &at32_cf_timing); -+ -+ cf->smc.bus_width = 2; -+ cf->smc.nrd_controlled = 1; -+ cf->smc.nwe_controlled = 1; -+ cf->smc.nwait_mode = 0; -+ cf->smc.byte_write = 0; -+ cf->smc.tdf_cycles = 8; -+ cf->smc.tdf_mode = 0; -+ -+ ret = smc_set_configuration(cf->cf_cs, &cf->smc); -+ if (ret) { -+ debug(cf, 1, "failed to configure SMC\n", ret); -+ goto err_smc; -+ } -+ -+ ret = pcmcia_register_socket(&cf->socket); -+ if (ret) { -+ debug(cf, 1, "failed to register socket: %d\n", ret); -+ goto err_register_socket; -+ } -+ -+ if (cf->reset_pin >= 0) -+ gpio_direction_output(cf->reset_pin, 0); -+ -+ platform_set_drvdata(pdev, cf); -+ -+ dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n", -+ (unsigned long)res_skt->start); -+ -+ return 0; -+ -+err_register_socket: -+err_smc: -+ if (cf->detect_pin >= 0) -+ free_irq(gpio_to_irq(cf->detect_pin), cf); -+err_detect_irq: -+ release_resource(&cf->res_io); -+err_request_res_io: -+ release_resource(&cf->res_mem); -+err_request_res_mem: -+ release_resource(&cf->res_attr); -+err_request_res_attr: -+ if (cf->vcc_pin >= 0) -+ gpio_free(cf->vcc_pin); -+ if (cf->reset_pin >= 0) -+ gpio_free(cf->reset_pin); -+ if (cf->detect_pin >= 0) -+ gpio_free(cf->detect_pin); -+ kfree(cf); -+ -+ return ret; -+} -+ -+static int __exit at32_cf_remove(struct platform_device *pdev) -+{ -+ struct at32_cf_socket *cf = platform_get_drvdata(pdev); -+ -+ pcmcia_unregister_socket(&cf->socket); -+ if (cf->detect_pin >= 0) { -+ free_irq(gpio_to_irq(cf->detect_pin), cf); -+ gpio_free(cf->detect_pin); -+ } -+ if (cf->vcc_pin >= 0) -+ gpio_free(cf->vcc_pin); -+ if (cf->reset_pin >= 0) -+ gpio_free(cf->reset_pin); -+ -+ release_resource(&cf->res_io); -+ release_resource(&cf->res_mem); -+ release_resource(&cf->res_attr); -+ kfree(cf); -+ platform_set_drvdata(pdev, NULL); -+ -+ return 0; -+} -+ -+static struct platform_driver at32_cf_driver = { -+ .remove = __exit_p(at32_cf_remove), -+ .driver = { -+ .name = "at32_cf", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init at32_cf_init(void) -+{ -+ int ret; -+ -+ ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe); -+ if (ret) -+ printk(KERN_ERR "at32_cf: probe failed: %d\n", ret); -+ return ret; -+} -+ -+static void __exit at32_cf_exit(void) -+{ -+ platform_driver_unregister(&at32_cf_driver); -+} -+ -+module_init(at32_cf_init); -+module_exit(at32_cf_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for SMC PCMCIA interface"); -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c -index d154dee..06a85d7 100644 ---- a/drivers/pcmcia/cistpl.c -+++ b/drivers/pcmcia/cistpl.c -@@ -25,6 +25,7 @@ - #include <linux/ioport.h> - #include <asm/io.h> - #include <asm/byteorder.h> -+#include <asm/unaligned.h> - - #include <pcmcia/cs_types.h> - #include <pcmcia/ss.h> -@@ -401,6 +402,15 @@ EXPORT_SYMBOL(pcmcia_replace_cis); - - ======================================================================*/ - -+static inline u16 cis_get_u16(void *ptr) -+{ -+ return le16_to_cpu(get_unaligned((__le16 *) ptr)); -+} -+static inline u32 cis_get_u32(void *ptr) -+{ -+ return le32_to_cpu(get_unaligned((__le32 *) ptr)); -+} -+ - typedef struct tuple_flags { - u_int link_space:4; - u_int has_link:1; -@@ -461,7 +471,7 @@ static int follow_link(struct pcmcia_socket *s, tuple_t *tuple) - /* Get indirect link from the MFC tuple */ - read_cis_cache(s, LINK_SPACE(tuple->Flags), - tuple->LinkOffset, 5, link); -- ofs = le32_to_cpu(*(__le32 *)(link+1)); -+ ofs = cis_get_u32(link + 1); - SPACE(tuple->Flags) = (link[0] == CISTPL_MFC_ATTR); - /* Move to the next indirect link */ - tuple->LinkOffset += 5; -@@ -668,10 +678,10 @@ static int parse_checksum(tuple_t *tuple, cistpl_checksum_t *csum) - u_char *p; - if (tuple->TupleDataLen < 5) - return CS_BAD_TUPLE; -- p = (u_char *)tuple->TupleData; -- csum->addr = tuple->CISOffset+(short)le16_to_cpu(*(__le16 *)p)-2; -- csum->len = le16_to_cpu(*(__le16 *)(p + 2)); -- csum->sum = *(p+4); -+ p = (u_char *) tuple->TupleData; -+ csum->addr = tuple->CISOffset + cis_get_u16(p) - 2; -+ csum->len = cis_get_u16(p + 2); -+ csum->sum = *(p + 4); - return CS_SUCCESS; - } - -@@ -681,7 +691,7 @@ static int parse_longlink(tuple_t *tuple, cistpl_longlink_t *link) - { - if (tuple->TupleDataLen < 4) - return CS_BAD_TUPLE; -- link->addr = le32_to_cpu(*(__le32 *)tuple->TupleData); -+ link->addr = cis_get_u32(tuple->TupleData); - return CS_SUCCESS; - } - -@@ -700,7 +710,8 @@ static int parse_longlink_mfc(tuple_t *tuple, - return CS_BAD_TUPLE; - for (i = 0; i < link->nfn; i++) { - link->fn[i].space = *p; p++; -- link->fn[i].addr = le32_to_cpu(*(__le32 *)p); p += 4; -+ link->fn[i].addr = cis_get_u32(p); -+ p += 4; - } - return CS_SUCCESS; - } -@@ -787,12 +798,10 @@ static int parse_jedec(tuple_t *tuple, cistpl_jedec_t *jedec) - - static int parse_manfid(tuple_t *tuple, cistpl_manfid_t *m) - { -- __le16 *p; - if (tuple->TupleDataLen < 4) - return CS_BAD_TUPLE; -- p = (__le16 *)tuple->TupleData; -- m->manf = le16_to_cpu(p[0]); -- m->card = le16_to_cpu(p[1]); -+ m->manf = cis_get_u16(tuple->TupleData); -+ m->card = cis_get_u16(tuple->TupleData + 2); - return CS_SUCCESS; - } - -@@ -1091,7 +1100,7 @@ static int parse_cftable_entry(tuple_t *tuple, - break; - case 0x20: - entry->mem.nwin = 1; -- entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8; -+ entry->mem.win[0].len = cis_get_u16(p) << 8; - entry->mem.win[0].card_addr = 0; - entry->mem.win[0].host_addr = 0; - p += 2; -@@ -1099,9 +1108,8 @@ static int parse_cftable_entry(tuple_t *tuple, - break; - case 0x40: - entry->mem.nwin = 1; -- entry->mem.win[0].len = le16_to_cpu(*(__le16 *)p) << 8; -- entry->mem.win[0].card_addr = -- le16_to_cpu(*(__le16 *)(p+2)) << 8; -+ entry->mem.win[0].len = cis_get_u16(p) << 8; -+ entry->mem.win[0].card_addr = cis_get_u16(p + 2) << 8; - entry->mem.win[0].host_addr = 0; - p += 4; - if (p > q) return CS_BAD_TUPLE; -@@ -1138,7 +1146,7 @@ static int parse_bar(tuple_t *tuple, cistpl_bar_t *bar) - p = (u_char *)tuple->TupleData; - bar->attr = *p; - p += 2; -- bar->size = le32_to_cpu(*(__le32 *)p); -+ bar->size = cis_get_u32(p); - return CS_SUCCESS; - } - -@@ -1151,7 +1159,7 @@ static int parse_config_cb(tuple_t *tuple, cistpl_config_t *config) - return CS_BAD_TUPLE; - config->last_idx = *(++p); - p++; -- config->base = le32_to_cpu(*(__le32 *)p); -+ config->base = cis_get_u32(p); - config->subtuples = tuple->TupleDataLen - 6; - return CS_SUCCESS; - } -@@ -1267,7 +1275,7 @@ static int parse_vers_2(tuple_t *tuple, cistpl_vers_2_t *v2) - - v2->vers = p[0]; - v2->comply = p[1]; -- v2->dindex = le16_to_cpu(*(__le16 *)(p+2)); -+ v2->dindex = cis_get_u16(p +2 ); - v2->vspec8 = p[6]; - v2->vspec9 = p[7]; - v2->nhdr = p[8]; -@@ -1308,8 +1316,8 @@ static int parse_format(tuple_t *tuple, cistpl_format_t *fmt) - - fmt->type = p[0]; - fmt->edc = p[1]; -- fmt->offset = le32_to_cpu(*(__le32 *)(p+2)); -- fmt->length = le32_to_cpu(*(__le32 *)(p+6)); -+ fmt->offset = cis_get_u32(p + 2); -+ fmt->length = cis_get_u32(p + 6); - - return CS_SUCCESS; - } -diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c -index b046974..bc90604 100644 ---- a/drivers/spi/atmel_spi.c -+++ b/drivers/spi/atmel_spi.c -@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi) - csr |= SPI_BIT(NCPHA); - - /* TODO: DLYBS and DLYBCT */ -- csr |= SPI_BF(DLYBS, 10); -- csr |= SPI_BF(DLYBCT, 10); -+ csr |= SPI_BF(DLYBS, 0); -+ csr |= SPI_BF(DLYBCT, 0); - - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned int)spi->controller_data; -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index 767aed5..f81d08d 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES - driver on a new board. Enable these files by choosing "Y" - here. If in doubt, or to conserve kernel memory, say "N". - -+config USB_GADGET_DEBUG_FS -+ boolean "Debugging information files in debugfs" -+ depends on USB_GADGET && DEBUG_FS -+ help -+ Some of the drivers in the "gadget" framework can expose -+ debugging information in files under /sys/kernel/debug/. -+ The information in these files may help when you're -+ troubleshooting or bringing up a driver on a new board. -+ Enable these files by choosing "Y" here. If in doubt, or -+ to conserve kernel memory, say "N". -+ - config USB_GADGET_SELECTED - boolean - -@@ -103,6 +114,20 @@ config USB_AMD5536UDC - default USB_GADGET - select USB_GADGET_SELECTED - -+config USB_GADGET_ATMEL_USBA -+ boolean "Atmel USBA" -+ select USB_GADGET_DUALSPEED -+ depends on AVR32 -+ help -+ USBA is the integrated high-speed USB Device controller on -+ the AT32AP700x processors from Atmel. -+ -+config USB_ATMEL_USBA -+ tristate -+ depends on USB_GADGET_ATMEL_USBA -+ default USB_GADGET -+ select USB_GADGET_SELECTED -+ - config USB_GADGET_FSL_USB2 - boolean "Freescale Highspeed USB DR Peripheral Controller" - depends on MPC834x || PPC_MPC831x -@@ -228,7 +253,6 @@ config USB_LH7A40X - default USB_GADGET - select USB_GADGET_SELECTED - -- - config USB_GADGET_OMAP - boolean "OMAP USB Device Controller" - depends on ARCH_OMAP -diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile -index 1bc0f03..904e57b 100644 ---- a/drivers/usb/gadget/Makefile -+++ b/drivers/usb/gadget/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP) += omap_udc.o - obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o - obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o - obj-$(CONFIG_USB_AT91) += at91_udc.o -+obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o - obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o - obj-$(CONFIG_USB_M66592) += m66592-udc.o - -diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c -new file mode 100644 -index 0000000..e35362d ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.c -@@ -0,0 +1,2038 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/module.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/list.h> -+#include <linux/platform_device.h> -+#include <linux/usb/ch9.h> -+#include <linux/usb_gadget.h> -+#include <linux/delay.h> -+ -+#include <asm/gpio.h> -+#include <asm/arch/board.h> -+ -+#include "atmel_usba_udc.h" -+ -+ -+static struct usba_udc the_udc; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+#include <linux/debugfs.h> -+#include <linux/uaccess.h> -+ -+static int queue_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_ep *ep = inode->i_private; -+ struct usba_request *req, *req_copy; -+ struct list_head *queue_data; -+ -+ queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); -+ if (!queue_data) -+ return -ENOMEM; -+ INIT_LIST_HEAD(queue_data); -+ -+ spin_lock_irq(&ep->udc->lock); -+ list_for_each_entry(req, &ep->queue, queue) { -+ req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC); -+ if (!req_copy) -+ goto fail; -+ memcpy(req_copy, req, sizeof(*req_copy)); -+ list_add_tail(&req_copy->queue, queue_data); -+ } -+ spin_unlock_irq(&ep->udc->lock); -+ -+ file->private_data = queue_data; -+ return 0; -+ -+fail: -+ spin_unlock_irq(&ep->udc->lock); -+ list_for_each_entry_safe(req, req_copy, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return -ENOMEM; -+} -+ -+/* -+ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 -+ * -+ * b: buffer address -+ * l: buffer length -+ * I/i: interrupt/no interrupt -+ * Z/z: zero/no zero -+ * S/s: short ok/short not ok -+ * s: status -+ * n: nr_packets -+ * F/f: submitted/not submitted to FIFO -+ * D/d: using/not using DMA -+ * L/l: last transaction/not last transaction -+ */ -+static ssize_t queue_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct list_head *queue = file->private_data; -+ struct usba_request *req, *tmp_req; -+ size_t len, remaining, actual = 0; -+ char tmpbuf[38]; -+ -+ if (!access_ok(VERIFY_WRITE, buf, nbytes)) -+ return -EFAULT; -+ -+ mutex_lock(&file->f_dentry->d_inode->i_mutex); -+ list_for_each_entry_safe(req, tmp_req, queue, queue) { -+ len = snprintf(tmpbuf, sizeof(tmpbuf), -+ "%8p %08x %c%c%c %5d %c%c%c\n", -+ req->req.buf, req->req.length, -+ req->req.no_interrupt ? 'i' : 'I', -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 's' : 'S', -+ req->req.status, -+ req->submitted ? 'F' : 'f', -+ req->using_dma ? 'D' : 'd', -+ req->last_transaction ? 'L' : 'l'); -+ len = min(len, sizeof(tmpbuf)); -+ if (len > nbytes) -+ break; -+ -+ list_del(&req->queue); -+ kfree(req); -+ -+ remaining = __copy_to_user(buf, tmpbuf, len); -+ actual += len - remaining; -+ if (remaining) -+ break; -+ -+ nbytes -= len; -+ buf += len; -+ } -+ mutex_unlock(&file->f_dentry->d_inode->i_mutex); -+ -+ return actual; -+} -+ -+static int queue_dbg_release(struct inode *inode, struct file *file) -+{ -+ struct list_head *queue_data = file->private_data; -+ struct usba_request *req, *tmp_req; -+ -+ list_for_each_entry_safe(req, tmp_req, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return 0; -+} -+ -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_udc *udc; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ udc = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&udc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(udc->regs + i * 4); -+ spin_unlock_irq(&udc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; -+ -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); -+ -+ return ret; -+} -+ -+static int regs_dbg_release(struct inode *inode, struct file *file) -+{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+const struct file_operations queue_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = queue_dbg_open, -+ .llseek = no_llseek, -+ .read = queue_dbg_read, -+ .release = queue_dbg_release, -+}; -+ -+const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ struct dentry *ep_root; -+ -+ ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); -+ if (!ep_root) -+ goto err_root; -+ ep->debugfs_dir = ep_root; -+ -+ ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, -+ ep, &queue_dbg_fops); -+ if (!ep->debugfs_queue) -+ goto err_queue; -+ -+ if (ep->can_dma) { -+ ep->debugfs_dma_status -+ = debugfs_create_u32("dma_status", 0400, ep_root, -+ &ep->last_dma_status); -+ if (!ep->debugfs_dma_status) -+ goto err_dma_status; -+ } -+ if (ep_is_control(ep)) { -+ ep->debugfs_state -+ = debugfs_create_u32("state", 0400, ep_root, -+ &ep->state); -+ if (!ep->debugfs_state) -+ goto err_state; -+ } -+ -+ return; -+ -+err_state: -+ if (ep->can_dma) -+ debugfs_remove(ep->debugfs_dma_status); -+err_dma_status: -+ debugfs_remove(ep->debugfs_queue); -+err_queue: -+ debugfs_remove(ep_root); -+err_root: -+ dev_err(&ep->udc->pdev->dev, -+ "failed to create debugfs directory for %s\n", ep->ep.name); -+} -+ -+static void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ debugfs_remove(ep->debugfs_queue); -+ debugfs_remove(ep->debugfs_dma_status); -+ debugfs_remove(ep->debugfs_state); -+ debugfs_remove(ep->debugfs_dir); -+ ep->debugfs_dma_status = NULL; -+ ep->debugfs_dir = NULL; -+} -+ -+static void usba_init_debugfs(struct usba_udc *udc) -+{ -+ struct dentry *root, *regs; -+ struct resource *regs_resource; -+ -+ root = debugfs_create_dir(udc->gadget.name, NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ udc->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; -+ -+ regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, -+ CTRL_IOMEM_ID); -+ regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; -+ udc->debugfs_regs = regs; -+ -+ usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); -+ -+ return; -+ -+err_regs: -+ debugfs_remove(root); -+err_root: -+ udc->debugfs_root = NULL; -+ dev_err(&udc->pdev->dev, "debugfs is not available\n"); -+} -+ -+static void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); -+ debugfs_remove(udc->debugfs_regs); -+ debugfs_remove(udc->debugfs_root); -+ udc->debugfs_regs = NULL; -+ udc->debugfs_root = NULL; -+} -+#else -+static inline void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ -+} -+ -+static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ -+} -+ -+static inline void usba_init_debugfs(struct usba_udc *udc) -+{ -+ -+} -+ -+static inline void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ -+} -+#endif -+ -+static int vbus_is_present(struct usba_udc *udc) -+{ -+ if (udc->vbus_pin != -1) -+ return gpio_get_value(udc->vbus_pin); -+ -+ /* No Vbus detection: Assume always present */ -+ return 1; -+} -+ -+static void copy_to_fifo(void __iomem *fifo, const void *buf, int len) -+{ -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len); -+ for (; len > 0; len -= 4, buf += 4, fifo += 4) { -+ tmp = *(unsigned long *)buf; -+ if (len >= 4) { -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ __raw_writel(tmp, fifo); -+ } else { -+ do { -+ DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24); -+ __raw_writeb(tmp >> 24, fifo); -+ fifo++; -+ tmp <<= 8; -+ } while (--len); -+ break; -+ } -+ } -+} -+ -+static void copy_from_fifo(void *buf, void __iomem *fifo, int len) -+{ -+ union { -+ unsigned long *w; -+ unsigned char *b; -+ } p; -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len); -+ for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) { -+ if (len >= 4) { -+ tmp = __raw_readl(fifo); -+ *p.w = tmp; -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ } else { -+ do { -+ tmp = __raw_readb(fifo); -+ *p.b = tmp; -+ DBG(DBG_FIFO, " -> %02lx\n", tmp); -+ fifo++, p.b++; -+ } while (--len); -+ } -+ } -+} -+ -+static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) -+{ -+ unsigned int transaction_len; -+ -+ transaction_len = req->req.length - req->req.actual; -+ req->last_transaction = 1; -+ if (transaction_len > ep->ep.maxpacket) { -+ transaction_len = ep->ep.maxpacket; -+ req->last_transaction = 0; -+ } else if (transaction_len == ep->ep.maxpacket && req->req.zero) -+ req->last_transaction = 0; -+ -+ DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", -+ ep->ep.name, req, transaction_len, -+ req->last_transaction ? ", done" : ""); -+ -+ copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ req->req.actual += transaction_len; -+} -+ -+static void submit_request(struct usba_ep *ep, struct usba_request *req) -+{ -+ DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", -+ ep->ep.name, req, req->req.length); -+ -+ req->req.actual = 0; -+ req->submitted = 1; -+ -+ if (req->using_dma) { -+ if (req->req.length == 0) { -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ return; -+ } -+ -+ if (req->req.zero) -+ usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); -+ else -+ usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); -+ -+ usba_dma_writel(ep, ADDRESS, req->req.dma); -+ usba_dma_writel(ep, CONTROL, req->ctrl); -+ } else { -+ next_fifo_transaction(ep, req); -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+ } else { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ } -+ } -+} -+ -+static void submit_next_request(struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ if (!req->submitted) -+ submit_request(ep, req); -+} -+ -+static void send_status(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ ep->state = STATUS_STAGE_IN; -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+} -+ -+static void receive_data(struct usba_ep *ep) -+{ -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req; -+ unsigned long status; -+ unsigned int bytecount, nr_busy; -+ int is_complete = 0; -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); -+ -+ while (nr_busy > 0) { -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ break; -+ } -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ bytecount = USBA_BFEXT(BYTE_COUNT, status); -+ -+ if (status & (1 << 31)) -+ is_complete = 1; -+ if (req->req.actual + bytecount >= req->req.length) { -+ is_complete = 1; -+ bytecount = req->req.length - req->req.actual; -+ } -+ -+ copy_from_fifo(req->req.buf + req->req.actual, -+ ep->fifo, bytecount); -+ req->req.actual += bytecount; -+ -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ -+ if (is_complete) { -+ DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); -+ req->req.status = 0; -+ list_del_init(&req->queue); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ spin_unlock(&udc->lock); -+ req->req.complete(&ep->ep, &req->req); -+ spin_lock(&udc->lock); -+ } -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ if (is_complete && ep_is_control(ep)) { -+ send_status(udc, ep); -+ break; -+ } -+ } -+} -+ -+static void -+request_complete(struct usba_ep *ep, struct usba_request *req, int status) -+{ -+ struct usba_udc *udc = ep->udc; -+ -+ WARN_ON(!list_empty(&req->queue)); -+ -+ if (req->req.status == -EINPROGRESS) -+ req->req.status = status; -+ -+ if (req->mapped) { -+ dma_unmap_single( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->req.dma = DMA_ADDR_INVALID; -+ req->mapped = 0; -+ } -+ -+ DBG(DBG_GADGET | DBG_REQ, -+ "%s: req %p complete: status %d, actual %u\n", -+ ep->ep.name, req, req->req.status, req->req.actual); -+ -+ spin_unlock(&udc->lock); -+ req->req.complete(&ep->ep, &req->req); -+ spin_lock(&udc->lock); -+} -+ -+static void -+request_complete_list(struct usba_ep *ep, struct list_head *list, int status) -+{ -+ struct usba_request *req, *tmp_req; -+ -+ list_for_each_entry_safe(req, tmp_req, list, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+} -+ -+static int -+usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags, ept_cfg, maxpacket; -+ unsigned int nr_trans; -+ -+ DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); -+ -+ maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff; -+ -+ if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) -+ || ep->index == 0 -+ || desc->bDescriptorType != USB_DT_ENDPOINT -+ || maxpacket == 0 -+ || maxpacket > ep->fifo_size) { -+ DBG(DBG_ERR, "ep_enable: Invalid argument"); -+ return -EINVAL; -+ } -+ -+ ep->is_isoc = 0; -+ ep->is_in = 0; -+ -+ if (maxpacket <= 8) -+ ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); -+ else -+ /* LSB is bit 1, not 0 */ -+ ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); -+ -+ DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", -+ ep->ep.name, ept_cfg, maxpacket); -+ -+ if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { -+ ep->is_in = 1; -+ ept_cfg |= USBA_EPT_DIR_IN; -+ } -+ -+ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { -+ case USB_ENDPOINT_XFER_CONTROL: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE); -+ break; -+ case USB_ENDPOINT_XFER_ISOC: -+ if (!ep->can_isoc) { -+ DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", -+ ep->ep.name); -+ return -EINVAL; -+ } -+ -+ /* -+ * Bits 11:12 specify number of _additional_ -+ * transactions per microframe. -+ */ -+ nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1; -+ if (nr_trans > 3) -+ return -EINVAL; -+ -+ ep->is_isoc = 1; -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); -+ -+ /* -+ * Do triple-buffering on high-bandwidth iso endpoints. -+ */ -+ if (nr_trans > 1 && ep->nr_banks == 3) -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE); -+ else -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ ept_cfg |= USBA_BF(NB_TRANS, nr_trans); -+ break; -+ case USB_ENDPOINT_XFER_BULK: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ break; -+ case USB_ENDPOINT_XFER_INT: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ break; -+ } -+ -+ spin_lock_irqsave(&ep->udc->lock, flags); -+ -+ if (ep->desc) { -+ spin_unlock_irqrestore(&ep->udc->lock, flags); -+ DBG(DBG_ERR, "ep%d already enabled\n", ep->index); -+ return -EBUSY; -+ } -+ -+ ep->desc = desc; -+ ep->ep.maxpacket = maxpacket; -+ -+ usba_ep_writel(ep, CFG, ept_cfg); -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ -+ if (ep->can_dma) { -+ u32 ctrl; -+ -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index) -+ | USBA_BF(DMA_INT, 1 << ep->index))); -+ ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; -+ usba_ep_writel(ep, CTL_ENB, ctrl); -+ } else { -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index))); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, -+ (unsigned long)usba_ep_readl(ep, CFG)); -+ DBG(DBG_HW, "INT_ENB after init: %#08lx\n", -+ (unsigned long)usba_readl(udc, INT_ENB)); -+ -+ return 0; -+} -+ -+static int usba_ep_disable(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ LIST_HEAD(req_list); -+ unsigned long flags; -+ -+ DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (!ep->desc) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name); -+ return -EINVAL; -+ } -+ ep->desc = NULL; -+ -+ list_splice_init(&ep->queue, &req_list); -+ if (ep->can_dma) { -+ usba_dma_writel(ep, CONTROL, 0); -+ usba_dma_writel(ep, ADDRESS, 0); -+ usba_dma_readl(ep, STATUS); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); -+ usba_writel(udc, INT_ENB, -+ usba_readl(udc, INT_ENB) -+ & ~USBA_BF(EPT_INT, 1 << ep->index)); -+ -+ request_complete_list(ep, &req_list, -ESHUTDOWN); -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+} -+ -+static struct usb_request * -+usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) -+{ -+ struct usba_request *req; -+ -+ DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); -+ -+ req = kzalloc(sizeof(*req), gfp_flags); -+ if (!req) -+ return NULL; -+ -+ INIT_LIST_HEAD(&req->queue); -+ req->req.dma = DMA_ADDR_INVALID; -+ -+ return &req->req; -+} -+ -+static void -+usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ -+ DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); -+ -+ kfree(req); -+} -+ -+static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, -+ struct usba_request *req, gfp_t gfp_flags) -+{ -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n", -+ ep->ep.name, req->req.length, req->req.dma, -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 'S' : 's', -+ req->req.no_interrupt ? 'I' : 'i'); -+ -+ if (req->req.length > 0x10000) { -+ /* Lengths from 0 to 65536 (inclusive) are supported */ -+ DBG(DBG_ERR, "invalid request length %u\n", req->req.length); -+ return -EINVAL; -+ } -+ -+ req->using_dma = 1; -+ -+ if (req->req.dma == DMA_ADDR_INVALID) { -+ req->req.dma = dma_map_single( -+ &udc->pdev->dev, req->req.buf, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 1; -+ } else { -+ dma_sync_single_for_device( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 0; -+ } -+ -+ req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) -+ | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE -+ | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; -+ -+ if (ep->is_in) -+ req->ctrl |= USBA_DMA_END_BUF_EN; -+ -+ /* -+ * Add this request to the queue and submit for DMA if -+ * possible. Check if we're still alive first -- we may have -+ * received a reset since last time we checked. -+ */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ if (list_empty(&ep->queue)) -+ submit_request(ep, req); -+ -+ list_add_tail(&req->queue, &ep->queue); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static int -+usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", -+ ep->ep.name, req, _req->length); -+ -+ if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc) -+ return -ESHUTDOWN; -+ -+ req->submitted = 0; -+ req->using_dma = 0; -+ req->last_transaction = 0; -+ -+ _req->status = -EINPROGRESS; -+ _req->actual = 0; -+ -+ if (ep->can_dma) -+ return queue_dma(udc, ep, req, gfp_flags); -+ -+ /* May have received a reset since last time we checked */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ list_add_tail(&req->queue, &ep->queue); -+ -+ if (ep->is_in || (ep_is_control(ep) -+ && (ep->state == DATA_STAGE_IN -+ || ep->state == STATUS_STAGE_IN))) -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ else -+ usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static void -+usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) -+{ -+ req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); -+} -+ -+static int stop_dma(struct usba_ep *ep, u32 *pstatus) -+{ -+ unsigned int timeout; -+ u32 status; -+ -+ /* -+ * Stop the DMA controller. When writing both CH_EN -+ * and LINK to 0, the other bits are not affected. -+ */ -+ usba_dma_writel(ep, CONTROL, 0); -+ -+ /* Wait for the FIFO to empty */ -+ for (timeout = 40; timeout; --timeout) { -+ status = usba_dma_readl(ep, STATUS); -+ if (!(status & USBA_DMA_CH_EN)) -+ break; -+ udelay(1); -+ } -+ -+ if (pstatus) -+ *pstatus = status; -+ -+ if (timeout == 0) { -+ dev_err(&ep->udc->pdev->dev, -+ "%s: timed out waiting for DMA FIFO to empty\n", -+ ep->ep.name); -+ return -ETIMEDOUT; -+ } -+ -+ return 0; -+} -+ -+static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req = to_usba_req(_req); -+ unsigned long flags; -+ u32 status; -+ -+ DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", -+ ep->ep.name, req); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (req->using_dma) { -+ /* -+ * If this request is currently being transferred, -+ * stop the DMA controller and reset the FIFO. -+ */ -+ if (ep->queue.next == &req->queue) { -+ status = usba_dma_readl(ep, STATUS); -+ if (status & USBA_DMA_CH_EN) -+ stop_dma(ep, &status); -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ -+ usba_writel(udc, EPT_RST, 1 << ep->index); -+ -+ usba_update_req(ep, req, status); -+ } -+ } -+ -+ /* -+ * Errors should stop the queue from advancing until the -+ * completion function returns. -+ */ -+ list_del_init(&req->queue); -+ -+ request_complete(ep, req, -ECONNRESET); -+ -+ /* Process the next request if any */ -+ submit_next_request(ep); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+} -+ -+static int usba_ep_set_halt(struct usb_ep *_ep, int value) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret = 0; -+ -+ DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, -+ value ? "set" : "clear"); -+ -+ if (!ep->desc) { -+ DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", -+ ep->ep.name); -+ return -ENODEV; -+ } -+ if (ep->is_isoc) { -+ DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", -+ ep->ep.name); -+ return -ENOTTY; -+ } -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ /* -+ * We can't halt IN endpoints while there are still data to be -+ * transferred -+ */ -+ if (!list_empty(&ep->queue) -+ || ((value && ep->is_in && (usba_ep_readl(ep, STA) -+ & USBA_BF(BUSY_BANKS, -1L))))) { -+ ret = -EAGAIN; -+ } else { -+ if (value) -+ usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); -+ else -+ usba_ep_writel(ep, CLR_STA, -+ USBA_FORCE_STALL | USBA_TOGGLE_CLR); -+ usba_ep_readl(ep, STA); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; -+} -+ -+static int usba_ep_fifo_status(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ -+ return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+} -+ -+static void usba_ep_fifo_flush(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ -+ usba_writel(udc, EPT_RST, 1 << ep->index); -+} -+ -+static const struct usb_ep_ops usba_ep_ops = { -+ .enable = usba_ep_enable, -+ .disable = usba_ep_disable, -+ .alloc_request = usba_ep_alloc_request, -+ .free_request = usba_ep_free_request, -+ .queue = usba_ep_queue, -+ .dequeue = usba_ep_dequeue, -+ .set_halt = usba_ep_set_halt, -+ .fifo_status = usba_ep_fifo_status, -+ .fifo_flush = usba_ep_fifo_flush, -+}; -+ -+static int usba_udc_get_frame(struct usb_gadget *gadget) -+{ -+ struct usba_udc *udc = to_usba_udc(gadget); -+ -+ return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); -+} -+ -+static const struct usb_gadget_ops usba_udc_ops = { -+ .get_frame = usba_udc_get_frame, -+}; -+ -+#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ -+{ \ -+ .ep = { \ -+ .ops = &usba_ep_ops, \ -+ .name = nam, \ -+ .maxpacket = maxpkt, \ -+ }, \ -+ .udc = &the_udc, \ -+ .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \ -+ .fifo_size = maxpkt, \ -+ .nr_banks = maxbk, \ -+ .index = idx, \ -+ .can_dma = dma, \ -+ .can_isoc = isoc, \ -+} -+ -+static struct usba_ep usba_ep[] = { -+ EP("ep0", 0, 64, 1, 0, 0), -+ EP("ep1in-bulk", 1, 512, 2, 1, 1), -+ EP("ep2out-bulk", 2, 512, 2, 1, 1), -+ EP("ep3in-int", 3, 64, 3, 1, 0), -+ EP("ep4out-int", 4, 64, 3, 1, 0), -+ EP("ep5in-iso", 5, 1024, 3, 1, 1), -+ EP("ep6out-iso", 6, 1024, 3, 1, 1), -+}; -+#undef EP -+ -+static struct usb_endpoint_descriptor usba_ep0_desc = { -+ .bLength = USB_DT_ENDPOINT_SIZE, -+ .bDescriptorType = USB_DT_ENDPOINT, -+ .bEndpointAddress = 0, -+ .bmAttributes = USB_ENDPOINT_XFER_CONTROL, -+ .wMaxPacketSize = __constant_cpu_to_le16(64), -+ /* FIXME: I have no idea what to put here */ -+ .bInterval = 1, -+}; -+ -+static void nop_release(struct device *dev) -+{ -+ -+} -+ -+static struct usba_udc the_udc = { -+ .gadget = { -+ .ops = &usba_udc_ops, -+ .ep0 = &usba_ep[0].ep, -+ .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), -+ .is_dualspeed = 1, -+ .name = "atmel_usba_udc", -+ .dev = { -+ .bus_id = "gadget", -+ .release = nop_release, -+ }, -+ }, -+ -+ .lock = SPIN_LOCK_UNLOCKED, -+}; -+ -+/* -+ * Called with interrupts disabled and udc->lock held. -+ */ -+static void reset_all_endpoints(struct usba_udc *udc) -+{ -+ struct usba_ep *ep; -+ struct usba_request *req, *tmp_req; -+ -+ usba_writel(udc, EPT_RST, ~0UL); -+ -+ ep = to_usba_ep(udc->gadget.ep0); -+ list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, -ECONNRESET); -+ } -+ -+ list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { -+ if (ep->desc) -+ usba_ep_disable(&ep->ep); -+ } -+} -+ -+static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) -+{ -+ struct usba_ep *ep; -+ -+ if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) -+ return to_usba_ep(udc->gadget.ep0); -+ -+ list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { -+ u8 bEndpointAddress; -+ -+ if (!ep->desc) -+ continue; -+ bEndpointAddress = ep->desc->bEndpointAddress; -+ if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) -+ continue; -+ if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) -+ == (wIndex & USB_ENDPOINT_NUMBER_MASK)) -+ return ep; -+ } -+ -+ return NULL; -+} -+ -+/* Called with interrupts disabled and udc->lock held */ -+static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); -+ ep->state = WAIT_FOR_SETUP; -+} -+ -+static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) -+ return 1; -+ return 0; -+} -+ -+static inline void set_address(struct usba_udc *udc, unsigned int addr) -+{ -+ u32 regval; -+ -+ DBG(DBG_BUS, "setting address %u...\n", addr); -+ regval = usba_readl(udc, CTRL); -+ regval = USBA_BFINS(DEV_ADDR, addr, regval); -+ usba_writel(udc, CTRL, regval); -+} -+ -+static int do_test_mode(struct usba_udc *udc) -+{ -+ static const char test_packet_buffer[] = { -+ /* JKJKJKJK * 9 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ /* JJKKJJKK * 8 */ -+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, -+ /* JJKKJJKK * 8 */ -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ /* JJJJJJJKKKKKKK * 8 */ -+ 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ /* JJJJJJJK * 8 */ -+ 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, -+ /* {JKKKKKKK * 10}, JK */ -+ 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E -+ }; -+ struct usba_ep *ep; -+ struct device *dev = &udc->pdev->dev; -+ int test_mode; -+ -+ test_mode = udc->test_mode; -+ -+ /* Start from a clean slate */ -+ reset_all_endpoints(udc); -+ -+ switch (test_mode) { -+ case 0x0100: -+ /* Test_J */ -+ usba_writel(udc, TST, USBA_TST_J_MODE); -+ dev_info(dev, "Entering Test_J mode...\n"); -+ break; -+ case 0x0200: -+ /* Test_K */ -+ usba_writel(udc, TST, USBA_TST_K_MODE); -+ dev_info(dev, "Entering Test_K mode...\n"); -+ break; -+ case 0x0300: -+ /* -+ * Test_SE0_NAK: Force high-speed mode and set up ep0 -+ * for Bulk IN transfers -+ */ -+ ep = &usba_ep[0]; -+ usba_writel(udc, TST, -+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_EPT_DIR_IN -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ dev_info(dev, "Entering Test_SE0_NAK mode...\n"); -+ } -+ break; -+ case 0x0400: -+ /* Test_Packet */ -+ ep = &usba_ep[0]; -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_EPT_DIR_IN -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_Packet: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ usba_writel(udc, TST, USBA_TST_PKT_MODE); -+ copy_to_fifo(ep->fifo, test_packet_buffer, -+ sizeof(test_packet_buffer)); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ dev_info(dev, "Entering Test_Packet mode...\n"); -+ } -+ break; -+ default: -+ dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+/* Avoid overly long expressions */ -+static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) -+ return true; -+ return false; -+} -+ -+static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE)) -+ return true; -+ return false; -+} -+ -+static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT)) -+ return true; -+ return false; -+} -+ -+static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, -+ struct usb_ctrlrequest *crq) -+{ -+ int retval = 0;; -+ -+ switch (crq->bRequest) { -+ case USB_REQ_GET_STATUS: { -+ u16 status; -+ -+ if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { -+ /* Self-powered, no remote wakeup */ -+ status = __constant_cpu_to_le16(1 << 0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_INTERFACE)) { -+ status = __constant_cpu_to_le16(0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { -+ struct usba_ep *target; -+ -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ status = 0; -+ if (is_stalled(udc, target)) -+ status |= __constant_cpu_to_le16(1); -+ } else -+ goto delegate; -+ -+ /* Write directly to the FIFO. No queueing is done. */ -+ if (crq->wLength != __constant_cpu_to_le16(sizeof(status))) -+ goto stall; -+ ep->state = DATA_STAGE_IN; -+ __raw_writew(status, ep->fifo); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ break; -+ } -+ -+ case USB_REQ_CLEAR_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ /* Can't CLEAR_FEATURE TEST_MODE */ -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (crq->wLength != __constant_cpu_to_le16(0) -+ || !feature_is_ep_halt(crq)) -+ goto stall; -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); -+ if (target->index != 0) -+ usba_ep_writel(target, CLR_STA, -+ USBA_TOGGLE_CLR); -+ } else { -+ goto delegate; -+ } -+ -+ send_status(udc, ep); -+ break; -+ } -+ -+ case USB_REQ_SET_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_test_mode(crq)) { -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_TEST; -+ udc->test_mode = le16_to_cpu(crq->wIndex); -+ return 0; -+ } else if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (crq->wLength != __constant_cpu_to_le16(0) -+ || !feature_is_ep_halt(crq)) -+ goto stall; -+ -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); -+ } else -+ goto delegate; -+ -+ send_status(udc, ep); -+ break; -+ } -+ -+ case USB_REQ_SET_ADDRESS: -+ if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) -+ goto delegate; -+ -+ set_address(udc, le16_to_cpu(crq->wValue)); -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_ADDR; -+ break; -+ -+ default: -+delegate: -+ spin_unlock(&udc->lock); -+ retval = udc->driver->setup(&udc->gadget, crq); -+ spin_lock(&udc->lock); -+ } -+ -+ return retval; -+ -+stall: -+ printk(KERN_ERR -+ "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " -+ "halting endpoint...\n", -+ ep->ep.name, crq->bRequestType, crq->bRequest, -+ le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), -+ le16_to_cpu(crq->wLength)); -+ set_protocol_stall(udc, ep); -+ return -1; -+} -+ -+static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+restart: -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", -+ ep->ep.name, ep->state, epstatus, epctrl); -+ -+ req = NULL; -+ if (!list_empty(&ep->queue)) -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+ } -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_TX_COMPLETE) { -+ usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); -+ -+ switch (ep->state) { -+ case DATA_STAGE_IN: -+ usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = STATUS_STAGE_OUT; -+ break; -+ case STATUS_STAGE_ADDR: -+ /* Activate our new address */ -+ usba_writel(udc, CTRL, (usba_readl(udc, CTRL) -+ | USBA_FADDR_EN)); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_IN: -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ submit_next_request(ep); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_TEST: -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ if (do_test_mode(udc)) -+ set_protocol_stall(udc, ep); -+ break; -+ default: -+ printk(KERN_ERR -+ "udc: %s: TXCOMP: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep->ep.name, ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_RX_BK_RDY) { -+ switch (ep->state) { -+ case STATUS_STAGE_OUT: -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ } -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ -+ case DATA_STAGE_OUT: -+ receive_data(ep); -+ break; -+ -+ default: -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ printk(KERN_ERR -+ "udc: %s: RXRDY: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep->ep.name, ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if (epstatus & USBA_RX_SETUP) { -+ union { -+ struct usb_ctrlrequest crq; -+ unsigned long data[2]; -+ } crq; -+ unsigned int pkt_len; -+ int ret; -+ -+ if (ep->state != WAIT_FOR_SETUP) { -+ /* -+ * Didn't expect a SETUP packet at this -+ * point. Clean up any pending requests (which -+ * may be successful). -+ */ -+ int status = -EPROTO; -+ -+ /* -+ * RXRDY and TXCOMP are dropped when SETUP -+ * packets arrive. Just pretend we received -+ * the status packet. -+ */ -+ if (ep->state == STATUS_STAGE_OUT -+ || ep->state == STATUS_STAGE_IN) { -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ status = 0; -+ } -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+ } -+ -+ pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+ DBG(DBG_HW, "Packet length: %u\n", pkt_len); -+ if (pkt_len != sizeof(crq)) { -+ printk(KERN_WARNING "udc: Invalid packet length %u " -+ "(expected %lu)\n", pkt_len, sizeof(crq)); -+ set_protocol_stall(udc, ep); -+ return; -+ } -+ -+ DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); -+ copy_from_fifo(crq.data, ep->fifo, sizeof(crq)); -+ -+ /* Free up one bank in the FIFO so that we can -+ * generate or receive a reply right away. */ -+ usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); -+ -+ /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", -+ ep->state, crq.crq.bRequestType, -+ crq.crq.bRequest); */ -+ -+ if (crq.crq.bRequestType & USB_DIR_IN) { -+ /* -+ * The USB 2.0 spec states that "if wLength is -+ * zero, there is no data transfer phase." -+ * However, testusb #14 seems to actually -+ * expect a data phase even if wLength = 0... -+ */ -+ ep->state = DATA_STAGE_IN; -+ } else { -+ if (crq.crq.wLength != __constant_cpu_to_le16(0)) -+ ep->state = DATA_STAGE_OUT; -+ else -+ ep->state = STATUS_STAGE_IN; -+ } -+ -+ ret = -1; -+ if (ep->index == 0) -+ ret = handle_ep0_setup(udc, ep, &crq.crq); -+ else { -+ spin_unlock(&udc->lock); -+ ret = udc->driver->setup(&udc->gadget, &crq.crq); -+ spin_lock(&udc->lock); -+ } -+ -+ DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", -+ crq.crq.bRequestType, crq.crq.bRequest, -+ le16_to_cpu(crq.crq.wLength), ep->state, ret); -+ -+ if (ret < 0) { -+ /* Let the host know that we failed */ -+ set_protocol_stall(udc, ep); -+ } -+ } -+} -+ -+static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); -+ -+ while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { -+ DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); -+ -+ if (list_empty(&ep->queue)) { -+ dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ -+ if (req->using_dma) { -+ /* Send a zero-length packet */ -+ usba_ep_writel(ep, SET_STA, -+ USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_DIS, -+ USBA_TX_PK_RDY); -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } else { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+ } -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ } -+ if ((epstatus & epctrl) & USBA_RX_BK_RDY) { -+ DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); -+ receive_data(ep); -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ } -+} -+ -+static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 status, control, pending; -+ -+ status = usba_dma_readl(ep, STATUS); -+ control = usba_dma_readl(ep, CONTROL); -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ pending = status & control; -+ DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); -+ -+ if (status & USBA_DMA_CH_EN) { -+ dev_err(&udc->pdev->dev, -+ "DMA_CH_EN is set after transfer is finished!\n"); -+ dev_err(&udc->pdev->dev, -+ "status=%#08x, pending=%#08x, control=%#08x\n", -+ status, pending, control); -+ -+ /* -+ * try to pretend nothing happened. We might have to -+ * do something here... -+ */ -+ } -+ -+ if (list_empty(&ep->queue)) -+ /* Might happen if a reset comes along at the right moment */ -+ return; -+ -+ if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ usba_update_req(ep, req, status); -+ -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+} -+ -+static irqreturn_t usba_udc_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ u32 status; -+ u32 dma_status; -+ u32 ep_status; -+ -+ spin_lock(&udc->lock); -+ -+ status = usba_readl(udc, INT_STA); -+ DBG(DBG_INT, "irq, status=%#08x\n", status); -+ -+ if (status & USBA_DET_SUSPEND) { -+ usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); -+ DBG(DBG_BUS, "Suspend detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->suspend) { -+ spin_unlock(&udc->lock); -+ udc->driver->suspend(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ } -+ -+ if (status & USBA_WAKE_UP) { -+ usba_writel(udc, INT_CLR, USBA_WAKE_UP); -+ DBG(DBG_BUS, "Wake Up CPU detected\n"); -+ } -+ -+ if (status & USBA_END_OF_RESUME) { -+ usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); -+ DBG(DBG_BUS, "Resume detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->resume) { -+ spin_unlock(&udc->lock); -+ udc->driver->resume(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ } -+ -+ dma_status = USBA_BFEXT(DMA_INT, status); -+ if (dma_status) { -+ int i; -+ -+ for (i = 1; i < USBA_NR_ENDPOINTS; i++) -+ if (dma_status & (1 << i)) -+ usba_dma_irq(udc, &usba_ep[i]); -+ } -+ -+ ep_status = USBA_BFEXT(EPT_INT, status); -+ if (ep_status) { -+ int i; -+ -+ for (i = 0; i < USBA_NR_ENDPOINTS; i++) -+ if (ep_status & (1 << i)) { -+ if (ep_is_control(&usba_ep[i])) -+ usba_control_irq(udc, &usba_ep[i]); -+ else -+ usba_ep_irq(udc, &usba_ep[i]); -+ } -+ } -+ -+ if (status & USBA_END_OF_RESET) { -+ struct usba_ep *ep0; -+ -+ usba_writel(udc, INT_CLR, USBA_END_OF_RESET); -+ reset_all_endpoints(udc); -+ -+ if (status & USBA_HIGH_SPEED) { -+ DBG(DBG_BUS, "High-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_HIGH; -+ } else { -+ DBG(DBG_BUS, "Full-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_FULL; -+ } -+ -+ ep0 = &usba_ep[0]; -+ ep0->desc = &usba_ep0_desc; -+ ep0->state = WAIT_FOR_SETUP; -+ usba_ep_writel(ep0, CFG, -+ (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) -+ | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); -+ usba_ep_writel(ep0, CTL_ENB, -+ USBA_EPT_ENABLE | USBA_RX_SETUP); -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1) -+ | USBA_DET_SUSPEND -+ | USBA_END_OF_RESUME)); -+ -+ if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) -+ dev_warn(&udc->pdev->dev, -+ "WARNING: EP0 configuration is invalid!\n"); -+ } -+ -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t usba_vbus_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ int vbus; -+ -+ /* debounce */ -+ udelay(10); -+ -+ spin_lock(&udc->lock); -+ -+ /* May happen if Vbus pin toggles during probe() */ -+ if (!udc->driver) -+ goto out; -+ -+ vbus = gpio_get_value(udc->vbus_pin); -+ if (vbus != udc->vbus_prev) { -+ if (vbus) { -+ usba_writel(udc, CTRL, USBA_EN_USBA); -+ usba_writel(udc, INT_ENB, USBA_END_OF_RESET); -+ } else { -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ usba_writel(udc, CTRL, 0); -+ spin_unlock(&udc->lock); -+ udc->driver->disconnect(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ udc->vbus_prev = vbus; -+ } -+ -+out: -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+int usb_gadget_register_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ int ret; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (udc->driver) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ return -EBUSY; -+ } -+ -+ udc->driver = driver; -+ udc->gadget.dev.driver = &driver->driver; -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ clk_enable(udc->pclk); -+ clk_enable(udc->hclk); -+ -+ ret = driver->bind(&udc->gadget); -+ if (ret) { -+ DBG(DBG_ERR, "Could not bind to driver %s: error %d\n", -+ driver->driver.name, ret); -+ goto err_driver_bind; -+ } -+ -+ DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name); -+ -+ udc->vbus_prev = 0; -+ if (udc->vbus_pin != -1) -+ enable_irq(gpio_to_irq(udc->vbus_pin)); -+ -+ /* If Vbus is present, enable the controller and wait for reset */ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (vbus_is_present(udc) && udc->vbus_prev == 0) { -+ usba_writel(udc, CTRL, USBA_EN_USBA); -+ usba_writel(udc, INT_ENB, USBA_END_OF_RESET); -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+ -+err_driver_bind: -+ udc->driver = NULL; -+ udc->gadget.dev.driver = NULL; -+ return ret; -+} -+EXPORT_SYMBOL(usb_gadget_register_driver); -+ -+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ if (driver != udc->driver) -+ return -EINVAL; -+ -+ if (udc->vbus_pin != -1) -+ disable_irq(gpio_to_irq(udc->vbus_pin)); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ /* This will also disable the DP pullup */ -+ usba_writel(udc, CTRL, 0); -+ -+ driver->unbind(&udc->gadget); -+ udc->gadget.dev.driver = NULL; -+ udc->driver = NULL; -+ -+ clk_disable(udc->hclk); -+ clk_disable(udc->pclk); -+ -+ DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name); -+ -+ return 0; -+} -+EXPORT_SYMBOL(usb_gadget_unregister_driver); -+ -+static int __init usba_udc_probe(struct platform_device *pdev) -+{ -+ struct usba_platform_data *pdata = pdev->dev.platform_data; -+ struct resource *regs, *fifo; -+ struct clk *pclk, *hclk; -+ struct usba_udc *udc = &the_udc; -+ int irq, ret, i; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); -+ fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); -+ if (!regs || !fifo) -+ return -ENXIO; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(hclk)) { -+ ret = PTR_ERR(hclk); -+ goto err_get_hclk; -+ } -+ -+ udc->pdev = pdev; -+ udc->pclk = pclk; -+ udc->hclk = hclk; -+ udc->vbus_pin = -1; -+ -+ ret = -ENOMEM; -+ udc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!udc->regs) { -+ dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); -+ goto err_map_regs; -+ } -+ dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", -+ (unsigned long)regs->start, udc->regs); -+ udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1); -+ if (!udc->fifo) { -+ dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); -+ goto err_map_fifo; -+ } -+ dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", -+ (unsigned long)fifo->start, udc->fifo); -+ -+ device_initialize(&udc->gadget.dev); -+ udc->gadget.dev.parent = &pdev->dev; -+ udc->gadget.dev.dma_mask = pdev->dev.dma_mask; -+ -+ platform_set_drvdata(pdev, udc); -+ -+ /* Make sure we start from a clean slate */ -+ clk_enable(pclk); -+ usba_writel(udc, CTRL, 0); -+ clk_disable(pclk); -+ -+ INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); -+ usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); -+ usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); -+ usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) { -+ struct usba_ep *ep = &usba_ep[i]; -+ -+ ep->ep_regs = udc->regs + USBA_EPT_BASE(i); -+ ep->dma_regs = udc->regs + USBA_DMA_BASE(i); -+ ep->fifo = udc->fifo + USBA_FIFO_BASE(i); -+ -+ list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); -+ } -+ -+ ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc); -+ if (ret) { -+ dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", -+ irq, ret); -+ goto err_request_irq; -+ } -+ udc->irq = irq; -+ -+ ret = device_add(&udc->gadget.dev); -+ if (ret) { -+ dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret); -+ goto err_device_add; -+ } -+ -+ if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) { -+ if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { -+ udc->vbus_pin = pdata->vbus_pin; -+ -+ ret = request_irq(gpio_to_irq(udc->vbus_pin), -+ usba_vbus_irq, 0, -+ "atmel_usba_udc", udc); -+ if (ret) { -+ gpio_free(udc->vbus_pin); -+ udc->vbus_pin = -1; -+ dev_warn(&udc->pdev->dev, -+ "failed to request vbus irq; " -+ "assuming always on\n"); -+ } else { -+ disable_irq(gpio_to_irq(udc->vbus_pin)); -+ } -+ } -+ } -+ -+ usba_init_debugfs(udc); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_init_debugfs(udc, &usba_ep[i]); -+ -+ return 0; -+ -+err_device_add: -+ free_irq(irq, udc); -+err_request_irq: -+ iounmap(udc->fifo); -+err_map_fifo: -+ iounmap(udc->regs); -+err_map_regs: -+ clk_put(hclk); -+err_get_hclk: -+ clk_put(pclk); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return ret; -+} -+ -+static int __exit usba_udc_remove(struct platform_device *pdev) -+{ -+ struct usba_udc *udc; -+ int i; -+ -+ udc = platform_get_drvdata(pdev); -+ -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_cleanup_debugfs(&usba_ep[i]); -+ usba_cleanup_debugfs(udc); -+ -+ if (udc->vbus_pin != -1) -+ gpio_free(udc->vbus_pin); -+ -+ free_irq(udc->irq, udc); -+ iounmap(udc->fifo); -+ iounmap(udc->regs); -+ clk_put(udc->hclk); -+ clk_put(udc->pclk); -+ -+ device_unregister(&udc->gadget.dev); -+ -+ return 0; -+} -+ -+static struct platform_driver udc_driver = { -+ .remove = __exit_p(usba_udc_remove), -+ .driver = { -+ .name = "atmel_usba_udc", -+ }, -+}; -+ -+static int __init udc_init(void) -+{ -+ return platform_driver_probe(&udc_driver, usba_udc_probe); -+} -+module_init(udc_init); -+ -+static void __exit udc_exit(void) -+{ -+ platform_driver_unregister(&udc_driver); -+} -+module_exit(udc_exit); -+ -+MODULE_DESCRIPTION("Atmel USBA UDC driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h -new file mode 100644 -index 0000000..f4f0f8b ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.h -@@ -0,0 +1,350 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LINUX_USB_GADGET_USBA_UDC_H__ -+#define __LINUX_USB_GADGET_USBA_UDC_H__ -+ -+/* USB register offsets */ -+#define USBA_CTRL 0x0000 -+#define USBA_FNUM 0x0004 -+#define USBA_INT_ENB 0x0010 -+#define USBA_INT_STA 0x0014 -+#define USBA_INT_CLR 0x0018 -+#define USBA_EPT_RST 0x001c -+#define USBA_TST 0x00e0 -+ -+/* USB endpoint register offsets */ -+#define USBA_EPT_CFG 0x0000 -+#define USBA_EPT_CTL_ENB 0x0004 -+#define USBA_EPT_CTL_DIS 0x0008 -+#define USBA_EPT_CTL 0x000c -+#define USBA_EPT_SET_STA 0x0014 -+#define USBA_EPT_CLR_STA 0x0018 -+#define USBA_EPT_STA 0x001c -+ -+/* USB DMA register offsets */ -+#define USBA_DMA_NXT_DSC 0x0000 -+#define USBA_DMA_ADDRESS 0x0004 -+#define USBA_DMA_CONTROL 0x0008 -+#define USBA_DMA_STATUS 0x000c -+ -+/* Bitfields in CTRL */ -+#define USBA_DEV_ADDR_OFFSET 0 -+#define USBA_DEV_ADDR_SIZE 7 -+#define USBA_FADDR_EN (1 << 7) -+#define USBA_EN_USBA (1 << 8) -+#define USBA_DETACH (1 << 9) -+#define USBA_REMOTE_WAKE_UP (1 << 10) -+ -+/* Bitfields in FNUM */ -+#define USBA_MICRO_FRAME_NUM_OFFSET 0 -+#define USBA_MICRO_FRAME_NUM_SIZE 3 -+#define USBA_FRAME_NUMBER_OFFSET 3 -+#define USBA_FRAME_NUMBER_SIZE 11 -+#define USBA_FRAME_NUM_ERROR (1 << 31) -+ -+/* Bitfields in INT_ENB/INT_STA/INT_CLR */ -+#define USBA_HIGH_SPEED (1 << 0) -+#define USBA_DET_SUSPEND (1 << 1) -+#define USBA_MICRO_SOF (1 << 2) -+#define USBA_SOF (1 << 3) -+#define USBA_END_OF_RESET (1 << 4) -+#define USBA_WAKE_UP (1 << 5) -+#define USBA_END_OF_RESUME (1 << 6) -+#define USBA_UPSTREAM_RESUME (1 << 7) -+#define USBA_EPT_INT_OFFSET 8 -+#define USBA_EPT_INT_SIZE 16 -+#define USBA_DMA_INT_OFFSET 24 -+#define USBA_DMA_INT_SIZE 8 -+ -+/* Bitfields in EPT_RST */ -+#define USBA_RST_OFFSET 0 -+#define USBA_RST_SIZE 16 -+ -+/* Bitfields in USBA_TST */ -+#define USBA_SPEED_CFG_OFFSET 0 -+#define USBA_SPEED_CFG_SIZE 2 -+#define USBA_TST_J_MODE (1 << 2) -+#define USBA_TST_K_MODE (1 << 3) -+#define USBA_TST_PKT_MODE (1 << 4) -+#define USBA_OPMODE2 (1 << 5) -+ -+/* Bitfields in EPT_CFG */ -+#define USBA_EPT_SIZE_OFFSET 0 -+#define USBA_EPT_SIZE_SIZE 3 -+#define USBA_EPT_DIR_IN (1 << 3) -+#define USBA_EPT_TYPE_OFFSET 4 -+#define USBA_EPT_TYPE_SIZE 2 -+#define USBA_BK_NUMBER_OFFSET 6 -+#define USBA_BK_NUMBER_SIZE 2 -+#define USBA_NB_TRANS_OFFSET 8 -+#define USBA_NB_TRANS_SIZE 2 -+#define USBA_EPT_MAPPED (1 << 31) -+ -+/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */ -+#define USBA_EPT_ENABLE (1 << 0) -+#define USBA_AUTO_VALID (1 << 1) -+#define USBA_INTDIS_DMA (1 << 3) -+#define USBA_NYET_DIS (1 << 4) -+#define USBA_DATAX_RX (1 << 6) -+#define USBA_MDATA_RX (1 << 7) -+/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */ -+#define USBA_BUSY_BANK_IE (1 << 18) -+ -+/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */ -+#define USBA_FORCE_STALL (1 << 5) -+#define USBA_TOGGLE_CLR (1 << 6) -+#define USBA_TOGGLE_SEQ_OFFSET 6 -+#define USBA_TOGGLE_SEQ_SIZE 2 -+#define USBA_ERR_OVFLW (1 << 8) -+#define USBA_RX_BK_RDY (1 << 9) -+#define USBA_KILL_BANK (1 << 9) -+#define USBA_TX_COMPLETE (1 << 10) -+#define USBA_TX_PK_RDY (1 << 11) -+#define USBA_ISO_ERR_TRANS (1 << 11) -+#define USBA_RX_SETUP (1 << 12) -+#define USBA_ISO_ERR_FLOW (1 << 12) -+#define USBA_STALL_SENT (1 << 13) -+#define USBA_ISO_ERR_CRC (1 << 13) -+#define USBA_ISO_ERR_NBTRANS (1 << 13) -+#define USBA_NAK_IN (1 << 14) -+#define USBA_ISO_ERR_FLUSH (1 << 14) -+#define USBA_NAK_OUT (1 << 15) -+#define USBA_CURRENT_BANK_OFFSET 16 -+#define USBA_CURRENT_BANK_SIZE 2 -+#define USBA_BUSY_BANKS_OFFSET 18 -+#define USBA_BUSY_BANKS_SIZE 2 -+#define USBA_BYTE_COUNT_OFFSET 20 -+#define USBA_BYTE_COUNT_SIZE 11 -+#define USBA_SHORT_PACKET (1 << 31) -+ -+/* Bitfields in DMA_CONTROL */ -+#define USBA_DMA_CH_EN (1 << 0) -+#define USBA_DMA_LINK (1 << 1) -+#define USBA_DMA_END_TR_EN (1 << 2) -+#define USBA_DMA_END_BUF_EN (1 << 3) -+#define USBA_DMA_END_TR_IE (1 << 4) -+#define USBA_DMA_END_BUF_IE (1 << 5) -+#define USBA_DMA_DESC_LOAD_IE (1 << 6) -+#define USBA_DMA_BURST_LOCK (1 << 7) -+#define USBA_DMA_BUF_LEN_OFFSET 16 -+#define USBA_DMA_BUF_LEN_SIZE 16 -+ -+/* Bitfields in DMA_STATUS */ -+#define USBA_DMA_CH_ACTIVE (1 << 1) -+#define USBA_DMA_END_TR_ST (1 << 4) -+#define USBA_DMA_END_BUF_ST (1 << 5) -+#define USBA_DMA_DESC_LOAD_ST (1 << 6) -+ -+/* Constants for SPEED_CFG */ -+#define USBA_SPEED_CFG_NORMAL 0 -+#define USBA_SPEED_CFG_FORCE_HIGH 2 -+#define USBA_SPEED_CFG_FORCE_FULL 3 -+ -+/* Constants for EPT_SIZE */ -+#define USBA_EPT_SIZE_8 0 -+#define USBA_EPT_SIZE_16 1 -+#define USBA_EPT_SIZE_32 2 -+#define USBA_EPT_SIZE_64 3 -+#define USBA_EPT_SIZE_128 4 -+#define USBA_EPT_SIZE_256 5 -+#define USBA_EPT_SIZE_512 6 -+#define USBA_EPT_SIZE_1024 7 -+ -+/* Constants for EPT_TYPE */ -+#define USBA_EPT_TYPE_CONTROL 0 -+#define USBA_EPT_TYPE_ISO 1 -+#define USBA_EPT_TYPE_BULK 2 -+#define USBA_EPT_TYPE_INT 3 -+ -+/* Constants for BK_NUMBER */ -+#define USBA_BK_NUMBER_ZERO 0 -+#define USBA_BK_NUMBER_ONE 1 -+#define USBA_BK_NUMBER_DOUBLE 2 -+#define USBA_BK_NUMBER_TRIPLE 3 -+ -+/* Bit manipulation macros */ -+#define USBA_BF(name, value) \ -+ (((value) & ((1 << USBA_##name##_SIZE) - 1)) \ -+ << USBA_##name##_OFFSET) -+#define USBA_BFEXT(name, value) \ -+ (((value) >> USBA_##name##_OFFSET) \ -+ & ((1 << USBA_##name##_SIZE) - 1)) -+#define USBA_BFINS(name, value, old) \ -+ (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \ -+ << USBA_##name##_OFFSET)) \ -+ | USBA_BF(name, value)) -+ -+/* Register access macros */ -+#define usba_readl(udc, reg) \ -+ __raw_readl((udc)->regs + USBA_##reg) -+#define usba_writel(udc, reg, value) \ -+ __raw_writel((value), (udc)->regs + USBA_##reg) -+#define usba_ep_readl(ep, reg) \ -+ __raw_readl((ep)->ep_regs + USBA_EPT_##reg) -+#define usba_ep_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg) -+#define usba_dma_readl(ep, reg) \ -+ __raw_readl((ep)->dma_regs + USBA_DMA_##reg) -+#define usba_dma_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg) -+ -+/* Calculate base address for a given endpoint or DMA controller */ -+#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) -+#define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) -+#define USBA_FIFO_BASE(x) ((x) << 16) -+ -+/* Synth parameters */ -+#define USBA_NR_ENDPOINTS 7 -+ -+#define EP0_FIFO_SIZE 64 -+#define EP0_EPT_SIZE USBA_EPT_SIZE_64 -+#define EP0_NR_BANKS 1 -+ -+/* -+ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to -+ * provide this information? -+ */ -+#define DMA_ADDR_INVALID (~(dma_addr_t)0) -+ -+#define FIFO_IOMEM_ID 0 -+#define CTRL_IOMEM_ID 1 -+ -+#ifdef DEBUG -+#define DBG_ERR 0x0001 /* report all error returns */ -+#define DBG_HW 0x0002 /* debug hardware initialization */ -+#define DBG_GADGET 0x0004 /* calls to/from gadget driver */ -+#define DBG_INT 0x0008 /* interrupts */ -+#define DBG_BUS 0x0010 /* report changes in bus state */ -+#define DBG_QUEUE 0x0020 /* debug request queue processing */ -+#define DBG_FIFO 0x0040 /* debug FIFO contents */ -+#define DBG_DMA 0x0080 /* debug DMA handling */ -+#define DBG_REQ 0x0100 /* print out queued request length */ -+#define DBG_ALL 0xffff -+#define DBG_NONE 0x0000 -+ -+#define DEBUG_LEVEL (DBG_ERR) -+#define DBG(level, fmt, ...) \ -+ do { \ -+ if ((level) & DEBUG_LEVEL) \ -+ printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__); \ -+ } while (0) -+#else -+#define DBG(level, fmt...) -+#endif -+ -+enum usba_ctrl_state { -+ WAIT_FOR_SETUP, -+ DATA_STAGE_IN, -+ DATA_STAGE_OUT, -+ STATUS_STAGE_IN, -+ STATUS_STAGE_OUT, -+ STATUS_STAGE_ADDR, -+ STATUS_STAGE_TEST, -+}; -+/* -+ EP_STATE_IDLE, -+ EP_STATE_SETUP, -+ EP_STATE_IN_DATA, -+ EP_STATE_OUT_DATA, -+ EP_STATE_SET_ADDR_STATUS, -+ EP_STATE_RX_STATUS, -+ EP_STATE_TX_STATUS, -+ EP_STATE_HALT, -+*/ -+ -+struct usba_dma_desc { -+ dma_addr_t next; -+ dma_addr_t addr; -+ u32 ctrl; -+}; -+ -+struct usba_ep { -+ int state; -+ void __iomem *ep_regs; -+ void __iomem *dma_regs; -+ void __iomem *fifo; -+ struct usb_ep ep; -+ struct usba_udc *udc; -+ -+ struct list_head queue; -+ const struct usb_endpoint_descriptor *desc; -+ -+ u16 fifo_size; -+ u8 nr_banks; -+ u8 index; -+ unsigned int can_dma:1; -+ unsigned int can_isoc:1; -+ unsigned int is_isoc:1; -+ unsigned int is_in:1; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ u32 last_dma_status; -+ struct dentry *debugfs_dir; -+ struct dentry *debugfs_queue; -+ struct dentry *debugfs_dma_status; -+ struct dentry *debugfs_state; -+#endif -+}; -+ -+struct usba_request { -+ struct usb_request req; -+ struct list_head queue; -+ -+ u32 ctrl; -+ -+ unsigned int submitted:1; -+ unsigned int last_transaction:1; -+ unsigned int using_dma:1; -+ unsigned int mapped:1; -+}; -+ -+struct usba_udc { -+ /* Protect hw registers from concurrent modifications */ -+ spinlock_t lock; -+ -+ void __iomem *regs; -+ void __iomem *fifo; -+ -+ struct usb_gadget gadget; -+ struct usb_gadget_driver *driver; -+ struct platform_device *pdev; -+ int irq; -+ int vbus_pin; -+ struct clk *pclk; -+ struct clk *hclk; -+ -+ int test_mode; -+ int vbus_prev; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+#endif -+}; -+ -+static inline struct usba_ep *to_usba_ep(struct usb_ep *ep) -+{ -+ return container_of(ep, struct usba_ep, ep); -+} -+ -+static inline struct usba_request *to_usba_req(struct usb_request *req) -+{ -+ return container_of(req, struct usba_request, req); -+} -+ -+static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget) -+{ -+ return container_of(gadget, struct usba_udc, gadget); -+} -+ -+#define ep_is_control(ep) ((ep)->index == 0) -+#define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE) -+ -+#endif /* __LINUX_USB_GADGET_USBA_UDC_H */ -diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c -index 235b618..bb361ab 100644 ---- a/drivers/video/atmel_lcdfb.c -+++ b/drivers/video/atmel_lcdfb.c -@@ -37,7 +37,9 @@ - #endif - - #if defined(CONFIG_ARCH_AT91) --#define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT -+#define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \ -+ | FBINFO_PARTIAL_PAN_OK \ -+ | FBINFO_HWACCEL_YPAN) - - static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, - struct fb_var_screeninfo *var) -@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { - .type = FB_TYPE_PACKED_PIXELS, - .visual = FB_VISUAL_TRUECOLOR, - .xpanstep = 0, -- .ypanstep = 0, -+ .ypanstep = 1, - .ywrapstep = 0, - .accel = FB_ACCEL_NONE, - }; -diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig -index 2580f5f..b6f936a 100644 ---- a/drivers/video/backlight/Kconfig -+++ b/drivers/video/backlight/Kconfig -@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE - To have support for your specific LCD panel you will have to - select the proper drivers which depend on this option. - -+config LCD_LTV350QV -+ tristate "Samsung LTV350QV LCD Panel" -+ depends on LCD_CLASS_DEVICE && SPI_MASTER -+ default n -+ help -+ If you have a Samsung LTV350QV LCD panel, say y to include a -+ power control driver for it. The panel starts up in power -+ off state, so you need this driver in order to see any -+ output. -+ -+ The LTV350QV panel is present on all ATSTK1000 boards. -+ - # - # Backlight - # -diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile -index c6e2266..965a78b 100644 ---- a/drivers/video/backlight/Makefile -+++ b/drivers/video/backlight/Makefile -@@ -1,6 +1,8 @@ - # Backlight & LCD drivers - - obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o -+obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o -+ - obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o - obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o - obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o -diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c -new file mode 100644 -index 0000000..751dc53 ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.c -@@ -0,0 +1,339 @@ -+/* -+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/delay.h> -+#include <linux/err.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/lcd.h> -+#include <linux/module.h> -+#include <linux/spi/spi.h> -+ -+#include "ltv350qv.h" -+ -+#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL) -+ -+struct ltv350qv { -+ struct spi_device *spi; -+ u8 *buffer; -+ int power; -+ struct lcd_device *ld; -+}; -+ -+/* -+ * The power-on and power-off sequences are taken from the -+ * LTV350QV-F04 data sheet from Samsung. The register definitions are -+ * taken from the S6F2002 command list also from Samsung. Both -+ * documents are distributed with the AVR32 Linux BSP CD from Atmel. -+ * -+ * There's still some voodoo going on here, but it's a lot better than -+ * in the first incarnation of the driver where all we had was the raw -+ * numbers from the initialization sequence. -+ */ -+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer index_xfer = { -+ .len = 3, -+ .cs_change = 1, -+ }; -+ struct spi_transfer value_xfer = { -+ .len = 3, -+ }; -+ -+ spi_message_init(&msg); -+ -+ /* register index */ -+ lcd->buffer[0] = LTV_OPC_INDEX; -+ lcd->buffer[1] = 0x00; -+ lcd->buffer[2] = reg & 0x7f; -+ index_xfer.tx_buf = lcd->buffer; -+ spi_message_add_tail(&index_xfer, &msg); -+ -+ /* register value */ -+ lcd->buffer[4] = LTV_OPC_DATA; -+ lcd->buffer[5] = val >> 8; -+ lcd->buffer[6] = val; -+ value_xfer.tx_buf = lcd->buffer + 4; -+ spi_message_add_tail(&value_xfer, &msg); -+ -+ return spi_sync(lcd->spi, &msg); -+} -+ -+/* The comments are taken straight from the data sheet */ -+static int ltv350qv_power_on(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Power On Reset Display off State */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000)) -+ goto err; -+ msleep(15); -+ -+ /* Power Setting Function 1 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE)) -+ goto err; -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE)) -+ goto err_power1; -+ -+ /* Power Setting Function 2 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5))) -+ goto err_power2; -+ -+ msleep(55); -+ -+ /* Instruction Setting */ -+ ret = ltv350qv_write_reg(lcd, LTV_IFCTL, -+ LTV_NMD | LTV_REV | LTV_NL(0x1d)); -+ ret |= ltv350qv_write_reg(lcd, LTV_DATACTL, -+ LTV_DS_SAME | LTV_CHS_480 -+ | LTV_DF_RGB | LTV_RGB_BGR); -+ ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE, -+ LTV_VSPL_ACTIVE_LOW -+ | LTV_HSPL_ACTIVE_LOW -+ | LTV_DPL_SAMPLE_RISING -+ | LTV_EPL_ACTIVE_LOW -+ | LTV_SS_RIGHT_TO_LEFT); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a); -+ ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021); -+ ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000); -+ if (ret) -+ goto err_settings; -+ -+ /* Wait more than 2 frames */ -+ msleep(20); -+ -+ /* Display On Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE -+ | LTV_POWER_ON | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3)); -+ if (ret) -+ goto err_disp_on; -+ -+ /* Display should now be ON. Phew. */ -+ return 0; -+ -+err_disp_on: -+ /* -+ * Try to recover. Error handling probably isn't very useful -+ * at this point, just make a best effort to switch the panel -+ * off. -+ */ -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+err_settings: -+err_power2: -+err_power1: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ msleep(1); -+err: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ return -EIO; -+} -+ -+static int ltv350qv_power_off(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Display Off Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE -+ | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ -+ /* Power down setting 1 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ -+ /* Wait at least 1 ms */ -+ msleep(1); -+ -+ /* Power down setting 2 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ -+ /* -+ * No point in trying to recover here. If we can't switch the -+ * panel off, what are we supposed to do other than inform the -+ * user about the failure? -+ */ -+ if (ret) -+ return -EIO; -+ -+ /* Display power should now be OFF */ -+ return 0; -+} -+ -+static int ltv350qv_power(struct ltv350qv *lcd, int power) -+{ -+ int ret = 0; -+ -+ if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_on(lcd); -+ else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_off(lcd); -+ -+ if (!ret) -+ lcd->power = power; -+ -+ return ret; -+} -+ -+static int ltv350qv_set_power(struct lcd_device *ld, int power) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = lcd_get_data(ld); -+ return ltv350qv_power(lcd, power); -+} -+ -+static int ltv350qv_get_power(struct lcd_device *ld) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = lcd_get_data(ld); -+ return lcd->power; -+} -+ -+static struct lcd_ops ltv_ops = { -+ .get_power = ltv350qv_get_power, -+ .set_power = ltv350qv_set_power, -+}; -+ -+static int __devinit ltv350qv_probe(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd; -+ struct lcd_device *ld; -+ int ret; -+ -+ lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL); -+ if (!lcd) -+ return -ENOMEM; -+ -+ lcd->spi = spi; -+ lcd->power = FB_BLANK_POWERDOWN; -+ lcd->buffer = kzalloc(8, GFP_KERNEL); -+ -+ ld = lcd_device_register("ltv350qv", &spi->dev, lcd, <v_ops); -+ if (IS_ERR(ld)) { -+ ret = PTR_ERR(ld); -+ goto out_free_lcd; -+ } -+ lcd->ld = ld; -+ -+ ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ if (ret) -+ goto out_unregister; -+ -+ dev_set_drvdata(&spi->dev, lcd); -+ -+ return 0; -+ -+out_unregister: -+ lcd_device_unregister(ld); -+out_free_lcd: -+ kfree(lcd); -+ return ret; -+} -+ -+static int __devexit ltv350qv_remove(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ lcd_device_unregister(lcd->ld); -+ kfree(lcd); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int ltv350qv_suspend(struct spi_device *spi, -+ pm_message_t state, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == SUSPEND_POWER_DOWN) -+ return ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ -+ return 0; -+} -+ -+static int ltv350qv_resume(struct spi_device *spi, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == RESUME_POWER_ON) -+ return ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ -+ return 0; -+} -+#else -+#define ltv350qv_suspend NULL -+#define ltv350qv_resume NULL -+#endif -+ -+/* Power down all displays on reboot, poweroff or halt */ -+static void ltv350qv_shutdown(struct spi_device *spi) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+} -+ -+static struct spi_driver ltv350qv_driver = { -+ .driver = { -+ .name = "ltv350qv", -+ .bus = &spi_bus_type, -+ .owner = THIS_MODULE, -+ }, -+ -+ .probe = ltv350qv_probe, -+ .remove = __devexit_p(ltv350qv_remove), -+ .shutdown = ltv350qv_shutdown, -+ .suspend = ltv350qv_suspend, -+ .resume = ltv350qv_resume, -+}; -+ -+static int __init ltv350qv_init(void) -+{ -+ return spi_register_driver(<v350qv_driver); -+} -+ -+static void __exit ltv350qv_exit(void) -+{ -+ spi_unregister_driver(<v350qv_driver); -+} -+module_init(ltv350qv_init); -+module_exit(ltv350qv_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h -new file mode 100644 -index 0000000..189112e ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.h -@@ -0,0 +1,95 @@ -+/* -+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LTV350QV_H -+#define __LTV350QV_H -+ -+#define LTV_OPC_INDEX 0x74 -+#define LTV_OPC_DATA 0x76 -+ -+#define LTV_ID 0x00 /* ID Read */ -+#define LTV_IFCTL 0x01 /* Display Interface Control */ -+#define LTV_DATACTL 0x02 /* Display Data Control */ -+#define LTV_ENTRY_MODE 0x03 /* Entry Mode */ -+#define LTV_GATECTL1 0x04 /* Gate Control 1 */ -+#define LTV_GATECTL2 0x05 /* Gate Control 2 */ -+#define LTV_VBP 0x06 /* Vertical Back Porch */ -+#define LTV_HBP 0x07 /* Horizontal Back Porch */ -+#define LTV_SOTCTL 0x08 /* Source Output Timing Control */ -+#define LTV_PWRCTL1 0x09 /* Power Control 1 */ -+#define LTV_PWRCTL2 0x0a /* Power Control 2 */ -+#define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ -+ -+/* Bit definitions for LTV_IFCTL */ -+#define LTV_IM (1 << 15) -+#define LTV_NMD (1 << 14) -+#define LTV_SSMD (1 << 13) -+#define LTV_REV (1 << 7) -+#define LTV_NL(x) (((x) & 0x001f) << 0) -+ -+/* Bit definitions for LTV_DATACTL */ -+#define LTV_DS_SAME (0 << 12) -+#define LTV_DS_D_TO_S (1 << 12) -+#define LTV_DS_S_TO_D (2 << 12) -+#define LTV_CHS_384 (0 << 9) -+#define LTV_CHS_480 (1 << 9) -+#define LTV_CHS_492 (2 << 9) -+#define LTV_DF_RGB (0 << 6) -+#define LTV_DF_RGBX (1 << 6) -+#define LTV_DF_XRGB (2 << 6) -+#define LTV_RGB_RGB (0 << 2) -+#define LTV_RGB_BGR (1 << 2) -+#define LTV_RGB_GRB (2 << 2) -+#define LTV_RGB_RBG (3 << 2) -+ -+/* Bit definitions for LTV_ENTRY_MODE */ -+#define LTV_VSPL_ACTIVE_LOW (0 << 15) -+#define LTV_VSPL_ACTIVE_HIGH (1 << 15) -+#define LTV_HSPL_ACTIVE_LOW (0 << 14) -+#define LTV_HSPL_ACTIVE_HIGH (1 << 14) -+#define LTV_DPL_SAMPLE_RISING (0 << 13) -+#define LTV_DPL_SAMPLE_FALLING (1 << 13) -+#define LTV_EPL_ACTIVE_LOW (0 << 12) -+#define LTV_EPL_ACTIVE_HIGH (1 << 12) -+#define LTV_SS_LEFT_TO_RIGHT (0 << 8) -+#define LTV_SS_RIGHT_TO_LEFT (1 << 8) -+#define LTV_STB (1 << 1) -+ -+/* Bit definitions for LTV_GATECTL1 */ -+#define LTV_CLW(x) (((x) & 0x0007) << 12) -+#define LTV_GAON (1 << 5) -+#define LTV_SDR (1 << 3) -+ -+/* Bit definitions for LTV_GATECTL2 */ -+#define LTV_NW_INV_FRAME (0 << 14) -+#define LTV_NW_INV_1LINE (1 << 14) -+#define LTV_NW_INV_2LINE (2 << 14) -+#define LTV_DSC (1 << 12) -+#define LTV_GIF (1 << 8) -+#define LTV_FHN (1 << 7) -+#define LTV_FTI(x) (((x) & 0x0003) << 4) -+#define LTV_FWI(x) (((x) & 0x0003) << 0) -+ -+/* Bit definitions for LTV_SOTCTL */ -+#define LTV_SDT(x) (((x) & 0x0007) << 10) -+#define LTV_EQ(x) (((x) & 0x0007) << 2) -+ -+/* Bit definitions for LTV_PWRCTL1 */ -+#define LTV_VCOM_DISABLE (1 << 14) -+#define LTV_VCOMOUT_ENABLE (1 << 11) -+#define LTV_POWER_ON (1 << 9) -+#define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ -+#define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ -+ -+/* Bit definitions for LTV_PWRCTL2 */ -+#define LTV_VCOML_ENABLE (1 << 13) -+#define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ -+#define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */ -+ -+#endif /* __LTV350QV_H */ -diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h -deleted file mode 100644 -index 3914d7b..0000000 ---- a/include/asm-avr32/arch-at32ap/at32ap7000.h -+++ /dev/null -@@ -1,35 +0,0 @@ --/* -- * Pin definitions for AT32AP7000. -- * -- * Copyright (C) 2006 Atmel Corporation -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#ifndef __ASM_ARCH_AT32AP7000_H__ --#define __ASM_ARCH_AT32AP7000_H__ -- --#define GPIO_PERIPH_A 0 --#define GPIO_PERIPH_B 1 -- --#define NR_GPIO_CONTROLLERS 4 -- --/* -- * Pin numbers identifying specific GPIO pins on the chip. They can -- * also be converted to IRQ numbers by passing them through -- * gpio_to_irq(). -- */ --#define GPIO_PIOA_BASE (0) --#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) --#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) --#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) --#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -- --#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) --#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) --#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) --#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) --#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) -- --#endif /* __ASM_ARCH_AT32AP7000_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h -new file mode 100644 -index 0000000..99684d6 ---- /dev/null -+++ b/include/asm-avr32/arch-at32ap/at32ap700x.h -@@ -0,0 +1,35 @@ -+/* -+ * Pin definitions for AT32AP7000. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_ARCH_AT32AP700X_H__ -+#define __ASM_ARCH_AT32AP700X_H__ -+ -+#define GPIO_PERIPH_A 0 -+#define GPIO_PERIPH_B 1 -+ -+#define NR_GPIO_CONTROLLERS 4 -+ -+/* -+ * Pin numbers identifying specific GPIO pins on the chip. They can -+ * also be converted to IRQ numbers by passing them through -+ * gpio_to_irq(). -+ */ -+#define GPIO_PIOA_BASE (0) -+#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) -+#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) -+#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) -+#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) -+ -+#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) -+#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) -+#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) -+#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) -+#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) -+ -+#endif /* __ASM_ARCH_AT32AP700X_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 0215965..7aa1c29 100644 ---- a/include/asm-avr32/arch-at32ap/board.h -+++ b/include/asm-avr32/arch-at32ap/board.h -@@ -6,6 +6,8 @@ - - #include <linux/types.h> - -+#define GPIO_PIN_NONE (-1) -+ - /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */ - void at32_add_system_devices(void); - -@@ -31,11 +33,26 @@ struct spi_board_info; - struct platform_device * - at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n); - -+struct platform_device *at32_add_device_twi(unsigned int id); -+ - struct atmel_lcdfb_info; - struct platform_device * - at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - unsigned long fbmem_start, unsigned long fbmem_len); - -+struct usba_platform_data { -+ int vbus_pin; -+}; -+struct platform_device * -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data); -+ -+struct ide_platform_data { -+ u8 cs; -+}; -+struct platform_device * -+at32_add_device_ide(unsigned int id, unsigned int extint, -+ struct ide_platform_data *data); -+ - /* depending on what's hooked up, not all SSC pins will be used */ - #define ATMEL_SSC_TK 0x01 - #define ATMEL_SSC_TF 0x02 -@@ -50,4 +67,26 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - struct platform_device * - at32_add_device_ssc(unsigned int id, unsigned int flags); - -+struct platform_device *at32_add_device_twi(unsigned int id); -+ -+struct mci_platform_data { -+ int detect_pin; -+ int wp_pin; -+}; -+struct platform_device * -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data); -+struct platform_device *at32_add_device_ac97c(unsigned int id); -+struct platform_device *at32_add_device_abdac(unsigned int id); -+ -+struct cf_platform_data { -+ int detect_pin; -+ int reset_pin; -+ int vcc_pin; -+ int ready_pin; -+ u8 cs; -+}; -+struct platform_device * -+at32_add_device_cf(unsigned int id, unsigned int extint, -+ struct cf_platform_data *data); -+ - #endif /* __ASM_ARCH_BOARD_H */ -diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h -index a762f42..0dc2026 100644 ---- a/include/asm-avr32/arch-at32ap/cpu.h -+++ b/include/asm-avr32/arch-at32ap/cpu.h -@@ -14,7 +14,7 @@ - * Only AT32AP7000 is defined for now. We can identify the specific - * chip at runtime, but I'm not sure if it's really worth it. - */ --#ifdef CONFIG_CPU_AT32AP7000 -+#ifdef CONFIG_CPU_AT32AP700X - # define cpu_is_at32ap7000() (1) - #else - # define cpu_is_at32ap7000() (0) -diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h -index ee59e40..4ec6abc 100644 ---- a/include/asm-avr32/arch-at32ap/io.h -+++ b/include/asm-avr32/arch-at32ap/io.h -@@ -4,7 +4,7 @@ - /* For "bizarre" halfword swapping */ - #include <linux/byteorder/swabb.h> - --#if defined(CONFIG_AP7000_32_BIT_SMC) -+#if defined(CONFIG_AP700X_32_BIT_SMC) - # define __swizzle_addr_b(addr) (addr ^ 3UL) - # define __swizzle_addr_w(addr) (addr ^ 2UL) - # define __swizzle_addr_l(addr) (addr) -@@ -14,7 +14,7 @@ - # define __mem_ioswabb(a, x) (x) - # define __mem_ioswabw(a, x) swab16(x) - # define __mem_ioswabl(a, x) swab32(x) --#elif defined(CONFIG_AP7000_16_BIT_SMC) -+#elif defined(CONFIG_AP700X_16_BIT_SMC) - # define __swizzle_addr_b(addr) (addr ^ 1UL) - # define __swizzle_addr_w(addr) (addr) - # define __swizzle_addr_l(addr) (addr) -diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h -index 9930871..135e034 100644 ---- a/include/asm-avr32/arch-at32ap/portmux.h -+++ b/include/asm-avr32/arch-at32ap/portmux.h -@@ -19,10 +19,23 @@ - #define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */ - #define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */ - #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ -+#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ - - void at32_select_periph(unsigned int pin, unsigned int periph, - unsigned long flags); - void at32_select_gpio(unsigned int pin, unsigned long flags); - void at32_reserve_pin(unsigned int pin); - -+#ifdef CONFIG_GPIO_DEV -+ -+/* Gang allocators and accessors; used by the GPIO /dev driver */ -+int at32_gpio_port_is_valid(unsigned int port); -+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask); -+void at32_deselect_pins(unsigned int port, u32 pins); -+ -+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins); -+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask); -+ -+#endif /* CONFIG_GPIO_DEV */ -+ - #endif /* __ASM_ARCH_PORTMUX_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h -index 07152b7..c98eea4 100644 ---- a/include/asm-avr32/arch-at32ap/smc.h -+++ b/include/asm-avr32/arch-at32ap/smc.h -@@ -15,22 +15,50 @@ - /* - * All timing parameters are in nanoseconds. - */ -+struct smc_timing { -+ /* Delay from address valid to assertion of given strobe */ -+ int ncs_read_setup; -+ int nrd_setup; -+ int ncs_write_setup; -+ int nwe_setup; -+ -+ /* Pulse length of given strobe */ -+ int ncs_read_pulse; -+ int nrd_pulse; -+ int ncs_write_pulse; -+ int nwe_pulse; -+ -+ /* Total cycle length of given operation */ -+ int read_cycle; -+ int write_cycle; -+ -+ /* Minimal recovery times, will extend cycle if needed */ -+ int ncs_read_recover; -+ int nrd_recover; -+ int ncs_write_recover; -+ int nwe_recover; -+}; -+ -+/* -+ * All timing parameters are in clock cycles. -+ */ - struct smc_config { -+ - /* Delay from address valid to assertion of given strobe */ -- u16 ncs_read_setup; -- u16 nrd_setup; -- u16 ncs_write_setup; -- u16 nwe_setup; -+ u8 ncs_read_setup; -+ u8 nrd_setup; -+ u8 ncs_write_setup; -+ u8 nwe_setup; - - /* Pulse length of given strobe */ -- u16 ncs_read_pulse; -- u16 nrd_pulse; -- u16 ncs_write_pulse; -- u16 nwe_pulse; -+ u8 ncs_read_pulse; -+ u8 nrd_pulse; -+ u8 ncs_write_pulse; -+ u8 nwe_pulse; - - /* Total cycle length of given operation */ -- u16 read_cycle; -- u16 write_cycle; -+ u8 read_cycle; -+ u8 write_cycle; - - /* Bus width in bytes */ - u8 bus_width; -@@ -76,6 +104,9 @@ struct smc_config { - unsigned int tdf_mode:1; - }; - -+extern void smc_set_timing(struct smc_config *config, -+ const struct smc_timing *timing); -+ - extern int smc_set_configuration(int cs, const struct smc_config *config); - extern struct smc_config *smc_get_configuration(int cs); - -diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h -new file mode 100644 -index 0000000..56a4965 ---- /dev/null -+++ b/include/asm-avr32/dma-controller.h -@@ -0,0 +1,166 @@ -+/* -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __ASM_AVR32_DMA_CONTROLLER_H -+#define __ASM_AVR32_DMA_CONTROLLER_H -+ -+#include <linux/device.h> -+ -+#define DMA_DIR_MEM_TO_MEM 0x0000 -+#define DMA_DIR_MEM_TO_PERIPH 0x0001 -+#define DMA_DIR_PERIPH_TO_MEM 0x0002 -+#define DMA_DIR_PERIPH_TO_PERIPH 0x0003 -+ -+#define DMA_WIDTH_8BIT 0 -+#define DMA_WIDTH_16BIT 1 -+#define DMA_WIDTH_32BIT 2 -+ -+struct dma_request { -+ struct dma_controller *dmac; -+ struct list_head list; -+ -+ unsigned short channel; -+ -+ void (*xfer_complete)(struct dma_request *req); -+ void (*block_complete)(struct dma_request *req); -+ void (*error)(struct dma_request *req); -+}; -+ -+struct dma_request_sg { -+ struct dma_request req; -+ -+ int nr_sg; -+ struct scatterlist *sg; -+ unsigned long block_size; -+ unsigned int nr_blocks; -+ -+ dma_addr_t data_reg; -+ unsigned short periph_id; -+ -+ unsigned char direction; -+ unsigned char width; -+}; -+#define to_dma_request_sg(_req) \ -+ container_of(_req, struct dma_request_sg, req) -+ -+struct dma_request_cyclic { -+ struct dma_request req; -+ -+ int periods; -+ unsigned long buffer_size; -+ -+ dma_addr_t buffer_start; -+ dma_addr_t data_reg; -+ -+ unsigned short periph_id; -+ unsigned char direction; -+ unsigned char width; -+ -+ void *dev_id; -+}; -+#define to_dma_request_cyclic(_req) \ -+ container_of(_req, struct dma_request_cyclic, req) -+ -+struct dma_request_memcpy { -+ struct dma_request req; -+ -+ dma_addr_t src_addr; -+ unsigned int src_width; -+ unsigned int src_stride; -+ -+ dma_addr_t dst_addr; -+ unsigned int dst_width; -+ unsigned int dst_stride; -+ -+ size_t length; -+ -+ unsigned short src_reverse:1; -+ unsigned short dst_reverse:1; -+}; -+#define to_dma_request_memcpy(_req) \ -+ container_of(_req, struct dma_request_memcpy, req) -+ -+struct dma_controller { -+ struct list_head list; -+ int id; -+ struct device *dev; -+ -+ int (*alloc_channel)(struct dma_controller *dmac); -+ void (*release_channel)(struct dma_controller *dmac, -+ int channel); -+ int (*prepare_request_sg)(struct dma_controller *dmac, -+ struct dma_request_sg *req); -+ int (*prepare_request_cyclic)(struct dma_controller *dmac, -+ struct dma_request_cyclic *req); -+ int (*prepare_request_memcpy)(struct dma_controller *dmac, -+ struct dma_request_memcpy *req); -+ int (*start_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ int (*stop_request)(struct dma_controller *dmac, -+ unsigned int channel); -+ dma_addr_t (*get_current_pos)(struct dma_controller *dmac, -+ unsigned int channel); -+}; -+ -+static inline int -+dma_alloc_channel(struct dma_controller *dmac) -+{ -+ return dmac->alloc_channel(dmac); -+} -+ -+static inline void -+dma_release_channel(struct dma_controller *dmac, int chan) -+{ -+ dmac->release_channel(dmac, chan); -+} -+ -+static inline int -+dma_prepare_request_sg(struct dma_controller *dmac, -+ struct dma_request_sg *req) -+{ -+ return dmac->prepare_request_sg(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_cyclic(struct dma_controller *dmac, -+ struct dma_request_cyclic *req) -+{ -+ return dmac->prepare_request_cyclic(dmac, req); -+} -+ -+static inline int -+dma_prepare_request_memcpy(struct dma_controller *dmac, -+ struct dma_request_memcpy *req) -+{ -+ return dmac->prepare_request_memcpy(dmac, req); -+} -+ -+static inline int -+dma_start_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->start_request(dmac, channel); -+} -+ -+static inline int -+dma_stop_request(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->stop_request(dmac, channel); -+} -+ -+static inline dma_addr_t -+dma_get_current_pos(struct dma_controller *dmac, -+ unsigned int channel) -+{ -+ return dmac->get_current_pos(dmac, channel); -+} -+ -+extern int register_dma_controller(struct dma_controller *dmac); -+extern struct dma_controller *find_dma_controller(int id); -+ -+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ -diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h -index 21bb60b..81e3426 100644 ---- a/include/asm-avr32/dma-mapping.h -+++ b/include/asm-avr32/dma-mapping.h -@@ -264,7 +264,11 @@ static inline void - dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction) - { -- dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); -+ /* -+ * No need to do anything since the CPU isn't supposed to -+ * touch this memory after we flushed it at mapping- or -+ * sync-for-device time. -+ */ - } - - static inline void -@@ -309,12 +313,11 @@ static inline void - dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) - { -- int i; -- -- for (i = 0; i < nents; i++) { -- dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, -- sg[i].length, direction); -- } -+ /* -+ * No need to do anything since the CPU isn't supposed to -+ * touch this memory after we flushed it at mapping- or -+ * sync-for-device time. -+ */ - } - - static inline void -diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h -index a8236ba..dc2d527 100644 ---- a/include/asm-avr32/system.h -+++ b/include/asm-avr32/system.h -@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *, - - extern void __xchg_called_with_bad_pointer(void); - --#ifdef __CHECKER__ --extern unsigned long __builtin_xchg(void *ptr, unsigned long x); --#endif -+static inline unsigned long xchg_u32(u32 val, volatile u32 *m) -+{ -+ u32 ret; - --#define xchg_u32(val, m) __builtin_xchg((void *)m, val) -+ asm volatile("xchg %[ret], %[m], %[val]" -+ : [ret] "=&r"(ret), "=m"(*m) -+ : "m"(*m), [m] "r"(m), [val] "r"(val) -+ : "memory"); -+ return ret; -+} - - static inline unsigned long __xchg(unsigned long x, - volatile void *ptr, -diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h -index 3b4e35b..de09009 100644 ---- a/include/asm-avr32/unistd.h -+++ b/include/asm-avr32/unistd.h -@@ -303,6 +303,19 @@ - #ifdef __KERNEL__ - #define NR_syscalls 282 - -+/* Old stuff */ -+#define __IGNORE_uselib -+#define __IGNORE_mmap -+ -+/* NUMA stuff */ -+#define __IGNORE_mbind -+#define __IGNORE_get_mempolicy -+#define __IGNORE_set_mempolicy -+#define __IGNORE_migrate_pages -+#define __IGNORE_move_pages -+ -+/* SMP stuff */ -+#define __IGNORE_getcpu - - #define __ARCH_WANT_IPC_PARSE_VERSION - #define __ARCH_WANT_STAT64 -diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h -new file mode 100644 -index 0000000..0602339 ---- /dev/null -+++ b/include/linux/atmel-ssc.h -@@ -0,0 +1,312 @@ -+#ifndef __INCLUDE_ATMEL_SSC_H -+#define __INCLUDE_ATMEL_SSC_H -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> -+ -+struct ssc_device { -+ struct list_head list; -+ void __iomem *regs; -+ struct platform_device *pdev; -+ struct clk *clk; -+ int user; -+ int irq; -+}; -+ -+struct ssc_device * __must_check ssc_request(unsigned int ssc_num); -+void ssc_free(struct ssc_device *ssc); -+ -+/* SSC register offsets */ -+ -+/* SSC Control Register */ -+#define SSC_CR 0x00000000 -+#define SSC_CR_RXDIS_SIZE 1 -+#define SSC_CR_RXDIS_OFFSET 1 -+#define SSC_CR_RXEN_SIZE 1 -+#define SSC_CR_RXEN_OFFSET 0 -+#define SSC_CR_SWRST_SIZE 1 -+#define SSC_CR_SWRST_OFFSET 15 -+#define SSC_CR_TXDIS_SIZE 1 -+#define SSC_CR_TXDIS_OFFSET 9 -+#define SSC_CR_TXEN_SIZE 1 -+#define SSC_CR_TXEN_OFFSET 8 -+ -+/* SSC Clock Mode Register */ -+#define SSC_CMR 0x00000004 -+#define SSC_CMR_DIV_SIZE 12 -+#define SSC_CMR_DIV_OFFSET 0 -+ -+/* SSC Receive Clock Mode Register */ -+#define SSC_RCMR 0x00000010 -+#define SSC_RCMR_CKG_SIZE 2 -+#define SSC_RCMR_CKG_OFFSET 6 -+#define SSC_RCMR_CKI_SIZE 1 -+#define SSC_RCMR_CKI_OFFSET 5 -+#define SSC_RCMR_CKO_SIZE 3 -+#define SSC_RCMR_CKO_OFFSET 2 -+#define SSC_RCMR_CKS_SIZE 2 -+#define SSC_RCMR_CKS_OFFSET 0 -+#define SSC_RCMR_PERIOD_SIZE 8 -+#define SSC_RCMR_PERIOD_OFFSET 24 -+#define SSC_RCMR_START_SIZE 4 -+#define SSC_RCMR_START_OFFSET 8 -+#define SSC_RCMR_STOP_SIZE 1 -+#define SSC_RCMR_STOP_OFFSET 12 -+#define SSC_RCMR_STTDLY_SIZE 8 -+#define SSC_RCMR_STTDLY_OFFSET 16 -+ -+/* SSC Receive Frame Mode Register */ -+#define SSC_RFMR 0x00000014 -+#define SSC_RFMR_DATLEN_SIZE 5 -+#define SSC_RFMR_DATLEN_OFFSET 0 -+#define SSC_RFMR_DATNB_SIZE 4 -+#define SSC_RFMR_DATNB_OFFSET 8 -+#define SSC_RFMR_FSEDGE_SIZE 1 -+#define SSC_RFMR_FSEDGE_OFFSET 24 -+#define SSC_RFMR_FSLEN_SIZE 4 -+#define SSC_RFMR_FSLEN_OFFSET 16 -+#define SSC_RFMR_FSOS_SIZE 4 -+#define SSC_RFMR_FSOS_OFFSET 20 -+#define SSC_RFMR_LOOP_SIZE 1 -+#define SSC_RFMR_LOOP_OFFSET 5 -+#define SSC_RFMR_MSBF_SIZE 1 -+#define SSC_RFMR_MSBF_OFFSET 7 -+ -+/* SSC Transmit Clock Mode Register */ -+#define SSC_TCMR 0x00000018 -+#define SSC_TCMR_CKG_SIZE 2 -+#define SSC_TCMR_CKG_OFFSET 6 -+#define SSC_TCMR_CKI_SIZE 1 -+#define SSC_TCMR_CKI_OFFSET 5 -+#define SSC_TCMR_CKO_SIZE 3 -+#define SSC_TCMR_CKO_OFFSET 2 -+#define SSC_TCMR_CKS_SIZE 2 -+#define SSC_TCMR_CKS_OFFSET 0 -+#define SSC_TCMR_PERIOD_SIZE 8 -+#define SSC_TCMR_PERIOD_OFFSET 24 -+#define SSC_TCMR_START_SIZE 4 -+#define SSC_TCMR_START_OFFSET 8 -+#define SSC_TCMR_STTDLY_SIZE 8 -+#define SSC_TCMR_STTDLY_OFFSET 16 -+ -+/* SSC Transmit Frame Mode Register */ -+#define SSC_TFMR 0x0000001c -+#define SSC_TFMR_DATDEF_SIZE 1 -+#define SSC_TFMR_DATDEF_OFFSET 5 -+#define SSC_TFMR_DATLEN_SIZE 5 -+#define SSC_TFMR_DATLEN_OFFSET 0 -+#define SSC_TFMR_DATNB_SIZE 4 -+#define SSC_TFMR_DATNB_OFFSET 8 -+#define SSC_TFMR_FSDEN_SIZE 1 -+#define SSC_TFMR_FSDEN_OFFSET 23 -+#define SSC_TFMR_FSEDGE_SIZE 1 -+#define SSC_TFMR_FSEDGE_OFFSET 24 -+#define SSC_TFMR_FSLEN_SIZE 4 -+#define SSC_TFMR_FSLEN_OFFSET 16 -+#define SSC_TFMR_FSOS_SIZE 3 -+#define SSC_TFMR_FSOS_OFFSET 20 -+#define SSC_TFMR_MSBF_SIZE 1 -+#define SSC_TFMR_MSBF_OFFSET 7 -+ -+/* SSC Receive Hold Register */ -+#define SSC_RHR 0x00000020 -+#define SSC_RHR_RDAT_SIZE 32 -+#define SSC_RHR_RDAT_OFFSET 0 -+ -+/* SSC Transmit Hold Register */ -+#define SSC_THR 0x00000024 -+#define SSC_THR_TDAT_SIZE 32 -+#define SSC_THR_TDAT_OFFSET 0 -+ -+/* SSC Receive Sync. Holding Register */ -+#define SSC_RSHR 0x00000030 -+#define SSC_RSHR_RSDAT_SIZE 16 -+#define SSC_RSHR_RSDAT_OFFSET 0 -+ -+/* SSC Transmit Sync. Holding Register */ -+#define SSC_TSHR 0x00000034 -+#define SSC_TSHR_TSDAT_SIZE 16 -+#define SSC_TSHR_RSDAT_OFFSET 0 -+ -+/* SSC Receive Compare 0 Register */ -+#define SSC_RC0R 0x00000038 -+#define SSC_RC0R_CP0_SIZE 16 -+#define SSC_RC0R_CP0_OFFSET 0 -+ -+/* SSC Receive Compare 1 Register */ -+#define SSC_RC1R 0x0000003c -+#define SSC_RC1R_CP1_SIZE 16 -+#define SSC_RC1R_CP1_OFFSET 0 -+ -+/* SSC Status Register */ -+#define SSC_SR 0x00000040 -+#define SSC_SR_CP0_SIZE 1 -+#define SSC_SR_CP0_OFFSET 8 -+#define SSC_SR_CP1_SIZE 1 -+#define SSC_SR_CP1_OFFSET 9 -+#define SSC_SR_ENDRX_SIZE 1 -+#define SSC_SR_ENDRX_OFFSET 6 -+#define SSC_SR_ENDTX_SIZE 1 -+#define SSC_SR_ENDTX_OFFSET 2 -+#define SSC_SR_OVRUN_SIZE 1 -+#define SSC_SR_OVRUN_OFFSET 5 -+#define SSC_SR_RXBUFF_SIZE 1 -+#define SSC_SR_RXBUFF_OFFSET 7 -+#define SSC_SR_RXEN_SIZE 1 -+#define SSC_SR_RXEN_OFFSET 17 -+#define SSC_SR_RXRDY_SIZE 1 -+#define SSC_SR_RXRDY_OFFSET 4 -+#define SSC_SR_RXSYN_SIZE 1 -+#define SSC_SR_RXSYN_OFFSET 11 -+#define SSC_SR_TXBUFE_SIZE 1 -+#define SSC_SR_TXBUFE_OFFSET 3 -+#define SSC_SR_TXEMPTY_SIZE 1 -+#define SSC_SR_TXEMPTY_OFFSET 1 -+#define SSC_SR_TXEN_SIZE 1 -+#define SSC_SR_TXEN_OFFSET 16 -+#define SSC_SR_TXRDY_SIZE 1 -+#define SSC_SR_TXRDY_OFFSET 0 -+#define SSC_SR_TXSYN_SIZE 1 -+#define SSC_SR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Enable Register */ -+#define SSC_IER 0x00000044 -+#define SSC_IER_CP0_SIZE 1 -+#define SSC_IER_CP0_OFFSET 8 -+#define SSC_IER_CP1_SIZE 1 -+#define SSC_IER_CP1_OFFSET 9 -+#define SSC_IER_ENDRX_SIZE 1 -+#define SSC_IER_ENDRX_OFFSET 6 -+#define SSC_IER_ENDTX_SIZE 1 -+#define SSC_IER_ENDTX_OFFSET 2 -+#define SSC_IER_OVRUN_SIZE 1 -+#define SSC_IER_OVRUN_OFFSET 5 -+#define SSC_IER_RXBUFF_SIZE 1 -+#define SSC_IER_RXBUFF_OFFSET 7 -+#define SSC_IER_RXRDY_SIZE 1 -+#define SSC_IER_RXRDY_OFFSET 4 -+#define SSC_IER_RXSYN_SIZE 1 -+#define SSC_IER_RXSYN_OFFSET 11 -+#define SSC_IER_TXBUFE_SIZE 1 -+#define SSC_IER_TXBUFE_OFFSET 3 -+#define SSC_IER_TXEMPTY_SIZE 1 -+#define SSC_IER_TXEMPTY_OFFSET 1 -+#define SSC_IER_TXRDY_SIZE 1 -+#define SSC_IER_TXRDY_OFFSET 0 -+#define SSC_IER_TXSYN_SIZE 1 -+#define SSC_IER_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Disable Register */ -+#define SSC_IDR 0x00000048 -+#define SSC_IDR_CP0_SIZE 1 -+#define SSC_IDR_CP0_OFFSET 8 -+#define SSC_IDR_CP1_SIZE 1 -+#define SSC_IDR_CP1_OFFSET 9 -+#define SSC_IDR_ENDRX_SIZE 1 -+#define SSC_IDR_ENDRX_OFFSET 6 -+#define SSC_IDR_ENDTX_SIZE 1 -+#define SSC_IDR_ENDTX_OFFSET 2 -+#define SSC_IDR_OVRUN_SIZE 1 -+#define SSC_IDR_OVRUN_OFFSET 5 -+#define SSC_IDR_RXBUFF_SIZE 1 -+#define SSC_IDR_RXBUFF_OFFSET 7 -+#define SSC_IDR_RXRDY_SIZE 1 -+#define SSC_IDR_RXRDY_OFFSET 4 -+#define SSC_IDR_RXSYN_SIZE 1 -+#define SSC_IDR_RXSYN_OFFSET 11 -+#define SSC_IDR_TXBUFE_SIZE 1 -+#define SSC_IDR_TXBUFE_OFFSET 3 -+#define SSC_IDR_TXEMPTY_SIZE 1 -+#define SSC_IDR_TXEMPTY_OFFSET 1 -+#define SSC_IDR_TXRDY_SIZE 1 -+#define SSC_IDR_TXRDY_OFFSET 0 -+#define SSC_IDR_TXSYN_SIZE 1 -+#define SSC_IDR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Mask Register */ -+#define SSC_IMR 0x0000004c -+#define SSC_IMR_CP0_SIZE 1 -+#define SSC_IMR_CP0_OFFSET 8 -+#define SSC_IMR_CP1_SIZE 1 -+#define SSC_IMR_CP1_OFFSET 9 -+#define SSC_IMR_ENDRX_SIZE 1 -+#define SSC_IMR_ENDRX_OFFSET 6 -+#define SSC_IMR_ENDTX_SIZE 1 -+#define SSC_IMR_ENDTX_OFFSET 2 -+#define SSC_IMR_OVRUN_SIZE 1 -+#define SSC_IMR_OVRUN_OFFSET 5 -+#define SSC_IMR_RXBUFF_SIZE 1 -+#define SSC_IMR_RXBUFF_OFFSET 7 -+#define SSC_IMR_RXRDY_SIZE 1 -+#define SSC_IMR_RXRDY_OFFSET 4 -+#define SSC_IMR_RXSYN_SIZE 1 -+#define SSC_IMR_RXSYN_OFFSET 11 -+#define SSC_IMR_TXBUFE_SIZE 1 -+#define SSC_IMR_TXBUFE_OFFSET 3 -+#define SSC_IMR_TXEMPTY_SIZE 1 -+#define SSC_IMR_TXEMPTY_OFFSET 1 -+#define SSC_IMR_TXRDY_SIZE 1 -+#define SSC_IMR_TXRDY_OFFSET 0 -+#define SSC_IMR_TXSYN_SIZE 1 -+#define SSC_IMR_TXSYN_OFFSET 10 -+ -+/* SSC PDC Receive Pointer Register */ -+#define SSC_PDC_RPR 0x00000100 -+ -+/* SSC PDC Receive Counter Register */ -+#define SSC_PDC_RCR 0x00000104 -+ -+/* SSC PDC Transmit Pointer Register */ -+#define SSC_PDC_TPR 0x00000108 -+ -+/* SSC PDC Receive Next Pointer Register */ -+#define SSC_PDC_RNPR 0x00000110 -+ -+/* SSC PDC Receive Next Counter Register */ -+#define SSC_PDC_RNCR 0x00000114 -+ -+/* SSC PDC Transmit Counter Register */ -+#define SSC_PDC_TCR 0x0000010c -+ -+/* SSC PDC Transmit Next Pointer Register */ -+#define SSC_PDC_TNPR 0x00000118 -+ -+/* SSC PDC Transmit Next Counter Register */ -+#define SSC_PDC_TNCR 0x0000011c -+ -+/* SSC PDC Transfer Control Register */ -+#define SSC_PDC_PTCR 0x00000120 -+#define SSC_PDC_PTCR_RXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_RXTDIS_OFFSET 1 -+#define SSC_PDC_PTCR_RXTEN_SIZE 1 -+#define SSC_PDC_PTCR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTCR_TXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_TXTDIS_OFFSET 9 -+#define SSC_PDC_PTCR_TXTEN_SIZE 1 -+#define SSC_PDC_PTCR_TXTEN_OFFSET 8 -+ -+/* SSC PDC Transfer Status Register */ -+#define SSC_PDC_PTSR 0x00000124 -+#define SSC_PDC_PTSR_RXTEN_SIZE 1 -+#define SSC_PDC_PTSR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTSR_TXTEN_SIZE 1 -+#define SSC_PDC_PTSR_TXTEN_OFFSET 8 -+ -+/* Bit manipulation macros */ -+#define SSC_BIT(name) \ -+ (1 << SSC_##name##_OFFSET) -+#define SSC_BF(name, value) \ -+ (((value) & ((1 << SSC_##name##_SIZE) - 1)) \ -+ << SSC_##name##_OFFSET) -+#define SSC_BFEXT(name, value) \ -+ (((value) >> SSC_##name##_OFFSET) \ -+ & ((1 << SSC_##name##_SIZE) - 1)) -+#define SSC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << SSC_##name##_SIZE) - 1) \ -+ << SSC_##name##_OFFSET)) | SSC_BF(name, value)) -+ -+/* Register access macros */ -+#define ssc_readl(base, reg) __raw_readl(base + SSC_##reg) -+#define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) -+ -+#endif /* __INCLUDE_ATMEL_SSC_H */ -diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h -new file mode 100644 -index 0000000..0f20a70 ---- /dev/null -+++ b/include/linux/spi/at73c213.h -@@ -0,0 +1,25 @@ -+/* -+ * Board-specific data used to set up AT73c213 audio DAC driver. -+ */ -+ -+#ifndef __LINUX_SPI_AT73C213_H -+#define __LINUX_SPI_AT73C213_H -+ -+/** -+ * at73c213_board_info - how the external DAC is wired to the device. -+ * -+ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio. -+ * @dac_clk: the external clock used to provide master clock to the DAC. -+ * @shortname: a short discription for the DAC, seen by userspace tools. -+ * -+ * This struct contains the configuration of the hardware connection to the -+ * external DAC. The DAC needs a master clock and a I2S audio stream. It also -+ * provides a name which is used to identify it in userspace tools. -+ */ -+struct at73c213_board_info { -+ int ssc_id; -+ struct clk *dac_clk; -+ char shortname[32]; -+}; -+ -+#endif /* __LINUX_SPI_AT73C213_H */ -diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h -index c1d1629..5f38803 100644 ---- a/include/pcmcia/cs_types.h -+++ b/include/pcmcia/cs_types.h -@@ -21,7 +21,7 @@ - #include <sys/types.h> - #endif - --#if defined(__arm__) || defined(__mips__) -+#if defined(__arm__) || defined(__mips__) || defined(__avr32__) - /* This (ioaddr_t) is exposed to userspace & hence cannot be changed. */ - typedef u_int ioaddr_t; - #else -diff --git a/init/do_mounts.c b/init/do_mounts.c -index 4efa1e5..0e88ed1 100644 ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -219,8 +219,14 @@ __setup("root=", root_dev_setup); - - static int __init rootwait_setup(char *str) - { -- if (*str) -+ if (*str && *str != '=') - return 0; -+ -+ if (*str) -+ printk(KERN_WARNING -+ "WARNING: \"rootwait=1\" is deprecated, " -+ "use \"rootwait\" instead.\n"); -+ - root_wait = 1; - return 1; - } -diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl -index f7844f6..6631586 100755 ---- a/scripts/checkstack.pl -+++ b/scripts/checkstack.pl -@@ -12,6 +12,7 @@ - # sh64 port by Paul Mundt - # Random bits by Matt Mackall <mpm@selenic.com> - # M68k port by Geert Uytterhoeven and Andreas Schwab -+# AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com> - # - # Usage: - # objdump -d vmlinux | stackcheck.pl [arch] -@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs); - if ($arch eq 'arm') { - #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64 - $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o; -+ } elsif ($arch eq 'avr32') { -+ #8000008a: 20 1d sub sp,4 -+ #80000ca8: fa cd 05 b0 sub sp,sp,1456 -+ $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o; - } elsif ($arch =~ /^i[3456]86$/) { - #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp - $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o; -diff --git a/sound/Kconfig b/sound/Kconfig -index e48b9b3..29a9979 100644 ---- a/sound/Kconfig -+++ b/sound/Kconfig -@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig" - - source "sound/arm/Kconfig" - -+source "sound/avr32/Kconfig" -+ -+if SPI -+source "sound/spi/Kconfig" -+endif -+ - source "sound/mips/Kconfig" - - source "sound/sh/Kconfig" -diff --git a/sound/Makefile b/sound/Makefile -index 3ead922..e655df7 100644 ---- a/sound/Makefile -+++ b/sound/Makefile -@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o - obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o - obj-$(CONFIG_SOUND_PRIME) += oss/ - obj-$(CONFIG_DMASOUND) += oss/ --obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/ -+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ -+ - obj-$(CONFIG_SND_AOA) += aoa/ - - # This one must be compilable even if sound is configured out -diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig -new file mode 100644 -index 0000000..17d1d91 ---- /dev/null -+++ b/sound/avr32/Kconfig -@@ -0,0 +1,11 @@ -+menu "AVR32 devices" -+ depends on SND != n && AVR32 -+ -+config SND_ATMEL_AC97 -+ tristate "Atmel AC97 Controller Driver" -+ select SND_PCM -+ select SND_AC97_CODEC -+ help -+ ALSA sound driver for the Atmel AC97 controller. -+ -+endmenu -diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile -new file mode 100644 -index 0000000..5d87d0e ---- /dev/null -+++ b/sound/avr32/Makefile -@@ -0,0 +1,3 @@ -+snd-atmel-ac97-objs := ac97c.o -+ -+obj-$(CONFIG_SND_ATMEL_AC97) += snd-atmel-ac97.o -diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c -new file mode 100644 -index 0000000..0ec0b1c ---- /dev/null -+++ b/sound/avr32/ac97c.c -@@ -0,0 +1,914 @@ -+/* -+ * Driver for the Atmel AC97 controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/delay.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/mutex.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/core.h> -+#include <sound/initval.h> -+#include <sound/pcm.h> -+#include <sound/pcm_params.h> -+#include <sound/ac97_codec.h> -+#include <sound/memalloc.h> -+ -+#include <asm/dma-controller.h> -+ -+#include "ac97c.h" -+ -+/* Serialize access to opened */ -+static DEFINE_MUTEX(opened_mutex); -+ -+struct atmel_ac97_dma_info { -+ struct dma_request_cyclic req_tx; -+ struct dma_request_cyclic req_rx; -+ unsigned short rx_periph_id; -+ unsigned short tx_periph_id; -+}; -+ -+struct atmel_ac97 { -+ /* Serialize access to opened */ -+ spinlock_t lock; -+ void __iomem *regs; -+ struct snd_pcm_substream *playback_substream; -+ struct snd_pcm_substream *capture_substream; -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_ac97 *ac97; -+ struct snd_ac97_bus *ac97_bus; -+ int opened; -+ int period; -+ u64 cur_format; -+ unsigned int cur_rate; -+ struct clk *mck; -+ struct platform_device *pdev; -+ struct atmel_ac97_dma_info dma; -+}; -+ -+#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data) -+ -+#define ac97c_writel(chip, reg, val) \ -+ __raw_writel((val), (chip)->regs + AC97C_##reg) -+#define ac97c_readl(chip, reg) \ -+ __raw_readl((chip)->regs + AC97C_##reg) -+ -+/* -+ * PCM part -+ */ -+static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 6, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED -+ | SNDRV_PCM_INFO_MMAP -+ | SNDRV_PCM_INFO_MMAP_VALID -+ | SNDRV_PCM_INFO_BLOCK_TRANSFER -+ | SNDRV_PCM_INFO_JOINT_DUPLEX), -+ .formats = (SNDRV_PCM_FMTBIT_S16_BE -+ | SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_CONTINUOUS), -+ .rate_min = 4000, -+ .rate_max = 48000, -+ .channels_min = 1, -+ .channels_max = 2, -+ .buffer_bytes_max = 64*1024, -+ .period_bytes_min = 512, -+ .period_bytes_max = 4095, -+ .periods_min = 8, -+ .periods_max = 1024, -+}; -+ -+/* -+ * PCM functions -+ */ -+static int -+snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_playback_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->playback_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ mutex_lock(&opened_mutex); -+ chip->opened++; -+ runtime->hw = snd_atmel_ac97_capture_hw; -+ if (chip->cur_rate) { -+ runtime->hw.rate_min = chip->cur_rate; -+ runtime->hw.rate_max = chip->cur_rate; -+ } -+ if (chip->cur_format) -+ runtime->hw.formats = (1ULL << chip->cur_format); -+ mutex_unlock(&opened_mutex); -+ chip->capture_substream = substream; -+ chip->period = 0; -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ mutex_lock(&opened_mutex); -+ chip->opened--; -+ if (!chip->opened) { -+ chip->cur_rate = 0; -+ chip->cur_format = 0; -+ } -+ mutex_unlock(&opened_mutex); -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int -+snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ int err; -+ -+ err = snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+ if (err < 0) -+ return err; -+ -+ /* Set restrictions to params */ -+ mutex_lock(&opened_mutex); -+ chip->cur_rate = params_rate(hw_params); -+ chip->cur_format = params_format(hw_params); -+ mutex_unlock(&opened_mutex); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream) -+{ -+ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_TO_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, OCA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ -+ default: -+ word &= ~AC97C_CMR_CEM_LITTLE; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_tx.buffer_size = buffer_size; -+ chip->dma.req_tx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_tx.buffer_size != -+ (chip->dma.req_tx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_tx.buffer_start = runtime->dma_addr; -+ chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2); -+ chip->dma.req_tx.periph_id = chip->dma.tx_periph_id; -+ chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.dev_id = chip; -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct platform_device *pdev = chip->pdev; -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size = frames_to_bytes(runtime, runtime->period_size); -+ unsigned long word = 0; -+ unsigned long buffer_size = 0; -+ -+ dma_sync_single_for_device(&pdev->dev, runtime->dma_addr, -+ block_size * 2, DMA_FROM_DEVICE); -+ -+ /* Assign slots to channels */ -+ switch (substream->runtime->channels) { -+ case 1: -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A); -+ break; -+ case 2: -+ /* Assign Left and Right slot to Channel A */ -+ word |= AC97C_CH_ASSIGN(PCM_LEFT, A) -+ | AC97C_CH_ASSIGN(PCM_RIGHT, A); -+ break; -+ default: -+ /* TODO: support more than two channels */ -+ return -EINVAL; -+ break; -+ } -+ ac97c_writel(chip, ICA, word); -+ -+ /* Configure sample format and size */ -+ word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16; -+ -+ switch (runtime->format) { -+ case SNDRV_PCM_FORMAT_S16_LE: -+ word |= AC97C_CMR_CEM_LITTLE; -+ break; -+ case SNDRV_PCM_FORMAT_S16_BE: -+ default: -+ word &= ~(AC97C_CMR_CEM_LITTLE); -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, word); -+ -+ /* Set variable rate if needed */ -+ if (runtime->rate != 48000) { -+ word = ac97c_readl(chip, MR); -+ word |= AC97C_MR_VRA; -+ ac97c_writel(chip, MR, word); -+ } else { -+ /* Clear Variable Rate Bit */ -+ word = ac97c_readl(chip, MR); -+ word &= ~(AC97C_MR_VRA); -+ ac97c_writel(chip, MR, word); -+ } -+ -+ /* Set rate */ -+ snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); -+ -+ buffer_size = frames_to_bytes(runtime, runtime->period_size) * -+ runtime->periods; -+ -+ chip->dma.req_rx.buffer_size = buffer_size; -+ chip->dma.req_rx.periods = runtime->periods; -+ -+ BUG_ON(chip->dma.req_rx.buffer_size != -+ (chip->dma.req_rx.periods * -+ frames_to_bytes(runtime, runtime->period_size))); -+ -+ chip->dma.req_rx.buffer_start = runtime->dma_addr; -+ chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2); -+ chip->dma.req_rx.periph_id = chip->dma.rx_periph_id; -+ chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.dev_id = chip; -+ -+ return 0; -+} -+ -+ static int -+snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac, -+ &chip->dma.req_tx); -+ dma_start_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static int -+snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ unsigned long camr; -+ int flags, err = 0; -+ -+ spin_lock_irqsave(&chip->lock, flags); -+ camr = ac97c_readl(chip, CAMR); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac, -+ &chip->dma.req_rx); -+ dma_start_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ camr |= AC97C_CMR_CENA; -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ err = dma_stop_request(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ mutex_lock(&opened_mutex); -+ if (chip->opened <= 1) -+ camr &= ~AC97C_CMR_CENA; -+ mutex_unlock(&opened_mutex); -+ break; -+ default: -+ err = -EINVAL; -+ break; -+ } -+ -+ ac97c_writel(chip, CAMR, camr); -+ -+ spin_unlock_irqrestore(&chip->lock, flags); -+ return err; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel) - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+ static snd_pcm_uframes_t -+snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream) -+{ -+ struct atmel_ac97 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = (dma_get_current_pos -+ (chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel) -+ - runtime->dma_addr); -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops atmel_ac97_playback_ops = { -+ .open = snd_atmel_ac97_playback_open, -+ .close = snd_atmel_ac97_playback_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_playback_hw_params, -+ .hw_free = snd_atmel_ac97_playback_hw_free, -+ .prepare = snd_atmel_ac97_playback_prepare, -+ .trigger = snd_atmel_ac97_playback_trigger, -+ .pointer = snd_atmel_ac97_playback_pointer, -+}; -+ -+static struct snd_pcm_ops atmel_ac97_capture_ops = { -+ .open = snd_atmel_ac97_capture_open, -+ .close = snd_atmel_ac97_capture_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_atmel_ac97_capture_hw_params, -+ .hw_free = snd_atmel_ac97_capture_hw_free, -+ .prepare = snd_atmel_ac97_capture_prepare, -+ .trigger = snd_atmel_ac97_capture_trigger, -+ .pointer = snd_atmel_ac97_capture_pointer, -+}; -+ -+static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = { -+ /* Playback */ -+ { -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT) -+ | (1 << AC97_SLOT_PCM_CENTER) -+ | (1 << AC97_SLOT_PCM_SLEFT) -+ | (1 << AC97_SLOT_PCM_SRIGHT) -+ | (1 << AC97_SLOT_LFE)), -+ } } -+ }, -+ /* PCM in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = ((1 << AC97_SLOT_PCM_LEFT) -+ | (1 << AC97_SLOT_PCM_RIGHT)), -+ } } -+ }, -+ /* Mic in */ -+ { -+ .stream = 1, -+ .exclusive = 1, -+ .r = { { -+ .slots = (1<<AC97_SLOT_MIC), -+ } } -+ }, -+}; -+ -+static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip) -+{ -+ struct snd_pcm *pcm; -+ int err; -+ -+ err = snd_ac97_pcm_assign(chip->ac97_bus, -+ ARRAY_SIZE(atmel_ac97_pcm_defs), -+ atmel_ac97_pcm_defs); -+ if (err) -+ return err; -+ -+ err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm); -+ if (err) -+ return err; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, -+ &atmel_ac97_playback_ops); -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, -+ &atmel_ac97_capture_ops); -+ -+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, -+ &chip->pdev->dev, -+ 128 * 1024, 128 * 1024); -+ -+ pcm->private_data = chip; -+ pcm->info_flags = 0; -+ strcpy(pcm->name, "Atmel-AC97"); -+ chip->pcm = pcm; -+ -+ return 0; -+} -+ -+/* -+ * Mixer part. -+ */ -+static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip) -+{ -+ int err; -+ struct snd_ac97_template template; -+ -+ memset(&template, 0, sizeof(template)); -+ template.private_data = chip; -+ err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97); -+ -+ return err; -+} -+ -+static void atmel_ac97_error(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ -+ dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n", -+ req->req.channel); -+} -+ -+static void atmel_ac97_block_complete(struct dma_request *_req) -+{ -+ struct dma_request_cyclic *req = to_dma_request_cyclic(_req); -+ struct atmel_ac97 *chip = req->dev_id; -+ if (req->periph_id == chip->dma.tx_periph_id) -+ snd_pcm_period_elapsed(chip->playback_substream); -+ else -+ snd_pcm_period_elapsed(chip->capture_substream); -+} -+ -+/* -+ * Codec part. -+ */ -+static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg, -+ unsigned short val) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ -+ word = (reg & 0x7f) << 16 | val; -+ -+ do { -+ if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) { -+ ac97c_writel(chip, COTHR, word); -+ return; -+ } -+ udelay(1); -+ } while (--timeout); -+ -+ dev_dbg(&chip->pdev->dev, "codec write timeout\n"); -+} -+ -+static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97, -+ unsigned short reg) -+{ -+ struct atmel_ac97 *chip = get_chip(ac97); -+ unsigned long word; -+ int timeout = 40; -+ int write = 10; -+ -+ word = (0x80 | (reg & 0x7f)) << 16; -+ -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) -+ ac97c_readl(chip, CORHR); -+ -+retry_write: -+ timeout = 40; -+ -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) { -+ ac97c_writel(chip, COTHR, word); -+ goto read_reg; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+read_reg: -+ do { -+ if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) { -+ unsigned short val = ac97c_readl(chip, CORHR); -+ return val; -+ } -+ mdelay(10); -+ } while (--timeout); -+ -+ if (!--write) -+ goto timed_out; -+ goto retry_write; -+ -+timed_out: -+ dev_dbg(&chip->pdev->dev, "codec read timeout\n"); -+ return 0xffff; -+} -+ -+static void snd_atmel_ac97_reset(struct atmel_ac97 *chip) -+{ -+ ac97c_writel(chip, MR, AC97C_MR_WRST); -+ mdelay(1); -+ ac97c_writel(chip, MR, AC97C_MR_ENA); -+} -+ -+static void snd_atmel_ac97_destroy(struct snd_card *card) -+{ -+ struct atmel_ac97 *chip = get_chip(card); -+ -+ if (chip->regs) -+ iounmap(chip->regs); -+ -+ if (chip->mck) { -+ clk_disable(chip->mck); -+ clk_put(chip->mck); -+ } -+ -+ if (chip->dma.req_tx.req.dmac) { -+ dma_release_channel(chip->dma.req_tx.req.dmac, -+ chip->dma.req_tx.req.channel); -+ } -+ if (chip->dma.req_rx.req.dmac) { -+ dma_release_channel(chip->dma.req_rx.req.dmac, -+ chip->dma.req_rx.req.channel); -+ } -+} -+ -+static int __devinit snd_atmel_ac97_create(struct snd_card *card, -+ struct platform_device *pdev) -+{ -+ static struct snd_ac97_bus_ops ops = { -+ .write = snd_atmel_ac97_write, -+ .read = snd_atmel_ac97_read, -+ }; -+ struct atmel_ac97 *chip = get_chip(card); -+ struct resource *regs; -+ struct clk *mck; -+ int err; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ clk_enable(mck); -+ chip->mck = mck; -+ -+ card->private_free = snd_atmel_ac97_destroy; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->pdev = pdev; -+ -+ chip->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!chip->regs) -+ return -ENOMEM; -+ -+ snd_card_set_dev(card, &pdev->dev); -+ -+ err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus); -+ -+ return err; -+} -+ -+static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev) -+{ -+ static int dev; -+ struct snd_card *card; -+ struct atmel_ac97 *chip; -+ int err; -+ int ch; -+ -+ mutex_init(&opened_mutex); -+ -+ err = -ENOMEM; -+ card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, -+ THIS_MODULE, sizeof(struct atmel_ac97)); -+ if (!card) -+ goto out; -+ chip = get_chip(card); -+ -+ err = snd_atmel_ac97_create(card, pdev); -+ if (err) -+ goto out_free_card; -+ -+ snd_atmel_ac97_reset(chip); -+ -+ err = snd_atmel_ac97_mixer_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ err = snd_atmel_ac97_pcm_new(chip); -+ if (err) -+ goto out_free_card; -+ -+ /* TODO: Get this information from the platform device */ -+ chip->dma.req_tx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_tx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.dmac = find_dma_controller(0); -+ if (!chip->dma.req_rx.req.dmac) { -+ dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n"); -+ err = -ENODEV; -+ goto out_free_card; -+ } -+ -+ chip->dma.rx_periph_id = 3; -+ chip->dma.tx_periph_id = 4; -+ -+ ch = dma_alloc_channel(chip->dma.req_tx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate TX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_tx.req.channel = ch; -+ chip->dma.req_tx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_tx.req.error = atmel_ac97_error; -+ -+ ch = dma_alloc_channel(chip->dma.req_rx.req.dmac); -+ if (ch < 0) { -+ dev_dbg(&chip->pdev->dev, -+ "could not allocate RX DMA channel\n"); -+ err = ch; -+ goto out_free_card; -+ } -+ chip->dma.req_rx.req.channel = ch; -+ chip->dma.req_rx.width = DMA_WIDTH_16BIT; -+ chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete; -+ chip->dma.req_rx.req.error = atmel_ac97_error; -+ -+ strcpy(card->driver, "atmel_ac97c"); -+ strcpy(card->shortname, "atmel_ac97c"); -+ sprintf(card->longname, "Atmel AVR32 AC97 controller"); -+ -+ err = snd_card_register(card); -+ if (err) -+ goto out_free_card; -+ -+ platform_set_drvdata(pdev, card); -+ dev++; -+ -+ dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n", -+ chip->regs); -+ -+ return 0; -+ -+out_free_card: -+ snd_card_free(card); -+out: -+ return err; -+} -+ -+#ifdef CONFIG_PM -+ static int -+snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_disable(chip->mck); -+ -+ return 0; -+} -+ -+static int snd_atmel_ac97_resume(struct platform_device *pdev) -+{ -+ struct snd_card *card = dev_get_drvdata(pdev); -+ struct atmel_ac97 *chip = card->private_data; -+ -+ clk_enable(chip->mck); -+ -+ return 0; -+} -+#else -+#define snd_atmel_ac97_suspend NULL -+#define snd_atmel_ac97_resume NULL -+#endif -+ -+static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev) -+{ -+ struct snd_card *card = platform_get_drvdata(pdev); -+ -+ snd_card_free(card); -+ platform_set_drvdata(pdev, NULL); -+ return 0; -+} -+ -+static struct platform_driver atmel_ac97_driver = { -+ .remove = __devexit_p(snd_atmel_ac97_remove), -+ .driver = { -+ .name = "atmel_ac97c", -+ }, -+ .suspend = snd_atmel_ac97_suspend, -+ .resume = snd_atmel_ac97_resume, -+}; -+ -+static int __init atmel_ac97_init(void) -+{ -+ return platform_driver_probe(&atmel_ac97_driver, -+ snd_atmel_ac97_probe); -+} -+module_init(atmel_ac97_init); -+ -+static void __exit atmel_ac97_exit(void) -+{ -+ platform_driver_unregister(&atmel_ac97_driver); -+} -+module_exit(atmel_ac97_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Driver for Atmel AC97 Controller"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h -new file mode 100644 -index 0000000..96246e7 ---- /dev/null -+++ b/sound/avr32/ac97c.h -@@ -0,0 +1,71 @@ -+/* -+ * Register definitions for the Atmel AC97 Controller. -+ * -+ * Copyright (C) 2005-2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_AVR32_AC97C_H -+#define __SOUND_AVR32_AC97C_H -+ -+#define AC97C_MR 0x08 -+#define AC97C_ICA 0x10 -+#define AC97C_OCA 0x14 -+#define AC97C_CARHR 0x20 -+#define AC97C_CATHR 0x24 -+#define AC97C_CASR 0x28 -+#define AC97C_CAMR 0x2c -+#define AC97C_CBRHR 0x30 -+#define AC97C_CBTHR 0x34 -+#define AC97C_CBSR 0x38 -+#define AC97C_CBMR 0x3c -+#define AC97C_CORHR 0x40 -+#define AC97C_COTHR 0x44 -+#define AC97C_COSR 0x48 -+#define AC97C_COMR 0x4c -+#define AC97C_SR 0x50 -+#define AC97C_IER 0x54 -+#define AC97C_IDR 0x58 -+#define AC97C_IMR 0x5c -+#define AC97C_VERSION 0xfc -+ -+#define AC97C_CATPR PDC_TPR -+#define AC97C_CATCR PDC_TCR -+#define AC97C_CATNPR PDC_TNPR -+#define AC97C_CATNCR PDC_TNCR -+#define AC97C_CARPR PDC_RPR -+#define AC97C_CARCR PDC_RCR -+#define AC97C_CARNPR PDC_RNPR -+#define AC97C_CARNCR PDC_RNCR -+#define AC97C_PTCR PDC_PTCR -+ -+#define AC97C_MR_ENA (1 << 0) -+#define AC97C_MR_WRST (1 << 1) -+#define AC97C_MR_VRA (1 << 2) -+ -+#define AC97C_CSR_TXRDY (1 << 0) -+#define AC97C_CSR_UNRUN (1 << 2) -+#define AC97C_CSR_RXRDY (1 << 4) -+#define AC97C_CSR_ENDTX (1 << 10) -+#define AC97C_CSR_ENDRX (1 << 14) -+ -+#define AC97C_CMR_SIZE_20 (0 << 16) -+#define AC97C_CMR_SIZE_18 (1 << 16) -+#define AC97C_CMR_SIZE_16 (2 << 16) -+#define AC97C_CMR_SIZE_10 (3 << 16) -+#define AC97C_CMR_CEM_LITTLE (1 << 18) -+#define AC97C_CMR_CEM_BIG (0 << 18) -+#define AC97C_CMR_CENA (1 << 21) -+#define AC97C_CMR_PDCEN (1 << 22) -+ -+#define AC97C_SR_CAEVT (1 << 3) -+ -+#define AC97C_CH_ASSIGN(slot, channel) \ -+ (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3))) -+#define AC97C_CHANNEL_NONE 0x0 -+#define AC97C_CHANNEL_A 0x1 -+#define AC97C_CHANNEL_B 0x2 -+ -+#endif /* __SOUND_AVR32_AC97C_H */ -diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig -index af37cd0..e3cc557 100644 ---- a/sound/oss/Kconfig -+++ b/sound/oss/Kconfig -@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL - int "DAC channel" - default "1" - depends on SOUND_SH_DAC_AUDIO -+ -+config SOUND_AT32_ABDAC -+ tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support" -+ depends on SOUND_PRIME && AVR32 -diff --git a/sound/oss/Makefile b/sound/oss/Makefile -index 1200670..fafc246 100644 ---- a/sound/oss/Makefile -+++ b/sound/oss/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o ad1848.o - - # Please leave it as is, cause the link order is significant ! - -+obj-$(CONFIG_SOUND_AT32_ABDAC) += at32_abdac.o - obj-$(CONFIG_SOUND_SH_DAC_AUDIO) += sh_dac_audio.o - obj-$(CONFIG_SOUND_HAL2) += hal2.o - obj-$(CONFIG_SOUND_AEDSP16) += aedsp16.o -diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c -new file mode 100644 -index 0000000..cb997d7 ---- /dev/null -+++ b/sound/oss/at32_abdac.c -@@ -0,0 +1,722 @@ -+/* -+ * OSS Sound Driver for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/clk.h> -+#include <linux/dma-mapping.h> -+#include <linux/fs.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/kernel.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/sound.h> -+#include <linux/soundcard.h> -+ -+#include <asm/byteorder.h> -+#include <asm/dma-controller.h> -+#include <asm/io.h> -+#include <asm/uaccess.h> -+ -+/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */ -+#include <linux/byteorder/swabb.h> -+ -+#include "at32_abdac.h" -+ -+#define DMA_BUFFER_SIZE 32768 -+#define DMA_PERIOD_SHIFT 10 -+#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT) -+#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE -+ -+struct sound_settings { -+ unsigned int format; -+ unsigned int channels; -+ unsigned int sample_rate; -+ /* log2(bytes per sample) */ -+ unsigned int input_order; -+}; -+ -+struct at32_dac { -+ spinlock_t lock; -+ void __iomem *regs; -+ -+ /* head and tail refer to number of words */ -+ struct { -+ u32 *buf; -+ int head; -+ int tail; -+ } dma; -+ -+ struct semaphore sem; -+ wait_queue_head_t write_wait; -+ -+ /* -+ * Read at most ucount bytes from ubuf, translate to 2-channel -+ * signed 16-bit big endian format and write to the DMA buffer -+ * as long as there is room left. Return the number of bytes -+ * successfully copied from ubuf, or -EFAULT if the first -+ * sample from ubuf couldn't be read. This function is not -+ * called unless there is room for at least one sample (4 -+ * bytes) in the DMA buffer. -+ */ -+ ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount); -+ -+ struct sound_settings dsp_settings; -+ struct dma_request_cyclic req; -+ -+ struct clk *mck; -+ struct clk *sample_clk; -+ struct platform_device *pdev; -+ int busy; -+ int playing; -+ int dev_dsp; -+}; -+static struct at32_dac *the_dac; -+ -+static inline unsigned int abdac_get_head(struct at32_dac *dac) -+{ -+ return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_get_tail(struct at32_dac *dac) -+{ -+ return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1); -+} -+ -+static inline unsigned int abdac_dma_space(struct at32_dac *dac) -+{ -+ unsigned int space; -+ -+ space = ((dac->dma.tail - dac->dma.head - 1) -+ & ((DMA_BUFFER_SIZE / 4) - 1)); -+ return space; -+} -+ -+static void abdac_update_dma_tail(struct at32_dac *dac) -+{ -+ dma_addr_t dma_addr; -+ unsigned int new_tail; -+ -+ if (dac->playing) { -+ dma_addr = dma_get_current_pos(dac->req.req.dmac, -+ dac->req.req.channel); -+ new_tail = (dma_addr - dac->req.buffer_start) / 4; -+ if (new_tail >= dac->dma.head -+ && (dac->dma.tail < dac->dma.head -+ || dac->dma.tail > new_tail)) -+ dev_notice(&dac->pdev->dev, "DMA underrun detected!\n"); -+ dac->dma.tail = new_tail; -+ dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n", -+ dma_addr, dac->req.buffer_start, dac->dma.tail); -+ } -+} -+ -+static int abdac_start(struct at32_dac *dac) -+{ -+ int ret; -+ -+ if (dac->playing) -+ return 0; -+ -+ memset(dac->dma.buf, 0, DMA_BUFFER_SIZE); -+ -+ clk_enable(dac->sample_clk); -+ -+ ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req); -+ if (ret) -+ goto out_stop_clock; -+ -+ dev_dbg(&dac->pdev->dev, "starting DMA...\n"); -+ ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel); -+ if (ret) -+ goto out_stop_request; -+ -+ dac_writel(dac, CTRL, DAC_BIT(EN)); -+ dac->playing = 1; -+ -+ return 0; -+ -+out_stop_request: -+ dma_stop_request(dac->req.req.dmac, -+ dac->req.req.channel); -+out_stop_clock: -+ clk_disable(dac->sample_clk); -+ return ret; -+} -+ -+static int abdac_stop(struct at32_dac *dac) -+{ -+ if (dac->playing) { -+ dma_stop_request(dac->req.req.dmac, dac->req.req.channel); -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ dac->playing = 0; -+ clk_disable(dac->sample_clk); -+ } -+ -+ return 0; -+} -+ -+static int abdac_dma_prepare(struct at32_dac *dac) -+{ -+ dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ &dac->req.buffer_start, GFP_KERNEL); -+ if (!dac->dma.buf) -+ return -ENOMEM; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE; -+ dac->req.buffer_size = DMA_BUFFER_SIZE; -+ -+ return 0; -+} -+ -+static void abdac_dma_cleanup(struct at32_dac *dac) -+{ -+ if (dac->dma.buf) -+ dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE, -+ dac->dma.buf, dac->req.buffer_start); -+ dac->dma.buf = NULL; -+} -+ -+static void abdac_dma_block_complete(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ wake_up(&dac->write_wait); -+} -+ -+static void abdac_dma_error(struct dma_request *req) -+{ -+ struct dma_request_cyclic *creq = to_dma_request_cyclic(req); -+ struct at32_dac *dac = container_of(creq, struct at32_dac, req); -+ -+ dev_err(&dac->pdev->dev, "DMA error\n"); -+} -+ -+static irqreturn_t abdac_interrupt(int irq, void *dev_id) -+{ -+ struct at32_dac *dac = dev_id; -+ u32 status; -+ -+ status = dac_readl(dac, INT_STATUS); -+ if (status & DAC_BIT(UNDERRUN)) { -+ dev_err(&dac->pdev->dev, "Underrun detected!\n"); -+ dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN)); -+ } else { -+ dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n", -+ status); -+ dac_writel(dac, INT_CLR, status); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] = sample; -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf, -+ size_t ucount) -+{ -+ ssize_t ret; -+ -+ if (dac->dsp_settings.channels == 2) { -+ const u32 __user *up = (const u32 __user *)ubuf; -+ u32 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ /* Swap bytes in each halfword */ -+ dac->dma.buf[abdac_get_head(dac)] = swahb32(sample); -+ dac->dma.head++; -+ } -+ } else { -+ const u16 __user *up = (const u16 __user *)ubuf; -+ u16 sample; -+ -+ for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) { -+ if (!abdac_dma_space(dac)) -+ break; -+ -+ if (unlikely(__get_user(sample, up++))) { -+ if (ret == 0) -+ ret = -EFAULT; -+ break; -+ } -+ sample = swab16(sample); -+ dac->dma.buf[abdac_get_head(dac)] -+ = (sample << 16) | sample; -+ dac->dma.head++; -+ } -+ } -+ -+ return ret; -+} -+ -+static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac, -+ const char __user *buffer, -+ size_t count) -+{ -+ /* At least one buffer must be available at this point */ -+ dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count); -+ -+ return dac->trans(dac, buffer, count); -+} -+ -+static int abdac_set_format(struct at32_dac *dac, int format) -+{ -+ unsigned int order; -+ -+ switch (format) { -+ case AFMT_S16_BE: -+ order = 1; -+ dac->trans = trans_s16be; -+ break; -+ case AFMT_S16_LE: -+ order = 1; -+ dac->trans = trans_s16le; -+ break; -+ default: -+ dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format); -+ return -EINVAL; -+ } -+ -+ if (dac->dsp_settings.channels == 2) -+ order++; -+ -+ dac->dsp_settings.input_order = order; -+ dac->dsp_settings.format = format; -+ return 0; -+} -+ -+static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate) -+{ -+ unsigned long new_rate; -+ int ret; -+ -+ ret = clk_set_rate(dac->sample_clk, 256 * rate); -+ if (ret < 0) -+ return ret; -+ -+ /* TODO: mplayer seems to have a problem with this */ -+#if 0 -+ new_rate = clk_get_rate(dac->sample_clk); -+ dac->dsp_settings.sample_rate = new_rate / 256; -+#else -+ dac->dsp_settings.sample_rate = rate; -+#endif -+ -+ return 0; -+} -+ -+static ssize_t abdac_dsp_write(struct file *file, -+ const char __user *buffer, -+ size_t count, loff_t *ppos) -+{ -+ struct at32_dac *dac = file->private_data; -+ DECLARE_WAITQUEUE(wait, current); -+ unsigned int avail; -+ ssize_t copied; -+ ssize_t ret; -+ -+ /* Avoid address space checking in the translation functions */ -+ if (!access_ok(buffer, count, VERIFY_READ)) -+ return -EFAULT; -+ -+ down(&dac->sem); -+ -+ if (!dac->dma.buf) { -+ ret = abdac_dma_prepare(dac); -+ if (ret) -+ goto out; -+ } -+ -+ add_wait_queue(&dac->write_wait, &wait); -+ ret = 0; -+ while (count > 0) { -+ do { -+ abdac_update_dma_tail(dac); -+ avail = abdac_dma_space(dac); -+ set_current_state(TASK_INTERRUPTIBLE); -+ if (avail >= DMA_WRITE_THRESHOLD) -+ break; -+ -+ if (file->f_flags & O_NONBLOCK) { -+ if (!ret) -+ ret = -EAGAIN; -+ goto out; -+ } -+ -+ pr_debug("Going to wait (avail = %u, count = %zu)\n", -+ avail, count); -+ -+ up(&dac->sem); -+ schedule(); -+ if (signal_pending(current)) { -+ if (!ret) -+ ret = -ERESTARTSYS; -+ goto out_nosem; -+ } -+ down(&dac->sem); -+ } while (1); -+ -+ copied = abdac_dma_translate_from_user(dac, buffer, count); -+ if (copied < 0) { -+ if (!ret) -+ ret = -EFAULT; -+ goto out; -+ } -+ -+ abdac_start(dac); -+ -+ count -= copied; -+ ret += copied; -+ } -+ -+out: -+ up(&dac->sem); -+out_nosem: -+ remove_wait_queue(&dac->write_wait, &wait); -+ set_current_state(TASK_RUNNING); -+ return ret; -+} -+ -+static int abdac_dsp_ioctl(struct inode *inode, struct file *file, -+ unsigned int cmd, unsigned long arg) -+{ -+ struct at32_dac *dac = file->private_data; -+ int __user *up = (int __user *)arg; -+ struct audio_buf_info abinfo; -+ int val, ret; -+ -+ switch (cmd) { -+ case OSS_GETVERSION: -+ return put_user(SOUND_VERSION, up); -+ -+ case SNDCTL_DSP_SPEED: -+ if (get_user(val, up)) -+ return -EFAULT; -+ if (val >= 0) { -+ abdac_stop(dac); -+ ret = abdac_set_sample_rate(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(dac->dsp_settings.sample_rate, up); -+ -+ case SNDCTL_DSP_STEREO: -+ if (get_user(val, up)) -+ return -EFAULT; -+ abdac_stop(dac); -+ if (val && dac->dsp_settings.channels == 1) -+ dac->dsp_settings.input_order++; -+ else if (!val && dac->dsp_settings.channels != 1) -+ dac->dsp_settings.input_order--; -+ dac->dsp_settings.channels = val ? 2 : 1; -+ return 0; -+ -+ case SNDCTL_DSP_CHANNELS: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val) { -+ if (val < 0 || val > 2) -+ return -EINVAL; -+ -+ abdac_stop(dac); -+ dac->dsp_settings.input_order -+ += val - dac->dsp_settings.channels; -+ dac->dsp_settings.channels = val; -+ } -+ return put_user(val, (int *)arg); -+ -+ case SNDCTL_DSP_GETFMTS: -+ return put_user(AFMT_S16_BE | AFMT_S16_BE, up); -+ -+ case SNDCTL_DSP_SETFMT: -+ if (get_user(val, up)) -+ return -EFAULT; -+ -+ if (val == AFMT_QUERY) { -+ val = dac->dsp_settings.format; -+ } else { -+ ret = abdac_set_format(dac, val); -+ if (ret) -+ return ret; -+ } -+ return put_user(val, up); -+ -+ case SNDCTL_DSP_GETOSPACE: -+ abdac_update_dma_tail(dac); -+ abinfo.fragsize = ((1 << dac->dsp_settings.input_order) -+ * (DMA_PERIOD_SIZE / 4)); -+ abinfo.bytes = (abdac_dma_space(dac) -+ << dac->dsp_settings.input_order); -+ abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4) -+ >> (DMA_PERIOD_SHIFT -+ + dac->dsp_settings.input_order)); -+ abinfo.fragments = ((abinfo.bytes -+ >> dac->dsp_settings.input_order) -+ / (DMA_PERIOD_SIZE / 4)); -+ pr_debug("fragments=%d fragstotal=%d fragsize=%d bytes=%d\n", -+ abinfo.fragments, abinfo.fragstotal, abinfo.fragsize, -+ abinfo.bytes); -+ return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0; -+ -+ default: -+ dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd); -+ return -EINVAL; -+ } -+} -+ -+static int abdac_dsp_open(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = the_dac; -+ int ret; -+ -+ if (file->f_mode & FMODE_READ) -+ return -ENXIO; -+ -+ down(&dac->sem); -+ ret = -EBUSY; -+ if (dac->busy) -+ goto out; -+ -+ dac->dma.head = dac->dma.tail = 0; -+ -+ /* FIXME: What are the correct defaults? */ -+ dac->dsp_settings.channels = 2; -+ abdac_set_format(dac, AFMT_S16_BE); -+ ret = abdac_set_sample_rate(dac, 8000); -+ if (ret) -+ goto out; -+ -+ file->private_data = dac; -+ dac->busy = 1; -+ -+ ret = 0; -+ -+out: -+ up(&dac->sem); -+ return ret; -+} -+ -+static int abdac_dsp_release(struct inode *inode, struct file *file) -+{ -+ struct at32_dac *dac = file->private_data; -+ -+ down(&dac->sem); -+ -+ abdac_stop(dac); -+ abdac_dma_cleanup(dac); -+ dac->busy = 0; -+ -+ up(&dac->sem); -+ -+ return 0; -+} -+ -+static struct file_operations abdac_dsp_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .write = abdac_dsp_write, -+ .ioctl = abdac_dsp_ioctl, -+ .open = abdac_dsp_open, -+ .release = abdac_dsp_release, -+}; -+ -+static int __init abdac_probe(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ struct resource *regs; -+ struct clk *mck; -+ struct clk *sample_clk; -+ int irq; -+ int ret; -+ -+ if (the_dac) -+ return -EBUSY; -+ -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) -+ return -ENXIO; -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; -+ -+ mck = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(mck)) -+ return PTR_ERR(mck); -+ sample_clk = clk_get(&pdev->dev, "sample_clk"); -+ if (IS_ERR(sample_clk)) { -+ ret = PTR_ERR(sample_clk); -+ goto out_put_mck; -+ } -+ clk_enable(mck); -+ -+ ret = -ENOMEM; -+ dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL); -+ if (!dac) -+ goto out_disable_clk; -+ -+ spin_lock_init(&dac->lock); -+ init_MUTEX(&dac->sem); -+ init_waitqueue_head(&dac->write_wait); -+ dac->pdev = pdev; -+ dac->mck = mck; -+ dac->sample_clk = sample_clk; -+ -+ dac->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!dac->regs) -+ goto out_free_dac; -+ -+ ret = request_irq(irq, abdac_interrupt, 0, "dac", dac); -+ if (ret) -+ goto out_unmap_regs; -+ -+ /* FIXME */ -+ dac->req.req.dmac = find_dma_controller(0); -+ if (!dac->req.req.dmac) -+ goto out_free_irq; -+ -+ ret = dma_alloc_channel(dac->req.req.dmac); -+ if (ret < 0) -+ goto out_free_irq; -+ -+ dac->req.req.channel = ret; -+ dac->req.req.block_complete = abdac_dma_block_complete; -+ dac->req.req.error = abdac_dma_error; -+ dac->req.data_reg = regs->start + DAC_DATA; -+ dac->req.periph_id = 2; /* FIXME */ -+ dac->req.direction = DMA_DIR_MEM_TO_PERIPH; -+ dac->req.width = DMA_WIDTH_32BIT; -+ -+ /* Make sure the DAC is silent and disabled */ -+ dac_writel(dac, DATA, 0); -+ dac_writel(dac, CTRL, 0); -+ -+ ret = register_sound_dsp(&abdac_dsp_fops, -1); -+ if (ret < 0) -+ goto out_free_dma; -+ dac->dev_dsp = ret; -+ -+ /* TODO: Register mixer */ -+ -+ the_dac = dac; -+ platform_set_drvdata(pdev, dac); -+ -+ return 0; -+ -+out_free_dma: -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+out_free_irq: -+ free_irq(irq, dac); -+out_unmap_regs: -+ iounmap(dac->regs); -+out_free_dac: -+ kfree(dac); -+out_disable_clk: -+ clk_disable(mck); -+ clk_put(sample_clk); -+out_put_mck: -+ clk_put(mck); -+ return ret; -+} -+ -+static int __exit abdac_remove(struct platform_device *pdev) -+{ -+ struct at32_dac *dac; -+ -+ dac = platform_get_drvdata(pdev); -+ if (dac) { -+ unregister_sound_dsp(dac->dev_dsp); -+ dma_release_channel(dac->req.req.dmac, dac->req.req.channel); -+ free_irq(platform_get_irq(pdev, 0), dac); -+ iounmap(dac->regs); -+ clk_disable(dac->mck); -+ clk_put(dac->sample_clk); -+ clk_put(dac->mck); -+ kfree(dac); -+ platform_set_drvdata(pdev, NULL); -+ the_dac = NULL; -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver abdac_driver = { -+ .remove = __exit_p(abdac_remove), -+ .driver = { -+ .name = "abdac", -+ }, -+}; -+ -+static int __init abdac_init(void) -+{ -+ return platform_driver_probe(&abdac_driver, abdac_probe); -+} -+module_init(abdac_init); -+ -+static void __exit abdac_exit(void) -+{ -+ platform_driver_unregister(&abdac_driver); -+} -+module_exit(abdac_exit); -+ -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h -new file mode 100644 -index 0000000..3c88e25 ---- /dev/null -+++ b/sound/oss/at32_abdac.h -@@ -0,0 +1,59 @@ -+/* -+ * Register definitions for the Atmel AT32 on-chip DAC. -+ * -+ * Copyright (C) 2006 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __SOUND_OSS_AT32_ABDAC_H__ -+#define __SOUND_OSS_AT32_ABDAC_H__ -+ -+/* DAC register offsets */ -+#define DAC_DATA 0x0000 -+#define DAC_CTRL 0x0008 -+#define DAC_INT_MASK 0x000c -+#define DAC_INT_EN 0x0010 -+#define DAC_INT_DIS 0x0014 -+#define DAC_INT_CLR 0x0018 -+#define DAC_INT_STATUS 0x001c -+#define DAC_PDC_DATA 0x0020 -+ -+/* Bitfields in CTRL */ -+#define DAC_SWAP_OFFSET 30 -+#define DAC_SWAP_SIZE 1 -+#define DAC_EN_OFFSET 31 -+#define DAC_EN_SIZE 1 -+ -+/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */ -+#define DAC_UNDERRUN_OFFSET 28 -+#define DAC_UNDERRUN_SIZE 1 -+#define DAC_TX_READY_OFFSET 29 -+#define DAC_TX_READY_SIZE 1 -+#define DAC_TX_BUFFER_EMPTY_OFFSET 30 -+#define DAC_TX_BUFFER_EMPTY_SIZE 1 -+#define DAC_CHANNEL_TX_END_OFFSET 31 -+#define DAC_CHANNEL_TX_END_SIZE 1 -+ -+/* Bit manipulation macros */ -+#define DAC_BIT(name) \ -+ (1 << DAC_##name##_OFFSET) -+#define DAC_BF(name, value) \ -+ (((value) & ((1 << DAC_##name##_SIZE) - 1)) \ -+ << DAC_##name##_OFFSET) -+#define DAC_BFEXT(name, value) \ -+ (((value) >> DAC_##name##_OFFSET) \ -+ & ((1 << DAC_##name##_SIZE) - 1)) -+#define DAC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << DAC_##name##_SIZE) - 1) \ -+ << DAC_##name##_OFFSET)) \ -+ | DAC_BF(name,value)) -+ -+/* Register access macros */ -+#define dac_readl(port, reg) \ -+ __raw_readl((port)->regs + DAC_##reg) -+#define dac_writel(port, reg, value) \ -+ __raw_writel((value), (port)->regs + DAC_##reg) -+ -+#endif /* __SOUND_OSS_AT32_ABDAC_H__ */ -diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig -new file mode 100644 -index 0000000..0d08c29 ---- /dev/null -+++ b/sound/spi/Kconfig -@@ -0,0 +1,31 @@ -+#SPI drivers -+ -+menu "SPI devices" -+ depends on SND != n -+ -+config SND_AT73C213 -+ tristate "Atmel AT73C213 DAC driver" -+ depends on ATMEL_SSC -+ select SND_PCM -+ help -+ Say Y here if you want to use the Atmel AT73C213 external DAC. This -+ DAC can be found on Atmel development boards. -+ -+ This driver requires the Atmel SSC driver for sound sink, a -+ peripheral found on most AT91 and AVR32 microprocessors. -+ -+ To compile this driver as a module, choose M here: the module will be -+ called snd-at73c213. -+ -+config SND_AT73C213_TARGET_BITRATE -+ int "Target bitrate for AT73C213" -+ depends on SND_AT73C213 -+ default "48000" -+ range 8000 50000 -+ help -+ Sets the target bitrate for the bitrate calculator in the driver. -+ Limited by hardware to be between 8000 Hz and 50000 Hz. -+ -+ Set to 48000 Hz by default. -+ -+endmenu -diff --git a/sound/spi/Makefile b/sound/spi/Makefile -new file mode 100644 -index 0000000..026fb73 ---- /dev/null -+++ b/sound/spi/Makefile -@@ -0,0 +1,5 @@ -+# Makefile for SPI drivers -+ -+snd-at73c213-objs := at73c213.o -+ -+obj-$(CONFIG_SND_AT73C213) += snd-at73c213.o -diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c -new file mode 100644 -index 0000000..f514f47 ---- /dev/null -+++ b/sound/spi/at73c213.c -@@ -0,0 +1,1121 @@ -+/* -+ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC -+ * -+ * Copyright (C) 2006-2007 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+ -+/*#define DEBUG*/ -+ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/initval.h> -+#include <sound/control.h> -+#include <sound/core.h> -+#include <sound/pcm.h> -+ -+#include <linux/atmel-ssc.h> -+ -+#include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> -+ -+#include "at73c213.h" -+ -+#define BITRATE_MIN 8000 /* Hardware limit? */ -+#define BITRATE_TARGET CONFIG_SND_AT73C213_TARGET_BITRATE -+#define BITRATE_MAX 50000 /* Hardware limit. */ -+ -+/* Initial (hardware reset) AT73C213 register values. */ -+static u8 snd_at73c213_original_image[18] = -+{ -+ 0x00, /* 00 - CTRL */ -+ 0x05, /* 01 - LLIG */ -+ 0x05, /* 02 - RLIG */ -+ 0x08, /* 03 - LPMG */ -+ 0x08, /* 04 - RPMG */ -+ 0x00, /* 05 - LLOG */ -+ 0x00, /* 06 - RLOG */ -+ 0x22, /* 07 - OLC */ -+ 0x09, /* 08 - MC */ -+ 0x00, /* 09 - CSFC */ -+ 0x00, /* 0A - MISC */ -+ 0x00, /* 0B - */ -+ 0x00, /* 0C - PRECH */ -+ 0x05, /* 0D - AUXG */ -+ 0x00, /* 0E - */ -+ 0x00, /* 0F - */ -+ 0x00, /* 10 - RST */ -+ 0x00, /* 11 - PA_CTRL */ -+}; -+ -+struct snd_at73c213 { -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_pcm_substream *substream; -+ struct at73c213_board_info *board; -+ int irq; -+ int period; -+ unsigned long bitrate; -+ struct clk *bitclk; -+ struct ssc_device *ssc; -+ struct spi_device *spi; -+ u8 spi_wbuffer[2]; -+ u8 spi_rbuffer[2]; -+ /* Image of the SPI registers in AT73C213. */ -+ u8 reg_image[18]; -+ /* Protect registers against concurrent access. */ -+ spinlock_t lock; -+}; -+ -+#define get_chip(card) ((struct snd_at73c213 *)card->private_data) -+ -+static int -+snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer msg_xfer = { -+ .len = 2, -+ .cs_change = 0, -+ }; -+ int retval; -+ -+ spi_message_init(&msg); -+ -+ chip->spi_wbuffer[0] = reg; -+ chip->spi_wbuffer[1] = val; -+ -+ msg_xfer.tx_buf = chip->spi_wbuffer; -+ msg_xfer.rx_buf = chip->spi_rbuffer; -+ spi_message_add_tail(&msg_xfer, &msg); -+ -+ retval = spi_sync(chip->spi, &msg); -+ -+ if (!retval) -+ chip->reg_image[reg] = val; -+ -+ return retval; -+} -+ -+static struct snd_pcm_hardware snd_at73c213_playback_hw = { -+ .info = SNDRV_PCM_INFO_INTERLEAVED | -+ SNDRV_PCM_INFO_BLOCK_TRANSFER, -+ .formats = SNDRV_PCM_FMTBIT_S16_BE, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 8000, /* Replaced by chip->bitrate later. */ -+ .rate_max = 50000, /* Replaced by chip->bitrate later. */ -+ .channels_min = 2, -+ .channels_max = 2, -+ .buffer_bytes_max = 64 * 1024 - 1, -+ .period_bytes_min = 512, -+ .period_bytes_max = 64 * 1024 - 1, -+ .periods_min = 4, -+ .periods_max = 1024, -+}; -+ -+/* -+ * Calculate and set bitrate and divisions. -+ */ -+static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) -+{ -+ unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); -+ unsigned long dac_rate_new, ssc_div, status; -+ unsigned long ssc_div_max, ssc_div_min; -+ int max_tries; -+ -+ /* -+ * We connect two clocks here, picking divisors so the I2S clocks -+ * out data at the same rate the DAC clocks it in ... and as close -+ * as practical to the desired target rate. -+ * -+ * The DAC master clock (MCLK) is programmable, and is either 256 -+ * or (not here) 384 times the I2S output clock (BCLK). -+ */ -+ -+ /* SSC clock / (bitrate * stereo * 16-bit). */ -+ ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16); -+ ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16); -+ ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16); -+ max_tries = (ssc_div_max - ssc_div_min) / 2; -+ -+ if (max_tries < 1) -+ max_tries = 1; -+ -+ /* ssc_div must be a power of 2. */ -+ ssc_div = (ssc_div + 1) & ~1UL; -+ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) { -+ ssc_div -= 2; -+ if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX) -+ return -ENXIO; -+ } -+ -+ /* Search for a possible bitrate. */ -+ do { -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) -+ return -ENXIO; -+ -+ /* 256 / (2 * 16) = 8 */ -+ dac_rate_new = 8 * (ssc_rate / ssc_div); -+ -+ status = clk_round_rate(chip->board->dac_clk, dac_rate_new); -+ if (status < 0) -+ return status; -+ -+ /* Ignore difference smaller than 256 Hz. */ -+ if ((status/256) == (dac_rate_new/256)) -+ goto set_rate; -+ -+ ssc_div += 2; -+ } while (--max_tries); -+ -+ /* Not able to find a valid bitrate. */ -+ return -ENXIO; -+ -+set_rate: -+ status = clk_set_rate(chip->board->dac_clk, status); -+ if (status < 0) -+ return status; -+ -+ /* Set divider in SSC device. */ -+ ssc_writel(chip->ssc->regs, CMR, ssc_div/2); -+ -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ chip->bitrate = ssc_rate / (ssc_div * 16 * 2); -+ -+ dev_info(&chip->spi->dev, -+ "at73c213: supported bitrate is %lu (%lu divider)\n", -+ chip->bitrate, ssc_div); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ snd_at73c213_playback_hw.rate_min = chip->bitrate; -+ snd_at73c213_playback_hw.rate_max = chip->bitrate; -+ runtime->hw = snd_at73c213_playback_hw; -+ chip->substream = substream; -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ chip->substream = NULL; -+ return 0; -+} -+ -+static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ return snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+} -+ -+static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size; -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ -+ chip->period = 0; -+ -+ ssc_writel(chip->ssc->regs, PDC_TPR, -+ (long)runtime->dma_addr); -+ ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2); -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + block_size); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream, -+ int cmd) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ int retval = 0; -+ -+ spin_lock(&chip->lock); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); -+ ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); -+ break; -+ default: -+ dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd); -+ retval = -EINVAL; -+ break; -+ } -+ -+ spin_unlock(&chip->lock); -+ -+ return retval; -+} -+ -+static snd_pcm_uframes_t -+snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = ssc_readl(chip->ssc->regs, PDC_TPR) -+ - (unsigned long)runtime->dma_addr; -+ -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops at73c213_playback_ops = { -+ .open = snd_at73c213_pcm_open, -+ .close = snd_at73c213_pcm_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_at73c213_pcm_hw_params, -+ .hw_free = snd_at73c213_pcm_hw_free, -+ .prepare = snd_at73c213_pcm_prepare, -+ .trigger = snd_at73c213_pcm_trigger, -+ .pointer = snd_at73c213_pcm_pointer, -+}; -+ -+static void snd_at73c213_pcm_free(struct snd_pcm *pcm) -+{ -+ struct snd_at73c213 *chip = snd_pcm_chip(pcm); -+ if (chip->pcm) { -+ snd_pcm_lib_preallocate_free_for_all(chip->pcm); -+ chip->pcm = NULL; -+ } -+} -+ -+static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device) -+{ -+ struct snd_pcm *pcm; -+ int retval; -+ -+ retval = snd_pcm_new(chip->card, chip->card->shortname, -+ device, 1, 0, &pcm); -+ if (retval < 0) -+ goto out; -+ -+ pcm->private_data = chip; -+ pcm->private_free = snd_at73c213_pcm_free; -+ pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER; -+ strcpy(pcm->name, "at73c213"); -+ chip->pcm = pcm; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops); -+ -+ retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm, -+ SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev, -+ 64 * 1024, 64 * 1024); -+out: -+ return retval; -+} -+ -+static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id) -+{ -+ struct snd_at73c213 *chip = dev_id; -+ struct snd_pcm_runtime *runtime = chip->substream->runtime; -+ u32 status; -+ int offset; -+ int block_size; -+ int next_period; -+ int retval = IRQ_NONE; -+ -+ spin_lock(&chip->lock); -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ status = ssc_readl(chip->ssc->regs, IMR); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) { -+ chip->period++; -+ if (chip->period == runtime->periods) -+ chip->period = 0; -+ next_period = chip->period + 1; -+ if (next_period == runtime->periods) -+ next_period = 0; -+ -+ offset = block_size * next_period; -+ -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + offset); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ retval = IRQ_HANDLED; -+ } -+ -+ ssc_readl(chip->ssc->regs, IMR); -+ spin_unlock(&chip->lock); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) -+ snd_pcm_period_elapsed(chip->substream); -+ -+ return retval; -+} -+ -+/* -+ * Mixer functions. -+ */ -+static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ val = (ucontrol->value.integer.value[0] & mask); -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val = (chip->reg_image[reg] & ~(mask << shift)) | val; -+ change = val != chip->reg_image[reg]; -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ -+ if (mask == 1) -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ else -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ -+ uinfo->count = 2; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = mask; -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = -+ (chip->reg_image[left_reg] >> shift_left) & mask; -+ ucontrol->value.integer.value[1] = -+ (chip->reg_image[right_reg] >> shift_right) & mask; -+ -+ if (invert) { -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ ucontrol->value.integer.value[1] = -+ (mask - ucontrol->value.integer.value[1]); -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ int change, retval; -+ unsigned short val1, val2; -+ -+ val1 = ucontrol->value.integer.value[0] & mask; -+ val2 = ucontrol->value.integer.value[1] & mask; -+ if (invert) { -+ val1 = mask - val1; -+ val2 = mask - val2; -+ } -+ val1 <<= shift_left; -+ val2 <<= shift_right; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1; -+ val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2; -+ change = val1 != chip->reg_image[left_reg] -+ || val2 != chip->reg_image[right_reg]; -+ retval = snd_at73c213_write_reg(chip, left_reg, val1); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ retval = snd_at73c213_write_reg(chip, right_reg, val2); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return change; -+ -+out: -+ return retval; -+} -+ -+static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (0x01 - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ if (ucontrol->value.integer.value[0]) -+ val = mask; -+ else -+ val = 0; -+ -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val |= (chip->reg_image[reg] & ~(mask << shift)); -+ change = val != chip->reg_image[reg]; -+ -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_line_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 2; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+static int snd_at73c213_aux_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_mono_switch_info, \ -+ .get = snd_at73c213_mono_switch_get, \ -+ .put = snd_at73c213_mono_switch_put, \ -+ .private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \ -+} -+ -+#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_stereo_info, \ -+ .get = snd_at73c213_stereo_get, \ -+ .put = snd_at73c213_stereo_put, \ -+ .private_value = (left_reg | (right_reg << 8) \ -+ | (shift_left << 16) | (shift_right << 19) \ -+ | (mask << 24) | (invert << 22)) \ -+} -+ -+static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = { -+AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1), -+AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1), -+AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PA Playback Volume", -+ .index = 0, -+ .info = snd_at73c213_pa_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1), -+AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Aux Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_aux_capture_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Line Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_line_capture_volume_info, -+ .get = snd_at73c213_stereo_get, -+ .put = snd_at73c213_stereo_put, -+ .private_value = DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19) -+ | (0x1f << 24) | (1 << 22), -+}, -+AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0), -+}; -+ -+static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip) -+{ -+ struct snd_card *card; -+ int errval, idx; -+ -+ if (chip == NULL || chip->pcm == NULL) -+ return -EINVAL; -+ -+ card = chip->card; -+ -+ strcpy(card->mixername, chip->pcm->name); -+ -+ for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) { -+ errval = snd_ctl_add(card, -+ snd_ctl_new1(&snd_at73c213_controls[idx], -+ chip)); -+ if (errval < 0) -+ goto cleanup; -+ } -+ -+ return 0; -+ -+cleanup: -+ for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) { -+ struct snd_kcontrol *kctl; -+ kctl = snd_ctl_find_numid(card, idx); -+ if (kctl) -+ snd_ctl_remove(card, kctl); -+ } -+ return errval; -+} -+ -+/* -+ * Device functions -+ */ -+static int snd_at73c213_ssc_init(struct snd_at73c213 *chip) -+{ -+ /* -+ * Continuous clock output. -+ * Starts on falling TF. -+ * Delay 1 cycle (1 bit). -+ * Periode is 16 bit (16 - 1). -+ */ -+ ssc_writel(chip->ssc->regs, TCMR, -+ SSC_BF(TCMR_CKO, 1) -+ | SSC_BF(TCMR_START, 4) -+ | SSC_BF(TCMR_STTDLY, 1) -+ | SSC_BF(TCMR_PERIOD, 16 - 1)); -+ /* -+ * Data length is 16 bit (16 - 1). -+ * Transmit MSB first. -+ * Transmit 2 words each transfer. -+ * Frame sync length is 16 bit (16 - 1). -+ * Frame starts on negative pulse. -+ */ -+ ssc_writel(chip->ssc->regs, TFMR, -+ SSC_BF(TFMR_DATLEN, 16 - 1) -+ | SSC_BIT(TFMR_MSBF) -+ | SSC_BF(TFMR_DATNB, 1) -+ | SSC_BF(TFMR_FSLEN, 16 - 1) -+ | SSC_BF(TFMR_FSOS, 1)); -+ -+ return 0; -+} -+ -+static int snd_at73c213_chip_init(struct snd_at73c213 *chip) -+{ -+ int retval; -+ unsigned char dac_ctrl = 0; -+ -+ retval = snd_at73c213_set_bitrate(chip); -+ if (retval) -+ goto out; -+ -+ /* Enable DAC master clock. */ -+ clk_enable(chip->board->dac_clk); -+ -+ /* Initialize at73c213 on SPI bus. */ -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04); -+ if (retval) -+ goto out_clk; -+ msleep(1); -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03); -+ if (retval) -+ goto out_clk; -+ -+ /* Precharge everything. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH)); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, -+ (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(50); -+ -+ /* Stop precharging PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, -+ (1<<PA_CTRL_APALP) | 0x0f); -+ if (retval) -+ goto out_clk; -+ -+ msleep(450); -+ -+ /* Stop precharging DAC, turn on master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(1); -+ -+ /* Turn on DAC. */ -+ dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR) -+ | (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR); -+ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl); -+ if (retval) -+ goto out_clk; -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out_clk; -+ -+ /* Enable I2S device, i.e. clock output. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ goto out; -+ -+out_clk: -+ clk_disable(chip->board->dac_clk); -+out: -+ return retval; -+} -+ -+static int snd_at73c213_dev_free(struct snd_device *device) -+{ -+ struct snd_at73c213 *chip = device->device_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ if (chip->irq >= 0) { -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+ } -+ -+ return 0; -+} -+ -+static int __devinit snd_at73c213_dev_init(struct snd_card *card, -+ struct spi_device *spi) -+{ -+ static struct snd_device_ops ops = { -+ .dev_free = snd_at73c213_dev_free, -+ }; -+ struct snd_at73c213 *chip = get_chip(card); -+ int irq, retval; -+ -+ irq = chip->ssc->irq; -+ if (irq < 0) -+ return irq; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->irq = -1; -+ -+ retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip); -+ if (retval) { -+ dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq); -+ goto out; -+ } -+ chip->irq = irq; -+ -+ memcpy(&chip->reg_image, &snd_at73c213_original_image, -+ sizeof(snd_at73c213_original_image)); -+ -+ retval = snd_at73c213_ssc_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_chip_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_pcm_new(chip, 0); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_mixer(chip); -+ if (retval) -+ goto out_snd_dev; -+ -+ snd_card_set_dev(card, &spi->dev); -+ -+ goto out; -+ -+out_snd_dev: -+ snd_device_free(card, chip); -+out_irq: -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+out: -+ return retval; -+} -+ -+static int snd_at73c213_probe(struct spi_device *spi) -+{ -+ struct snd_card *card; -+ struct snd_at73c213 *chip; -+ struct at73c213_board_info *board; -+ int retval; -+ char id[16]; -+ -+ board = spi->dev.platform_data; -+ if (!board) { -+ dev_dbg(&spi->dev, "no platform_data\n"); -+ return -ENXIO; -+ } -+ -+ if (!board->dac_clk) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return -ENXIO; -+ } -+ -+ if (IS_ERR(board->dac_clk)) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return PTR_ERR(board->dac_clk); -+ } -+ -+ retval = -ENOMEM; -+ -+ /* Allocate "card" using some unused identifiers. */ -+ snprintf(id, sizeof id, "at73c213_%d", board->ssc_id); -+ card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213)); -+ if (!card) -+ goto out; -+ -+ chip = card->private_data; -+ chip->spi = spi; -+ chip->board = board; -+ -+ chip->ssc = ssc_request(board->ssc_id); -+ if (IS_ERR(chip->ssc)) { -+ dev_dbg(&spi->dev, "could not get ssc%d device\n", -+ board->ssc_id); -+ retval = PTR_ERR(chip->ssc); -+ goto out_card; -+ } -+ -+ retval = snd_at73c213_dev_init(card, spi); -+ if (retval) -+ goto out_ssc; -+ -+ strcpy(card->driver, "at73c213"); -+ strcpy(card->shortname, board->shortname); -+ sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq); -+ -+ retval = snd_card_register(card); -+ if (retval) -+ goto out_ssc; -+ -+ dev_set_drvdata(&spi->dev, card); -+ -+ goto out; -+ -+out_ssc: -+ ssc_free(chip->ssc); -+out_card: -+ snd_card_free(card); -+out: -+ return retval; -+} -+ -+static int __devexit snd_at73c213_remove(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ int retval; -+ -+ /* Stop playback. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out; -+ -+ /* Turn off PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f)); -+ if (retval) -+ goto out; -+ msleep(10); -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f); -+ if (retval) -+ goto out; -+ -+ /* Turn off external DAC. */ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c); -+ if (retval) -+ goto out; -+ msleep(2); -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00); -+ if (retval) -+ goto out; -+ -+ /* Turn off master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00); -+ if (retval) -+ goto out; -+ -+out: -+ /* Stop DAC master clock. */ -+ clk_disable(chip->board->dac_clk); -+ -+ ssc_free(chip->ssc); -+ snd_card_free(card); -+ dev_set_drvdata(&spi->dev, NULL); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ clk_disable(chip->board->dac_clk); -+ -+ return 0; -+} -+ -+static int snd_at73c213_resume(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ clk_enable(chip->board->dac_clk); -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ return 0; -+} -+#else -+#define snd_at73c213_suspend NULL -+#define snd_at73c213_resume NULL -+#endif -+ -+static struct spi_driver at73c213_driver = { -+ .driver = { -+ .name = "at73c213", -+ }, -+ .probe = snd_at73c213_probe, -+ .suspend = snd_at73c213_suspend, -+ .resume = snd_at73c213_resume, -+ .remove = __devexit_p(snd_at73c213_remove), -+}; -+ -+static int __init at73c213_init(void) -+{ -+ return spi_register_driver(&at73c213_driver); -+} -+module_init(at73c213_init); -+ -+static void __exit at73c213_exit(void) -+{ -+ spi_unregister_driver(&at73c213_driver); -+} -+module_exit(at73c213_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h -new file mode 100644 -index 0000000..fd8b372 ---- /dev/null -+++ b/sound/spi/at73c213.h -@@ -0,0 +1,119 @@ -+/* -+ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 -+ * -+ * Copyright (C) 2006 - 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+ -+#ifndef _SND_AT73C213_H -+#define _SND_AT73C213_H -+ -+/* DAC control register */ -+#define DAC_CTRL 0x00 -+#define DAC_CTRL_ONPADRV 7 -+#define DAC_CTRL_ONAUXIN 6 -+#define DAC_CTRL_ONDACR 5 -+#define DAC_CTRL_ONDACL 4 -+#define DAC_CTRL_ONLNOR 3 -+#define DAC_CTRL_ONLNOL 2 -+#define DAC_CTRL_ONLNIR 1 -+#define DAC_CTRL_ONLNIL 0 -+ -+/* DAC left line in gain register */ -+#define DAC_LLIG 0x01 -+#define DAC_LLIG_LLIG 0 -+ -+/* DAC right line in gain register */ -+#define DAC_RLIG 0x02 -+#define DAC_RLIG_RLIG 0 -+ -+/* DAC Left Master Playback Gain Register */ -+#define DAC_LMPG 0x03 -+#define DAC_LMPG_LMPG 0 -+ -+/* DAC Right Master Playback Gain Register */ -+#define DAC_RMPG 0x04 -+#define DAC_RMPG_RMPG 0 -+ -+/* DAC Left Line Out Gain Register */ -+#define DAC_LLOG 0x05 -+#define DAC_LLOG_LLOG 0 -+ -+/* DAC Right Line Out Gain Register */ -+#define DAC_RLOG 0x06 -+#define DAC_RLOG_RLOG 0 -+ -+/* DAC Output Level Control Register */ -+#define DAC_OLC 0x07 -+#define DAC_OLC_RSHORT 7 -+#define DAC_OLC_ROLC 4 -+#define DAC_OLC_LSHORT 3 -+#define DAC_OLC_LOLC 0 -+ -+/* DAC Mixer Control Register */ -+#define DAC_MC 0x08 -+#define DAC_MC_INVR 5 -+#define DAC_MC_INVL 4 -+#define DAC_MC_RMSMIN2 3 -+#define DAC_MC_RMSMIN1 2 -+#define DAC_MC_LMSMIN2 1 -+#define DAC_MC_LMSMIN1 0 -+ -+/* DAC Clock and Sampling Frequency Control Register */ -+#define DAC_CSFC 0x09 -+#define DAC_CSFC_OVRSEL 4 -+ -+/* DAC Miscellaneous Register */ -+#define DAC_MISC 0x0A -+#define DAC_MISC_VCMCAPSEL 7 -+#define DAC_MISC_DINTSEL 4 -+#define DAC_MISC_DITHEN 3 -+#define DAC_MISC_DEEMPEN 2 -+#define DAC_MISC_NBITS 0 -+ -+/* DAC Precharge Control Register */ -+#define DAC_PRECH 0x0C -+#define DAC_PRECH_PRCHGPDRV 7 -+#define DAC_PRECH_PRCHGAUX1 6 -+#define DAC_PRECH_PRCHGLNOR 5 -+#define DAC_PRECH_PRCHGLNOL 4 -+#define DAC_PRECH_PRCHGLNIR 3 -+#define DAC_PRECH_PRCHGLNIL 2 -+#define DAC_PRECH_PRCHG 1 -+#define DAC_PRECH_ONMSTR 0 -+ -+/* DAC Auxiliary Input Gain Control Register */ -+#define DAC_AUXG 0x0D -+#define DAC_AUXG_AUXG 0 -+ -+/* DAC Reset Register */ -+#define DAC_RST 0x10 -+#define DAC_RST_RESMASK 2 -+#define DAC_RST_RESFILZ 1 -+#define DAC_RST_RSTZ 0 -+ -+/* Power Amplifier Control Register */ -+#define PA_CTRL 0x11 -+#define PA_CTRL_APAON 6 -+#define PA_CTRL_APAPRECH 5 -+#define PA_CTRL_APALP 4 -+#define PA_CTRL_APAGAIN 0 -+ -+#endif /* _SND_AT73C213_H */ |