From a53c47f87bf6ca67fd6ce45865dc325a4216993a Mon Sep 17 00:00:00 2001 From: bryan newbold Date: Sun, 6 Oct 2013 16:03:23 -0400 Subject: add test/ and isim/ system --- tb/another_tb.v | 36 ++++++++++++++++++++++++++++++++++++ tb/another_tb.wcfg | 22 ++++++++++++++++++++++ tb/complicated_test.v | 37 +++++++++++++++++++++++++++++++++++++ tb/main_tb.v | 36 ++++++++++++++++++++++++++++++++++++ tb/main_tb.wcfg | 31 +++++++++++++++++++++++++++++++ tb/signals.wcfg | 42 ------------------------------------------ tb/tb.v | 36 ------------------------------------ tb/trivial_test.v | 36 ++++++++++++++++++++++++++++++++++++ 8 files changed, 198 insertions(+), 78 deletions(-) create mode 100755 tb/another_tb.v create mode 100644 tb/another_tb.wcfg create mode 100755 tb/complicated_test.v create mode 100755 tb/main_tb.v create mode 100644 tb/main_tb.wcfg delete mode 100644 tb/signals.wcfg delete mode 100755 tb/tb.v create mode 100755 tb/trivial_test.v (limited to 'tb') diff --git a/tb/another_tb.v b/tb/another_tb.v new file mode 100755 index 0000000..a331a0c --- /dev/null +++ b/tb/another_tb.v @@ -0,0 +1,36 @@ +`timescale 1ps/1ps +module another_tb; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("FAIL"); + $finish(); +end + +endmodule diff --git a/tb/another_tb.wcfg b/tb/another_tb.wcfg new file mode 100644 index 0000000..ad23047 --- /dev/null +++ b/tb/another_tb.wcfg @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + LED_output[3:0] + LED_output[3:0] + + + FPGA_RESET + FPGA_RESET + + diff --git a/tb/complicated_test.v b/tb/complicated_test.v new file mode 100755 index 0000000..731c0c7 --- /dev/null +++ b/tb/complicated_test.v @@ -0,0 +1,37 @@ +`timescale 1ps/1ps +module complicated_test; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("FAIL"); + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("PASS"); + $finish(); +end + +endmodule diff --git a/tb/main_tb.v b/tb/main_tb.v new file mode 100755 index 0000000..b0f1346 --- /dev/null +++ b/tb/main_tb.v @@ -0,0 +1,36 @@ +`timescale 1ps/1ps +module main_tb; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("PASS"); + $finish(); +end + +endmodule diff --git a/tb/main_tb.wcfg b/tb/main_tb.wcfg new file mode 100644 index 0000000..2347506 --- /dev/null +++ b/tb/main_tb.wcfg @@ -0,0 +1,31 @@ + + + + + + + + + + + + + + + + CLK100 + CLK100 + + + FPGA_RESET + FPGA_RESET + + + Switch_input[3:0] + Switch_input[3:0] + + + LED_output[3:0] + LED_output[3:0] + + diff --git a/tb/signals.wcfg b/tb/signals.wcfg deleted file mode 100644 index dbb5e1a..0000000 --- a/tb/signals.wcfg +++ /dev/null @@ -1,42 +0,0 @@ - - - - - - - - - - - - - - - LED_output_2 - LED_output_2 - - - Switch_input_0 - Switch_input_0 - - - Switch_input_1 - Switch_input_1 - - - Switch_input_2 - Switch_input_2 - - - Switch_input_3 - Switch_input_3 - - - SYSTEMCLOCK - SYSTEMCLOCK - - - PUSH_BUTTON_RESET_RAW - PUSH_BUTTON_RESET_RAW - - diff --git a/tb/tb.v b/tb/tb.v deleted file mode 100755 index d5ce452..0000000 --- a/tb/tb.v +++ /dev/null @@ -1,36 +0,0 @@ -`timescale 1ps/1ps -module tb; - - reg CLK100; -always @(CLK100) begin - #4980.00 CLK100 <= ~CLK100; -end - -initial begin - #0 CLK100 <= 1'b0; // the first event that sets the clock in motion -end - - -reg [3:0] Switch_input; -wire [3:0] LED_output; -wire FPGA_RESET; - -main main_i ( - .PUSH_BUTTON_RESET_RAW(FPGA_RESET), - .SYSTEMCLOCK(CLK100), - .gpio_led(LED_output), - .gpio_switch(Switch_input) - ); - - -initial begin - #0 Switch_input <= 4'h00; - $display("Switch set to zero"); - #1000000 Switch_input <= 4'h01; - $display("Switch set to one"); - #2000000 - $display("TEST COMPLETE"); - $finish(); -end - -endmodule diff --git a/tb/trivial_test.v b/tb/trivial_test.v new file mode 100755 index 0000000..e12a52f --- /dev/null +++ b/tb/trivial_test.v @@ -0,0 +1,36 @@ +`timescale 1ps/1ps +module trivial_test; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("PASS"); + $finish(); +end + +endmodule -- cgit v1.2.3