From 4782465ef5d08bd7e7a36085a3013ed379e90ec2 Mon Sep 17 00:00:00 2001
From: bryan newbold <bnewbold@leaflabs.com>
Date: Tue, 12 Nov 2013 19:57:34 -0500
Subject: hack fix for bug with include ordering

There seems to be a problem with the default target being overriden when
a board-specific file is included before xilinx.mk. Workaround is to
include targets last.
---
 contrib/xula2/xula2.mk | 24 ------------------------
 1 file changed, 24 deletions(-)
 delete mode 100644 contrib/xula2/xula2.mk

(limited to 'contrib/xula2/xula2.mk')

diff --git a/contrib/xula2/xula2.mk b/contrib/xula2/xula2.mk
deleted file mode 100644
index 681fe38..0000000
--- a/contrib/xula2/xula2.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-# xula2 device-specific configuration variables and make targets
-
-.PHONY: prog prog_flash
-
-board := xula2
-family := spartan6
-device := XC6SLX25
-speedgrade := -2
-device_package := ftg256
-bitconf_file := ./contrib/xula2/xula2.bitconf
-ucf_file := ./contrib/xula2/xula2.ucf
-opt_file := ./contrib/default.opt
-
-# This target uploads directly to the FPGA; volatile
-prog: build/$(project).bit
-	# First ensure that xsload.py is installed
-	@xsload.py --version
-	@xsload.py --fpga build/$(project).bit
- 
-# This target uploads to the SPI flash on board; non-volatile
-prog_flash: build/$(project).bit
-	# First ensure that xsload.py is installed
-	@xsload.py --version
-	@xsload.py --flash build/$(project).bit
-- 
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