From 9c621a0e0df0d5837e99d70019953a098db4a505 Mon Sep 17 00:00:00 2001
From: bryan newbold <bnewbold@leaflabs.com>
Date: Wed, 13 Nov 2013 10:34:37 -0500
Subject: move complicated.v to contrib directory

---
 contrib/Makefile.complicated |  2 +-
 contrib/complicated.v        | 71 ++++++++++++++++++++++++++++++++++++++++++++
 hdl/complicated.v            | 71 --------------------------------------------
 3 files changed, 72 insertions(+), 72 deletions(-)
 create mode 100644 contrib/complicated.v
 delete mode 100644 hdl/complicated.v

diff --git a/contrib/Makefile.complicated b/contrib/Makefile.complicated
index 883248a..9e2c015 100644
--- a/contrib/Makefile.complicated
+++ b/contrib/Makefile.complicated
@@ -16,7 +16,7 @@ hostbits := 64
 iseenv := /opt/Xilinx/14.3/ISE_DS/
 #iseenv := /opt/Xilinx/14.7/ISE_DS/
 
-verilog_files += hdl/complicated.v
+verilog_files += contrib/complicated.v
 verilog_files += hdl/rot13.v
 
 vhdl_files +=
diff --git a/contrib/complicated.v b/contrib/complicated.v
new file mode 100644
index 0000000..4d31588
--- /dev/null
+++ b/contrib/complicated.v
@@ -0,0 +1,71 @@
+/*
+ * complicated.v
+ *
+ * Copyright: (C) 2013 LeafLabs, LLC
+ * License: MIT License (See LICENSE file)
+ * Author: Bryan Newbold <bnewbold@leaflabs.com>
+ * Date: November 2013
+ *
+ * This is an intentionally complicated top-level file.
+ *
+ * TODO if using this as a template for another design:
+ *  - use a clock buffer, even if sticking with 12mhz
+ */
+
+module complicated (
+    input wire clock_12mhz,
+    inout wire [31:0] chan,
+    inout wire chan_clk,
+
+    //// Flash and microSD I/O
+    output wire microsd_cs,
+    output wire flash_cs,
+    output wire flash_sclk,
+    output wire flash_mosi,
+    output wire flash_miso
+    );
+
+    parameter GIT_COMMIT = 0;
+    parameter BUILD_UNIX_TIME = 0;
+
+    wire reset = chan[0];
+
+    reg [22:0] throb_counter = 0;
+    reg throb_led = 0;
+    assign chan[10] = throb_led;
+
+    bram bram_inst (
+        .clka(clock_12mhz),
+        .ena(1'b0),
+        .wea(1'b1),
+        .addra(10),
+        .dina(11),
+        .clkb(clock_12mhz),
+        .rstb(reset),
+        .enb(1'b0),
+        .addrb(13),
+        .doutb()
+        );
+
+    always @(posedge clock_12mhz) begin
+        if (reset) begin
+            throb_counter <= 0;
+            throb_led <= 0;
+        end else begin
+            if (throb_counter >= 23'd06_000_000) begin
+                throb_led <= !throb_led;
+                throb_counter <= 23'd0;
+            end else begin
+                throb_counter <= throb_counter + 23'd1;
+            end
+        end
+    end
+
+    // Tie off unused outputs
+    assign microsd_cs = 1'bZ;
+    assign flash_cs = 1'bZ;
+    assign flash_sclk = 1'bZ;
+    assign flash_mosi = 1'bZ;
+    assign flash_miso = 1'bZ;
+
+endmodule
diff --git a/hdl/complicated.v b/hdl/complicated.v
deleted file mode 100644
index 4d31588..0000000
--- a/hdl/complicated.v
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * complicated.v
- *
- * Copyright: (C) 2013 LeafLabs, LLC
- * License: MIT License (See LICENSE file)
- * Author: Bryan Newbold <bnewbold@leaflabs.com>
- * Date: November 2013
- *
- * This is an intentionally complicated top-level file.
- *
- * TODO if using this as a template for another design:
- *  - use a clock buffer, even if sticking with 12mhz
- */
-
-module complicated (
-    input wire clock_12mhz,
-    inout wire [31:0] chan,
-    inout wire chan_clk,
-
-    //// Flash and microSD I/O
-    output wire microsd_cs,
-    output wire flash_cs,
-    output wire flash_sclk,
-    output wire flash_mosi,
-    output wire flash_miso
-    );
-
-    parameter GIT_COMMIT = 0;
-    parameter BUILD_UNIX_TIME = 0;
-
-    wire reset = chan[0];
-
-    reg [22:0] throb_counter = 0;
-    reg throb_led = 0;
-    assign chan[10] = throb_led;
-
-    bram bram_inst (
-        .clka(clock_12mhz),
-        .ena(1'b0),
-        .wea(1'b1),
-        .addra(10),
-        .dina(11),
-        .clkb(clock_12mhz),
-        .rstb(reset),
-        .enb(1'b0),
-        .addrb(13),
-        .doutb()
-        );
-
-    always @(posedge clock_12mhz) begin
-        if (reset) begin
-            throb_counter <= 0;
-            throb_led <= 0;
-        end else begin
-            if (throb_counter >= 23'd06_000_000) begin
-                throb_led <= !throb_led;
-                throb_counter <= 23'd0;
-            end else begin
-                throb_counter <= throb_counter + 23'd1;
-            end
-        end
-    end
-
-    // Tie off unused outputs
-    assign microsd_cs = 1'bZ;
-    assign flash_cs = 1'bZ;
-    assign flash_sclk = 1'bZ;
-    assign flash_mosi = 1'bZ;
-    assign flash_miso = 1'bZ;
-
-endmodule
-- 
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