From 2e77e418dee3bfcf16a23b7d6dcaafcb3d69422b Mon Sep 17 00:00:00 2001
From: bryan newbold <bnewbold@leaflabs.com>
Date: Wed, 19 Jun 2013 13:26:12 -0400
Subject: very minor style tweaks from downstream repos

---
 .gitignore | 1 +
 Makefile   | 2 +-
 README     | 2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/.gitignore b/.gitignore
index 7c1c6e6..6d462a8 100644
--- a/.gitignore
+++ b/.gitignore
@@ -65,3 +65,4 @@ tb/simulate_isim.prj
 iseconfig/
 build/
 coregen-tmp/
+cores/*.v
diff --git a/Makefile b/Makefile
index 16ffb50..20e992a 100644
--- a/Makefile
+++ b/Makefile
@@ -29,7 +29,7 @@ xilinx_cores :=
 #xilinx_cores += cores/example.xco
 
 # bitfile bitwidth for flash uploads
-mcs_datawidth = 16
+mcs_datawidth := 16
 
 # Bulk of the actual Makefile is in a different file.
 include ./contrib/xilinx.mk
diff --git a/README b/README
index eddc25c..826715e 100644
--- a/README
+++ b/README
@@ -61,7 +61,7 @@ Simulate with isim via:
 
     make simulate
 
-View the results using isim with:
+View the results using the isim GUI with:
 
     make isim
 
-- 
cgit v1.2.3