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xilinx.mk
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Author
Age
Files
Lines
*
rename some targets
bryan newbold
2013-11-12
1
-8
/
+8
*
hack fix for bug with include ordering
bryan newbold
2013-11-12
1
-2
/
+3
*
reorder contrib/xilinx.mk; re-instate ./bitfile/
bryan newbold
2013-11-12
1
-16
/
+25
*
clean up cleaning (heh)
bryan newbold
2013-11-12
1
-3
/
+13
*
Part 1 of refactoring template files into ./contrib
bryan newbold
2013-11-12
1
-76
/
+137
*
minor cleanup of lint target
bryan newbold
2013-11-12
1
-1
/
+1
*
initial VHDL support
bryan newbold
2013-11-12
1
-4
/
+16
*
need to specify .pcf file to bitgen for some cases
bryan newbold
2013-10-21
1
-1
/
+1
*
partially fix bug where synthesis continues after .ngc failure
bryan newbold
2013-10-09
1
-0
/
+2
*
clean up test stuff
bryan newbold
2013-10-08
1
-0
/
+3
*
working xula2 sim/syn/prog system
bryan newbold
2013-10-08
1
-2
/
+2
*
don't have outputs depend on makefiles
bryan newbold
2013-10-08
1
-3
/
+3
*
linting: ignore module/filename equivalence
bryan newbold
2013-10-06
1
-1
/
+1
*
add test/ and isim/ system
bryan newbold
2013-10-06
1
-12
/
+34
*
add concept of 'board' for seperate ucfs and top level modules
bryan newbold
2013-10-04
1
-22
/
+23
*
add autoimpact target (pre-select bitfile)
bryan newbold
2013-10-04
1
-0
/
+3
*
generic timingan target
bryan newbold
2013-10-04
1
-0
/
+3
*
backport improvements from SNG project
bryan newbold
2013-10-04
1
-3
/
+7
*
typo: pre-par .ncd file for partial_timing analysis
bryan newbold
2013-06-27
1
-1
/
+1
*
parameterize unconstrained timing analysis
bryan newbold
2013-06-27
1
-2
/
+3
*
fix bugs with trce and par
bryan newbold
2013-06-27
1
-4
/
+4
*
break out synth_effort as a variable
bryan newbold
2013-06-27
1
-2
/
+3
*
fix potential problem with old etwr target
bryan newbold
2013-06-27
1
-1
/
+1
*
add planahead, fpga_editor, and timing targets
bryan newbold
2013-06-27
1
-13
/
+31
*
don't re-coregen after every little Makefile tweak
bryan newbold
2013-06-19
1
-1
/
+1
*
proper Makefile syntax; device-specific; mcs bitwidth
bryan newbold
2013-06-19
1
-2
/
+3
*
add 'make lint' verilog-build command; requires verilator
bryan newbold
2013-06-05
1
-1
/
+4
*
update with bnewbold's changes
bryan newbold
2013-03-27
1
-74
/
+63
*
initial colorization stuff
bryan newbold
2013-03-27
1
-1
/
+1
*
compile in multiple tb-modules (this might slow things down for you)
bryan newbold
2013-03-21
1
-2
/
+6
*
add .ucf file reference
bryan newbold
2013-03-21
1
-1
/
+1
*
isim in the background; hackisly fix deps
bryan newbold
2013-03-20
1
-4
/
+4
*
fixes to simulate
bryan newbold
2013-03-20
1
-8
/
+6
*
fix ise project pointers
bryan newbold
2013-03-14
1
-1
/
+1
*
improvements
bryan newbold
2013-03-14
1
-12
/
+20
*
some simulation stuff
bryan newbold
2013-03-13
1
-2
/
+38
*
move stuff around; backup
bryan newbold
2013-03-13
1
-6
/
+17
*
basic synthesis version of makefile
bryan newbold
2013-03-13
1
-0
/
+181