diff options
Diffstat (limited to 'tb')
-rwxr-xr-x | tb/another_tb.v (renamed from tb/tb.v) | 4 | ||||
-rw-r--r-- | tb/another_tb.wcfg | 22 | ||||
-rwxr-xr-x | tb/complicated_test.v | 37 | ||||
-rwxr-xr-x | tb/main_tb.v | 36 | ||||
-rw-r--r-- | tb/main_tb.wcfg | 31 | ||||
-rw-r--r-- | tb/signals.wcfg | 42 | ||||
-rwxr-xr-x | tb/trivial_test.v | 36 |
7 files changed, 164 insertions, 44 deletions
diff --git a/tb/tb.v b/tb/another_tb.v index d5ce452..a331a0c 100755 --- a/tb/tb.v +++ b/tb/another_tb.v @@ -1,5 +1,5 @@ `timescale 1ps/1ps -module tb; +module another_tb; reg CLK100; always @(CLK100) begin @@ -29,7 +29,7 @@ initial begin #1000000 Switch_input <= 4'h01; $display("Switch set to one"); #2000000 - $display("TEST COMPLETE"); + $display("FAIL"); $finish(); end diff --git a/tb/another_tb.wcfg b/tb/another_tb.wcfg new file mode 100644 index 0000000..ad23047 --- /dev/null +++ b/tb/another_tb.wcfg @@ -0,0 +1,22 @@ +<?xml version="1.0" encoding="UTF-8"?> +<wave_config> + <wave_state> + </wave_state> + <db_ref_list> + <db_ref path="./isim.wdb" id="1" type="auto"> + <top_modules> + <top_module name="another_tb" /> + <top_module name="glbl" /> + </top_modules> + </db_ref> + </db_ref_list> + <WVObjectSize size="2" /> + <wvobject fp_name="/another_tb/LED_output" type="array" db_ref_id="1"> + <obj_property name="ElementShortName">LED_output[3:0]</obj_property> + <obj_property name="ObjectShortName">LED_output[3:0]</obj_property> + </wvobject> + <wvobject fp_name="/another_tb/FPGA_RESET" type="logic" db_ref_id="1"> + <obj_property name="ElementShortName">FPGA_RESET</obj_property> + <obj_property name="ObjectShortName">FPGA_RESET</obj_property> + </wvobject> +</wave_config> diff --git a/tb/complicated_test.v b/tb/complicated_test.v new file mode 100755 index 0000000..731c0c7 --- /dev/null +++ b/tb/complicated_test.v @@ -0,0 +1,37 @@ +`timescale 1ps/1ps +module complicated_test; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("FAIL"); + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("PASS"); + $finish(); +end + +endmodule diff --git a/tb/main_tb.v b/tb/main_tb.v new file mode 100755 index 0000000..b0f1346 --- /dev/null +++ b/tb/main_tb.v @@ -0,0 +1,36 @@ +`timescale 1ps/1ps +module main_tb; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("PASS"); + $finish(); +end + +endmodule diff --git a/tb/main_tb.wcfg b/tb/main_tb.wcfg new file mode 100644 index 0000000..2347506 --- /dev/null +++ b/tb/main_tb.wcfg @@ -0,0 +1,31 @@ +<?xml version="1.0" encoding="UTF-8"?> +<wave_config> + <wave_state> + </wave_state> + <db_ref_list> + <db_ref path="./isim.wdb" id="1" type="auto"> + <top_modules> + <top_module name="another_tb" /> + <top_module name="glbl" /> + <top_module name="main_tb" /> + </top_modules> + </db_ref> + </db_ref_list> + <WVObjectSize size="4" /> + <wvobject fp_name="/main_tb/CLK100" type="logic" db_ref_id="1"> + <obj_property name="ElementShortName">CLK100</obj_property> + <obj_property name="ObjectShortName">CLK100</obj_property> + </wvobject> + <wvobject fp_name="/main_tb/FPGA_RESET" type="logic" db_ref_id="1"> + <obj_property name="ElementShortName">FPGA_RESET</obj_property> + <obj_property name="ObjectShortName">FPGA_RESET</obj_property> + </wvobject> + <wvobject fp_name="/main_tb/Switch_input" type="array" db_ref_id="1"> + <obj_property name="ElementShortName">Switch_input[3:0]</obj_property> + <obj_property name="ObjectShortName">Switch_input[3:0]</obj_property> + </wvobject> + <wvobject fp_name="/main_tb/LED_output" type="array" db_ref_id="1"> + <obj_property name="ElementShortName">LED_output[3:0]</obj_property> + <obj_property name="ObjectShortName">LED_output[3:0]</obj_property> + </wvobject> +</wave_config> diff --git a/tb/signals.wcfg b/tb/signals.wcfg deleted file mode 100644 index dbb5e1a..0000000 --- a/tb/signals.wcfg +++ /dev/null @@ -1,42 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?> -<wave_config> - <wave_state> - </wave_state> - <db_ref_list> - <db_ref path="./isim.wdb" id="1" type="auto"> - <top_modules> - <top_module name="glbl" /> - <top_module name="tb" /> - </top_modules> - </db_ref> - </db_ref_list> - <WVObjectSize size="7" /> - <wvobject fp_name="/tb/project_i/LED_output_2" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">LED_output_2</obj_property> - <obj_property name="ObjectShortName">LED_output_2</obj_property> - </wvobject> - <wvobject fp_name="/tb/project_i/Switch_input_0" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">Switch_input_0</obj_property> - <obj_property name="ObjectShortName">Switch_input_0</obj_property> - </wvobject> - <wvobject fp_name="/tb/project_i/Switch_input_1" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">Switch_input_1</obj_property> - <obj_property name="ObjectShortName">Switch_input_1</obj_property> - </wvobject> - <wvobject fp_name="/tb/project_i/Switch_input_2" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">Switch_input_2</obj_property> - <obj_property name="ObjectShortName">Switch_input_2</obj_property> - </wvobject> - <wvobject fp_name="/tb/project_i/Switch_input_3" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">Switch_input_3</obj_property> - <obj_property name="ObjectShortName">Switch_input_3</obj_property> - </wvobject> - <wvobject fp_name="/tb/project_i/SYSTEMCLOCK" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">SYSTEMCLOCK</obj_property> - <obj_property name="ObjectShortName">SYSTEMCLOCK</obj_property> - </wvobject> - <wvobject fp_name="/tb/project_i/PUSH_BUTTON_RESET_RAW" type="logic" db_ref_id="1"> - <obj_property name="ElementShortName">PUSH_BUTTON_RESET_RAW</obj_property> - <obj_property name="ObjectShortName">PUSH_BUTTON_RESET_RAW</obj_property> - </wvobject> -</wave_config> diff --git a/tb/trivial_test.v b/tb/trivial_test.v new file mode 100755 index 0000000..e12a52f --- /dev/null +++ b/tb/trivial_test.v @@ -0,0 +1,36 @@ +`timescale 1ps/1ps +module trivial_test; + + reg CLK100; +always @(CLK100) begin + #4980.00 CLK100 <= ~CLK100; +end + +initial begin + #0 CLK100 <= 1'b0; // the first event that sets the clock in motion +end + + +reg [3:0] Switch_input; +wire [3:0] LED_output; +wire FPGA_RESET; + +main main_i ( + .PUSH_BUTTON_RESET_RAW(FPGA_RESET), + .SYSTEMCLOCK(CLK100), + .gpio_led(LED_output), + .gpio_switch(Switch_input) + ); + + +initial begin + #0 Switch_input <= 4'h00; + $display("Switch set to zero"); + #1000000 Switch_input <= 4'h01; + $display("Switch set to one"); + #2000000 + $display("PASS"); + $finish(); +end + +endmodule |