aboutsummaryrefslogtreecommitdiffstats
path: root/contrib
diff options
context:
space:
mode:
Diffstat (limited to 'contrib')
-rw-r--r--contrib/sp605/settings.mk (renamed from contrib/sp605/sp605.mk)0
-rw-r--r--contrib/xilinx.mk5
-rw-r--r--contrib/xula2/settings.mk12
-rw-r--r--contrib/xula2/targets.mk (renamed from contrib/xula2/xula2.mk)12
4 files changed, 17 insertions, 12 deletions
diff --git a/contrib/sp605/sp605.mk b/contrib/sp605/settings.mk
index 857417b..857417b 100644
--- a/contrib/sp605/sp605.mk
+++ b/contrib/sp605/settings.mk
diff --git a/contrib/xilinx.mk b/contrib/xilinx.mk
index e891c1f..628af75 100644
--- a/contrib/xilinx.mk
+++ b/contrib/xilinx.mk
@@ -50,9 +50,10 @@
# "PRECIOUS" files will not be deleted by make as casually
.PRECIOUS: tb/%.isim
-.DEFAULT_GOAL: default
+# Setup default targets
default: bitfiles
-all: bitfiles
+all: default
+.DEFAULT_GOAL: default
# This file only works with Xilinx stuff
vendor = xilinx
diff --git a/contrib/xula2/settings.mk b/contrib/xula2/settings.mk
new file mode 100644
index 0000000..a185426
--- /dev/null
+++ b/contrib/xula2/settings.mk
@@ -0,0 +1,12 @@
+# xula2 device-specific configuration variables
+# put targets in targets.mk, not this file
+
+board := xula2
+family := spartan6
+device := XC6SLX25
+speedgrade := -2
+device_package := ftg256
+bitconf_file := ./contrib/xula2/xula2.bitconf
+ucf_file := ./contrib/xula2/xula2.ucf
+opt_file := ./contrib/default.opt
+
diff --git a/contrib/xula2/xula2.mk b/contrib/xula2/targets.mk
index 681fe38..ec941be 100644
--- a/contrib/xula2/xula2.mk
+++ b/contrib/xula2/targets.mk
@@ -1,16 +1,8 @@
-# xula2 device-specific configuration variables and make targets
+# xula2 device-specific configuration make targets.
+# put variables in settings.mk, not this file.
.PHONY: prog prog_flash
-board := xula2
-family := spartan6
-device := XC6SLX25
-speedgrade := -2
-device_package := ftg256
-bitconf_file := ./contrib/xula2/xula2.bitconf
-ucf_file := ./contrib/xula2/xula2.ucf
-opt_file := ./contrib/default.opt
-
# This target uploads directly to the FPGA; volatile
prog: build/$(project).bit
# First ensure that xsload.py is installed