From b2b33189e901d7cb1035b1e624347f0b8db88bbc Mon Sep 17 00:00:00 2001 From: bnewbold Date: Tue, 6 Mar 2012 23:05:34 -0500 Subject: shifting bits --- Index.page | 3 +- hardware/cpu.page | 95 +++++++++++++++++++++++++++++++++++++++++++++++++++++ hardware/soc.page | 90 -------------------------------------------------- hardware/specs.page | 54 ++++++++++++++++++++++++++++++ specs.page | 43 ------------------------ 5 files changed, 151 insertions(+), 134 deletions(-) create mode 100644 hardware/cpu.page delete mode 100644 hardware/soc.page create mode 100644 hardware/specs.page delete mode 100644 specs.page diff --git a/Index.page b/Index.page index 5eb192f..ff67413 100644 --- a/Index.page +++ b/Index.page @@ -5,9 +5,10 @@ * [ideas]() * [software]() * [hardware/]() -* [hardware/soc]() +* [hardware/cpu]() * [hardware/misc]() * [hardware/devices]() +* [hardware/specs]() * [refs]() This is a pseudo-open [gitit](http://gitit.net) repo for brainstorming around diff --git a/hardware/cpu.page b/hardware/cpu.page new file mode 100644 index 0000000..bf4db66 --- /dev/null +++ b/hardware/cpu.page @@ -0,0 +1,95 @@ + +# Big Picture + +*(circa Q1 2012)* + +The generic term "System on a Chip" refers to the fact that the CPU and many +"peripherals" (USB, ethernet, memory controller, GPU) are integraded into a +single package instead of being distributed across a motherboard via a +northbridge and southbridge. There still needs to be external analog and +digital circuitry for most "connectivity" interfaces like USB or ethernet to +provide level conversion, isolation, etc. Notably, RAM is not usually +integraded into the chip, and the large parallel bus to the RAM chips must be +routed very carefully. Some newer chips (popular circa 2010?) include "package +on package" technology where the RAM chip is right on top of the SoC to make +routing easier (eg, iPhones, RaspberryPI). + +The establishment players for mobile ARM SoCs are TI (OMAP), Qualcomm +([Snapdragon](http://en.wikipedia.org/wiki/Snapdragon_(System_on_Chip))), not +regular ARM), Samsung ([Exynos](http://en.wikipedia.org/wiki/Exynos))), Broadcom (Armada, Armada XP, ) + +The establishment players for MIPS SoCs are Broadcom and Marvell (Kirkwood). + +# ARM + +### TI OMAP + +[OMAP5 overview](http://www.linuxfordevices.com/c/a/News/TI-OMAP5430-and-OMAP5432-CES-demos/) + +### Marvell Armada XP + +[Marvell MV78200](http://www.marvell.com/embedded-processors/discovery-innovation/applications.jsp) + + - 4 GigE ports + - 2x 1GHz armv5 chips + - 2x SATA + - 2x PCIe x4 + - $60 or less? + +Samples available from +[nu horizons](http://www.nuhorizons.com/featuredproducts/portal/samples/January_2012.asp) + +Apple experimenting with these chip? [arstechnica article](http://arstechnica.com/apple/news/2011/09/support-for-quad-core-arm-cpu-shows-up-in-apples-xcode-but-why.ars) + +### Calxeda "EnergyCore" + +Going for massively parallelized market, with hundreds of cors in a rack. + +ECX-1000 is 4 Cortex-A9 at 1.1-1.4ghz, 5watts with 4gb DDR3 RAM. SATA and PCIe, +72bitwidth DDR3 controller (32bit addressing), up to 5 10GigE ports with +"routing fabric". Hard FPU. + + +### Freescale i.MX6 + + + +40nm process. 1.2GHz Cortex A9, up to 4 cores, includes vidoe processing +"stuff". Single PCIe, GigE, SATA, 64bit RAM bus, **$10-20** price range, +available summer 2012? Sabre Lite DevKits available to some? + +[linaro link with specs](https://wiki.linaro.org/Boards/MX6QSabreLite) + +### Allwinner A10 + +A Chinese-made fast cheap (**"$5 in volume"**) tablet-oriented processor + + - + - + - + - SDK and tools docs + +# x86 + +### Intel Atom + +Line of devices with low-gate-count integrated Altera FPGAs. Great +connectivity, but higher price (**~$60?**), proprietary toolchain, higher power +consumption. + +# MIPS + +Ingenic jz4760B + +# PowerPC + +AppliedMicro APM86290 + +# Other + +Marvell Avanta ethernet switch SoCs: http://www.marvell.com/broadband/ + +Marvell Prestera EX/MX enterprise packet processors + +Freescale QorIQ DPAA + diff --git a/hardware/soc.page b/hardware/soc.page deleted file mode 100644 index 9266091..0000000 --- a/hardware/soc.page +++ /dev/null @@ -1,90 +0,0 @@ - -# Big Picture - -*(circa Q1 2012)* - -The generic term "System on a Chip" refers to the fact that the CPU and many -"peripherals" (USB, ethernet, memory controller, GPU) are integraded into a -single package instead of being distributed across a motherboard via a -northbridge and southbridge. There still needs to be external analog and -digital circuitry for most "connectivity" interfaces like USB or ethernet to -provide level conversion, isolation, etc. Notably, RAM is not usually -integraded into the chip, and the large parallel bus to the RAM chips must be -routed very carefully. Some newer chips (popular circa 2010?) include "package -on package" technology where the RAM chip is right on top of the SoC to make -routing easier (eg, iPhones, RaspberryPI). - -The establishment players for mobile ARM SoCs are TI (OMAP), Qualcomm -([Snapdragon](http://en.wikipedia.org/wiki/Snapdragon_(System_on_Chip))), not -regular ARM), Samsung ([Exynos](http://en.wikipedia.org/wiki/Exynos))), Broadcom (Armada, Armada XP, ) - -The establishment players for MIPS SoCs are Broadcom and Marvell (Kirkwood). - - -# ARM - -### TI OMAP - -[OMAP5 overview](http://www.linuxfordevices.com/c/a/News/TI-OMAP5430-and-OMAP5432-CES-demos/) - -### Marvell Armada XP - -[Marvell MV78200](http://www.marvell.com/embedded-processors/discovery-innovation/applications.jsp) - - - 4 GigE ports - - 2x 1GHz armv5 chips - - 2x SATA - - 2x PCIe x4 - - $60 or less? - -Samples available from -[nu horizons](http://www.nuhorizons.com/featuredproducts/portal/samples/January_2012.asp) - -Apple experimenting with these chip? [arstechnica article](http://arstechnica.com/apple/news/2011/09/support-for-quad-core-arm-cpu-shows-up-in-apples-xcode-but-why.ars) - -### Calxeda "EnergyCore" - -Going for massively parallelized market, with hundreds of cors in a rack. - -ECX-1000 is 4 Cortex-A9 at 1.1-1.4ghz, 5watts with 4gb DDR3 RAM. SATA and PCIe, -72bitwidth DDR3 controller (32bit addressing), up to 5 10GigE ports with -"routing fabric". Hard FPU. - - -### Freescale i.MX6 - - - -40nm process. 1.2GHz Cortex A9, up to 4 cores, includes vidoe processing -"stuff". Single PCIe, GigE, SATA, 64bit RAM bus, $10-20 price range, available -summer 2012? Sabre Lite DevKits available to some? -[linaro link with specs](https://wiki.linaro.org/Boards/MX6QSabreLite) - -### Allwinner A10 - -A Chinese-made fast cheap ($5 in volume) tablet - - - - - - - - - SDK and tools docs - -# MIPS - -Ingenic jz4760B - -# x86 - -# PowerPC - -AppliedMicro APM86290 - -# Other - -Marvell Avanta ethernet switch SoCs: http://www.marvell.com/broadband/ - -Marvell Prestera EX/MX enterprise packet processors - -Freescale QorIQ DPAA - - diff --git a/hardware/specs.page b/hardware/specs.page new file mode 100644 index 0000000..82ab48a --- /dev/null +++ b/hardware/specs.page @@ -0,0 +1,54 @@ + +Minimal, Easy Dev: + + - Core + - ARM SoC, probably BeagleBoard-compatible device + - power management/regulator IC for SoC + - 256MB RAM + - No onboard FLASH, 2GB+ uSD card + - WiFi + - Atheros ath5k-compatible WiFi bg baseband, radio + - Antenna connector + - regulator/powermanagement + - 802.15.4 + - all-in-one chip, trace antenna (?) + - Ethernet + - PHY IC + - Single 10/100mbps jack (w/ LEDs) + - Connectors with LEDs + - Power + - 5/12v regulator, ~1amp + - Power connector + - Reverse voltage diode + - Second SD or uSD connector (for expansion) + - status LEDs and drivers (PWM from SoC?) + - reset button + - power switch + +"Single PCIe": + + - Core + - ARM SoC, Freescale i.MX6 + - Power management/regulator IC for SoC + - 512MB RAM + - No onboard FLASH, 8GB+ uSD card + - FRAM chip for routing table persistance + - WiFi + - full-size miniPCIe slot for off-the-shelf hardware + - 802.15.4 + - all-in-one chip, trace antenna (?) + - Ethernet + - GigE switch chip w/ PHY, 5 ports + - 4x LAN jacks with drivers for longer cable runs (w/ LEDs) + - 1x WAN jack + - Power + - 5/12v regulator, ~1amp + - Power connector + - Reverse voltage diode + - USB Host jack + - USB mini jack for UART/JTAG/Mass storage (how? USB2 hub?) + - Second SD or uSD connector (for expansion) + - status LEDs and drivers (PWM from SoC?) + - reset button + - power switch + diff --git a/specs.page b/specs.page deleted file mode 100644 index e6ad779..0000000 --- a/specs.page +++ /dev/null @@ -1,43 +0,0 @@ - -minimal BOM (minus small passives): - - - Core - - SoC - - power management/regulator IC for SoC - - RAM - - Onboard FLASH - - FRAM chip (SPI? SDIO?) - - WiFi - - regulator/powermanagement - - WiFi baseband - - WiFi radio - - WiFi antenna connector - - 802.15.4 - - regulator/powermanagement - - all-in-one chip - - ethernet - - ethernet switch chip and/or PHY chips - - ethernet drivers (for long cable runs) - - connectors with LEDs - - power - - 5/12v regulator, ~1amp - - power connector - - reverse voltage diode - - SD connector - - status LEDs and drivers (PWM from SoC?) - - reset button - - power switch - -tests: - - - 10/100/1000 half/full duplex fallbacks - - 100m ethernet cable run (full bandwidth) - - high/low temperature reliability - - wireless range and bandwidth - - network latency - - network throughput - - "fair" contention management - - WPA2 actually working - - total bulk data bandwidth - - max small packets/second - - dhcp server performance -- cgit v1.2.3