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Diffstat (limited to 'xilinx_data/spartan6_notes.csv')
| -rw-r--r-- | xilinx_data/spartan6_notes.csv | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/xilinx_data/spartan6_notes.csv b/xilinx_data/spartan6_notes.csv new file mode 100644 index 0000000..7359caa --- /dev/null +++ b/xilinx_data/spartan6_notes.csv @@ -0,0 +1,9 @@ +1,"Each slice contains four LUTs and eight flip-flops" +2,"Spartan-6 FPGA logic cell ratings reflect the increased logic capacity offered by the new 6-input LUT architecture" +3,"Each CMT contains two DCMs and one PLL" +4,"Each DSP48A1 slice contains an 18x18 multiplier, an adder, and an accumulator" +5,"The LX device pinouts are not compatible with the LXT device pinouts" +7,"CPG196 and TQG144 do not have memory controller support. -3N is not available for these packages" +8,"CSG225 has X8 memory controller support in the LX9 and LX16 devices. There is no memory controller int he LX4 devices" +9,"Devices in the FG(G)484 and GS484 packages have support for two memory controllers" +10,"Devices with -3N speed grade do not support MCB functionality" |