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author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-11-25 16:22:56 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-11-25 16:22:56 +0000 |
commit | e3d7c9b6f5e62fdbec05fd5f2e1ef59aa4a14673 (patch) | |
tree | d4064d318e4cd2d23fc9c465777daf3824f39f60 /target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch | |
parent | c774fc8565d59aa11f6de5a6f1e41abb536a9e2d (diff) | |
download | openwrt-e3d7c9b6f5e62fdbec05fd5f2e1ef59aa4a14673.tar.gz openwrt-e3d7c9b6f5e62fdbec05fd5f2e1ef59aa4a14673.zip |
AA: ar71xx: fix GPIO function selection for AR934x
Backport of r34275.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/branches/attitude_adjustment@34368 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch index 8a11a70d1..150f0eecb 100644 --- a/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch +++ b/target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch @@ -153,7 +153,7 @@ #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -520,6 +582,14 @@ +@@ -520,6 +582,12 @@ #define AR71XX_GPIO_REG_INT_ENABLE 0x24 #define AR71XX_GPIO_REG_FUNC 0x28 @@ -163,12 +163,10 @@ +#define AR934X_GPIO_REG_OUT_FUNC3 0x38 +#define AR934X_GPIO_REG_OUT_FUNC4 0x3c +#define AR934X_GPIO_REG_OUT_FUNC5 0x40 -+#define AR934X_GPIO_REG_FUNC 0x6c -+ + #define AR934X_GPIO_REG_FUNC 0x6c + #define AR71XX_GPIO_COUNT 16 - #define AR724X_GPIO_COUNT 18 - #define AR913X_GPIO_COUNT 22 -@@ -548,4 +618,133 @@ +@@ -550,4 +618,133 @@ #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 |