From 4782465ef5d08bd7e7a36085a3013ed379e90ec2 Mon Sep 17 00:00:00 2001 From: bryan newbold Date: Tue, 12 Nov 2013 19:57:34 -0500 Subject: hack fix for bug with include ordering There seems to be a problem with the default target being overriden when a board-specific file is included before xilinx.mk. Workaround is to include targets last. --- contrib/xula2/targets.mk | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 contrib/xula2/targets.mk (limited to 'contrib/xula2/targets.mk') diff --git a/contrib/xula2/targets.mk b/contrib/xula2/targets.mk new file mode 100644 index 0000000..ec941be --- /dev/null +++ b/contrib/xula2/targets.mk @@ -0,0 +1,16 @@ +# xula2 device-specific configuration make targets. +# put variables in settings.mk, not this file. + +.PHONY: prog prog_flash + +# This target uploads directly to the FPGA; volatile +prog: build/$(project).bit + # First ensure that xsload.py is installed + @xsload.py --version + @xsload.py --fpga build/$(project).bit + +# This target uploads to the SPI flash on board; non-volatile +prog_flash: build/$(project).bit + # First ensure that xsload.py is installed + @xsload.py --version + @xsload.py --flash build/$(project).bit -- cgit v1.2.3