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-rw-r--r--contrib/xilinx.mk4
-rw-r--r--contrib/xula2.mk9
2 files changed, 11 insertions, 2 deletions
diff --git a/contrib/xilinx.mk b/contrib/xilinx.mk
index 458d73e..aae76a2 100644
--- a/contrib/xilinx.mk
+++ b/contrib/xilinx.mk
@@ -129,9 +129,9 @@ programming_files: build/$(project).bit build/$(project).mcs
build/$(project).mcs: build/$(project).bit
@bash -c "$(xil_env); promgen -w -data_width $(mcs_datawidth) -s $(flashsize) -p mcs -o $(project).mcs -u 0 $(project).bit"
-build/$(project).bit: build/$(project)_par.ncd build/$(project)_post_par.twr
+build/$(project).bit: build/$(project)_par.ncd build/$(project)_post_par.twr $(board).bitconf
@bash -c "$(xil_env); \
- bitgen $(intstyle) -g Binary:yes -g DriveDone:yes -g StartupClk:Cclk -w $(project)_par.ncd $(project).bit"
+ bitgen $(intstyle) -f ../$(board).bitconf -w $(project)_par.ncd $(project).bit"
build/$(project)_par.ncd: build/$(project).ncd build/$(project)_post_map.twr
diff --git a/contrib/xula2.mk b/contrib/xula2.mk
new file mode 100644
index 0000000..9c06b3b
--- /dev/null
+++ b/contrib/xula2.mk
@@ -0,0 +1,9 @@
+# xula2 device-specific make targets
+
+.PHONY: prog
+
+prog: build/$(project).bit
+ @xsload.py --fpga build/$(project).bit
+
+prog_flash: build/$(project).bit
+ @xsload.py --flash build/$(project).bit