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authorbryan newbold <bnewbold@leaflabs.com>2013-11-12 19:57:34 -0500
committerbryan newbold <bnewbold@leaflabs.com>2013-11-12 20:03:09 -0500
commit4782465ef5d08bd7e7a36085a3013ed379e90ec2 (patch)
treefe2deb9c67906aba6e7969e409bdcee40f064033 /contrib/xula2/targets.mk
parentf155faea835fff5b953777d97ab73ca76696fbe3 (diff)
downloadbasic-hdl-template-4782465ef5d08bd7e7a36085a3013ed379e90ec2.tar.gz
basic-hdl-template-4782465ef5d08bd7e7a36085a3013ed379e90ec2.zip
hack fix for bug with include ordering
There seems to be a problem with the default target being overriden when a board-specific file is included before xilinx.mk. Workaround is to include targets last.
Diffstat (limited to 'contrib/xula2/targets.mk')
-rw-r--r--contrib/xula2/targets.mk16
1 files changed, 16 insertions, 0 deletions
diff --git a/contrib/xula2/targets.mk b/contrib/xula2/targets.mk
new file mode 100644
index 0000000..ec941be
--- /dev/null
+++ b/contrib/xula2/targets.mk
@@ -0,0 +1,16 @@
+# xula2 device-specific configuration make targets.
+# put variables in settings.mk, not this file.
+
+.PHONY: prog prog_flash
+
+# This target uploads directly to the FPGA; volatile
+prog: build/$(project).bit
+ # First ensure that xsload.py is installed
+ @xsload.py --version
+ @xsload.py --fpga build/$(project).bit
+
+# This target uploads to the SPI flash on board; non-volatile
+prog_flash: build/$(project).bit
+ # First ensure that xsload.py is installed
+ @xsload.py --version
+ @xsload.py --flash build/$(project).bit